projects / people / ms / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 92b7716f GU |
1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 | |
| 3 | --- | |
| 4 | $id: http://devicetree.org/schemas/i2c/renesas,riic.yaml# | |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | ||
| a431a091 | 7 | title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC) |
| 92b7716f GU |
8 | |
| 9 | maintainers: | |
| 10 | - Chris Brandt <chris.brandt@renesas.com> | |
| 11 | - Wolfram Sang <wsa+renesas@sang-engineering.com> | |
| 12 | ||
| 13 | allOf: | |
| 14 | - $ref: /schemas/i2c/i2c-controller.yaml# | |
| 15 | ||
| 16 | properties: | |
| 17 | compatible: | |
| 18 | items: | |
| 19 | - enum: | |
| a431a091 BD |
20 | - renesas,riic-r7s72100 # RZ/A1H |
| 21 | - renesas,riic-r7s9210 # RZ/A2M | |
| db92a6eb | 22 | - renesas,riic-r9a07g043 # RZ/G2UL |
| a431a091 | 23 | - renesas,riic-r9a07g044 # RZ/G2{L,LC} |
| eb1e49e0 | 24 | - renesas,riic-r9a07g054 # RZ/V2L |
| a431a091 | 25 | - const: renesas,riic-rz # RZ/A or RZ/G2L |
| 92b7716f GU |
26 | |
| 27 | reg: | |
| 28 | maxItems: 1 | |
| 29 | ||
| 30 | interrupts: | |
| 31 | items: | |
| 112dfa5c GU |
32 | - description: Transmit End Interrupt |
| 33 | - description: Receive Data Full Interrupt | |
| 34 | - description: Transmit Data Empty Interrupt | |
| 35 | - description: Stop Condition Detection Interrupt | |
| 36 | - description: Start Condition Detection Interrupt | |
| 37 | - description: NACK Reception Interrupt | |
| 38 | - description: Arbitration-Lost Interrupt | |
| 39 | - description: Timeout Interrupt | |
| 40 | ||
| 41 | interrupt-names: | |
| 42 | items: | |
| 43 | - const: tei | |
| 44 | - const: ri | |
| 45 | - const: ti | |
| 46 | - const: spi | |
| 47 | - const: sti | |
| 48 | - const: naki | |
| 49 | - const: ali | |
| 50 | - const: tmoi | |
| 92b7716f GU |
51 | |
| 52 | clock-frequency: | |
| 53 | description: | |
| 54 | Desired I2C bus clock frequency in Hz. The absence of this property | |
| 55 | indicates the default frequency 100 kHz. | |
| 56 | ||
| 57 | clocks: | |
| 58 | maxItems: 1 | |
| 59 | ||
| 60 | power-domains: | |
| 61 | maxItems: 1 | |
| 62 | ||
| 4e2a2ed9 LP |
63 | resets: |
| 64 | maxItems: 1 | |
| 65 | ||
| 92b7716f GU |
66 | required: |
| 67 | - compatible | |
| 68 | - reg | |
| 69 | - interrupts | |
| 13bf92e6 | 70 | - interrupt-names |
| 92b7716f GU |
71 | - clocks |
| 72 | - clock-frequency | |
| 73 | - power-domains | |
| 74 | - '#address-cells' | |
| 75 | - '#size-cells' | |
| 76 | ||
| a431a091 BD |
77 | if: |
| 78 | properties: | |
| 79 | compatible: | |
| 80 | contains: | |
| 81 | enum: | |
| db92a6eb | 82 | - renesas,riic-r9a07g043 |
| a431a091 | 83 | - renesas,riic-r9a07g044 |
| eb1e49e0 | 84 | - renesas,riic-r9a07g054 |
| a431a091 BD |
85 | then: |
| 86 | required: | |
| 87 | - resets | |
| 88 | ||
| 92b7716f GU |
89 | unevaluatedProperties: false |
| 90 | ||
| 91 | examples: | |
| 92 | - | | |
| 93 | #include <dt-bindings/clock/r7s72100-clock.h> | |
| 94 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 95 | ||
| 96 | i2c0: i2c@fcfee000 { | |
| 97 | compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; | |
| 98 | reg = <0xfcfee000 0x44>; | |
| 99 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, | |
| 100 | <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>, | |
| 101 | <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>, | |
| 102 | <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, | |
| 103 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, | |
| 104 | <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, | |
| 105 | <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, | |
| 106 | <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
| 112dfa5c GU |
107 | interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali", |
| 108 | "tmoi"; | |
| 92b7716f GU |
109 | clocks = <&mstp9_clks R7S72100_CLK_I2C0>; |
| 110 | clock-frequency = <100000>; | |
| 111 | power-domains = <&cpg_clocks>; | |
| 112 | #address-cells = <1>; | |
| 113 | #size-cells = <0>; | |
| 114 | }; |