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Commit | Line | Data |
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dd84058d MY |
1 | menu "ARM architecture" |
2 | depends on ARM | |
3 | ||
4 | config SYS_ARCH | |
dd84058d MY |
5 | default "arm" |
6 | ||
016a954e MY |
7 | config ARM64 |
8 | bool | |
0cff87c9 | 9 | select 64BIT |
bb6b142f | 10 | select PHYS_64BIT |
067716ba | 11 | select SYS_CACHE_SHIFT_6 |
1dd56db5 | 12 | imply SPL_SEPARATE_BSS |
016a954e | 13 | |
270f8710 MV |
14 | config ARM64_CRC32 |
15 | bool "Enable support for CRC32 instruction" | |
c2e5eea3 | 16 | depends on ARM64 && CC_IS_GCC |
270f8710 MV |
17 | default y |
18 | help | |
19 | ARMv8 implements dedicated crc32 instruction for crc32 calculation. | |
20 | This is faster than software crc32 calculation. This instruction may | |
21 | not be present on all ARMv8.0, but is always present on ARMv8.1 and | |
22 | newer. | |
23 | ||
bf8c4ced PF |
24 | config COUNTER_FREQUENCY |
25 | int "Timer clock frequency" | |
26 | depends on ARM64 || CPU_V7A | |
4e65175e PF |
27 | default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL |
28 | default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \ | |
29 | ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036 | |
30 | default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A | |
31 | default 100000000 if ARCH_ZYNQMP | |
386fca68 | 32 | default 200000000 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5 |
bf8c4ced PF |
33 | default 0 |
34 | help | |
35 | For platforms with ARMv8-A and ARMv7-A which features a system | |
36 | counter, those platforms needs software to program the counter | |
37 | frequency. Setup time clock frequency for certain platform. | |
38 | 0 means no need to configure the system counter frequency. | |
39 | For platforms needs the frequency set in U-Boot with a | |
40 | pre-defined value, should have the macro defined as a non-zero value. | |
41 | ||
49e93875 SW |
42 | config POSITION_INDEPENDENT |
43 | bool "Generate position-independent pre-relocation code" | |
cd82f199 | 44 | depends on ARM64 || CPU_V7A |
49e93875 SW |
45 | help |
46 | U-Boot expects to be linked to a specific hard-coded address, and to | |
47 | be loaded to and run from that address. This option lifts that | |
11f4fbf0 EI |
48 | restriction, thus allowing the code to be loaded to and executed from |
49 | almost any 4K aligned address. This logic relies on the relocation | |
e852b30b | 50 | information that is embedded in the binary to support U-Boot |
49e93875 | 51 | relocating itself to the top-of-RAM later during execution. |
e6c90448 | 52 | |
382de4a7 MY |
53 | config INIT_SP_RELATIVE |
54 | bool "Specify the early stack pointer relative to the .bss section" | |
aa29b21d | 55 | depends on ARM64 |
f5cb6c30 | 56 | default n if ARCH_QEMU |
12650e4a | 57 | default y if POSITION_INDEPENDENT |
e6c90448 SW |
58 | help |
59 | U-Boot typically uses a hard-coded value for the stack pointer | |
382de4a7 | 60 | before relocation. Enable this option to instead calculate the |
e6c90448 | 61 | initial SP at run-time. This is useful to avoid hard-coding addresses |
e852b30b | 62 | into U-Boot, so that it can be loaded and executed at arbitrary |
382de4a7 MY |
63 | addresses and thus avoid using arbitrary addresses at runtime. |
64 | ||
65 | If this option is enabled, the early stack pointer is set to | |
66 | &_bss_start with a offset value added. The offset is specified by | |
67 | SYS_INIT_SP_BSS_OFFSET. | |
68 | ||
69 | config SYS_INIT_SP_BSS_OFFSET | |
70 | int "Early stack offset from the .bss base address" | |
aa29b21d | 71 | depends on ARM64 |
382de4a7 MY |
72 | depends on INIT_SP_RELATIVE |
73 | default 524288 | |
74 | help | |
75 | This option's value is the offset added to &_bss_start in order to | |
e6c90448 SW |
76 | calculate the stack pointer. This offset should be large enough so |
77 | that the early malloc region, global data (gd), and early stack usage | |
78 | do not overlap any appended DTB. | |
8163faf9 | 79 | |
372779ab T |
80 | config SPL_SYS_NO_VECTOR_TABLE |
81 | depends on SPL | |
82 | bool | |
83 | ||
29f390bb CB |
84 | config SPL_USE_SEPARATE_FAULT_HANDLERS |
85 | bool "Use separate fault handlers instead of a single common one" | |
86 | depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M | |
87 | help | |
88 | Instead of a common fault handler, generate a separate one for | |
89 | undefined_instruction, software_interrupt, prefetch_abort etc. | |
90 | This is for debugging purposes, when you want to set breakpoints | |
91 | on them separately. | |
92 | ||
8163faf9 | 93 | config LINUX_KERNEL_IMAGE_HEADER |
aa29b21d | 94 | depends on ARM64 |
8163faf9 SW |
95 | bool |
96 | help | |
97 | Place a Linux kernel image header at the start of the U-Boot binary. | |
98 | The format of the header is described in the Linux kernel source at | |
99 | Documentation/arm64/booting.txt. This feature is useful since the | |
100 | image header reports the amount of memory (BSS and similar) that | |
101 | U-Boot needs to use, but which isn't part of the binary. | |
102 | ||
8163faf9 | 103 | config LNX_KRNL_IMG_TEXT_OFFSET_BASE |
aa29b21d | 104 | depends on LINUX_KERNEL_IMAGE_HEADER |
8163faf9 SW |
105 | hex |
106 | help | |
98463903 | 107 | The value subtracted from CONFIG_TEXT_BASE to calculate the |
e852b30b | 108 | TEXT_OFFSET value written to the Linux kernel image header. |
49e93875 | 109 | |
5afdcca0 TR |
110 | config GICV2 |
111 | bool | |
112 | ||
113 | config GICV3 | |
114 | bool | |
115 | ||
0bc4356d BKRG |
116 | config GIC_V3_ITS |
117 | bool "ARM GICV3 ITS" | |
504f8648 | 118 | select IRQ |
0bc4356d BKRG |
119 | help |
120 | ARM GICV3 Interrupt translation service (ITS). | |
121 | Basic support for programming locality specific peripheral | |
122 | interrupts (LPI) configuration tables and enable LPI tables. | |
123 | LPI configuration table can be used by u-boot or Linux. | |
124 | ARM GICV3 has limitation, once the LPI table is enabled, LPI | |
125 | configuration table can not be re-programmed, unless GICV3 reset. | |
126 | ||
c6a13f3d VYA |
127 | config GICV3_SUPPORT_GIC600 |
128 | bool "ARM GICV3 GIC600 SUPPORT" | |
129 | help | |
130 | ARM GIC-600 IP complies with ARM GICv3 architecture, but among others, | |
131 | implements a power control register in the Redistributor frame.This | |
132 | register must be programmed to mark the frame as powered on, before | |
133 | accessing other registers in the frame. Rest of initialization sequence | |
134 | remains the same. | |
135 | ||
49e93875 SW |
136 | config STATIC_RELA |
137 | bool | |
eabc0902 | 138 | default y if ARM64 |
49e93875 | 139 | |
37217f0e LV |
140 | config DMA_ADDR_T_64BIT |
141 | bool | |
142 | default y if ARM64 | |
143 | ||
2e07c249 | 144 | config HAS_VBAR |
e009bfa4 | 145 | bool |
2e07c249 | 146 | |
62e92077 | 147 | config HAS_THUMB2 |
e009bfa4 | 148 | bool |
62e92077 | 149 | |
7a672057 MH |
150 | config GPIO_EXTRA_HEADER |
151 | bool | |
152 | ||
111a6af9 PE |
153 | # Used for compatibility with asm files copied from the kernel |
154 | config ARM_ASM_UNIFIED | |
155 | bool | |
156 | default y | |
157 | ||
158 | # Used for compatibility with asm files copied from the kernel | |
159 | config THUMB2_KERNEL | |
160 | bool | |
161 | ||
a0aba8a2 TW |
162 | config SYS_ICACHE_OFF |
163 | bool "Do not enable icache" | |
a0aba8a2 TW |
164 | help |
165 | Do not enable instruction cache in U-Boot. | |
166 | ||
10015025 TW |
167 | config SPL_SYS_ICACHE_OFF |
168 | bool "Do not enable icache in SPL" | |
169 | depends on SPL | |
170 | default SYS_ICACHE_OFF | |
171 | help | |
172 | Do not enable instruction cache in SPL. | |
173 | ||
a0aba8a2 TW |
174 | config SYS_DCACHE_OFF |
175 | bool "Do not enable dcache" | |
a0aba8a2 TW |
176 | help |
177 | Do not enable data cache in U-Boot. | |
178 | ||
10015025 TW |
179 | config SPL_SYS_DCACHE_OFF |
180 | bool "Do not enable dcache in SPL" | |
181 | depends on SPL | |
182 | default SYS_DCACHE_OFF | |
183 | help | |
184 | Do not enable data cache in SPL. | |
185 | ||
f4bcd767 LV |
186 | config SYS_ARM_CACHE_CP15 |
187 | bool "CP15 based cache enabling support" | |
188 | help | |
189 | Select this if your processor suports enabling caches by using | |
190 | CP15 registers. | |
191 | ||
7240b80e LV |
192 | config SYS_ARM_MMU |
193 | bool "MMU-based Paged Memory Management Support" | |
f4bcd767 | 194 | select SYS_ARM_CACHE_CP15 |
7240b80e LV |
195 | help |
196 | Select if you want MMU-based virtualised addressing space | |
e852b30b | 197 | support via paged memory management. |
7240b80e | 198 | |
f2ef2043 LV |
199 | config SYS_ARM_MPU |
200 | bool 'Use the ARM v7 PMSA Compliant MPU' | |
201 | help | |
202 | Some ARM systems without an MMU have instead a Memory Protection | |
203 | Unit (MPU) that defines the type and permissions for regions of | |
204 | memory. | |
205 | If your CPU has an MPU then you should choose 'y' here unless you | |
206 | know that you do not want to use the MPU. | |
207 | ||
8dda2e2f TR |
208 | # If set, the workarounds for these ARM errata are applied early during U-Boot |
209 | # startup. Note that in general these options force the workarounds to be | |
210 | # applied; no CPU-type/version detection exists, unlike the similar options in | |
211 | # the Linux kernel. Do not set these options unless they apply! Also note that | |
e852b30b RD |
212 | # the following can be machine-specific errata. These do have ability to |
213 | # provide rudimentary version and machine-specific checks, but expect no | |
8dda2e2f TR |
214 | # product checks: |
215 | # CONFIG_ARM_ERRATA_430973 | |
216 | # CONFIG_ARM_ERRATA_454179 | |
217 | # CONFIG_ARM_ERRATA_621766 | |
218 | # CONFIG_ARM_ERRATA_798870 | |
219 | # CONFIG_ARM_ERRATA_801819 | |
7b37a9c7 | 220 | # CONFIG_ARM_CORTEX_A8_CVE_2017_5715 |
c2ca3fdf | 221 | # CONFIG_ARM_CORTEX_A15_CVE_2017_5715 |
7b37a9c7 | 222 | |
8dda2e2f TR |
223 | config ARM_ERRATA_430973 |
224 | bool | |
225 | ||
226 | config ARM_ERRATA_454179 | |
227 | bool | |
228 | ||
229 | config ARM_ERRATA_621766 | |
230 | bool | |
231 | ||
232 | config ARM_ERRATA_716044 | |
233 | bool | |
234 | ||
19a75b8c SS |
235 | config ARM_ERRATA_725233 |
236 | bool | |
237 | ||
8dda2e2f TR |
238 | config ARM_ERRATA_742230 |
239 | bool | |
240 | ||
241 | config ARM_ERRATA_743622 | |
242 | bool | |
243 | ||
244 | config ARM_ERRATA_751472 | |
245 | bool | |
246 | ||
247 | config ARM_ERRATA_761320 | |
248 | bool | |
249 | ||
250 | config ARM_ERRATA_773022 | |
251 | bool | |
252 | ||
253 | config ARM_ERRATA_774769 | |
254 | bool | |
255 | ||
256 | config ARM_ERRATA_794072 | |
257 | bool | |
258 | ||
259 | config ARM_ERRATA_798870 | |
260 | bool | |
261 | ||
262 | config ARM_ERRATA_801819 | |
263 | bool | |
264 | ||
265 | config ARM_ERRATA_826974 | |
266 | bool | |
267 | ||
268 | config ARM_ERRATA_828024 | |
269 | bool | |
270 | ||
271 | config ARM_ERRATA_829520 | |
272 | bool | |
273 | ||
274 | config ARM_ERRATA_833069 | |
275 | bool | |
276 | ||
277 | config ARM_ERRATA_833471 | |
278 | bool | |
279 | ||
11d94319 | 280 | config ARM_ERRATA_845369 |
6e7bdde4 | 281 | bool |
11d94319 | 282 | |
8776350d NM |
283 | config ARM_ERRATA_852421 |
284 | bool | |
285 | ||
286 | config ARM_ERRATA_852423 | |
287 | bool | |
288 | ||
ab0ab54e AW |
289 | config ARM_ERRATA_855873 |
290 | bool | |
291 | ||
7b37a9c7 NM |
292 | config ARM_CORTEX_A8_CVE_2017_5715 |
293 | bool | |
294 | ||
c2ca3fdf NM |
295 | config ARM_CORTEX_A15_CVE_2017_5715 |
296 | bool | |
297 | ||
2e07c249 | 298 | config CPU_ARM720T |
e009bfa4 | 299 | bool |
067716ba | 300 | select SYS_CACHE_SHIFT_5 |
7240b80e | 301 | imply SYS_ARM_MMU |
2e07c249 GS |
302 | |
303 | config CPU_ARM920T | |
e009bfa4 | 304 | bool |
067716ba | 305 | select SYS_CACHE_SHIFT_5 |
7240b80e | 306 | imply SYS_ARM_MMU |
2e07c249 GS |
307 | |
308 | config CPU_ARM926EJS | |
e009bfa4 | 309 | bool |
067716ba | 310 | select SYS_CACHE_SHIFT_5 |
7240b80e | 311 | imply SYS_ARM_MMU |
1dd56db5 | 312 | imply SPL_SEPARATE_BSS |
2e07c249 GS |
313 | |
314 | config CPU_ARM946ES | |
e009bfa4 | 315 | bool |
067716ba | 316 | select SYS_CACHE_SHIFT_5 |
7240b80e | 317 | imply SYS_ARM_MMU |
2e07c249 GS |
318 | |
319 | config CPU_ARM1136 | |
e009bfa4 | 320 | bool |
067716ba | 321 | select SYS_CACHE_SHIFT_5 |
7240b80e | 322 | imply SYS_ARM_MMU |
1dd56db5 | 323 | imply SPL_SEPARATE_BSS |
2e07c249 GS |
324 | |
325 | config CPU_ARM1176 | |
e009bfa4 TR |
326 | bool |
327 | select HAS_VBAR | |
067716ba | 328 | select SYS_CACHE_SHIFT_5 |
7240b80e | 329 | imply SYS_ARM_MMU |
2e07c249 | 330 | |
acf15001 | 331 | config CPU_V7A |
e009bfa4 | 332 | bool |
e009bfa4 | 333 | select HAS_THUMB2 |
5ed063d1 | 334 | select HAS_VBAR |
067716ba | 335 | select SYS_CACHE_SHIFT_6 |
7240b80e | 336 | imply SYS_ARM_MMU |
2e07c249 | 337 | |
12d8a729 | 338 | config CPU_V7M |
339 | bool | |
e009bfa4 | 340 | select HAS_THUMB2 |
f2ef2043 | 341 | select SYS_ARM_MPU |
5ed063d1 | 342 | select SYS_CACHE_SHIFT_5 |
ea37f0b3 | 343 | select SYS_THUMB_BUILD |
5ed063d1 | 344 | select THUMB2_KERNEL |
12d8a729 | 345 | |
4bbd6b1d MS |
346 | config CPU_V7R |
347 | bool | |
348 | select HAS_THUMB2 | |
f2ef2043 | 349 | select SYS_ARM_CACHE_CP15 |
5ed063d1 MS |
350 | select SYS_ARM_MPU |
351 | select SYS_CACHE_SHIFT_6 | |
4bbd6b1d | 352 | |
2e07c249 | 353 | config SYS_CPU |
e009bfa4 TR |
354 | default "arm720t" if CPU_ARM720T |
355 | default "arm920t" if CPU_ARM920T | |
356 | default "arm926ejs" if CPU_ARM926EJS | |
357 | default "arm946es" if CPU_ARM946ES | |
358 | default "arm1136" if CPU_ARM1136 | |
359 | default "arm1176" if CPU_ARM1176 | |
acf15001 | 360 | default "armv7" if CPU_V7A |
4bbd6b1d | 361 | default "armv7" if CPU_V7R |
e009bfa4 | 362 | default "armv7m" if CPU_V7M |
01541eec | 363 | default "armv8" if ARM64 |
2e07c249 | 364 | |
66020a67 MV |
365 | config SYS_ARM_ARCH |
366 | int | |
367 | default 4 if CPU_ARM720T | |
368 | default 4 if CPU_ARM920T | |
369 | default 5 if CPU_ARM926EJS | |
370 | default 5 if CPU_ARM946ES | |
371 | default 6 if CPU_ARM1136 | |
372 | default 6 if CPU_ARM1176 | |
acf15001 | 373 | default 7 if CPU_V7A |
66020a67 | 374 | default 7 if CPU_V7M |
4bbd6b1d | 375 | default 7 if CPU_V7R |
66020a67 MV |
376 | default 8 if ARM64 |
377 | ||
f8dc7f2f PD |
378 | choice |
379 | prompt "Select the ARM data write cache policy" | |
1f2e4027 | 380 | default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1 |
f8dc7f2f PD |
381 | default SYS_ARM_CACHE_WRITEBACK |
382 | ||
383 | config SYS_ARM_CACHE_WRITEBACK | |
384 | bool "Write-back (WB)" | |
385 | help | |
386 | A write updates the cache only and marks the cache line as dirty. | |
387 | External memory is updated only when the line is evicted or explicitly | |
388 | cleaned. | |
389 | ||
390 | config SYS_ARM_CACHE_WRITETHROUGH | |
391 | bool "Write-through (WT)" | |
392 | help | |
393 | A write updates both the cache and the external memory system. | |
394 | This does not mark the cache line as dirty. | |
395 | ||
396 | config SYS_ARM_CACHE_WRITEALLOC | |
397 | bool "Write allocation (WA)" | |
398 | help | |
399 | A cache line is allocated on a write miss. This means that executing a | |
400 | store instruction on the processor might cause a burst read to occur. | |
401 | There is a linefill to obtain the data for the cache line, before the | |
402 | write is performed. | |
403 | endchoice | |
404 | ||
948da777 T |
405 | config ARCH_VERY_EARLY_INIT |
406 | bool | |
407 | ||
408 | config SPL_ARCH_VERY_EARLY_INIT | |
409 | bool | |
410 | ||
1bf33015 AF |
411 | config ARCH_CPU_INIT |
412 | bool "Enable ARCH_CPU_INIT" | |
413 | help | |
e852b30b | 414 | Some architectures require a call to arch_cpu_init(). |
1bf33015 AF |
415 | Say Y here to enable it |
416 | ||
7842b6a9 AP |
417 | config SYS_ARCH_TIMER |
418 | bool "ARM Generic Timer support" | |
acf15001 | 419 | depends on CPU_V7A || ARM64 |
7842b6a9 AP |
420 | default y if ARM64 |
421 | help | |
422 | The ARM Generic Timer (aka arch-timer) provides an architected | |
423 | interface to a timer source on an SoC. | |
e852b30b | 424 | It is mandatory for ARMv8 implementation and widely available |
7842b6a9 AP |
425 | on ARMv7 systems. |
426 | ||
c54bcf68 MY |
427 | config ARM_SMCCC |
428 | bool "Support for ARM SMC Calling Convention (SMCCC)" | |
acf15001 | 429 | depends on CPU_V7A || ARM64 |
573a3811 | 430 | select ARM_PSCI_FW |
c54bcf68 MY |
431 | help |
432 | Say Y here if you want to enable ARM SMC Calling Convention. | |
433 | This should be enabled if U-Boot needs to communicate with system | |
434 | firmware (for example, PSCI) according to SMCCC. | |
435 | ||
3a649407 TR |
436 | config SYS_THUMB_BUILD |
437 | bool "Build U-Boot using the Thumb instruction set" | |
438 | depends on !ARM64 | |
439 | help | |
440 | Use this flag to build U-Boot using the Thumb instruction set for | |
441 | ARM architectures. Thumb instruction set provides better code | |
442 | density. For ARM architectures that support Thumb2 this flag will | |
443 | result in Thumb2 code generated by GCC. | |
444 | ||
445 | config SPL_SYS_THUMB_BUILD | |
446 | bool "Build SPL using the Thumb instruction set" | |
447 | default y if SYS_THUMB_BUILD | |
05705566 | 448 | depends on !ARM64 && SPL |
3a649407 TR |
449 | help |
450 | Use this flag to build SPL using the Thumb instruction set for | |
451 | ARM architectures. Thumb instruction set provides better code | |
452 | density. For ARM architectures that support Thumb2 this flag will | |
453 | result in Thumb2 code generated by GCC. | |
454 | ||
1e32c519 KY |
455 | config TPL_SYS_THUMB_BUILD |
456 | bool "Build TPL using the Thumb instruction set" | |
457 | default y if SYS_THUMB_BUILD | |
458 | depends on TPL && !ARM64 | |
459 | help | |
e852b30b | 460 | Use this flag to build TPL using the Thumb instruction set for |
1e32c519 KY |
461 | ARM architectures. Thumb instruction set provides better code |
462 | density. For ARM architectures that support Thumb2 this flag will | |
463 | result in Thumb2 code generated by GCC. | |
464 | ||
11168883 PO |
465 | config SYS_L2_PL310 |
466 | bool "ARM PL310 L2 cache controller" | |
467 | help | |
468 | Enable support for ARM PL310 L2 cache controller in U-Boot | |
1e32c519 | 469 | |
b6664eac PO |
470 | config SPL_SYS_L2_PL310 |
471 | bool "ARM PL310 L2 cache controller in SPL" | |
472 | help | |
473 | Enable support for ARM PL310 L2 cache controller in SPL | |
474 | ||
f3e9bec8 PF |
475 | config SYS_L2CACHE_OFF |
476 | bool "L2cache off" | |
477 | help | |
e852b30b | 478 | If SoC does not support L2CACHE or one does not want to enable |
f3e9bec8 PF |
479 | L2CACHE, choose this option. |
480 | ||
cdaa633f AP |
481 | config ENABLE_ARM_SOC_BOOT0_HOOK |
482 | bool "prepare BOOT0 header" | |
483 | help | |
484 | If the SoC's BOOT0 requires a header area filled with (magic) | |
7d531e8a SG |
485 | values, then choose this option, and create a file included as |
486 | <asm/arch/boot0.h> which contains the required assembler code. | |
cdaa633f | 487 | |
be72591b FE |
488 | config USE_ARCH_MEMCPY |
489 | bool "Use an assembly optimized implementation of memcpy" | |
4e062fc9 SR |
490 | default y if !ARM64 |
491 | depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) | |
40d5534c TR |
492 | help |
493 | Enable the generation of an optimized version of memcpy. | |
e852b30b | 494 | Such an implementation may be faster under some conditions |
40d5534c TR |
495 | but may increase the binary size. |
496 | ||
497 | config SPL_USE_ARCH_MEMCPY | |
f8136e68 | 498 | bool "Use an assembly optimized implementation of memcpy for SPL" |
40d5534c | 499 | default y if USE_ARCH_MEMCPY |
4e062fc9 | 500 | depends on SPL |
be72591b FE |
501 | help |
502 | Enable the generation of an optimized version of memcpy. | |
e852b30b | 503 | Such an implementation may be faster under some conditions |
be72591b FE |
504 | but may increase the binary size. |
505 | ||
1e32c519 KY |
506 | config TPL_USE_ARCH_MEMCPY |
507 | bool "Use an assembly optimized implementation of memcpy for TPL" | |
508 | default y if USE_ARCH_MEMCPY | |
4e062fc9 | 509 | depends on TPL |
1e32c519 KY |
510 | help |
511 | Enable the generation of an optimized version of memcpy. | |
e852b30b | 512 | Such an implementation may be faster under some conditions |
1e32c519 KY |
513 | but may increase the binary size. |
514 | ||
4e062fc9 SR |
515 | config USE_ARCH_MEMMOVE |
516 | bool "Use an assembly optimized implementation of memmove" if !ARM64 | |
517 | default USE_ARCH_MEMCPY if ARM64 | |
518 | depends on ARM64 | |
519 | help | |
520 | Enable the generation of an optimized version of memmove. | |
521 | Such an implementation may be faster under some conditions | |
522 | but may increase the binary size. | |
523 | ||
524 | config SPL_USE_ARCH_MEMMOVE | |
525 | bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64 | |
526 | default SPL_USE_ARCH_MEMCPY if ARM64 | |
527 | depends on SPL && ARM64 | |
528 | help | |
529 | Enable the generation of an optimized version of memmove. | |
530 | Such an implementation may be faster under some conditions | |
531 | but may increase the binary size. | |
532 | ||
533 | config TPL_USE_ARCH_MEMMOVE | |
534 | bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64 | |
535 | default TPL_USE_ARCH_MEMCPY if ARM64 | |
536 | depends on TPL && ARM64 | |
537 | help | |
538 | Enable the generation of an optimized version of memmove. | |
539 | Such an implementation may be faster under some conditions | |
540 | but may increase the binary size. | |
541 | ||
be72591b FE |
542 | config USE_ARCH_MEMSET |
543 | bool "Use an assembly optimized implementation of memset" | |
4e062fc9 SR |
544 | default y if !ARM64 |
545 | depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) | |
40d5534c TR |
546 | help |
547 | Enable the generation of an optimized version of memset. | |
e852b30b | 548 | Such an implementation may be faster under some conditions |
40d5534c TR |
549 | but may increase the binary size. |
550 | ||
551 | config SPL_USE_ARCH_MEMSET | |
f8136e68 | 552 | bool "Use an assembly optimized implementation of memset for SPL" |
40d5534c | 553 | default y if USE_ARCH_MEMSET |
4e062fc9 | 554 | depends on SPL |
be72591b FE |
555 | help |
556 | Enable the generation of an optimized version of memset. | |
e852b30b | 557 | Such an implementation may be faster under some conditions |
be72591b FE |
558 | but may increase the binary size. |
559 | ||
1e32c519 KY |
560 | config TPL_USE_ARCH_MEMSET |
561 | bool "Use an assembly optimized implementation of memset for TPL" | |
562 | default y if USE_ARCH_MEMSET | |
4e062fc9 | 563 | depends on TPL |
1e32c519 KY |
564 | help |
565 | Enable the generation of an optimized version of memset. | |
e852b30b | 566 | Such an implementation may be faster under some conditions |
1e32c519 KY |
567 | but may increase the binary size. |
568 | ||
ec6617c3 AW |
569 | config ARM64_SUPPORT_AARCH32 |
570 | bool "ARM64 system support AArch32 execution state" | |
05705566 AF |
571 | depends on ARM64 |
572 | default y if !TARGET_THUNDERX_88XX | |
ec6617c3 AW |
573 | help |
574 | This ARM64 system supports AArch32 execution state. | |
575 | ||
e95bcfb5 TR |
576 | config IPROC |
577 | bool | |
578 | ||
24ec3dea TR |
579 | config S5P |
580 | def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX | |
581 | ||
dd84058d MY |
582 | choice |
583 | prompt "Target select" | |
b928e658 | 584 | default TARGET_HIKEY |
dd84058d | 585 | |
4614b891 MY |
586 | config ARCH_AT91 |
587 | bool "Atmel AT91" | |
7a672057 | 588 | select GPIO_EXTRA_HEADER |
f58e9460 | 589 | select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB |
c7c120c2 | 590 | select SPL_SEPARATE_BSS if SPL |
a9a73799 | 591 | imply SYS_THUMB_BUILD |
dd84058d | 592 | |
3491ba63 MY |
593 | config ARCH_DAVINCI |
594 | bool "TI DaVinci" | |
2e07c249 | 595 | select CPU_ARM926EJS |
7a672057 | 596 | select GPIO_EXTRA_HEADER |
56c40460 | 597 | select SPL_DM_SPI if SPL |
15dc63d6 | 598 | imply CMD_SAVES |
3491ba63 MY |
599 | help |
600 | Support for TI's DaVinci platform. | |
dd84058d | 601 | |
e90711f0 YX |
602 | config ARCH_HISTB |
603 | bool "Hisilicon HiSTB SoCs" | |
604 | select DM | |
605 | select DM_SERIAL | |
606 | select OF_CONTROL | |
607 | select PL01X_SERIAL | |
608 | imply CMD_DM | |
609 | help | |
610 | Support for HiSTB SoCs. | |
611 | ||
bb0fb4c0 | 612 | config ARCH_KIRKWOOD |
47539e23 | 613 | bool "Marvell Kirkwood" |
4585601a | 614 | select ARCH_MISC_INIT |
5ed063d1 MS |
615 | select BOARD_EARLY_INIT_F |
616 | select CPU_ARM926EJS | |
7a672057 | 617 | select GPIO_EXTRA_HEADER |
7b530bb1 | 618 | select TIMER |
dd84058d | 619 | |
c3d89140 | 620 | config ARCH_MVEBU |
21b29fc6 | 621 | bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" |
efb0aa7b | 622 | select ARCH_EARLY_INIT_R if ARM64 |
9cffb233 | 623 | select DM |
1d51ea19 | 624 | select DM_SERIAL |
09a54c00 SR |
625 | select DM_SPI |
626 | select DM_SPI_FLASH | |
7a672057 | 627 | select GPIO_EXTRA_HEADER |
db04ff42 | 628 | select MTD |
56c40460 LM |
629 | select SPL_DM_SPI if SPL |
630 | select SPL_DM_SPI_FLASH if SPL | |
7b530bb1 | 631 | select SPL_TIMER if SPL |
3988e6d6 | 632 | select TIMER if !ARM64 |
5ed063d1 MS |
633 | select OF_CONTROL |
634 | select OF_SEPARATE | |
f1b1f770 | 635 | select SPI |
08a00cba | 636 | imply CMD_DM |
a4884831 | 637 | |
b16a3316 | 638 | config ARCH_ORION5X |
22f2be7a | 639 | bool "Marvell Orion" |
2e07c249 | 640 | select CPU_ARM926EJS |
7a672057 | 641 | select GPIO_EXTRA_HEADER |
1dd56db5 | 642 | select SPL_SEPARATE_BSS if SPL |
7b530bb1 | 643 | select TIMER |
dd84058d | 644 | |
ddf6bd48 MY |
645 | config ARCH_BCM283X |
646 | bool "Broadcom BCM283X family" | |
58d423b8 | 647 | select DM |
58d423b8 | 648 | select DM_GPIO |
5ed063d1 | 649 | select DM_SERIAL |
7a672057 | 650 | select GPIO_EXTRA_HEADER |
76709096 | 651 | select OF_CONTROL |
cf2c7784 | 652 | select PL01X_SERIAL |
ae5326a6 | 653 | select SERIAL_SEARCH_ALL |
08a00cba | 654 | imply CMD_DM |
91d27a17 | 655 | imply FAT_WRITE |
713c9d3f | 656 | imply OF_HAS_PRIOR_STAGE |
46414296 | 657 | |
894c3ad2 TF |
658 | config ARCH_BCMSTB |
659 | bool "Broadcom BCM7XXX family" | |
660 | select CPU_V7A | |
661 | select DM | |
7a672057 | 662 | select GPIO_EXTRA_HEADER |
894c3ad2 | 663 | select OF_CONTROL |
08a00cba | 664 | imply CMD_DM |
239d22c7 | 665 | imply OF_HAS_PRIOR_STAGE |
894c3ad2 TF |
666 | help |
667 | This enables support for Broadcom ARM-based set-top box | |
668 | chipsets, including the 7445 family of chips. | |
669 | ||
f8209d30 WZ |
670 | config ARCH_BCMBCA |
671 | bool "Broadcom broadband chip family" | |
672 | select DM | |
673 | select OF_CONTROL | |
07f97bde | 674 | imply CMD_DM |
f8209d30 | 675 | |
15e30106 KA |
676 | config TARGET_VEXPRESS_CA9X4 |
677 | bool "Support vexpress_ca9x4" | |
678 | select CPU_V7A | |
798ad3e6 | 679 | select PL01X_SERIAL |
15e30106 | 680 | |
d3d9cd8e LW |
681 | config TARGET_BCMNS |
682 | bool "Support Broadcom Northstar" | |
683 | select CPU_V7A | |
684 | select DM | |
685 | select DM_GPIO | |
686 | select DM_SERIAL | |
687 | select OF_CONTROL | |
688 | select TIMER | |
689 | select SYS_NS16550 | |
690 | select ARM_GLOBAL_TIMER | |
691 | imply SYS_THUMB_BUILD | |
692 | imply MTD_RAW_NAND | |
693 | imply NAND_BRCMNAND | |
694 | imply NAND_BRCMNAND_IPROC | |
695 | help | |
696 | Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit | |
697 | ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094, | |
698 | BCM5301x etc. | |
699 | ||
291635ae RK |
700 | config TARGET_BCMNS3 |
701 | bool "Support Broadcom NS3" | |
702 | select ARM64 | |
703 | select BOARD_LATE_INIT | |
704 | help | |
705 | Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit | |
706 | ARMv8 Cortex-A72 processors targeting a broad range of networking | |
707 | applications. | |
708 | ||
72df68cc MY |
709 | config ARCH_EXYNOS |
710 | bool "Samsung EXYNOS" | |
58d423b8 | 711 | select DM |
5ed063d1 | 712 | select DM_GPIO |
fc47cf9d | 713 | select DM_I2C |
5ed063d1 | 714 | select DM_KEYBOARD |
58d423b8 MY |
715 | select DM_SERIAL |
716 | select DM_SPI | |
5ed063d1 | 717 | select DM_SPI_FLASH |
db04ff42 | 718 | select MTD |
f1b1f770 | 719 | select SPI |
7a672057 | 720 | select GPIO_EXTRA_HEADER |
c96d9036 | 721 | imply SYS_THUMB_BUILD |
08a00cba | 722 | imply CMD_DM |
91d27a17 | 723 | imply FAT_WRITE |
dd84058d | 724 | |
311757be SG |
725 | config ARCH_S5PC1XX |
726 | bool "Samsung S5PC1XX" | |
acf15001 | 727 | select CPU_V7A |
58d423b8 | 728 | select DM |
58d423b8 | 729 | select DM_GPIO |
08848e9c | 730 | select DM_I2C |
5ed063d1 | 731 | select DM_SERIAL |
7a672057 | 732 | select GPIO_EXTRA_HEADER |
08a00cba | 733 | imply CMD_DM |
311757be | 734 | |
ef2b694c MY |
735 | config ARCH_HIGHBANK |
736 | bool "Calxeda Highbank" | |
acf15001 | 737 | select CPU_V7A |
109552d7 AP |
738 | select PL01X_SERIAL |
739 | select DM | |
740 | select DM_SERIAL | |
741 | select OF_CONTROL | |
109552d7 AP |
742 | select CLK |
743 | select CLK_CCF | |
744 | select AHCI | |
1238d014 | 745 | select PHYS_64BIT |
44b7abf8 AP |
746 | select TIMER |
747 | select SP804_TIMER | |
239d22c7 | 748 | imply OF_HAS_PRIOR_STAGE |
dd84058d | 749 | |
5cbbd9bd MY |
750 | config ARCH_INTEGRATOR |
751 | bool "ARM Ltd. Integrator family" | |
3f394e70 LW |
752 | select DM |
753 | select DM_SERIAL | |
7a672057 | 754 | select GPIO_EXTRA_HEADER |
cf2c7784 | 755 | select PL01X_SERIAL |
08a00cba | 756 | imply CMD_DM |
5cbbd9bd | 757 | |
e479a7d5 RM |
758 | config ARCH_IPQ40XX |
759 | bool "Qualcomm IPQ40xx SoCs" | |
760 | select CPU_V7A | |
761 | select DM | |
762 | select DM_GPIO | |
763 | select DM_SERIAL | |
496a3aa5 | 764 | select DM_RESET |
7a672057 | 765 | select GPIO_EXTRA_HEADER |
e479a7d5 RM |
766 | select PINCTRL |
767 | select CLK | |
768 | select OF_CONTROL | |
fac2121a | 769 | select CLK_QCOM_IPQ4019 |
24d2908e | 770 | select PINCTRL_QCOM_IPQ4019 |
e479a7d5 RM |
771 | imply CMD_DM |
772 | ||
c338f09e MY |
773 | config ARCH_KEYSTONE |
774 | bool "TI Keystone" | |
a4650bf6 | 775 | select CMD_DDR3 |
5ed063d1 | 776 | select CMD_POWEROFF |
acf15001 | 777 | select CPU_V7A |
222d22a3 | 778 | select DDR_SPD |
a4650bf6 | 779 | select SPL_BOARD_INIT if SPL |
02627356 | 780 | select SUPPORT_SPL |
7842b6a9 | 781 | select SYS_ARCH_TIMER |
5ed063d1 | 782 | select SYS_THUMB_BUILD |
d56b4b19 | 783 | imply CMD_MTDPARTS |
f2ae98a6 | 784 | imply CMD_NFS |
15dc63d6 | 785 | imply CMD_SAVES |
a4650bf6 | 786 | imply DM_I2C |
5ed063d1 | 787 | imply FIT |
a4650bf6 AD |
788 | imply SOC_TI |
789 | imply TI_KEYSTONE_SERDES | |
dd84058d | 790 | |
586bde93 LV |
791 | config ARCH_K3 |
792 | bool "Texas Instruments' K3 Architecture" | |
793 | select SPL | |
794 | select SUPPORT_SPL | |
795 | select FIT | |
913cea38 | 796 | select REGEX |
86fab110 | 797 | select FIT_SIGNATURE if ARM64 |
1a1d48e3 | 798 | imply TI_SECURE_DEVICE |
586bde93 | 799 | |
a93fbf4a MY |
800 | config ARCH_OMAP2PLUS |
801 | bool "TI OMAP2+" | |
acf15001 | 802 | select CPU_V7A |
7a672057 | 803 | select GPIO_EXTRA_HEADER |
0680f1b1 | 804 | select SPL_BOARD_INIT if SPL |
ff6c3125 | 805 | select SPL_STACK_R if SPL |
a93fbf4a | 806 | select SUPPORT_SPL |
92cc4e1c | 807 | imply TI_SYSC if DM && OF_CONTROL |
a93fbf4a | 808 | imply FIT |
1dd56db5 | 809 | imply SPL_SEPARATE_BSS |
a93fbf4a | 810 | |
bfcef28a BG |
811 | config ARCH_MESON |
812 | bool "Amlogic Meson" | |
7a672057 | 813 | select GPIO_EXTRA_HEADER |
7325f6cf | 814 | imply DISTRO_DEFAULTS |
6da749d8 | 815 | imply DM_RNG |
bfcef28a BG |
816 | help |
817 | Support for the Meson SoC family developed by Amlogic Inc., | |
818 | targeted at media players and tablet computers. We currently | |
819 | support the S905 (GXBaby) 64-bit SoC. | |
820 | ||
cbd2fba1 RL |
821 | config ARCH_MEDIATEK |
822 | bool "MediaTek SoCs" | |
cbd2fba1 | 823 | select DM |
7a672057 | 824 | select GPIO_EXTRA_HEADER |
cbd2fba1 RL |
825 | select OF_CONTROL |
826 | select SPL_DM if SPL | |
827 | select SPL_LIBCOMMON_SUPPORT if SPL | |
828 | select SPL_LIBGENERIC_SUPPORT if SPL | |
829 | select SPL_OF_CONTROL if SPL | |
830 | select SUPPORT_SPL | |
831 | help | |
832 | Support for the MediaTek SoCs family developed by MediaTek Inc. | |
833 | Please refer to doc/README.mediatek for more information. | |
834 | ||
ee54dfea VZ |
835 | config ARCH_LPC32XX |
836 | bool "NXP LPC32xx platform" | |
837 | select CPU_ARM926EJS | |
838 | select DM | |
839 | select DM_GPIO | |
840 | select DM_SERIAL | |
7a672057 | 841 | select GPIO_EXTRA_HEADER |
ee54dfea VZ |
842 | select SPL_DM if SPL |
843 | select SUPPORT_SPL | |
844 | imply CMD_DM | |
845 | ||
b2b8b9be PF |
846 | config ARCH_IMX8 |
847 | bool "NXP i.MX8 platform" | |
848 | select ARM64 | |
cb5d0419 GJ |
849 | select SYS_FSL_HAS_SEC |
850 | select SYS_FSL_SEC_COMPAT_4 | |
851 | select SYS_FSL_SEC_LE | |
b2b8b9be | 852 | select DM |
448e2b63 | 853 | select DM_EVENT |
7a672057 | 854 | select GPIO_EXTRA_HEADER |
0c2729ed | 855 | select MACH_IMX |
b2b8b9be | 856 | select OF_CONTROL |
9a273858 | 857 | select ENABLE_ARM_SOC_BOOT0_HOOK |
b2b8b9be | 858 | |
cd357ad1 | 859 | config ARCH_IMX8M |
7a7391fd PF |
860 | bool "NXP i.MX8M platform" |
861 | select ARM64 | |
7a672057 | 862 | select GPIO_EXTRA_HEADER |
0c2729ed | 863 | select MACH_IMX |
2cddfcbc | 864 | select SYS_FSL_HAS_SEC |
940d36d5 AS |
865 | select SYS_FSL_SEC_COMPAT_4 |
866 | select SYS_FSL_SEC_LE | |
15e7b768 | 867 | select SYS_I2C_MXC |
7a7391fd | 868 | select DM |
448e2b63 | 869 | select DM_EVENT if CLK |
7a7391fd | 870 | select SUPPORT_SPL |
08a00cba | 871 | imply CMD_DM |
7a7391fd | 872 | |
19b990b4 PF |
873 | config ARCH_IMX8ULP |
874 | bool "NXP i.MX8ULP platform" | |
875 | select ARM64 | |
876 | select DM | |
448e2b63 | 877 | select DM_EVENT |
0c2729ed | 878 | select MACH_IMX |
19b990b4 PF |
879 | select OF_CONTROL |
880 | select SUPPORT_SPL | |
881 | select GPIO_EXTRA_HEADER | |
03fcf966 | 882 | select MISC |
d3ee9dbd | 883 | select IMX_ELE |
19b990b4 PF |
884 | imply CMD_DM |
885 | ||
881df6ed PF |
886 | config ARCH_IMX9 |
887 | bool "NXP i.MX9 platform" | |
888 | select ARM64 | |
889 | select DM | |
448e2b63 | 890 | select DM_EVENT |
881df6ed PF |
891 | select MACH_IMX |
892 | select SUPPORT_SPL | |
12f23227 | 893 | select GPIO_EXTRA_HEADER |
03fcf966 | 894 | select MISC |
d3ee9dbd | 895 | select IMX_ELE |
19b990b4 PF |
896 | imply CMD_DM |
897 | ||
77eb9a90 GB |
898 | config ARCH_IMXRT |
899 | bool "NXP i.MXRT platform" | |
900 | select CPU_V7M | |
901 | select DM | |
902 | select DM_SERIAL | |
7a672057 | 903 | select GPIO_EXTRA_HEADER |
0c2729ed | 904 | select MACH_IMX |
77eb9a90 GB |
905 | select SUPPORT_SPL |
906 | imply CMD_DM | |
907 | ||
c5343d4e SA |
908 | config ARCH_MX23 |
909 | bool "NXP i.MX23 family" | |
910 | select CPU_ARM926EJS | |
7a672057 | 911 | select GPIO_EXTRA_HEADER |
0c2729ed | 912 | select MACH_IMX |
c5343d4e SA |
913 | select SUPPORT_SPL |
914 | ||
25c5b4e1 SA |
915 | config ARCH_MX28 |
916 | bool "NXP i.MX28 family" | |
917 | select CPU_ARM926EJS | |
7a672057 | 918 | select GPIO_EXTRA_HEADER |
0c2729ed | 919 | select MACH_IMX |
25c5b4e1 SA |
920 | select SUPPORT_SPL |
921 | ||
3159ec64 ML |
922 | config ARCH_MX31 |
923 | bool "NXP i.MX31 family" | |
924 | select CPU_ARM1136 | |
7a672057 | 925 | select GPIO_EXTRA_HEADER |
0c2729ed | 926 | select MACH_IMX |
3159ec64 | 927 | |
e90a08da | 928 | config ARCH_MX7ULP |
6e7bdde4 | 929 | bool "NXP MX7ULP" |
6d21dd31 | 930 | select BOARD_POSTCLK_INIT |
acf15001 | 931 | select CPU_V7A |
7a672057 | 932 | select GPIO_EXTRA_HEADER |
0c2729ed | 933 | select MACH_IMX |
75d3a9f8 | 934 | select SYS_FSL_HAS_SEC |
b5438002 FL |
935 | select SYS_FSL_SEC_COMPAT_4 |
936 | select SYS_FSL_SEC_LE | |
e90a08da | 937 | select ROM_UNIFIED_SECTIONS |
8bbff6a7 | 938 | imply MXC_GPIO |
44ad4961 | 939 | imply SYS_THUMB_BUILD |
e90a08da | 940 | |
1a8150d4 AA |
941 | config ARCH_MX7 |
942 | bool "Freescale MX7" | |
5ed063d1 | 943 | select ARCH_MISC_INIT |
acf15001 | 944 | select CPU_V7A |
7a672057 | 945 | select GPIO_EXTRA_HEADER |
0c2729ed | 946 | select MACH_IMX |
9b0240f8 | 947 | select MXC_GPT_HCLK |
4f1375d4 | 948 | select SYS_FSL_HAS_SEC |
2c2e2c9e | 949 | select SYS_FSL_SEC_COMPAT_4 |
90b80386 | 950 | select SYS_FSL_SEC_LE |
72041603 | 951 | imply BOARD_EARLY_INIT_F |
8bbff6a7 | 952 | imply MXC_GPIO |
44ad4961 | 953 | imply SYS_THUMB_BUILD |
1a8150d4 | 954 | |
89ebc821 BB |
955 | config ARCH_MX6 |
956 | bool "Freescale MX6" | |
6d21dd31 | 957 | select BOARD_POSTCLK_INIT |
acf15001 | 958 | select CPU_V7A |
7a672057 | 959 | select GPIO_EXTRA_HEADER |
0c2729ed | 960 | select MACH_IMX |
9b0240f8 | 961 | select MXC_GPT_HCLK |
90865614 | 962 | select SYS_FSL_HAS_SEC |
2c2e2c9e | 963 | select SYS_FSL_SEC_COMPAT_4 |
90b80386 | 964 | select SYS_FSL_SEC_LE |
11168883 | 965 | select SYS_L2_PL310 if !SYS_L2CACHE_OFF |
8bbff6a7 | 966 | imply MXC_GPIO |
44ad4961 | 967 | imply SYS_THUMB_BUILD |
1dd56db5 | 968 | imply SPL_SEPARATE_BSS |
89ebc821 | 969 | |
424ee3d1 AR |
970 | config ARCH_MX5 |
971 | bool "Freescale MX5" | |
a5d67547 | 972 | select BOARD_EARLY_INIT_F |
5ed063d1 | 973 | select CPU_V7A |
7a672057 | 974 | select GPIO_EXTRA_HEADER |
0c2729ed | 975 | select MACH_IMX |
8bbff6a7 | 976 | imply MXC_GPIO |
424ee3d1 | 977 | |
95e9a8e2 SB |
978 | config ARCH_NEXELL |
979 | bool "Nexell S5P4418/S5P6818 SoC" | |
980 | select ENABLE_ARM_SOC_BOOT0_HOOK | |
981 | select DM | |
7a672057 | 982 | select GPIO_EXTRA_HEADER |
95e9a8e2 | 983 | |
84335544 JL |
984 | config ARCH_NPCM |
985 | bool "Support Nuvoton SoCs" | |
986 | select DM | |
987 | select OF_CONTROL | |
988 | imply CMD_DM | |
989 | ||
003b657e MK |
990 | config ARCH_APPLE |
991 | bool "Apple SoCs" | |
992 | select ARM64 | |
d520e1fb | 993 | select CLK |
bdebb00d | 994 | select CMD_PCI |
003b657e MK |
995 | select CMD_USB |
996 | select DM | |
b814e000 | 997 | select DM_GPIO |
003b657e | 998 | select DM_KEYBOARD |
456305ec | 999 | select DM_MAILBOX |
81fafbbe | 1000 | select DM_RESET |
003b657e | 1001 | select DM_SERIAL |
7184e299 | 1002 | select DM_SPI |
003b657e | 1003 | select DM_USB |
b86986c7 | 1004 | select VIDEO |
785cfde5 | 1005 | select IOMMU |
003b657e | 1006 | select LINUX_KERNEL_IMAGE_HEADER |
db04ff42 | 1007 | select MTD |
a609353e | 1008 | select OF_BOARD_SETUP |
003b657e | 1009 | select OF_CONTROL |
bdebb00d | 1010 | select PCI |
b99c6357 | 1011 | select PHY |
b814e000 | 1012 | select PINCTRL |
003b657e | 1013 | select POSITION_INDEPENDENT |
97187d5e MK |
1014 | select POWER_DOMAIN |
1015 | select REGMAP | |
7184e299 | 1016 | select SPI |
97187d5e | 1017 | select SYSCON |
9a8e3736 MK |
1018 | select SYSRESET |
1019 | select SYSRESET_WATCHDOG | |
1020 | select SYSRESET_WATCHDOG_AUTO | |
003b657e MK |
1021 | select USB |
1022 | imply CMD_DM | |
1023 | imply CMD_GPT | |
f1972dd7 | 1024 | imply BOOTSTD_FULL |
239d22c7 | 1025 | imply OF_HAS_PRIOR_STAGE |
003b657e | 1026 | |
97775d26 MS |
1027 | config ARCH_OWL |
1028 | bool "Actions Semi OWL SoCs" | |
97775d26 MS |
1029 | select DM |
1030 | select DM_SERIAL | |
7a672057 | 1031 | select GPIO_EXTRA_HEADER |
b1a6bb3b | 1032 | select OWL_SERIAL |
8b520ac1 AST |
1033 | select CLK |
1034 | select CLK_OWL | |
97775d26 | 1035 | select OF_CONTROL |
36c2f020 | 1036 | select SYS_RELOC_GD_ENV_ADDR |
08a00cba | 1037 | imply CMD_DM |
97775d26 | 1038 | |
32f11829 TT |
1039 | config ARCH_QEMU |
1040 | bool "QEMU Virtual Platform" | |
32f11829 TT |
1041 | select DM |
1042 | select DM_SERIAL | |
1043 | select OF_CONTROL | |
cf2c7784 | 1044 | select PL01X_SERIAL |
08a00cba | 1045 | imply CMD_DM |
684710dc | 1046 | imply DM_RNG |
a47c1b5b AT |
1047 | imply DM_RTC |
1048 | imply RTC_PL031 | |
239d22c7 | 1049 | imply OF_HAS_PRIOR_STAGE |
4d6641d5 ANY |
1050 | imply VIDEO |
1051 | imply VIDEO_BOCHS | |
1052 | imply SYS_WHITE_ON_BLACK | |
1053 | imply SYS_CONSOLE_IS_IN_ENV | |
120f540a | 1054 | imply PRE_CONSOLE_BUFFER |
05e2fa79 ANY |
1055 | imply USB |
1056 | imply USB_XHCI_HCD | |
1057 | imply USB_XHCI_PCI | |
1058 | imply USB_KEYBOARD | |
1059 | imply CMD_USB | |
32f11829 | 1060 | |
f9aabd45 | 1061 | config ARCH_RENESAS |
f40b9898 | 1062 | bool "Renesas ARM SoCs" |
1cc95f6e NI |
1063 | select DM |
1064 | select DM_SERIAL | |
7a672057 | 1065 | select GPIO_EXTRA_HEADER |
87f9ffbe | 1066 | select LTO |
5157b011 | 1067 | imply BOARD_EARLY_INIT_F |
08a00cba | 1068 | imply CMD_DM |
91d27a17 | 1069 | imply FAT_WRITE |
aad511a4 | 1070 | imply OF_UPSTREAM |
3a649407 | 1071 | imply SYS_THUMB_BUILD |
00e4b57e | 1072 | imply ARCH_MISC_INIT if DISPLAY_CPUINFO |
dd84058d | 1073 | |
08592136 MK |
1074 | config ARCH_SNAPDRAGON |
1075 | bool "Qualcomm Snapdragon SoCs" | |
1076 | select ARM64 | |
1077 | select DM | |
1078 | select DM_GPIO | |
1079 | select DM_SERIAL | |
3ead6616 | 1080 | select DM_RESET |
b563e766 | 1081 | select POWER_DOMAIN |
7a672057 | 1082 | select GPIO_EXTRA_HEADER |
5ed063d1 | 1083 | select MSM_SMEM |
08592136 MK |
1084 | select OF_CONTROL |
1085 | select OF_SEPARATE | |
654dd4a8 | 1086 | select SMEM |
5ed063d1 | 1087 | select SPMI |
a2364d97 | 1088 | select BOARD_LATE_INIT |
059d526a CC |
1089 | select OF_BOARD |
1090 | select SAVE_PREV_BL_FDT_ADDR | |
544033cf | 1091 | select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK |
a149974d | 1092 | imply OF_UPSTREAM |
08a00cba | 1093 | imply CMD_DM |
08592136 | 1094 | |
7865f4b0 MY |
1095 | config ARCH_SOCFPGA |
1096 | bool "Altera SOCFPGA family" | |
48befc00 | 1097 | select ARCH_EARLY_INIT_R |
d6a61da4 | 1098 | select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 |
9a5bbdfd | 1099 | select ARM64 if TARGET_SOCFPGA_SOC64 |
a684729a | 1100 | select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 |
1d9aa3e5 | 1101 | select DM |
73172753 | 1102 | select DM_SERIAL |
5afdcca0 | 1103 | select GICV2 |
7a672057 | 1104 | select GPIO_EXTRA_HEADER |
a684729a | 1105 | select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 |
48befc00 | 1106 | select OF_CONTROL |
00057eea | 1107 | select SPL_DM_RESET if DM_RESET |
5ed063d1 | 1108 | select SPL_DM_SERIAL |
48befc00 | 1109 | select SPL_LIBCOMMON_SUPPORT |
48befc00 | 1110 | select SPL_LIBGENERIC_SUPPORT |
48befc00 | 1111 | select SPL_OF_CONTROL |
9a5bbdfd | 1112 | select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 |
3f190c55 WYL |
1113 | select SPL_DRIVERS_MISC if TARGET_SOCFPGA_SOC64 |
1114 | select SPL_SOCFPGA_DT_REG if TARGET_SOCFPGA_SOC64 | |
2a736066 | 1115 | select SPL_SERIAL |
ef72ba0b | 1116 | select SPL_SYSRESET |
078111b9 | 1117 | select SPL_WATCHDOG |
48befc00 | 1118 | select SUPPORT_SPL |
73172753 | 1119 | select SYS_NS16550 |
a684729a | 1120 | select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 |
ef72ba0b SG |
1121 | select SYSRESET |
1122 | select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 | |
386fca68 JLL |
1123 | select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \ |
1124 | TARGET_SOCFPGA_SOC64 | |
08a00cba | 1125 | imply CMD_DM |
d56b4b19 | 1126 | imply CMD_MTDPARTS |
221a949e | 1127 | imply CRC32_VERIFY |
fef4a545 SG |
1128 | imply DM_SPI |
1129 | imply DM_SPI_FLASH | |
91d27a17 | 1130 | imply FAT_WRITE |
db04ff42 | 1131 | imply MTD |
aef44283 SG |
1132 | imply SPL |
1133 | imply SPL_DM | |
56c40460 LM |
1134 | imply SPL_DM_SPI |
1135 | imply SPL_DM_SPI_FLASH | |
a9024dc1 | 1136 | imply SPL_LIBDISK_SUPPORT |
103c5f18 | 1137 | imply SPL_MMC |
fef4a545 | 1138 | imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION |
f48db4ed | 1139 | imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE |
a9024dc1 | 1140 | imply SPL_SPI_FLASH_SUPPORT |
ea2ca7e1 | 1141 | imply SPL_SPI |
aaa64803 | 1142 | imply L2X0_CACHE |
dd84058d | 1143 | |
2c7e3b90 IC |
1144 | config ARCH_SUNXI |
1145 | bool "Support sunxi (Allwinner) SoCs" | |
d6a0c78a | 1146 | select BINMAN |
88bb800d | 1147 | select CMD_GPIO |
0878a8a7 | 1148 | select CMD_MMC if MMC |
be5c0608 | 1149 | select CMD_USB if DISTRO_DEFAULTS && USB_HOST |
e236ff0a | 1150 | select CLK |
b6006baf | 1151 | select DM |
211d57a4 | 1152 | select DM_GPIO |
f9437b00 | 1153 | select DM_I2C if I2C |
81a46c15 | 1154 | select DM_SPI if SPI |
db04ff42 | 1155 | select DM_SPI_FLASH if SPI && MTD |
211d57a4 | 1156 | select DM_KEYBOARD |
bb3362b0 | 1157 | select DM_MMC if MMC |
45368827 | 1158 | select DM_SERIAL |
d75111a7 | 1159 | select OF_BOARD_SETUP |
b6006baf HG |
1160 | select OF_CONTROL |
1161 | select OF_SEPARATE | |
b799eabc | 1162 | select PINCTRL |
6f6b7cfa | 1163 | select SPECIFY_CONSOLE_INDEX |
a3010bcf | 1164 | select SPL_SEPARATE_BSS if SPL |
ab43de80 TR |
1165 | select SPL_STACK_R if SPL |
1166 | select SPL_SYS_MALLOC_SIMPLE if SPL | |
5375fb1d | 1167 | select SPL_SYS_THUMB_BUILD if SPL && !ARM64 |
10cfbaab | 1168 | select SUNXI_GPIO |
5ed063d1 | 1169 | select SYS_NS16550 |
ce2e44d8 | 1170 | select SYS_THUMB_BUILD if !ARM64 |
2997ee50 | 1171 | select USB if DISTRO_DEFAULTS |
be5c0608 TR |
1172 | select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST |
1173 | select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST | |
5375fb1d | 1174 | select SPL_USE_TINY_PRINTF if SPL |
48313fe5 AP |
1175 | select USE_PREBOOT |
1176 | select SYS_RELOC_GD_ENV_ADDR | |
92600edb | 1177 | imply BOARD_LATE_INIT |
08a00cba | 1178 | imply CMD_DM |
a12fb0e3 | 1179 | imply CMD_GPT |
88718be3 | 1180 | imply CMD_UBI if MTD_RAW_NAND |
7325f6cf | 1181 | imply DISTRO_DEFAULTS |
ae79c1d0 AP |
1182 | imply DM_REGULATOR |
1183 | imply DM_REGULATOR_FIXED | |
91d27a17 | 1184 | imply FAT_WRITE |
2f13cf35 | 1185 | imply FIT |
eff264d7 | 1186 | imply OF_LIBFDT_OVERLAY |
af83a604 | 1187 | imply PRE_CONSOLE_BUFFER |
83061dbd | 1188 | imply SPL_GPIO |
af83a604 | 1189 | imply SPL_LIBCOMMON_SUPPORT |
af83a604 | 1190 | imply SPL_LIBGENERIC_SUPPORT |
103c5f18 | 1191 | imply SPL_MMC if MMC |
933b2f09 | 1192 | imply SPL_POWER |
2a736066 | 1193 | imply SPL_SERIAL |
40edc320 SH |
1194 | imply SYSRESET |
1195 | imply SYSRESET_WATCHDOG | |
1196 | imply SYSRESET_WATCHDOG_AUTO | |
654b02b1 | 1197 | imply USB_GADGET |
b147bd36 | 1198 | imply WDT |
8ebe4f42 | 1199 | |
689088f9 SG |
1200 | config ARCH_U8500 |
1201 | bool "ST-Ericsson U8500 Series" | |
1202 | select CPU_V7A | |
1203 | select DM | |
1204 | select DM_GPIO | |
1205 | select DM_MMC if MMC | |
1206 | select DM_SERIAL | |
9f78ccf1 | 1207 | select DM_USB_GADGET if DM_USB |
689088f9 SG |
1208 | select OF_CONTROL |
1209 | select SYSRESET | |
1210 | select TIMER | |
9f78ccf1 | 1211 | imply AB8500_USB_PHY |
689088f9 | 1212 | imply ARM_PL180_MMCI |
9f78ccf1 SG |
1213 | imply CLK |
1214 | imply DM_PMIC | |
689088f9 | 1215 | imply DM_RTC |
9f78ccf1 | 1216 | imply NOMADIK_GPIO |
689088f9 | 1217 | imply NOMADIK_MTU_TIMER |
9f78ccf1 | 1218 | imply PHY |
689088f9 | 1219 | imply PL01X_SERIAL |
9f78ccf1 | 1220 | imply PMIC_AB8500 |
689088f9 | 1221 | imply RTC_PL031 |
8956854d | 1222 | imply SYS_THUMB_BUILD |
689088f9 SG |
1223 | imply SYSRESET_SYSCON |
1224 | ||
ec48b6c9 MS |
1225 | config ARCH_VERSAL |
1226 | bool "Support Xilinx Versal Platform" | |
1227 | select ARM64 | |
1228 | select CLK | |
1229 | select DM | |
fa797157 | 1230 | select DM_MMC if MMC |
ec48b6c9 | 1231 | select DM_SERIAL |
5afdcca0 | 1232 | select GICV3 |
ec48b6c9 | 1233 | select OF_CONTROL |
42e20f52 | 1234 | select SOC_DEVICE |
bfd092f9 | 1235 | imply BOARD_LATE_INIT |
62b96262 | 1236 | imply ENV_VARS_UBOOT_RUNTIME_CONFIG |
ec48b6c9 | 1237 | |
f6aebdf6 | 1238 | config ARCH_VERSAL_NET |
6b067f4b | 1239 | bool "Support Xilinx Versal NET Platform" |
f6aebdf6 MS |
1240 | select ARM64 |
1241 | select CLK | |
1242 | select DM | |
f6aebdf6 MS |
1243 | select DM_MMC if MMC |
1244 | select DM_SERIAL | |
1245 | select OF_CONTROL | |
1246 | imply BOARD_LATE_INIT | |
1247 | imply ENV_VARS_UBOOT_RUNTIME_CONFIG | |
1248 | ||
7966b437 SA |
1249 | config ARCH_VF610 |
1250 | bool "Freescale Vybrid" | |
acf15001 | 1251 | select CPU_V7A |
7a672057 | 1252 | select GPIO_EXTRA_HEADER |
c136a861 | 1253 | select IOMUX_SHARE_CONF_REG |
0c2729ed | 1254 | select MACH_IMX |
c01e4a1a | 1255 | select SYS_FSL_ERRATUM_ESDHC111 |
d56b4b19 | 1256 | imply CMD_MTDPARTS |
88718be3 | 1257 | imply MTD_RAW_NAND |
e7b860fa | 1258 | |
5ca269a4 | 1259 | config ARCH_ZYNQ |
b8d4497f | 1260 | bool "Xilinx Zynq based platform" |
b7e0750d | 1261 | select ARM_TWD_TIMER |
d0bfa29c | 1262 | select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA) |
5ed063d1 MS |
1263 | select CLK |
1264 | select CLK_ZYNQ | |
acf15001 | 1265 | select CPU_V7A |
05f0f269 | 1266 | select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART |
8981f05c | 1267 | select DM |
c4a142f4 | 1268 | select DM_MMC if MMC |
42800ffa | 1269 | select DM_SERIAL |
5ed063d1 | 1270 | select DM_SPI |
9f7a4502 | 1271 | select DM_SPI_FLASH |
5ed063d1 | 1272 | select OF_CONTROL |
db04ff42 | 1273 | select MTD |
f1b1f770 | 1274 | select SPI |
5ed063d1 MS |
1275 | select SPL_BOARD_INIT if SPL |
1276 | select SPL_CLK if SPL | |
1277 | select SPL_DM if SPL | |
56c40460 LM |
1278 | select SPL_DM_SPI if SPL |
1279 | select SPL_DM_SPI_FLASH if SPL | |
5ed063d1 MS |
1280 | select SPL_OF_CONTROL if SPL |
1281 | select SPL_SEPARATE_BSS if SPL | |
b7e0750d | 1282 | select SPL_TIMER if SPL |
5ed063d1 | 1283 | select SUPPORT_SPL |
b7e0750d | 1284 | select TIMER |
8eb55e19 | 1285 | imply BOARD_LATE_INIT |
d315628e | 1286 | imply CMD_CLK |
08a00cba | 1287 | imply CMD_DM |
72c3033f | 1288 | imply CMD_SPL |
62b96262 | 1289 | imply ENV_VARS_UBOOT_RUNTIME_CONFIG |
5ed063d1 | 1290 | imply FAT_WRITE |
dd84058d | 1291 | |
1d6c54ec MS |
1292 | config ARCH_ZYNQMP_R5 |
1293 | bool "Xilinx ZynqMP R5 based platform" | |
5ed063d1 | 1294 | select CLK |
1d6c54ec | 1295 | select CPU_V7R |
1d6c54ec | 1296 | select DM |
6f96fb50 | 1297 | select DM_MMC if MMC |
1d6c54ec | 1298 | select DM_SERIAL |
5ed063d1 | 1299 | select OF_CONTROL |
08a00cba | 1300 | imply CMD_DM |
687ab545 | 1301 | imply DM_USB_GADGET |
1d6c54ec | 1302 | |
0b54a9dd | 1303 | config ARCH_ZYNQMP |
b8d4497f | 1304 | bool "Xilinx ZynqMP based platform" |
84c7204b | 1305 | select ARM64 |
5ed063d1 | 1306 | select CLK |
c2490bf5 | 1307 | select DM |
11381fba | 1308 | select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART |
92e69005 | 1309 | imply DM_MAILBOX |
fb693108 | 1310 | select DM_MMC if MMC |
c2490bf5 | 1311 | select DM_SERIAL |
db04ff42 | 1312 | select MTD |
088f83ee MS |
1313 | select DM_SPI if SPI |
1314 | select DM_SPI_FLASH if DM_SPI | |
71efd45a | 1315 | imply FIRMWARE |
5afdcca0 | 1316 | select GICV2 |
5ed063d1 | 1317 | select OF_CONTROL |
0680f1b1 | 1318 | select SPL_BOARD_INIT if SPL |
2f03968e | 1319 | select SPL_CLK if SPL |
6cb402f3 MS |
1320 | select SPL_DM if SPL |
1321 | select SPL_DM_SPI if SPI && SPL_DM | |
56c40460 | 1322 | select SPL_DM_SPI_FLASH if SPL_DM_SPI |
325a22dc | 1323 | select SPL_DM_MAILBOX if SPL |
71efd45a | 1324 | imply SPL_FIRMWARE if SPL |
425b8515 MS |
1325 | imply SPL_FS_FAT if SPL |
1326 | imply SPL_LIBCOMMON_SUPPORT if SPL | |
1327 | imply SPL_LIBDISK_SUPPORT if SPL | |
1328 | imply SPL_LIBGENERIC_SUPPORT if SPL | |
1329 | imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ | |
1330 | imply SPL_SERIAL if SPL | |
1331 | imply SPL_SPI if SPL && ZYNQ_QSPI | |
1332 | imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI | |
850e7795 | 1333 | select SPL_SEPARATE_BSS if SPL |
5ed063d1 | 1334 | select SUPPORT_SPL |
92e69005 | 1335 | imply ZYNQMP_IPI if DM_MAILBOX |
a890a53a | 1336 | select SOC_DEVICE |
8eb55e19 | 1337 | imply BOARD_LATE_INIT |
08a00cba | 1338 | imply CMD_DM |
62b96262 | 1339 | imply ENV_VARS_UBOOT_RUNTIME_CONFIG |
91d27a17 | 1340 | imply FAT_WRITE |
22270ca0 | 1341 | imply MP |
687ab545 | 1342 | imply DM_USB_GADGET |
3b441cf4 | 1343 | imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB |
84c7204b | 1344 | |
18138ab2 | 1345 | config ARCH_TEGRA |
ddd960e6 | 1346 | bool "NVIDIA Tegra" |
7a672057 | 1347 | select GPIO_EXTRA_HEADER |
2bd07c1f | 1348 | imply BOOTSTD_DEFAULTS |
91d27a17 | 1349 | imply FAT_WRITE |
412a4c6f | 1350 | imply SPL_TIMER if SPL |
dd84058d | 1351 | |
fac7fc43 AP |
1352 | config ARCH_VEXPRESS64 |
1353 | bool "Support ARMv8 Arm Ltd. VExpress based boards and models" | |
016a954e | 1354 | select ARM64 |
b3270e91 | 1355 | select DM |
b3270e91 | 1356 | select DM_SERIAL |
fac7fc43 | 1357 | select PL01X_SERIAL |
c0fce929 AP |
1358 | select OF_CONTROL |
1359 | select CLK | |
58650382 AP |
1360 | select BLK |
1361 | select MTD_NOR_FLASH if MTD | |
1362 | select FLASH_CFI_DRIVER if MTD | |
1363 | select ENV_IS_IN_FLASH if MTD | |
8a0a8ff5 | 1364 | imply DISTRO_DEFAULTS |
ffc10373 | 1365 | |
f98457d7 RMS |
1366 | config TARGET_CORSTONE1000 |
1367 | bool "Support Corstone1000 Platform" | |
1368 | select ARM64 | |
1369 | select PL01X_SERIAL | |
1370 | select DM | |
1371 | ||
565add12 UA |
1372 | config TARGET_TOTAL_COMPUTE |
1373 | bool "Support Total Compute Platform" | |
1374 | select ARM64 | |
1375 | select PL01X_SERIAL | |
1376 | select DM | |
1377 | select DM_SERIAL | |
1378 | select DM_MMC | |
1379 | select DM_GPIO | |
1380 | ||
44937214 PK |
1381 | config TARGET_LS2080A_EMU |
1382 | bool "Support ls2080a_emu" | |
fb2bf8c2 | 1383 | select ARCH_LS2080A |
016a954e | 1384 | select ARM64 |
23b5877c | 1385 | select ARMV8_MULTIENTRY |
32413125 | 1386 | select FSL_DDR_SYNC_REFRESH |
7a672057 | 1387 | select GPIO_EXTRA_HEADER |
44937214 | 1388 | help |
e852b30b RD |
1389 | Support for Freescale LS2080A_EMU platform. |
1390 | The LS2080A Development System (EMULATOR) is a pre-silicon | |
44937214 PK |
1391 | development platform that supports the QorIQ LS2080A |
1392 | Layerscape Architecture processor. | |
dd84058d | 1393 | |
7769776a AK |
1394 | config TARGET_LS1088AQDS |
1395 | bool "Support ls1088aqds" | |
1396 | select ARCH_LS1088A | |
1397 | select ARM64 | |
1398 | select ARMV8_MULTIENTRY | |
6324d506 | 1399 | select ARCH_SUPPORT_TFABOOT |
7769776a | 1400 | select BOARD_LATE_INIT |
7a672057 | 1401 | select GPIO_EXTRA_HEADER |
91fded62 | 1402 | select SUPPORT_SPL |
32413125 | 1403 | select FSL_DDR_INTERACTIVE if !SD_BOOT |
7769776a | 1404 | help |
e852b30b | 1405 | Support for NXP LS1088AQDS platform. |
7769776a AK |
1406 | The LS1088A Development System (QDS) is a high-performance |
1407 | development platform that supports the QorIQ LS1088A | |
1408 | Layerscape Architecture processor. | |
1409 | ||
44937214 PK |
1410 | config TARGET_LS2080AQDS |
1411 | bool "Support ls2080aqds" | |
fb2bf8c2 | 1412 | select ARCH_LS2080A |
7288c2c2 YS |
1413 | select ARM64 |
1414 | select ARMV8_MULTIENTRY | |
6324d506 | 1415 | select ARCH_SUPPORT_TFABOOT |
e5ec4815 | 1416 | select BOARD_LATE_INIT |
7a672057 | 1417 | select GPIO_EXTRA_HEADER |
b2d5ac59 | 1418 | select SUPPORT_SPL |
fedb428c | 1419 | imply SCSI |
9fd95ef0 | 1420 | imply SCSI_AHCI |
32413125 RB |
1421 | select FSL_DDR_BIST |
1422 | select FSL_DDR_INTERACTIVE if !SPL | |
7288c2c2 | 1423 | help |
e852b30b | 1424 | Support for Freescale LS2080AQDS platform. |
44937214 PK |
1425 | The LS2080A Development System (QDS) is a high-performance |
1426 | development platform that supports the QorIQ LS2080A | |
7288c2c2 YS |
1427 | Layerscape Architecture processor. |
1428 | ||
44937214 PK |
1429 | config TARGET_LS2080ARDB |
1430 | bool "Support ls2080ardb" | |
fb2bf8c2 | 1431 | select ARCH_LS2080A |
e2b65ea9 YS |
1432 | select ARM64 |
1433 | select ARMV8_MULTIENTRY | |
6324d506 | 1434 | select ARCH_SUPPORT_TFABOOT |
e5ec4815 | 1435 | select BOARD_LATE_INIT |
32eda7cc | 1436 | select SUPPORT_SPL |
32413125 RB |
1437 | select FSL_DDR_BIST |
1438 | select FSL_DDR_INTERACTIVE if !SPL | |
7a672057 | 1439 | select GPIO_EXTRA_HEADER |
fedb428c | 1440 | imply SCSI |
9fd95ef0 | 1441 | imply SCSI_AHCI |
e2b65ea9 | 1442 | help |
44937214 PK |
1443 | Support for Freescale LS2080ARDB platform. |
1444 | The LS2080A Reference design board (RDB) is a high-performance | |
1445 | development platform that supports the QorIQ LS2080A | |
e2b65ea9 YS |
1446 | Layerscape Architecture processor. |
1447 | ||
3049a583 PJ |
1448 | config TARGET_LS2081ARDB |
1449 | bool "Support ls2081ardb" | |
1450 | select ARCH_LS2080A | |
1451 | select ARM64 | |
1452 | select ARMV8_MULTIENTRY | |
1453 | select BOARD_LATE_INIT | |
7a672057 | 1454 | select GPIO_EXTRA_HEADER |
3049a583 | 1455 | select SUPPORT_SPL |
3049a583 PJ |
1456 | help |
1457 | Support for Freescale LS2081ARDB platform. | |
1458 | The LS2081A Reference design board (RDB) is a high-performance | |
1459 | development platform that supports the QorIQ LS2081A/LS2041A | |
1460 | Layerscape Architecture processor. | |
1461 | ||
58c3e620 PJ |
1462 | config TARGET_LX2160ARDB |
1463 | bool "Support lx2160ardb" | |
1464 | select ARCH_LX2160A | |
58c3e620 PJ |
1465 | select ARM64 |
1466 | select ARMV8_MULTIENTRY | |
6324d506 | 1467 | select ARCH_SUPPORT_TFABOOT |
58c3e620 | 1468 | select BOARD_LATE_INIT |
7a672057 | 1469 | select GPIO_EXTRA_HEADER |
58c3e620 PJ |
1470 | help |
1471 | Support for NXP LX2160ARDB platform. | |
1472 | The lx2160ardb (LX2160A Reference design board (RDB) | |
1473 | is a high-performance development platform that supports the | |
1474 | QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. | |
1475 | ||
1eba723c PB |
1476 | config TARGET_LX2160AQDS |
1477 | bool "Support lx2160aqds" | |
1478 | select ARCH_LX2160A | |
1eba723c PB |
1479 | select ARM64 |
1480 | select ARMV8_MULTIENTRY | |
6324d506 | 1481 | select ARCH_SUPPORT_TFABOOT |
1eba723c | 1482 | select BOARD_LATE_INIT |
7a672057 | 1483 | select GPIO_EXTRA_HEADER |
1eba723c PB |
1484 | help |
1485 | Support for NXP LX2160AQDS platform. | |
1486 | The lx2160aqds (LX2160A QorIQ Development System (QDS) | |
1487 | is a high-performance development platform that supports the | |
1488 | QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. | |
9ed303df MA |
1489 | |
1490 | config TARGET_LX2162AQDS | |
1491 | bool "Support lx2162aqds" | |
1492 | select ARCH_LX2162A | |
1493 | select ARCH_MISC_INIT | |
1494 | select ARM64 | |
1495 | select ARMV8_MULTIENTRY | |
1496 | select ARCH_SUPPORT_TFABOOT | |
1497 | select BOARD_LATE_INIT | |
7a672057 | 1498 | select GPIO_EXTRA_HEADER |
9ed303df MA |
1499 | help |
1500 | Support for NXP LX2162AQDS platform. | |
1501 | The lx2162aqds support is based on LX2160A Layerscape Architecture processor. | |
1eba723c | 1502 | |
11ac2363 PG |
1503 | config TARGET_HIKEY |
1504 | bool "Support HiKey 96boards Consumer Edition Platform" | |
1505 | select ARM64 | |
efd7b60a PG |
1506 | select DM |
1507 | select DM_GPIO | |
9c71bcdc | 1508 | select DM_SERIAL |
7a672057 | 1509 | select GPIO_EXTRA_HEADER |
cd593ed6 | 1510 | select OF_CONTROL |
cf2c7784 | 1511 | select PL01X_SERIAL |
6f6b7cfa | 1512 | select SPECIFY_CONSOLE_INDEX |
08a00cba | 1513 | imply CMD_DM |
11ac2363 PG |
1514 | help |
1515 | Support for HiKey 96boards platform. It features a HI6220 | |
1516 | SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. | |
1517 | ||
c62c7ef7 MS |
1518 | config TARGET_HIKEY960 |
1519 | bool "Support HiKey960 96boards Consumer Edition Platform" | |
1520 | select ARM64 | |
1521 | select DM | |
1522 | select DM_SERIAL | |
7a672057 | 1523 | select GPIO_EXTRA_HEADER |
c62c7ef7 MS |
1524 | select OF_CONTROL |
1525 | select PL01X_SERIAL | |
1526 | imply CMD_DM | |
1527 | help | |
1528 | Support for HiKey960 96boards platform. It features a HI3660 | |
1529 | SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. | |
1530 | ||
d754254f JRO |
1531 | config TARGET_POPLAR |
1532 | bool "Support Poplar 96boards Enterprise Edition Platform" | |
1533 | select ARM64 | |
1534 | select DM | |
d754254f | 1535 | select DM_SERIAL |
7a672057 | 1536 | select GPIO_EXTRA_HEADER |
5ed063d1 | 1537 | select OF_CONTROL |
cf2c7784 | 1538 | select PL01X_SERIAL |
08a00cba | 1539 | imply CMD_DM |
d754254f JRO |
1540 | help |
1541 | Support for Poplar 96boards EE platform. It features a HI3798cv200 | |
1542 | SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU | |
1543 | making it capable of running any commercial set-top solution based on | |
1544 | Linux or Android. | |
1545 | ||
9d044fcb PK |
1546 | config TARGET_LS1012AQDS |
1547 | bool "Support ls1012aqds" | |
9533acf3 | 1548 | select ARCH_LS1012A |
9d044fcb | 1549 | select ARM64 |
6324d506 | 1550 | select ARCH_SUPPORT_TFABOOT |
e5ec4815 | 1551 | select BOARD_LATE_INIT |
7a672057 | 1552 | select GPIO_EXTRA_HEADER |
9d044fcb PK |
1553 | help |
1554 | Support for Freescale LS1012AQDS platform. | |
1555 | The LS1012A Development System (QDS) is a high-performance | |
1556 | development platform that supports the QorIQ LS1012A | |
1557 | Layerscape Architecture processor. | |
1558 | ||
3b6e3898 PK |
1559 | config TARGET_LS1012ARDB |
1560 | bool "Support ls1012ardb" | |
9533acf3 | 1561 | select ARCH_LS1012A |
3b6e3898 | 1562 | select ARM64 |
6324d506 | 1563 | select ARCH_SUPPORT_TFABOOT |
e5ec4815 | 1564 | select BOARD_LATE_INIT |
7a672057 | 1565 | select GPIO_EXTRA_HEADER |
fedb428c | 1566 | imply SCSI |
9fd95ef0 | 1567 | imply SCSI_AHCI |
3b6e3898 PK |
1568 | help |
1569 | Support for Freescale LS1012ARDB platform. | |
1570 | The LS1012A Reference design board (RDB) is a high-performance | |
1571 | development platform that supports the QorIQ LS1012A | |
1572 | Layerscape Architecture processor. | |
1573 | ||
b0ce187b BU |
1574 | config TARGET_LS1012A2G5RDB |
1575 | bool "Support ls1012a2g5rdb" | |
1576 | select ARCH_LS1012A | |
1577 | select ARM64 | |
6324d506 | 1578 | select ARCH_SUPPORT_TFABOOT |
b0ce187b | 1579 | select BOARD_LATE_INIT |
7a672057 | 1580 | select GPIO_EXTRA_HEADER |
b0ce187b BU |
1581 | imply SCSI |
1582 | help | |
1583 | Support for Freescale LS1012A2G5RDB platform. | |
1584 | The LS1012A 2G5 Reference design board (RDB) is a high-performance | |
1585 | development platform that supports the QorIQ LS1012A | |
1586 | Layerscape Architecture processor. | |
1587 | ||
9629ccdd BU |
1588 | config TARGET_LS1012AFRWY |
1589 | bool "Support ls1012afrwy" | |
1590 | select ARCH_LS1012A | |
1591 | select ARM64 | |
6324d506 | 1592 | select ARCH_SUPPORT_TFABOOT |
5ed063d1 | 1593 | select BOARD_LATE_INIT |
7a672057 | 1594 | select GPIO_EXTRA_HEADER |
9629ccdd BU |
1595 | imply SCSI |
1596 | imply SCSI_AHCI | |
1597 | help | |
1598 | Support for Freescale LS1012AFRWY platform. | |
1599 | The LS1012A FRWY board (FRWY) is a high-performance | |
1600 | development platform that supports the QorIQ LS1012A | |
1601 | Layerscape Architecture processor. | |
1602 | ||
ff78aa2b PK |
1603 | config TARGET_LS1012AFRDM |
1604 | bool "Support ls1012afrdm" | |
9533acf3 | 1605 | select ARCH_LS1012A |
ff78aa2b | 1606 | select ARM64 |
6324d506 | 1607 | select ARCH_SUPPORT_TFABOOT |
7a672057 | 1608 | select GPIO_EXTRA_HEADER |
ff78aa2b PK |
1609 | help |
1610 | Support for Freescale LS1012AFRDM platform. | |
1611 | The LS1012A Freedom board (FRDM) is a high-performance | |
1612 | development platform that supports the QorIQ LS1012A | |
1613 | Layerscape Architecture processor. | |
1614 | ||
f278a217 YT |
1615 | config TARGET_LS1028AQDS |
1616 | bool "Support ls1028aqds" | |
1617 | select ARCH_LS1028A | |
1618 | select ARM64 | |
1619 | select ARMV8_MULTIENTRY | |
6324d506 | 1620 | select ARCH_SUPPORT_TFABOOT |
acf40f50 | 1621 | select BOARD_LATE_INIT |
7a672057 | 1622 | select GPIO_EXTRA_HEADER |
f278a217 YT |
1623 | help |
1624 | Support for Freescale LS1028AQDS platform | |
1625 | The LS1028A Development System (QDS) is a high-performance | |
1626 | development platform that supports the QorIQ LS1028A | |
1627 | Layerscape Architecture processor. | |
1628 | ||
353f36d9 YT |
1629 | config TARGET_LS1028ARDB |
1630 | bool "Support ls1028ardb" | |
1631 | select ARCH_LS1028A | |
1632 | select ARM64 | |
1633 | select ARMV8_MULTIENTRY | |
6324d506 | 1634 | select ARCH_SUPPORT_TFABOOT |
c40ebf7e | 1635 | select BOARD_LATE_INIT |
7a672057 | 1636 | select GPIO_EXTRA_HEADER |
353f36d9 YT |
1637 | help |
1638 | Support for Freescale LS1028ARDB platform | |
1639 | The LS1028A Development System (RDB) is a high-performance | |
1640 | development platform that supports the QorIQ LS1028A | |
1641 | Layerscape Architecture processor. | |
1642 | ||
e84a324b AK |
1643 | config TARGET_LS1088ARDB |
1644 | bool "Support ls1088ardb" | |
1645 | select ARCH_LS1088A | |
1646 | select ARM64 | |
1647 | select ARMV8_MULTIENTRY | |
6324d506 | 1648 | select ARCH_SUPPORT_TFABOOT |
e84a324b | 1649 | select BOARD_LATE_INIT |
099f4093 | 1650 | select SUPPORT_SPL |
32413125 | 1651 | select FSL_DDR_INTERACTIVE if !SD_BOOT |
7a672057 | 1652 | select GPIO_EXTRA_HEADER |
e84a324b AK |
1653 | help |
1654 | Support for NXP LS1088ARDB platform. | |
1655 | The LS1088A Reference design board (RDB) is a high-performance | |
1656 | development platform that supports the QorIQ LS1088A | |
1657 | Layerscape Architecture processor. | |
1658 | ||
550e3dc0 | 1659 | config TARGET_LS1021AQDS |
0de15707 | 1660 | bool "Support ls1021aqds" |
5ed063d1 MS |
1661 | select ARCH_LS1021A |
1662 | select ARCH_SUPPORT_PSCI | |
1663 | select BOARD_EARLY_INIT_F | |
e5ec4815 | 1664 | select BOARD_LATE_INIT |
acf15001 | 1665 | select CPU_V7A |
adee1d4c HZ |
1666 | select CPU_V7_HAS_NONSEC |
1667 | select CPU_V7_HAS_VIRT | |
5e8bd7e1 | 1668 | select LS1_DEEP_SLEEP |
2b210540 | 1669 | select PEN_ADDR_BIG_ENDIAN |
5ed063d1 | 1670 | select SUPPORT_SPL |
d26e34c4 | 1671 | select SYS_FSL_DDR |
32413125 | 1672 | select FSL_DDR_INTERACTIVE |
28964227 | 1673 | select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI |
7a672057 | 1674 | select GPIO_EXTRA_HEADER |
28964227 | 1675 | select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI |
fedb428c | 1676 | imply SCSI |
217f92bb | 1677 | |
c8a7d9da | 1678 | config TARGET_LS1021ATWR |
0de15707 | 1679 | bool "Support ls1021atwr" |
5ed063d1 MS |
1680 | select ARCH_LS1021A |
1681 | select ARCH_SUPPORT_PSCI | |
1682 | select BOARD_EARLY_INIT_F | |
e5ec4815 | 1683 | select BOARD_LATE_INIT |
acf15001 | 1684 | select CPU_V7A |
adee1d4c HZ |
1685 | select CPU_V7_HAS_NONSEC |
1686 | select CPU_V7_HAS_VIRT | |
5e8bd7e1 | 1687 | select LS1_DEEP_SLEEP |
2b210540 | 1688 | select PEN_ADDR_BIG_ENDIAN |
5ed063d1 | 1689 | select SUPPORT_SPL |
28964227 | 1690 | select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI |
7a672057 | 1691 | select GPIO_EXTRA_HEADER |
fedb428c | 1692 | imply SCSI |
c8a7d9da | 1693 | |
91ee5474 AG |
1694 | config TARGET_PG_WCOM_SELI8 |
1695 | bool "Support Hitachi-Powergrids SELI8 service unit card" | |
1696 | select ARCH_LS1021A | |
1697 | select ARCH_SUPPORT_PSCI | |
1698 | select BOARD_EARLY_INIT_F | |
1699 | select BOARD_LATE_INIT | |
1700 | select CPU_V7A | |
1701 | select CPU_V7_HAS_NONSEC | |
1702 | select CPU_V7_HAS_VIRT | |
1703 | select SYS_FSL_DDR | |
1704 | select FSL_DDR_INTERACTIVE | |
7a672057 | 1705 | select GPIO_EXTRA_HEADER |
91ee5474 AG |
1706 | select VENDOR_KM |
1707 | imply SCSI | |
1708 | help | |
1709 | Support for Hitachi-Powergrids SELI8 service unit card. | |
1710 | SELI8 is a QorIQ LS1021a based service unit card used | |
1711 | in XMC20 and FOX615 product families. | |
1712 | ||
a7fd6fa1 AG |
1713 | config TARGET_PG_WCOM_EXPU1 |
1714 | bool "Support Hitachi-Powergrids EXPU1 service unit card" | |
1715 | select ARCH_LS1021A | |
1716 | select ARCH_SUPPORT_PSCI | |
1717 | select BOARD_EARLY_INIT_F | |
1718 | select BOARD_LATE_INIT | |
1719 | select CPU_V7A | |
1720 | select CPU_V7_HAS_NONSEC | |
1721 | select CPU_V7_HAS_VIRT | |
1722 | select SYS_FSL_DDR | |
1723 | select FSL_DDR_INTERACTIVE | |
1724 | select VENDOR_KM | |
1725 | imply SCSI | |
1726 | help | |
1727 | Support for Hitachi-Powergrids EXPU1 service unit card. | |
1728 | EXPU1 is a QorIQ LS1021a based service unit card used | |
1729 | in XMC20 and FOX615 product families. | |
1730 | ||
87821220 JW |
1731 | config TARGET_LS1021ATSN |
1732 | bool "Support ls1021atsn" | |
1733 | select ARCH_LS1021A | |
1734 | select ARCH_SUPPORT_PSCI | |
1735 | select BOARD_EARLY_INIT_F | |
1736 | select BOARD_LATE_INIT | |
1737 | select CPU_V7A | |
1738 | select CPU_V7_HAS_NONSEC | |
1739 | select CPU_V7_HAS_VIRT | |
1740 | select LS1_DEEP_SLEEP | |
1741 | select SUPPORT_SPL | |
7a672057 | 1742 | select GPIO_EXTRA_HEADER |
87821220 JW |
1743 | imply SCSI |
1744 | ||
20c700f8 FL |
1745 | config TARGET_LS1021AIOT |
1746 | bool "Support ls1021aiot" | |
5ed063d1 MS |
1747 | select ARCH_LS1021A |
1748 | select ARCH_SUPPORT_PSCI | |
e5ec4815 | 1749 | select BOARD_LATE_INIT |
acf15001 | 1750 | select CPU_V7A |
20c700f8 FL |
1751 | select CPU_V7_HAS_NONSEC |
1752 | select CPU_V7_HAS_VIRT | |
2b210540 | 1753 | select PEN_ADDR_BIG_ENDIAN |
20c700f8 | 1754 | select SUPPORT_SPL |
28964227 | 1755 | select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI |
7a672057 | 1756 | select GPIO_EXTRA_HEADER |
fedb428c | 1757 | imply SCSI |
20c700f8 FL |
1758 | help |
1759 | Support for Freescale LS1021AIOT platform. | |
1760 | The LS1021A Freescale board (IOT) is a high-performance | |
1761 | development platform that supports the QorIQ LS1021A | |
1762 | Layerscape Architecture processor. | |
1763 | ||
02b5d2ed SX |
1764 | config TARGET_LS1043AQDS |
1765 | bool "Support ls1043aqds" | |
0a37cf8f | 1766 | select ARCH_LS1043A |
02b5d2ed SX |
1767 | select ARM64 |
1768 | select ARMV8_MULTIENTRY | |
6324d506 | 1769 | select ARCH_SUPPORT_TFABOOT |
5ed063d1 | 1770 | select BOARD_EARLY_INIT_F |
e5ec4815 | 1771 | select BOARD_LATE_INIT |
02b5d2ed | 1772 | select SUPPORT_SPL |
32413125 | 1773 | select FSL_DDR_INTERACTIVE if !SPL |
044a66cb LM |
1774 | select FSL_DSPI if !SPL_NO_DSPI |
1775 | select DM_SPI_FLASH if FSL_DSPI | |
7a672057 | 1776 | select GPIO_EXTRA_HEADER |
fedb428c | 1777 | imply SCSI |
f11e492a | 1778 | imply SCSI_AHCI |
02b5d2ed SX |
1779 | help |
1780 | Support for Freescale LS1043AQDS platform. | |
1781 | ||
f3a8e2b7 MH |
1782 | config TARGET_LS1043ARDB |
1783 | bool "Support ls1043ardb" | |
0a37cf8f | 1784 | select ARCH_LS1043A |
f3a8e2b7 | 1785 | select ARM64 |
831c068f | 1786 | select ARMV8_MULTIENTRY |
6324d506 | 1787 | select ARCH_SUPPORT_TFABOOT |
5ed063d1 | 1788 | select BOARD_EARLY_INIT_F |
e5ec4815 | 1789 | select BOARD_LATE_INIT |
3ad44729 | 1790 | select SUPPORT_SPL |
044a66cb LM |
1791 | select FSL_DSPI if !SPL_NO_DSPI |
1792 | select DM_SPI_FLASH if FSL_DSPI | |
7a672057 | 1793 | select GPIO_EXTRA_HEADER |
f3a8e2b7 MH |
1794 | help |
1795 | Support for Freescale LS1043ARDB platform. | |
1796 | ||
126fe70d SX |
1797 | config TARGET_LS1046AQDS |
1798 | bool "Support ls1046aqds" | |
da28e58a | 1799 | select ARCH_LS1046A |
126fe70d SX |
1800 | select ARM64 |
1801 | select ARMV8_MULTIENTRY | |
6324d506 | 1802 | select ARCH_SUPPORT_TFABOOT |
5ed063d1 | 1803 | select BOARD_EARLY_INIT_F |
e5ec4815 | 1804 | select BOARD_LATE_INIT |
126fe70d | 1805 | select DM_SPI_FLASH if DM_SPI |
5ed063d1 | 1806 | select SUPPORT_SPL |
32413125 RB |
1807 | select FSL_DDR_BIST if !SPL |
1808 | select FSL_DDR_INTERACTIVE if !SPL | |
1809 | select FSL_DDR_INTERACTIVE if !SPL | |
7a672057 | 1810 | select GPIO_EXTRA_HEADER |
fedb428c | 1811 | imply SCSI |
126fe70d SX |
1812 | help |
1813 | Support for Freescale LS1046AQDS platform. | |
1814 | The LS1046A Development System (QDS) is a high-performance | |
1815 | development platform that supports the QorIQ LS1046A | |
1816 | Layerscape Architecture processor. | |
1817 | ||
dd02936f MH |
1818 | config TARGET_LS1046ARDB |
1819 | bool "Support ls1046ardb" | |
da28e58a | 1820 | select ARCH_LS1046A |
dd02936f MH |
1821 | select ARM64 |
1822 | select ARMV8_MULTIENTRY | |
6324d506 | 1823 | select ARCH_SUPPORT_TFABOOT |
5ed063d1 | 1824 | select BOARD_EARLY_INIT_F |
e5ec4815 | 1825 | select BOARD_LATE_INIT |
dd02936f | 1826 | select DM_SPI_FLASH if DM_SPI |
dccef2ec | 1827 | select POWER_MC34VR500 |
5ed063d1 | 1828 | select SUPPORT_SPL |
32413125 RB |
1829 | select FSL_DDR_BIST |
1830 | select FSL_DDR_INTERACTIVE if !SPL | |
7a672057 | 1831 | select GPIO_EXTRA_HEADER |
fedb428c | 1832 | imply SCSI |
dd02936f MH |
1833 | help |
1834 | Support for Freescale LS1046ARDB platform. | |
1835 | The LS1046A Reference Design Board (RDB) is a high-performance | |
1836 | development platform that supports the QorIQ LS1046A | |
1837 | Layerscape Architecture processor. | |
1838 | ||
d90c7ac7 VS |
1839 | config TARGET_LS1046AFRWY |
1840 | bool "Support ls1046afrwy" | |
1841 | select ARCH_LS1046A | |
1842 | select ARM64 | |
1843 | select ARMV8_MULTIENTRY | |
6324d506 | 1844 | select ARCH_SUPPORT_TFABOOT |
d90c7ac7 VS |
1845 | select BOARD_EARLY_INIT_F |
1846 | select BOARD_LATE_INIT | |
1847 | select DM_SPI_FLASH if DM_SPI | |
7a672057 | 1848 | select GPIO_EXTRA_HEADER |
d90c7ac7 VS |
1849 | imply SCSI |
1850 | help | |
1851 | Support for Freescale LS1046AFRWY platform. | |
1852 | The LS1046A Freeway Board (FRWY) is a high-performance | |
1853 | development platform that supports the QorIQ LS1046A | |
1854 | Layerscape Architecture processor. | |
dd84058d | 1855 | |
4ceb5c6d MW |
1856 | config TARGET_SL28 |
1857 | bool "Support sl28" | |
1858 | select ARCH_LS1028A | |
1859 | select ARM64 | |
1860 | select ARMV8_MULTIENTRY | |
1861 | select SUPPORT_SPL | |
1862 | select BINMAN | |
356a3384 MW |
1863 | select DM |
1864 | select DM_GPIO | |
1865 | select DM_I2C | |
1866 | select DM_MMC | |
db04ff42 | 1867 | select MTD |
356a3384 | 1868 | select DM_SPI_FLASH |
356a3384 | 1869 | select DM_MDIO |
3232bdf0 | 1870 | select PCI |
356a3384 MW |
1871 | select DM_RNG |
1872 | select DM_RTC | |
b630f8b3 | 1873 | select SCSI |
6d1ab4a1 | 1874 | select DM_SERIAL |
356a3384 | 1875 | select DM_SPI |
7a672057 | 1876 | select GPIO_EXTRA_HEADER |
356a3384 MW |
1877 | select SPL_DM if SPL |
1878 | select SPL_DM_SPI if SPL | |
1879 | select SPL_DM_SPI_FLASH if SPL | |
1880 | select SPL_DM_I2C if SPL | |
1881 | select SPL_DM_MMC if SPL | |
1882 | select SPL_DM_SERIAL if SPL | |
4ceb5c6d MW |
1883 | help |
1884 | Support for Kontron SMARC-sAL28 board. | |
1885 | ||
a1d2fd38 MM |
1886 | config TARGET_TEN64 |
1887 | bool "Support ten64" | |
1888 | select ARCH_LS1088A | |
1889 | select ARCH_MISC_INIT | |
1890 | select ARM64 | |
1891 | select ARMV8_MULTIENTRY | |
1892 | select ARCH_SUPPORT_TFABOOT | |
1893 | select BOARD_LATE_INIT | |
1894 | select SUPPORT_SPL | |
1895 | select FSL_DDR_INTERACTIVE if !SD_BOOT | |
1896 | select GPIO_EXTRA_HEADER | |
1897 | help | |
1898 | Support for Traverse Technologies Ten64 board, based | |
1899 | on NXP LS1088A. | |
1900 | ||
66cba041 | 1901 | config ARCH_UNIPHIER |
b6ef3a3f | 1902 | bool "Socionext UniPhier SoCs" |
e5ec4815 | 1903 | select BOARD_LATE_INIT |
4e819950 | 1904 | select DM |
b800cbde | 1905 | select DM_GPIO |
4e819950 | 1906 | select DM_I2C |
4aceb3f8 | 1907 | select DM_MMC |
407b01b3 | 1908 | select DM_MTD |
4fb96c48 | 1909 | select DM_RESET |
b5550e49 | 1910 | select DM_SERIAL |
65fce763 | 1911 | select OF_BOARD_SETUP |
b5550e49 MY |
1912 | select OF_CONTROL |
1913 | select OF_LIBFDT | |
27350c92 | 1914 | select PINCTRL |
0680f1b1 | 1915 | select SPL_BOARD_INIT if SPL |
561ca649 MY |
1916 | select SPL_DM if SPL |
1917 | select SPL_LIBCOMMON_SUPPORT if SPL | |
1918 | select SPL_LIBGENERIC_SUPPORT if SPL | |
1919 | select SPL_OF_CONTROL if SPL | |
1920 | select SPL_PINCTRL if SPL | |
b5550e49 | 1921 | select SUPPORT_SPL |
08a00cba | 1922 | imply CMD_DM |
7ef5b1e7 | 1923 | imply DISTRO_DEFAULTS |
91d27a17 | 1924 | imply FAT_WRITE |
b6ef3a3f MY |
1925 | help |
1926 | Support for UniPhier SoC family developed by Socionext Inc. | |
1927 | (formerly, System LSI Business Division of Panasonic Corporation) | |
66cba041 | 1928 | |
5cd4a355 MH |
1929 | config ARCH_SYNQUACER |
1930 | bool "Socionext SynQuacer SoCs" | |
1931 | select ARM64 | |
1932 | select DM | |
1933 | select GIC_V3 | |
1934 | select PSCI_RESET | |
1935 | select SYSRESET | |
1936 | select SYSRESET_PSCI | |
1937 | select OF_CONTROL | |
1938 | help | |
1939 | Support for SynQuacer SoC family developed by Socionext Inc. | |
1940 | This SoC is used on 96boards EE DeveloperBox. | |
1941 | ||
71f6354b | 1942 | config ARCH_STM32 |
2514c2d0 | 1943 | bool "Support STMicroelectronics STM32 MCU with cortex M" |
ed09a554 | 1944 | select CPU_V7M |
66562414 KL |
1945 | select DM |
1946 | select DM_SERIAL | |
08a00cba | 1947 | imply CMD_DM |
ed09a554 | 1948 | |
94e9a4ef | 1949 | config ARCH_STI |
eae488b7 | 1950 | bool "Support STMicroelectronics SoCs" |
5ed063d1 | 1951 | select BLK |
acf15001 | 1952 | select CPU_V7A |
214a17e6 | 1953 | select DM |
eee20f81 | 1954 | select DM_MMC |
584861ff | 1955 | select DM_RESET |
5ed063d1 | 1956 | select DM_SERIAL |
08a00cba | 1957 | imply CMD_DM |
94e9a4ef PC |
1958 | help |
1959 | Support for STMicroelectronics STiH407/10 SoC family. | |
1960 | This SoC is used on Linaro 96Board STiH410-B2260 | |
1961 | ||
2514c2d0 PD |
1962 | config ARCH_STM32MP |
1963 | bool "Support STMicroelectronics STM32MP Socs with cortex A" | |
08772f6e | 1964 | select ARCH_MISC_INIT |
654706be | 1965 | select ARCH_SUPPORT_TFABOOT |
2514c2d0 PD |
1966 | select BOARD_LATE_INIT |
1967 | select CLK | |
1968 | select DM | |
1969 | select DM_GPIO | |
1970 | select DM_RESET | |
1971 | select DM_SERIAL | |
5ed063d1 | 1972 | select MISC |
2514c2d0 PD |
1973 | select OF_CONTROL |
1974 | select OF_LIBFDT | |
05d36936 | 1975 | select OF_SYSTEM_SETUP |
2514c2d0 PD |
1976 | select PINCTRL |
1977 | select REGMAP | |
2514c2d0 | 1978 | select SYSCON |
86634a93 | 1979 | select SYSRESET |
01a70199 | 1980 | select SYS_THUMB_BUILD if !ARM64 |
09259fce | 1981 | imply SPL_SYSRESET |
08a00cba | 1982 | imply CMD_DM |
c16cc4f6 | 1983 | imply CMD_POWEROFF |
f219361d | 1984 | imply OF_LIBFDT_OVERLAY |
b4ae34b6 | 1985 | imply ENV_VARS_UBOOT_RUNTIME_CONFIG |
ce3772ca | 1986 | imply USE_PREBOOT |
d6b318de | 1987 | imply TIMESTAMP |
2514c2d0 PD |
1988 | help |
1989 | Support for STM32MP SoC family developed by STMicroelectronics, | |
1990 | MPUs based on ARM cortex A core | |
abf2678f PD |
1991 | U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). |
1992 | FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot | |
1993 | chain. | |
1994 | SPL is the unsecure FSBL for the basic boot chain. | |
2514c2d0 | 1995 | |
2444dae5 SG |
1996 | config ARCH_ROCKCHIP |
1997 | bool "Support Rockchip SoCs" | |
aa15038c | 1998 | select BLK |
05713d57 | 1999 | select BINMAN if SPL_OPTEE || SPL |
2444dae5 | 2000 | select DM |
aa15038c SG |
2001 | select DM_GPIO |
2002 | select DM_I2C | |
2003 | select DM_MMC | |
5ed063d1 MS |
2004 | select DM_PWM |
2005 | select DM_REGULATOR | |
aa15038c SG |
2006 | select DM_SERIAL |
2007 | select DM_SPI | |
2008 | select DM_SPI_FLASH | |
bcbd9a6f | 2009 | select DM_USB_GADGET if USB_DWC3_GADGET |
14ad6eb2 | 2010 | select ENABLE_ARM_SOC_BOOT0_HOOK |
5ed063d1 | 2011 | select OF_CONTROL |
db04ff42 | 2012 | select MTD |
f1b1f770 | 2013 | select SPI |
5ed063d1 | 2014 | select SPL_DM if SPL |
56c40460 LM |
2015 | select SPL_DM_SPI if SPL |
2016 | select SPL_DM_SPI_FLASH if SPL | |
5ed063d1 MS |
2017 | select SYS_MALLOC_F |
2018 | select SYS_THUMB_BUILD if !ARM64 | |
2019 | imply ADC | |
08a00cba | 2020 | imply CMD_DM |
b0a569da | 2021 | imply DEBUG_UART_BOARD_INIT |
7755dc58 | 2022 | imply BOOTSTD_DEFAULTS |
91d27a17 | 2023 | imply FAT_WRITE |
8e8bcccc | 2024 | imply SARADC_ROCKCHIP |
5ed063d1 | 2025 | imply SPL_SYSRESET |
64eff47c | 2026 | imply SPL_SYS_MALLOC_SIMPLE |
c3c0331d | 2027 | imply SYS_NS16550 |
5ed063d1 MS |
2028 | imply TPL_SYSRESET |
2029 | imply USB_FUNCTION_FASTBOOT | |
2444dae5 | 2030 | |
03c22880 SG |
2031 | config ARCH_OCTEONTX |
2032 | bool "Support OcteonTX SoCs" | |
7a78074c | 2033 | select CLK |
03c22880 | 2034 | select DM |
7a672057 | 2035 | select GPIO_EXTRA_HEADER |
03c22880 SG |
2036 | select ARM64 |
2037 | select OF_CONTROL | |
2038 | select OF_LIVE | |
2039 | select BOARD_LATE_INIT | |
2040 | select SYS_CACHE_SHIFT_7 | |
7856cd5a | 2041 | select SYS_PCI_64BIT if PCI |
239d22c7 | 2042 | imply OF_HAS_PRIOR_STAGE |
0a668f6d SG |
2043 | |
2044 | config ARCH_OCTEONTX2 | |
2045 | bool "Support OcteonTX2 SoCs" | |
7a78074c | 2046 | select CLK |
0a668f6d | 2047 | select DM |
7a672057 | 2048 | select GPIO_EXTRA_HEADER |
0a668f6d SG |
2049 | select ARM64 |
2050 | select OF_CONTROL | |
2051 | select OF_LIVE | |
2052 | select BOARD_LATE_INIT | |
2053 | select SYS_CACHE_SHIFT_7 | |
7856cd5a | 2054 | select SYS_PCI_64BIT if PCI |
239d22c7 | 2055 | imply OF_HAS_PRIOR_STAGE |
0a668f6d | 2056 | |
746f985a ST |
2057 | config TARGET_THUNDERX_88XX |
2058 | bool "Support ThunderX 88xx" | |
b4ba1693 | 2059 | select ARM64 |
7a672057 | 2060 | select GPIO_EXTRA_HEADER |
746f985a | 2061 | select OF_CONTROL |
cf2c7784 | 2062 | select PL01X_SERIAL |
5ed063d1 | 2063 | select SYS_CACHE_SHIFT_7 |
746f985a | 2064 | |
4697abea | 2065 | config ARCH_ASPEED |
2066 | bool "Support Aspeed SoCs" | |
4697abea | 2067 | select DM |
5ed063d1 | 2068 | select OF_CONTROL |
08a00cba | 2069 | imply CMD_DM |
4697abea | 2070 | |
e3aafef4 | 2071 | config TARGET_DURIAN |
2072 | bool "Support Phytium Durian Platform" | |
2073 | select ARM64 | |
7a672057 | 2074 | select GPIO_EXTRA_HEADER |
e3aafef4 | 2075 | help |
2076 | Support for durian platform. | |
2077 | It has 2GB Sdram, uart and pcie. | |
2078 | ||
b9d0f00a | 2079 | config TARGET_POMELO |
2080 | bool "Support Phytium Pomelo Platform" | |
2081 | select ARM64 | |
2082 | select DM | |
2083 | select AHCI | |
2084 | select SCSI_AHCI | |
2085 | select AHCI_PCI | |
2086 | select BLK | |
2087 | select PCI | |
2088 | select DM_PCI | |
2089 | select SCSI | |
b9d0f00a | 2090 | select DM_SERIAL |
b9d0f00a | 2091 | imply CMD_PCI |
2092 | help | |
2093 | Support for pomelo platform. | |
2094 | It has 8GB Sdram, uart and pcie. | |
2095 | ||
e6a8c6f5 T |
2096 | config TARGET_PE2201 |
2097 | bool "Support Phytium PE2201 Platform" | |
2098 | select ARM64 | |
2099 | help | |
2100 | Support for pe2201 platform.It has 2GB Sdram, uart and pcie. | |
2101 | ||
7d706a88 AN |
2102 | config TARGET_PRESIDIO_ASIC |
2103 | bool "Support Cortina Presidio ASIC Platform" | |
2104 | select ARM64 | |
5afdcca0 | 2105 | select GICV2 |
7d706a88 | 2106 | |
770a8eef AA |
2107 | config TARGET_XENGUEST_ARM64 |
2108 | bool "Xen guest ARM64" | |
2109 | select ARM64 | |
2110 | select XEN | |
2111 | select OF_CONTROL | |
2112 | select LINUX_KERNEL_IMAGE_HEADER | |
384d5cfe | 2113 | select XEN_SERIAL |
239d22c7 SG |
2114 | imply OF_HAS_PRIOR_STAGE |
2115 | ||
4276c9b2 NH |
2116 | config ARCH_GXP |
2117 | bool "Support HPE GXP SoCs" | |
2118 | select DM | |
2119 | select OF_CONTROL | |
2120 | imply CMD_DM | |
2121 | ||
dd84058d MY |
2122 | endchoice |
2123 | ||
9774462e TR |
2124 | config SUPPORT_PASSING_ATAGS |
2125 | bool "Support pre-devicetree ATAG-based booting" | |
2126 | depends on !ARM64 | |
2127 | imply SETUP_MEMORY_TAGS | |
2128 | help | |
2129 | Support for booting older Linux kernels, using ATAGs rather than | |
2130 | passing a devicetree. This is option is rarely used, and the | |
2131 | semantics are defined at | |
2132 | https://www.kernel.org/doc/Documentation/arm/Booting at section 4a. | |
2133 | ||
2134 | config SETUP_MEMORY_TAGS | |
2135 | bool "Pass memory size information via ATAG" | |
2136 | depends on SUPPORT_PASSING_ATAGS | |
2137 | ||
2138 | config CMDLINE_TAG | |
2139 | bool "Pass Linux kernel cmdline via ATAG" | |
2140 | depends on SUPPORT_PASSING_ATAGS | |
2141 | ||
2142 | config INITRD_TAG | |
2143 | bool "Pass initrd starting point and size via ATAG" | |
2144 | depends on SUPPORT_PASSING_ATAGS | |
2145 | ||
2146 | config REVISION_TAG | |
2147 | bool "Pass system revision via ATAG" | |
2148 | depends on SUPPORT_PASSING_ATAGS | |
2149 | ||
2150 | config SERIAL_TAG | |
2151 | bool "Pass system serial number via ATAG" | |
2152 | depends on SUPPORT_PASSING_ATAGS | |
2153 | ||
87e8d38a TR |
2154 | config STATIC_MACH_TYPE |
2155 | bool "Statically define the Machine ID number" | |
493fd336 | 2156 | default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" |
87e8d38a TR |
2157 | help |
2158 | When booting via ATAGs, enable this option if we know the correct | |
2159 | machine ID number to use at compile time. Some systems will be | |
2160 | passed the number dynamically by whatever loads U-Boot. | |
2161 | ||
2162 | config MACH_TYPE | |
2163 | int "Machine ID number" | |
2164 | depends on STATIC_MACH_TYPE | |
012d4be4 | 2165 | default 527 if TARGET_DS109 |
012d4be4 T |
2166 | default 3036 if TARGET_DS414 |
2167 | default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" | |
87e8d38a TR |
2168 | help |
2169 | When booting via ATAGs, the machine type must be passed as a number. | |
2170 | For the full list see https://www.arm.linux.org.uk/developer/machines | |
2171 | ||
6324d506 AT |
2172 | config ARCH_SUPPORT_TFABOOT |
2173 | bool | |
2174 | ||
2175 | config TFABOOT | |
2176 | bool "Support for booting from TF-A" | |
2177 | depends on ARCH_SUPPORT_TFABOOT | |
6324d506 | 2178 | help |
cee2e022 AP |
2179 | Some platforms support the setup of secure registers (for instance |
2180 | for CPU errata handling) or provide secure services like PSCI. | |
2181 | Those services could also be provided by other firmware parts | |
2182 | like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot | |
2183 | does not need to (and cannot) execute this code. | |
2184 | Enabling this option will make a U-Boot binary that is relying | |
2185 | on other firmware layers to provide secure functionality. | |
6324d506 | 2186 | |
5fbed8f2 AD |
2187 | config TI_SECURE_DEVICE |
2188 | bool "HS Device Type Support" | |
3a543a80 | 2189 | depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 |
5fbed8f2 AD |
2190 | help |
2191 | If a high secure (HS) device type is being used, this config | |
2192 | must be set. This option impacts various aspects of the | |
2193 | build system (to create signed boot images that can be | |
2194 | authenticated) and the code. See the doc/README.ti-secure | |
2195 | file for further details. | |
2196 | ||
440c00de TR |
2197 | config SYS_KWD_CONFIG |
2198 | string "kwbimage config file path" | |
2199 | depends on ARCH_KIRKWOOD || ARCH_MVEBU | |
2200 | default "arch/arm/mach-mvebu/kwbimage.cfg" | |
2201 | help | |
2202 | Path within the source directory to the kwbimage.cfg file to use | |
2203 | when packaging the U-Boot image for use. | |
2204 | ||
003b657e MK |
2205 | source "arch/arm/mach-apple/Kconfig" |
2206 | ||
4697abea | 2207 | source "arch/arm/mach-aspeed/Kconfig" |
2208 | ||
4614b891 MY |
2209 | source "arch/arm/mach-at91/Kconfig" |
2210 | ||
ddf6bd48 | 2211 | source "arch/arm/mach-bcm283x/Kconfig" |
3491ba63 | 2212 | |
f8209d30 WZ |
2213 | source "arch/arm/mach-bcmbca/Kconfig" |
2214 | ||
894c3ad2 TF |
2215 | source "arch/arm/mach-bcmstb/Kconfig" |
2216 | ||
ddf6bd48 | 2217 | source "arch/arm/mach-davinci/Kconfig" |
34e609ca | 2218 | |
77b55e8c | 2219 | source "arch/arm/mach-exynos/Kconfig" |
72df68cc | 2220 | |
4276c9b2 NH |
2221 | source "arch/arm/mach-hpe/gxp/Kconfig" |
2222 | ||
72a8ff4b | 2223 | source "arch/arm/mach-highbank/Kconfig" |
ef2b694c | 2224 | |
e90711f0 YX |
2225 | source "arch/arm/mach-histb/Kconfig" |
2226 | ||
5cbbd9bd MY |
2227 | source "arch/arm/mach-integrator/Kconfig" |
2228 | ||
e479a7d5 RM |
2229 | source "arch/arm/mach-ipq40xx/Kconfig" |
2230 | ||
586bde93 LV |
2231 | source "arch/arm/mach-k3/Kconfig" |
2232 | ||
39a72345 | 2233 | source "arch/arm/mach-keystone/Kconfig" |
c338f09e | 2234 | |
56f86e39 | 2235 | source "arch/arm/mach-kirkwood/Kconfig" |
47539e23 | 2236 | |
b3d9a8b1 | 2237 | source "arch/arm/mach-lpc32xx/Kconfig" |
ee54dfea | 2238 | |
c3d89140 SR |
2239 | source "arch/arm/mach-mvebu/Kconfig" |
2240 | ||
03c22880 | 2241 | source "arch/arm/mach-octeontx/Kconfig" |
0a668f6d SG |
2242 | |
2243 | source "arch/arm/mach-octeontx2/Kconfig" | |
2244 | ||
0a37cf8f YS |
2245 | source "arch/arm/cpu/armv7/ls102xa/Kconfig" |
2246 | ||
3159ec64 ML |
2247 | source "arch/arm/mach-imx/mx3/Kconfig" |
2248 | ||
7a7391fd PF |
2249 | source "arch/arm/mach-imx/mx5/Kconfig" |
2250 | ||
2251 | source "arch/arm/mach-imx/mx6/Kconfig" | |
e90a08da | 2252 | |
552a848e | 2253 | source "arch/arm/mach-imx/mx7/Kconfig" |
1a8150d4 | 2254 | |
7a7391fd | 2255 | source "arch/arm/mach-imx/mx7ulp/Kconfig" |
89ebc821 | 2256 | |
b2b8b9be PF |
2257 | source "arch/arm/mach-imx/imx8/Kconfig" |
2258 | ||
cd357ad1 | 2259 | source "arch/arm/mach-imx/imx8m/Kconfig" |
424ee3d1 | 2260 | |
19b990b4 PF |
2261 | source "arch/arm/mach-imx/imx8ulp/Kconfig" |
2262 | ||
881df6ed PF |
2263 | source "arch/arm/mach-imx/imx9/Kconfig" |
2264 | ||
77eb9a90 GB |
2265 | source "arch/arm/mach-imx/imxrt/Kconfig" |
2266 | ||
c5343d4e SA |
2267 | source "arch/arm/mach-imx/mxs/Kconfig" |
2268 | ||
983e3700 | 2269 | source "arch/arm/mach-omap2/Kconfig" |
6384726d | 2270 | |
da28e58a YS |
2271 | source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" |
2272 | ||
3e93b4e6 | 2273 | source "arch/arm/mach-orion5x/Kconfig" |
22f2be7a | 2274 | |
97775d26 MS |
2275 | source "arch/arm/mach-owl/Kconfig" |
2276 | ||
40b9d53c | 2277 | source "arch/arm/mach-renesas/Kconfig" |
f40b9898 | 2278 | |
bfcef28a BG |
2279 | source "arch/arm/mach-meson/Kconfig" |
2280 | ||
cbd2fba1 RL |
2281 | source "arch/arm/mach-mediatek/Kconfig" |
2282 | ||
32f11829 TT |
2283 | source "arch/arm/mach-qemu/Kconfig" |
2284 | ||
2444dae5 SG |
2285 | source "arch/arm/mach-rockchip/Kconfig" |
2286 | ||
225f5eec | 2287 | source "arch/arm/mach-s5pc1xx/Kconfig" |
311757be | 2288 | |
08592136 MK |
2289 | source "arch/arm/mach-snapdragon/Kconfig" |
2290 | ||
7865f4b0 MY |
2291 | source "arch/arm/mach-socfpga/Kconfig" |
2292 | ||
94e9a4ef PC |
2293 | source "arch/arm/mach-sti/Kconfig" |
2294 | ||
0a61ee88 VM |
2295 | source "arch/arm/mach-stm32/Kconfig" |
2296 | ||
2514c2d0 PD |
2297 | source "arch/arm/mach-stm32mp/Kconfig" |
2298 | ||
3abfd887 MY |
2299 | source "arch/arm/mach-sunxi/Kconfig" |
2300 | ||
09f455dc | 2301 | source "arch/arm/mach-tegra/Kconfig" |
ddd960e6 | 2302 | |
689088f9 SG |
2303 | source "arch/arm/mach-u8500/Kconfig" |
2304 | ||
4c425570 | 2305 | source "arch/arm/mach-uniphier/Kconfig" |
66cba041 | 2306 | |
7966b437 SA |
2307 | source "arch/arm/cpu/armv7/vf610/Kconfig" |
2308 | ||
0107f240 | 2309 | source "arch/arm/mach-zynq/Kconfig" |
ddd960e6 | 2310 | |
274ccb5b MS |
2311 | source "arch/arm/mach-zynqmp/Kconfig" |
2312 | ||
ec48b6c9 MS |
2313 | source "arch/arm/mach-versal/Kconfig" |
2314 | ||
f6aebdf6 MS |
2315 | source "arch/arm/mach-versal-net/Kconfig" |
2316 | ||
1d6c54ec MS |
2317 | source "arch/arm/mach-zynqmp-r5/Kconfig" |
2318 | ||
ea624e19 HG |
2319 | source "arch/arm/cpu/armv7/Kconfig" |
2320 | ||
23b5877c LW |
2321 | source "arch/arm/cpu/armv8/Kconfig" |
2322 | ||
552a848e | 2323 | source "arch/arm/mach-imx/Kconfig" |
a05a6045 | 2324 | |
95e9a8e2 SB |
2325 | source "arch/arm/mach-nexell/Kconfig" |
2326 | ||
84335544 JL |
2327 | source "arch/arm/mach-npcm/Kconfig" |
2328 | ||
565add12 | 2329 | source "board/armltd/total_compute/Kconfig" |
f98457d7 | 2330 | source "board/armltd/corstone1000/Kconfig" |
d8ccbe93 | 2331 | source "board/bosch/shc/Kconfig" |
45123804 | 2332 | source "board/bosch/guardian/Kconfig" |
03c22880 | 2333 | source "board/Marvell/octeontx/Kconfig" |
0a668f6d | 2334 | source "board/Marvell/octeontx2/Kconfig" |
15e30106 | 2335 | source "board/armltd/vexpress/Kconfig" |
dd84058d | 2336 | source "board/armltd/vexpress64/Kconfig" |
7d706a88 | 2337 | source "board/cortina/presidio-asic/Kconfig" |
6f63c296 | 2338 | source "board/broadcom/bcmns/Kconfig" |
291635ae | 2339 | source "board/broadcom/bcmns3/Kconfig" |
746f985a | 2340 | source "board/cavium/thunderx/Kconfig" |
85ab0452 | 2341 | source "board/eets/pdu001/Kconfig" |
6f332765 | 2342 | source "board/emulation/qemu-arm/Kconfig" |
44937214 PK |
2343 | source "board/freescale/ls2080aqds/Kconfig" |
2344 | source "board/freescale/ls2080ardb/Kconfig" | |
e84a324b | 2345 | source "board/freescale/ls1088a/Kconfig" |
353f36d9 | 2346 | source "board/freescale/ls1028a/Kconfig" |
550e3dc0 | 2347 | source "board/freescale/ls1021aqds/Kconfig" |
02b5d2ed | 2348 | source "board/freescale/ls1043aqds/Kconfig" |
c8a7d9da | 2349 | source "board/freescale/ls1021atwr/Kconfig" |
87821220 | 2350 | source "board/freescale/ls1021atsn/Kconfig" |
20c700f8 | 2351 | source "board/freescale/ls1021aiot/Kconfig" |
126fe70d | 2352 | source "board/freescale/ls1046aqds/Kconfig" |
f3a8e2b7 | 2353 | source "board/freescale/ls1043ardb/Kconfig" |
dd02936f | 2354 | source "board/freescale/ls1046ardb/Kconfig" |
d90c7ac7 | 2355 | source "board/freescale/ls1046afrwy/Kconfig" |
9d044fcb | 2356 | source "board/freescale/ls1012aqds/Kconfig" |
3b6e3898 | 2357 | source "board/freescale/ls1012ardb/Kconfig" |
ff78aa2b | 2358 | source "board/freescale/ls1012afrdm/Kconfig" |
58c3e620 | 2359 | source "board/freescale/lx2160a/Kconfig" |
ab38bf6a | 2360 | source "board/grinn/chiliboard/Kconfig" |
345243ed | 2361 | source "board/hisilicon/hikey/Kconfig" |
c62c7ef7 | 2362 | source "board/hisilicon/hikey960/Kconfig" |
d754254f | 2363 | source "board/hisilicon/poplar/Kconfig" |
a96c08f5 | 2364 | source "board/isee/igep003x/Kconfig" |
4ceb5c6d | 2365 | source "board/kontron/sl28/Kconfig" |
10e959a1 | 2366 | source "board/myir/mys_6ulx/Kconfig" |
4982e123 | 2367 | source "board/samsung/common/Kconfig" |
3a21d45d | 2368 | source "board/siemens/common/Kconfig" |
a3a0bc85 | 2369 | source "board/seeed/npi_imx6ull/Kconfig" |
5cd4a355 | 2370 | source "board/socionext/developerbox/Kconfig" |
9d1b2987 | 2371 | source "board/tcl/sl50/Kconfig" |
a1d2fd38 | 2372 | source "board/traverse/ten64/Kconfig" |
d8d33b6d | 2373 | source "board/variscite/dart_6ul/Kconfig" |
6ce89324 | 2374 | source "board/vscom/baltos/Kconfig" |
e3aafef4 | 2375 | source "board/phytium/durian/Kconfig" |
b9d0f00a | 2376 | source "board/phytium/pomelo/Kconfig" |
e6a8c6f5 | 2377 | source "board/phytium/pe2201/Kconfig" |
770a8eef | 2378 | source "board/xen/xenguest_arm64/Kconfig" |
dd84058d | 2379 | |
51b17d49 MY |
2380 | source "arch/arm/Kconfig.debug" |
2381 | ||
dd84058d | 2382 | endmenu |