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Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
[thirdparty/u-boot.git] / arch / arm / cpu / arm1136 / mx31 / timer.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
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2/*
3 * (C) Copyright 2007
4 * Sascha Hauer, Pengutronix
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5 */
6
d678a59d 7#include <common.h>
691d719d 8#include <init.h>
86271115 9#include <asm/arch/imx-regs.h>
2cf36ae7 10#include <asm/io.h>
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11
12#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
13
14/* General purpose timers registers */
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15#define GPTCR __REG(TIMER_BASE) /* Control register */
16#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
17#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
18#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
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19
20/* General purpose timers bitfields */
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21#define GPTCR_SWR (1 << 15) /* Software reset */
22#define GPTCR_FRR (1 << 9) /* Freerun / restart */
23#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
24#define GPTCR_TEN 1 /* Timer enable */
25
1ed7a7f0 26/* The 32768Hz 32-bit timer overruns in 131072 seconds */
77f11a99 27int timer_init(void)
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28{
29 int i;
30
31 /* setup GP Timer 1 */
32 GPTCR = GPTCR_SWR;
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33 for (i = 0; i < 100; i++)
34 GPTCR = 0; /* We have no udelay by now */
9b56f4f0 35 GPTPR = 0; /* 32Khz */
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36 /* Freerun Mode, PERCLK1 input */
37 GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
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38
39 return 0;
40}
41
93a0ea50 42unsigned long timer_read_counter(void)
60ebcffb 43{
93a0ea50 44 return GPTCNT;
60ebcffb 45}