[people/ms/u-boot.git] / arch / arm / cpu / arm920t / at91rm9200 / lxt972.c

/*
 *
 * (C) Copyright 2003
 * Author : Hamid Ikdoumi (Atmel)
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * Adapted for KwikByte KB920x board: 22APR2005
 */

#include <common.h>
#include <at91rm9200_net.h>
#include <net.h>
#include <miiphy.h>
#include <lxt971a.h>

#ifdef CONFIG_DRIVER_ETHER

#if defined(CONFIG_CMD_NET)

/*
 * Name:
 *	lxt972_IsPhyConnected
 * Description:
 *	Reads the 2 PHY ID registers
 * Arguments:
 *	p_mac - pointer to AT91S_EMAC struct
 * Return value:
 *	TRUE - if id read successfully
 *	FALSE- if error
 */
unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac)
{
	unsigned short Id1, Id2;

	at91rm9200_EmacEnableMDIO (p_mac);
	at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR1, &Id1);
	at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR2, &Id2);
	at91rm9200_EmacDisableMDIO (p_mac);

	if ((Id1 == (0x0013)) && ((Id2  & 0xFFF0) == 0x78E0))
		return TRUE;

	return FALSE;
}

/*
 * Name:
 *	lxt972_GetLinkSpeed
 * Description:
 *	Link parallel detection status of MAC is checked and set in the
 *	MAC configuration registers
 * Arguments:
 *	p_mac - pointer to MAC
 * Return value:
 *	TRUE - if link status set succesfully
 *	FALSE - if link status not set
 */
UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac)
{
	unsigned short stat1;

	if (!at91rm9200_EmacReadPhy (p_mac, PHY_LXT971_STAT2, &stat1))
		return FALSE;

	if (!(stat1 & PHY_LXT971_STAT2_LINK))	/* link status up? */
		return FALSE;

	if (stat1 & PHY_LXT971_STAT2_100BTX) {

		if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {

			/*set Emac for 100BaseTX and Full Duplex  */
			p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
		} else {

			/*set Emac for 100BaseTX and Half Duplex  */
			p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
					~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
					| AT91C_EMAC_SPD;
		}

		return TRUE;

	} else {

		if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {

			/*set MII for 10BaseT and Full Duplex  */
			p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
					~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
					| AT91C_EMAC_FD;
		} else {

			/*set MII for 10BaseT and Half Duplex  */
			p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
		}

		return TRUE;
	}

	return FALSE;
}


/*
 * Name:
 *	lxt972_InitPhy
 * Description:
 *	MAC starts checking its link by using parallel detection and
 *	Autonegotiation and the same is set in the MAC configuration registers
 * Arguments:
 *	p_mac - pointer to struct AT91S_EMAC
 * Return value:
 *	TRUE - if link status set succesfully
 *	FALSE - if link status not set
 */
UCHAR lxt972_InitPhy (AT91PS_EMAC p_mac)
{
	UCHAR ret = TRUE;

	at91rm9200_EmacEnableMDIO (p_mac);

	if (!lxt972_GetLinkSpeed (p_mac)) {
		/* Try another time */
		ret = lxt972_GetLinkSpeed (p_mac);
	}

	/* Disable PHY Interrupts */
	at91rm9200_EmacWritePhy (p_mac, PHY_LXT971_INT_ENABLE, 0);

	at91rm9200_EmacDisableMDIO (p_mac);

	return (ret);
}


/*
 * Name:
 *	lxt972_AutoNegotiate
 * Description:
 *	MAC Autonegotiates with the partner status of same is set in the
 *	MAC configuration registers
 * Arguments:
 *	dev - pointer to struct net_device
 * Return value:
 *	TRUE - if link status set successfully
 *	FALSE - if link status not set
 */
UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
{
	unsigned short value;

	/* Set lxt972 control register */
	if (!at91rm9200_EmacReadPhy (p_mac, PHY_BMCR, &value))
		return FALSE;

	/* Restart Auto_negotiation  */
	value |= PHY_BMCR_RST_NEG;
	if (!at91rm9200_EmacWritePhy (p_mac, PHY_BMCR, &value))
		return FALSE;

	/*check AutoNegotiate complete */
	udelay (10000);
	at91rm9200_EmacReadPhy(p_mac, PHY_BMSR, &value);
	if (!(value & PHY_BMSR_AUTN_COMP))
		return FALSE;

	return (lxt972_GetLinkSpeed (p_mac));
}

#endif

#endif	/* CONFIG_DRIVER_ETHER */
Commit	Line	Data
99b0d285 WD	1	/*
	2	*
	3	* (C) Copyright 2003
	4	* Author : Hamid Ikdoumi (Atmel)
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	/*
080bdb7f	26	* Adapted for KwikByte KB920x board: 22APR2005
99b0d285 WD	27	*/
99b0d285 WD	28
080bdb7f	29	#include <common.h>
99b0d285 WD	30	#include <at91rm9200_net.h>
99b0d285 WD	31	#include <net.h>
fec61431	32	#include <miiphy.h>
99b0d285 WD	33	#include <lxt971a.h>
	34
	35	#ifdef CONFIG_DRIVER_ETHER
	36
3a1ed1e1	37	#if defined(CONFIG_CMD_NET)
99b0d285 WD	38
	39	/*
	40	* Name:
	41	* lxt972_IsPhyConnected
	42	* Description:
	43	* Reads the 2 PHY ID registers
	44	* Arguments:
	45	* p_mac - pointer to AT91S_EMAC struct
	46	* Return value:
	47	* TRUE - if id read successfully
	48	* FALSE- if error
	49	*/
080bdb7f	50	unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac)
99b0d285 WD	51	{
	52	unsigned short Id1, Id2;
	53
	54	at91rm9200_EmacEnableMDIO (p_mac);
fec61431 HV	55	at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR1, &Id1);
fec61431 HV	56	at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR2, &Id2);
99b0d285 WD	57	at91rm9200_EmacDisableMDIO (p_mac);
	58
	59	if ((Id1 == (0x0013)) && ((Id2 & 0xFFF0) == 0x78E0))
	60	return TRUE;
	61
	62	return FALSE;
	63	}
	64
	65	/*
	66	* Name:
	67	* lxt972_GetLinkSpeed
	68	* Description:
	69	* Link parallel detection status of MAC is checked and set in the
	70	* MAC configuration registers
	71	* Arguments:
	72	* p_mac - pointer to MAC
	73	* Return value:
	74	* TRUE - if link status set succesfully
	75	* FALSE - if link status not set
	76	*/
080bdb7f	77	UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac)
99b0d285 WD	78	{
	79	unsigned short stat1;
	80
	81	if (!at91rm9200_EmacReadPhy (p_mac, PHY_LXT971_STAT2, &stat1))
	82	return FALSE;
	83
	84	if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link status up? */
	85	return FALSE;
	86
	87	if (stat1 & PHY_LXT971_STAT2_100BTX) {
	88
	89	if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
	90
	91	/set Emac for 100BaseTX and Full Duplex /
	92	p_mac->EMAC_CFG \|= AT91C_EMAC_SPD \| AT91C_EMAC_FD;
	93	} else {
	94
	95	/set Emac for 100BaseTX and Half Duplex /
	96	p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
	97	~(AT91C_EMAC_SPD \| AT91C_EMAC_FD))
	98	\| AT91C_EMAC_SPD;
	99	}
	100
	101	return TRUE;
	102
	103	} else {
	104
	105	if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
	106
	107	/set MII for 10BaseT and Full Duplex /
	108	p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
	109	~(AT91C_EMAC_SPD \| AT91C_EMAC_FD))
	110	\| AT91C_EMAC_FD;
	111	} else {
	112
	113	/set MII for 10BaseT and Half Duplex /
	114	p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD \| AT91C_EMAC_FD);
	115	}
	116
	117	return TRUE;
	118	}
	119
	120	return FALSE;
	121	}
	122
	123
	124	/*
	125	* Name:
	126	* lxt972_InitPhy
	127	* Description:
	128	* MAC starts checking its link by using parallel detection and
	129	* Autonegotiation and the same is set in the MAC configuration registers
	130	* Arguments:
	131	* p_mac - pointer to struct AT91S_EMAC
	132	* Return value:
	133	* TRUE - if link status set succesfully
	134	* FALSE - if link status not set
	135	*/
080bdb7f	136	UCHAR lxt972_InitPhy (AT91PS_EMAC p_mac)
99b0d285 WD	137	{
	138	UCHAR ret = TRUE;
	139
	140	at91rm9200_EmacEnableMDIO (p_mac);
	141
	142	if (!lxt972_GetLinkSpeed (p_mac)) {
	143	/* Try another time */
	144	ret = lxt972_GetLinkSpeed (p_mac);
	145	}
	146
	147	/* Disable PHY Interrupts */
	148	at91rm9200_EmacWritePhy (p_mac, PHY_LXT971_INT_ENABLE, 0);
	149
	150	at91rm9200_EmacDisableMDIO (p_mac);
	151
	152	return (ret);
	153	}
	154
	155
	156	/*
	157	* Name:
	158	* lxt972_AutoNegotiate
	159	* Description:
	160	* MAC Autonegotiates with the partner status of same is set in the
	161	* MAC configuration registers
	162	* Arguments:
	163	* dev - pointer to struct net_device
	164	* Return value:
	165	* TRUE - if link status set successfully
	166	* FALSE - if link status not set
	167	*/
080bdb7f	168	UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
99b0d285 WD	169	{
	170	unsigned short value;
	171
	172	/* Set lxt972 control register */
fec61431	173	if (!at91rm9200_EmacReadPhy (p_mac, PHY_BMCR, &value))
99b0d285 WD	174	return FALSE;
	175
	176	/* Restart Auto_negotiation */
fec61431 HV	177	value \|= PHY_BMCR_RST_NEG;
fec61431 HV	178	if (!at91rm9200_EmacWritePhy (p_mac, PHY_BMCR, &value))
99b0d285 WD	179	return FALSE;
	180
	181	/check AutoNegotiate complete /
	182	udelay (10000);
fec61431 HV	183	at91rm9200_EmacReadPhy(p_mac, PHY_BMSR, &value);
fec61431 HV	184	if (!(value & PHY_BMSR_AUTN_COMP))
99b0d285 WD	185	return FALSE;
	186
	187	return (lxt972_GetLinkSpeed (p_mac));
	188	}
	189
3a1ed1e1	190	#endif
99b0d285 WD	191
99b0d285 WD	192	#endif /* CONFIG_DRIVER_ETHER */