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31d34c6c ML |
1 | /* |
2 | * Copyright 2015 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <asm/arch/fsl_serdes.h> | |
9 | #include <asm/arch-fsl-lsch3/immap_lsch3.h> | |
10 | ||
11 | struct serdes_config { | |
12 | u8 protocol; | |
13 | u8 lanes[SRDS_MAX_LANES]; | |
14 | }; | |
15 | ||
16 | static struct serdes_config serdes1_cfg_tbl[] = { | |
17 | /* SerDes 1 */ | |
18 | {0x03, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2 } }, | |
19 | {0x05, {PCIE2, PCIE2, PCIE2, PCIE2, SGMII4, SGMII3, SGMII2, SGMII1 } }, | |
20 | {0x07, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2, | |
21 | SGMII1 } }, | |
22 | {0x09, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2, | |
23 | SGMII1 } }, | |
24 | {0x0A, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2, | |
25 | SGMII1 } }, | |
26 | {0x0C, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2, | |
27 | SGMII1 } }, | |
28 | {0x0E, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, SGMII2, | |
29 | SGMII1 } }, | |
30 | {0x26, {SGMII8, SGMII7, SGMII6, SGMII5, SGMII4, SGMII3, XFI2, XFI1 } }, | |
31 | {0x28, {SGMII8, SGMII7, SGMII6, SGMII5, XFI4, XFI3, XFI2, XFI1 } }, | |
32 | {0x2A, {XFI8, XFI7, XFI6, XFI5, XFI4, XFI3, XFI2, XFI1 } }, | |
33 | {0x2B, {SGMII8, SGMII7, SGMII6, SGMII5, XAUI1, XAUI1, XAUI1, XAUI1 } }, | |
34 | {0x32, {XAUI2, XAUI2, XAUI2, XAUI2, XAUI1, XAUI1, XAUI1, XAUI1 } }, | |
ee976651 PK |
35 | {0x33, {PCIE2, PCIE2, PCIE2, PCIE2, QSGMII_C, QSGMII_D, QSGMII_A, |
36 | QSGMII_B} }, | |
37 | {0x35, {QSGMII_C, QSGMII_D, QSGMII_A, PCIE2, XFI4, XFI3, XFI2, XFI1 } }, | |
31d34c6c ML |
38 | {} |
39 | }; | |
40 | static struct serdes_config serdes2_cfg_tbl[] = { | |
41 | /* SerDes 2 */ | |
42 | {0x07, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15, | |
43 | SGMII16 } }, | |
44 | {0x09, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15, | |
45 | SGMII16 } }, | |
46 | {0x0A, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15, | |
47 | SGMII16 } }, | |
48 | {0x0C, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15, | |
49 | SGMII16 } }, | |
50 | {0x0E, {SGMII9, SGMII10, SGMII11, SGMII12, SGMII13, SGMII14, SGMII15, | |
51 | SGMII16 } }, | |
52 | {0x3D, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3 } }, | |
53 | {0x3E, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3, PCIE3 } }, | |
54 | {0x3F, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, | |
55 | {0x40, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } }, | |
56 | {0x41, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA2 } }, | |
57 | {0x42, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SATA1, SATA2 } }, | |
58 | {0x43, {PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, SATA1, SATA2 } }, | |
59 | {0x44, {PCIE3, PCIE3, PCIE3, PCIE3, NONE, NONE, SATA1, SATA2 } }, | |
60 | {0x45, {PCIE3, SGMII10, SGMII11, SGMII12, PCIE4, SGMII14, SGMII15, | |
61 | SGMII16 } }, | |
62 | {0x47, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, PCIE4, | |
63 | PCIE4 } }, | |
64 | {0x49, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, | |
65 | SATA2 } }, | |
66 | {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1, | |
67 | SATA2 } }, | |
68 | {} | |
69 | }; | |
70 | ||
71 | static struct serdes_config *serdes_cfg_tbl[] = { | |
72 | serdes1_cfg_tbl, | |
73 | serdes2_cfg_tbl, | |
74 | }; | |
75 | ||
76 | enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) | |
77 | { | |
78 | struct serdes_config *ptr; | |
79 | ||
80 | if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) | |
81 | return 0; | |
82 | ||
83 | ptr = serdes_cfg_tbl[serdes]; | |
84 | while (ptr->protocol) { | |
85 | if (ptr->protocol == cfg) | |
86 | return ptr->lanes[lane]; | |
87 | ptr++; | |
88 | } | |
89 | ||
90 | return 0; | |
91 | } | |
92 | ||
93 | int is_serdes_prtcl_valid(int serdes, u32 prtcl) | |
94 | { | |
95 | int i; | |
96 | struct serdes_config *ptr; | |
97 | ||
98 | if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) | |
99 | return 0; | |
100 | ||
101 | ptr = serdes_cfg_tbl[serdes]; | |
102 | while (ptr->protocol) { | |
103 | if (ptr->protocol == prtcl) | |
104 | break; | |
105 | ptr++; | |
106 | } | |
107 | ||
108 | if (!ptr->protocol) | |
109 | return 0; | |
110 | ||
111 | for (i = 0; i < SRDS_MAX_LANES; i++) { | |
112 | if (ptr->lanes[i] != NONE) | |
113 | return 1; | |
114 | } | |
115 | ||
116 | return 0; | |
117 | } |