[people/ms/u-boot.git] / arch / arm / dts / imx7d-sdb.dts

/*
 * Copyright 2017 NXP
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "Freescale i.MX7 SabreSD Board";
	compatible = "fsl,imx7d-sdb", "fsl,imx7d";

	memory {
		reg = <0x80000000 0x80000000>;
	};

	spi4 {
		compatible = "spi-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi1>;
		status = "okay";
		gpio-sck = <&gpio1 13 0>;
		gpio-mosi = <&gpio1 9 0>;
		cs-gpios = <&gpio1 12 0>;
		num-chipselects = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		gpio_spi: gpio_spi@0 {
			compatible = "fairchild,74hc595";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0>;
			registers-number = <1>;
			registers-default = /bits/ 8 <0x74>; /* Enable PERI_3V3, SENSOR_RST_B and HDMI_RST*/
			spi-max-frequency = <100000>;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb_otg1_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb_otg1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_usb_otg2_vbus: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "usb_otg2_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_sd1_vmmc: regulator@3 {
			compatible = "regulator-fixed";
			regulator-name = "VDD_SD1";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
			startup-delay-us = <200000>;
			enable-active-high;
		};
	};
};

&iomuxc {
	imx7d-sdb {
		pinctrl_spi1: spi1grp {
			fsl,pins = <
				MX7D_PAD_GPIO1_IO09__GPIO1_IO9	0x59
				MX7D_PAD_GPIO1_IO12__GPIO1_IO12	0x59
				MX7D_PAD_GPIO1_IO13__GPIO1_IO13	0x59
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX7D_PAD_I2C1_SDA__I2C1_SDA	0x4000007f
				MX7D_PAD_I2C1_SCL__I2C1_SCL	0x4000007f
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX7D_PAD_I2C2_SDA__I2C2_SDA	0x4000007f
				MX7D_PAD_I2C2_SCL__I2C2_SCL	0x4000007f
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX7D_PAD_I2C3_SDA__I2C3_SDA	0x4000007f
				MX7D_PAD_I2C3_SCL__I2C3_SCL	0x4000007f
			>;
		};

		pinctrl_i2c4: i2c4grp {
			fsl,pins = <
				MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA	0x4000007f
				MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL	0x4000007f
			>;
		};

		pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
			fsl,pins = <
				MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59 /* CD */
				MX7D_PAD_SD1_WP__GPIO5_IO1		0x59 /* WP */
				MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x59 /* vmmc */
				MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59 /* VSELECT */
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX7D_PAD_SD1_CMD__SD1_CMD		0x59
				MX7D_PAD_SD1_CLK__SD1_CLK		0x19
				MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
				MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
				MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
				MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
			>;
		};

		pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
			fsl,pins = <
				MX7D_PAD_SD1_CMD__SD1_CMD		0x5a
				MX7D_PAD_SD1_CLK__SD1_CLK		0x1a
				MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5a
				MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5a
				MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5a
				MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5a
			>;
		};

		pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
			fsl,pins = <
				MX7D_PAD_SD1_CMD__SD1_CMD		0x5b
				MX7D_PAD_SD1_CLK__SD1_CLK		0x1b
				MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5b
				MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5b
				MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5b
				MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5b
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX7D_PAD_SD2_CMD__SD2_CMD       0x59
				MX7D_PAD_SD2_CLK__SD2_CLK       0x19
				MX7D_PAD_SD2_DATA0__SD2_DATA0   0x59
				MX7D_PAD_SD2_DATA1__SD2_DATA1   0x59
				MX7D_PAD_SD2_DATA2__SD2_DATA2   0x59
				MX7D_PAD_SD2_DATA3__SD2_DATA3   0x59
				MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	0x19 /* WL_REG_ON */
				MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20	0x19 /* WL_HOST_WAKE */
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
			fsl,pins = <
				MX7D_PAD_SD2_CMD__SD2_CMD		0x5a
				MX7D_PAD_SD2_CLK__SD2_CLK		0x1a
				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5a
				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5a
				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5a
				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5a
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
			fsl,pins = <
				MX7D_PAD_SD2_CMD__SD2_CMD		0x5b
				MX7D_PAD_SD2_CLK__SD2_CLK		0x1b
				MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5b
				MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5b
				MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5b
				MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5b
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				MX7D_PAD_SD3_CMD__SD3_CMD		0x59
				MX7D_PAD_SD3_CLK__SD3_CLK		0x19
				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
				MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
			>;
		};

		pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
			fsl,pins = <
				MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
				MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1a
			>;
		};

		pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
			fsl,pins = <
				MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
				MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
				MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1b
			>;
		};
	};
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: pfuze3000@08 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&reg_sd1_vmmc>;
	fsl,tuning-start-tap = <20>;
	fsl,tuning-step= <2>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
	non-removable;
	fsl,tuning-start-tap = <20>;
	fsl,tuning-step= <2>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	bus-width = <8>;
	non-removable;
	fsl,tuning-start-tap = <20>;
	fsl,tuning-step= <2>;
	status = "okay";
};
Commit	Line	Data
896d2e82 PF	1	/*
	2	* Copyright 2017 NXP
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	/dts-v1/;
	8
	9	#include "imx7d.dtsi"
	10
	11	/ {
	12	model = "Freescale i.MX7 SabreSD Board";
	13	compatible = "fsl,imx7d-sdb", "fsl,imx7d";
	14
	15	memory {
	16	reg = <0x80000000 0x80000000>;
	17	};
	18
9880eed8 PF	19	spi4 {
	20	compatible = "spi-gpio";
	21	pinctrl-names = "default";
	22	pinctrl-0 = <&pinctrl_spi1>;
	23	status = "okay";
	24	gpio-sck = <&gpio1 13 0>;
	25	gpio-mosi = <&gpio1 9 0>;
	26	cs-gpios = <&gpio1 12 0>;
	27	num-chipselects = <1>;
	28	#address-cells = <1>;
	29	#size-cells = <0>;
	30
	31	gpio_spi: gpio_spi@0 {
	32	compatible = "fairchild,74hc595";
	33	gpio-controller;
	34	#gpio-cells = <2>;
	35	reg = <0>;
	36	registers-number = <1>;
	37	registers-default = /bits/ 8 <0x74>; /* Enable PERI_3V3, SENSOR_RST_B and HDMI_RST*/
	38	spi-max-frequency = <100000>;
	39	};
	40	};
63f3401d PF	41
	42	regulators {
	43	compatible = "simple-bus";
	44	#address-cells = <1>;
	45	#size-cells = <0>;
	46
	47	reg_usb_otg1_vbus: regulator@0 {
	48	compatible = "regulator-fixed";
	49	reg = <0>;
	50	regulator-name = "usb_otg1_vbus";
	51	regulator-min-microvolt = <5000000>;
	52	regulator-max-microvolt = <5000000>;
	53	gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
	54	enable-active-high;
	55	};
	56
	57	reg_usb_otg2_vbus: regulator@1 {
	58	compatible = "regulator-fixed";
	59	reg = <1>;
	60	regulator-name = "usb_otg2_vbus";
	61	regulator-min-microvolt = <5000000>;
	62	regulator-max-microvolt = <5000000>;
	63	gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
	64	enable-active-high;
	65	};
	66
	67	reg_sd1_vmmc: regulator@3 {
	68	compatible = "regulator-fixed";
	69	regulator-name = "VDD_SD1";
	70	regulator-min-microvolt = <3300000>;
	71	regulator-max-microvolt = <3300000>;
	72	gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
	73	startup-delay-us = <200000>;
	74	enable-active-high;
	75	};
	76	};
9880eed8 PF	77	};
	78
	79	&iomuxc {
	80	imx7d-sdb {
	81	pinctrl_spi1: spi1grp {
	82	fsl,pins = <
	83	MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
	84	MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
	85	MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
	86	>;
	87	};
00ad3a9f PF	88
	89	pinctrl_i2c1: i2c1grp {
	90	fsl,pins = <
	91	MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
	92	MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
	93	>;
	94	};
	95
	96	pinctrl_i2c2: i2c2grp {
	97	fsl,pins = <
	98	MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
	99	MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
	100	>;
	101	};
	102
	103	pinctrl_i2c3: i2c3grp {
	104	fsl,pins = <
	105	MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
	106	MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
	107	>;
	108	};
	109
	110	pinctrl_i2c4: i2c4grp {
	111	fsl,pins = <
	112	MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
	113	MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
	114	>;
	115	};
e02ec19f PF	116
	117	pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
	118	fsl,pins = <
	119	MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
	120	MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
	121	MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
	122	MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */
	123	>;
	124	};
	125
	126	pinctrl_usdhc1: usdhc1grp {
	127	fsl,pins = <
	128	MX7D_PAD_SD1_CMD__SD1_CMD 0x59
	129	MX7D_PAD_SD1_CLK__SD1_CLK 0x19
	130	MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
	131	MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
	132	MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
	133	MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
	134	>;
	135	};
	136
893d98d9 PF	137	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
	138	fsl,pins = <
	139	MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
	140	MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
	141	MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
	142	MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
	143	MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
	144	MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
	145	>;
	146	};
	147
	148	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
	149	fsl,pins = <
	150	MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
	151	MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
	152	MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
	153	MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
	154	MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
	155	MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
	156	>;
	157	};
	158
e02ec19f PF	159	pinctrl_usdhc2: usdhc2grp {
	160	fsl,pins = <
	161	MX7D_PAD_SD2_CMD__SD2_CMD 0x59
	162	MX7D_PAD_SD2_CLK__SD2_CLK 0x19
	163	MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
	164	MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
	165	MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
	166	MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
	167	MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x19 /* WL_REG_ON */
	168	MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x19 /* WL_HOST_WAKE */
	169	>;
	170	};
	171
893d98d9 PF	172	pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
	173	fsl,pins = <
	174	MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
	175	MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
	176	MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
	177	MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
	178	MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
	179	MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
	180	>;
	181	};
	182
	183	pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
	184	fsl,pins = <
	185	MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
	186	MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
	187	MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
	188	MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
	189	MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
	190	MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
	191	>;
	192	};
	193
e02ec19f PF	194	pinctrl_usdhc3: usdhc3grp {
	195	fsl,pins = <
	196	MX7D_PAD_SD3_CMD__SD3_CMD 0x59
	197	MX7D_PAD_SD3_CLK__SD3_CLK 0x19
	198	MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
	199	MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
	200	MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
	201	MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
	202	MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
	203	MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
	204	MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
	205	MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
	206	MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
	207	>;
	208	};
893d98d9 PF	209
	210	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
	211	fsl,pins = <
	212	MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
	213	MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
	214	MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
	215	MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
	216	MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
	217	MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
	218	MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
	219	MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
	220	MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
	221	MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
	222	MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
	223	>;
	224	};
	225
	226	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
	227	fsl,pins = <
	228	MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
	229	MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
	230	MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
	231	MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
	232	MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
	233	MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
	234	MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
	235	MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
	236	MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
	237	MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
	238	MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
	239	>;
	240	};
9880eed8	241	};
00ad3a9f PF	242	};
	243
	244	&i2c1 {
	245	clock-frequency = <100000>;
	246	pinctrl-names = "default";
	247	pinctrl-0 = <&pinctrl_i2c1>;
	248	status = "okay";
	249
	250	pmic: pfuze3000@08 {
	251	compatible = "fsl,pfuze3000";
	252	reg = <0x08>;
	253
	254	regulators {
	255	sw1a_reg: sw1a {
	256	regulator-min-microvolt = <700000>;
	257	regulator-max-microvolt = <3300000>;
	258	regulator-boot-on;
	259	regulator-always-on;
	260	regulator-ramp-delay = <6250>;
	261	};
	262
	263	/* use sw1c_reg to align with pfuze100/pfuze200 */
	264	sw1c_reg: sw1b {
	265	regulator-min-microvolt = <700000>;
	266	regulator-max-microvolt = <1475000>;
	267	regulator-boot-on;
	268	regulator-always-on;
	269	regulator-ramp-delay = <6250>;
	270	};
	271
	272	sw2_reg: sw2 {
	273	regulator-min-microvolt = <1500000>;
	274	regulator-max-microvolt = <1850000>;
	275	regulator-boot-on;
	276	regulator-always-on;
	277	};
	278
	279	sw3a_reg: sw3 {
	280	regulator-min-microvolt = <900000>;
	281	regulator-max-microvolt = <1650000>;
	282	regulator-boot-on;
	283	regulator-always-on;
	284	};
	285
	286	swbst_reg: swbst {
	287	regulator-min-microvolt = <5000000>;
	288	regulator-max-microvolt = <5150000>;
	289	};
	290
	291	snvs_reg: vsnvs {
	292	regulator-min-microvolt = <1000000>;
	293	regulator-max-microvolt = <3000000>;
	294	regulator-boot-on;
	295	regulator-always-on;
	296	};
	297
	298	vref_reg: vrefddr {
	299	regulator-boot-on;
	300	regulator-always-on;
	301	};
	302
	303	vgen1_reg: vldo1 {
	304	regulator-min-microvolt = <1800000>;
	305	regulator-max-microvolt = <3300000>;
306	regulator-always-on;
307	};
308
309	vgen2_reg: vldo2 {
310	regulator-min-microvolt = <800000>;
311	regulator-max-microvolt = <1550000>;
312	regulator-always-on;
313	};
314
315	vgen3_reg: vccsd {
316	regulator-min-microvolt = <2850000>;
317	regulator-max-microvolt = <3300000>;
318	regulator-always-on;
319	};
320
321	vgen4_reg: v33 {
322	regulator-min-microvolt = <2850000>;
323	regulator-max-microvolt = <3300000>;
324	regulator-always-on;
325	};
326
327	vgen5_reg: vldo3 {
328	regulator-min-microvolt = <1800000>;
329	regulator-max-microvolt = <3300000>;
330	regulator-always-on;
331	};
332
333	vgen6_reg: vldo4 {
334	regulator-min-microvolt = <1800000>;
335	regulator-max-microvolt = <3300000>;
336	regulator-always-on;
337	};
338	};
339	};
340	};
341
342	&i2c2 {
343	clock-frequency = <100000>;
344	pinctrl-names = "default";
345	pinctrl-0 = <&pinctrl_i2c2>;
346	status = "okay";
347	};
348
349	&i2c3 {
350	clock-frequency = <100000>;
351	pinctrl-names = "default";
352	pinctrl-0 = <&pinctrl_i2c3>;
353	status = "okay";
354	};
9880eed8	355
00ad3a9f PF	356	&i2c4 {
	357	clock-frequency = <100000>;
	358	pinctrl-names = "default";
	359	pinctrl-0 = <&pinctrl_i2c4>;
	360	status = "okay";
896d2e82	361	};
e02ec19f PF	362
	363	&usdhc1 {
	364	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	365	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
893d98d9 PF	366	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
893d98d9 PF	367	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
e02ec19f PF	368	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	369	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	370	vmmc-supply = <&reg_sd1_vmmc>;
893d98d9 PF	371	fsl,tuning-start-tap = <20>;
893d98d9 PF	372	fsl,tuning-step= <2>;
e02ec19f PF	373	status = "okay";
	374	};
	375
	376	&usdhc2 {
	377	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	378	pinctrl-0 = <&pinctrl_usdhc2>;
893d98d9 PF	379	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
893d98d9 PF	380	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
e02ec19f	381	non-removable;
893d98d9 PF	382	fsl,tuning-start-tap = <20>;
893d98d9 PF	383	fsl,tuning-step= <2>;
e02ec19f PF	384	status = "okay";
	385	};
	386
	387	&usdhc3 {
	388	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	389	pinctrl-0 = <&pinctrl_usdhc3>;
893d98d9 PF	390	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
893d98d9 PF	391	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
e02ec19f PF	392	bus-width = <8>;
e02ec19f PF	393	non-removable;
893d98d9 PF	394	fsl,tuning-start-tap = <20>;
893d98d9 PF	395	fsl,tuning-step= <2>;
e02ec19f PF	396	status = "okay";
e02ec19f PF	397	};