[people/ms/u-boot.git] / arch / arm / dts / zynq-zc770-xm013.dts

/*
 * Xilinx ZC770 XM013 board DTS
 *
 * Copyright (C) 2013 Xilinx, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
	compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
	model = "Xilinx Zynq";

	aliases {
		ethernet0 = &gem1;
		i2c0 = &i2c1;
		serial0 = &uart0;
		spi0 = &spi0;
	};

	chosen {
		bootargs = "root=/dev/ram rw earlyprintk";
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};
};

&can1 {
	status = "okay";
};

&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@7 {
		reg = <7>;
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;

	si570: clock-generator@55 {
		#clock-cells = <0>;
		compatible = "silabs,si570";
		temperature-stability = <50>;
		reg = <0x55>;
		factory-fout = <156250000>;
		clock-frequency = <148500000>;
	};
};

&spi0 {
	status = "okay";
	num-cs = <4>;
	is-decoded-cs = <0>;
	eeprom: at25@0 {
		at25,byte-len = <8192>;
		at25,addr-mode = <2>;
		at25,page-size = <32>;

		compatible = "atmel,at25";
		reg = <2>;
		spi-max-frequency = <1000000>;
	};
};

&uart0 {
	u-boot,dm-pre-reloc;
	status = "okay";
};
Commit	Line	Data
9e0802bf JT	1	/*
	2	* Xilinx ZC770 XM013 board DTS
	3	*
	4	* Copyright (C) 2013 Xilinx, Inc.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8	/dts-v1/;
	9	#include "zynq-7000.dtsi"
	10
	11	/ {
9e0802bf	12	compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
5c45b166	13	model = "Xilinx Zynq";
7d34c5de	14
9f9d41ba	15	aliases {
5c45b166 MS	16	ethernet0 = &gem1;
5c45b166 MS	17	i2c0 = &i2c1;
9f9d41ba	18	serial0 = &uart0;
5c45b166	19	spi0 = &spi0;
9f9d41ba MY	20	};
9f9d41ba MY	21
5c45b166	22	chosen {
4691941b MS	23	bootargs = "root=/dev/ram rw earlyprintk";
4691941b MS	24	stdout-path = "serial0:115200n8";
5c45b166 MS	25	};
5c45b166 MS	26
f0600af2	27	memory {
7d34c5de	28	device_type = "memory";
5c45b166 MS	29	reg = <0x0 0x40000000>;
	30	};
	31	};
	32
5c45b166 MS	33	&can1 {
	34	status = "okay";
	35	};
	36
	37	&gem1 {
	38	status = "okay";
	39	phy-mode = "rgmii-id";
	40	phy-handle = <&ethernet_phy>;
	41
	42	ethernet_phy: ethernet-phy@7 {
	43	reg = <7>;
7d34c5de	44	};
9e0802bf	45	};
5c45b166 MS	46
	47	&i2c1 {
	48	status = "okay";
	49	clock-frequency = <400000>;
	50
	51	si570: clock-generator@55 {
	52	#clock-cells = <0>;
	53	compatible = "silabs,si570";
	54	temperature-stability = <50>;
	55	reg = <0x55>;
	56	factory-fout = <156250000>;
	57	clock-frequency = <148500000>;
	58	};
	59	};
	60
7ebf67a3 MS	61	&spi0 {
	62	status = "okay";
	63	num-cs = <4>;
	64	is-decoded-cs = <0>;
	65	eeprom: at25@0 {
	66	at25,byte-len = <8192>;
	67	at25,addr-mode = <2>;
	68	at25,page-size = <32>;
	69
	70	compatible = "atmel,at25";
	71	reg = <2>;
	72	spi-max-frequency = <1000000>;
	73	};
	74	};
	75
5c45b166	76	&uart0 {
035c6b27	77	u-boot,dm-pre-reloc;
5c45b166 MS	78	status = "okay";
5c45b166 MS	79	};