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Commit | Line | Data |
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62d7fe7c CN |
1 | /* |
2 | * sys_proto.h | |
3 | * | |
4 | * System information header | |
5 | * | |
6 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
62d7fe7c CN |
9 | */ |
10 | ||
11 | #ifndef _SYS_PROTO_H_ | |
12 | #define _SYS_PROTO_H_ | |
9721027a | 13 | #include <asm/arch/cpu.h> |
62d7fe7c CN |
14 | |
15 | #define BOARD_REV_ID 0x0 | |
62d7fe7c CN |
16 | |
17 | u32 get_cpu_rev(void); | |
18 | u32 get_sysboot_value(void); | |
19 | ||
20 | #ifdef CONFIG_DISPLAY_CPUINFO | |
21 | int print_cpuinfo(void); | |
22 | #endif | |
23 | ||
6995a289 | 24 | extern struct ctrl_stat *cstat; |
62d7fe7c | 25 | u32 get_device_type(void); |
4596dcc1 | 26 | void save_omap_boot_params(void); |
8a8f084e | 27 | void setup_clocks_for_console(void); |
7b9c5d0b | 28 | void mpu_pll_config_val(int mpull_m); |
b971dfad | 29 | void ddr_pll_config(unsigned int ddrpll_M); |
db7dd810 | 30 | |
8eb16b7f | 31 | void sdelay(unsigned long); |
98f92001 TR |
32 | |
33 | struct gpmc_cs; | |
8eb16b7f | 34 | void gpmc_init(void); |
6b3dcc45 MJ |
35 | void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, |
36 | u32 size); | |
da634ae3 | 37 | void omap_nand_switch_ecc(uint32_t, uint32_t); |
49f78365 | 38 | |
0660481a HS |
39 | void set_uart_mux_conf(void); |
40 | void set_mux_conf_regs(void); | |
41 | void sdram_init(void); | |
94d77fb6 | 42 | u32 wait_on_value(u32, u32, void *, u32); |
0660481a HS |
43 | #ifdef CONFIG_NOR_BOOT |
44 | void enable_norboot_pin_mux(void); | |
45 | #endif | |
6a0d803c | 46 | void am33xx_spl_board_init(void); |
9721027a TR |
47 | int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev); |
48 | int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); | |
62d7fe7c | 49 | #endif |