[people/ms/u-boot.git] / arch / arm / include / asm / arch-bcm2835 / mbox.h

/*
 * (C) Copyright 2012 Stephen Warren
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _BCM2835_MBOX_H
#define _BCM2835_MBOX_H

#include <linux/compiler.h>

/*
 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
 * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
 * However, the VideoCore actually controls the initial SoC boot, and hides
 * much of the hardware behind a protocol. This protocol is transported
 * using the SoC's mailbox hardware module.
 *
 * The mailbox hardware supports passing 32-bit values back and forth.
 * Presumably by software convention of the firmware, the bottom 4 bits of the
 * value are used to indicate a logical channel, and the upper 28 bits are the
 * actual payload. Various channels exist using these simple raw messages. See
 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
 * example, the messages on the power management channel are a bitmask of
 * devices whose power should be enabled.
 *
 * The property mailbox channel passes messages that contain the (16-byte
 * aligned) ARM physical address of a memory buffer. This buffer is passed to
 * the VC for processing, is modified in-place by the VC, and the address then
 * passed back to the ARM CPU as the response mailbox message to indicate
 * request completion. The buffers have a generic and extensible format; each
 * buffer contains a standard header, a list of "tags", and a terminating zero
 * entry. Each tag contains an ID indicating its type, and length fields for
 * generic parsing. With some limitations, an arbitrary set of tags may be
 * combined together into a single message buffer. This file defines structs
 * representing the header and many individual tag layouts and IDs.
 */

/* Raw mailbox HW */

#define BCM2835_MBOX_PHYSADDR	0x2000b880

struct bcm2835_mbox_regs {
	u32 read;
	u32 rsvd0[5];
	u32 status;
	u32 config;
	u32 write;
};

#define BCM2835_MBOX_STATUS_WR_FULL	0x80000000
#define BCM2835_MBOX_STATUS_RD_EMPTY	0x40000000

/* Lower 4-bits are channel ID */
#define BCM2835_CHAN_MASK		0xf
#define BCM2835_MBOX_PACK(chan, data)	(((data) & (~BCM2835_CHAN_MASK)) | \
					 (chan & BCM2835_CHAN_MASK))
#define BCM2835_MBOX_UNPACK_CHAN(val)	((val) & BCM2835_CHAN_MASK)
#define BCM2835_MBOX_UNPACK_DATA(val)	((val) & (~BCM2835_CHAN_MASK))

/* Property mailbox buffer structures */

#define BCM2835_MBOX_PROP_CHAN		8

/* All message buffers must start with this header */
struct bcm2835_mbox_hdr {
	u32 buf_size;
	u32 code;
};

#define BCM2835_MBOX_REQ_CODE		0
#define BCM2835_MBOX_RESP_CODE_SUCCESS	0x80000000

#define BCM2835_MBOX_INIT_HDR(_m_) { \
		memset((_m_), 0, sizeof(*(_m_))); \
		(_m_)->hdr.buf_size = sizeof(*(_m_)); \
		(_m_)->hdr.code = 0; \
		(_m_)->end_tag = 0; \
	}

/*
 * A message buffer contains a list of tags. Each tag must also start with
 * a standardized header.
 */
struct bcm2835_mbox_tag_hdr {
	u32 tag;
	u32 val_buf_size;
	u32 val_len;
};

#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
		(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
		(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
		(_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
	}

#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
		(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
		(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
		(_t_)->tag_hdr.val_len = 0; \
	}

/* When responding, the VC sets this bit in val_len to indicate a response */
#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE	0x80000000

/*
 * Below we define the ID and struct for many possible tags. This header only
 * defines individual tag structs, not entire message structs, since in
 * general an arbitrary set of tags may be combined into a single message.
 * Clients of the mbox API are expected to define their own overall message
 * structures by combining the header, a set of tags, and a terminating
 * entry. For example,
 *
 * struct msg {
 *     struct bcm2835_mbox_hdr hdr;
 *     struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
 *     ... perhaps other tags here ...
 *     u32 end_tag;
 * };
 */

#define BCM2835_MBOX_TAG_GET_BOARD_REV	0x00010002

/*
 * 0x2..0xf from:
 * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
 * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
 * 0x10, 0x11 from swarren's testing
 */
#define BCM2835_BOARD_REV_B_I2C0_2	0x2
#define BCM2835_BOARD_REV_B_I2C0_3	0x3
#define BCM2835_BOARD_REV_B_I2C1_4	0x4
#define BCM2835_BOARD_REV_B_I2C1_5	0x5
#define BCM2835_BOARD_REV_B_I2C1_6	0x6
#define BCM2835_BOARD_REV_A_7		0x7
#define BCM2835_BOARD_REV_A_8		0x8
#define BCM2835_BOARD_REV_A_9		0x9
#define BCM2835_BOARD_REV_B_REV2_d	0xd
#define BCM2835_BOARD_REV_B_REV2_e	0xe
#define BCM2835_BOARD_REV_B_REV2_f	0xf
#define BCM2835_BOARD_REV_B_PLUS	0x10
#define BCM2835_BOARD_REV_CM		0x11
#define BCM2835_BOARD_REV_A_PLUS	0x12

struct bcm2835_mbox_tag_get_board_rev {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
		} req;
		struct {
			u32 rev;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS	0x00010003

struct bcm2835_mbox_tag_get_mac_address {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
		} req;
		struct {
			u8 mac[6];
			u8 pad[2];
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_ARM_MEMORY		0x00010005

struct bcm2835_mbox_tag_get_arm_mem {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
		} req;
		struct {
			u32 mem_base;
			u32 mem_size;
		} resp;
	} body;
};

#define BCM2835_MBOX_POWER_DEVID_SDHCI		0
#define BCM2835_MBOX_POWER_DEVID_UART0		1
#define BCM2835_MBOX_POWER_DEVID_UART1		2
#define BCM2835_MBOX_POWER_DEVID_USB_HCD	3
#define BCM2835_MBOX_POWER_DEVID_I2C0		4
#define BCM2835_MBOX_POWER_DEVID_I2C1		5
#define BCM2835_MBOX_POWER_DEVID_I2C2		6
#define BCM2835_MBOX_POWER_DEVID_SPI		7
#define BCM2835_MBOX_POWER_DEVID_CCP2TX		8

#define BCM2835_MBOX_POWER_STATE_RESP_ON	(1 << 0)
/* Device doesn't exist */
#define BCM2835_MBOX_POWER_STATE_RESP_NODEV	(1 << 1)

#define BCM2835_MBOX_TAG_GET_POWER_STATE	0x00020001

struct bcm2835_mbox_tag_get_power_state {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			u32 device_id;
		} req;
		struct {
			u32 device_id;
			u32 state;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_SET_POWER_STATE	0x00028001

#define BCM2835_MBOX_SET_POWER_STATE_REQ_ON	(1 << 0)
#define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT	(1 << 1)

struct bcm2835_mbox_tag_set_power_state {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			u32 device_id;
			u32 state;
		} req;
		struct {
			u32 device_id;
			u32 state;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_CLOCK_RATE	0x00030002

#define BCM2835_MBOX_CLOCK_ID_EMMC	1
#define BCM2835_MBOX_CLOCK_ID_UART	2
#define BCM2835_MBOX_CLOCK_ID_ARM	3
#define BCM2835_MBOX_CLOCK_ID_CORE	4
#define BCM2835_MBOX_CLOCK_ID_V3D	5
#define BCM2835_MBOX_CLOCK_ID_H264	6
#define BCM2835_MBOX_CLOCK_ID_ISP	7
#define BCM2835_MBOX_CLOCK_ID_SDRAM	8
#define BCM2835_MBOX_CLOCK_ID_PIXEL	9
#define BCM2835_MBOX_CLOCK_ID_PWM	10

struct bcm2835_mbox_tag_get_clock_rate {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			u32 clock_id;
		} req;
		struct {
			u32 clock_id;
			u32 rate_hz;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER	0x00040001

struct bcm2835_mbox_tag_allocate_buffer {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			u32 alignment;
		} req;
		struct {
			u32 fb_address;
			u32 fb_size;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_RELEASE_BUFFER		0x00048001

struct bcm2835_mbox_tag_release_buffer {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
		} req;
		struct {
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_BLANK_SCREEN		0x00040002

struct bcm2835_mbox_tag_blank_screen {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			/* bit 0 means on, other bots reserved */
			u32 state;
		} req;
		struct {
			u32 state;
		} resp;
	} body;
};

/* Physical means output signal */
#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H	0x00040003
#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H	0x00044003
#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H	0x00048003

struct bcm2835_mbox_tag_physical_w_h {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 width;
			u32 height;
		} req;
		struct {
			u32 width;
			u32 height;
		} resp;
	} body;
};

/* Virtual means display buffer */
#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H	0x00040004
#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H	0x00044004
#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H	0x00048004

struct bcm2835_mbox_tag_virtual_w_h {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 width;
			u32 height;
		} req;
		struct {
			u32 width;
			u32 height;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_DEPTH		0x00040005
#define BCM2835_MBOX_TAG_TEST_DEPTH		0x00044005
#define BCM2835_MBOX_TAG_SET_DEPTH		0x00048005

struct bcm2835_mbox_tag_depth {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 bpp;
		} req;
		struct {
			u32 bpp;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER	0x00040006
#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER	0x00044005
#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER	0x00048006

#define BCM2835_MBOX_PIXEL_ORDER_BGR		0
#define BCM2835_MBOX_PIXEL_ORDER_RGB		1

struct bcm2835_mbox_tag_pixel_order {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 order;
		} req;
		struct {
			u32 order;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_ALPHA_MODE		0x00040007
#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE	0x00044007
#define BCM2835_MBOX_TAG_SET_ALPHA_MODE		0x00048007

#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE	0
#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT	1
#define BCM2835_MBOX_ALPHA_MODE_IGNORED		2

struct bcm2835_mbox_tag_alpha_mode {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 alpha;
		} req;
		struct {
			u32 alpha;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_PITCH		0x00040008

struct bcm2835_mbox_tag_pitch {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
		} req;
		struct {
			u32 pitch;
		} resp;
	} body;
};

/* Offset of display window within buffer */
#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET	0x00040009
#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET	0x00044009
#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET	0x00048009

struct bcm2835_mbox_tag_virtual_offset {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 x;
			u32 y;
		} req;
		struct {
			u32 x;
			u32 y;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_OVERSCAN		0x0004000a
#define BCM2835_MBOX_TAG_TEST_OVERSCAN		0x0004400a
#define BCM2835_MBOX_TAG_SET_OVERSCAN		0x0004800a

struct bcm2835_mbox_tag_overscan {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		/* req not used for get */
		struct {
			u32 top;
			u32 bottom;
			u32 left;
			u32 right;
		} req;
		struct {
			u32 top;
			u32 bottom;
			u32 left;
			u32 right;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_GET_PALETTE		0x0004000b

struct bcm2835_mbox_tag_get_palette {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
		} req;
		struct {
			u32 data[1024];
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_TEST_PALETTE		0x0004400b

struct bcm2835_mbox_tag_test_palette {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			u32 offset;
			u32 num_entries;
			u32 data[256];
		} req;
		struct {
			u32 is_invalid;
		} resp;
	} body;
};

#define BCM2835_MBOX_TAG_SET_PALETTE		0x0004800b

struct bcm2835_mbox_tag_set_palette {
	struct bcm2835_mbox_tag_hdr tag_hdr;
	union {
		struct {
			u32 offset;
			u32 num_entries;
			u32 data[256];
		} req;
		struct {
			u32 is_invalid;
		} resp;
	} body;
};

/*
 * Pass a raw u32 message to the VC, and receive a raw u32 back.
 *
 * Returns 0 for success, any other value for error.
 */
int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);

/*
 * Pass a complete property-style buffer to the VC, and wait until it has
 * been processed.
 *
 * This function expects a pointer to the mbox_hdr structure in an attempt
 * to ensure some degree of type safety. However, some number of tags and
 * a termination value are expected to immediately follow the header in
 * memory, as required by the property protocol.
 *
 * Returns 0 for success, any other value for error.
 */
int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);

#endif
Commit	Line	Data
88077280 SW	1	/*
	2	* (C) Copyright 2012 Stephen Warren
	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
88077280 SW	5	*/
	6
	7	#ifndef _BCM2835_MBOX_H
	8	#define _BCM2835_MBOX_H
	9
	10	#include <linux/compiler.h>
	11
	12	/*
	13	* The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
	14	* and the ARM CPU. The ARM CPU is often thought of as the main CPU.
	15	* However, the VideoCore actually controls the initial SoC boot, and hides
	16	* much of the hardware behind a protocol. This protocol is transported
	17	* using the SoC's mailbox hardware module.
	18	*
	19	* The mailbox hardware supports passing 32-bit values back and forth.
	20	* Presumably by software convention of the firmware, the bottom 4 bits of the
	21	* value are used to indicate a logical channel, and the upper 28 bits are the
	22	* actual payload. Various channels exist using these simple raw messages. See
	23	* https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
	24	* example, the messages on the power management channel are a bitmask of
	25	* devices whose power should be enabled.
	26	*
	27	* The property mailbox channel passes messages that contain the (16-byte
	28	* aligned) ARM physical address of a memory buffer. This buffer is passed to
	29	* the VC for processing, is modified in-place by the VC, and the address then
	30	* passed back to the ARM CPU as the response mailbox message to indicate
	31	* request completion. The buffers have a generic and extensible format; each
	32	* buffer contains a standard header, a list of "tags", and a terminating zero
	33	* entry. Each tag contains an ID indicating its type, and length fields for
	34	* generic parsing. With some limitations, an arbitrary set of tags may be
	35	* combined together into a single message buffer. This file defines structs
	36	* representing the header and many individual tag layouts and IDs.
	37	*/
	38
	39	/* Raw mailbox HW */
	40
	41	#define BCM2835_MBOX_PHYSADDR 0x2000b880
	42
	43	struct bcm2835_mbox_regs {
	44	u32 read;
	45	u32 rsvd0[5];
	46	u32 status;
	47	u32 config;
	48	u32 write;
	49	};
	50
	51	#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
	52	#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000
	53
	54	/* Lower 4-bits are channel ID */
	55	#define BCM2835_CHAN_MASK 0xf
	56	#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) \| \
	57	(chan & BCM2835_CHAN_MASK))
	58	#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK)
	59	#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK))
	60
	61	/* Property mailbox buffer structures */
	62
	63	#define BCM2835_MBOX_PROP_CHAN 8
	64
	65	/* All message buffers must start with this header */
	66	struct bcm2835_mbox_hdr {
	67	u32 buf_size;
	68	u32 code;
69	};
70
71	#define BCM2835_MBOX_REQ_CODE 0
72	#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000
73
74	#define BCM2835_MBOX_INIT_HDR(_m_) { \
75	memset((_m_), 0, sizeof(*(_m_))); \
76	(_m_)->hdr.buf_size = sizeof(*(_m_)); \
77	(_m_)->hdr.code = 0; \
78	(_m_)->end_tag = 0; \
79	}
80
81	/*
82	* A message buffer contains a list of tags. Each tag must also start with
83	* a standardized header.
84	*/
85	struct bcm2835_mbox_tag_hdr {
86	u32 tag;
87	u32 val_buf_size;
88	u32 val_len;
89	};
90
91	#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
92	(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
93	(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
94	(_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
95	}
96
97	#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
98	(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
99	(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
100	(_t_)->tag_hdr.val_len = 0; \
101	}
102
103	/* When responding, the VC sets this bit in val_len to indicate a response */
104	#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
105
106	/*
107	* Below we define the ID and struct for many possible tags. This header only
108	* defines individual tag structs, not entire message structs, since in
109	* general an arbitrary set of tags may be combined into a single message.
110	* Clients of the mbox API are expected to define their own overall message
111	* structures by combining the header, a set of tags, and a terminating
112	* entry. For example,
113	*
114	* struct msg {
115	* struct bcm2835_mbox_hdr hdr;
116	* struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
117	* ... perhaps other tags here ...
118	* u32 end_tag;
119	* };
120	*/
121
6fe7845a SW	122	#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002
	123
	124	/*
	125	* 0x2..0xf from:
	126	* http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
	127	* http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
	128	* 0x10, 0x11 from swarren's testing
	129	*/
	130	#define BCM2835_BOARD_REV_B_I2C0_2 0x2
	131	#define BCM2835_BOARD_REV_B_I2C0_3 0x3
	132	#define BCM2835_BOARD_REV_B_I2C1_4 0x4
	133	#define BCM2835_BOARD_REV_B_I2C1_5 0x5
	134	#define BCM2835_BOARD_REV_B_I2C1_6 0x6
	135	#define BCM2835_BOARD_REV_A_7 0x7
	136	#define BCM2835_BOARD_REV_A_8 0x8
	137	#define BCM2835_BOARD_REV_A_9 0x9
	138	#define BCM2835_BOARD_REV_B_REV2_d 0xd
	139	#define BCM2835_BOARD_REV_B_REV2_e 0xe
	140	#define BCM2835_BOARD_REV_B_REV2_f 0xf
	141	#define BCM2835_BOARD_REV_B_PLUS 0x10
	142	#define BCM2835_BOARD_REV_CM 0x11
47705eff	143	#define BCM2835_BOARD_REV_A_PLUS 0x12
6fe7845a SW	144
	145	struct bcm2835_mbox_tag_get_board_rev {
	146	struct bcm2835_mbox_tag_hdr tag_hdr;
	147	union {
	148	struct {
	149	} req;
	150	struct {
	151	u32 rev;
	152	} resp;
	153	} body;
	154	};
	155
4f80a06d SW	156	#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003
	157
	158	struct bcm2835_mbox_tag_get_mac_address {
	159	struct bcm2835_mbox_tag_hdr tag_hdr;
	160	union {
	161	struct {
	162	} req;
	163	struct {
	164	u8 mac[6];
	165	u8 pad[2];
	166	} resp;
	167	} body;
	168	};
	169
88077280 SW	170	#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005
	171
	172	struct bcm2835_mbox_tag_get_arm_mem {
	173	struct bcm2835_mbox_tag_hdr tag_hdr;
	174	union {
	175	struct {
	176	} req;
	177	struct {
	178	u32 mem_base;
	179	u32 mem_size;
	180	} resp;
	181	} body;
	182	};
	183
f66f2aa2 SW	184	#define BCM2835_MBOX_POWER_DEVID_SDHCI 0
	185	#define BCM2835_MBOX_POWER_DEVID_UART0 1
	186	#define BCM2835_MBOX_POWER_DEVID_UART1 2
	187	#define BCM2835_MBOX_POWER_DEVID_USB_HCD 3
	188	#define BCM2835_MBOX_POWER_DEVID_I2C0 4
	189	#define BCM2835_MBOX_POWER_DEVID_I2C1 5
	190	#define BCM2835_MBOX_POWER_DEVID_I2C2 6
	191	#define BCM2835_MBOX_POWER_DEVID_SPI 7
	192	#define BCM2835_MBOX_POWER_DEVID_CCP2TX 8
	193
5e77a745	194	#define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0)
f66f2aa2 SW	195	/* Device doesn't exist */
	196	#define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1)
	197
	198	#define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001
	199
	200	struct bcm2835_mbox_tag_get_power_state {
	201	struct bcm2835_mbox_tag_hdr tag_hdr;
	202	union {
	203	struct {
	204	u32 device_id;
	205	} req;
	206	struct {
	207	u32 device_id;
	208	u32 state;
	209	} resp;
	210	} body;
	211	};
	212
	213	#define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001
	214
	215	#define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0)
	216	#define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1)
	217
	218	struct bcm2835_mbox_tag_set_power_state {
	219	struct bcm2835_mbox_tag_hdr tag_hdr;
	220	union {
	221	struct {
	222	u32 device_id;
	223	u32 state;
	224	} req;
	225	struct {
	226	u32 device_id;
	227	u32 state;
	228	} resp;
	229	} body;
	230	};
	231
131a1e60 SW	232	#define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
	233
	234	#define BCM2835_MBOX_CLOCK_ID_EMMC 1
	235	#define BCM2835_MBOX_CLOCK_ID_UART 2
	236	#define BCM2835_MBOX_CLOCK_ID_ARM 3
	237	#define BCM2835_MBOX_CLOCK_ID_CORE 4
	238	#define BCM2835_MBOX_CLOCK_ID_V3D 5
	239	#define BCM2835_MBOX_CLOCK_ID_H264 6
	240	#define BCM2835_MBOX_CLOCK_ID_ISP 7
	241	#define BCM2835_MBOX_CLOCK_ID_SDRAM 8
	242	#define BCM2835_MBOX_CLOCK_ID_PIXEL 9
	243	#define BCM2835_MBOX_CLOCK_ID_PWM 10
	244
	245	struct bcm2835_mbox_tag_get_clock_rate {
	246	struct bcm2835_mbox_tag_hdr tag_hdr;
	247	union {
	248	struct {
	249	u32 clock_id;
	250	} req;
	251	struct {
	252	u32 clock_id;
	253	u32 rate_hz;
	254	} resp;
	255	} body;
	256	};
	257
88077280 SW	258	#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
	259
	260	struct bcm2835_mbox_tag_allocate_buffer {
	261	struct bcm2835_mbox_tag_hdr tag_hdr;
	262	union {
	263	struct {
	264	u32 alignment;
	265	} req;
	266	struct {
	267	u32 fb_address;
	268	u32 fb_size;
	269	} resp;
	270	} body;
	271	};
	272
	273	#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001
	274
	275	struct bcm2835_mbox_tag_release_buffer {
	276	struct bcm2835_mbox_tag_hdr tag_hdr;
	277	union {
	278	struct {
	279	} req;
	280	struct {
	281	} resp;
	282	} body;
	283	};
	284
	285	#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002
	286
	287	struct bcm2835_mbox_tag_blank_screen {
	288	struct bcm2835_mbox_tag_hdr tag_hdr;
	289	union {
	290	struct {
	291	/* bit 0 means on, other bots reserved */
	292	u32 state;
	293	} req;
	294	struct {
	295	u32 state;
	296	} resp;
	297	} body;
	298	};
	299
	300	/* Physical means output signal */
	301	#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003
	302	#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003
	303	#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003
	304
	305	struct bcm2835_mbox_tag_physical_w_h {
	306	struct bcm2835_mbox_tag_hdr tag_hdr;
	307	union {
	308	/* req not used for get */
	309	struct {
	310	u32 width;
	311	u32 height;
	312	} req;
	313	struct {
	314	u32 width;
	315	u32 height;
	316	} resp;
	317	} body;
	318	};
	319
	320	/* Virtual means display buffer */
	321	#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004
322	#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004
323	#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004
324
325	struct bcm2835_mbox_tag_virtual_w_h {
326	struct bcm2835_mbox_tag_hdr tag_hdr;
327	union {
328	/* req not used for get */
329	struct {
330	u32 width;
331	u32 height;
332	} req;
333	struct {
334	u32 width;
335	u32 height;
336	} resp;
337	} body;
338	};
339
340	#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005
341	#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005
342	#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005
343
344	struct bcm2835_mbox_tag_depth {
345	struct bcm2835_mbox_tag_hdr tag_hdr;
346	union {
347	/* req not used for get */
348	struct {
349	u32 bpp;
350	} req;
351	struct {
352	u32 bpp;
353	} resp;
354	} body;
355	};
356
357	#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006
358	#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005
359	#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006
360
361	#define BCM2835_MBOX_PIXEL_ORDER_BGR 0
362	#define BCM2835_MBOX_PIXEL_ORDER_RGB 1
363
364	struct bcm2835_mbox_tag_pixel_order {
365	struct bcm2835_mbox_tag_hdr tag_hdr;
366	union {
367	/* req not used for get */
368	struct {
369	u32 order;
370	} req;
371	struct {
372	u32 order;
373	} resp;
374	} body;
375	};
376
377	#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007
378	#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007
379	#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007
380
381	#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0
382	#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1
383	#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2
384
385	struct bcm2835_mbox_tag_alpha_mode {
386	struct bcm2835_mbox_tag_hdr tag_hdr;
387	union {
388	/* req not used for get */
389	struct {
390	u32 alpha;
391	} req;
392	struct {
393	u32 alpha;
394	} resp;
395	} body;
396	};
397
398	#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008
399
400	struct bcm2835_mbox_tag_pitch {
401	struct bcm2835_mbox_tag_hdr tag_hdr;
402	union {
403	struct {
404	} req;
405	struct {
406	u32 pitch;
407	} resp;
408	} body;
409	};
410
411	/* Offset of display window within buffer */
412	#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
413	#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
414	#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
415
416	struct bcm2835_mbox_tag_virtual_offset {
417	struct bcm2835_mbox_tag_hdr tag_hdr;
418	union {
419	/* req not used for get */
420	struct {
421	u32 x;
422	u32 y;
423	} req;
424	struct {
425	u32 x;
426	u32 y;
427	} resp;
428	} body;
429	};
430
431	#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a
432	#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a
433	#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a
434
435	struct bcm2835_mbox_tag_overscan {
436	struct bcm2835_mbox_tag_hdr tag_hdr;
437	union {
438	/* req not used for get */
439	struct {
440	u32 top;
441	u32 bottom;
442	u32 left;
443	u32 right;
444	} req;
445	struct {
446	u32 top;
447	u32 bottom;
448	u32 left;
e2788afe	449	u32 right;
88077280 SW	450	} resp;
	451	} body;
	452	};
	453
	454	#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b
	455
	456	struct bcm2835_mbox_tag_get_palette {
	457	struct bcm2835_mbox_tag_hdr tag_hdr;
	458	union {
	459	struct {
	460	} req;
	461	struct {
	462	u32 data[1024];
	463	} resp;
	464	} body;
	465	};
	466
	467	#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b
	468
	469	struct bcm2835_mbox_tag_test_palette {
	470	struct bcm2835_mbox_tag_hdr tag_hdr;
	471	union {
	472	struct {
	473	u32 offset;
	474	u32 num_entries;
	475	u32 data[256];
	476	} req;
	477	struct {
	478	u32 is_invalid;
	479	} resp;
	480	} body;
	481	};
	482
	483	#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b
	484
	485	struct bcm2835_mbox_tag_set_palette {
	486	struct bcm2835_mbox_tag_hdr tag_hdr;
	487	union {
	488	struct {
	489	u32 offset;
	490	u32 num_entries;
	491	u32 data[256];
	492	} req;
	493	struct {
	494	u32 is_invalid;
	495	} resp;
	496	} body;
	497	};
	498
	499	/*
	500	* Pass a raw u32 message to the VC, and receive a raw u32 back.
	501	*
	502	* Returns 0 for success, any other value for error.
	503	*/
	504	int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
	505
	506	/*
	507	* Pass a complete property-style buffer to the VC, and wait until it has
	508	* been processed.
	509	*
	510	* This function expects a pointer to the mbox_hdr structure in an attempt
	511	* to ensure some degree of type safety. However, some number of tags and
	512	* a termination value are expected to immediately follow the header in
	513	* memory, as required by the property protocol.
514	*
515	* Returns 0 for success, any other value for error.
516	*/
517	int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);
518
519	#endif