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ARM: bcm2835: add missing mbox overscan response field
[people/ms/u-boot.git] / arch / arm / include / asm / arch-bcm2835 / mbox.h
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1/*
2 * (C) Copyright 2012 Stephen Warren
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
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5 */
6
7#ifndef _BCM2835_MBOX_H
8#define _BCM2835_MBOX_H
9
10#include <linux/compiler.h>
11
12/*
13 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
14 * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
15 * However, the VideoCore actually controls the initial SoC boot, and hides
16 * much of the hardware behind a protocol. This protocol is transported
17 * using the SoC's mailbox hardware module.
18 *
19 * The mailbox hardware supports passing 32-bit values back and forth.
20 * Presumably by software convention of the firmware, the bottom 4 bits of the
21 * value are used to indicate a logical channel, and the upper 28 bits are the
22 * actual payload. Various channels exist using these simple raw messages. See
23 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
24 * example, the messages on the power management channel are a bitmask of
25 * devices whose power should be enabled.
26 *
27 * The property mailbox channel passes messages that contain the (16-byte
28 * aligned) ARM physical address of a memory buffer. This buffer is passed to
29 * the VC for processing, is modified in-place by the VC, and the address then
30 * passed back to the ARM CPU as the response mailbox message to indicate
31 * request completion. The buffers have a generic and extensible format; each
32 * buffer contains a standard header, a list of "tags", and a terminating zero
33 * entry. Each tag contains an ID indicating its type, and length fields for
34 * generic parsing. With some limitations, an arbitrary set of tags may be
35 * combined together into a single message buffer. This file defines structs
36 * representing the header and many individual tag layouts and IDs.
37 */
38
39/* Raw mailbox HW */
40
41#define BCM2835_MBOX_PHYSADDR 0x2000b880
42
43struct bcm2835_mbox_regs {
44 u32 read;
45 u32 rsvd0[5];
46 u32 status;
47 u32 config;
48 u32 write;
49};
50
51#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
52#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000
53
54/* Lower 4-bits are channel ID */
55#define BCM2835_CHAN_MASK 0xf
56#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \
57 (chan & BCM2835_CHAN_MASK))
58#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK)
59#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK))
60
61/* Property mailbox buffer structures */
62
63#define BCM2835_MBOX_PROP_CHAN 8
64
65/* All message buffers must start with this header */
66struct bcm2835_mbox_hdr {
67 u32 buf_size;
68 u32 code;
69};
70
71#define BCM2835_MBOX_REQ_CODE 0
72#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000
73
74#define BCM2835_MBOX_INIT_HDR(_m_) { \
75 memset((_m_), 0, sizeof(*(_m_))); \
76 (_m_)->hdr.buf_size = sizeof(*(_m_)); \
77 (_m_)->hdr.code = 0; \
78 (_m_)->end_tag = 0; \
79 }
80
81/*
82 * A message buffer contains a list of tags. Each tag must also start with
83 * a standardized header.
84 */
85struct bcm2835_mbox_tag_hdr {
86 u32 tag;
87 u32 val_buf_size;
88 u32 val_len;
89};
90
91#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
92 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
93 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
94 (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
95 }
96
97#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
98 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
99 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
100 (_t_)->tag_hdr.val_len = 0; \
101 }
102
103/* When responding, the VC sets this bit in val_len to indicate a response */
104#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
105
106/*
107 * Below we define the ID and struct for many possible tags. This header only
108 * defines individual tag structs, not entire message structs, since in
109 * general an arbitrary set of tags may be combined into a single message.
110 * Clients of the mbox API are expected to define their own overall message
111 * structures by combining the header, a set of tags, and a terminating
112 * entry. For example,
113 *
114 * struct msg {
115 * struct bcm2835_mbox_hdr hdr;
116 * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
117 * ... perhaps other tags here ...
118 * u32 end_tag;
119 * };
120 */
121
122#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005
123
124struct bcm2835_mbox_tag_get_arm_mem {
125 struct bcm2835_mbox_tag_hdr tag_hdr;
126 union {
127 struct {
128 } req;
129 struct {
130 u32 mem_base;
131 u32 mem_size;
132 } resp;
133 } body;
134};
135
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136#define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
137
138#define BCM2835_MBOX_CLOCK_ID_EMMC 1
139#define BCM2835_MBOX_CLOCK_ID_UART 2
140#define BCM2835_MBOX_CLOCK_ID_ARM 3
141#define BCM2835_MBOX_CLOCK_ID_CORE 4
142#define BCM2835_MBOX_CLOCK_ID_V3D 5
143#define BCM2835_MBOX_CLOCK_ID_H264 6
144#define BCM2835_MBOX_CLOCK_ID_ISP 7
145#define BCM2835_MBOX_CLOCK_ID_SDRAM 8
146#define BCM2835_MBOX_CLOCK_ID_PIXEL 9
147#define BCM2835_MBOX_CLOCK_ID_PWM 10
148
149struct bcm2835_mbox_tag_get_clock_rate {
150 struct bcm2835_mbox_tag_hdr tag_hdr;
151 union {
152 struct {
153 u32 clock_id;
154 } req;
155 struct {
156 u32 clock_id;
157 u32 rate_hz;
158 } resp;
159 } body;
160};
161
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162#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
163
164struct bcm2835_mbox_tag_allocate_buffer {
165 struct bcm2835_mbox_tag_hdr tag_hdr;
166 union {
167 struct {
168 u32 alignment;
169 } req;
170 struct {
171 u32 fb_address;
172 u32 fb_size;
173 } resp;
174 } body;
175};
176
177#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001
178
179struct bcm2835_mbox_tag_release_buffer {
180 struct bcm2835_mbox_tag_hdr tag_hdr;
181 union {
182 struct {
183 } req;
184 struct {
185 } resp;
186 } body;
187};
188
189#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002
190
191struct bcm2835_mbox_tag_blank_screen {
192 struct bcm2835_mbox_tag_hdr tag_hdr;
193 union {
194 struct {
195 /* bit 0 means on, other bots reserved */
196 u32 state;
197 } req;
198 struct {
199 u32 state;
200 } resp;
201 } body;
202};
203
204/* Physical means output signal */
205#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003
206#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003
207#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003
208
209struct bcm2835_mbox_tag_physical_w_h {
210 struct bcm2835_mbox_tag_hdr tag_hdr;
211 union {
212 /* req not used for get */
213 struct {
214 u32 width;
215 u32 height;
216 } req;
217 struct {
218 u32 width;
219 u32 height;
220 } resp;
221 } body;
222};
223
224/* Virtual means display buffer */
225#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004
226#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004
227#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004
228
229struct bcm2835_mbox_tag_virtual_w_h {
230 struct bcm2835_mbox_tag_hdr tag_hdr;
231 union {
232 /* req not used for get */
233 struct {
234 u32 width;
235 u32 height;
236 } req;
237 struct {
238 u32 width;
239 u32 height;
240 } resp;
241 } body;
242};
243
244#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005
245#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005
246#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005
247
248struct bcm2835_mbox_tag_depth {
249 struct bcm2835_mbox_tag_hdr tag_hdr;
250 union {
251 /* req not used for get */
252 struct {
253 u32 bpp;
254 } req;
255 struct {
256 u32 bpp;
257 } resp;
258 } body;
259};
260
261#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006
262#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005
263#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006
264
265#define BCM2835_MBOX_PIXEL_ORDER_BGR 0
266#define BCM2835_MBOX_PIXEL_ORDER_RGB 1
267
268struct bcm2835_mbox_tag_pixel_order {
269 struct bcm2835_mbox_tag_hdr tag_hdr;
270 union {
271 /* req not used for get */
272 struct {
273 u32 order;
274 } req;
275 struct {
276 u32 order;
277 } resp;
278 } body;
279};
280
281#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007
282#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007
283#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007
284
285#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0
286#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1
287#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2
288
289struct bcm2835_mbox_tag_alpha_mode {
290 struct bcm2835_mbox_tag_hdr tag_hdr;
291 union {
292 /* req not used for get */
293 struct {
294 u32 alpha;
295 } req;
296 struct {
297 u32 alpha;
298 } resp;
299 } body;
300};
301
302#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008
303
304struct bcm2835_mbox_tag_pitch {
305 struct bcm2835_mbox_tag_hdr tag_hdr;
306 union {
307 struct {
308 } req;
309 struct {
310 u32 pitch;
311 } resp;
312 } body;
313};
314
315/* Offset of display window within buffer */
316#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
317#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
318#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
319
320struct bcm2835_mbox_tag_virtual_offset {
321 struct bcm2835_mbox_tag_hdr tag_hdr;
322 union {
323 /* req not used for get */
324 struct {
325 u32 x;
326 u32 y;
327 } req;
328 struct {
329 u32 x;
330 u32 y;
331 } resp;
332 } body;
333};
334
335#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a
336#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a
337#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a
338
339struct bcm2835_mbox_tag_overscan {
340 struct bcm2835_mbox_tag_hdr tag_hdr;
341 union {
342 /* req not used for get */
343 struct {
344 u32 top;
345 u32 bottom;
346 u32 left;
347 u32 right;
348 } req;
349 struct {
350 u32 top;
351 u32 bottom;
352 u32 left;
e2788afe 353 u32 right;
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354 } resp;
355 } body;
356};
357
358#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b
359
360struct bcm2835_mbox_tag_get_palette {
361 struct bcm2835_mbox_tag_hdr tag_hdr;
362 union {
363 struct {
364 } req;
365 struct {
366 u32 data[1024];
367 } resp;
368 } body;
369};
370
371#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b
372
373struct bcm2835_mbox_tag_test_palette {
374 struct bcm2835_mbox_tag_hdr tag_hdr;
375 union {
376 struct {
377 u32 offset;
378 u32 num_entries;
379 u32 data[256];
380 } req;
381 struct {
382 u32 is_invalid;
383 } resp;
384 } body;
385};
386
387#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b
388
389struct bcm2835_mbox_tag_set_palette {
390 struct bcm2835_mbox_tag_hdr tag_hdr;
391 union {
392 struct {
393 u32 offset;
394 u32 num_entries;
395 u32 data[256];
396 } req;
397 struct {
398 u32 is_invalid;
399 } resp;
400 } body;
401};
402
403/*
404 * Pass a raw u32 message to the VC, and receive a raw u32 back.
405 *
406 * Returns 0 for success, any other value for error.
407 */
408int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
409
410/*
411 * Pass a complete property-style buffer to the VC, and wait until it has
412 * been processed.
413 *
414 * This function expects a pointer to the mbox_hdr structure in an attempt
415 * to ensure some degree of type safety. However, some number of tags and
416 * a termination value are expected to immediately follow the header in
417 * memory, as required by the property protocol.
418 *
419 * Returns 0 for success, any other value for error.
420 */
421int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);
422
423#endif