[people/ms/u-boot.git] / arch / arm / include / asm / arch-exynos / mipi_dsim.h

/*
 * Copyright (C) 2012 Samsung Electronics
 *
 * Author: InKi Dae <inki.dae@samsung.com>
 * Author: Donghwa Lee <dh09.lee@samsung.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+ 
 */

#ifndef _DSIM_H
#define _DSIM_H

#include <linux/list.h>
#include <linux/fb.h>

#define PANEL_NAME_SIZE		(32)

enum mipi_dsim_interface_type {
	DSIM_COMMAND,
	DSIM_VIDEO
};

enum mipi_dsim_virtual_ch_no {
	DSIM_VIRTUAL_CH_0,
	DSIM_VIRTUAL_CH_1,
	DSIM_VIRTUAL_CH_2,
	DSIM_VIRTUAL_CH_3
};

enum mipi_dsim_burst_mode_type {
	DSIM_NON_BURST_SYNC_EVENT,
	DSIM_BURST_SYNC_EVENT,
	DSIM_NON_BURST_SYNC_PULSE,
	DSIM_BURST,
	DSIM_NON_VIDEO_MODE
};

enum mipi_dsim_no_of_data_lane {
	DSIM_DATA_LANE_1,
	DSIM_DATA_LANE_2,
	DSIM_DATA_LANE_3,
	DSIM_DATA_LANE_4
};

enum mipi_dsim_byte_clk_src {
	DSIM_PLL_OUT_DIV8,
	DSIM_EXT_CLK_DIV8,
	DSIM_EXT_CLK_BYPASS
};

enum mipi_dsim_pixel_format {
	DSIM_CMD_3BPP,
	DSIM_CMD_8BPP,
	DSIM_CMD_12BPP,
	DSIM_CMD_16BPP,
	DSIM_VID_16BPP_565,
	DSIM_VID_18BPP_666PACKED,
	DSIM_18BPP_666LOOSELYPACKED,
	DSIM_24BPP_888
};

/* MIPI DSI Processor-to-Peripheral transaction types */
enum {
	MIPI_DSI_V_SYNC_START				= 0x01,
	MIPI_DSI_V_SYNC_END				= 0x11,
	MIPI_DSI_H_SYNC_START				= 0x21,
	MIPI_DSI_H_SYNC_END				= 0x31,

	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
	MIPI_DSI_COLOR_MODE_ON				= 0x12,
	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,

	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,

	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,

	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,

	MIPI_DSI_DCS_READ				= 0x06,

	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,

	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,

	MIPI_DSI_NULL_PACKET				= 0x09,
	MIPI_DSI_BLANKING_PACKET			= 0x19,
	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
	MIPI_DSI_DCS_LONG_WRITE				= 0x39,

	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,

	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,

	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
};

/*
 * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
 *
 * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse.
 * @eot_disable: enable or disable EoT packet in HS mode.
 * @auto_vertical_cnt: specifies auto vertical count mode.
 *	in Video mode, the vertical line transition uses line counter
 *	configured by VSA, VBP, and Vertical resolution.
 *	If this bit is set to '1', the line counter does not use VSA and VBP
 *	registers.(in command mode, this variable is ignored)
 * @hse: set horizontal sync event mode.
 *	In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC
 *	start packet to MIPI DSI slave at MIPI DSI spec1.1r02.
 *	this bit transfers HSYNC end packet in VSYNC pulse and Vporch area
 *	(in mommand mode, this variable is ignored)
 * @hfp: specifies HFP disable mode.
 *	if this variable is set, DSI master ignores HFP area in VIDEO mode.
 *	(in command mode, this variable is ignored)
 * @hbp: specifies HBP disable mode.
 *	if this variable is set, DSI master ignores HBP area in VIDEO mode.
 *	(in command mode, this variable is ignored)
 * @hsa: specifies HSA disable mode.
 *	if this variable is set, DSI master ignores HSA area in VIDEO mode.
 *	(in command mode, this variable is ignored)
 * @e_interface: specifies interface to be used.(CPU or RGB interface)
 * @e_virtual_ch: specifies virtual channel number that main or
 *	sub diaplsy uses.
 * @e_pixel_format: specifies pixel stream format for main or sub display.
 * @e_burst_mode: selects Burst mode in Video mode.
 *	in Non-burst mode, RGB data area is filled with RGB data and NULL
 *	packets, according to input bandwidth of RGB interface.
 *	In Burst mode, RGB data area is filled with RGB data only.
 * @e_no_data_lane: specifies data lane count to be used by Master.
 * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
 *	DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
 * @pll_stable_time: specifies the PLL Timer for stability of the ganerated
 *	clock(System clock cycle base)
 *	if the timer value goes to 0x00000000, the clock stable bit of status
 *	and interrupt register is set.
 * @esc_clk: specifies escape clock frequency for getting the escape clock
 *	prescaler value.
 * @stop_holding_cnt: specifies the interval value between transmitting
 *	read packet(or write "set_tear_on" command) and BTA request.
 *	after transmitting read packet or write "set_tear_on" command,
 *	BTA requests to D-PHY automatically. this counter value specifies
 *	the interval between them.
 * @bta_timeout: specifies the timer for BTA.
 *	this register specifies time out from BTA request to change
 *	the direction with respect to Tx escape clock.
 * @rx_timeout: specifies the timer for LP Rx mode timeout.
 *	this register specifies time out on how long RxValid deasserts,
 *	after RxLpdt asserts with respect to Tx escape clock.
 *	- RxValid specifies Rx data valid indicator.
 *	- RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
 *	- RxValid and RxLpdt specifies signal from D-PHY.
 */
struct mipi_dsim_config {
	unsigned char			auto_flush;
	unsigned char			eot_disable;

	unsigned char			auto_vertical_cnt;
	unsigned char			hse;
	unsigned char			hfp;
	unsigned char			hbp;
	unsigned char			hsa;

	enum mipi_dsim_interface_type	e_interface;
	enum mipi_dsim_virtual_ch_no	e_virtual_ch;
	enum mipi_dsim_pixel_format	e_pixel_format;
	enum mipi_dsim_burst_mode_type	e_burst_mode;
	enum mipi_dsim_no_of_data_lane	e_no_data_lane;
	enum mipi_dsim_byte_clk_src	e_byte_clk;

	/*
	 * ===========================================
	 * |    P    |    M    |    S    |    MHz    |
	 * -------------------------------------------
	 * |    3    |   100   |    3    |    100    |
	 * |    3    |   100   |    2    |    200    |
	 * |    3    |    63   |    1    |    252    |
	 * |    4    |   100   |    1    |    300    |
	 * |    4    |   110   |    1    |    330    |
	 * |   12    |   350   |    1    |    350    |
	 * |    3    |   100   |    1    |    400    |
	 * |    4    |   150   |    1    |    450    |
	 * |    6    |   118   |    1    |    472    |
	 * |	3    |   120   |    1    |    480    |
	 * |   12    |   250   |    0    |    500    |
	 * |    4    |   100   |    0    |    600    |
	 * |    3    |    81   |    0    |    648    |
	 * |    3    |    88   |    0    |    704    |
	 * |    3    |    90   |    0    |    720    |
	 * |    3    |   100   |    0    |    800    |
	 * |   12    |   425   |    0    |    850    |
	 * |    4    |   150   |    0    |    900    |
	 * |   12    |   475   |    0    |    950    |
	 * |    6    |   250   |    0    |   1000    |
	 * -------------------------------------------
	 */

	/*
	 * pms could be calculated as the following.
	 * M * 24 / P * 2 ^ S = MHz
	 */
	unsigned char			p;
	unsigned short			m;
	unsigned char			s;

	unsigned int			pll_stable_time;
	unsigned long			esc_clk;

	unsigned short			stop_holding_cnt;
	unsigned char			bta_timeout;
	unsigned short			rx_timeout;
};

/*
 * struct mipi_dsim_device - global interface for mipi-dsi driver.
 *
 * @dsim_config: infomation for configuring mipi-dsi controller.
 * @master_ops: callbacks to mipi-dsi operations.
 * @dsim_lcd_dev: pointer to activated ddi device.
 *	(it would be registered by mipi-dsi driver.)
 * @dsim_lcd_drv: pointer to activated_ddi driver.
 *	(it would be registered by mipi-dsi driver.)
 * @state: specifies status of MIPI-DSI controller.
 *	the status could be RESET, INIT, STOP, HSCLKEN and ULPS.
 * @data_lane: specifiec enabled data lane number.
 *	this variable would be set by driver according to e_no_data_lane
 *	automatically.
 * @e_clk_src: select byte clock source.
 * @pd: pointer to MIPI-DSI driver platform data.
 */
struct mipi_dsim_device {
	struct mipi_dsim_config		*dsim_config;
	struct mipi_dsim_master_ops	*master_ops;
	struct mipi_dsim_lcd_device	*dsim_lcd_dev;
	struct mipi_dsim_lcd_driver	*dsim_lcd_drv;

	unsigned int			state;
	unsigned int			data_lane;
	enum mipi_dsim_byte_clk_src	e_clk_src;

	struct exynos_platform_mipi_dsim	*pd;
};

/*
 * struct exynos_platform_mipi_dsim - interface to platform data
 *	for mipi-dsi driver.
 *
 * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver.
 *	lcd panel driver searched would be actived.
 * @dsim_config: pointer of structure for configuring mipi-dsi controller.
 * @lcd_panel_info: pointer for lcd panel specific structure.
 *	this structure specifies width, height, timing and polarity and so on.
 * @lcd_power: callback pointer for enabling or disabling lcd power.
 * @mipi_power: callback pointer for enabling or disabling mipi power.
 * @phy_enable: pointer to a callback controlling D-PHY enable/reset
 */
struct exynos_platform_mipi_dsim {
	char				lcd_panel_name[PANEL_NAME_SIZE];

	struct mipi_dsim_config		*dsim_config;
	void				*lcd_panel_info;

	int (*lcd_power)(void);
	int (*mipi_power)(void);
	void (*phy_enable)(unsigned int dev_index, unsigned int enable);
};

/*
 * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations.
 *
 * @cmd_write: transfer command to lcd panel at LP mode.
 * @cmd_read: read command from rx register.
 * @get_dsim_frame_done: get the status that all screen data have been
 *	transferred to mipi-dsi.
 * @clear_dsim_frame_done: clear frame done status.
 * @get_fb_frame_done: get frame done status of display controller.
 * @trigger: trigger display controller.
 *	- this one would be used only in case of CPU mode.
 */
struct mipi_dsim_master_ops {
	int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
		unsigned int data0, unsigned int data1);
	int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
		unsigned int data0, unsigned int data1);
	int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
	int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim);

	int (*get_fb_frame_done)(void);
	void (*trigger)(struct fb_info *info);
};

/*
 * device structure for mipi-dsi based lcd panel.
 *
 * @name: name of the device to use with this device, or an
 *	alias for that name.
 * @id: id of device to be registered.
 * @bus_id: bus id for identifing connected bus
 *	and this bus id should be same as id of mipi_dsim_device.
 * @master: pointer to mipi-dsi master device object.
 * @platform_data: lcd panel specific platform data.
 */
struct mipi_dsim_lcd_device {
	char			*name;
	int			id;
	int			bus_id;
	int			reverse_panel;

	struct mipi_dsim_device *master;
	void			*platform_data;
};

/*
 * driver structure for mipi-dsi based lcd panel.
 *
 * this structure should be registered by lcd panel driver.
 * mipi-dsi driver seeks lcd panel registered through name field
 * and calls these callback functions in appropriate time.
 *
 * @name: name of the driver to use with this device, or an
 *	alias for that name.
 * @id: id of driver to be registered.
 *	this id would be used for finding device object registered.
 * @mipi_panel_init: callback pointer for initializing lcd panel based on mipi
 *	dsi interface.
 * @mipi_display_on: callback pointer for lcd panel display on.
 */
struct mipi_dsim_lcd_driver {
	char			*name;
	int			id;

	int	(*mipi_panel_init)(struct mipi_dsim_device *dsim_dev);
	void	(*mipi_display_on)(struct mipi_dsim_device *dsim_dev);
};

#ifdef CONFIG_EXYNOS_MIPI_DSIM
int exynos_mipi_dsi_init(void);
#else
static inline int exynos_mipi_dsi_init(void)
{
	return 0;
}
#endif

/*
 * register mipi_dsim_lcd_driver object defined by lcd panel driver
 * to mipi-dsi driver.
 */
int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver
						*lcd_drv);

/*
 * register mipi_dsim_lcd_device to mipi-dsi master.
 */
int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
						*lcd_dev);

void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);

/* panel driver init based on mipi dsi interface */
void s6e8ax0_init(void);

#endif /* _DSIM_H */
Commit	Line	Data
2c7396cb DL	1	/*
	2	* Copyright (C) 2012 Samsung Electronics
	3	*
	4	* Author: InKi Dae <inki.dae@samsung.com>
	5	* Author: Donghwa Lee <dh09.lee@samsung.com>
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
2c7396cb DL	8	*/
	9
	10	#ifndef _DSIM_H
	11	#define _DSIM_H
	12
	13	#include <linux/list.h>
	14	#include <linux/fb.h>
	15
	16	#define PANEL_NAME_SIZE (32)
	17
	18	enum mipi_dsim_interface_type {
	19	DSIM_COMMAND,
	20	DSIM_VIDEO
	21	};
	22
	23	enum mipi_dsim_virtual_ch_no {
	24	DSIM_VIRTUAL_CH_0,
	25	DSIM_VIRTUAL_CH_1,
	26	DSIM_VIRTUAL_CH_2,
	27	DSIM_VIRTUAL_CH_3
	28	};
	29
	30	enum mipi_dsim_burst_mode_type {
	31	DSIM_NON_BURST_SYNC_EVENT,
	32	DSIM_BURST_SYNC_EVENT,
	33	DSIM_NON_BURST_SYNC_PULSE,
	34	DSIM_BURST,
	35	DSIM_NON_VIDEO_MODE
	36	};
	37
	38	enum mipi_dsim_no_of_data_lane {
	39	DSIM_DATA_LANE_1,
	40	DSIM_DATA_LANE_2,
	41	DSIM_DATA_LANE_3,
	42	DSIM_DATA_LANE_4
	43	};
	44
	45	enum mipi_dsim_byte_clk_src {
	46	DSIM_PLL_OUT_DIV8,
	47	DSIM_EXT_CLK_DIV8,
	48	DSIM_EXT_CLK_BYPASS
	49	};
	50
	51	enum mipi_dsim_pixel_format {
	52	DSIM_CMD_3BPP,
	53	DSIM_CMD_8BPP,
	54	DSIM_CMD_12BPP,
	55	DSIM_CMD_16BPP,
	56	DSIM_VID_16BPP_565,
	57	DSIM_VID_18BPP_666PACKED,
	58	DSIM_18BPP_666LOOSELYPACKED,
	59	DSIM_24BPP_888
	60	};
	61
	62	/* MIPI DSI Processor-to-Peripheral transaction types */
	63	enum {
	64	MIPI_DSI_V_SYNC_START = 0x01,
	65	MIPI_DSI_V_SYNC_END = 0x11,
	66	MIPI_DSI_H_SYNC_START = 0x21,
	67	MIPI_DSI_H_SYNC_END = 0x31,
	68
	69	MIPI_DSI_COLOR_MODE_OFF = 0x02,
	70	MIPI_DSI_COLOR_MODE_ON = 0x12,
	71	MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
72	MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
73
74	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03,
75	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13,
76	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23,
77
78	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04,
79	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14,
80	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24,
81
82	MIPI_DSI_DCS_SHORT_WRITE = 0x05,
83	MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
84
85	MIPI_DSI_DCS_READ = 0x06,
86
87	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
88
89	MIPI_DSI_END_OF_TRANSMISSION = 0x08,
90
91	MIPI_DSI_NULL_PACKET = 0x09,
92	MIPI_DSI_BLANKING_PACKET = 0x19,
93	MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
94	MIPI_DSI_DCS_LONG_WRITE = 0x39,
95
96	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
97	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
98	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
99
100	MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d,
101	MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d,
102	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d,
103
104	MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e,
105	MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e,
106	MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e,
107	MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e,
108	};
109
110	/*
111	* struct mipi_dsim_config - interface for configuring mipi-dsi controller.
112	*
113	* @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse.
114	* @eot_disable: enable or disable EoT packet in HS mode.
115	* @auto_vertical_cnt: specifies auto vertical count mode.
116	* in Video mode, the vertical line transition uses line counter
117	* configured by VSA, VBP, and Vertical resolution.
118	* If this bit is set to '1', the line counter does not use VSA and VBP
119	* registers.(in command mode, this variable is ignored)
120	* @hse: set horizontal sync event mode.
121	* In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC
122	* start packet to MIPI DSI slave at MIPI DSI spec1.1r02.
123	* this bit transfers HSYNC end packet in VSYNC pulse and Vporch area
124	* (in mommand mode, this variable is ignored)
125	* @hfp: specifies HFP disable mode.
126	* if this variable is set, DSI master ignores HFP area in VIDEO mode.
127	* (in command mode, this variable is ignored)
128	* @hbp: specifies HBP disable mode.
129	* if this variable is set, DSI master ignores HBP area in VIDEO mode.
130	* (in command mode, this variable is ignored)
131	* @hsa: specifies HSA disable mode.
132	* if this variable is set, DSI master ignores HSA area in VIDEO mode.
133	* (in command mode, this variable is ignored)
134	* @e_interface: specifies interface to be used.(CPU or RGB interface)
135	* @e_virtual_ch: specifies virtual channel number that main or
136	* sub diaplsy uses.
137	* @e_pixel_format: specifies pixel stream format for main or sub display.
138	* @e_burst_mode: selects Burst mode in Video mode.
139	* in Non-burst mode, RGB data area is filled with RGB data and NULL
140	* packets, according to input bandwidth of RGB interface.
141	* In Burst mode, RGB data area is filled with RGB data only.
142	* @e_no_data_lane: specifies data lane count to be used by Master.
143	* @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
144	* DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
145	* @pll_stable_time: specifies the PLL Timer for stability of the ganerated
146	* clock(System clock cycle base)
147	* if the timer value goes to 0x00000000, the clock stable bit of status
148	* and interrupt register is set.
149	* @esc_clk: specifies escape clock frequency for getting the escape clock
150	* prescaler value.
151	* @stop_holding_cnt: specifies the interval value between transmitting
152	* read packet(or write "set_tear_on" command) and BTA request.
153	* after transmitting read packet or write "set_tear_on" command,
154	* BTA requests to D-PHY automatically. this counter value specifies
155	* the interval between them.
156	* @bta_timeout: specifies the timer for BTA.
157	* this register specifies time out from BTA request to change
158	* the direction with respect to Tx escape clock.
159	* @rx_timeout: specifies the timer for LP Rx mode timeout.
160	* this register specifies time out on how long RxValid deasserts,
161	* after RxLpdt asserts with respect to Tx escape clock.
162	* - RxValid specifies Rx data valid indicator.
163	* - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
164	* - RxValid and RxLpdt specifies signal from D-PHY.
165	*/
166	struct mipi_dsim_config {
167	unsigned char auto_flush;
168	unsigned char eot_disable;
169
170	unsigned char auto_vertical_cnt;
171	unsigned char hse;
172	unsigned char hfp;
173	unsigned char hbp;
174	unsigned char hsa;
175
176	enum mipi_dsim_interface_type e_interface;
177	enum mipi_dsim_virtual_ch_no e_virtual_ch;
178	enum mipi_dsim_pixel_format e_pixel_format;
179	enum mipi_dsim_burst_mode_type e_burst_mode;
180	enum mipi_dsim_no_of_data_lane e_no_data_lane;
181	enum mipi_dsim_byte_clk_src e_byte_clk;
182
183	/*
184	* ===========================================
185	* \| P \| M \| S \| MHz \|
186	* -------------------------------------------
187	* \| 3 \| 100 \| 3 \| 100 \|
188	* \| 3 \| 100 \| 2 \| 200 \|
189	* \| 3 \| 63 \| 1 \| 252 \|
190	* \| 4 \| 100 \| 1 \| 300 \|
191	* \| 4 \| 110 \| 1 \| 330 \|
192	* \| 12 \| 350 \| 1 \| 350 \|
193	* \| 3 \| 100 \| 1 \| 400 \|
194	* \| 4 \| 150 \| 1 \| 450 \|
195	* \| 6 \| 118 \| 1 \| 472 \|
196	* \| 3 \| 120 \| 1 \| 480 \|
197	* \| 12 \| 250 \| 0 \| 500 \|
198	* \| 4 \| 100 \| 0 \| 600 \|
199	* \| 3 \| 81 \| 0 \| 648 \|
200	* \| 3 \| 88 \| 0 \| 704 \|
201	* \| 3 \| 90 \| 0 \| 720 \|
202	* \| 3 \| 100 \| 0 \| 800 \|
203	* \| 12 \| 425 \| 0 \| 850 \|
204	* \| 4 \| 150 \| 0 \| 900 \|
205	* \| 12 \| 475 \| 0 \| 950 \|
206	* \| 6 \| 250 \| 0 \| 1000 \|
207	* -------------------------------------------
208	*/
209
210	/*
211	* pms could be calculated as the following.
212	* M * 24 / P * 2 ^ S = MHz
213	*/
214	unsigned char p;
215	unsigned short m;
216	unsigned char s;
217
218	unsigned int pll_stable_time;
219	unsigned long esc_clk;
220
221	unsigned short stop_holding_cnt;
222	unsigned char bta_timeout;
223	unsigned short rx_timeout;
224	};
225
226	/*
227	* struct mipi_dsim_device - global interface for mipi-dsi driver.
228	*
229	* @dsim_config: infomation for configuring mipi-dsi controller.
230	* @master_ops: callbacks to mipi-dsi operations.
231	* @dsim_lcd_dev: pointer to activated ddi device.
232	* (it would be registered by mipi-dsi driver.)
233	* @dsim_lcd_drv: pointer to activated_ddi driver.
234	* (it would be registered by mipi-dsi driver.)
235	* @state: specifies status of MIPI-DSI controller.
236	* the status could be RESET, INIT, STOP, HSCLKEN and ULPS.
237	* @data_lane: specifiec enabled data lane number.
238	* this variable would be set by driver according to e_no_data_lane
239	* automatically.
240	* @e_clk_src: select byte clock source.
241	* @pd: pointer to MIPI-DSI driver platform data.
242	*/
243	struct mipi_dsim_device {
244	struct mipi_dsim_config *dsim_config;
245	struct mipi_dsim_master_ops *master_ops;
246	struct mipi_dsim_lcd_device *dsim_lcd_dev;
247	struct mipi_dsim_lcd_driver *dsim_lcd_drv;
248
249	unsigned int state;
250	unsigned int data_lane;
251	enum mipi_dsim_byte_clk_src e_clk_src;
252
253	struct exynos_platform_mipi_dsim *pd;
254	};
255
256	/*
257	* struct exynos_platform_mipi_dsim - interface to platform data
258	* for mipi-dsi driver.
259	*
260	* @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver.
261	* lcd panel driver searched would be actived.
262	* @dsim_config: pointer of structure for configuring mipi-dsi controller.
263	* @lcd_panel_info: pointer for lcd panel specific structure.
264	* this structure specifies width, height, timing and polarity and so on.
265	* @lcd_power: callback pointer for enabling or disabling lcd power.
266	* @mipi_power: callback pointer for enabling or disabling mipi power.
267	* @phy_enable: pointer to a callback controlling D-PHY enable/reset
268	*/
269	struct exynos_platform_mipi_dsim {
270	char lcd_panel_name[PANEL_NAME_SIZE];
271
272	struct mipi_dsim_config *dsim_config;
273	void *lcd_panel_info;
274
275	int (*lcd_power)(void);
276	int (*mipi_power)(void);
277	void (*phy_enable)(unsigned int dev_index, unsigned int enable);
278	};
279
280	/*
281	* struct mipi_dsim_master_ops - callbacks to mipi-dsi operations.
282	*
283	* @cmd_write: transfer command to lcd panel at LP mode.
284	* @cmd_read: read command from rx register.
285	* @get_dsim_frame_done: get the status that all screen data have been
286	* transferred to mipi-dsi.
287	* @clear_dsim_frame_done: clear frame done status.
288	* @get_fb_frame_done: get frame done status of display controller.
289	* @trigger: trigger display controller.
290	* - this one would be used only in case of CPU mode.
291	*/
292	struct mipi_dsim_master_ops {
293	int (cmd_write)(struct mipi_dsim_device dsim, unsigned int data_id,
294	unsigned int data0, unsigned int data1);
295	int (cmd_read)(struct mipi_dsim_device dsim, unsigned int data_id,
296	unsigned int data0, unsigned int data1);
297	int (get_dsim_frame_done)(struct mipi_dsim_device dsim);
298	int (clear_dsim_frame_done)(struct mipi_dsim_device dsim);
299
300	int (*get_fb_frame_done)(void);
301	void (trigger)(struct fb_info info);
302	};
303
304	/*
305	* device structure for mipi-dsi based lcd panel.
306	*
307	* @name: name of the device to use with this device, or an
308	* alias for that name.
309	* @id: id of device to be registered.
310	* @bus_id: bus id for identifing connected bus
311	* and this bus id should be same as id of mipi_dsim_device.
312	* @master: pointer to mipi-dsi master device object.
313	* @platform_data: lcd panel specific platform data.
314	*/
315	struct mipi_dsim_lcd_device {
316	char *name;
317	int id;
318	int bus_id;
3d024086	319	int reverse_panel;
2c7396cb DL	320
	321	struct mipi_dsim_device *master;
	322	void *platform_data;
	323	};
	324
	325	/*
	326	* driver structure for mipi-dsi based lcd panel.
	327	*
	328	* this structure should be registered by lcd panel driver.
	329	* mipi-dsi driver seeks lcd panel registered through name field
	330	* and calls these callback functions in appropriate time.
	331	*
	332	* @name: name of the driver to use with this device, or an
	333	* alias for that name.
	334	* @id: id of driver to be registered.
	335	* this id would be used for finding device object registered.
	336	* @mipi_panel_init: callback pointer for initializing lcd panel based on mipi
	337	* dsi interface.
	338	* @mipi_display_on: callback pointer for lcd panel display on.
	339	*/
	340	struct mipi_dsim_lcd_driver {
	341	char *name;
	342	int id;
	343
	344	int (mipi_panel_init)(struct mipi_dsim_device dsim_dev);
	345	void (mipi_display_on)(struct mipi_dsim_device dsim_dev);
	346	};
	347
7b4bd121	348	#ifdef CONFIG_EXYNOS_MIPI_DSIM
2c7396cb	349	int exynos_mipi_dsi_init(void);
7b4bd121 AK	350	#else
	351	static inline int exynos_mipi_dsi_init(void)
	352	{
	353	return 0;
	354	}
	355	#endif
2c7396cb DL	356
	357	/*
	358	* register mipi_dsim_lcd_driver object defined by lcd panel driver
	359	* to mipi-dsi driver.
	360	*/
	361	int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver
	362	*lcd_drv);
	363
	364	/*
	365	* register mipi_dsim_lcd_device to mipi-dsi master.
	366	*/
	367	int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
	368	*lcd_dev);
	369
	370	void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
	371
	372	/* panel driver init based on mipi dsi interface */
	373	void s6e8ax0_init(void);
	374
	375	#endif /* _DSIM_H */