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d1c679a4 | 1 | /* |
1a459660 | 2 | * SPDX-License-Identifier: GPL-2.0+ |
d1c679a4 TK |
3 | */ |
4 | ||
5 | #ifndef __ASM_ARCH_IOMUX_H__ | |
6 | #define __ASM_ARCH_IOMUX_H__ | |
714afa64 EN |
7 | |
8 | #define MX6_IOMUXC_GPR4 0x020e0010 | |
9 | #define MX6_IOMUXC_GPR6 0x020e0018 | |
10 | #define MX6_IOMUXC_GPR7 0x020e001c | |
11 | ||
d1c679a4 TK |
12 | /* |
13 | * IOMUXC_GPR13 bit fields | |
14 | */ | |
15 | #define IOMUXC_GPR13_SDMA_STOP_REQ (1<<30) | |
16 | #define IOMUXC_GPR13_CAN2_STOP_REQ (1<<29) | |
17 | #define IOMUXC_GPR13_CAN1_STOP_REQ (1<<28) | |
18 | #define IOMUXC_GPR13_ENET_STOP_REQ (1<<27) | |
19 | #define IOMUXC_GPR13_SATA_PHY_8_MASK (7<<24) | |
20 | #define IOMUXC_GPR13_SATA_PHY_7_MASK (0x1f<<19) | |
21 | #define IOMUXC_GPR13_SATA_PHY_6_SHIFT 16 | |
22 | #define IOMUXC_GPR13_SATA_PHY_6_MASK (7<<IOMUXC_GPR13_SATA_PHY_6_SHIFT) | |
23 | #define IOMUXC_GPR13_SATA_SPEED_MASK (1<<15) | |
24 | #define IOMUXC_GPR13_SATA_PHY_5_MASK (1<<14) | |
25 | #define IOMUXC_GPR13_SATA_PHY_4_MASK (7<<11) | |
26 | #define IOMUXC_GPR13_SATA_PHY_3_MASK (0x1f<<7) | |
27 | #define IOMUXC_GPR13_SATA_PHY_2_MASK (0x1f<<2) | |
28 | #define IOMUXC_GPR13_SATA_PHY_1_MASK (3<<0) | |
29 | ||
19f59ea6 SB |
30 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB (0<<24) |
31 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB (1<<24) | |
32 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB (2<<24) | |
33 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB (3<<24) | |
34 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB (4<<24) | |
35 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB (5<<24) | |
36 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB (6<<24) | |
37 | #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB (7<<24) | |
d1c679a4 | 38 | |
19f59ea6 SB |
39 | #define IOMUXC_GPR13_SATA_PHY_7_SATA1I (0x10<<19) |
40 | #define IOMUXC_GPR13_SATA_PHY_7_SATA1M (0x10<<19) | |
41 | #define IOMUXC_GPR13_SATA_PHY_7_SATA1X (0x1A<<19) | |
42 | #define IOMUXC_GPR13_SATA_PHY_7_SATA2I (0x12<<19) | |
43 | #define IOMUXC_GPR13_SATA_PHY_7_SATA2M (0x12<<19) | |
44 | #define IOMUXC_GPR13_SATA_PHY_7_SATA2X (0x1A<<19) | |
d1c679a4 TK |
45 | |
46 | #define IOMUXC_GPR13_SATA_SPEED_1P5G (0<<15) | |
47 | #define IOMUXC_GPR13_SATA_SPEED_3G (1<<15) | |
48 | ||
49 | #define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED (0<<14) | |
50 | #define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_ENABLED (1<<14) | |
51 | ||
52 | #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_16_16 (0<<11) | |
53 | #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_14_16 (1<<11) | |
54 | #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16 (2<<11) | |
55 | #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_10_16 (3<<11) | |
56 | #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16 (4<<11) | |
57 | #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16 (5<<11) | |
58 | ||
19f59ea6 SB |
59 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB (0<<7) |
60 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB (1<<7) | |
61 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB (2<<7) | |
62 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB (3<<7) | |
63 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB (4<<7) | |
64 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB (5<<7) | |
65 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB (6<<7) | |
66 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB (7<<7) | |
67 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB (8<<7) | |
68 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB (9<<7) | |
69 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB (0xA<<7) | |
70 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB (0xB<<7) | |
71 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB (0xC<<7) | |
72 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB (0xD<<7) | |
73 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB (0xE<<7) | |
74 | #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB (0xF<<7) | |
d1c679a4 | 75 | |
19f59ea6 SB |
76 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V (0<<2) |
77 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V (1<<2) | |
78 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V (2<<2) | |
79 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V (3<<2) | |
80 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V (4<<2) | |
81 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V (5<<2) | |
82 | #define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V (6<<2) | |
83 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V (7<<2) | |
84 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V (8<<2) | |
85 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V (9<<2) | |
86 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V (0xA<<2) | |
87 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V (0xB<<2) | |
88 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V (0xC<<2) | |
89 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V (0xD<<2) | |
90 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V (0xE<<2) | |
91 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V (0xF<<2) | |
92 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V (0x10<<2) | |
93 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V (0x11<<2) | |
94 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V (0x12<<2) | |
95 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V (0x13<<2) | |
96 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V (0x14<<2) | |
97 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V (0x15<<2) | |
98 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V (0x16<<2) | |
99 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V (0x17<<2) | |
100 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V (0x18<<2) | |
101 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V (0x19<<2) | |
102 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V (0x1A<<2) | |
103 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V (0x1B<<2) | |
104 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V (0x1C<<2) | |
105 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V (0x1D<<2) | |
106 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V (0x1E<<2) | |
107 | #define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V (0x1F<<2) | |
d1c679a4 TK |
108 | |
109 | #define IOMUXC_GPR13_SATA_PHY_1_FAST 0 | |
110 | #define IOMUXC_GPR13_SATA_PHY_1_MEDIUM 1 | |
111 | #define IOMUXC_GPR13_SATA_PHY_1_SLOW 2 | |
112 | ||
113 | #define IOMUXC_GPR13_SATA_MASK (IOMUXC_GPR13_SATA_PHY_8_MASK \ | |
114 | |IOMUXC_GPR13_SATA_PHY_7_MASK \ | |
115 | |IOMUXC_GPR13_SATA_PHY_6_MASK \ | |
116 | |IOMUXC_GPR13_SATA_SPEED_MASK \ | |
117 | |IOMUXC_GPR13_SATA_PHY_5_MASK \ | |
118 | |IOMUXC_GPR13_SATA_PHY_4_MASK \ | |
119 | |IOMUXC_GPR13_SATA_PHY_3_MASK \ | |
120 | |IOMUXC_GPR13_SATA_PHY_2_MASK \ | |
121 | |IOMUXC_GPR13_SATA_PHY_1_MASK) | |
122 | #endif /* __ASM_ARCH_IOMUX_H__ */ |