]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/arm/include/asm/arch-omap3/sys_proto.h
Add GPL-2.0+ SPDX-License-Identifier to source files
[people/ms/u-boot.git] / arch / arm / include / asm / arch-omap3 / sys_proto.h
CommitLineData
a8b64505
DB
1/*
2 * (C) Copyright 2004-2008
3 * Texas Instruments, <www.ti.com>
4 * Richard Woodruff <r-woodruff2@ti.com>
5 *
1a459660
WD
6 * SPDX-License-Identifier: GPL-2.0+
7 */
a8b64505
DB
8#ifndef _SYS_PROTO_H_
9#define _SYS_PROTO_H_
10
11typedef struct {
a8b64505 12 u32 mtype;
a8b64505
DB
13 char *board_string;
14 char *nand_string;
15} omap3_sysinfo;
16
45bf0585
A
17struct emu_hal_params {
18 u32 num_params;
19 u32 param1;
20};
21
8c4445d2
PB
22/* Board SDRC timing values */
23struct board_sdrc_timings {
24 u32 mcfg;
25 u32 ctrla;
26 u32 ctrlb;
27 u32 rfr_ctrl;
28 u32 mr;
29};
30
a8b64505
DB
31void prcm_init(void);
32void per_clocks_enable(void);
95f87910 33void ehci_clocks_enable(void);
a8b64505
DB
34
35void memif_init(void);
36void sdrc_init(void);
37void do_sdrc_init(u32, u32);
8c4445d2
PB
38
39void get_board_mem_timings(struct board_sdrc_timings *timings);
4e647e12 40void identify_nand_chip(int *mfr, int *id);
1a5038ca 41void emif4_init(void);
a8b64505 42void gpmc_init(void);
f8a812aa 43void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
73db0c71 44 u32 size);
a8b64505
DB
45
46void watchdog_init(void);
47void set_muxconf_regs(void);
48
b2b9169f 49u32 get_cpu_family(void);
a8b64505 50u32 get_cpu_rev(void);
b2b9169f 51u32 get_sku_id(void);
a8b64505
DB
52u32 get_sysboot_value(void);
53u32 is_gpmc_muxed(void);
54u32 get_gpmc0_type(void);
55u32 get_gpmc0_width(void);
a8b64505
DB
56u32 is_running_in_sdram(void);
57u32 is_running_in_sram(void);
58u32 is_running_in_flash(void);
59u32 get_device_type(void);
a8b64505 60void secureworld_exit(void);
a8b64505
DB
61void try_unlock_memory(void);
62u32 get_boot_type(void);
7a2aa8b6 63void invalidate_dcache(u32);
a8b64505
DB
64void sr32(void *, u32, u32, u32);
65u32 wait_on_value(u32, u32, void *, u32);
66void sdelay(unsigned long);
67void make_cs1_contiguous(void);
da634ae3 68void omap_nand_switch_ecc(uint32_t, uint32_t);
a8b64505 69void power_init_r(void);
e6a6a704 70void dieid_num_r(void);
45bf0585
A
71void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
72void omap3_gp_romcode_call(u32 service_id, u32 parameter);
70239507 73u32 warm_reset(void);
a8b64505 74#endif