[people/ms/u-boot.git] / arch / arm / include / asm / arch-omap5 / sys_proto.h

/*
 * (C) Copyright 2010
 * Texas Instruments, <www.ti.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SYS_PROTO_H_
#define _SYS_PROTO_H_

#include <asm/arch/omap.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/omap_common.h>
#include <linux/mtd/omap_gpmc.h>
#include <asm/arch/clock.h>

DECLARE_GLOBAL_DATA_PTR;

struct pad_conf_entry {
	u32 offset;
	u32 val;
};

struct omap_sysinfo {
	char *board_string;
};
extern const struct omap_sysinfo sysinfo;

void gpmc_init(void);
void watchdog_init(void);
u32 get_device_type(void);
void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
void set_muxconf_regs_essential(void);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
void setup_clocks_for_console(void);
void prcm_init(void);
void bypass_dpll(u32 const base);
void freq_update_core(void);
u32 get_sys_clk_freq(void);
u32 omap5_ddr_clk(void);
void cancel_out(u32 *num, u32 *den, u32 den_limit);
void sdram_init(void);
u32 omap_sdram_size(void);
u32 cortex_rev(void);
void save_omap_boot_params(void);
void init_omap_revision(void);
void do_io_settings(void);
void sri2c_init(void);
void gpi2c_init(void);
int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
u32 warm_reset(void);
void force_emif_self_refresh(void);
void get_ioregs(const struct ctrl_ioregs **regs);
void srcomp_enable(void);
void setup_warmreset_time(void);

static inline u32 running_from_sdram(void)
{
	u32 pc;
	asm volatile ("mov %0, pc" : "=r" (pc));
	return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) &&
	    (pc < OMAP54XX_DRAM_ADDR_SPACE_END));
}

static inline u8 uboot_loaded_by_spl(void)
{
	/*
	 * u-boot can be running from sdram either because of configuration
	 * Header or by SPL. If because of CH, then the romcode sets the
	 * CHSETTINGS executed bit to true in the boot parameter structure that
	 * it passes to the bootloader.This parameter is stored in the ch_flags
	 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
	 * mandatory section if CH is present.
	 */
	if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
		return 0;
	else
		return running_from_sdram();
}
/*
 * The basic hardware init of OMAP(s_init()) can happen in 4
 * different contexts:
 *  1. SPL running from SRAM
 *  2. U-Boot running from FLASH
 *  3. Non-XIP U-Boot loaded to SDRAM by SPL
 *  4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
 *     Configuration Header feature
 *
 * This function finds this context.
 * Defining as inline may help in compiling out unused functions in SPL
 */
static inline u32 omap_hw_init_context(void)
{
#ifdef CONFIG_SPL_BUILD
	return OMAP_INIT_CONTEXT_SPL;
#else
	if (uboot_loaded_by_spl())
		return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
	else if (running_from_sdram())
		return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
	else
		return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
#endif
}

static inline u32 div_round_up(u32 num, u32 den)
{
	return (num + den - 1)/den;
}

static inline u32 usec_to_32k(u32 usec)
{
	return div_round_up(32768 * usec, 1000000);
}
#endif
Commit	Line	Data
508a58fa S	1	/*
	2	* (C) Copyright 2010
	3	* Texas Instruments, <www.ti.com>
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
508a58fa S	6	*/
	7
	8	#ifndef _SYS_PROTO_H_
	9	#define _SYS_PROTO_H_
	10
	11	#include <asm/arch/omap.h>
	12	#include <asm/io.h>
af1d002f	13	#include <asm/arch/clock.h>
508a58fa	14	#include <asm/omap_common.h>
6aff0509	15	#include <linux/mtd/omap_gpmc.h>
af1d002f	16	#include <asm/arch/clock.h>
508a58fa	17
4a0eb757 S	18	DECLARE_GLOBAL_DATA_PTR;
4a0eb757 S	19
687054a7 LV	20	struct pad_conf_entry {
	21	u32 offset;
	22	u32 val;
	23	};
	24
508a58fa S	25	struct omap_sysinfo {
	26	char *board_string;
	27	};
	28	extern const struct omap_sysinfo sysinfo;
	29
508a58fa S	30	void gpmc_init(void);
	31	void watchdog_init(void);
	32	u32 get_device_type(void);
	33	void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
	34	void set_muxconf_regs_essential(void);
508a58fa S	35	u32 wait_on_value(u32, u32, void *, u32);
508a58fa S	36	void sdelay(unsigned long);
508a58fa S	37	void setup_clocks_for_console(void);
508a58fa S	38	void prcm_init(void);
01b753ff	39	void bypass_dpll(u32 const base);
508a58fa S	40	void freq_update_core(void);
	41	u32 get_sys_clk_freq(void);
	42	u32 omap5_ddr_clk(void);
	43	void cancel_out(u32 num, u32 den, u32 den_limit);
	44	void sdram_init(void);
	45	u32 omap_sdram_size(void);
	46	u32 cortex_rev(void);
4596dcc1	47	void save_omap_boot_params(void);
508a58fa S	48	void init_omap_revision(void);
508a58fa S	49	void do_io_settings(void);
4ca94d81	50	void sri2c_init(void);
63fc0c77	51	void gpi2c_init(void);
a78274b2	52	int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
70239507	53	u32 warm_reset(void);
38f25b12	54	void force_emif_self_refresh(void);
ef1697e9	55	void get_ioregs(const struct ctrl_ioregs **regs);
d4d986ee	56	void srcomp_enable(void);
0b1b60c7	57	void setup_warmreset_time(void);
508a58fa	58
508a58fa S	59	static inline u32 running_from_sdram(void)
	60	{
	61	u32 pc;
	62	asm volatile ("mov %0, pc" : "=r" (pc));
	63	return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) &&
	64	(pc < OMAP54XX_DRAM_ADDR_SPACE_END));
	65	}
	66
	67	static inline u8 uboot_loaded_by_spl(void)
	68	{
	69	/*
78f455c0 S	70	* u-boot can be running from sdram either because of configuration
	71	* Header or by SPL. If because of CH, then the romcode sets the
	72	* CHSETTINGS executed bit to true in the boot parameter structure that
	73	* it passes to the bootloader.This parameter is stored in the ch_flags
	74	* variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
	75	* mandatory section if CH is present.
508a58fa	76	*/
4a0eb757	77	if ((gd->arch.omap_boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
78f455c0 S	78	return 0;
	79	else
	80	return running_from_sdram();
508a58fa S	81	}
	82	/*
	83	* The basic hardware init of OMAP(s_init()) can happen in 4
	84	* different contexts:
	85	* 1. SPL running from SRAM
	86	* 2. U-Boot running from FLASH
	87	* 3. Non-XIP U-Boot loaded to SDRAM by SPL
	88	* 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
	89	* Configuration Header feature
	90	*
	91	* This function finds this context.
	92	* Defining as inline may help in compiling out unused functions in SPL
	93	*/
	94	static inline u32 omap_hw_init_context(void)
	95	{
	96	#ifdef CONFIG_SPL_BUILD
	97	return OMAP_INIT_CONTEXT_SPL;
	98	#else
	99	if (uboot_loaded_by_spl())
	100	return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
	101	else if (running_from_sdram())
	102	return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
	103	else
	104	return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
	105	#endif
	106	}
	107
0b1b60c7 LV	108	static inline u32 div_round_up(u32 num, u32 den)
	109	{
	110	return (num + den - 1)/den;
	111	}
	112
	113	static inline u32 usec_to_32k(u32 usec)
	114	{
	115	return div_round_up(32768 * usec, 1000000);
	116	}
508a58fa	117	#endif