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Convert CONFIG_SPL_BOARD_INIT to Kconfig
[people/ms/u-boot.git] / arch / arm / include / asm / fsl_secure_boot.h
CommitLineData
98cb0efd 1/*
2 * Copyright 2015 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __FSL_SECURE_BOOT_H
8#define __FSL_SECURE_BOOT_H
9
bdc22074 10#ifdef CONFIG_CHAIN_OF_TRUST
2ed948f4
AB
11#define CONFIG_CMD_ESBC_VALIDATE
12#define CONFIG_FSL_SEC_MON
fcfdb6d5 13#define CONFIG_SHA_HW_ACCEL
2ed948f4 14#define CONFIG_SHA_PROG_HW_ACCEL
2ed948f4 15
b63f8a43 16#ifdef CONFIG_SPL_BUILD
028ac8c7
SG
17/*
18 * Define the key hash for U-Boot here if public/private key pair used to
19 * sign U-boot are different from the SRK hash put in the fuse
20 * Example of defining KEY_HASH is
21 * #define CONFIG_SPL_UBOOT_KEY_HASH \
22 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
23 * else leave it defined as NULL
24 */
25
26#define CONFIG_SPL_UBOOT_KEY_HASH NULL
27#endif /* ifdef CONFIG_SPL_BUILD */
28
70f9661c
RG
29#define CONFIG_KEY_REVOCATION
30
028ac8c7 31#ifndef CONFIG_SPL_BUILD
028ac8c7 32#define CONFIG_CMD_HASH
2ed948f4
AB
33#ifndef CONFIG_SYS_RAMBOOT
34/* The key used for verification of next level images
35 * is picked up from an Extension Table which has
36 * been verified by the ISBC (Internal Secure boot Code)
37 * in boot ROM of the SoC.
38 * The feature is only applicable in case of NOR boot and is
39 * not applicable in case of RAMBOOT (NAND, SD, SPI).
ac55dadb
UA
40 * For LS, this feature is available for all device if IE Table
41 * is copied to XIP memory
42 * Also, for LS, ISBC doesn't verify this table.
2ed948f4
AB
43 */
44#define CONFIG_FSL_ISBC_KEY_EXT
2ed948f4 45
fd6dbc98
SJ
46#endif
47
b3635f57
VPB
48#if defined(CONFIG_FSL_LAYERSCAPE)
49/*
50 * For fsl layerscape based platforms, ESBC image Address in Header
51 * is 64 bit.
fcfdb6d5 52 */
ef6c55a2
AB
53#define CONFIG_ESBC_ADDR_64BIT
54#endif
55
4a3ab193 56#ifdef CONFIG_ARCH_LS2080A
bef238cb
SJ
57#define CONFIG_EXTRA_ENV \
58 "setenv fdt_high 0xa0000000;" \
59 "setenv initrd_high 0xcfffffff;" \
60 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
61#else
98cb0efd 62#define CONFIG_EXTRA_ENV \
69d4b48c
SG
63 "setenv fdt_high 0xffffffff;" \
64 "setenv initrd_high 0xffffffff;" \
98cb0efd 65 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
bef238cb 66#endif
98cb0efd 67
3f701cc5
SJ
68/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
69 * Non-XIP Memory (Nand/SD)*/
39199356 70#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
762f92a6 71 defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
3f701cc5
SJ
72#define CONFIG_BOOTSCRIPT_COPY_RAM
73#endif
69d4b48c
SG
74/* The address needs to be modified according to NOR, NAND, SD and
75 * DDR memory map
76 */
39199356
UA
77#ifdef CONFIG_FSL_LSCH3
78#define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
79#define CONFIG_BS_ADDR_DEVICE 0x580e00000
80#define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
81#define CONFIG_BS_ADDR_RAM 0xa0e00000
69d4b48c
SG
82#define CONFIG_BS_HDR_SIZE 0x00002000
83#define CONFIG_BS_SIZE 0x00001000
84#else
85#ifdef CONFIG_SD_BOOT
86/* For SD boot address and size are assigned in terms of sector
87 * offset and no. of sectors respectively.
88 */
c1303bfd 89#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
70f9661c
RG
90#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
91#else
92#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
93#endif
9b6639fa 94#define CONFIG_BS_ADDR_DEVICE 0x00000940
69d4b48c
SG
95#define CONFIG_BS_HDR_SIZE 0x00000010
96#define CONFIG_BS_SIZE 0x00000008
762f92a6
RG
97#elif defined(CONFIG_NAND_BOOT)
98#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
99#define CONFIG_BS_ADDR_DEVICE 0x00802000
100#define CONFIG_BS_HDR_SIZE 0x00002000
101#define CONFIG_BS_SIZE 0x00001000
b3635f57
VPB
102#elif defined(CONFIG_QSPI_BOOT)
103#ifdef CONFIG_ARCH_LS1046A
104#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
105#define CONFIG_BS_ADDR_DEVICE 0x40800000
d2a99502
VPB
106#elif defined(CONFIG_ARCH_LS1012A)
107#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
108#define CONFIG_BS_ADDR_DEVICE 0x40060000
3f701cc5 109#else
b3635f57
VPB
110#error "Platform not supported"
111#endif
112#define CONFIG_BS_HDR_SIZE 0x00002000
113#define CONFIG_BS_SIZE 0x00001000
114#else /* Default NOR Boot */
69d4b48c
SG
115#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
116#define CONFIG_BS_ADDR_DEVICE 0x60060000
117#define CONFIG_BS_HDR_SIZE 0x00002000
118#define CONFIG_BS_SIZE 0x00001000
b3635f57 119#endif
69d4b48c
SG
120#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
121#define CONFIG_BS_ADDR_RAM 0x81020000
3f701cc5
SJ
122#endif
123
124#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
125#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
3f701cc5 126#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
216e93a1 127#else
69d4b48c
SG
128#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
129/* BOOTSCRIPT_ADDR is not required */
216e93a1 130#endif
98cb0efd 131
07806e62 132#ifdef CONFIG_FSL_LS_PPA
07806e62
SG
133/* Define the key hash here if SRK used for signing PPA image is
134 * different from SRK hash put in SFP used for U-Boot.
135 * Example
d1a795ac 136 * #define PPA_KEY_HASH \
07806e62
SG
137 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
138 */
d1a795ac 139#define PPA_KEY_HASH NULL
07806e62
SG
140#endif /* ifdef CONFIG_FSL_LS_PPA */
141
bdc22074 142#include <config_fsl_chain_trust.h>
028ac8c7 143#endif /* #ifndef CONFIG_SPL_BUILD */
bdc22074 144#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
98cb0efd 145#endif