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Commit | Line | Data |
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98cb0efd | 1 | /* |
2 | * Copyright 2015 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __FSL_SECURE_BOOT_H | |
8 | #define __FSL_SECURE_BOOT_H | |
9 | ||
bdc22074 | 10 | #ifdef CONFIG_CHAIN_OF_TRUST |
2ed948f4 AB |
11 | #define CONFIG_CMD_ESBC_VALIDATE |
12 | #define CONFIG_FSL_SEC_MON | |
fcfdb6d5 | 13 | #define CONFIG_SHA_HW_ACCEL |
2ed948f4 | 14 | #define CONFIG_SHA_PROG_HW_ACCEL |
2ed948f4 | 15 | |
028ac8c7 | 16 | #define CONFIG_SPL_BOARD_INIT |
b63f8a43 | 17 | #ifdef CONFIG_SPL_BUILD |
028ac8c7 SG |
18 | /* |
19 | * Define the key hash for U-Boot here if public/private key pair used to | |
20 | * sign U-boot are different from the SRK hash put in the fuse | |
21 | * Example of defining KEY_HASH is | |
22 | * #define CONFIG_SPL_UBOOT_KEY_HASH \ | |
23 | * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" | |
24 | * else leave it defined as NULL | |
25 | */ | |
26 | ||
27 | #define CONFIG_SPL_UBOOT_KEY_HASH NULL | |
28 | #endif /* ifdef CONFIG_SPL_BUILD */ | |
29 | ||
30 | #ifndef CONFIG_SPL_BUILD | |
31 | #define CONFIG_CMD_BLOB | |
32 | #define CONFIG_CMD_HASH | |
2ed948f4 AB |
33 | #define CONFIG_KEY_REVOCATION |
34 | #ifndef CONFIG_SYS_RAMBOOT | |
35 | /* The key used for verification of next level images | |
36 | * is picked up from an Extension Table which has | |
37 | * been verified by the ISBC (Internal Secure boot Code) | |
38 | * in boot ROM of the SoC. | |
39 | * The feature is only applicable in case of NOR boot and is | |
40 | * not applicable in case of RAMBOOT (NAND, SD, SPI). | |
41 | */ | |
fd6dbc98 SJ |
42 | #ifndef CONFIG_ESBC_HDR_LS |
43 | /* Current Key EXT feature not available in LS ESBC Header */ | |
2ed948f4 AB |
44 | #define CONFIG_FSL_ISBC_KEY_EXT |
45 | #endif | |
46 | ||
fd6dbc98 SJ |
47 | #endif |
48 | ||
3c1d218a | 49 | #if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) |
fcfdb6d5 | 50 | /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit |
3c1d218a | 51 | * Similiarly for LS2080 |
fcfdb6d5 | 52 | */ |
ef6c55a2 AB |
53 | #define CONFIG_ESBC_ADDR_64BIT |
54 | #endif | |
55 | ||
3c1d218a | 56 | #ifdef CONFIG_LS2080A |
bef238cb SJ |
57 | #define CONFIG_EXTRA_ENV \ |
58 | "setenv fdt_high 0xa0000000;" \ | |
59 | "setenv initrd_high 0xcfffffff;" \ | |
60 | "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" | |
61 | #else | |
98cb0efd | 62 | #define CONFIG_EXTRA_ENV \ |
69d4b48c SG |
63 | "setenv fdt_high 0xffffffff;" \ |
64 | "setenv initrd_high 0xffffffff;" \ | |
98cb0efd | 65 | "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" |
bef238cb | 66 | #endif |
98cb0efd | 67 | |
3f701cc5 SJ |
68 | /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from |
69 | * Non-XIP Memory (Nand/SD)*/ | |
39199356 | 70 | #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \ |
69d4b48c | 71 | defined(CONFIG_SD_BOOT) |
3f701cc5 SJ |
72 | #define CONFIG_BOOTSCRIPT_COPY_RAM |
73 | #endif | |
69d4b48c SG |
74 | /* The address needs to be modified according to NOR, NAND, SD and |
75 | * DDR memory map | |
76 | */ | |
39199356 UA |
77 | #ifdef CONFIG_FSL_LSCH3 |
78 | #define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000 | |
79 | #define CONFIG_BS_ADDR_DEVICE 0x580e00000 | |
80 | #define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000 | |
81 | #define CONFIG_BS_ADDR_RAM 0xa0e00000 | |
69d4b48c SG |
82 | #define CONFIG_BS_HDR_SIZE 0x00002000 |
83 | #define CONFIG_BS_SIZE 0x00001000 | |
84 | #else | |
85 | #ifdef CONFIG_SD_BOOT | |
86 | /* For SD boot address and size are assigned in terms of sector | |
87 | * offset and no. of sectors respectively. | |
88 | */ | |
9b6639fa VP |
89 | #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 |
90 | #define CONFIG_BS_ADDR_DEVICE 0x00000940 | |
69d4b48c SG |
91 | #define CONFIG_BS_HDR_SIZE 0x00000010 |
92 | #define CONFIG_BS_SIZE 0x00000008 | |
3f701cc5 | 93 | #else |
69d4b48c SG |
94 | #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000 |
95 | #define CONFIG_BS_ADDR_DEVICE 0x60060000 | |
96 | #define CONFIG_BS_HDR_SIZE 0x00002000 | |
97 | #define CONFIG_BS_SIZE 0x00001000 | |
98 | #endif /* #ifdef CONFIG_SD_BOOT */ | |
99 | #define CONFIG_BS_HDR_ADDR_RAM 0x81000000 | |
100 | #define CONFIG_BS_ADDR_RAM 0x81020000 | |
3f701cc5 SJ |
101 | #endif |
102 | ||
103 | #ifdef CONFIG_BOOTSCRIPT_COPY_RAM | |
104 | #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM | |
3f701cc5 | 105 | #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM |
216e93a1 | 106 | #else |
69d4b48c SG |
107 | #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE |
108 | /* BOOTSCRIPT_ADDR is not required */ | |
216e93a1 | 109 | #endif |
98cb0efd | 110 | |
07806e62 SG |
111 | #ifdef CONFIG_FSL_LS_PPA |
112 | #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP | |
113 | #ifdef CONFIG_LS1043A | |
114 | #define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x600c0000 | |
350e16cf UA |
115 | #elif defined(CONFIG_FSL_LSCH3) |
116 | #define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x580c40000 | |
07806e62 SG |
117 | #endif |
118 | #else | |
119 | #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined" | |
120 | #endif /* ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP */ | |
121 | ||
122 | /* Define the key hash here if SRK used for signing PPA image is | |
123 | * different from SRK hash put in SFP used for U-Boot. | |
124 | * Example | |
125 | * #define CONFIG_PPA_KEY_HASH \ | |
126 | * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" | |
127 | */ | |
128 | #define CONFIG_PPA_KEY_HASH NULL | |
129 | #endif /* ifdef CONFIG_FSL_LS_PPA */ | |
130 | ||
bdc22074 | 131 | #include <config_fsl_chain_trust.h> |
028ac8c7 | 132 | #endif /* #ifndef CONFIG_SPL_BUILD */ |
bdc22074 | 133 | #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ |
98cb0efd | 134 | #endif |