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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
48571ff0 SG |
2 | /* |
3 | * DaVinci pinmux functions. | |
4 | * | |
5 | * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com> | |
6 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
7 | * Copyright (C) 2008 Lyrtech <www.lyrtech.com> | |
8 | * Copyright (C) 2004 Texas Instruments. | |
48571ff0 SG |
9 | */ |
10 | ||
d678a59d | 11 | #include <common.h> |
48571ff0 SG |
12 | #include <asm/arch/hardware.h> |
13 | #include <asm/io.h> | |
14 | #include <asm/arch/davinci_misc.h> | |
15 | ||
16 | /* | |
17 | * Change the setting of a pin multiplexer field. | |
18 | * | |
19 | * Takes an array of pinmux settings similar to: | |
20 | * | |
21 | * struct pinmux_config uart_pins[] = { | |
22 | * { &davinci_syscfg_regs->pinmux[8], 2, 7 }, | |
23 | * { &davinci_syscfg_regs->pinmux[9], 2, 0 } | |
24 | * }; | |
25 | * | |
26 | * Stepping through the array, each pinmux[n] register has the given value | |
27 | * set in the pin mux field specified. | |
28 | * | |
29 | * The number of pins in the array must be passed (ARRAY_SIZE can provide | |
30 | * this value conveniently). | |
31 | * | |
32 | * Returns 0 if all field numbers and values are in the correct range, | |
33 | * else returns -1. | |
34 | */ | |
35 | int davinci_configure_pin_mux(const struct pinmux_config *pins, | |
36 | const int n_pins) | |
37 | { | |
38 | int i; | |
39 | ||
40 | /* check for invalid pinmux values */ | |
41 | for (i = 0; i < n_pins; i++) { | |
42 | if (pins[i].field >= PIN_MUX_NUM_FIELDS || | |
43 | (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0) | |
44 | return -1; | |
45 | } | |
46 | ||
47 | /* configure the pinmuxes */ | |
48 | for (i = 0; i < n_pins; i++) { | |
49 | const int offset = pins[i].field * PIN_MUX_FIELD_SIZE; | |
50 | const unsigned int value = pins[i].value << offset; | |
51 | const unsigned int mask = PIN_MUX_FIELD_MASK << offset; | |
52 | const dv_reg *mux = pins[i].mux; | |
53 | ||
54 | writel(value | (readl(mux) & (~mask)), mux); | |
55 | } | |
56 | ||
57 | return 0; | |
58 | } | |
59 | ||
60 | /* | |
61 | * Configure multiple pinmux resources. | |
62 | * | |
63 | * Takes an pinmux_resource array of pinmux_config and pin counts: | |
64 | * | |
65 | * const struct pinmux_resource pinmuxes[] = { | |
66 | * PINMUX_ITEM(uart_pins), | |
67 | * PINMUX_ITEM(i2c_pins), | |
68 | * }; | |
69 | * | |
70 | * The number of items in the array must be passed (ARRAY_SIZE can provide | |
71 | * this value conveniently). | |
72 | * | |
73 | * Each item entry is configured in the defined order. If configuration | |
74 | * of any item fails, -1 is returned and none of the following items are | |
75 | * configured. On success, 0 is returned. | |
76 | */ | |
77 | int davinci_configure_pin_mux_items(const struct pinmux_resource *item, | |
78 | const int n_items) | |
79 | { | |
80 | int i; | |
81 | ||
82 | for (i = 0; i < n_items; i++) { | |
83 | if (davinci_configure_pin_mux(item[i].pins, | |
84 | item[i].n_pins) != 0) | |
85 | return -1; | |
86 | } | |
87 | ||
88 | return 0; | |
89 | } |