projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| ed86e4fb WG |
1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* | |
| 3 | * Copyright (C) 2022 MediaTek Inc. | |
| 4 | * Author: Sam Shih <sam.shih@mediatek.com> | |
| 5 | */ | |
| 6 | ||
| 5fd6d4c7 | 7 | #include <fdtdec.h> |
| ed86e4fb WG |
8 | #include <init.h> |
| 9 | #include <asm/armv8/mmu.h> | |
| 10 | #include <asm/system.h> | |
| 11 | #include <asm/global_data.h> | |
| d678a59d | 12 | #include <asm/u-boot.h> |
| 15713fc8 | 13 | #include <linux/sizes.h> |
| ed86e4fb WG |
14 | |
| 15 | DECLARE_GLOBAL_DATA_PTR; | |
| 16 | ||
| 17 | int dram_init(void) | |
| 18 | { | |
| 5fd6d4c7 WG |
19 | int ret; |
| 20 | ||
| 21 | ret = fdtdec_setup_mem_size_base(); | |
| 22 | if (ret) | |
| 23 | return ret; | |
| 24 | ||
| 25 | gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_1G); | |
| ed86e4fb WG |
26 | |
| 27 | return 0; | |
| 28 | } | |
| 29 | ||
| f5131e80 | 30 | void reset_cpu(void) |
| ed86e4fb WG |
31 | { |
| 32 | psci_system_reset(); | |
| 33 | } | |
| 34 | ||
| 35 | static struct mm_region mt7981_mem_map[] = { | |
| 36 | { | |
| 37 | /* DDR */ | |
| 38 | .virt = 0x40000000UL, | |
| 39 | .phys = 0x40000000UL, | |
| 40 | .size = 0x80000000UL, | |
| 41 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE, | |
| 42 | }, { | |
| 43 | .virt = 0x00000000UL, | |
| 44 | .phys = 0x00000000UL, | |
| 45 | .size = 0x40000000UL, | |
| 46 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | | |
| 47 | PTE_BLOCK_NON_SHARE | | |
| 48 | PTE_BLOCK_PXN | PTE_BLOCK_UXN | |
| 49 | }, { | |
| 50 | 0, | |
| 51 | } | |
| 52 | }; | |
| 53 | ||
| 54 | struct mm_region *mem_map = mt7981_mem_map; |