[people/ms/u-boot.git] / arch / arm / mach-mvebu / lowlevel_spl.S

/*
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <config.h>
#include <linux/linkage.h>

ENTRY(save_boot_params)
	stmfd	sp!, {r0 - r12, lr}	/* @ save registers on stack */
	ldr	r12, =CONFIG_SPL_BOOTROM_SAVE
	str	sp, [r12]
	b	save_boot_params_ret
ENDPROC(save_boot_params)

ENTRY(return_to_bootrom)
	ldr	r12, =CONFIG_SPL_BOOTROM_SAVE
	ldr	sp, [r12]
	mov	r0, #0x0		/* @ return value: 0x0 NO_ERR */
	ldmfd	sp!, {r0 - r12, pc}	/* @ restore regs and return */
ENDPROC(return_to_bootrom)

/*
 * cache_inv - invalidate Cache line
 * r0 - dest
 */
	.global cache_inv
	.type  cache_inv, %function
	cache_inv:

	stmfd   sp!, {r1-r12}

	mcr     p15, 0, r0, c7, c6, 1

	ldmfd   sp!, {r1-r12}
	bx      lr


/*
 * flush_l1_v6 - l1 cache clean invalidate
 * r0 - dest
 */
	.global flush_l1_v6
	.type	flush_l1_v6, %function
	flush_l1_v6:

	stmfd   sp!, {r1-r12}

	mcr     p15, 0, r0, c7, c10, 5	/* @ data memory barrier */
	mcr     p15, 0, r0, c7, c14, 1	/* @ clean & invalidate D line */
	mcr     p15, 0, r0, c7, c10, 4	/* @ data sync barrier */

	ldmfd   sp!, {r1-r12}
	bx      lr


/*
 * flush_l1_v7 - l1 cache clean invalidate
 * r0 - dest
 */
	.global flush_l1_v7
	.type	flush_l1_v7, %function
	flush_l1_v7:

	stmfd   sp!, {r1-r12}

	dmb				/* @data memory barrier */
	mcr     p15, 0, r0, c7, c14, 1	/* @ clean & invalidate D line */
	dsb				/* @data sync barrier */

	ldmfd   sp!, {r1-r12}
	bx      lr
Commit	Line	Data
b0f80b91 SR	1	/*
	2	* SPDX-License-Identifier: GPL-2.0+
	3	*/
	4
	5	#include <config.h>
b0f80b91 SR	6	#include <linux/linkage.h>
	7
	8	ENTRY(save_boot_params)
944c7a31 SR	9	stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
	10	ldr r12, =CONFIG_SPL_BOOTROM_SAVE
	11	str sp, [r12]
4adb46a3	12	b save_boot_params_ret
b0f80b91 SR	13	ENDPROC(save_boot_params)
b0f80b91 SR	14
944c7a31 SR	15	ENTRY(return_to_bootrom)
	16	ldr r12, =CONFIG_SPL_BOOTROM_SAVE
	17	ldr sp, [r12]
	18	mov r0, #0x0 /* @ return value: 0x0 NO_ERR */
	19	ldmfd sp!, {r0 - r12, pc} /* @ restore regs and return */
	20	ENDPROC(return_to_bootrom)
944c7a31	21
b0f80b91 SR	22	/*
	23	* cache_inv - invalidate Cache line
	24	* r0 - dest
	25	*/
	26	.global cache_inv
	27	.type cache_inv, %function
	28	cache_inv:
	29
	30	stmfd sp!, {r1-r12}
	31
	32	mcr p15, 0, r0, c7, c6, 1
	33
	34	ldmfd sp!, {r1-r12}
	35	bx lr
	36
	37
	38	/*
	39	* flush_l1_v6 - l1 cache clean invalidate
	40	* r0 - dest
	41	*/
	42	.global flush_l1_v6
	43	.type flush_l1_v6, %function
	44	flush_l1_v6:
	45
	46	stmfd sp!, {r1-r12}
	47
	48	mcr p15, 0, r0, c7, c10, 5 /* @ data memory barrier */
	49	mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
	50	mcr p15, 0, r0, c7, c10, 4 /* @ data sync barrier */
	51
	52	ldmfd sp!, {r1-r12}
	53	bx lr
	54
	55
	56	/*
	57	* flush_l1_v7 - l1 cache clean invalidate
	58	* r0 - dest
	59	*/
	60	.global flush_l1_v7
	61	.type flush_l1_v7, %function
	62	flush_l1_v7:
	63
	64	stmfd sp!, {r1-r12}
	65
	66	dmb /* @data memory barrier */
	67	mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
	68	dsb /* @data sync barrier */
	69
	70	ldmfd sp!, {r1-r12}
	71	bx lr