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rockchip: rk3036: enable rockusb support on rk3036 based device
[people/ms/u-boot.git] / arch / arm / mach-rockchip / Kconfig
CommitLineData
2444dae5
SG
1if ARCH_ROCKCHIP
2
041cdb5f
HS
3config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
5 select CPU_V7
a381bcf5
KY
6 select SUPPORT_SPL
7 select SPL
451dcf5c
EC
8 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
041cdb5f
HS
10 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
daeed1db
KY
16config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
18 select CPU_V7
19 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
0a2be69f
HS
25config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
27 select CPU_V7
0680f1b1 28 select SPL_BOARD_INIT if SPL
0a2be69f 29 select SUPPORT_SPL
0a2be69f 30 select SPL
4bbb05bc
PT
31 select SPL_CLK
32 select SPL_PINCTRL
33 select SPL_REGMAP
34 select SPL_SYSCON
35 select SPL_RAM
36 select SPL_DRIVERS_MISC_SUPPORT
4d9253fb 37 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
008a610b 38 select BOARD_LATE_INIT
0a2be69f
HS
39 select ROCKCHIP_BROM_HELPER
40 help
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
168eef7a
KY
46
47config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
49 select CPU_V7
50 select SUPPORT_SPL
51 select SPL
52 select ROCKCHIP_BROM_HELPER
53 select DEBUG_UART_BOARD_INIT
54 help
55 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
57 and video codec support. Peripherals include Gigabit Ethernet,
58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
0a2be69f 59
2444dae5
SG
60config ROCKCHIP_RK3288
61 bool "Support Rockchip RK3288"
e0f5dbcb 62 select CPU_V7
0680f1b1 63 select SPL_BOARD_INIT if SPL
a381bcf5
KY
64 select SUPPORT_SPL
65 select SPL
c3d098e7
EC
66 imply USB_FUNCTION_ROCKUSB
67 imply CMD_ROCKUSB
2444dae5
SG
68 help
69 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
70 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
71 video interfaces supporting HDMI and eDP, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
ef904bf2 73 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
2444dae5 74
85a3cfb8
KY
75config ROCKCHIP_RK3328
76 bool "Support Rockchip RK3328"
77 select ARM64
78 help
79 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
80 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
81 video interfaces supporting HDMI and eDP, several DDR3 options
82 and video codec support. Peripherals include Gigabit Ethernet,
83 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
84
37a0c600
AF
85config ROCKCHIP_RK3368
86 bool "Support Rockchip RK3368"
87 select ARM64
5071457e
PT
88 select SUPPORT_SPL
89 select SUPPORT_TPL
4cf4378e
PT
90 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
91 select TPL_NEEDS_SEPARATE_STACK if TPL
5071457e
PT
92 imply SPL_SEPARATE_BSS
93 imply SPL_SERIAL_SUPPORT
94 imply TPL_SERIAL_SUPPORT
5071457e 95 select DEBUG_UART_BOARD_INIT
37a0c600
AF
96 select SYS_NS16550
97 help
9a8f009f
PT
98 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
99 into a big and little cluster with 4 cores each) Cortex-A53 including
100 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
101 (for the little cluster), PowerVR G6110 based graphics, one video
102 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
103 video codec support.
104
105 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
106 I2S, UARTs, SPI, I2C and PWMs.
37a0c600 107
d9d1242b
PT
108if ROCKCHIP_RK3368
109
110config TPL_LDSCRIPT
111 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
112
5aa49af3
PT
113config TPL_TEXT_BASE
114 default 0xff8c1000
115
116config TPL_MAX_SIZE
117 default 28672
118
119config TPL_STACK
120 default 0xff8cffff
121
d9d1242b
PT
122endif
123
a381bcf5
KY
124config ROCKCHIP_RK3399
125 bool "Support Rockchip RK3399"
126 select ARM64
66e87cc8
KY
127 select SUPPORT_SPL
128 select SPL
129 select SPL_SEPARATE_BSS
c0508e42
PT
130 select SPL_SERIAL_SUPPORT
131 select SPL_DRIVERS_MISC_SUPPORT
7ee16de5 132 select DEBUG_UART_BOARD_INIT
e3067793 133 select BOARD_LATE_INIT
b4d23f76 134 select ROCKCHIP_BROM_HELPER
a381bcf5
KY
135 help
136 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
137 and quad-core Cortex-A53.
138 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
139 video interfaces supporting HDMI and eDP, several DDR3 options
140 and video codec support. Peripherals include Gigabit Ethernet,
141 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
142
2c1e11dd
AY
143config ROCKCHIP_RV1108
144 bool "Support Rockchip RV1108"
145 select CPU_V7
146 help
147 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
148 and a DSP.
149
ee14d29d 150config SPL_ROCKCHIP_BACK_TO_BROM
b47ea792
XZ
151 bool "SPL returns to bootrom"
152 default y if ROCKCHIP_RK3036
1d845947 153 select ROCKCHIP_BROM_HELPER
ee14d29d
PT
154 depends on SPL
155 help
156 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
157 SPL will return to the boot rom, which will then load the U-Boot
158 binary to keep going on.
159
160config TPL_ROCKCHIP_BACK_TO_BROM
161 bool "TPL returns to bootrom"
162 default y if ROCKCHIP_RK3368
163 select ROCKCHIP_BROM_HELPER
164 depends on TPL
b47ea792
XZ
165 help
166 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
167 SPL will return to the boot rom, which will then load the U-Boot
168 binary to keep going on.
169
e3067793
AY
170config ROCKCHIP_BOOT_MODE_REG
171 hex "Rockchip boot mode flag register address"
172 default 0x200081c8 if ROCKCHIP_RK3036
173 default 0x20004040 if ROCKCHIP_RK3188
174 default 0x110005c8 if ROCKCHIP_RK322X
175 default 0xff730094 if ROCKCHIP_RK3288
176 default 0xff738200 if ROCKCHIP_RK3368
177 default 0xff320300 if ROCKCHIP_RK3399
178 default 0x10300580 if ROCKCHIP_RV1108
179 default 0
180 help
181 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
182 according to the value from this register.
183
fa1392a2
KY
184config ROCKCHIP_SPL_RESERVE_IRAM
185 hex "Size of IRAM reserved in SPL"
8a8106f0 186 default 0
fa1392a2
KY
187 help
188 SPL may need reserve memory for firmware loaded by SPL, whose load
189 address is in IRAM and may overlay with SPL text area if not
190 reserved.
191
1d845947
HS
192config ROCKCHIP_BROM_HELPER
193 bool
194
b377d222
PT
195config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
196 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
197 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
198 help
199 Some Rockchip BROM variants (e.g. on the RK3188) load the
200 first stage in segments and enter multiple times. E.g. on
201 the RK3188, the first 1KB of the first stage are loaded
202 first and entered; after returning to the BROM, the
203 remainder of the first stage is loaded, but the BROM
204 re-enters at the same address/to the same code as previously.
205
206 This enables support code in the BOOT0 hook for the SPL stage
207 to allow multiple entries.
208
209config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
210 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
211 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
212 help
213 Some Rockchip BROM variants (e.g. on the RK3188) load the
214 first stage in segments and enter multiple times. E.g. on
215 the RK3188, the first 1KB of the first stage are loaded
216 first and entered; after returning to the BROM, the
217 remainder of the first stage is loaded, but the BROM
218 re-enters at the same address/to the same code as previously.
219
220 This enables support code in the BOOT0 hook for the TPL stage
221 to allow multiple entries.
222
230e0e09 223config SPL_MMC_SUPPORT
ee14d29d 224 default y if !SPL_ROCKCHIP_BACK_TO_BROM
230e0e09 225
be1d5e03 226source "arch/arm/mach-rockchip/rk3036/Kconfig"
daeed1db 227source "arch/arm/mach-rockchip/rk3128/Kconfig"
0a2be69f 228source "arch/arm/mach-rockchip/rk3188/Kconfig"
b24a8ec1 229source "arch/arm/mach-rockchip/rk322x/Kconfig"
041cdb5f 230source "arch/arm/mach-rockchip/rk3288/Kconfig"
85a3cfb8 231source "arch/arm/mach-rockchip/rk3328/Kconfig"
37a0c600 232source "arch/arm/mach-rockchip/rk3368/Kconfig"
a381bcf5 233source "arch/arm/mach-rockchip/rk3399/Kconfig"
2c1e11dd 234source "arch/arm/mach-rockchip/rv1108/Kconfig"
2444dae5 235endif