]>
Commit | Line | Data |
---|---|---|
2444dae5 SG |
1 | if ARCH_ROCKCHIP |
2 | ||
041cdb5f HS |
3 | config ROCKCHIP_RK3036 |
4 | bool "Support Rockchip RK3036" | |
5 | select CPU_V7 | |
a381bcf5 KY |
6 | select SUPPORT_SPL |
7 | select SPL | |
041cdb5f HS |
8 | help |
9 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 | |
10 | including NEON and GPU, Mali-400 graphics, several DDR3 options | |
11 | and video codec support. Peripherals include Gigabit Ethernet, | |
12 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. | |
13 | ||
daeed1db KY |
14 | config ROCKCHIP_RK3128 |
15 | bool "Support Rockchip RK3128" | |
16 | select CPU_V7 | |
17 | help | |
18 | The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 | |
19 | including NEON and GPU, Mali-400 graphics, several DDR3 options | |
20 | and video codec support. Peripherals include Gigabit Ethernet, | |
21 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. | |
22 | ||
0a2be69f HS |
23 | config ROCKCHIP_RK3188 |
24 | bool "Support Rockchip RK3188" | |
25 | select CPU_V7 | |
0680f1b1 | 26 | select SPL_BOARD_INIT if SPL |
0a2be69f | 27 | select SUPPORT_SPL |
0a2be69f | 28 | select SPL |
4bbb05bc PT |
29 | select SPL_CLK |
30 | select SPL_PINCTRL | |
31 | select SPL_REGMAP | |
32 | select SPL_SYSCON | |
33 | select SPL_RAM | |
34 | select SPL_DRIVERS_MISC_SUPPORT | |
4d9253fb | 35 | select SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
008a610b | 36 | select BOARD_LATE_INIT |
0a2be69f HS |
37 | select ROCKCHIP_BROM_HELPER |
38 | help | |
39 | The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 | |
40 | including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two | |
41 | video interfaces, several memory options and video codec support. | |
42 | Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, | |
43 | UART, SPI, I2C and PWMs. | |
168eef7a KY |
44 | |
45 | config ROCKCHIP_RK322X | |
46 | bool "Support Rockchip RK3228/RK3229" | |
47 | select CPU_V7 | |
48 | select SUPPORT_SPL | |
49 | select SPL | |
50 | select ROCKCHIP_BROM_HELPER | |
51 | select DEBUG_UART_BOARD_INIT | |
52 | help | |
53 | The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 | |
54 | including NEON and GPU, Mali-400 graphics, several DDR3 options | |
55 | and video codec support. Peripherals include Gigabit Ethernet, | |
56 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. | |
0a2be69f | 57 | |
2444dae5 SG |
58 | config ROCKCHIP_RK3288 |
59 | bool "Support Rockchip RK3288" | |
e0f5dbcb | 60 | select CPU_V7 |
0680f1b1 | 61 | select SPL_BOARD_INIT if SPL |
a381bcf5 KY |
62 | select SUPPORT_SPL |
63 | select SPL | |
2444dae5 SG |
64 | help |
65 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 | |
66 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two | |
67 | video interfaces supporting HDMI and eDP, several DDR3 options | |
68 | and video codec support. Peripherals include Gigabit Ethernet, | |
ef904bf2 | 69 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
2444dae5 | 70 | |
85a3cfb8 KY |
71 | config ROCKCHIP_RK3328 |
72 | bool "Support Rockchip RK3328" | |
73 | select ARM64 | |
74 | help | |
75 | The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. | |
76 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two | |
77 | video interfaces supporting HDMI and eDP, several DDR3 options | |
78 | and video codec support. Peripherals include Gigabit Ethernet, | |
79 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. | |
80 | ||
37a0c600 AF |
81 | config ROCKCHIP_RK3368 |
82 | bool "Support Rockchip RK3368" | |
83 | select ARM64 | |
5071457e PT |
84 | select SUPPORT_SPL |
85 | select SUPPORT_TPL | |
4cf4378e PT |
86 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
87 | select TPL_NEEDS_SEPARATE_STACK if TPL | |
5071457e PT |
88 | imply SPL_SEPARATE_BSS |
89 | imply SPL_SERIAL_SUPPORT | |
90 | imply TPL_SERIAL_SUPPORT | |
5071457e | 91 | select DEBUG_UART_BOARD_INIT |
37a0c600 AF |
92 | select SYS_NS16550 |
93 | help | |
9a8f009f PT |
94 | The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised |
95 | into a big and little cluster with 4 cores each) Cortex-A53 including | |
96 | AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache | |
97 | (for the little cluster), PowerVR G6110 based graphics, one video | |
98 | output processor supporting LVDS/HDMI/eDP, several DDR3 options and | |
99 | video codec support. | |
100 | ||
101 | On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, | |
102 | I2S, UARTs, SPI, I2C and PWMs. | |
37a0c600 | 103 | |
d9d1242b PT |
104 | if ROCKCHIP_RK3368 |
105 | ||
106 | config TPL_LDSCRIPT | |
107 | default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds" | |
108 | ||
5aa49af3 PT |
109 | config TPL_TEXT_BASE |
110 | default 0xff8c1000 | |
111 | ||
112 | config TPL_MAX_SIZE | |
113 | default 28672 | |
114 | ||
115 | config TPL_STACK | |
116 | default 0xff8cffff | |
117 | ||
d9d1242b PT |
118 | endif |
119 | ||
a381bcf5 KY |
120 | config ROCKCHIP_RK3399 |
121 | bool "Support Rockchip RK3399" | |
122 | select ARM64 | |
66e87cc8 KY |
123 | select SUPPORT_SPL |
124 | select SPL | |
125 | select SPL_SEPARATE_BSS | |
c0508e42 PT |
126 | select SPL_SERIAL_SUPPORT |
127 | select SPL_DRIVERS_MISC_SUPPORT | |
7ee16de5 | 128 | select DEBUG_UART_BOARD_INIT |
e3067793 | 129 | select BOARD_LATE_INIT |
b4d23f76 | 130 | select ROCKCHIP_BROM_HELPER |
a381bcf5 KY |
131 | help |
132 | The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 | |
133 | and quad-core Cortex-A53. | |
134 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two | |
135 | video interfaces supporting HDMI and eDP, several DDR3 options | |
136 | and video codec support. Peripherals include Gigabit Ethernet, | |
137 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. | |
138 | ||
2c1e11dd AY |
139 | config ROCKCHIP_RV1108 |
140 | bool "Support Rockchip RV1108" | |
141 | select CPU_V7 | |
142 | help | |
143 | The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 | |
144 | and a DSP. | |
145 | ||
ee14d29d | 146 | config SPL_ROCKCHIP_BACK_TO_BROM |
b47ea792 XZ |
147 | bool "SPL returns to bootrom" |
148 | default y if ROCKCHIP_RK3036 | |
1d845947 | 149 | select ROCKCHIP_BROM_HELPER |
ee14d29d PT |
150 | depends on SPL |
151 | help | |
152 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, | |
153 | SPL will return to the boot rom, which will then load the U-Boot | |
154 | binary to keep going on. | |
155 | ||
156 | config TPL_ROCKCHIP_BACK_TO_BROM | |
157 | bool "TPL returns to bootrom" | |
158 | default y if ROCKCHIP_RK3368 | |
159 | select ROCKCHIP_BROM_HELPER | |
160 | depends on TPL | |
b47ea792 XZ |
161 | help |
162 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, | |
163 | SPL will return to the boot rom, which will then load the U-Boot | |
164 | binary to keep going on. | |
165 | ||
e3067793 AY |
166 | config ROCKCHIP_BOOT_MODE_REG |
167 | hex "Rockchip boot mode flag register address" | |
168 | default 0x200081c8 if ROCKCHIP_RK3036 | |
169 | default 0x20004040 if ROCKCHIP_RK3188 | |
170 | default 0x110005c8 if ROCKCHIP_RK322X | |
171 | default 0xff730094 if ROCKCHIP_RK3288 | |
172 | default 0xff738200 if ROCKCHIP_RK3368 | |
173 | default 0xff320300 if ROCKCHIP_RK3399 | |
174 | default 0x10300580 if ROCKCHIP_RV1108 | |
175 | default 0 | |
176 | help | |
177 | The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h) | |
178 | according to the value from this register. | |
179 | ||
fa1392a2 KY |
180 | config ROCKCHIP_SPL_RESERVE_IRAM |
181 | hex "Size of IRAM reserved in SPL" | |
182 | default 0x4000 | |
183 | help | |
184 | SPL may need reserve memory for firmware loaded by SPL, whose load | |
185 | address is in IRAM and may overlay with SPL text area if not | |
186 | reserved. | |
187 | ||
1d845947 HS |
188 | config ROCKCHIP_BROM_HELPER |
189 | bool | |
190 | ||
b377d222 PT |
191 | config SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
192 | bool "SPL requires early-return (for RK3188-style BROM) to BROM" | |
193 | depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK | |
194 | help | |
195 | Some Rockchip BROM variants (e.g. on the RK3188) load the | |
196 | first stage in segments and enter multiple times. E.g. on | |
197 | the RK3188, the first 1KB of the first stage are loaded | |
198 | first and entered; after returning to the BROM, the | |
199 | remainder of the first stage is loaded, but the BROM | |
200 | re-enters at the same address/to the same code as previously. | |
201 | ||
202 | This enables support code in the BOOT0 hook for the SPL stage | |
203 | to allow multiple entries. | |
204 | ||
205 | config TPL_ROCKCHIP_EARLYRETURN_TO_BROM | |
206 | bool "TPL requires early-return (for RK3188-style BROM) to BROM" | |
207 | depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK | |
208 | help | |
209 | Some Rockchip BROM variants (e.g. on the RK3188) load the | |
210 | first stage in segments and enter multiple times. E.g. on | |
211 | the RK3188, the first 1KB of the first stage are loaded | |
212 | first and entered; after returning to the BROM, the | |
213 | remainder of the first stage is loaded, but the BROM | |
214 | re-enters at the same address/to the same code as previously. | |
215 | ||
216 | This enables support code in the BOOT0 hook for the TPL stage | |
217 | to allow multiple entries. | |
218 | ||
230e0e09 | 219 | config SPL_MMC_SUPPORT |
ee14d29d | 220 | default y if !SPL_ROCKCHIP_BACK_TO_BROM |
230e0e09 | 221 | |
be1d5e03 | 222 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
daeed1db | 223 | source "arch/arm/mach-rockchip/rk3128/Kconfig" |
0a2be69f | 224 | source "arch/arm/mach-rockchip/rk3188/Kconfig" |
b24a8ec1 | 225 | source "arch/arm/mach-rockchip/rk322x/Kconfig" |
041cdb5f | 226 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
85a3cfb8 | 227 | source "arch/arm/mach-rockchip/rk3328/Kconfig" |
37a0c600 | 228 | source "arch/arm/mach-rockchip/rk3368/Kconfig" |
a381bcf5 | 229 | source "arch/arm/mach-rockchip/rk3399/Kconfig" |
2c1e11dd | 230 | source "arch/arm/mach-rockchip/rv1108/Kconfig" |
2444dae5 | 231 | endif |