projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 33f47507 JJ |
1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* | |
| 3 | * (C) Copyright 2016 Rockchip Electronics Co., Ltd | |
| 4 | */ | |
| 5 | ||
| d678a59d | 6 | #include <common.h> |
| 33f47507 JJ |
7 | #include <asm/arch-rockchip/bootrom.h> |
| 8 | #include <asm/arch-rockchip/grf_rk3066.h> | |
| eda2c873 | 9 | #include <asm/arch-rockchip/hardware.h> |
| 33f47507 JJ |
10 | |
| 11 | #define GRF_BASE 0x20008000 | |
| 12 | ||
| 13 | const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { | |
| 14 | [BROM_BOOTSOURCE_EMMC] = "/mmc@1021c000", | |
| 15 | [BROM_BOOTSOURCE_SD] = "/mmc@10214000", | |
| 16 | }; | |
| 17 | ||
| 18 | void board_debug_uart_init(void) | |
| 19 | { | |
| 20 | struct rk3066_grf * const grf = (void *)GRF_BASE; | |
| 21 | ||
| 22 | /* Enable early UART on the RK3066 */ | |
| 23 | rk_clrsetreg(&grf->gpio1b_iomux, | |
| 24 | GPIO1B1_MASK | GPIO1B0_MASK, | |
| 25 | GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT | | |
| 26 | GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); | |
| 27 | } | |
| 28 | ||
| 29 | void spl_board_init(void) | |
| 30 | { | |
| 31 | if (!IS_ENABLED(CONFIG_SPL_BUILD)) | |
| 32 | return; | |
| 33 | ||
| 34 | if (IS_ENABLED(CONFIG_SPL_DM_MMC)) { | |
| 35 | struct rk3066_grf * const grf = (void *)GRF_BASE; | |
| 36 | ||
| 37 | rk_clrsetreg(&grf->gpio3b_iomux, | |
| 38 | GPIO3B0_MASK | GPIO3B1_MASK | GPIO3B2_MASK | | |
| 39 | GPIO3B3_MASK | GPIO3B4_MASK | GPIO3B5_MASK | | |
| 40 | GPIO3B6_MASK, | |
| 41 | GPIO3B0_SDMMC0_CLKOUT << GPIO3B0_SHIFT | | |
| 42 | GPIO3B1_SDMMC0_CMD << GPIO3B1_SHIFT | | |
| 43 | GPIO3B2_SDMMC0_DATA0 << GPIO3B2_SHIFT | | |
| 44 | GPIO3B3_SDMMC0_DATA1 << GPIO3B3_SHIFT | | |
| 45 | GPIO3B4_SDMMC0_DATA2 << GPIO3B4_SHIFT | | |
| 46 | GPIO3B5_SDMMC0_DATA3 << GPIO3B5_SHIFT | | |
| 47 | GPIO3B6_SDMMC0_DECTN << GPIO3B6_SHIFT); | |
| 48 | } | |
| 49 | } |