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Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
[thirdparty/u-boot.git] / arch / arm / mach-rockchip / rk3188 / rk3188.c
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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
d678a59d 5#include <common.h>
c14fe2a8 6#include <dm.h>
db41d65a 7#include <hang.h>
691d719d 8#include <init.h>
e2f8ba8a 9#include <led.h>
f7ae49fc 10#include <log.h>
c14fe2a8 11#include <syscon.h>
401d1c4f 12#include <asm/global_data.h>
3b3c623e 13#include <asm/arch-rockchip/bootrom.h>
c14fe2a8 14#include <asm/arch-rockchip/clock.h>
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15#include <asm/arch-rockchip/grf_rk3188.h>
16#include <asm/arch-rockchip/hardware.h>
7de8bd03 17#include <dm/ofnode.h>
61b29b82 18#include <linux/err.h>
1e94b46f 19#include <linux/printk.h>
86d0eca4 20
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21#define GRF_BASE 0x20008000
22
3b3c623e 23const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
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24 [BROM_BOOTSOURCE_EMMC] = "/mmc@1021c000",
25 [BROM_BOOTSOURCE_SD] = "/mmc@10214000",
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26};
27
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28#ifdef CONFIG_DEBUG_UART_BOARD_INIT
29void board_debug_uart_init(void)
30{
31 /* Enable early UART on the RK3188 */
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32 struct rk3188_grf * const grf = (void *)GRF_BASE;
33 enum {
34 GPIO1B1_SHIFT = 2,
35 GPIO1B1_MASK = 3,
36 GPIO1B1_GPIO = 0,
37 GPIO1B1_UART2_SOUT,
38 GPIO1B1_JTAG_TDO,
39
40 GPIO1B0_SHIFT = 0,
41 GPIO1B0_MASK = 3,
42 GPIO1B0_GPIO = 0,
43 GPIO1B0_UART2_SIN,
44 GPIO1B0_JTAG_TDI,
45 };
46
47 rk_clrsetreg(&grf->gpio1b_iomux,
48 GPIO1B1_MASK << GPIO1B1_SHIFT |
49 GPIO1B0_MASK << GPIO1B0_SHIFT,
50 GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
51 GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
52}
53#endif
4dd4fc32 54
c14fe2a8 55#ifdef CONFIG_SPL_BUILD
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56int arch_cpu_init(void)
57{
c14fe2a8 58 struct rk3188_grf *grf;
4dd4fc32 59
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60 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
61 if (IS_ERR(grf)) {
62 pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
63 return 0;
64 }
65#ifdef CONFIG_ROCKCHIP_USB_UART
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66 rk_clrsetreg(&grf->uoc0_con[0],
67 SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
68 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
69 1 << COMMON_ON_N_SHIFT);
70 rk_clrsetreg(&grf->uoc0_con[2],
71 SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
72 rk_clrsetreg(&grf->uoc0_con[3],
73 OPMODE_MASK | XCVRSELECT_MASK |
74 TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
75 OPMODE_NODRIVING << OPMODE_SHIFT |
76 XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
77 1 << TERMSEL_FULLSPEED_SHIFT |
78 1 << SUSPENDN_SHIFT);
79 rk_clrsetreg(&grf->uoc0_con[0],
80 BYPASSSEL_MASK | BYPASSDMEN_MASK,
81 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
82#endif
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83 return 0;
84}
85#endif
86
87__weak int rk3188_board_late_init(void)
88{
89 return 0;
90}
91
92int rk_board_late_init(void)
93{
94 struct rk3188_grf *grf;
95
96 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
97 if (IS_ERR(grf)) {
98 pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
99 return 0;
100 }
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101
102 /* enable noc remap to mimic legacy loaders */
103 rk_clrsetreg(&grf->soc_con0,
104 NOC_REMAP_MASK << NOC_REMAP_SHIFT,
105 NOC_REMAP_MASK << NOC_REMAP_SHIFT);
106
a2b1cff8 107 return rk3188_board_late_init();
4dd4fc32 108}
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109
110#ifdef CONFIG_SPL_BUILD
111static int setup_led(void)
112{
113#ifdef CONFIG_SPL_LED
114 struct udevice *dev;
115 char *led_name;
116 int ret;
117
7de8bd03 118 led_name = ofnode_conf_read_str("u-boot,boot-led");
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119 if (!led_name)
120 return 0;
121 ret = led_get_by_label(led_name, &dev);
122 if (ret) {
123 debug("%s: get=%d\n", __func__, ret);
124 return ret;
125 }
e2f8ba8a 126 ret = led_set_state(dev, LEDST_ON);
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127 if (ret)
128 return ret;
129#endif
130
131 return 0;
132}
133
134void spl_board_init(void)
135{
136 int ret;
137
138 ret = setup_led();
139 if (ret) {
140 debug("LED ret=%d\n", ret);
141 hang();
142 }
143}
144#endif