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Commit | Line | Data |
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beee6a30 MV |
1 | /* |
2 | * Specialty padding for the Altera SoCFPGA preloader image | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __BOOT0_H | |
8 | #define __BOOT0_H | |
9 | ||
a002077d PT |
10 | _start: |
11 | ARM_VECTORS | |
12 | ||
beee6a30 | 13 | #ifdef CONFIG_SPL_BUILD |
4c0f3e7f CTF |
14 | .balignl 64,0xf33db33f; |
15 | ||
16 | .word 0x1337c0d3; /* SoCFPGA preloader validation word */ | |
17 | .word 0xc01df00d; /* Version, flags, length */ | |
18 | .word 0xcafec0d3; /* Checksum, zero-pad */ | |
beee6a30 | 19 | nop; |
beee6a30 | 20 | |
4c0f3e7f CTF |
21 | b reset; /* SoCFPGA jumps here */ |
22 | nop; | |
23 | nop; | |
24 | nop; | |
25 | #endif | |
beee6a30 MV |
26 | |
27 | #endif /* __BOOT0_H */ |