projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| caf36e1e LFT |
2 | /* |
| 3 | * Copyright (C) 2016-2017 Intel Corporation <www.intel.com> | |
| caf36e1e LFT |
4 | */ |
| 5 | ||
| f7ae49fc | 6 | #include <log.h> |
| caf36e1e LFT |
7 | #include <asm/arch/pinmux.h> |
| 8 | #include <asm/io.h> | |
| d678a59d | 9 | #include <common.h> |
| caf36e1e LFT |
10 | #include <fdtdec.h> |
| 11 | ||
| 12 | static int do_pinctr_pin(const void *blob, int child, const char *node_name) | |
| 13 | { | |
| 14 | int len; | |
| 15 | fdt_addr_t base_addr; | |
| 16 | fdt_size_t size; | |
| 17 | const u32 *cell; | |
| 18 | u32 offset, value; | |
| 19 | ||
| 20 | base_addr = fdtdec_get_addr_size(blob, child, "reg", &size); | |
| 21 | if (base_addr != FDT_ADDR_T_NONE) { | |
| 22 | cell = fdt_getprop(blob, child, "pinctrl-single,pins", &len); | |
| 23 | if (!cell || len <= 0) | |
| 24 | return -EFAULT; | |
| 25 | ||
| 26 | debug("%p %d\n", cell, len); | |
| 27 | for (; len > 0; len -= (2 * sizeof(u32))) { | |
| 28 | offset = fdt32_to_cpu(*cell++); | |
| 29 | value = fdt32_to_cpu(*cell++); | |
| 30 | debug("<0x%x 0x%x>\n", offset, value); | |
| 31 | writel(value, base_addr + offset); | |
| 32 | } | |
| 33 | return 0; | |
| 34 | } | |
| 35 | return -EFAULT; | |
| 36 | } | |
| 37 | ||
| 38 | static int do_pinctrl_pins(const void *blob, int node, const char *child_name) | |
| 39 | { | |
| 40 | int child, len; | |
| 41 | const char *node_name; | |
| 42 | ||
| 43 | child = fdt_first_subnode(blob, node); | |
| 44 | ||
| 45 | if (child < 0) | |
| 46 | return -EINVAL; | |
| 47 | ||
| 48 | node_name = fdt_get_name(blob, child, &len); | |
| 49 | ||
| 50 | while (node_name) { | |
| 51 | if (!strcmp(child_name, node_name)) | |
| 52 | return do_pinctr_pin(blob, child, node_name); | |
| 53 | ||
| 54 | child = fdt_next_subnode(blob, child); | |
| 55 | ||
| 56 | if (child < 0) | |
| 57 | break; | |
| 58 | ||
| 59 | node_name = fdt_get_name(blob, child, &len); | |
| 60 | } | |
| 61 | ||
| 62 | return -EFAULT; | |
| 63 | } | |
| 64 | ||
| 65 | int config_dedicated_pins(const void *blob) | |
| 66 | { | |
| 67 | int node; | |
| 68 | ||
| 69 | node = fdtdec_next_compatible(blob, 0, | |
| 70 | COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE); | |
| 71 | if (node < 0) | |
| 72 | return -EINVAL; | |
| 73 | ||
| 74 | if (do_pinctrl_pins(blob, node, "dedicated_cfg")) | |
| 75 | return -EFAULT; | |
| 76 | ||
| 77 | if (do_pinctrl_pins(blob, node, "dedicated")) | |
| 78 | return -EFAULT; | |
| 79 | ||
| 80 | return 0; | |
| 81 | } | |
| 82 | ||
| 83 | int config_pins(const void *blob, const char *pin_grp) | |
| 84 | { | |
| 85 | int node; | |
| 86 | ||
| 87 | node = fdtdec_next_compatible(blob, 0, | |
| 88 | COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE); | |
| 89 | if (node < 0) | |
| 90 | return -EINVAL; | |
| 91 | ||
| 92 | if (do_pinctrl_pins(blob, node, pin_grp)) | |
| 93 | return -EFAULT; | |
| 94 | ||
| 95 | return 0; | |
| 96 | } |