projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| c5b34a29 JZ |
2 | /* |
| 3 | * Copyright (c) 2011 The Chromium OS Authors. | |
| c5b34a29 JZ |
4 | */ |
| 5 | ||
| d678a59d | 6 | #include <common.h> |
| 401d1c4f | 7 | #include <asm/global_data.h> |
| 19d7bf3d | 8 | #include "emc.h" |
| c5b34a29 | 9 | #include <asm/io.h> |
| c5b34a29 JZ |
10 | #include <asm/arch/clock.h> |
| 11 | #include <asm/arch/emc.h> | |
| 150c2493 TW |
12 | #include <asm/arch/tegra.h> |
| 13 | #include <asm/arch-tegra/ap.h> | |
| 14 | #include <asm/arch-tegra/clk_rst.h> | |
| e9c58f2b | 15 | #include <asm/arch-tegra/pmu.h> |
| 150c2493 | 16 | #include <asm/arch-tegra/sys_proto.h> |
| c5b34a29 JZ |
17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; | |
| 19 | ||
| 20 | /* These rates are hard-coded for now, until fdt provides them */ | |
| 21 | #define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000) | |
| 22 | #define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000) | |
| 23 | ||
| 24 | int board_emc_init(void) | |
| 25 | { | |
| 26 | unsigned rate; | |
| 27 | ||
| 49493cb7 | 28 | switch (tegra_get_chip_sku()) { |
| c5b34a29 JZ |
29 | default: |
| 30 | case TEGRA_SOC_T20: | |
| 31 | rate = EMC_SDRAM_RATE_T20; | |
| 32 | break; | |
| 33 | case TEGRA_SOC_T25: | |
| 34 | rate = EMC_SDRAM_RATE_T25; | |
| 35 | break; | |
| 36 | } | |
| 37 | return tegra_set_emc(gd->fdt_blob, rate); | |
| 38 | } |