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Convert CONFIG_SPL_MMC_SUPPORT to Kconfig
[people/ms/u-boot.git] / arch / arm / mach-uniphier / Kconfig
CommitLineData
b6ef3a3f 1if ARCH_UNIPHIER
66cba041 2
77d2f7f5
SG
3config SPL_LIBCOMMON_SUPPORT
4 default y
5
cc4288ef
SG
6config SPL_LIBGENERIC_SUPPORT
7 default y
8
1fdf7c64
SG
9config SPL_MMC_SUPPORT
10 default y if !ARCH_UNIPHIER_64BIT
11
66cba041 12config SYS_CONFIG_NAME
f5d0b9b2 13 default "uniphier"
66cba041 14
48efc8a2
MY
15config ARCH_UNIPHIER_32BIT
16 bool
17 select CPU_V7
e8a92932
MY
18 select CPU_V7_HAS_NONSEC
19 select ARMV7_NONSEC
217f92bb 20 select ARCH_SUPPORT_PSCI
48efc8a2
MY
21
22config ARCH_UNIPHIER_64BIT
23 bool
24 select ARM64
25 select SPL_SEPARATE_BSS
18c11986 26 select ARMV8_MULTIENTRY
b7c4d25d 27 select ARMV8_SPIN_TABLE
48efc8a2 28
5fb87a16
MY
29choice
30 prompt "UniPhier SoC select"
ea65c980 31 default ARCH_UNIPHIER_PRO4
5fb87a16 32
ea65c980 33config ARCH_UNIPHIER_SLD3
323d1f9d 34 bool "UniPhier PH1-sLD3 SoC"
48efc8a2 35 select ARCH_UNIPHIER_32BIT
66cba041 36
5fb87a16
MY
37config ARCH_UNIPHIER_LD4_SLD8
38 bool "UniPhier PH1-LD4/PH1-sLD8 SoC"
48efc8a2 39 select ARCH_UNIPHIER_32BIT
66cba041 40
ea65c980 41config ARCH_UNIPHIER_PRO4
323d1f9d 42 bool "UniPhier PH1-Pro4 SoC"
48efc8a2 43 select ARCH_UNIPHIER_32BIT
5fb87a16
MY
44
45config ARCH_UNIPHIER_PRO5_PXS2_LD6B
46 bool "UniPhier PH1-Pro5/ProXstream2/PH1-LD6b SoC"
48efc8a2 47 select ARCH_UNIPHIER_32BIT
5fb87a16 48
667dbcd0
MY
49config ARCH_UNIPHIER_LD11
50 bool "UniPhier PH1-LD11 SoC"
48efc8a2 51 select ARCH_UNIPHIER_64BIT
667dbcd0 52
9d0c2ceb
MY
53config ARCH_UNIPHIER_LD20
54 bool "UniPhier PH1-LD20 SoC"
48efc8a2 55 select ARCH_UNIPHIER_64BIT
51ea5a06 56 select OF_BOARD_SETUP
9d0c2ceb 57
5fb87a16
MY
58endchoice
59
ea65c980 60config ARCH_UNIPHIER_LD4
5fb87a16
MY
61 bool "Enable UniPhier PH1-LD4 SoC support"
62 depends on ARCH_UNIPHIER_LD4_SLD8
63 default y
3365b4eb 64
ea65c980 65config ARCH_UNIPHIER_SLD8
5fb87a16
MY
66 bool "Enable UniPhier PH1-sLD8 SoC support"
67 depends on ARCH_UNIPHIER_LD4_SLD8
68 default y
66cba041 69
ea65c980 70config ARCH_UNIPHIER_PRO5
5fb87a16
MY
71 bool "Enable UniPhier PH1-Pro5 SoC support"
72 depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
73 default y
28f40d4a 74
ea65c980 75config ARCH_UNIPHIER_PXS2
5fb87a16
MY
76 bool "Enable UniPhier ProXstream2 SoC support"
77 depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
78 default y
019df879 79
ea65c980 80config ARCH_UNIPHIER_LD6B
5fb87a16
MY
81 bool "Enable UniPhier PH1-LD6b SoC support"
82 depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
83 default y
019df879 84
7382d178
MY
85config CACHE_UNIPHIER
86 bool "Enable the UniPhier L2 cache controller"
87 depends on ARCH_UNIPHIER_32BIT
067716ba 88 select SYS_CACHE_SHIFT_7
7382d178
MY
89 default y
90 help
91 This option allows to use the UniPhier System Cache as L2 cache.
92
9879842c
MY
93config MICRO_SUPPORT_CARD
94 bool "Use Micro Support Card"
3201455d 95 help
9879842c
MY
96 This option provides support for the expansion board, available
97 on some UniPhier reference boards.
3201455d
MY
98
99 Say Y to use the on-board UART, Ether, LED devices.
100
59ca5537
MY
101config CMD_PINMON
102 bool "Enable boot mode pins monitor command"
59ca5537
MY
103 default y
104 help
105 The command "pinmon" shows the state of the boot mode pins.
106 The boot mode pins are latched when the system reset is deasserted
107 and determine which device the system should load a boot image from.
108
c67b2afd
MY
109config CMD_DDRPHY_DUMP
110 bool "Enable dump command of DDR PHY parameters"
ea65c980 111 depends on ARCH_UNIPHIER_LD4 || ARCH_UNIPHIER_PRO4 || ARCH_UNIPHIER_SLD8
f6c65bc2 112 default y
c67b2afd
MY
113 help
114 The command "ddrphy" shows the resulting parameters of DDR PHY
115 training; it is useful for the evaluation of DDR PHY training.
116
93d92d46
MY
117config CMD_DDRMPHY_DUMP
118 bool "Enable dump command of DDR Multi PHY parameters"
ea65c980 119 depends on ARCH_UNIPHIER_PXS2 || ARCH_UNIPHIER_LD6B
f6c65bc2 120 default y
93d92d46
MY
121 help
122 The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
123 training; it is useful for the evaluation of DDR Multi PHY training.
124
b6ef3a3f 125endif