[people/ms/u-boot.git] / arch / arm / mach-uniphier / board_late_init.c

/*
 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <spl.h>
#include <libfdt.h>
#include <nand.h>
#include <linux/io.h>
#include <../drivers/mtd/nand/denali.h>

#include "boot-mode/boot-device.h"

static void nand_denali_wp_disable(void)
{
#ifdef CONFIG_NAND_DENALI
	/*
	 * Since the boot rom enables the write protection for NAND boot mode,
	 * it must be disabled somewhere for "nand write", "nand erase", etc.
	 * The workaround is here to not disturb the Denali NAND controller
	 * driver just for a really SoC-specific thing.
	 */
	void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;

	writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
#endif
}

#define VENDOR_PREFIX		"socionext,"
#define DTB_FILE_PREFIX		"uniphier-"

static int uniphier_set_fdt_file(void)
{
	DECLARE_GLOBAL_DATA_PTR;
	const char *compat;
	char dtb_name[256];
	int buf_len = 256;
	int ret;

	if (getenv("fdt_file"))
		return 0;	/* do nothing if it is already set */

	ret = fdt_get_string(gd->fdt_blob, 0, "compatible", &compat);
	if (ret)
		return -EINVAL;

	if (strncmp(compat, VENDOR_PREFIX, strlen(VENDOR_PREFIX)))
		return -EINVAL;

	compat += strlen(VENDOR_PREFIX);

	strncat(dtb_name, DTB_FILE_PREFIX, buf_len);
	buf_len -= strlen(DTB_FILE_PREFIX);

	strncat(dtb_name, compat, buf_len);
	buf_len -= strlen(compat);

	strncat(dtb_name, ".dtb", buf_len);

	return setenv("fdt_file", dtb_name);
}

int board_late_init(void)
{
	puts("MODE:  ");

	switch (spl_boot_device_raw()) {
	case BOOT_DEVICE_MMC1:
		printf("eMMC Boot\n");
		setenv("bootmode", "emmcboot");
		break;
	case BOOT_DEVICE_NAND:
		printf("NAND Boot\n");
		setenv("bootmode", "nandboot");
		nand_denali_wp_disable();
		break;
	case BOOT_DEVICE_NOR:
		printf("NOR Boot\n");
		setenv("bootmode", "norboot");
		break;
	case BOOT_DEVICE_USB:
		printf("USB Boot\n");
		setenv("bootmode", "usbboot");
		break;
	default:
		printf("Unknown\n");
		break;
	}

	if (uniphier_set_fdt_file())
		printf("fdt_file environment was not set correctly\n");

	return 0;
}
Commit	Line	Data
5894ca00	1	/*
f6e7f07c	2	* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5894ca00 MY	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
	8	#include <spl.h>
8ea4f49a	9	#include <libfdt.h>
5894ca00	10	#include <nand.h>
f6e7f07c	11	#include <linux/io.h>
5894ca00 MY	12	#include <../drivers/mtd/nand/denali.h>
5894ca00 MY	13
fec48163 MY	14	#include "boot-mode/boot-device.h"
fec48163 MY	15
5894ca00 MY	16	static void nand_denali_wp_disable(void)
	17	{
	18	#ifdef CONFIG_NAND_DENALI
	19	/*
	20	* Since the boot rom enables the write protection for NAND boot mode,
	21	* it must be disabled somewhere for "nand write", "nand erase", etc.
	22	* The workaround is here to not disturb the Denali NAND controller
	23	* driver just for a really SoC-specific thing.
	24	*/
	25	void __iomem denali_reg = (void __iomem )CONFIG_SYS_NAND_REGS_BASE;
	26
	27	writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
	28	#endif
	29	}
	30
881aa5a7 MY	31	#define VENDOR_PREFIX "socionext,"
	32	#define DTB_FILE_PREFIX "uniphier-"
	33
	34	static int uniphier_set_fdt_file(void)
8ea4f49a MY	35	{
8ea4f49a MY	36	DECLARE_GLOBAL_DATA_PTR;
881aa5a7 MY	37	const char *compat;
	38	char dtb_name[256];
	39	int buf_len = 256;
	40	int ret;
	41
4565a74d MY	42	if (getenv("fdt_file"))
	43	return 0; /* do nothing if it is already set */
	44
881aa5a7 MY	45	ret = fdt_get_string(gd->fdt_blob, 0, "compatible", &compat);
	46	if (ret)
	47	return -EINVAL;
	48
	49	if (strncmp(compat, VENDOR_PREFIX, strlen(VENDOR_PREFIX)))
	50	return -EINVAL;
	51
	52	compat += strlen(VENDOR_PREFIX);
	53
	54	strncat(dtb_name, DTB_FILE_PREFIX, buf_len);
	55	buf_len -= strlen(DTB_FILE_PREFIX);
	56
	57	strncat(dtb_name, compat, buf_len);
	58	buf_len -= strlen(compat);
	59
	60	strncat(dtb_name, ".dtb", buf_len);
	61
80630dad	62	return setenv("fdt_file", dtb_name);
8ea4f49a MY	63	}
8ea4f49a MY	64
5894ca00 MY	65	int board_late_init(void)
	66	{
	67	puts("MODE: ");
	68
fec48163	69	switch (spl_boot_device_raw()) {
5894ca00 MY	70	case BOOT_DEVICE_MMC1:
	71	printf("eMMC Boot\n");
	72	setenv("bootmode", "emmcboot");
5894ca00 MY	73	break;
	74	case BOOT_DEVICE_NAND:
	75	printf("NAND Boot\n");
	76	setenv("bootmode", "nandboot");
	77	nand_denali_wp_disable();
	78	break;
	79	case BOOT_DEVICE_NOR:
	80	printf("NOR Boot\n");
	81	setenv("bootmode", "norboot");
5894ca00	82	break;
fec48163 MY	83	case BOOT_DEVICE_USB:
	84	printf("USB Boot\n");
	85	setenv("bootmode", "usbboot");
	86	break;
5894ca00	87	default:
d90b9745 MY	88	printf("Unknown\n");
d90b9745 MY	89	break;
5894ca00 MY	90	}
5894ca00 MY	91
881aa5a7 MY	92	if (uniphier_set_fdt_file())
881aa5a7 MY	93	printf("fdt_file environment was not set correctly\n");
8ea4f49a	94
5894ca00 MY	95	return 0;
5894ca00 MY	96	}