[people/ms/u-boot.git] / arch / arm / mach-uniphier / boards.c

/*
 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <libfdt.h>
#include <linux/kernel.h>

#include "init.h"

DECLARE_GLOBAL_DATA_PTR;

#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
static const struct uniphier_board_data uniphier_sld3_data = {
	.dram_freq = 1600,
	.dram_nr_ch = 3,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x20000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xc0000000,
		.size = 0x20000000,
		.width = 16,
	},
	.dram_ch[2] = {
		.base = 0xc0000000,
		.size = 0x10000000,
		.width = 16,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_LD4)
static const struct uniphier_board_data uniphier_ld4_data = {
	.dram_freq = 1600,
	.dram_nr_ch = 2,
	.dram_ddr3plus = true,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x10000000,
		.width = 16,
	},
	.dram_ch[1] = {
		.base = 0x90000000,
		.size = 0x10000000,
		.width = 16,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
/* 1GB RAM board */
static const struct uniphier_board_data uniphier_pro4_data = {
	.dram_freq = 1600,
	.dram_nr_ch = 2,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x20000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xa0000000,
		.size = 0x20000000,
		.width = 32,
	},
};

/* 2GB RAM board */
static const struct uniphier_board_data uniphier_pro4_2g_data = {
	.dram_freq = 1600,
	.dram_nr_ch = 2,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x40000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xc0000000,
		.size = 0x40000000,
		.width = 32,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
static const struct uniphier_board_data uniphier_sld8_data = {
	.dram_freq = 1333,
	.dram_nr_ch = 2,
	.dram_ddr3plus = true,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x10000000,
		.width = 16,
	},
	.dram_ch[1] = {
		.base = 0x90000000,
		.size = 0x10000000,
		.width = 16,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
static const struct uniphier_board_data uniphier_pro5_data = {
	.dram_freq = 1866,
	.dram_nr_ch = 2,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x20000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xa0000000,
		.size = 0x20000000,
		.width = 32,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
static const struct uniphier_board_data uniphier_pxs2_data = {
	.dram_freq = 2133,
	.dram_nr_ch = 3,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x40000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xc0000000,
		.size = 0x20000000,
		.width = 32,
	},
	.dram_ch[2] = {
		.base = 0xe0000000,
		.size = 0x20000000,
		.width = 16,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
static const struct uniphier_board_data uniphier_ld6b_data = {
	.dram_freq = 1866,
	.dram_nr_ch = 3,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x40000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xc0000000,
		.size = 0x20000000,
		.width = 32,
	},
	.dram_ch[2] = {
		.base = 0xe0000000,
		.size = 0x20000000,
		.width = 16,
	},
};
#endif

#if defined(CONFIG_ARCH_UNIPHIER_LD20)
static const struct uniphier_board_data uniphier_ld20_data = {
	.dram_freq = 1866,
	.dram_nr_ch = 3,
	.dram_ch[0] = {
		.base = 0x80000000,
		.size = 0x40000000,
		.width = 32,
	},
	.dram_ch[1] = {
		.base = 0xc0000000,
		.size = 0x40000000,
		.width = 32,
	},
	.dram_ch[2] = {
		.base = 0x100000000UL,
		.size = 0x40000000,
		.width = 32,
	},
};
#endif

struct uniphier_board_id {
	const char *compatible;
	const struct uniphier_board_data *param;
};

static const struct uniphier_board_id uniphier_boards[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
	{ "socionext,ph1-sld3", &uniphier_sld3_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
	{ "socionext,ph1-ld4", &uniphier_ld4_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
	{ "socionext,ph1-pro4-ace", &uniphier_pro4_2g_data, },
	{ "socionext,ph1-pro4-sanji", &uniphier_pro4_2g_data, },
	{ "socionext,ph1-pro4", &uniphier_pro4_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
	{ "socionext,ph1-sld8", &uniphier_sld8_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
	{ "socionext,ph1-pro5", &uniphier_pro5_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
	{ "socionext,proxstream2", &uniphier_pxs2_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
	{ "socionext,ph1-ld6b", &uniphier_ld6b_data, },
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
	{ "socionext,ph1-ld20", &uniphier_ld20_data, },
#endif
};

const struct uniphier_board_data *uniphier_get_board_param(void)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
		if (!fdt_node_check_compatible(gd->fdt_blob, 0,
					       uniphier_boards[i].compatible))
			return uniphier_boards[i].param;
	}

	return NULL;
}
Commit	Line	Data
323d1f9d MY	1	/*
	2	* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
6ba60faf	7	#include <common.h>
323d1f9d MY	8	#include <libfdt.h>
323d1f9d MY	9	#include <linux/kernel.h>
107b3fb4 MY	10
107b3fb4 MY	11	#include "init.h"
323d1f9d	12
6ba60faf MY	13	DECLARE_GLOBAL_DATA_PTR;
6ba60faf MY	14
ea65c980	15	#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
5b660066	16	static const struct uniphier_board_data uniphier_sld3_data = {
46abfcc9 MY	17	.dram_freq = 1600,
	18	.dram_nr_ch = 3,
	19	.dram_ch[0] = {
	20	.base = 0x80000000,
	21	.size = 0x20000000,
	22	.width = 32,
	23	},
	24	.dram_ch[1] = {
	25	.base = 0xc0000000,
	26	.size = 0x20000000,
	27	.width = 16,
	28	},
	29	.dram_ch[2] = {
	30	.base = 0xc0000000,
	31	.size = 0x10000000,
	32	.width = 16,
	33	},
323d1f9d MY	34	};
	35	#endif
	36
ea65c980	37	#if defined(CONFIG_ARCH_UNIPHIER_LD4)
5b660066	38	static const struct uniphier_board_data uniphier_ld4_data = {
46abfcc9 MY	39	.dram_freq = 1600,
46abfcc9 MY	40	.dram_nr_ch = 2,
4021b438	41	.dram_ddr3plus = true,
46abfcc9 MY	42	.dram_ch[0] = {
	43	.base = 0x80000000,
	44	.size = 0x10000000,
	45	.width = 16,
	46	},
	47	.dram_ch[1] = {
	48	.base = 0x90000000,
	49	.size = 0x10000000,
	50	.width = 16,
	51	},
323d1f9d MY	52	};
	53	#endif
	54
ea65c980	55	#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
3f231117	56	/* 1GB RAM board */
5b660066	57	static const struct uniphier_board_data uniphier_pro4_data = {
46abfcc9 MY	58	.dram_freq = 1600,
	59	.dram_nr_ch = 2,
	60	.dram_ch[0] = {
	61	.base = 0x80000000,
	62	.size = 0x20000000,
	63	.width = 32,
	64	},
	65	.dram_ch[1] = {
	66	.base = 0xa0000000,
	67	.size = 0x20000000,
	68	.width = 32,
	69	},
323d1f9d	70	};
3f231117 MY	71
3f231117 MY	72	/* 2GB RAM board */
5b660066	73	static const struct uniphier_board_data uniphier_pro4_2g_data = {
46abfcc9 MY	74	.dram_freq = 1600,
	75	.dram_nr_ch = 2,
	76	.dram_ch[0] = {
	77	.base = 0x80000000,
	78	.size = 0x40000000,
	79	.width = 32,
	80	},
	81	.dram_ch[1] = {
	82	.base = 0xc0000000,
	83	.size = 0x40000000,
	84	.width = 32,
	85	},
3f231117	86	};
323d1f9d MY	87	#endif
323d1f9d MY	88
ea65c980	89	#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
5b660066	90	static const struct uniphier_board_data uniphier_sld8_data = {
46abfcc9 MY	91	.dram_freq = 1333,
46abfcc9 MY	92	.dram_nr_ch = 2,
4021b438	93	.dram_ddr3plus = true,
46abfcc9 MY	94	.dram_ch[0] = {
	95	.base = 0x80000000,
	96	.size = 0x10000000,
	97	.width = 16,
	98	},
	99	.dram_ch[1] = {
	100	.base = 0x90000000,
	101	.size = 0x10000000,
	102	.width = 16,
	103	},
323d1f9d MY	104	};
	105	#endif
	106
ea65c980	107	#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
5b660066	108	static const struct uniphier_board_data uniphier_pro5_data = {
46abfcc9 MY	109	.dram_freq = 1866,
	110	.dram_nr_ch = 2,
	111	.dram_ch[0] = {
	112	.base = 0x80000000,
	113	.size = 0x20000000,
	114	.width = 32,
	115	},
	116	.dram_ch[1] = {
	117	.base = 0xa0000000,
	118	.size = 0x20000000,
	119	.width = 32,
	120	},
28f40d4a MY	121	};
	122	#endif
	123
ea65c980	124	#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
5b660066	125	static const struct uniphier_board_data uniphier_pxs2_data = {
46abfcc9 MY	126	.dram_freq = 2133,
	127	.dram_nr_ch = 3,
	128	.dram_ch[0] = {
	129	.base = 0x80000000,
	130	.size = 0x40000000,
	131	.width = 32,
	132	},
	133	.dram_ch[1] = {
	134	.base = 0xc0000000,
	135	.size = 0x20000000,
	136	.width = 32,
	137	},
	138	.dram_ch[2] = {
	139	.base = 0xe0000000,
	140	.size = 0x20000000,
	141	.width = 16,
	142	},
89c05fa5 MY	143	};
	144	#endif
	145
ea65c980	146	#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
5b660066	147	static const struct uniphier_board_data uniphier_ld6b_data = {
46abfcc9 MY	148	.dram_freq = 1866,
	149	.dram_nr_ch = 3,
	150	.dram_ch[0] = {
	151	.base = 0x80000000,
	152	.size = 0x40000000,
	153	.width = 32,
	154	},
	155	.dram_ch[1] = {
	156	.base = 0xc0000000,
	157	.size = 0x20000000,
	158	.width = 32,
	159	},
	160	.dram_ch[2] = {
	161	.base = 0xe0000000,
	162	.size = 0x20000000,
	163	.width = 16,
	164	},
019df879 MY	165	};
	166	#endif
	167
9d0c2ceb MY	168	#if defined(CONFIG_ARCH_UNIPHIER_LD20)
	169	static const struct uniphier_board_data uniphier_ld20_data = {
	170	.dram_freq = 1866,
	171	.dram_nr_ch = 3,
	172	.dram_ch[0] = {
	173	.base = 0x80000000,
	174	.size = 0x40000000,
	175	.width = 32,
	176	},
	177	.dram_ch[1] = {
	178	.base = 0xc0000000,
	179	.size = 0x40000000,
	180	.width = 32,
	181	},
	182	.dram_ch[2] = {
	183	.base = 0x100000000UL,
	184	.size = 0x40000000,
	185	.width = 32,
	186	},
	187	};
	188	#endif
	189
323d1f9d MY	190	struct uniphier_board_id {
	191	const char *compatible;
	192	const struct uniphier_board_data *param;
	193	};
	194
	195	static const struct uniphier_board_id uniphier_boards[] = {
ea65c980	196	#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
5b660066	197	{ "socionext,ph1-sld3", &uniphier_sld3_data, },
323d1f9d	198	#endif
ea65c980	199	#if defined(CONFIG_ARCH_UNIPHIER_LD4)
5b660066	200	{ "socionext,ph1-ld4", &uniphier_ld4_data, },
323d1f9d	201	#endif
ea65c980	202	#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
5b660066 MY	203	{ "socionext,ph1-pro4-ace", &uniphier_pro4_2g_data, },
	204	{ "socionext,ph1-pro4-sanji", &uniphier_pro4_2g_data, },
	205	{ "socionext,ph1-pro4", &uniphier_pro4_data, },
323d1f9d	206	#endif
ea65c980	207	#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
5b660066	208	{ "socionext,ph1-sld8", &uniphier_sld8_data, },
323d1f9d	209	#endif
ea65c980	210	#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
5b660066	211	{ "socionext,ph1-pro5", &uniphier_pro5_data, },
28f40d4a	212	#endif
ea65c980	213	#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
5b660066	214	{ "socionext,proxstream2", &uniphier_pxs2_data, },
019df879	215	#endif
ea65c980	216	#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
5b660066	217	{ "socionext,ph1-ld6b", &uniphier_ld6b_data, },
019df879	218	#endif
9d0c2ceb MY	219	#if defined(CONFIG_ARCH_UNIPHIER_LD20)
	220	{ "socionext,ph1-ld20", &uniphier_ld20_data, },
	221	#endif
323d1f9d MY	222	};
323d1f9d MY	223
6ba60faf	224	const struct uniphier_board_data *uniphier_get_board_param(void)
323d1f9d MY	225	{
	226	int i;
	227
	228	for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
6ba60faf	229	if (!fdt_node_check_compatible(gd->fdt_blob, 0,
323d1f9d MY	230	uniphier_boards[i].compatible))
	231	return uniphier_boards[i].param;
	232	}
	233
	234	return NULL;
	235	}