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9171fc81 MF |
1 | /* |
2 | * U-boot - start.S Startup file for Blackfin u-boot | |
3 | * | |
96092229 | 4 | * Copyright (c) 2005-2008 Analog Devices Inc. |
9171fc81 MF |
5 | * |
6 | * This file is based on head.S | |
7 | * Copyright (c) 2003 Metrowerks/Motorola | |
8 | * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>, | |
9 | * Kenneth Albanowski <kjahds@kjahds.com>, | |
10 | * The Silver Hammer Group, Ltd. | |
11 | * (c) 1995, Dionne & Associates | |
12 | * (c) 1995, DKG Display Tech. | |
13 | * | |
14 | * See file CREDITS for list of people who contributed to this | |
15 | * project. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
30 | * MA 02110-1301 USA | |
31 | */ | |
32 | ||
33 | #include <config.h> | |
34 | #include <asm/blackfin.h> | |
35 | #include <asm/mach-common/bits/core.h> | |
36 | #include <asm/mach-common/bits/dma.h> | |
37 | #include <asm/mach-common/bits/pll.h> | |
38 | ||
39 | #include "serial.h" | |
40 | ||
41 | /* It may seem odd that we make calls to functions even though we haven't | |
42 | * relocated ourselves yet out of {flash,ram,wherever}. This is OK because | |
43 | * the "call" instruction in the Blackfin architecture is actually PC | |
44 | * relative. So we can call functions all we want and not worry about them | |
45 | * not being relocated yet. | |
46 | */ | |
47 | ||
48 | .text | |
49 | ENTRY(_start) | |
50 | ||
51 | /* Set our initial stack to L1 scratch space */ | |
96092229 MF |
52 | sp.l = LO(L1_SRAM_SCRATCH_END - 20); |
53 | sp.h = HI(L1_SRAM_SCRATCH_END - 20); | |
9171fc81 MF |
54 | |
55 | #ifdef CONFIG_HW_WATCHDOG | |
56 | # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START | |
57 | # define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000 | |
58 | # endif | |
59 | /* Program the watchdog with an initial timeout of ~5 seconds. | |
60 | * That should be long enough to bootstrap ourselves up and | |
61 | * then the common u-boot code can take over. | |
62 | */ | |
63 | P0.L = LO(WDOG_CNT); | |
64 | P0.H = HI(WDOG_CNT); | |
65 | R0.L = 0; | |
66 | R0.H = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START)); | |
67 | [P0] = R0; | |
68 | /* fire up the watchdog - R0.L above needs to be 0x0000 */ | |
69 | W[P0 + (WDOG_CTL - WDOG_CNT)] = R0; | |
70 | #endif | |
71 | ||
72 | /* Turn on the serial for debugging the init process */ | |
73 | serial_early_init | |
74 | serial_early_set_baud | |
75 | ||
76 | serial_early_puts("Init Registers"); | |
77 | ||
70c4c032 | 78 | /* Disable self-nested interrupts and enable CYCLES for udelay() */ |
9171fc81 MF |
79 | R0 = CCEN | 0x30; |
80 | SYSCFG = R0; | |
81 | ||
82 | /* Zero out registers required by Blackfin ABI. | |
83 | * http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface | |
84 | */ | |
85 | r1 = 0 (x); | |
86 | /* Disable circular buffers */ | |
87 | l0 = r1; | |
88 | l1 = r1; | |
89 | l2 = r1; | |
90 | l3 = r1; | |
91 | /* Disable hardware loops in case we were started by 'go' */ | |
92 | lc0 = r1; | |
93 | lc1 = r1; | |
94 | ||
95 | /* Save RETX so we can pass it while booting Linux */ | |
96 | r7 = RETX; | |
97 | ||
7527feef | 98 | #if CONFIG_MEM_SIZE |
74398b23 MF |
99 | /* Figure out where we are currently executing so that we can decide |
100 | * how to best reprogram and relocate things. We'll pass below: | |
101 | * R4: load address of _start | |
102 | * R5: current (not load) address of _start | |
9171fc81 | 103 | */ |
74398b23 MF |
104 | serial_early_puts("Find ourselves"); |
105 | ||
9171fc81 | 106 | call _get_pc; |
74398b23 MF |
107 | .Loffset: |
108 | r1.l = .Loffset; | |
109 | r1.h = .Loffset; | |
110 | r4.l = _start; | |
111 | r4.h = _start; | |
112 | r3 = r1 - r4; | |
113 | r5 = r0 - r3; | |
114 | ||
115 | /* Inform upper layers if we had to do the relocation ourselves. | |
116 | * This allows us to detect whether we were loaded by 'go 0x1000' | |
117 | * or by the bootrom from an LDR. "R6" is "loaded_from_ldr". | |
118 | */ | |
119 | r6 = 1 (x); | |
120 | cc = r4 == r5; | |
121 | if cc jump .Lnorelocate; | |
122 | r6 = 0 (x); | |
9171fc81 | 123 | |
74398b23 MF |
124 | /* In bypass mode, we don't have an LDR with an init block |
125 | * so we need to explicitly call it ourselves. This will | |
126 | * reprogram our clocks, memory, and setup our async banks. | |
127 | */ | |
9171fc81 MF |
128 | serial_early_puts("Program Clocks"); |
129 | ||
74398b23 MF |
130 | /* if we're executing >=0x20000000, then we dont need to dma */ |
131 | r3 = 0x0; | |
132 | r3.h = 0x2000; | |
133 | cc = r5 < r3 (iu); | |
134 | if cc jump .Ldma_and_reprogram; | |
7527feef MF |
135 | #else |
136 | r6 = 1 (x); /* fake loaded_from_ldr = 1 */ | |
137 | #endif | |
ad907321 | 138 | r0 = 0 (x); /* set bootstruct to NULL */ |
9171fc81 | 139 | call _initcode; |
74398b23 MF |
140 | jump .Lprogrammed; |
141 | ||
142 | /* we're sitting in external memory, so dma into L1 and reprogram */ | |
143 | .Ldma_and_reprogram: | |
144 | r0.l = LO(L1_INST_SRAM); | |
145 | r0.h = HI(L1_INST_SRAM); | |
b1e2c551 MF |
146 | r1.l = __initcode_lma; |
147 | r1.h = __initcode_lma; | |
148 | r2.l = __initcode_len; | |
149 | r2.h = __initcode_len; | |
74398b23 MF |
150 | r1 = r1 - r4; /* convert r1 from load address of initcode ... */ |
151 | r1 = r1 + r5; /* ... to current (not load) address of initcode */ | |
152 | p3 = r0; | |
153 | call _dma_memcpy_nocache; | |
ad907321 | 154 | r0 = 0 (x); /* set bootstruct to NULL */ |
74398b23 | 155 | call (p3); |
9171fc81 MF |
156 | |
157 | /* Since we reprogrammed SCLK, we need to update the serial divisor */ | |
74398b23 | 158 | .Lprogrammed: |
9171fc81 MF |
159 | serial_early_set_baud |
160 | ||
7527feef | 161 | #if CONFIG_MEM_SIZE |
b5eba3fa | 162 | /* Relocate from wherever we are (FLASH/RAM/etc...) to the hardcoded |
dc2bfb0b | 163 | * monitor location in the end of RAM. We know that memcpy() only |
b5eba3fa MF |
164 | * uses registers, so it is safe to call here. Note that this only |
165 | * copies to external memory ... we do not start executing out of | |
166 | * it yet (see "lower to 15" below). | |
9171fc81 MF |
167 | */ |
168 | serial_early_puts("Relocate"); | |
74398b23 MF |
169 | r0 = r4; |
170 | r1 = r5; | |
dc2bfb0b MF |
171 | r2.l = LO(CONFIG_SYS_MONITOR_LEN); |
172 | r2.h = HI(CONFIG_SYS_MONITOR_LEN); | |
173 | call _memcpy_ASM; | |
7527feef | 174 | #endif |
9171fc81 MF |
175 | |
176 | /* Initialize BSS section ... we know that memset() does not | |
177 | * use the BSS, so it is safe to call here. The bootrom LDR | |
178 | * takes care of clearing things for us. | |
179 | */ | |
180 | serial_early_puts("Zero BSS"); | |
b1e2c551 MF |
181 | r0.l = __bss_vma; |
182 | r0.h = __bss_vma; | |
9171fc81 | 183 | r1 = 0 (x); |
b1e2c551 MF |
184 | r2.l = __bss_len; |
185 | r2.h = __bss_len; | |
9171fc81 MF |
186 | call _memset; |
187 | ||
188 | .Lnorelocate: | |
189 | ||
190 | /* Setup the actual stack in external memory */ | |
95433f6d MF |
191 | sp.h = HI(CONFIG_STACKBASE); |
192 | sp.l = LO(CONFIG_STACKBASE); | |
9171fc81 MF |
193 | fp = sp; |
194 | ||
195 | /* Now lower ourselves from the highest interrupt level to | |
196 | * the lowest. We do this by masking all interrupts but 15, | |
70c4c032 | 197 | * setting the 15 handler to ".Lenable_nested", raising the 15 |
9171fc81 MF |
198 | * interrupt, and then returning from the highest interrupt |
199 | * level to the dummy "jump" until the interrupt controller | |
b5eba3fa MF |
200 | * services the pending 15 interrupt. If executing out of |
201 | * flash, these steps also changes the code flow from flash | |
202 | * to external memory. | |
9171fc81 MF |
203 | */ |
204 | serial_early_puts("Lower to 15"); | |
205 | r0 = r7; | |
206 | r1 = r6; | |
207 | p0.l = LO(EVT15); | |
208 | p0.h = HI(EVT15); | |
70c4c032 MF |
209 | p1.l = .Lenable_nested; |
210 | p1.h = .Lenable_nested; | |
9171fc81 | 211 | [p0] = p1; |
bd33e5c6 MF |
212 | r7 = EVT_IVG15 (z); |
213 | sti r7; | |
9171fc81 MF |
214 | raise 15; |
215 | p4.l = .LWAIT_HERE; | |
216 | p4.h = .LWAIT_HERE; | |
217 | reti = p4; | |
218 | rti; | |
219 | ||
70c4c032 MF |
220 | /* Enable nested interrupts before continuing with cpu init */ |
221 | .Lenable_nested: | |
222 | cli r7; | |
223 | [--sp] = reti; | |
224 | jump.l _cpu_init_f; | |
225 | ||
9171fc81 MF |
226 | .LWAIT_HERE: |
227 | jump .LWAIT_HERE; | |
228 | ENDPROC(_start) | |
229 | ||
230 | LENTRY(_get_pc) | |
231 | r0 = rets; | |
232 | #if ANOMALY_05000371 | |
233 | NOP; | |
234 | NOP; | |
235 | NOP; | |
236 | #endif | |
237 | rts; | |
238 | ENDPROC(_get_pc) |