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1 | /* |
2 | * RealTime Clock | |
3 | * | |
e04acb2e | 4 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
8e585f02 TL |
5 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
8e585f02 TL |
8 | */ |
9 | ||
10 | #ifndef __MCFRTC_H__ | |
11 | #define __MCFRTC_H__ | |
12 | ||
13 | /* Real time Clock */ | |
14 | typedef struct rtc_ctrl { | |
15 | u32 hourmin; /* 0x00 Hours and Minutes Counter Register */ | |
16 | u32 seconds; /* 0x04 Seconds Counter Register */ | |
17 | u32 alrm_hm; /* 0x08 Hours and Minutes Alarm Register */ | |
18 | u32 alrm_sec; /* 0x0C Seconds Alarm Register */ | |
19 | u32 cr; /* 0x10 Control Register */ | |
20 | u32 isr; /* 0x14 Interrupt Status Register */ | |
21 | u32 ier; /* 0x18 Interrupt Enable Register */ | |
8ae158cd | 22 | u32 stpwatch; /* 0x1C Stopwatch Minutes Register */ |
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23 | u32 days; /* 0x20 Days Counter Register */ |
24 | u32 alrm_day; /* 0x24 Days Alarm Register */ | |
8ae158cd | 25 | void *extended; |
8e585f02 TL |
26 | } rtc_t; |
27 | ||
28 | /* Bit definitions and macros for HOURMIN */ | |
29 | #define RTC_HOURMIN_MINUTES(x) (((x)&0x0000003F)) | |
30 | #define RTC_HOURMIN_HOURS(x) (((x)&0x0000001F)<<8) | |
31 | ||
32 | /* Bit definitions and macros for SECONDS */ | |
33 | #define RTC_SECONDS_SECONDS(x) (((x)&0x0000003F)) | |
34 | ||
35 | /* Bit definitions and macros for ALRM_HM */ | |
36 | #define RTC_ALRM_HM_MINUTES(x) (((x)&0x0000003F)) | |
37 | #define RTC_ALRM_HM_HOURS(x) (((x)&0x0000001F)<<8) | |
38 | ||
39 | /* Bit definitions and macros for ALRM_SEC */ | |
40 | #define RTC_ALRM_SEC_SECONDS(x) (((x)&0x0000003F)) | |
41 | ||
42 | /* Bit definitions and macros for CR */ | |
43 | #define RTC_CR_SWR (0x00000001) | |
44 | #define RTC_CR_XTL(x) (((x)&0x00000003)<<5) | |
45 | #define RTC_CR_EN (0x00000080) | |
46 | #define RTC_CR_32768 (0x0) | |
47 | #define RTC_CR_32000 (0x1) | |
48 | #define RTC_CR_38400 (0x2) | |
49 | ||
50 | /* Bit definitions and macros for ISR */ | |
51 | #define RTC_ISR_SW (0x00000001) | |
52 | #define RTC_ISR_MIN (0x00000002) | |
53 | #define RTC_ISR_ALM (0x00000004) | |
54 | #define RTC_ISR_DAY (0x00000008) | |
55 | #define RTC_ISR_1HZ (0x00000010) | |
56 | #define RTC_ISR_HR (0x00000020) | |
57 | #define RTC_ISR_2HZ (0x00000080) | |
58 | #define RTC_ISR_SAM0 (0x00000100) | |
59 | #define RTC_ISR_SAM1 (0x00000200) | |
60 | #define RTC_ISR_SAM2 (0x00000400) | |
61 | #define RTC_ISR_SAM3 (0x00000800) | |
62 | #define RTC_ISR_SAM4 (0x00001000) | |
63 | #define RTC_ISR_SAM5 (0x00002000) | |
64 | #define RTC_ISR_SAM6 (0x00004000) | |
65 | #define RTC_ISR_SAM7 (0x00008000) | |
66 | ||
67 | /* Bit definitions and macros for IER */ | |
68 | #define RTC_IER_SW (0x00000001) | |
69 | #define RTC_IER_MIN (0x00000002) | |
70 | #define RTC_IER_ALM (0x00000004) | |
71 | #define RTC_IER_DAY (0x00000008) | |
72 | #define RTC_IER_1HZ (0x00000010) | |
73 | #define RTC_IER_HR (0x00000020) | |
74 | #define RTC_IER_2HZ (0x00000080) | |
75 | #define RTC_IER_SAM0 (0x00000100) | |
76 | #define RTC_IER_SAM1 (0x00000200) | |
77 | #define RTC_IER_SAM2 (0x00000400) | |
78 | #define RTC_IER_SAM3 (0x00000800) | |
79 | #define RTC_IER_SAM4 (0x00001000) | |
80 | #define RTC_IER_SAM5 (0x00002000) | |
81 | #define RTC_IER_SAM6 (0x00004000) | |
82 | #define RTC_IER_SAM7 (0x00008000) | |
83 | ||
84 | /* Bit definitions and macros for STPWCH */ | |
85 | #define RTC_STPWCH_CNT(x) (((x)&0x0000003F)) | |
86 | ||
87 | /* Bit definitions and macros for DAYS */ | |
88 | #define RTC_DAYS_DAYS(x) (((x)&0x0000FFFF)) | |
89 | ||
90 | /* Bit definitions and macros for ALRM_DAY */ | |
91 | #define RTC_ALRM_DAY_DAYS(x) (((x)&0x0000FFFF)) | |
92 | ||
93 | #endif /* __MCFRTC_H__ */ |