]>
Commit | Line | Data |
---|---|---|
5c952cf0 WD |
1 | /* |
2 | * (C) Copyright 2003, Psyent Corporation <www.psyent.com> | |
3 | * Scott McNutt <smcnutt@psyent.com> | |
4 | * | |
5 | * (C) Copyright 2000-2002 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
5c952cf0 WD |
9 | */ |
10 | ||
11 | #include <common.h> | |
52cb4d4f | 12 | #include <stdio_dev.h> |
5c952cf0 | 13 | #include <watchdog.h> |
5e93bd1c | 14 | #include <malloc.h> |
441cac10 | 15 | #include <mmc.h> |
5c952cf0 WD |
16 | #include <net.h> |
17 | #ifdef CONFIG_STATUS_LED | |
18 | #include <status_led.h> | |
19 | #endif | |
6d0f6bcf | 20 | #if defined(CONFIG_SYS_NIOS_EPCSBASE) |
1f6ce8f5 SM |
21 | #include <nios2-epcs.h> |
22 | #endif | |
441cac10 TC |
23 | #ifdef CONFIG_CMD_NAND |
24 | #include <nand.h> /* cannot even include nand.h if it isnt configured */ | |
25 | #endif | |
5c952cf0 | 26 | |
d87080b7 | 27 | DECLARE_GLOBAL_DATA_PTR; |
5c952cf0 WD |
28 | |
29 | /* | |
30 | * All attempts to come up with a "common" initialization sequence | |
31 | * that works for all boards and architectures failed: some of the | |
32 | * requirements are just _too_ different. To get rid of the resulting | |
33 | * mess of board dependend #ifdef'ed code we now make the whole | |
34 | * initialization sequence configurable to the user. | |
35 | * | |
36 | * The requirements for any new initalization function is simple: it | |
37 | * receives a pointer to the "global data" structure as it's only | |
38 | * argument, and returns an integer return code, where 0 means | |
39 | * "continue" and != 0 means "fatal error, hang the system". | |
40 | */ | |
41 | ||
42 | ||
5c952cf0 WD |
43 | typedef int (init_fnc_t) (void); |
44 | ||
5c952cf0 WD |
45 | |
46 | /************************************************************************ | |
47 | * Initialization sequence * | |
48 | ***********************************************************************/ | |
49 | ||
50 | init_fnc_t *init_sequence[] = { | |
5c952cf0 WD |
51 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
52 | board_early_init_f, /* Call board-specific init code early.*/ | |
53 | #endif | |
6d0f6bcf | 54 | #if defined(CONFIG_SYS_NIOS_EPCSBASE) |
1f6ce8f5 SM |
55 | epcs_reset, |
56 | #endif | |
5c952cf0 WD |
57 | |
58 | env_init, | |
59 | serial_init, | |
60 | console_init_f, | |
61 | display_options, | |
62 | checkcpu, | |
63 | checkboard, | |
64 | NULL, /* Terminate this list */ | |
65 | }; | |
66 | ||
67 | ||
68 | /***********************************************************************/ | |
63495ad7 | 69 | void board_init(void) |
5c952cf0 | 70 | { |
5c952cf0 WD |
71 | bd_t *bd; |
72 | init_fnc_t **init_fnc_ptr; | |
7dfb0602 TC |
73 | static gd_t gd_data; |
74 | static bd_t bd_data; | |
5c952cf0 | 75 | |
7dfb0602 TC |
76 | /* Pointer is writable since we allocated a register for it. */ |
77 | gd = &gd_data; | |
5c952cf0 | 78 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
63495ad7 | 79 | __asm__ __volatile__("" : : : "memory"); |
5c952cf0 | 80 | |
7dfb0602 | 81 | gd->bd = &bd_data; |
5c952cf0 WD |
82 | gd->baudrate = CONFIG_BAUDRATE; |
83 | gd->cpu_clk = CONFIG_SYS_CLK_FREQ; | |
84 | ||
85 | bd = gd->bd; | |
6d0f6bcf JCPV |
86 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; |
87 | bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; | |
441cac10 | 88 | #ifndef CONFIG_SYS_NO_FLASH |
6d0f6bcf | 89 | bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; |
441cac10 | 90 | #endif |
6d0f6bcf | 91 | #if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE) |
63495ad7 | 92 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; |
6d0f6bcf | 93 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; |
5c952cf0 WD |
94 | #endif |
95 | bd->bi_baudrate = CONFIG_BAUDRATE; | |
96 | ||
97 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
63495ad7 AB |
98 | WATCHDOG_RESET(); |
99 | if ((*init_fnc_ptr) () != 0) | |
100 | hang(); | |
5c952cf0 WD |
101 | } |
102 | ||
63495ad7 | 103 | WATCHDOG_RESET(); |
d4e8ada0 PT |
104 | |
105 | /* The Malloc area is immediately below the monitor copy in RAM */ | |
a483a167 | 106 | mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); |
c790b04d | 107 | |
441cac10 | 108 | #ifndef CONFIG_SYS_NO_FLASH |
63495ad7 | 109 | WATCHDOG_RESET(); |
5c952cf0 | 110 | bd->bi_flashsize = flash_init(); |
441cac10 TC |
111 | #endif |
112 | ||
113 | #ifdef CONFIG_CMD_NAND | |
114 | puts("NAND: "); | |
115 | nand_init(); | |
116 | #endif | |
117 | ||
118 | #ifdef CONFIG_GENERIC_MMC | |
119 | puts("MMC: "); | |
120 | mmc_initialize(bd); | |
121 | #endif | |
5c952cf0 | 122 | |
63495ad7 | 123 | WATCHDOG_RESET(); |
5c952cf0 WD |
124 | env_relocate(); |
125 | ||
63495ad7 | 126 | WATCHDOG_RESET(); |
52cb4d4f | 127 | stdio_init(); |
5c952cf0 WD |
128 | jumptable_init(); |
129 | console_init_r(); | |
130 | ||
63495ad7 AB |
131 | WATCHDOG_RESET(); |
132 | interrupt_init(); | |
5c952cf0 | 133 | |
1f6ce8f5 | 134 | #if defined(CONFIG_BOARD_LATE_INIT) |
63495ad7 | 135 | board_late_init(); |
1f6ce8f5 SM |
136 | #endif |
137 | ||
3fd2a1f3 | 138 | #if defined(CONFIG_CMD_NET) |
63495ad7 AB |
139 | puts("Net: "); |
140 | eth_initialize(bd); | |
3fd2a1f3 SM |
141 | #endif |
142 | ||
5c952cf0 WD |
143 | /* main_loop */ |
144 | for (;;) { | |
63495ad7 AB |
145 | WATCHDOG_RESET(); |
146 | main_loop(); | |
5c952cf0 WD |
147 | } |
148 | } |