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Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
7 | choice | |
8 | prompt "Target select" | |
a26cd049 | 9 | optional |
dd84058d MY |
10 | |
11 | config TARGET_SBC8548 | |
12 | bool "Support sbc8548" | |
281ed4c7 | 13 | select ARCH_MPC8548 |
dd84058d MY |
14 | |
15 | config TARGET_SOCRATES | |
16 | bool "Support socrates" | |
25cb74b3 | 17 | select ARCH_MPC8544 |
dd84058d | 18 | |
45a8d117 YS |
19 | config TARGET_B4420QDS |
20 | bool "Support B4420QDS" | |
b41f192b | 21 | select ARCH_B4420 |
45a8d117 YS |
22 | select SUPPORT_SPL |
23 | select PHYS_64BIT | |
24 | ||
dd84058d MY |
25 | config TARGET_B4860QDS |
26 | bool "Support B4860QDS" | |
3006ebc3 | 27 | select ARCH_B4860 |
e5ec4815 | 28 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 29 | select SUPPORT_SPL |
bb6b142f | 30 | select PHYS_64BIT |
dd84058d MY |
31 | |
32 | config TARGET_BSC9131RDB | |
33 | bool "Support BSC9131RDB" | |
115d60c0 | 34 | select ARCH_BSC9131 |
02627356 | 35 | select SUPPORT_SPL |
a5d67547 | 36 | select BOARD_EARLY_INIT_F |
dd84058d MY |
37 | |
38 | config TARGET_BSC9132QDS | |
39 | bool "Support BSC9132QDS" | |
115d60c0 | 40 | select ARCH_BSC9132 |
e5ec4815 | 41 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 42 | select SUPPORT_SPL |
a5d67547 | 43 | select BOARD_EARLY_INIT_F |
dd84058d MY |
44 | |
45 | config TARGET_C29XPCIE | |
46 | bool "Support C29XPCIE" | |
4fd64746 | 47 | select ARCH_C29X |
e5ec4815 | 48 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 49 | select SUPPORT_SPL |
cf6bbe4c | 50 | select SUPPORT_TPL |
bb6b142f | 51 | select PHYS_64BIT |
dd84058d MY |
52 | |
53 | config TARGET_P3041DS | |
54 | bool "Support P3041DS" | |
bb6b142f | 55 | select PHYS_64BIT |
5e5fdd2d | 56 | select ARCH_P3041 |
e5ec4815 | 57 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
58 | |
59 | config TARGET_P4080DS | |
60 | bool "Support P4080DS" | |
bb6b142f | 61 | select PHYS_64BIT |
e71372cb | 62 | select ARCH_P4080 |
e5ec4815 | 63 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
64 | |
65 | config TARGET_P5020DS | |
66 | bool "Support P5020DS" | |
bb6b142f | 67 | select PHYS_64BIT |
cefe11cd | 68 | select ARCH_P5020 |
e5ec4815 | 69 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
70 | |
71 | config TARGET_P5040DS | |
72 | bool "Support P5040DS" | |
bb6b142f | 73 | select PHYS_64BIT |
95390360 | 74 | select ARCH_P5040 |
e5ec4815 | 75 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
76 | |
77 | config TARGET_MPC8536DS | |
78 | bool "Support MPC8536DS" | |
24ad75ae | 79 | select ARCH_MPC8536 |
d26e34c4 YS |
80 | # Use DDR3 controller with DDR2 DIMMs on this board |
81 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
82 | |
83 | config TARGET_MPC8540ADS | |
84 | bool "Support MPC8540ADS" | |
7f825218 | 85 | select ARCH_MPC8540 |
dd84058d MY |
86 | |
87 | config TARGET_MPC8541CDS | |
88 | bool "Support MPC8541CDS" | |
3aff3082 | 89 | select ARCH_MPC8541 |
dd84058d MY |
90 | |
91 | config TARGET_MPC8544DS | |
92 | bool "Support MPC8544DS" | |
25cb74b3 | 93 | select ARCH_MPC8544 |
dd84058d MY |
94 | |
95 | config TARGET_MPC8548CDS | |
96 | bool "Support MPC8548CDS" | |
281ed4c7 | 97 | select ARCH_MPC8548 |
dd84058d MY |
98 | |
99 | config TARGET_MPC8555CDS | |
100 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 101 | select ARCH_MPC8555 |
dd84058d MY |
102 | |
103 | config TARGET_MPC8560ADS | |
104 | bool "Support MPC8560ADS" | |
99d0a312 | 105 | select ARCH_MPC8560 |
dd84058d MY |
106 | |
107 | config TARGET_MPC8568MDS | |
108 | bool "Support MPC8568MDS" | |
d07c3843 | 109 | select ARCH_MPC8568 |
dd84058d MY |
110 | |
111 | config TARGET_MPC8569MDS | |
112 | bool "Support MPC8569MDS" | |
23b36a7d | 113 | select ARCH_MPC8569 |
dd84058d MY |
114 | |
115 | config TARGET_MPC8572DS | |
116 | bool "Support MPC8572DS" | |
c8f48474 | 117 | select ARCH_MPC8572 |
d26e34c4 YS |
118 | # Use DDR3 controller with DDR2 DIMMs on this board |
119 | select SYS_FSL_DDRC_GEN3 | |
dd84058d | 120 | |
7601686c YS |
121 | config TARGET_P1010RDB_PA |
122 | bool "Support P1010RDB_PA" | |
123 | select ARCH_P1010 | |
e5ec4815 | 124 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
7601686c YS |
125 | select SUPPORT_SPL |
126 | select SUPPORT_TPL | |
127 | ||
128 | config TARGET_P1010RDB_PB | |
129 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 130 | select ARCH_P1010 |
e5ec4815 | 131 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 132 | select SUPPORT_SPL |
cf6bbe4c | 133 | select SUPPORT_TPL |
dd84058d MY |
134 | |
135 | config TARGET_P1022DS | |
136 | bool "Support P1022DS" | |
feb9e25b | 137 | select ARCH_P1022 |
02627356 | 138 | select SUPPORT_SPL |
cf6bbe4c | 139 | select SUPPORT_TPL |
dd84058d MY |
140 | |
141 | config TARGET_P1023RDB | |
142 | bool "Support P1023RDB" | |
9bb1d6bc | 143 | select ARCH_P1023 |
dd84058d | 144 | |
fedae6eb YS |
145 | config TARGET_P1020MBG |
146 | bool "Support P1020MBG-PC" | |
147 | select SUPPORT_SPL | |
148 | select SUPPORT_TPL | |
484fff64 YS |
149 | select ARCH_P1020 |
150 | ||
aa14620c YS |
151 | config TARGET_P1020RDB_PC |
152 | bool "Support P1020RDB-PC" | |
153 | select SUPPORT_SPL | |
154 | select SUPPORT_TPL | |
484fff64 | 155 | select ARCH_P1020 |
aa14620c | 156 | |
f404b66c YS |
157 | config TARGET_P1020RDB_PD |
158 | bool "Support P1020RDB-PD" | |
159 | select SUPPORT_SPL | |
160 | select SUPPORT_TPL | |
484fff64 | 161 | select ARCH_P1020 |
f404b66c | 162 | |
e9bc8a8f YS |
163 | config TARGET_P1020UTM |
164 | bool "Support P1020UTM" | |
165 | select SUPPORT_SPL | |
166 | select SUPPORT_TPL | |
484fff64 | 167 | select ARCH_P1020 |
fedae6eb | 168 | |
da439db3 YS |
169 | config TARGET_P1021RDB |
170 | bool "Support P1021RDB" | |
171 | select SUPPORT_SPL | |
172 | select SUPPORT_TPL | |
a990799d | 173 | select ARCH_P1021 |
da439db3 | 174 | |
4eedabfe YS |
175 | config TARGET_P1024RDB |
176 | bool "Support P1024RDB" | |
177 | select SUPPORT_SPL | |
178 | select SUPPORT_TPL | |
52b6f13d | 179 | select ARCH_P1024 |
4eedabfe | 180 | |
b0c98b4b YS |
181 | config TARGET_P1025RDB |
182 | bool "Support P1025RDB" | |
183 | select SUPPORT_SPL | |
184 | select SUPPORT_TPL | |
4167a67d | 185 | select ARCH_P1025 |
b0c98b4b | 186 | |
8435aa77 YS |
187 | config TARGET_P2020RDB |
188 | bool "Support P2020RDB-PC" | |
189 | select SUPPORT_SPL | |
190 | select SUPPORT_TPL | |
4593637b | 191 | select ARCH_P2020 |
8435aa77 | 192 | |
dd84058d MY |
193 | config TARGET_P1_TWR |
194 | bool "Support p1_twr" | |
4167a67d | 195 | select ARCH_P1025 |
dd84058d | 196 | |
dd84058d MY |
197 | config TARGET_P2041RDB |
198 | bool "Support P2041RDB" | |
ce040c83 | 199 | select ARCH_P2041 |
e5ec4815 | 200 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 201 | select PHYS_64BIT |
dd84058d MY |
202 | |
203 | config TARGET_QEMU_PPCE500 | |
204 | bool "Support qemu-ppce500" | |
10343403 | 205 | select ARCH_QEMU_E500 |
bb6b142f | 206 | select PHYS_64BIT |
dd84058d | 207 | |
6f53bd47 YS |
208 | config TARGET_T1024QDS |
209 | bool "Support T1024QDS" | |
e5d5f5a8 | 210 | select ARCH_T1024 |
e5ec4815 | 211 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
aba80048 | 212 | select SUPPORT_SPL |
bb6b142f | 213 | select PHYS_64BIT |
aba80048 | 214 | |
08c75292 YS |
215 | config TARGET_T1023RDB |
216 | bool "Support T1023RDB" | |
5ff3f41d | 217 | select ARCH_T1023 |
e5ec4815 | 218 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
08c75292 YS |
219 | select SUPPORT_SPL |
220 | select PHYS_64BIT | |
221 | ||
222 | config TARGET_T1024RDB | |
223 | bool "Support T1024RDB" | |
e5d5f5a8 | 224 | select ARCH_T1024 |
e5ec4815 | 225 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
48c6f328 | 226 | select SUPPORT_SPL |
bb6b142f | 227 | select PHYS_64BIT |
48c6f328 | 228 | |
dd84058d MY |
229 | config TARGET_T1040QDS |
230 | bool "Support T1040QDS" | |
5d737010 | 231 | select ARCH_T1040 |
e5ec4815 | 232 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 233 | select PHYS_64BIT |
dd84058d | 234 | |
95a809b9 YS |
235 | config TARGET_T1040RDB |
236 | bool "Support T1040RDB" | |
5d737010 | 237 | select ARCH_T1040 |
e5ec4815 | 238 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
95a809b9 YS |
239 | select SUPPORT_SPL |
240 | select PHYS_64BIT | |
241 | ||
a016735c YS |
242 | config TARGET_T1040D4RDB |
243 | bool "Support T1040D4RDB" | |
244 | select ARCH_T1040 | |
e5ec4815 | 245 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
a016735c YS |
246 | select SUPPORT_SPL |
247 | select PHYS_64BIT | |
248 | ||
95a809b9 YS |
249 | config TARGET_T1042RDB |
250 | bool "Support T1042RDB" | |
5449c98a | 251 | select ARCH_T1042 |
e5ec4815 | 252 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 253 | select SUPPORT_SPL |
bb6b142f | 254 | select PHYS_64BIT |
dd84058d | 255 | |
319ed24a YS |
256 | config TARGET_T1042D4RDB |
257 | bool "Support T1042D4RDB" | |
258 | select ARCH_T1042 | |
e5ec4815 | 259 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
319ed24a YS |
260 | select SUPPORT_SPL |
261 | select PHYS_64BIT | |
262 | ||
55ed8ae3 YS |
263 | config TARGET_T1042RDB_PI |
264 | bool "Support T1042RDB_PI" | |
265 | select ARCH_T1042 | |
e5ec4815 | 266 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
55ed8ae3 YS |
267 | select SUPPORT_SPL |
268 | select PHYS_64BIT | |
269 | ||
638d5be0 YS |
270 | config TARGET_T2080QDS |
271 | bool "Support T2080QDS" | |
0f3d80e9 | 272 | select ARCH_T2080 |
e5ec4815 | 273 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 274 | select SUPPORT_SPL |
bb6b142f | 275 | select PHYS_64BIT |
dd84058d | 276 | |
01671e66 YS |
277 | config TARGET_T2080RDB |
278 | bool "Support T2080RDB" | |
0f3d80e9 | 279 | select ARCH_T2080 |
e5ec4815 | 280 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 281 | select SUPPORT_SPL |
bb6b142f | 282 | select PHYS_64BIT |
dd84058d | 283 | |
638d5be0 YS |
284 | config TARGET_T2081QDS |
285 | bool "Support T2081QDS" | |
0f3d80e9 | 286 | select ARCH_T2081 |
638d5be0 YS |
287 | select SUPPORT_SPL |
288 | select PHYS_64BIT | |
289 | ||
9c21d06c YS |
290 | config TARGET_T4160QDS |
291 | bool "Support T4160QDS" | |
652a7bbd | 292 | select ARCH_T4160 |
e5ec4815 | 293 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
9c21d06c YS |
294 | select SUPPORT_SPL |
295 | select PHYS_64BIT | |
296 | ||
12ffdb3b YS |
297 | config TARGET_T4160RDB |
298 | bool "Support T4160RDB" | |
652a7bbd | 299 | select ARCH_T4160 |
12ffdb3b YS |
300 | select SUPPORT_SPL |
301 | select PHYS_64BIT | |
302 | ||
dd84058d MY |
303 | config TARGET_T4240QDS |
304 | bool "Support T4240QDS" | |
26bc57da | 305 | select ARCH_T4240 |
e5ec4815 | 306 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 307 | select SUPPORT_SPL |
bb6b142f | 308 | select PHYS_64BIT |
dd84058d MY |
309 | |
310 | config TARGET_T4240RDB | |
311 | bool "Support T4240RDB" | |
26bc57da | 312 | select ARCH_T4240 |
373762c3 | 313 | select SUPPORT_SPL |
bb6b142f | 314 | select PHYS_64BIT |
dd84058d MY |
315 | |
316 | config TARGET_CONTROLCENTERD | |
317 | bool "Support controlcenterd" | |
feb9e25b | 318 | select ARCH_P1022 |
dd84058d MY |
319 | |
320 | config TARGET_KMP204X | |
321 | bool "Support kmp204x" | |
ce040c83 | 322 | select ARCH_P2041 |
bb6b142f | 323 | select PHYS_64BIT |
97072747 | 324 | imply CMD_CRAMFS |
80e44cfe | 325 | imply FS_CRAMFS |
dd84058d | 326 | |
dd84058d MY |
327 | config TARGET_XPEDITE520X |
328 | bool "Support xpedite520x" | |
281ed4c7 | 329 | select ARCH_MPC8548 |
dd84058d MY |
330 | |
331 | config TARGET_XPEDITE537X | |
332 | bool "Support xpedite537x" | |
c8f48474 | 333 | select ARCH_MPC8572 |
d26e34c4 YS |
334 | # Use DDR3 controller with DDR2 DIMMs on this board |
335 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
336 | |
337 | config TARGET_XPEDITE550X | |
338 | bool "Support xpedite550x" | |
4593637b | 339 | select ARCH_P2020 |
dd84058d | 340 | |
8b0044ff OZ |
341 | config TARGET_UCP1020 |
342 | bool "Support uCP1020" | |
484fff64 | 343 | select ARCH_P1020 |
8b0044ff | 344 | |
22a1b99a YS |
345 | config TARGET_CYRUS_P5020 |
346 | bool "Support Varisys Cyrus P5020" | |
347 | select ARCH_P5020 | |
348 | select PHYS_64BIT | |
349 | ||
350 | config TARGET_CYRUS_P5040 | |
351 | bool "Support Varisys Cyrus P5040" | |
352 | select ARCH_P5040 | |
bb6b142f | 353 | select PHYS_64BIT |
87e29878 | 354 | |
dd84058d MY |
355 | endchoice |
356 | ||
b41f192b YS |
357 | config ARCH_B4420 |
358 | bool | |
f8dee360 | 359 | select E500MC |
9ec10107 | 360 | select E6500 |
05cb79a7 | 361 | select FSL_LAW |
22120f11 | 362 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
363 | select SYS_FSL_ERRATUM_A004477 |
364 | select SYS_FSL_ERRATUM_A005871 | |
365 | select SYS_FSL_ERRATUM_A006379 | |
366 | select SYS_FSL_ERRATUM_A006384 | |
367 | select SYS_FSL_ERRATUM_A006475 | |
368 | select SYS_FSL_ERRATUM_A006593 | |
369 | select SYS_FSL_ERRATUM_A007075 | |
370 | select SYS_FSL_ERRATUM_A007186 | |
371 | select SYS_FSL_ERRATUM_A007212 | |
372 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 373 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 374 | select SYS_FSL_HAS_SEC |
7371774a | 375 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 376 | select SYS_FSL_SEC_BE |
2c2e2c9e | 377 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 378 | select SYS_PPC64 |
d98b98d6 | 379 | select FSL_IFC |
b41f192b | 380 | |
3006ebc3 YS |
381 | config ARCH_B4860 |
382 | bool | |
f8dee360 | 383 | select E500MC |
9ec10107 | 384 | select E6500 |
05cb79a7 | 385 | select FSL_LAW |
22120f11 | 386 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
387 | select SYS_FSL_ERRATUM_A004477 |
388 | select SYS_FSL_ERRATUM_A005871 | |
389 | select SYS_FSL_ERRATUM_A006379 | |
390 | select SYS_FSL_ERRATUM_A006384 | |
391 | select SYS_FSL_ERRATUM_A006475 | |
392 | select SYS_FSL_ERRATUM_A006593 | |
393 | select SYS_FSL_ERRATUM_A007075 | |
394 | select SYS_FSL_ERRATUM_A007186 | |
395 | select SYS_FSL_ERRATUM_A007212 | |
06ad970b | 396 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 397 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 398 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 399 | select SYS_FSL_HAS_SEC |
7371774a | 400 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 401 | select SYS_FSL_SEC_BE |
2c2e2c9e | 402 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 403 | select SYS_PPC64 |
d98b98d6 | 404 | select FSL_IFC |
3006ebc3 | 405 | |
115d60c0 YS |
406 | config ARCH_BSC9131 |
407 | bool | |
05cb79a7 | 408 | select FSL_LAW |
22120f11 | 409 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
410 | select SYS_FSL_ERRATUM_A004477 |
411 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a | 412 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 413 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 414 | select SYS_FSL_HAS_SEC |
90b80386 | 415 | select SYS_FSL_SEC_BE |
2c2e2c9e | 416 | select SYS_FSL_SEC_COMPAT_4 |
d98b98d6 | 417 | select FSL_IFC |
115d60c0 YS |
418 | |
419 | config ARCH_BSC9132 | |
420 | bool | |
05cb79a7 | 421 | select FSL_LAW |
22120f11 | 422 | select SYS_FSL_DDR_VER_46 |
63659ff3 YS |
423 | select SYS_FSL_ERRATUM_A004477 |
424 | select SYS_FSL_ERRATUM_A005125 | |
425 | select SYS_FSL_ERRATUM_A005434 | |
c01e4a1a | 426 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
427 | select SYS_FSL_ERRATUM_I2C_A004447 |
428 | select SYS_FSL_ERRATUM_IFC_A002769 | |
d26e34c4 | 429 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 430 | select SYS_FSL_HAS_SEC |
90b80386 | 431 | select SYS_FSL_SEC_BE |
2c2e2c9e | 432 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 433 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 434 | select FSL_IFC |
115d60c0 | 435 | |
4fd64746 YS |
436 | config ARCH_C29X |
437 | bool | |
05cb79a7 | 438 | select FSL_LAW |
22120f11 | 439 | select SYS_FSL_DDR_VER_46 |
63659ff3 | 440 | select SYS_FSL_ERRATUM_A005125 |
c01e4a1a | 441 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 442 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 443 | select SYS_FSL_HAS_SEC |
90b80386 | 444 | select SYS_FSL_SEC_BE |
2c2e2c9e | 445 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 446 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 447 | select FSL_IFC |
4fd64746 | 448 | |
24ad75ae YS |
449 | config ARCH_MPC8536 |
450 | bool | |
05cb79a7 | 451 | select FSL_LAW |
63659ff3 YS |
452 | select SYS_FSL_ERRATUM_A004508 |
453 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 YS |
454 | select SYS_FSL_HAS_DDR2 |
455 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 456 | select SYS_FSL_HAS_SEC |
90b80386 | 457 | select SYS_FSL_SEC_BE |
2c2e2c9e | 458 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 459 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 460 | select FSL_ELBC |
24ad75ae | 461 | |
7f825218 YS |
462 | config ARCH_MPC8540 |
463 | bool | |
05cb79a7 | 464 | select FSL_LAW |
d26e34c4 | 465 | select SYS_FSL_HAS_DDR1 |
7f825218 | 466 | |
3aff3082 YS |
467 | config ARCH_MPC8541 |
468 | bool | |
05cb79a7 | 469 | select FSL_LAW |
d26e34c4 | 470 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 471 | select SYS_FSL_HAS_SEC |
90b80386 | 472 | select SYS_FSL_SEC_BE |
2c2e2c9e | 473 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 474 | |
25cb74b3 YS |
475 | config ARCH_MPC8544 |
476 | bool | |
05cb79a7 | 477 | select FSL_LAW |
63659ff3 | 478 | select SYS_FSL_ERRATUM_A005125 |
d26e34c4 | 479 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 480 | select SYS_FSL_HAS_SEC |
90b80386 | 481 | select SYS_FSL_SEC_BE |
2c2e2c9e | 482 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 483 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 484 | select FSL_ELBC |
25cb74b3 | 485 | |
281ed4c7 YS |
486 | config ARCH_MPC8548 |
487 | bool | |
05cb79a7 | 488 | select FSL_LAW |
63659ff3 YS |
489 | select SYS_FSL_ERRATUM_A005125 |
490 | select SYS_FSL_ERRATUM_NMG_DDR120 | |
491 | select SYS_FSL_ERRATUM_NMG_LBC103 | |
492 | select SYS_FSL_ERRATUM_NMG_ETSEC129 | |
493 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 YS |
494 | select SYS_FSL_HAS_DDR2 |
495 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 496 | select SYS_FSL_HAS_SEC |
90b80386 | 497 | select SYS_FSL_SEC_BE |
2c2e2c9e | 498 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 499 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 500 | |
3c3d8ab5 YS |
501 | config ARCH_MPC8555 |
502 | bool | |
05cb79a7 | 503 | select FSL_LAW |
d26e34c4 | 504 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 505 | select SYS_FSL_HAS_SEC |
90b80386 | 506 | select SYS_FSL_SEC_BE |
2c2e2c9e | 507 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 508 | |
99d0a312 YS |
509 | config ARCH_MPC8560 |
510 | bool | |
05cb79a7 | 511 | select FSL_LAW |
d26e34c4 | 512 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 513 | |
d07c3843 YS |
514 | config ARCH_MPC8568 |
515 | bool | |
05cb79a7 | 516 | select FSL_LAW |
d26e34c4 | 517 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 518 | select SYS_FSL_HAS_SEC |
90b80386 | 519 | select SYS_FSL_SEC_BE |
2c2e2c9e | 520 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 521 | |
23b36a7d YS |
522 | config ARCH_MPC8569 |
523 | bool | |
05cb79a7 | 524 | select FSL_LAW |
63659ff3 YS |
525 | select SYS_FSL_ERRATUM_A004508 |
526 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 | 527 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 528 | select SYS_FSL_HAS_SEC |
90b80386 | 529 | select SYS_FSL_SEC_BE |
2c2e2c9e | 530 | select SYS_FSL_SEC_COMPAT_2 |
06878977 | 531 | select FSL_ELBC |
23b36a7d | 532 | |
c8f48474 YS |
533 | config ARCH_MPC8572 |
534 | bool | |
05cb79a7 | 535 | select FSL_LAW |
63659ff3 YS |
536 | select SYS_FSL_ERRATUM_A004508 |
537 | select SYS_FSL_ERRATUM_A005125 | |
538 | select SYS_FSL_ERRATUM_DDR_115 | |
539 | select SYS_FSL_ERRATUM_DDR111_DDR134 | |
d26e34c4 YS |
540 | select SYS_FSL_HAS_DDR2 |
541 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 542 | select SYS_FSL_HAS_SEC |
90b80386 | 543 | select SYS_FSL_SEC_BE |
2c2e2c9e | 544 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 545 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 546 | select FSL_ELBC |
c8f48474 | 547 | |
7d5f9f84 YS |
548 | config ARCH_P1010 |
549 | bool | |
05cb79a7 | 550 | select FSL_LAW |
63659ff3 YS |
551 | select SYS_FSL_ERRATUM_A004477 |
552 | select SYS_FSL_ERRATUM_A004508 | |
553 | select SYS_FSL_ERRATUM_A005125 | |
554 | select SYS_FSL_ERRATUM_A006261 | |
555 | select SYS_FSL_ERRATUM_A007075 | |
c01e4a1a | 556 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
557 | select SYS_FSL_ERRATUM_I2C_A004447 |
558 | select SYS_FSL_ERRATUM_IFC_A002769 | |
559 | select SYS_FSL_ERRATUM_P1010_A003549 | |
560 | select SYS_FSL_ERRATUM_SEC_A003571 | |
561 | select SYS_FSL_ERRATUM_IFC_A003399 | |
d26e34c4 | 562 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 563 | select SYS_FSL_HAS_SEC |
90b80386 | 564 | select SYS_FSL_SEC_BE |
2c2e2c9e | 565 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 566 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 567 | select FSL_IFC |
7d5f9f84 | 568 | |
1cdd96f3 YS |
569 | config ARCH_P1011 |
570 | bool | |
05cb79a7 | 571 | select FSL_LAW |
63659ff3 YS |
572 | select SYS_FSL_ERRATUM_A004508 |
573 | select SYS_FSL_ERRATUM_A005125 | |
574 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 575 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 576 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 577 | select SYS_FSL_HAS_SEC |
90b80386 | 578 | select SYS_FSL_SEC_BE |
2c2e2c9e | 579 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 580 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 581 | select FSL_ELBC |
1cdd96f3 | 582 | |
484fff64 YS |
583 | config ARCH_P1020 |
584 | bool | |
05cb79a7 | 585 | select FSL_LAW |
63659ff3 YS |
586 | select SYS_FSL_ERRATUM_A004508 |
587 | select SYS_FSL_ERRATUM_A005125 | |
588 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 589 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 590 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 591 | select SYS_FSL_HAS_SEC |
90b80386 | 592 | select SYS_FSL_SEC_BE |
2c2e2c9e | 593 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 594 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 595 | select FSL_ELBC |
484fff64 | 596 | |
a990799d YS |
597 | config ARCH_P1021 |
598 | bool | |
05cb79a7 | 599 | select FSL_LAW |
63659ff3 YS |
600 | select SYS_FSL_ERRATUM_A004508 |
601 | select SYS_FSL_ERRATUM_A005125 | |
602 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 603 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 604 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 605 | select SYS_FSL_HAS_SEC |
90b80386 | 606 | select SYS_FSL_SEC_BE |
2c2e2c9e | 607 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 608 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 609 | select FSL_ELBC |
a990799d | 610 | |
feb9e25b YS |
611 | config ARCH_P1022 |
612 | bool | |
05cb79a7 | 613 | select FSL_LAW |
63659ff3 YS |
614 | select SYS_FSL_ERRATUM_A004477 |
615 | select SYS_FSL_ERRATUM_A004508 | |
616 | select SYS_FSL_ERRATUM_A005125 | |
617 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 618 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 619 | select SYS_FSL_ERRATUM_SATA_A001 |
d26e34c4 | 620 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 621 | select SYS_FSL_HAS_SEC |
90b80386 | 622 | select SYS_FSL_SEC_BE |
2c2e2c9e | 623 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 624 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 625 | select FSL_ELBC |
feb9e25b | 626 | |
9bb1d6bc YS |
627 | config ARCH_P1023 |
628 | bool | |
05cb79a7 | 629 | select FSL_LAW |
63659ff3 YS |
630 | select SYS_FSL_ERRATUM_A004508 |
631 | select SYS_FSL_ERRATUM_A005125 | |
632 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 | 633 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 634 | select SYS_FSL_HAS_SEC |
90b80386 | 635 | select SYS_FSL_SEC_BE |
2c2e2c9e | 636 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 637 | select FSL_ELBC |
9bb1d6bc | 638 | |
52b6f13d YS |
639 | config ARCH_P1024 |
640 | bool | |
05cb79a7 | 641 | select FSL_LAW |
63659ff3 YS |
642 | select SYS_FSL_ERRATUM_A004508 |
643 | select SYS_FSL_ERRATUM_A005125 | |
644 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 645 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 646 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 647 | select SYS_FSL_HAS_SEC |
90b80386 | 648 | select SYS_FSL_SEC_BE |
2c2e2c9e | 649 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 650 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 651 | select FSL_ELBC |
52b6f13d | 652 | |
4167a67d YS |
653 | config ARCH_P1025 |
654 | bool | |
05cb79a7 | 655 | select FSL_LAW |
63659ff3 YS |
656 | select SYS_FSL_ERRATUM_A004508 |
657 | select SYS_FSL_ERRATUM_A005125 | |
658 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 659 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 660 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 661 | select SYS_FSL_HAS_SEC |
90b80386 | 662 | select SYS_FSL_SEC_BE |
2c2e2c9e | 663 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 664 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 665 | select FSL_ELBC |
4167a67d | 666 | |
4593637b YS |
667 | config ARCH_P2020 |
668 | bool | |
05cb79a7 | 669 | select FSL_LAW |
63659ff3 YS |
670 | select SYS_FSL_ERRATUM_A004477 |
671 | select SYS_FSL_ERRATUM_A004508 | |
672 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a YS |
673 | select SYS_FSL_ERRATUM_ESDHC111 |
674 | select SYS_FSL_ERRATUM_ESDHC_A001 | |
d26e34c4 | 675 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 676 | select SYS_FSL_HAS_SEC |
90b80386 | 677 | select SYS_FSL_SEC_BE |
2c2e2c9e | 678 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 679 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 680 | select FSL_ELBC |
4593637b | 681 | |
ce040c83 YS |
682 | config ARCH_P2041 |
683 | bool | |
f8dee360 | 684 | select E500MC |
05cb79a7 | 685 | select FSL_LAW |
63659ff3 YS |
686 | select SYS_FSL_ERRATUM_A004510 |
687 | select SYS_FSL_ERRATUM_A004849 | |
688 | select SYS_FSL_ERRATUM_A006261 | |
689 | select SYS_FSL_ERRATUM_CPU_A003999 | |
690 | select SYS_FSL_ERRATUM_DDR_A003 | |
691 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 692 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
693 | select SYS_FSL_ERRATUM_I2C_A004447 |
694 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
695 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
696 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 697 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 698 | select SYS_FSL_HAS_SEC |
7371774a | 699 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 700 | select SYS_FSL_SEC_BE |
2c2e2c9e | 701 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 702 | select FSL_ELBC |
ce040c83 | 703 | |
5e5fdd2d YS |
704 | config ARCH_P3041 |
705 | bool | |
f8dee360 | 706 | select E500MC |
05cb79a7 | 707 | select FSL_LAW |
22120f11 | 708 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
709 | select SYS_FSL_ERRATUM_A004510 |
710 | select SYS_FSL_ERRATUM_A004849 | |
711 | select SYS_FSL_ERRATUM_A005812 | |
712 | select SYS_FSL_ERRATUM_A006261 | |
713 | select SYS_FSL_ERRATUM_CPU_A003999 | |
714 | select SYS_FSL_ERRATUM_DDR_A003 | |
715 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 716 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
717 | select SYS_FSL_ERRATUM_I2C_A004447 |
718 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
719 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
720 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 721 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 722 | select SYS_FSL_HAS_SEC |
7371774a | 723 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 724 | select SYS_FSL_SEC_BE |
2c2e2c9e | 725 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 726 | select FSL_ELBC |
5e5fdd2d | 727 | |
e71372cb YS |
728 | config ARCH_P4080 |
729 | bool | |
f8dee360 | 730 | select E500MC |
05cb79a7 | 731 | select FSL_LAW |
22120f11 | 732 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
733 | select SYS_FSL_ERRATUM_A004510 |
734 | select SYS_FSL_ERRATUM_A004580 | |
735 | select SYS_FSL_ERRATUM_A004849 | |
736 | select SYS_FSL_ERRATUM_A005812 | |
737 | select SYS_FSL_ERRATUM_A007075 | |
738 | select SYS_FSL_ERRATUM_CPC_A002 | |
739 | select SYS_FSL_ERRATUM_CPC_A003 | |
740 | select SYS_FSL_ERRATUM_CPU_A003999 | |
741 | select SYS_FSL_ERRATUM_DDR_A003 | |
742 | select SYS_FSL_ERRATUM_DDR_A003474 | |
743 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a YS |
744 | select SYS_FSL_ERRATUM_ESDHC111 |
745 | select SYS_FSL_ERRATUM_ESDHC13 | |
746 | select SYS_FSL_ERRATUM_ESDHC135 | |
63659ff3 YS |
747 | select SYS_FSL_ERRATUM_I2C_A004447 |
748 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
749 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
750 | select SYS_P4080_ERRATUM_CPU22 | |
751 | select SYS_P4080_ERRATUM_PCIE_A003 | |
752 | select SYS_P4080_ERRATUM_SERDES8 | |
753 | select SYS_P4080_ERRATUM_SERDES9 | |
754 | select SYS_P4080_ERRATUM_SERDES_A001 | |
755 | select SYS_P4080_ERRATUM_SERDES_A005 | |
d26e34c4 | 756 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 757 | select SYS_FSL_HAS_SEC |
7371774a | 758 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 759 | select SYS_FSL_SEC_BE |
2c2e2c9e | 760 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 761 | select FSL_ELBC |
e71372cb | 762 | |
cefe11cd YS |
763 | config ARCH_P5020 |
764 | bool | |
f8dee360 | 765 | select E500MC |
05cb79a7 | 766 | select FSL_LAW |
22120f11 | 767 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
768 | select SYS_FSL_ERRATUM_A004510 |
769 | select SYS_FSL_ERRATUM_A006261 | |
770 | select SYS_FSL_ERRATUM_DDR_A003 | |
771 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 772 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
773 | select SYS_FSL_ERRATUM_I2C_A004447 |
774 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
775 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 776 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 777 | select SYS_FSL_HAS_SEC |
7371774a | 778 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 779 | select SYS_FSL_SEC_BE |
2c2e2c9e | 780 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 781 | select SYS_PPC64 |
06878977 | 782 | select FSL_ELBC |
cefe11cd | 783 | |
95390360 YS |
784 | config ARCH_P5040 |
785 | bool | |
f8dee360 | 786 | select E500MC |
05cb79a7 | 787 | select FSL_LAW |
22120f11 | 788 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
789 | select SYS_FSL_ERRATUM_A004510 |
790 | select SYS_FSL_ERRATUM_A004699 | |
791 | select SYS_FSL_ERRATUM_A005812 | |
792 | select SYS_FSL_ERRATUM_A006261 | |
793 | select SYS_FSL_ERRATUM_DDR_A003 | |
794 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 795 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 796 | select SYS_FSL_ERRATUM_USB14 |
d26e34c4 | 797 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 798 | select SYS_FSL_HAS_SEC |
7371774a | 799 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 800 | select SYS_FSL_SEC_BE |
2c2e2c9e | 801 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 802 | select SYS_PPC64 |
06878977 | 803 | select FSL_ELBC |
95390360 | 804 | |
10343403 YS |
805 | config ARCH_QEMU_E500 |
806 | bool | |
807 | ||
5ff3f41d YS |
808 | config ARCH_T1023 |
809 | bool | |
f8dee360 | 810 | select E500MC |
05cb79a7 | 811 | select FSL_LAW |
22120f11 | 812 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
813 | select SYS_FSL_ERRATUM_A008378 |
814 | select SYS_FSL_ERRATUM_A009663 | |
815 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 816 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
817 | select SYS_FSL_HAS_DDR3 |
818 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 819 | select SYS_FSL_HAS_SEC |
7371774a | 820 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 821 | select SYS_FSL_SEC_BE |
2c2e2c9e | 822 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 823 | select FSL_IFC |
5ff3f41d | 824 | |
e5d5f5a8 YS |
825 | config ARCH_T1024 |
826 | bool | |
f8dee360 | 827 | select E500MC |
05cb79a7 | 828 | select FSL_LAW |
22120f11 | 829 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
830 | select SYS_FSL_ERRATUM_A008378 |
831 | select SYS_FSL_ERRATUM_A009663 | |
832 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 833 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
834 | select SYS_FSL_HAS_DDR3 |
835 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 836 | select SYS_FSL_HAS_SEC |
7371774a | 837 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 838 | select SYS_FSL_SEC_BE |
2c2e2c9e | 839 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 840 | select FSL_IFC |
e5d5f5a8 | 841 | |
5d737010 YS |
842 | config ARCH_T1040 |
843 | bool | |
f8dee360 | 844 | select E500MC |
05cb79a7 | 845 | select FSL_LAW |
22120f11 | 846 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
847 | select SYS_FSL_ERRATUM_A008044 |
848 | select SYS_FSL_ERRATUM_A008378 | |
849 | select SYS_FSL_ERRATUM_A009663 | |
850 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 851 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
852 | select SYS_FSL_HAS_DDR3 |
853 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 854 | select SYS_FSL_HAS_SEC |
7371774a | 855 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 856 | select SYS_FSL_SEC_BE |
2c2e2c9e | 857 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 858 | select FSL_IFC |
5d737010 | 859 | |
5449c98a YS |
860 | config ARCH_T1042 |
861 | bool | |
f8dee360 | 862 | select E500MC |
05cb79a7 | 863 | select FSL_LAW |
22120f11 | 864 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
865 | select SYS_FSL_ERRATUM_A008044 |
866 | select SYS_FSL_ERRATUM_A008378 | |
867 | select SYS_FSL_ERRATUM_A009663 | |
868 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 869 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
870 | select SYS_FSL_HAS_DDR3 |
871 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 872 | select SYS_FSL_HAS_SEC |
7371774a | 873 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 874 | select SYS_FSL_SEC_BE |
2c2e2c9e | 875 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 876 | select FSL_IFC |
5449c98a | 877 | |
0f3d80e9 YS |
878 | config ARCH_T2080 |
879 | bool | |
f8dee360 | 880 | select E500MC |
9ec10107 | 881 | select E6500 |
05cb79a7 | 882 | select FSL_LAW |
22120f11 | 883 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
884 | select SYS_FSL_ERRATUM_A006379 |
885 | select SYS_FSL_ERRATUM_A006593 | |
886 | select SYS_FSL_ERRATUM_A007186 | |
887 | select SYS_FSL_ERRATUM_A007212 | |
09bfd962 | 888 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 889 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 890 | select SYS_FSL_ERRATUM_A009942 |
c01e4a1a | 891 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 892 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 893 | select SYS_FSL_HAS_SEC |
7371774a | 894 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 895 | select SYS_FSL_SEC_BE |
2c2e2c9e | 896 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 897 | select SYS_PPC64 |
d98b98d6 | 898 | select FSL_IFC |
0f3d80e9 YS |
899 | |
900 | config ARCH_T2081 | |
901 | bool | |
f8dee360 | 902 | select E500MC |
9ec10107 | 903 | select E6500 |
05cb79a7 | 904 | select FSL_LAW |
22120f11 | 905 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
906 | select SYS_FSL_ERRATUM_A006379 |
907 | select SYS_FSL_ERRATUM_A006593 | |
908 | select SYS_FSL_ERRATUM_A007186 | |
909 | select SYS_FSL_ERRATUM_A007212 | |
910 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 911 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 912 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 913 | select SYS_FSL_HAS_SEC |
7371774a | 914 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 915 | select SYS_FSL_SEC_BE |
2c2e2c9e | 916 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 917 | select SYS_PPC64 |
d98b98d6 | 918 | select FSL_IFC |
0f3d80e9 | 919 | |
652a7bbd YS |
920 | config ARCH_T4160 |
921 | bool | |
f8dee360 | 922 | select E500MC |
9ec10107 | 923 | select E6500 |
05cb79a7 | 924 | select FSL_LAW |
22120f11 | 925 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
926 | select SYS_FSL_ERRATUM_A004468 |
927 | select SYS_FSL_ERRATUM_A005871 | |
928 | select SYS_FSL_ERRATUM_A006379 | |
929 | select SYS_FSL_ERRATUM_A006593 | |
930 | select SYS_FSL_ERRATUM_A007186 | |
931 | select SYS_FSL_ERRATUM_A007798 | |
932 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 933 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 934 | select SYS_FSL_HAS_SEC |
7371774a | 935 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 936 | select SYS_FSL_SEC_BE |
2c2e2c9e | 937 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 938 | select SYS_PPC64 |
d98b98d6 | 939 | select FSL_IFC |
652a7bbd | 940 | |
26bc57da YS |
941 | config ARCH_T4240 |
942 | bool | |
f8dee360 | 943 | select E500MC |
9ec10107 | 944 | select E6500 |
05cb79a7 | 945 | select FSL_LAW |
22120f11 | 946 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
947 | select SYS_FSL_ERRATUM_A004468 |
948 | select SYS_FSL_ERRATUM_A005871 | |
949 | select SYS_FSL_ERRATUM_A006261 | |
950 | select SYS_FSL_ERRATUM_A006379 | |
951 | select SYS_FSL_ERRATUM_A006593 | |
952 | select SYS_FSL_ERRATUM_A007186 | |
953 | select SYS_FSL_ERRATUM_A007798 | |
09bfd962 | 954 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 955 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 956 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 957 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 958 | select SYS_FSL_HAS_SEC |
7371774a | 959 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 960 | select SYS_FSL_SEC_BE |
2c2e2c9e | 961 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 962 | select SYS_PPC64 |
d98b98d6 | 963 | select FSL_IFC |
05cb79a7 | 964 | |
f8dee360 YS |
965 | config BOOKE |
966 | bool | |
967 | default y | |
968 | ||
969 | config E500 | |
970 | bool | |
971 | default y | |
972 | help | |
973 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
974 | ||
975 | config E500MC | |
976 | bool | |
977 | help | |
978 | Enble PowerPC E500MC core | |
979 | ||
9ec10107 YS |
980 | config E6500 |
981 | bool | |
982 | help | |
983 | Enable PowerPC E6500 core | |
984 | ||
05cb79a7 YS |
985 | config FSL_LAW |
986 | bool | |
987 | help | |
988 | Use Freescale common code for Local Access Window | |
26bc57da | 989 | |
c6e6bda3 YS |
990 | config SECURE_BOOT |
991 | bool "Secure Boot" | |
992 | help | |
993 | Enable Freescale Secure Boot feature. Normally selected | |
994 | by defconfig. If unsure, do not change. | |
995 | ||
3f82b56d YS |
996 | config MAX_CPUS |
997 | int "Maximum number of CPUs permitted for MPC85xx" | |
998 | default 12 if ARCH_T4240 | |
999 | default 8 if ARCH_P4080 || \ | |
1000 | ARCH_T4160 | |
1001 | default 4 if ARCH_B4860 || \ | |
1002 | ARCH_P2041 || \ | |
1003 | ARCH_P3041 || \ | |
1004 | ARCH_P5040 || \ | |
1005 | ARCH_T1040 || \ | |
1006 | ARCH_T1042 || \ | |
1007 | ARCH_T2080 || \ | |
1008 | ARCH_T2081 | |
1009 | default 2 if ARCH_B4420 || \ | |
1010 | ARCH_BSC9132 || \ | |
1011 | ARCH_MPC8572 || \ | |
1012 | ARCH_P1020 || \ | |
1013 | ARCH_P1021 || \ | |
1014 | ARCH_P1022 || \ | |
1015 | ARCH_P1023 || \ | |
1016 | ARCH_P1024 || \ | |
1017 | ARCH_P1025 || \ | |
1018 | ARCH_P2020 || \ | |
1019 | ARCH_P5020 || \ | |
3f82b56d YS |
1020 | ARCH_T1023 || \ |
1021 | ARCH_T1024 | |
1022 | default 1 | |
1023 | help | |
1024 | Set this number to the maximum number of possible CPUs in the SoC. | |
1025 | SoCs may have multiple clusters with each cluster may have multiple | |
1026 | ports. If some ports are reserved but higher ports are used for | |
1027 | cores, count the reserved ports. This will allocate enough memory | |
1028 | in spin table to properly handle all cores. | |
1029 | ||
830fc1bf YS |
1030 | config SYS_CCSRBAR_DEFAULT |
1031 | hex "Default CCSRBAR address" | |
1032 | default 0xff700000 if ARCH_BSC9131 || \ | |
1033 | ARCH_BSC9132 || \ | |
1034 | ARCH_C29X || \ | |
1035 | ARCH_MPC8536 || \ | |
1036 | ARCH_MPC8540 || \ | |
1037 | ARCH_MPC8541 || \ | |
1038 | ARCH_MPC8544 || \ | |
1039 | ARCH_MPC8548 || \ | |
1040 | ARCH_MPC8555 || \ | |
1041 | ARCH_MPC8560 || \ | |
1042 | ARCH_MPC8568 || \ | |
1043 | ARCH_MPC8569 || \ | |
1044 | ARCH_MPC8572 || \ | |
1045 | ARCH_P1010 || \ | |
1046 | ARCH_P1011 || \ | |
1047 | ARCH_P1020 || \ | |
1048 | ARCH_P1021 || \ | |
1049 | ARCH_P1022 || \ | |
1050 | ARCH_P1024 || \ | |
1051 | ARCH_P1025 || \ | |
1052 | ARCH_P2020 | |
1053 | default 0xff600000 if ARCH_P1023 | |
1054 | default 0xfe000000 if ARCH_B4420 || \ | |
1055 | ARCH_B4860 || \ | |
1056 | ARCH_P2041 || \ | |
1057 | ARCH_P3041 || \ | |
1058 | ARCH_P4080 || \ | |
1059 | ARCH_P5020 || \ | |
1060 | ARCH_P5040 || \ | |
830fc1bf YS |
1061 | ARCH_T1023 || \ |
1062 | ARCH_T1024 || \ | |
1063 | ARCH_T1040 || \ | |
1064 | ARCH_T1042 || \ | |
1065 | ARCH_T2080 || \ | |
1066 | ARCH_T2081 || \ | |
1067 | ARCH_T4160 || \ | |
1068 | ARCH_T4240 | |
1069 | default 0xe0000000 if ARCH_QEMU_E500 | |
1070 | help | |
1071 | Default value of CCSRBAR comes from power-on-reset. It | |
1072 | is fixed on each SoC. Some SoCs can have different value | |
1073 | if changed by pre-boot regime. The value here must match | |
1074 | the current value in SoC. If not sure, do not change. | |
1075 | ||
63659ff3 YS |
1076 | config SYS_FSL_ERRATUM_A004468 |
1077 | bool | |
1078 | ||
1079 | config SYS_FSL_ERRATUM_A004477 | |
1080 | bool | |
1081 | ||
1082 | config SYS_FSL_ERRATUM_A004508 | |
1083 | bool | |
1084 | ||
1085 | config SYS_FSL_ERRATUM_A004580 | |
1086 | bool | |
1087 | ||
1088 | config SYS_FSL_ERRATUM_A004699 | |
1089 | bool | |
1090 | ||
1091 | config SYS_FSL_ERRATUM_A004849 | |
1092 | bool | |
1093 | ||
1094 | config SYS_FSL_ERRATUM_A004510 | |
1095 | bool | |
1096 | ||
1097 | config SYS_FSL_ERRATUM_A004510_SVR_REV | |
1098 | hex | |
1099 | depends on SYS_FSL_ERRATUM_A004510 | |
1100 | default 0x20 if ARCH_P4080 | |
1101 | default 0x10 | |
1102 | ||
1103 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 | |
1104 | hex | |
1105 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) | |
1106 | default 0x11 | |
1107 | ||
1108 | config SYS_FSL_ERRATUM_A005125 | |
1109 | bool | |
1110 | ||
1111 | config SYS_FSL_ERRATUM_A005434 | |
1112 | bool | |
1113 | ||
1114 | config SYS_FSL_ERRATUM_A005812 | |
1115 | bool | |
1116 | ||
1117 | config SYS_FSL_ERRATUM_A005871 | |
1118 | bool | |
1119 | ||
1120 | config SYS_FSL_ERRATUM_A006261 | |
1121 | bool | |
1122 | ||
1123 | config SYS_FSL_ERRATUM_A006379 | |
1124 | bool | |
1125 | ||
1126 | config SYS_FSL_ERRATUM_A006384 | |
1127 | bool | |
1128 | ||
1129 | config SYS_FSL_ERRATUM_A006475 | |
1130 | bool | |
1131 | ||
1132 | config SYS_FSL_ERRATUM_A006593 | |
1133 | bool | |
1134 | ||
1135 | config SYS_FSL_ERRATUM_A007075 | |
1136 | bool | |
1137 | ||
1138 | config SYS_FSL_ERRATUM_A007186 | |
1139 | bool | |
1140 | ||
1141 | config SYS_FSL_ERRATUM_A007212 | |
1142 | bool | |
1143 | ||
09bfd962 TB |
1144 | config SYS_FSL_ERRATUM_A007815 |
1145 | bool | |
1146 | ||
63659ff3 YS |
1147 | config SYS_FSL_ERRATUM_A007798 |
1148 | bool | |
1149 | ||
06ad970b DD |
1150 | config SYS_FSL_ERRATUM_A007907 |
1151 | bool | |
1152 | ||
63659ff3 YS |
1153 | config SYS_FSL_ERRATUM_A008044 |
1154 | bool | |
1155 | ||
1156 | config SYS_FSL_ERRATUM_CPC_A002 | |
1157 | bool | |
1158 | ||
1159 | config SYS_FSL_ERRATUM_CPC_A003 | |
1160 | bool | |
1161 | ||
1162 | config SYS_FSL_ERRATUM_CPU_A003999 | |
1163 | bool | |
1164 | ||
1165 | config SYS_FSL_ERRATUM_ELBC_A001 | |
1166 | bool | |
1167 | ||
1168 | config SYS_FSL_ERRATUM_I2C_A004447 | |
1169 | bool | |
1170 | ||
1171 | config SYS_FSL_A004447_SVR_REV | |
1172 | hex | |
1173 | depends on SYS_FSL_ERRATUM_I2C_A004447 | |
1174 | default 0x00 if ARCH_MPC8548 | |
1175 | default 0x10 if ARCH_P1010 | |
1176 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 | |
1177 | default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 | |
1178 | ||
1179 | config SYS_FSL_ERRATUM_IFC_A002769 | |
1180 | bool | |
1181 | ||
1182 | config SYS_FSL_ERRATUM_IFC_A003399 | |
1183 | bool | |
1184 | ||
1185 | config SYS_FSL_ERRATUM_NMG_CPU_A011 | |
1186 | bool | |
1187 | ||
1188 | config SYS_FSL_ERRATUM_NMG_ETSEC129 | |
1189 | bool | |
1190 | ||
1191 | config SYS_FSL_ERRATUM_NMG_LBC103 | |
1192 | bool | |
1193 | ||
1194 | config SYS_FSL_ERRATUM_P1010_A003549 | |
1195 | bool | |
1196 | ||
1197 | config SYS_FSL_ERRATUM_SATA_A001 | |
1198 | bool | |
1199 | ||
1200 | config SYS_FSL_ERRATUM_SEC_A003571 | |
1201 | bool | |
1202 | ||
1203 | config SYS_FSL_ERRATUM_SRIO_A004034 | |
1204 | bool | |
1205 | ||
1206 | config SYS_FSL_ERRATUM_USB14 | |
1207 | bool | |
1208 | ||
1209 | config SYS_P4080_ERRATUM_CPU22 | |
1210 | bool | |
1211 | ||
1212 | config SYS_P4080_ERRATUM_PCIE_A003 | |
1213 | bool | |
1214 | ||
1215 | config SYS_P4080_ERRATUM_SERDES8 | |
1216 | bool | |
1217 | ||
1218 | config SYS_P4080_ERRATUM_SERDES9 | |
1219 | bool | |
1220 | ||
1221 | config SYS_P4080_ERRATUM_SERDES_A001 | |
1222 | bool | |
1223 | ||
1224 | config SYS_P4080_ERRATUM_SERDES_A005 | |
1225 | bool | |
1226 | ||
7371774a YS |
1227 | config SYS_FSL_QORIQ_CHASSIS1 |
1228 | bool | |
1229 | ||
1230 | config SYS_FSL_QORIQ_CHASSIS2 | |
1231 | bool | |
1232 | ||
8303acbc YS |
1233 | config SYS_FSL_NUM_LAWS |
1234 | int "Number of local access windows" | |
1235 | depends on FSL_LAW | |
1236 | default 32 if ARCH_B4420 || \ | |
1237 | ARCH_B4860 || \ | |
1238 | ARCH_P2041 || \ | |
1239 | ARCH_P3041 || \ | |
1240 | ARCH_P4080 || \ | |
1241 | ARCH_P5020 || \ | |
1242 | ARCH_P5040 || \ | |
1243 | ARCH_T2080 || \ | |
1244 | ARCH_T2081 || \ | |
1245 | ARCH_T4160 || \ | |
1246 | ARCH_T4240 | |
08a37fd1 | 1247 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
1248 | ARCH_T1024 || \ |
1249 | ARCH_T1040 || \ | |
1250 | ARCH_T1042 | |
1251 | default 12 if ARCH_BSC9131 || \ | |
1252 | ARCH_BSC9132 || \ | |
1253 | ARCH_C29X || \ | |
1254 | ARCH_MPC8536 || \ | |
1255 | ARCH_MPC8572 || \ | |
1256 | ARCH_P1010 || \ | |
1257 | ARCH_P1011 || \ | |
1258 | ARCH_P1020 || \ | |
1259 | ARCH_P1021 || \ | |
1260 | ARCH_P1022 || \ | |
1261 | ARCH_P1023 || \ | |
1262 | ARCH_P1024 || \ | |
1263 | ARCH_P1025 || \ | |
1264 | ARCH_P2020 | |
1265 | default 10 if ARCH_MPC8544 || \ | |
1266 | ARCH_MPC8548 || \ | |
1267 | ARCH_MPC8568 || \ | |
1268 | ARCH_MPC8569 | |
1269 | default 8 if ARCH_MPC8540 || \ | |
1270 | ARCH_MPC8541 || \ | |
1271 | ARCH_MPC8555 || \ | |
1272 | ARCH_MPC8560 | |
1273 | help | |
1274 | Number of local access windows. This is fixed per SoC. | |
1275 | If not sure, do not change. | |
1276 | ||
9ec10107 YS |
1277 | config SYS_FSL_THREADS_PER_CORE |
1278 | int | |
1279 | default 2 if E6500 | |
1280 | default 1 | |
1281 | ||
26e79b65 YS |
1282 | config SYS_NUM_TLBCAMS |
1283 | int "Number of TLB CAM entries" | |
1284 | default 64 if E500MC | |
1285 | default 16 | |
1286 | help | |
1287 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
1288 | 16 for other E500 SoCs. | |
1289 | ||
4851278e YS |
1290 | config SYS_PPC64 |
1291 | bool | |
1292 | ||
53c95384 YS |
1293 | config SYS_PPC_E500_USE_DEBUG_TLB |
1294 | bool | |
1295 | ||
d98b98d6 PK |
1296 | config FSL_IFC |
1297 | bool | |
1298 | ||
06878977 PK |
1299 | config FSL_ELBC |
1300 | bool | |
1301 | ||
53c95384 YS |
1302 | config SYS_PPC_E500_DEBUG_TLB |
1303 | int "Temporary TLB entry for external debugger" | |
1304 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
1305 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
1306 | default 1 if ARCH_MPC8536 | |
1307 | default 2 if ARCH_MPC8572 || \ | |
1308 | ARCH_P1011 || \ | |
1309 | ARCH_P1020 || \ | |
1310 | ARCH_P1021 || \ | |
1311 | ARCH_P1022 || \ | |
1312 | ARCH_P1024 || \ | |
1313 | ARCH_P1025 || \ | |
1314 | ARCH_P2020 | |
1315 | default 3 if ARCH_P1010 || \ | |
1316 | ARCH_BSC9132 || \ | |
1317 | ARCH_C29X | |
1318 | help | |
1319 | Select a temporary TLB entry to be used during boot to work | |
1320 | around limitations in e500v1 and e500v2 external debugger | |
1321 | support. This reduces the portions of the boot code where | |
1322 | breakpoints and single stepping do not work. The value of this | |
1323 | symbol should be set to the TLB1 entry to be used for this | |
1324 | purpose. If unsure, do not change. | |
1325 | ||
1c40707e PK |
1326 | config SYS_FSL_IFC_CLK_DIV |
1327 | int "Divider of platform clock" | |
1328 | depends on FSL_IFC | |
1329 | default 2 if ARCH_B4420 || \ | |
1330 | ARCH_B4860 || \ | |
1331 | ARCH_T1024 || \ | |
1332 | ARCH_T1023 || \ | |
1333 | ARCH_T1040 || \ | |
1334 | ARCH_T1042 || \ | |
1335 | ARCH_T4160 || \ | |
1336 | ARCH_T4240 | |
1337 | default 1 | |
1338 | help | |
1339 | Defines divider of platform clock(clock input to | |
1340 | IFC controller). | |
1341 | ||
add63f94 PK |
1342 | config SYS_FSL_LBC_CLK_DIV |
1343 | int "Divider of platform clock" | |
1344 | depends on FSL_ELBC || ARCH_MPC8540 || \ | |
1345 | ARCH_MPC8548 || ARCH_MPC8541 || \ | |
1346 | ARCH_MPC8555 || ARCH_MPC8560 || \ | |
1347 | ARCH_MPC8568 | |
1348 | ||
1349 | default 2 if ARCH_P2041 || \ | |
1350 | ARCH_P3041 || \ | |
1351 | ARCH_P4080 || \ | |
1352 | ARCH_P5020 || \ | |
1353 | ARCH_P5040 | |
1354 | default 1 | |
1355 | ||
1356 | help | |
1357 | Defines divider of platform clock(clock input to | |
1358 | eLBC controller). | |
1359 | ||
dd84058d MY |
1360 | source "board/freescale/b4860qds/Kconfig" |
1361 | source "board/freescale/bsc9131rdb/Kconfig" | |
1362 | source "board/freescale/bsc9132qds/Kconfig" | |
1363 | source "board/freescale/c29xpcie/Kconfig" | |
1364 | source "board/freescale/corenet_ds/Kconfig" | |
1365 | source "board/freescale/mpc8536ds/Kconfig" | |
1366 | source "board/freescale/mpc8540ads/Kconfig" | |
1367 | source "board/freescale/mpc8541cds/Kconfig" | |
1368 | source "board/freescale/mpc8544ds/Kconfig" | |
1369 | source "board/freescale/mpc8548cds/Kconfig" | |
1370 | source "board/freescale/mpc8555cds/Kconfig" | |
1371 | source "board/freescale/mpc8560ads/Kconfig" | |
1372 | source "board/freescale/mpc8568mds/Kconfig" | |
1373 | source "board/freescale/mpc8569mds/Kconfig" | |
1374 | source "board/freescale/mpc8572ds/Kconfig" | |
1375 | source "board/freescale/p1010rdb/Kconfig" | |
1376 | source "board/freescale/p1022ds/Kconfig" | |
1377 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
1378 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
1379 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
1380 | source "board/freescale/p2041rdb/Kconfig" |
1381 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 1382 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 1383 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
1384 | source "board/freescale/t1040qds/Kconfig" |
1385 | source "board/freescale/t104xrdb/Kconfig" | |
1386 | source "board/freescale/t208xqds/Kconfig" | |
1387 | source "board/freescale/t208xrdb/Kconfig" | |
1388 | source "board/freescale/t4qds/Kconfig" | |
1389 | source "board/freescale/t4rdb/Kconfig" | |
1390 | source "board/gdsys/p1022/Kconfig" | |
1391 | source "board/keymile/kmp204x/Kconfig" | |
1392 | source "board/sbc8548/Kconfig" | |
1393 | source "board/socrates/Kconfig" | |
87e29878 | 1394 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
1395 | source "board/xes/xpedite520x/Kconfig" |
1396 | source "board/xes/xpedite537x/Kconfig" | |
1397 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 1398 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
1399 | |
1400 | endmenu |