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Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
230ecd71 SG |
7 | config CMD_ERRATA |
8 | bool "Enable the 'errata' command" | |
9 | depends on MPC85xx | |
10 | default y | |
11 | help | |
12 | This enables the 'errata' command which displays a list of errata | |
13 | work-arounds which are enabled for the current board. | |
14 | ||
dd84058d MY |
15 | choice |
16 | prompt "Target select" | |
a26cd049 | 17 | optional |
dd84058d MY |
18 | |
19 | config TARGET_SBC8548 | |
20 | bool "Support sbc8548" | |
281ed4c7 | 21 | select ARCH_MPC8548 |
dd84058d MY |
22 | |
23 | config TARGET_SOCRATES | |
24 | bool "Support socrates" | |
25cb74b3 | 25 | select ARCH_MPC8544 |
dd84058d | 26 | |
45a8d117 YS |
27 | config TARGET_B4420QDS |
28 | bool "Support B4420QDS" | |
b41f192b | 29 | select ARCH_B4420 |
45a8d117 YS |
30 | select SUPPORT_SPL |
31 | select PHYS_64BIT | |
32 | ||
dd84058d MY |
33 | config TARGET_B4860QDS |
34 | bool "Support B4860QDS" | |
3006ebc3 | 35 | select ARCH_B4860 |
e5ec4815 | 36 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 37 | select SUPPORT_SPL |
bb6b142f | 38 | select PHYS_64BIT |
dd84058d MY |
39 | |
40 | config TARGET_BSC9131RDB | |
41 | bool "Support BSC9131RDB" | |
115d60c0 | 42 | select ARCH_BSC9131 |
02627356 | 43 | select SUPPORT_SPL |
a5d67547 | 44 | select BOARD_EARLY_INIT_F |
dd84058d MY |
45 | |
46 | config TARGET_BSC9132QDS | |
47 | bool "Support BSC9132QDS" | |
115d60c0 | 48 | select ARCH_BSC9132 |
e5ec4815 | 49 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 50 | select SUPPORT_SPL |
a5d67547 | 51 | select BOARD_EARLY_INIT_F |
dd84058d MY |
52 | |
53 | config TARGET_C29XPCIE | |
54 | bool "Support C29XPCIE" | |
4fd64746 | 55 | select ARCH_C29X |
e5ec4815 | 56 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 57 | select SUPPORT_SPL |
cf6bbe4c | 58 | select SUPPORT_TPL |
bb6b142f | 59 | select PHYS_64BIT |
dd84058d MY |
60 | |
61 | config TARGET_P3041DS | |
62 | bool "Support P3041DS" | |
bb6b142f | 63 | select PHYS_64BIT |
5e5fdd2d | 64 | select ARCH_P3041 |
e5ec4815 | 65 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
66 | |
67 | config TARGET_P4080DS | |
68 | bool "Support P4080DS" | |
bb6b142f | 69 | select PHYS_64BIT |
e71372cb | 70 | select ARCH_P4080 |
e5ec4815 | 71 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
72 | |
73 | config TARGET_P5020DS | |
74 | bool "Support P5020DS" | |
bb6b142f | 75 | select PHYS_64BIT |
cefe11cd | 76 | select ARCH_P5020 |
e5ec4815 | 77 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
78 | |
79 | config TARGET_P5040DS | |
80 | bool "Support P5040DS" | |
bb6b142f | 81 | select PHYS_64BIT |
95390360 | 82 | select ARCH_P5040 |
e5ec4815 | 83 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
84 | |
85 | config TARGET_MPC8536DS | |
86 | bool "Support MPC8536DS" | |
24ad75ae | 87 | select ARCH_MPC8536 |
d26e34c4 YS |
88 | # Use DDR3 controller with DDR2 DIMMs on this board |
89 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
90 | |
91 | config TARGET_MPC8540ADS | |
92 | bool "Support MPC8540ADS" | |
7f825218 | 93 | select ARCH_MPC8540 |
dd84058d MY |
94 | |
95 | config TARGET_MPC8541CDS | |
96 | bool "Support MPC8541CDS" | |
3aff3082 | 97 | select ARCH_MPC8541 |
dd84058d MY |
98 | |
99 | config TARGET_MPC8544DS | |
100 | bool "Support MPC8544DS" | |
25cb74b3 | 101 | select ARCH_MPC8544 |
dd84058d MY |
102 | |
103 | config TARGET_MPC8548CDS | |
104 | bool "Support MPC8548CDS" | |
281ed4c7 | 105 | select ARCH_MPC8548 |
dd84058d MY |
106 | |
107 | config TARGET_MPC8555CDS | |
108 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 109 | select ARCH_MPC8555 |
dd84058d MY |
110 | |
111 | config TARGET_MPC8560ADS | |
112 | bool "Support MPC8560ADS" | |
99d0a312 | 113 | select ARCH_MPC8560 |
dd84058d MY |
114 | |
115 | config TARGET_MPC8568MDS | |
116 | bool "Support MPC8568MDS" | |
d07c3843 | 117 | select ARCH_MPC8568 |
dd84058d MY |
118 | |
119 | config TARGET_MPC8569MDS | |
120 | bool "Support MPC8569MDS" | |
23b36a7d | 121 | select ARCH_MPC8569 |
dd84058d MY |
122 | |
123 | config TARGET_MPC8572DS | |
124 | bool "Support MPC8572DS" | |
c8f48474 | 125 | select ARCH_MPC8572 |
d26e34c4 YS |
126 | # Use DDR3 controller with DDR2 DIMMs on this board |
127 | select SYS_FSL_DDRC_GEN3 | |
dd84058d | 128 | |
7601686c YS |
129 | config TARGET_P1010RDB_PA |
130 | bool "Support P1010RDB_PA" | |
131 | select ARCH_P1010 | |
e5ec4815 | 132 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
7601686c YS |
133 | select SUPPORT_SPL |
134 | select SUPPORT_TPL | |
a1dc980d | 135 | imply CMD_EEPROM |
7601686c YS |
136 | |
137 | config TARGET_P1010RDB_PB | |
138 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 139 | select ARCH_P1010 |
e5ec4815 | 140 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 141 | select SUPPORT_SPL |
cf6bbe4c | 142 | select SUPPORT_TPL |
a1dc980d | 143 | imply CMD_EEPROM |
dd84058d MY |
144 | |
145 | config TARGET_P1022DS | |
146 | bool "Support P1022DS" | |
feb9e25b | 147 | select ARCH_P1022 |
02627356 | 148 | select SUPPORT_SPL |
cf6bbe4c | 149 | select SUPPORT_TPL |
dd84058d MY |
150 | |
151 | config TARGET_P1023RDB | |
152 | bool "Support P1023RDB" | |
9bb1d6bc | 153 | select ARCH_P1023 |
a1dc980d | 154 | imply CMD_EEPROM |
dd84058d | 155 | |
fedae6eb YS |
156 | config TARGET_P1020MBG |
157 | bool "Support P1020MBG-PC" | |
158 | select SUPPORT_SPL | |
159 | select SUPPORT_TPL | |
484fff64 | 160 | select ARCH_P1020 |
a1dc980d | 161 | imply CMD_EEPROM |
484fff64 | 162 | |
aa14620c YS |
163 | config TARGET_P1020RDB_PC |
164 | bool "Support P1020RDB-PC" | |
165 | select SUPPORT_SPL | |
166 | select SUPPORT_TPL | |
484fff64 | 167 | select ARCH_P1020 |
a1dc980d | 168 | imply CMD_EEPROM |
aa14620c | 169 | |
f404b66c YS |
170 | config TARGET_P1020RDB_PD |
171 | bool "Support P1020RDB-PD" | |
172 | select SUPPORT_SPL | |
173 | select SUPPORT_TPL | |
484fff64 | 174 | select ARCH_P1020 |
a1dc980d | 175 | imply CMD_EEPROM |
f404b66c | 176 | |
e9bc8a8f YS |
177 | config TARGET_P1020UTM |
178 | bool "Support P1020UTM" | |
179 | select SUPPORT_SPL | |
180 | select SUPPORT_TPL | |
484fff64 | 181 | select ARCH_P1020 |
a1dc980d | 182 | imply CMD_EEPROM |
fedae6eb | 183 | |
da439db3 YS |
184 | config TARGET_P1021RDB |
185 | bool "Support P1021RDB" | |
186 | select SUPPORT_SPL | |
187 | select SUPPORT_TPL | |
a990799d | 188 | select ARCH_P1021 |
a1dc980d | 189 | imply CMD_EEPROM |
da439db3 | 190 | |
4eedabfe YS |
191 | config TARGET_P1024RDB |
192 | bool "Support P1024RDB" | |
193 | select SUPPORT_SPL | |
194 | select SUPPORT_TPL | |
52b6f13d | 195 | select ARCH_P1024 |
a1dc980d | 196 | imply CMD_EEPROM |
4eedabfe | 197 | |
b0c98b4b YS |
198 | config TARGET_P1025RDB |
199 | bool "Support P1025RDB" | |
200 | select SUPPORT_SPL | |
201 | select SUPPORT_TPL | |
4167a67d | 202 | select ARCH_P1025 |
a1dc980d | 203 | imply CMD_EEPROM |
b0c98b4b | 204 | |
8435aa77 YS |
205 | config TARGET_P2020RDB |
206 | bool "Support P2020RDB-PC" | |
207 | select SUPPORT_SPL | |
208 | select SUPPORT_TPL | |
4593637b | 209 | select ARCH_P2020 |
a1dc980d | 210 | imply CMD_EEPROM |
8435aa77 | 211 | |
dd84058d MY |
212 | config TARGET_P1_TWR |
213 | bool "Support p1_twr" | |
4167a67d | 214 | select ARCH_P1025 |
dd84058d | 215 | |
dd84058d MY |
216 | config TARGET_P2041RDB |
217 | bool "Support P2041RDB" | |
ce040c83 | 218 | select ARCH_P2041 |
e5ec4815 | 219 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 220 | select PHYS_64BIT |
dd84058d MY |
221 | |
222 | config TARGET_QEMU_PPCE500 | |
223 | bool "Support qemu-ppce500" | |
10343403 | 224 | select ARCH_QEMU_E500 |
bb6b142f | 225 | select PHYS_64BIT |
dd84058d | 226 | |
6f53bd47 YS |
227 | config TARGET_T1024QDS |
228 | bool "Support T1024QDS" | |
e5d5f5a8 | 229 | select ARCH_T1024 |
e5ec4815 | 230 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
aba80048 | 231 | select SUPPORT_SPL |
bb6b142f | 232 | select PHYS_64BIT |
a1dc980d | 233 | imply CMD_EEPROM |
aba80048 | 234 | |
08c75292 YS |
235 | config TARGET_T1023RDB |
236 | bool "Support T1023RDB" | |
5ff3f41d | 237 | select ARCH_T1023 |
e5ec4815 | 238 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
08c75292 YS |
239 | select SUPPORT_SPL |
240 | select PHYS_64BIT | |
a1dc980d | 241 | imply CMD_EEPROM |
08c75292 YS |
242 | |
243 | config TARGET_T1024RDB | |
244 | bool "Support T1024RDB" | |
e5d5f5a8 | 245 | select ARCH_T1024 |
e5ec4815 | 246 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
48c6f328 | 247 | select SUPPORT_SPL |
bb6b142f | 248 | select PHYS_64BIT |
a1dc980d | 249 | imply CMD_EEPROM |
48c6f328 | 250 | |
dd84058d MY |
251 | config TARGET_T1040QDS |
252 | bool "Support T1040QDS" | |
5d737010 | 253 | select ARCH_T1040 |
e5ec4815 | 254 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 255 | select PHYS_64BIT |
a1dc980d | 256 | imply CMD_EEPROM |
dd84058d | 257 | |
95a809b9 YS |
258 | config TARGET_T1040RDB |
259 | bool "Support T1040RDB" | |
5d737010 | 260 | select ARCH_T1040 |
e5ec4815 | 261 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
95a809b9 YS |
262 | select SUPPORT_SPL |
263 | select PHYS_64BIT | |
264 | ||
a016735c YS |
265 | config TARGET_T1040D4RDB |
266 | bool "Support T1040D4RDB" | |
267 | select ARCH_T1040 | |
e5ec4815 | 268 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
a016735c YS |
269 | select SUPPORT_SPL |
270 | select PHYS_64BIT | |
271 | ||
95a809b9 YS |
272 | config TARGET_T1042RDB |
273 | bool "Support T1042RDB" | |
5449c98a | 274 | select ARCH_T1042 |
e5ec4815 | 275 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 276 | select SUPPORT_SPL |
bb6b142f | 277 | select PHYS_64BIT |
dd84058d | 278 | |
319ed24a YS |
279 | config TARGET_T1042D4RDB |
280 | bool "Support T1042D4RDB" | |
281 | select ARCH_T1042 | |
e5ec4815 | 282 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
319ed24a YS |
283 | select SUPPORT_SPL |
284 | select PHYS_64BIT | |
285 | ||
55ed8ae3 YS |
286 | config TARGET_T1042RDB_PI |
287 | bool "Support T1042RDB_PI" | |
288 | select ARCH_T1042 | |
e5ec4815 | 289 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
55ed8ae3 YS |
290 | select SUPPORT_SPL |
291 | select PHYS_64BIT | |
292 | ||
638d5be0 YS |
293 | config TARGET_T2080QDS |
294 | bool "Support T2080QDS" | |
0f3d80e9 | 295 | select ARCH_T2080 |
e5ec4815 | 296 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 297 | select SUPPORT_SPL |
bb6b142f | 298 | select PHYS_64BIT |
dd84058d | 299 | |
01671e66 YS |
300 | config TARGET_T2080RDB |
301 | bool "Support T2080RDB" | |
0f3d80e9 | 302 | select ARCH_T2080 |
e5ec4815 | 303 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 304 | select SUPPORT_SPL |
bb6b142f | 305 | select PHYS_64BIT |
dd84058d | 306 | |
638d5be0 YS |
307 | config TARGET_T2081QDS |
308 | bool "Support T2081QDS" | |
0f3d80e9 | 309 | select ARCH_T2081 |
638d5be0 YS |
310 | select SUPPORT_SPL |
311 | select PHYS_64BIT | |
312 | ||
9c21d06c YS |
313 | config TARGET_T4160QDS |
314 | bool "Support T4160QDS" | |
652a7bbd | 315 | select ARCH_T4160 |
e5ec4815 | 316 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
9c21d06c YS |
317 | select SUPPORT_SPL |
318 | select PHYS_64BIT | |
319 | ||
12ffdb3b YS |
320 | config TARGET_T4160RDB |
321 | bool "Support T4160RDB" | |
652a7bbd | 322 | select ARCH_T4160 |
12ffdb3b YS |
323 | select SUPPORT_SPL |
324 | select PHYS_64BIT | |
325 | ||
dd84058d MY |
326 | config TARGET_T4240QDS |
327 | bool "Support T4240QDS" | |
26bc57da | 328 | select ARCH_T4240 |
e5ec4815 | 329 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 330 | select SUPPORT_SPL |
bb6b142f | 331 | select PHYS_64BIT |
dd84058d MY |
332 | |
333 | config TARGET_T4240RDB | |
334 | bool "Support T4240RDB" | |
26bc57da | 335 | select ARCH_T4240 |
373762c3 | 336 | select SUPPORT_SPL |
bb6b142f | 337 | select PHYS_64BIT |
dd84058d MY |
338 | |
339 | config TARGET_CONTROLCENTERD | |
340 | bool "Support controlcenterd" | |
feb9e25b | 341 | select ARCH_P1022 |
dd84058d MY |
342 | |
343 | config TARGET_KMP204X | |
344 | bool "Support kmp204x" | |
ce040c83 | 345 | select ARCH_P2041 |
bb6b142f | 346 | select PHYS_64BIT |
97072747 | 347 | imply CMD_CRAMFS |
80e44cfe | 348 | imply FS_CRAMFS |
dd84058d | 349 | |
dd84058d MY |
350 | config TARGET_XPEDITE520X |
351 | bool "Support xpedite520x" | |
281ed4c7 | 352 | select ARCH_MPC8548 |
dd84058d MY |
353 | |
354 | config TARGET_XPEDITE537X | |
355 | bool "Support xpedite537x" | |
c8f48474 | 356 | select ARCH_MPC8572 |
d26e34c4 YS |
357 | # Use DDR3 controller with DDR2 DIMMs on this board |
358 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
359 | |
360 | config TARGET_XPEDITE550X | |
361 | bool "Support xpedite550x" | |
4593637b | 362 | select ARCH_P2020 |
dd84058d | 363 | |
8b0044ff OZ |
364 | config TARGET_UCP1020 |
365 | bool "Support uCP1020" | |
484fff64 | 366 | select ARCH_P1020 |
8b0044ff | 367 | |
22a1b99a YS |
368 | config TARGET_CYRUS_P5020 |
369 | bool "Support Varisys Cyrus P5020" | |
370 | select ARCH_P5020 | |
371 | select PHYS_64BIT | |
372 | ||
373 | config TARGET_CYRUS_P5040 | |
374 | bool "Support Varisys Cyrus P5040" | |
375 | select ARCH_P5040 | |
bb6b142f | 376 | select PHYS_64BIT |
87e29878 | 377 | |
dd84058d MY |
378 | endchoice |
379 | ||
b41f192b YS |
380 | config ARCH_B4420 |
381 | bool | |
f8dee360 | 382 | select E500MC |
9ec10107 | 383 | select E6500 |
05cb79a7 | 384 | select FSL_LAW |
22120f11 | 385 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
386 | select SYS_FSL_ERRATUM_A004477 |
387 | select SYS_FSL_ERRATUM_A005871 | |
388 | select SYS_FSL_ERRATUM_A006379 | |
389 | select SYS_FSL_ERRATUM_A006384 | |
390 | select SYS_FSL_ERRATUM_A006475 | |
391 | select SYS_FSL_ERRATUM_A006593 | |
392 | select SYS_FSL_ERRATUM_A007075 | |
393 | select SYS_FSL_ERRATUM_A007186 | |
394 | select SYS_FSL_ERRATUM_A007212 | |
395 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 396 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 397 | select SYS_FSL_HAS_SEC |
7371774a | 398 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 399 | select SYS_FSL_SEC_BE |
2c2e2c9e | 400 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 401 | select SYS_PPC64 |
d98b98d6 | 402 | select FSL_IFC |
a1dc980d | 403 | imply CMD_EEPROM |
b41f192b | 404 | |
3006ebc3 YS |
405 | config ARCH_B4860 |
406 | bool | |
f8dee360 | 407 | select E500MC |
9ec10107 | 408 | select E6500 |
05cb79a7 | 409 | select FSL_LAW |
22120f11 | 410 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
411 | select SYS_FSL_ERRATUM_A004477 |
412 | select SYS_FSL_ERRATUM_A005871 | |
413 | select SYS_FSL_ERRATUM_A006379 | |
414 | select SYS_FSL_ERRATUM_A006384 | |
415 | select SYS_FSL_ERRATUM_A006475 | |
416 | select SYS_FSL_ERRATUM_A006593 | |
417 | select SYS_FSL_ERRATUM_A007075 | |
418 | select SYS_FSL_ERRATUM_A007186 | |
419 | select SYS_FSL_ERRATUM_A007212 | |
06ad970b | 420 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 421 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 422 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 423 | select SYS_FSL_HAS_SEC |
7371774a | 424 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 425 | select SYS_FSL_SEC_BE |
2c2e2c9e | 426 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 427 | select SYS_PPC64 |
d98b98d6 | 428 | select FSL_IFC |
a1dc980d | 429 | imply CMD_EEPROM |
3006ebc3 | 430 | |
115d60c0 YS |
431 | config ARCH_BSC9131 |
432 | bool | |
05cb79a7 | 433 | select FSL_LAW |
22120f11 | 434 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
435 | select SYS_FSL_ERRATUM_A004477 |
436 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a | 437 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 438 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 439 | select SYS_FSL_HAS_SEC |
90b80386 | 440 | select SYS_FSL_SEC_BE |
2c2e2c9e | 441 | select SYS_FSL_SEC_COMPAT_4 |
d98b98d6 | 442 | select FSL_IFC |
a1dc980d | 443 | imply CMD_EEPROM |
115d60c0 YS |
444 | |
445 | config ARCH_BSC9132 | |
446 | bool | |
05cb79a7 | 447 | select FSL_LAW |
22120f11 | 448 | select SYS_FSL_DDR_VER_46 |
63659ff3 YS |
449 | select SYS_FSL_ERRATUM_A004477 |
450 | select SYS_FSL_ERRATUM_A005125 | |
451 | select SYS_FSL_ERRATUM_A005434 | |
c01e4a1a | 452 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
453 | select SYS_FSL_ERRATUM_I2C_A004447 |
454 | select SYS_FSL_ERRATUM_IFC_A002769 | |
d26e34c4 | 455 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 456 | select SYS_FSL_HAS_SEC |
90b80386 | 457 | select SYS_FSL_SEC_BE |
2c2e2c9e | 458 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 459 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 460 | select FSL_IFC |
a1dc980d | 461 | imply CMD_EEPROM |
115d60c0 | 462 | |
4fd64746 YS |
463 | config ARCH_C29X |
464 | bool | |
05cb79a7 | 465 | select FSL_LAW |
22120f11 | 466 | select SYS_FSL_DDR_VER_46 |
63659ff3 | 467 | select SYS_FSL_ERRATUM_A005125 |
c01e4a1a | 468 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 469 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 470 | select SYS_FSL_HAS_SEC |
90b80386 | 471 | select SYS_FSL_SEC_BE |
2c2e2c9e | 472 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 473 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 474 | select FSL_IFC |
4fd64746 | 475 | |
24ad75ae YS |
476 | config ARCH_MPC8536 |
477 | bool | |
05cb79a7 | 478 | select FSL_LAW |
63659ff3 YS |
479 | select SYS_FSL_ERRATUM_A004508 |
480 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 YS |
481 | select SYS_FSL_HAS_DDR2 |
482 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 483 | select SYS_FSL_HAS_SEC |
90b80386 | 484 | select SYS_FSL_SEC_BE |
2c2e2c9e | 485 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 486 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 487 | select FSL_ELBC |
24ad75ae | 488 | |
7f825218 YS |
489 | config ARCH_MPC8540 |
490 | bool | |
05cb79a7 | 491 | select FSL_LAW |
d26e34c4 | 492 | select SYS_FSL_HAS_DDR1 |
7f825218 | 493 | |
3aff3082 YS |
494 | config ARCH_MPC8541 |
495 | bool | |
05cb79a7 | 496 | select FSL_LAW |
d26e34c4 | 497 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 498 | select SYS_FSL_HAS_SEC |
90b80386 | 499 | select SYS_FSL_SEC_BE |
2c2e2c9e | 500 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 501 | |
25cb74b3 YS |
502 | config ARCH_MPC8544 |
503 | bool | |
05cb79a7 | 504 | select FSL_LAW |
63659ff3 | 505 | select SYS_FSL_ERRATUM_A005125 |
d26e34c4 | 506 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 507 | select SYS_FSL_HAS_SEC |
90b80386 | 508 | select SYS_FSL_SEC_BE |
2c2e2c9e | 509 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 510 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 511 | select FSL_ELBC |
25cb74b3 | 512 | |
281ed4c7 YS |
513 | config ARCH_MPC8548 |
514 | bool | |
05cb79a7 | 515 | select FSL_LAW |
63659ff3 YS |
516 | select SYS_FSL_ERRATUM_A005125 |
517 | select SYS_FSL_ERRATUM_NMG_DDR120 | |
518 | select SYS_FSL_ERRATUM_NMG_LBC103 | |
519 | select SYS_FSL_ERRATUM_NMG_ETSEC129 | |
520 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 YS |
521 | select SYS_FSL_HAS_DDR2 |
522 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 523 | select SYS_FSL_HAS_SEC |
90b80386 | 524 | select SYS_FSL_SEC_BE |
2c2e2c9e | 525 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 526 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 527 | |
3c3d8ab5 YS |
528 | config ARCH_MPC8555 |
529 | bool | |
05cb79a7 | 530 | select FSL_LAW |
d26e34c4 | 531 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 532 | select SYS_FSL_HAS_SEC |
90b80386 | 533 | select SYS_FSL_SEC_BE |
2c2e2c9e | 534 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 535 | |
99d0a312 YS |
536 | config ARCH_MPC8560 |
537 | bool | |
05cb79a7 | 538 | select FSL_LAW |
d26e34c4 | 539 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 540 | |
d07c3843 YS |
541 | config ARCH_MPC8568 |
542 | bool | |
05cb79a7 | 543 | select FSL_LAW |
d26e34c4 | 544 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 545 | select SYS_FSL_HAS_SEC |
90b80386 | 546 | select SYS_FSL_SEC_BE |
2c2e2c9e | 547 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 548 | |
23b36a7d YS |
549 | config ARCH_MPC8569 |
550 | bool | |
05cb79a7 | 551 | select FSL_LAW |
63659ff3 YS |
552 | select SYS_FSL_ERRATUM_A004508 |
553 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 | 554 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 555 | select SYS_FSL_HAS_SEC |
90b80386 | 556 | select SYS_FSL_SEC_BE |
2c2e2c9e | 557 | select SYS_FSL_SEC_COMPAT_2 |
06878977 | 558 | select FSL_ELBC |
23b36a7d | 559 | |
c8f48474 YS |
560 | config ARCH_MPC8572 |
561 | bool | |
05cb79a7 | 562 | select FSL_LAW |
63659ff3 YS |
563 | select SYS_FSL_ERRATUM_A004508 |
564 | select SYS_FSL_ERRATUM_A005125 | |
565 | select SYS_FSL_ERRATUM_DDR_115 | |
566 | select SYS_FSL_ERRATUM_DDR111_DDR134 | |
d26e34c4 YS |
567 | select SYS_FSL_HAS_DDR2 |
568 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 569 | select SYS_FSL_HAS_SEC |
90b80386 | 570 | select SYS_FSL_SEC_BE |
2c2e2c9e | 571 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 572 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 573 | select FSL_ELBC |
c8f48474 | 574 | |
7d5f9f84 YS |
575 | config ARCH_P1010 |
576 | bool | |
05cb79a7 | 577 | select FSL_LAW |
63659ff3 YS |
578 | select SYS_FSL_ERRATUM_A004477 |
579 | select SYS_FSL_ERRATUM_A004508 | |
580 | select SYS_FSL_ERRATUM_A005125 | |
581 | select SYS_FSL_ERRATUM_A006261 | |
582 | select SYS_FSL_ERRATUM_A007075 | |
c01e4a1a | 583 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
584 | select SYS_FSL_ERRATUM_I2C_A004447 |
585 | select SYS_FSL_ERRATUM_IFC_A002769 | |
586 | select SYS_FSL_ERRATUM_P1010_A003549 | |
587 | select SYS_FSL_ERRATUM_SEC_A003571 | |
588 | select SYS_FSL_ERRATUM_IFC_A003399 | |
d26e34c4 | 589 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 590 | select SYS_FSL_HAS_SEC |
90b80386 | 591 | select SYS_FSL_SEC_BE |
2c2e2c9e | 592 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 593 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 594 | select FSL_IFC |
a1dc980d | 595 | imply CMD_EEPROM |
7d5f9f84 | 596 | |
1cdd96f3 YS |
597 | config ARCH_P1011 |
598 | bool | |
05cb79a7 | 599 | select FSL_LAW |
63659ff3 YS |
600 | select SYS_FSL_ERRATUM_A004508 |
601 | select SYS_FSL_ERRATUM_A005125 | |
602 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 603 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 604 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 605 | select SYS_FSL_HAS_SEC |
90b80386 | 606 | select SYS_FSL_SEC_BE |
2c2e2c9e | 607 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 608 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 609 | select FSL_ELBC |
1cdd96f3 | 610 | |
484fff64 YS |
611 | config ARCH_P1020 |
612 | bool | |
05cb79a7 | 613 | select FSL_LAW |
63659ff3 YS |
614 | select SYS_FSL_ERRATUM_A004508 |
615 | select SYS_FSL_ERRATUM_A005125 | |
616 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 617 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 618 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 619 | select SYS_FSL_HAS_SEC |
90b80386 | 620 | select SYS_FSL_SEC_BE |
2c2e2c9e | 621 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 622 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 623 | select FSL_ELBC |
484fff64 | 624 | |
a990799d YS |
625 | config ARCH_P1021 |
626 | bool | |
05cb79a7 | 627 | select FSL_LAW |
63659ff3 YS |
628 | select SYS_FSL_ERRATUM_A004508 |
629 | select SYS_FSL_ERRATUM_A005125 | |
630 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 631 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 632 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 633 | select SYS_FSL_HAS_SEC |
90b80386 | 634 | select SYS_FSL_SEC_BE |
2c2e2c9e | 635 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 636 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 637 | select FSL_ELBC |
a990799d | 638 | |
feb9e25b YS |
639 | config ARCH_P1022 |
640 | bool | |
05cb79a7 | 641 | select FSL_LAW |
63659ff3 YS |
642 | select SYS_FSL_ERRATUM_A004477 |
643 | select SYS_FSL_ERRATUM_A004508 | |
644 | select SYS_FSL_ERRATUM_A005125 | |
645 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 646 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 647 | select SYS_FSL_ERRATUM_SATA_A001 |
d26e34c4 | 648 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 649 | select SYS_FSL_HAS_SEC |
90b80386 | 650 | select SYS_FSL_SEC_BE |
2c2e2c9e | 651 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 652 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 653 | select FSL_ELBC |
feb9e25b | 654 | |
9bb1d6bc YS |
655 | config ARCH_P1023 |
656 | bool | |
05cb79a7 | 657 | select FSL_LAW |
63659ff3 YS |
658 | select SYS_FSL_ERRATUM_A004508 |
659 | select SYS_FSL_ERRATUM_A005125 | |
660 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 | 661 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 662 | select SYS_FSL_HAS_SEC |
90b80386 | 663 | select SYS_FSL_SEC_BE |
2c2e2c9e | 664 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 665 | select FSL_ELBC |
9bb1d6bc | 666 | |
52b6f13d YS |
667 | config ARCH_P1024 |
668 | bool | |
05cb79a7 | 669 | select FSL_LAW |
63659ff3 YS |
670 | select SYS_FSL_ERRATUM_A004508 |
671 | select SYS_FSL_ERRATUM_A005125 | |
672 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 673 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 674 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 675 | select SYS_FSL_HAS_SEC |
90b80386 | 676 | select SYS_FSL_SEC_BE |
2c2e2c9e | 677 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 678 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 679 | select FSL_ELBC |
a1dc980d | 680 | imply CMD_EEPROM |
52b6f13d | 681 | |
4167a67d YS |
682 | config ARCH_P1025 |
683 | bool | |
05cb79a7 | 684 | select FSL_LAW |
63659ff3 YS |
685 | select SYS_FSL_ERRATUM_A004508 |
686 | select SYS_FSL_ERRATUM_A005125 | |
687 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 688 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 689 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 690 | select SYS_FSL_HAS_SEC |
90b80386 | 691 | select SYS_FSL_SEC_BE |
2c2e2c9e | 692 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 693 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 694 | select FSL_ELBC |
4167a67d | 695 | |
4593637b YS |
696 | config ARCH_P2020 |
697 | bool | |
05cb79a7 | 698 | select FSL_LAW |
63659ff3 YS |
699 | select SYS_FSL_ERRATUM_A004477 |
700 | select SYS_FSL_ERRATUM_A004508 | |
701 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a YS |
702 | select SYS_FSL_ERRATUM_ESDHC111 |
703 | select SYS_FSL_ERRATUM_ESDHC_A001 | |
d26e34c4 | 704 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 705 | select SYS_FSL_HAS_SEC |
90b80386 | 706 | select SYS_FSL_SEC_BE |
2c2e2c9e | 707 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 708 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 709 | select FSL_ELBC |
a1dc980d | 710 | imply CMD_EEPROM |
4593637b | 711 | |
ce040c83 YS |
712 | config ARCH_P2041 |
713 | bool | |
f8dee360 | 714 | select E500MC |
05cb79a7 | 715 | select FSL_LAW |
63659ff3 YS |
716 | select SYS_FSL_ERRATUM_A004510 |
717 | select SYS_FSL_ERRATUM_A004849 | |
718 | select SYS_FSL_ERRATUM_A006261 | |
719 | select SYS_FSL_ERRATUM_CPU_A003999 | |
720 | select SYS_FSL_ERRATUM_DDR_A003 | |
721 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 722 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
723 | select SYS_FSL_ERRATUM_I2C_A004447 |
724 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
725 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
726 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 727 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 728 | select SYS_FSL_HAS_SEC |
7371774a | 729 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 730 | select SYS_FSL_SEC_BE |
2c2e2c9e | 731 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 732 | select FSL_ELBC |
ce040c83 | 733 | |
5e5fdd2d YS |
734 | config ARCH_P3041 |
735 | bool | |
f8dee360 | 736 | select E500MC |
05cb79a7 | 737 | select FSL_LAW |
22120f11 | 738 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
739 | select SYS_FSL_ERRATUM_A004510 |
740 | select SYS_FSL_ERRATUM_A004849 | |
741 | select SYS_FSL_ERRATUM_A005812 | |
742 | select SYS_FSL_ERRATUM_A006261 | |
743 | select SYS_FSL_ERRATUM_CPU_A003999 | |
744 | select SYS_FSL_ERRATUM_DDR_A003 | |
745 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 746 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
747 | select SYS_FSL_ERRATUM_I2C_A004447 |
748 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
749 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
750 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 751 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 752 | select SYS_FSL_HAS_SEC |
7371774a | 753 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 754 | select SYS_FSL_SEC_BE |
2c2e2c9e | 755 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 756 | select FSL_ELBC |
5e5fdd2d | 757 | |
e71372cb YS |
758 | config ARCH_P4080 |
759 | bool | |
f8dee360 | 760 | select E500MC |
05cb79a7 | 761 | select FSL_LAW |
22120f11 | 762 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
763 | select SYS_FSL_ERRATUM_A004510 |
764 | select SYS_FSL_ERRATUM_A004580 | |
765 | select SYS_FSL_ERRATUM_A004849 | |
766 | select SYS_FSL_ERRATUM_A005812 | |
767 | select SYS_FSL_ERRATUM_A007075 | |
768 | select SYS_FSL_ERRATUM_CPC_A002 | |
769 | select SYS_FSL_ERRATUM_CPC_A003 | |
770 | select SYS_FSL_ERRATUM_CPU_A003999 | |
771 | select SYS_FSL_ERRATUM_DDR_A003 | |
772 | select SYS_FSL_ERRATUM_DDR_A003474 | |
773 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a YS |
774 | select SYS_FSL_ERRATUM_ESDHC111 |
775 | select SYS_FSL_ERRATUM_ESDHC13 | |
776 | select SYS_FSL_ERRATUM_ESDHC135 | |
63659ff3 YS |
777 | select SYS_FSL_ERRATUM_I2C_A004447 |
778 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
779 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
780 | select SYS_P4080_ERRATUM_CPU22 | |
781 | select SYS_P4080_ERRATUM_PCIE_A003 | |
782 | select SYS_P4080_ERRATUM_SERDES8 | |
783 | select SYS_P4080_ERRATUM_SERDES9 | |
784 | select SYS_P4080_ERRATUM_SERDES_A001 | |
785 | select SYS_P4080_ERRATUM_SERDES_A005 | |
d26e34c4 | 786 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 787 | select SYS_FSL_HAS_SEC |
7371774a | 788 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 789 | select SYS_FSL_SEC_BE |
2c2e2c9e | 790 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 791 | select FSL_ELBC |
e71372cb | 792 | |
cefe11cd YS |
793 | config ARCH_P5020 |
794 | bool | |
f8dee360 | 795 | select E500MC |
05cb79a7 | 796 | select FSL_LAW |
22120f11 | 797 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
798 | select SYS_FSL_ERRATUM_A004510 |
799 | select SYS_FSL_ERRATUM_A006261 | |
800 | select SYS_FSL_ERRATUM_DDR_A003 | |
801 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 802 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
803 | select SYS_FSL_ERRATUM_I2C_A004447 |
804 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
805 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 806 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 807 | select SYS_FSL_HAS_SEC |
7371774a | 808 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 809 | select SYS_FSL_SEC_BE |
2c2e2c9e | 810 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 811 | select SYS_PPC64 |
06878977 | 812 | select FSL_ELBC |
cefe11cd | 813 | |
95390360 YS |
814 | config ARCH_P5040 |
815 | bool | |
f8dee360 | 816 | select E500MC |
05cb79a7 | 817 | select FSL_LAW |
22120f11 | 818 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
819 | select SYS_FSL_ERRATUM_A004510 |
820 | select SYS_FSL_ERRATUM_A004699 | |
821 | select SYS_FSL_ERRATUM_A005812 | |
822 | select SYS_FSL_ERRATUM_A006261 | |
823 | select SYS_FSL_ERRATUM_DDR_A003 | |
824 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 825 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 826 | select SYS_FSL_ERRATUM_USB14 |
d26e34c4 | 827 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 828 | select SYS_FSL_HAS_SEC |
7371774a | 829 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 830 | select SYS_FSL_SEC_BE |
2c2e2c9e | 831 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 832 | select SYS_PPC64 |
06878977 | 833 | select FSL_ELBC |
95390360 | 834 | |
10343403 YS |
835 | config ARCH_QEMU_E500 |
836 | bool | |
837 | ||
5ff3f41d YS |
838 | config ARCH_T1023 |
839 | bool | |
f8dee360 | 840 | select E500MC |
05cb79a7 | 841 | select FSL_LAW |
22120f11 | 842 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
843 | select SYS_FSL_ERRATUM_A008378 |
844 | select SYS_FSL_ERRATUM_A009663 | |
845 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 846 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
847 | select SYS_FSL_HAS_DDR3 |
848 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 849 | select SYS_FSL_HAS_SEC |
7371774a | 850 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 851 | select SYS_FSL_SEC_BE |
2c2e2c9e | 852 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 853 | select FSL_IFC |
a1dc980d | 854 | imply CMD_EEPROM |
5ff3f41d | 855 | |
e5d5f5a8 YS |
856 | config ARCH_T1024 |
857 | bool | |
f8dee360 | 858 | select E500MC |
05cb79a7 | 859 | select FSL_LAW |
22120f11 | 860 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
861 | select SYS_FSL_ERRATUM_A008378 |
862 | select SYS_FSL_ERRATUM_A009663 | |
863 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 864 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
865 | select SYS_FSL_HAS_DDR3 |
866 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 867 | select SYS_FSL_HAS_SEC |
7371774a | 868 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 869 | select SYS_FSL_SEC_BE |
2c2e2c9e | 870 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 871 | select FSL_IFC |
a1dc980d | 872 | imply CMD_EEPROM |
e5d5f5a8 | 873 | |
5d737010 YS |
874 | config ARCH_T1040 |
875 | bool | |
f8dee360 | 876 | select E500MC |
05cb79a7 | 877 | select FSL_LAW |
22120f11 | 878 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
879 | select SYS_FSL_ERRATUM_A008044 |
880 | select SYS_FSL_ERRATUM_A008378 | |
881 | select SYS_FSL_ERRATUM_A009663 | |
882 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 883 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
884 | select SYS_FSL_HAS_DDR3 |
885 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 886 | select SYS_FSL_HAS_SEC |
7371774a | 887 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 888 | select SYS_FSL_SEC_BE |
2c2e2c9e | 889 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 890 | select FSL_IFC |
5d737010 | 891 | |
5449c98a YS |
892 | config ARCH_T1042 |
893 | bool | |
f8dee360 | 894 | select E500MC |
05cb79a7 | 895 | select FSL_LAW |
22120f11 | 896 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
897 | select SYS_FSL_ERRATUM_A008044 |
898 | select SYS_FSL_ERRATUM_A008378 | |
899 | select SYS_FSL_ERRATUM_A009663 | |
900 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 901 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
902 | select SYS_FSL_HAS_DDR3 |
903 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 904 | select SYS_FSL_HAS_SEC |
7371774a | 905 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 906 | select SYS_FSL_SEC_BE |
2c2e2c9e | 907 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 908 | select FSL_IFC |
5449c98a | 909 | |
0f3d80e9 YS |
910 | config ARCH_T2080 |
911 | bool | |
f8dee360 | 912 | select E500MC |
9ec10107 | 913 | select E6500 |
05cb79a7 | 914 | select FSL_LAW |
22120f11 | 915 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
916 | select SYS_FSL_ERRATUM_A006379 |
917 | select SYS_FSL_ERRATUM_A006593 | |
918 | select SYS_FSL_ERRATUM_A007186 | |
919 | select SYS_FSL_ERRATUM_A007212 | |
09bfd962 | 920 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 921 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 922 | select SYS_FSL_ERRATUM_A009942 |
c01e4a1a | 923 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 924 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 925 | select SYS_FSL_HAS_SEC |
7371774a | 926 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 927 | select SYS_FSL_SEC_BE |
2c2e2c9e | 928 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 929 | select SYS_PPC64 |
d98b98d6 | 930 | select FSL_IFC |
0f3d80e9 YS |
931 | |
932 | config ARCH_T2081 | |
933 | bool | |
f8dee360 | 934 | select E500MC |
9ec10107 | 935 | select E6500 |
05cb79a7 | 936 | select FSL_LAW |
22120f11 | 937 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
938 | select SYS_FSL_ERRATUM_A006379 |
939 | select SYS_FSL_ERRATUM_A006593 | |
940 | select SYS_FSL_ERRATUM_A007186 | |
941 | select SYS_FSL_ERRATUM_A007212 | |
942 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 943 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 944 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 945 | select SYS_FSL_HAS_SEC |
7371774a | 946 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 947 | select SYS_FSL_SEC_BE |
2c2e2c9e | 948 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 949 | select SYS_PPC64 |
d98b98d6 | 950 | select FSL_IFC |
0f3d80e9 | 951 | |
652a7bbd YS |
952 | config ARCH_T4160 |
953 | bool | |
f8dee360 | 954 | select E500MC |
9ec10107 | 955 | select E6500 |
05cb79a7 | 956 | select FSL_LAW |
22120f11 | 957 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
958 | select SYS_FSL_ERRATUM_A004468 |
959 | select SYS_FSL_ERRATUM_A005871 | |
960 | select SYS_FSL_ERRATUM_A006379 | |
961 | select SYS_FSL_ERRATUM_A006593 | |
962 | select SYS_FSL_ERRATUM_A007186 | |
963 | select SYS_FSL_ERRATUM_A007798 | |
964 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 965 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 966 | select SYS_FSL_HAS_SEC |
7371774a | 967 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 968 | select SYS_FSL_SEC_BE |
2c2e2c9e | 969 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 970 | select SYS_PPC64 |
d98b98d6 | 971 | select FSL_IFC |
652a7bbd | 972 | |
26bc57da YS |
973 | config ARCH_T4240 |
974 | bool | |
f8dee360 | 975 | select E500MC |
9ec10107 | 976 | select E6500 |
05cb79a7 | 977 | select FSL_LAW |
22120f11 | 978 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
979 | select SYS_FSL_ERRATUM_A004468 |
980 | select SYS_FSL_ERRATUM_A005871 | |
981 | select SYS_FSL_ERRATUM_A006261 | |
982 | select SYS_FSL_ERRATUM_A006379 | |
983 | select SYS_FSL_ERRATUM_A006593 | |
984 | select SYS_FSL_ERRATUM_A007186 | |
985 | select SYS_FSL_ERRATUM_A007798 | |
09bfd962 | 986 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 987 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 988 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 989 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 990 | select SYS_FSL_HAS_SEC |
7371774a | 991 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 992 | select SYS_FSL_SEC_BE |
2c2e2c9e | 993 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 994 | select SYS_PPC64 |
d98b98d6 | 995 | select FSL_IFC |
05cb79a7 | 996 | |
f8dee360 YS |
997 | config BOOKE |
998 | bool | |
999 | default y | |
1000 | ||
1001 | config E500 | |
1002 | bool | |
1003 | default y | |
1004 | help | |
1005 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
1006 | ||
1007 | config E500MC | |
1008 | bool | |
1009 | help | |
1010 | Enble PowerPC E500MC core | |
1011 | ||
9ec10107 YS |
1012 | config E6500 |
1013 | bool | |
1014 | help | |
1015 | Enable PowerPC E6500 core | |
1016 | ||
05cb79a7 YS |
1017 | config FSL_LAW |
1018 | bool | |
1019 | help | |
1020 | Use Freescale common code for Local Access Window | |
26bc57da | 1021 | |
c6e6bda3 YS |
1022 | config SECURE_BOOT |
1023 | bool "Secure Boot" | |
1024 | help | |
1025 | Enable Freescale Secure Boot feature. Normally selected | |
1026 | by defconfig. If unsure, do not change. | |
1027 | ||
3f82b56d YS |
1028 | config MAX_CPUS |
1029 | int "Maximum number of CPUs permitted for MPC85xx" | |
1030 | default 12 if ARCH_T4240 | |
1031 | default 8 if ARCH_P4080 || \ | |
1032 | ARCH_T4160 | |
1033 | default 4 if ARCH_B4860 || \ | |
1034 | ARCH_P2041 || \ | |
1035 | ARCH_P3041 || \ | |
1036 | ARCH_P5040 || \ | |
1037 | ARCH_T1040 || \ | |
1038 | ARCH_T1042 || \ | |
1039 | ARCH_T2080 || \ | |
1040 | ARCH_T2081 | |
1041 | default 2 if ARCH_B4420 || \ | |
1042 | ARCH_BSC9132 || \ | |
1043 | ARCH_MPC8572 || \ | |
1044 | ARCH_P1020 || \ | |
1045 | ARCH_P1021 || \ | |
1046 | ARCH_P1022 || \ | |
1047 | ARCH_P1023 || \ | |
1048 | ARCH_P1024 || \ | |
1049 | ARCH_P1025 || \ | |
1050 | ARCH_P2020 || \ | |
1051 | ARCH_P5020 || \ | |
3f82b56d YS |
1052 | ARCH_T1023 || \ |
1053 | ARCH_T1024 | |
1054 | default 1 | |
1055 | help | |
1056 | Set this number to the maximum number of possible CPUs in the SoC. | |
1057 | SoCs may have multiple clusters with each cluster may have multiple | |
1058 | ports. If some ports are reserved but higher ports are used for | |
1059 | cores, count the reserved ports. This will allocate enough memory | |
1060 | in spin table to properly handle all cores. | |
1061 | ||
830fc1bf YS |
1062 | config SYS_CCSRBAR_DEFAULT |
1063 | hex "Default CCSRBAR address" | |
1064 | default 0xff700000 if ARCH_BSC9131 || \ | |
1065 | ARCH_BSC9132 || \ | |
1066 | ARCH_C29X || \ | |
1067 | ARCH_MPC8536 || \ | |
1068 | ARCH_MPC8540 || \ | |
1069 | ARCH_MPC8541 || \ | |
1070 | ARCH_MPC8544 || \ | |
1071 | ARCH_MPC8548 || \ | |
1072 | ARCH_MPC8555 || \ | |
1073 | ARCH_MPC8560 || \ | |
1074 | ARCH_MPC8568 || \ | |
1075 | ARCH_MPC8569 || \ | |
1076 | ARCH_MPC8572 || \ | |
1077 | ARCH_P1010 || \ | |
1078 | ARCH_P1011 || \ | |
1079 | ARCH_P1020 || \ | |
1080 | ARCH_P1021 || \ | |
1081 | ARCH_P1022 || \ | |
1082 | ARCH_P1024 || \ | |
1083 | ARCH_P1025 || \ | |
1084 | ARCH_P2020 | |
1085 | default 0xff600000 if ARCH_P1023 | |
1086 | default 0xfe000000 if ARCH_B4420 || \ | |
1087 | ARCH_B4860 || \ | |
1088 | ARCH_P2041 || \ | |
1089 | ARCH_P3041 || \ | |
1090 | ARCH_P4080 || \ | |
1091 | ARCH_P5020 || \ | |
1092 | ARCH_P5040 || \ | |
830fc1bf YS |
1093 | ARCH_T1023 || \ |
1094 | ARCH_T1024 || \ | |
1095 | ARCH_T1040 || \ | |
1096 | ARCH_T1042 || \ | |
1097 | ARCH_T2080 || \ | |
1098 | ARCH_T2081 || \ | |
1099 | ARCH_T4160 || \ | |
1100 | ARCH_T4240 | |
1101 | default 0xe0000000 if ARCH_QEMU_E500 | |
1102 | help | |
1103 | Default value of CCSRBAR comes from power-on-reset. It | |
1104 | is fixed on each SoC. Some SoCs can have different value | |
1105 | if changed by pre-boot regime. The value here must match | |
1106 | the current value in SoC. If not sure, do not change. | |
1107 | ||
63659ff3 YS |
1108 | config SYS_FSL_ERRATUM_A004468 |
1109 | bool | |
1110 | ||
1111 | config SYS_FSL_ERRATUM_A004477 | |
1112 | bool | |
1113 | ||
1114 | config SYS_FSL_ERRATUM_A004508 | |
1115 | bool | |
1116 | ||
1117 | config SYS_FSL_ERRATUM_A004580 | |
1118 | bool | |
1119 | ||
1120 | config SYS_FSL_ERRATUM_A004699 | |
1121 | bool | |
1122 | ||
1123 | config SYS_FSL_ERRATUM_A004849 | |
1124 | bool | |
1125 | ||
1126 | config SYS_FSL_ERRATUM_A004510 | |
1127 | bool | |
1128 | ||
1129 | config SYS_FSL_ERRATUM_A004510_SVR_REV | |
1130 | hex | |
1131 | depends on SYS_FSL_ERRATUM_A004510 | |
1132 | default 0x20 if ARCH_P4080 | |
1133 | default 0x10 | |
1134 | ||
1135 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 | |
1136 | hex | |
1137 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) | |
1138 | default 0x11 | |
1139 | ||
1140 | config SYS_FSL_ERRATUM_A005125 | |
1141 | bool | |
1142 | ||
1143 | config SYS_FSL_ERRATUM_A005434 | |
1144 | bool | |
1145 | ||
1146 | config SYS_FSL_ERRATUM_A005812 | |
1147 | bool | |
1148 | ||
1149 | config SYS_FSL_ERRATUM_A005871 | |
1150 | bool | |
1151 | ||
1152 | config SYS_FSL_ERRATUM_A006261 | |
1153 | bool | |
1154 | ||
1155 | config SYS_FSL_ERRATUM_A006379 | |
1156 | bool | |
1157 | ||
1158 | config SYS_FSL_ERRATUM_A006384 | |
1159 | bool | |
1160 | ||
1161 | config SYS_FSL_ERRATUM_A006475 | |
1162 | bool | |
1163 | ||
1164 | config SYS_FSL_ERRATUM_A006593 | |
1165 | bool | |
1166 | ||
1167 | config SYS_FSL_ERRATUM_A007075 | |
1168 | bool | |
1169 | ||
1170 | config SYS_FSL_ERRATUM_A007186 | |
1171 | bool | |
1172 | ||
1173 | config SYS_FSL_ERRATUM_A007212 | |
1174 | bool | |
1175 | ||
09bfd962 TB |
1176 | config SYS_FSL_ERRATUM_A007815 |
1177 | bool | |
1178 | ||
63659ff3 YS |
1179 | config SYS_FSL_ERRATUM_A007798 |
1180 | bool | |
1181 | ||
06ad970b DD |
1182 | config SYS_FSL_ERRATUM_A007907 |
1183 | bool | |
1184 | ||
63659ff3 YS |
1185 | config SYS_FSL_ERRATUM_A008044 |
1186 | bool | |
1187 | ||
1188 | config SYS_FSL_ERRATUM_CPC_A002 | |
1189 | bool | |
1190 | ||
1191 | config SYS_FSL_ERRATUM_CPC_A003 | |
1192 | bool | |
1193 | ||
1194 | config SYS_FSL_ERRATUM_CPU_A003999 | |
1195 | bool | |
1196 | ||
1197 | config SYS_FSL_ERRATUM_ELBC_A001 | |
1198 | bool | |
1199 | ||
1200 | config SYS_FSL_ERRATUM_I2C_A004447 | |
1201 | bool | |
1202 | ||
1203 | config SYS_FSL_A004447_SVR_REV | |
1204 | hex | |
1205 | depends on SYS_FSL_ERRATUM_I2C_A004447 | |
1206 | default 0x00 if ARCH_MPC8548 | |
1207 | default 0x10 if ARCH_P1010 | |
1208 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 | |
1209 | default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 | |
1210 | ||
1211 | config SYS_FSL_ERRATUM_IFC_A002769 | |
1212 | bool | |
1213 | ||
1214 | config SYS_FSL_ERRATUM_IFC_A003399 | |
1215 | bool | |
1216 | ||
1217 | config SYS_FSL_ERRATUM_NMG_CPU_A011 | |
1218 | bool | |
1219 | ||
1220 | config SYS_FSL_ERRATUM_NMG_ETSEC129 | |
1221 | bool | |
1222 | ||
1223 | config SYS_FSL_ERRATUM_NMG_LBC103 | |
1224 | bool | |
1225 | ||
1226 | config SYS_FSL_ERRATUM_P1010_A003549 | |
1227 | bool | |
1228 | ||
1229 | config SYS_FSL_ERRATUM_SATA_A001 | |
1230 | bool | |
1231 | ||
1232 | config SYS_FSL_ERRATUM_SEC_A003571 | |
1233 | bool | |
1234 | ||
1235 | config SYS_FSL_ERRATUM_SRIO_A004034 | |
1236 | bool | |
1237 | ||
1238 | config SYS_FSL_ERRATUM_USB14 | |
1239 | bool | |
1240 | ||
1241 | config SYS_P4080_ERRATUM_CPU22 | |
1242 | bool | |
1243 | ||
1244 | config SYS_P4080_ERRATUM_PCIE_A003 | |
1245 | bool | |
1246 | ||
1247 | config SYS_P4080_ERRATUM_SERDES8 | |
1248 | bool | |
1249 | ||
1250 | config SYS_P4080_ERRATUM_SERDES9 | |
1251 | bool | |
1252 | ||
1253 | config SYS_P4080_ERRATUM_SERDES_A001 | |
1254 | bool | |
1255 | ||
1256 | config SYS_P4080_ERRATUM_SERDES_A005 | |
1257 | bool | |
1258 | ||
7371774a YS |
1259 | config SYS_FSL_QORIQ_CHASSIS1 |
1260 | bool | |
1261 | ||
1262 | config SYS_FSL_QORIQ_CHASSIS2 | |
1263 | bool | |
1264 | ||
8303acbc YS |
1265 | config SYS_FSL_NUM_LAWS |
1266 | int "Number of local access windows" | |
1267 | depends on FSL_LAW | |
1268 | default 32 if ARCH_B4420 || \ | |
1269 | ARCH_B4860 || \ | |
1270 | ARCH_P2041 || \ | |
1271 | ARCH_P3041 || \ | |
1272 | ARCH_P4080 || \ | |
1273 | ARCH_P5020 || \ | |
1274 | ARCH_P5040 || \ | |
1275 | ARCH_T2080 || \ | |
1276 | ARCH_T2081 || \ | |
1277 | ARCH_T4160 || \ | |
1278 | ARCH_T4240 | |
08a37fd1 | 1279 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
1280 | ARCH_T1024 || \ |
1281 | ARCH_T1040 || \ | |
1282 | ARCH_T1042 | |
1283 | default 12 if ARCH_BSC9131 || \ | |
1284 | ARCH_BSC9132 || \ | |
1285 | ARCH_C29X || \ | |
1286 | ARCH_MPC8536 || \ | |
1287 | ARCH_MPC8572 || \ | |
1288 | ARCH_P1010 || \ | |
1289 | ARCH_P1011 || \ | |
1290 | ARCH_P1020 || \ | |
1291 | ARCH_P1021 || \ | |
1292 | ARCH_P1022 || \ | |
1293 | ARCH_P1023 || \ | |
1294 | ARCH_P1024 || \ | |
1295 | ARCH_P1025 || \ | |
1296 | ARCH_P2020 | |
1297 | default 10 if ARCH_MPC8544 || \ | |
1298 | ARCH_MPC8548 || \ | |
1299 | ARCH_MPC8568 || \ | |
1300 | ARCH_MPC8569 | |
1301 | default 8 if ARCH_MPC8540 || \ | |
1302 | ARCH_MPC8541 || \ | |
1303 | ARCH_MPC8555 || \ | |
1304 | ARCH_MPC8560 | |
1305 | help | |
1306 | Number of local access windows. This is fixed per SoC. | |
1307 | If not sure, do not change. | |
1308 | ||
9ec10107 YS |
1309 | config SYS_FSL_THREADS_PER_CORE |
1310 | int | |
1311 | default 2 if E6500 | |
1312 | default 1 | |
1313 | ||
26e79b65 YS |
1314 | config SYS_NUM_TLBCAMS |
1315 | int "Number of TLB CAM entries" | |
1316 | default 64 if E500MC | |
1317 | default 16 | |
1318 | help | |
1319 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
1320 | 16 for other E500 SoCs. | |
1321 | ||
4851278e YS |
1322 | config SYS_PPC64 |
1323 | bool | |
1324 | ||
53c95384 YS |
1325 | config SYS_PPC_E500_USE_DEBUG_TLB |
1326 | bool | |
1327 | ||
d98b98d6 PK |
1328 | config FSL_IFC |
1329 | bool | |
1330 | ||
06878977 PK |
1331 | config FSL_ELBC |
1332 | bool | |
1333 | ||
53c95384 YS |
1334 | config SYS_PPC_E500_DEBUG_TLB |
1335 | int "Temporary TLB entry for external debugger" | |
1336 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
1337 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
1338 | default 1 if ARCH_MPC8536 | |
1339 | default 2 if ARCH_MPC8572 || \ | |
1340 | ARCH_P1011 || \ | |
1341 | ARCH_P1020 || \ | |
1342 | ARCH_P1021 || \ | |
1343 | ARCH_P1022 || \ | |
1344 | ARCH_P1024 || \ | |
1345 | ARCH_P1025 || \ | |
1346 | ARCH_P2020 | |
1347 | default 3 if ARCH_P1010 || \ | |
1348 | ARCH_BSC9132 || \ | |
1349 | ARCH_C29X | |
1350 | help | |
1351 | Select a temporary TLB entry to be used during boot to work | |
1352 | around limitations in e500v1 and e500v2 external debugger | |
1353 | support. This reduces the portions of the boot code where | |
1354 | breakpoints and single stepping do not work. The value of this | |
1355 | symbol should be set to the TLB1 entry to be used for this | |
1356 | purpose. If unsure, do not change. | |
1357 | ||
1c40707e PK |
1358 | config SYS_FSL_IFC_CLK_DIV |
1359 | int "Divider of platform clock" | |
1360 | depends on FSL_IFC | |
1361 | default 2 if ARCH_B4420 || \ | |
1362 | ARCH_B4860 || \ | |
1363 | ARCH_T1024 || \ | |
1364 | ARCH_T1023 || \ | |
1365 | ARCH_T1040 || \ | |
1366 | ARCH_T1042 || \ | |
1367 | ARCH_T4160 || \ | |
1368 | ARCH_T4240 | |
1369 | default 1 | |
1370 | help | |
1371 | Defines divider of platform clock(clock input to | |
1372 | IFC controller). | |
1373 | ||
add63f94 PK |
1374 | config SYS_FSL_LBC_CLK_DIV |
1375 | int "Divider of platform clock" | |
1376 | depends on FSL_ELBC || ARCH_MPC8540 || \ | |
1377 | ARCH_MPC8548 || ARCH_MPC8541 || \ | |
1378 | ARCH_MPC8555 || ARCH_MPC8560 || \ | |
1379 | ARCH_MPC8568 | |
1380 | ||
1381 | default 2 if ARCH_P2041 || \ | |
1382 | ARCH_P3041 || \ | |
1383 | ARCH_P4080 || \ | |
1384 | ARCH_P5020 || \ | |
1385 | ARCH_P5040 | |
1386 | default 1 | |
1387 | ||
1388 | help | |
1389 | Defines divider of platform clock(clock input to | |
1390 | eLBC controller). | |
1391 | ||
dd84058d MY |
1392 | source "board/freescale/b4860qds/Kconfig" |
1393 | source "board/freescale/bsc9131rdb/Kconfig" | |
1394 | source "board/freescale/bsc9132qds/Kconfig" | |
1395 | source "board/freescale/c29xpcie/Kconfig" | |
1396 | source "board/freescale/corenet_ds/Kconfig" | |
1397 | source "board/freescale/mpc8536ds/Kconfig" | |
1398 | source "board/freescale/mpc8540ads/Kconfig" | |
1399 | source "board/freescale/mpc8541cds/Kconfig" | |
1400 | source "board/freescale/mpc8544ds/Kconfig" | |
1401 | source "board/freescale/mpc8548cds/Kconfig" | |
1402 | source "board/freescale/mpc8555cds/Kconfig" | |
1403 | source "board/freescale/mpc8560ads/Kconfig" | |
1404 | source "board/freescale/mpc8568mds/Kconfig" | |
1405 | source "board/freescale/mpc8569mds/Kconfig" | |
1406 | source "board/freescale/mpc8572ds/Kconfig" | |
1407 | source "board/freescale/p1010rdb/Kconfig" | |
1408 | source "board/freescale/p1022ds/Kconfig" | |
1409 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
1410 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
1411 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
1412 | source "board/freescale/p2041rdb/Kconfig" |
1413 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 1414 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 1415 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
1416 | source "board/freescale/t1040qds/Kconfig" |
1417 | source "board/freescale/t104xrdb/Kconfig" | |
1418 | source "board/freescale/t208xqds/Kconfig" | |
1419 | source "board/freescale/t208xrdb/Kconfig" | |
1420 | source "board/freescale/t4qds/Kconfig" | |
1421 | source "board/freescale/t4rdb/Kconfig" | |
1422 | source "board/gdsys/p1022/Kconfig" | |
1423 | source "board/keymile/kmp204x/Kconfig" | |
1424 | source "board/sbc8548/Kconfig" | |
1425 | source "board/socrates/Kconfig" | |
87e29878 | 1426 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
1427 | source "board/xes/xpedite520x/Kconfig" |
1428 | source "board/xes/xpedite537x/Kconfig" | |
1429 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 1430 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
1431 | |
1432 | endmenu |