[people/ms/u-boot.git] / arch / powerpc / cpu / mpc8xxx / fsl_ifc.c

/*
 * Copyright 2010-2011 Freescale Semiconductor, Inc.
 * Author: Dipen Dudhat <dipen.dudhat@freescale.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <asm/fsl_ifc.h>

void print_ifc_regs(void)
{
	int i, j;

	printf("IFC Controller Registers\n");
	for (i = 0; i < FSL_IFC_BANK_COUNT; i++) {
		printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
			i, get_ifc_cspr(i), i, get_ifc_amask(i),
			i, get_ifc_csor(i));
		for (j = 0; j < 4; j++)
			printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
	}
}

void init_early_memctl_regs(void)
{
#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
	set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
	set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
	set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
	set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);

#if !defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) || defined(CONFIG_SYS_RAMBOOT)
#ifdef CONFIG_SYS_CSPR0_EXT
	set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
#endif
	set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
	set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
	set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
#endif
#endif

#ifdef CONFIG_SYS_CSPR1_EXT
	set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
#endif
#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
	set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
	set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
	set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
	set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);

	set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
	set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
	set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
#endif

#ifdef CONFIG_SYS_CSPR2_EXT
	set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
#endif
#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
	set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);
	set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1);
	set_ifc_ftim(IFC_CS2, IFC_FTIM2, CONFIG_SYS_CS2_FTIM2);
	set_ifc_ftim(IFC_CS2, IFC_FTIM3, CONFIG_SYS_CS2_FTIM3);

	set_ifc_csor(IFC_CS2, CONFIG_SYS_CSOR2);
	set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
	set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2);
#endif

#ifdef CONFIG_SYS_CSPR3_EXT
	set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);
#endif
#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
	set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);
	set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1);
	set_ifc_ftim(IFC_CS3, IFC_FTIM2, CONFIG_SYS_CS3_FTIM2);
	set_ifc_ftim(IFC_CS3, IFC_FTIM3, CONFIG_SYS_CS3_FTIM3);

	set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3);
	set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
	set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3);
#endif
}
Commit	Line	Data
d789b5f5 DD	1	/*
	2	* Copyright 2010-2011 Freescale Semiconductor, Inc.
	3	* Author: Dipen Dudhat <dipen.dudhat@freescale.com>
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License as
	7	* published by the Free Software Foundation; either version 2 of
	8	* the License, or (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	18	* MA 02111-1307 USA
	19	*/
	20
	21	#include <common.h>
	22	#include <asm/fsl_ifc.h>
	23
	24	void print_ifc_regs(void)
	25	{
	26	int i, j;
	27
	28	printf("IFC Controller Registers\n");
	29	for (i = 0; i < FSL_IFC_BANK_COUNT; i++) {
	30	printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
	31	i, get_ifc_cspr(i), i, get_ifc_amask(i),
	32	i, get_ifc_csor(i));
	33	for (j = 0; j < 4; j++)
	34	printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
	35	}
	36	}
	37
	38	void init_early_memctl_regs(void)
	39	{
	40	#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
d789b5f5 DD	41	set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
	42	set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
	43	set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
	44	set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
d7da1484	45
bc6bbd6b	46	#if !defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) \|\| defined(CONFIG_SYS_RAMBOOT)
ffdf8890 KG	47	#ifdef CONFIG_SYS_CSPR0_EXT
	48	set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
	49	#endif
d7da1484 DD	50	set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
	51	set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
	52	set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
d789b5f5	53	#endif
bc6bbd6b	54	#endif
d789b5f5	55
ffdf8890 KG	56	#ifdef CONFIG_SYS_CSPR1_EXT
	57	set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
	58	#endif
d789b5f5	59	#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
d789b5f5 DD	60	set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
	61	set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
	62	set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
	63	set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);
d7da1484 DD	64
	65	set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
	66	set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
	67	set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
d789b5f5 DD	68	#endif
d789b5f5 DD	69
ffdf8890 KG	70	#ifdef CONFIG_SYS_CSPR2_EXT
	71	set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
	72	#endif
d789b5f5	73	#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
d789b5f5 DD	74	set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);
	75	set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1);
	76	set_ifc_ftim(IFC_CS2, IFC_FTIM2, CONFIG_SYS_CS2_FTIM2);
	77	set_ifc_ftim(IFC_CS2, IFC_FTIM3, CONFIG_SYS_CS2_FTIM3);
	78
d7da1484 DD	79	set_ifc_csor(IFC_CS2, CONFIG_SYS_CSOR2);
	80	set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
	81	set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2);
d789b5f5 DD	82	#endif
d789b5f5 DD	83
ffdf8890 KG	84	#ifdef CONFIG_SYS_CSPR3_EXT
	85	set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);
	86	#endif
d789b5f5	87	#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
d789b5f5 DD	88	set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);
	89	set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1);
	90	set_ifc_ftim(IFC_CS3, IFC_FTIM2, CONFIG_SYS_CS3_FTIM2);
	91	set_ifc_ftim(IFC_CS3, IFC_FTIM3, CONFIG_SYS_CS3_FTIM3);
d7da1484 DD	92
	93	set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3);
	94	set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
	95	set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3);
d789b5f5 DD	96	#endif
d789b5f5 DD	97	}