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0b135cfc NI |
1 | /* |
2 | * linux/include/asm-sh/io.h | |
3 | * | |
4 | * Copyright (C) 1996-2000 Russell King | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Modifications: | |
11 | * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both | |
12 | * constant addresses and variable addresses. | |
13 | * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture | |
14 | * specific IO header files. | |
15 | * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. | |
16 | * 04-Apr-1999 PJB Added check_signature. | |
17 | * 12-Dec-1999 RMK More cleanups | |
18 | * 18-Jun-2000 RMK Removed virt_to_* and friends definitions | |
19 | */ | |
20 | #ifndef __ASM_SH_IO_H | |
21 | #define __ASM_SH_IO_H | |
22 | ||
23 | #ifdef __KERNEL__ | |
24 | ||
25 | #include <linux/types.h> | |
26 | #include <asm/byteorder.h> | |
27 | ||
28 | /* | |
29 | * Generic virtual read/write. Note that we don't support half-word | |
30 | * read/writes. We define __arch_*[bl] here, and leave __arch_*w | |
31 | * to the architecture specific code. | |
32 | */ | |
33 | #define __arch_getb(a) (*(volatile unsigned char *)(a)) | |
34 | #define __arch_getw(a) (*(volatile unsigned short *)(a)) | |
35 | #define __arch_getl(a) (*(volatile unsigned int *)(a)) | |
36 | ||
b5d10a13 NI |
37 | #define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v)) |
38 | #define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v)) | |
39 | #define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v)) | |
0b135cfc NI |
40 | |
41 | extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); | |
42 | extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); | |
43 | extern void __raw_writesl(unsigned int addr, const void *data, int longlen); | |
44 | ||
45 | extern void __raw_readsb(unsigned int addr, void *data, int bytelen); | |
46 | extern void __raw_readsw(unsigned int addr, void *data, int wordlen); | |
47 | extern void __raw_readsl(unsigned int addr, void *data, int longlen); | |
48 | ||
b5d10a13 NI |
49 | #define __raw_writeb(v, a) __arch_putb(v, a) |
50 | #define __raw_writew(v, a) __arch_putw(v, a) | |
51 | #define __raw_writel(v, a) __arch_putl(v, a) | |
0b135cfc NI |
52 | |
53 | #define __raw_readb(a) __arch_getb(a) | |
54 | #define __raw_readw(a) __arch_getw(a) | |
55 | #define __raw_readl(a) __arch_getl(a) | |
56 | ||
57 | /* | |
58 | * The compiler seems to be incapable of optimising constants | |
59 | * properly. Spell it out to the compiler in some cases. | |
60 | * These are only valid for small values of "off" (< 1<<12) | |
61 | */ | |
b5d10a13 NI |
62 | #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) |
63 | #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) | |
64 | #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) | |
0b135cfc | 65 | |
b5d10a13 NI |
66 | #define __raw_base_readb(base, off) __arch_base_getb(base, off) |
67 | #define __raw_base_readw(base, off) __arch_base_getw(base, off) | |
68 | #define __raw_base_readl(base, off) __arch_base_getl(base, off) | |
0b135cfc | 69 | |
0b135cfc NI |
70 | /* |
71 | * IO port access primitives | |
72 | * ------------------------- | |
73 | * | |
74 | * The SH doesn't have special IO access instructions; all IO is memory | |
75 | * mapped. Note that these are defined to perform little endian accesses | |
76 | * only. Their primary purpose is to access PCI and ISA peripherals. | |
77 | * | |
0b135cfc NI |
78 | * Note that we prevent GCC re-ordering or caching values in expressions |
79 | * by introducing sequence points into the in*() definitions. Note that | |
80 | * __raw_* do not guarantee this behaviour. | |
81 | * | |
82 | * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. | |
83 | */ | |
b5d10a13 NI |
84 | #define outb(v, p) __raw_writeb(v, p) |
85 | #define outw(v, p) __raw_writew(cpu_to_le16(v), p) | |
86 | #define outl(v, p) __raw_writel(cpu_to_le32(v), p) | |
b02bad12 NI |
87 | |
88 | #define inb(p) ({ unsigned int __v = __raw_readb(p); __v; }) | |
89 | #define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; }) | |
90 | #define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; }) | |
91 | ||
b5d10a13 NI |
92 | #define outsb(p, d, l) __raw_writesb(p, d, l) |
93 | #define outsw(p, d, l) __raw_writesw(p, d, l) | |
94 | #define outsl(p, d, l) __raw_writesl(p, d, l) | |
b02bad12 | 95 | |
b5d10a13 NI |
96 | #define insb(p, d, l) __raw_readsb(p, d, l) |
97 | #define insw(p, d, l) __raw_readsw(p, d, l) | |
98 | #define insl(p, d, l) __raw_readsl(p, d, l) | |
0b135cfc | 99 | |
b5d10a13 NI |
100 | #define outb_p(val, port) outb((val), (port)) |
101 | #define outw_p(val, port) outw((val), (port)) | |
102 | #define outl_p(val, port) outl((val), (port)) | |
0b135cfc NI |
103 | #define inb_p(port) inb((port)) |
104 | #define inw_p(port) inw((port)) | |
105 | #define inl_p(port) inl((port)) | |
106 | ||
b5d10a13 NI |
107 | #define outsb_p(port, from, len) outsb(port, from, len) |
108 | #define outsw_p(port, from, len) outsw(port, from, len) | |
109 | #define outsl_p(port, from, len) outsl(port, from, len) | |
110 | #define insb_p(port, to, len) insb(port, to, len) | |
111 | #define insw_p(port, to, len) insw(port, to, len) | |
112 | #define insl_p(port, to, len) insl(port, to, len) | |
113 | ||
114 | /* for U-Boot PCI */ | |
115 | #define out_8(port, val) outb(val, port) | |
116 | #define out_le16(port, val) outw(val, port) | |
117 | #define out_le32(port, val) outl(val, port) | |
118 | #define in_8(port) inb(port) | |
119 | #define in_le16(port) inw(port) | |
120 | #define in_le32(port) inl(port) | |
0b135cfc NI |
121 | |
122 | /* | |
123 | * DMA-consistent mapping functions. These allocate/free a region of | |
124 | * uncached, unwrite-buffered mapped memory space for use with DMA | |
125 | * devices. This is the "generic" version. The PCI specific version | |
126 | * is in pci.h | |
127 | */ | |
128 | extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); | |
129 | extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); | |
130 | extern void consistent_sync(void *vaddr, size_t size, int rw); | |
131 | ||
132 | /* | |
133 | * String version of IO memory access ops: | |
134 | */ | |
135 | extern void _memcpy_fromio(void *, unsigned long, size_t); | |
136 | extern void _memcpy_toio(unsigned long, const void *, size_t); | |
137 | extern void _memset_io(unsigned long, int, size_t); | |
138 | ||
0b135cfc NI |
139 | /* |
140 | * If this architecture has PCI memory IO, then define the read/write | |
141 | * macros. These should only be used with the cookie passed from | |
142 | * ioremap. | |
143 | */ | |
144 | #ifdef __mem_pci | |
145 | ||
146 | #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; }) | |
b5d10a13 NI |
147 | #define readw(c)\ |
148 | ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) | |
149 | #define readl(c)\ | |
150 | ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) | |
0b135cfc | 151 | |
b5d10a13 NI |
152 | #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) |
153 | #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) | |
154 | #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) | |
0b135cfc | 155 | |
b5d10a13 NI |
156 | #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) |
157 | #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) | |
158 | #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) | |
0b135cfc | 159 | |
b5d10a13 NI |
160 | #define eth_io_copy_and_sum(s, c, l, b) \ |
161 | eth_copy_and_sum((s), __mem_pci(c), (l), (b)) | |
0b135cfc NI |
162 | |
163 | static inline int | |
164 | check_signature(unsigned long io_addr, const unsigned char *signature, | |
165 | int length) | |
166 | { | |
167 | int retval = 0; | |
168 | do { | |
169 | if (readb(io_addr) != *signature) | |
170 | goto out; | |
171 | io_addr++; | |
172 | signature++; | |
173 | length--; | |
174 | } while (length); | |
175 | retval = 1; | |
176 | out: | |
177 | return retval; | |
178 | } | |
179 | ||
180 | #elif !defined(readb) | |
181 | ||
b02bad12 NI |
182 | #define readb(addr) __raw_readb(addr) |
183 | #define readw(addr) __raw_readw(addr) | |
184 | #define readl(addr) __raw_readl(addr) | |
b5d10a13 NI |
185 | #define writeb(v, addr) __raw_writeb(v, addr) |
186 | #define writew(v, addr) __raw_writew(v, addr) | |
187 | #define writel(v, addr) __raw_writel(v, addr) | |
0b135cfc | 188 | |
b5d10a13 | 189 | #define check_signature(io, sig, len) (0) |
0b135cfc NI |
190 | |
191 | #endif /* __mem_pci */ | |
192 | ||
0b135cfc NI |
193 | static inline void sync(void) |
194 | { | |
195 | } | |
63a11be6 | 196 | |
1379c51e NI |
197 | /* |
198 | * Clear and set bits in one shot. These macros can be used to clear and | |
199 | * set multiple bits in a register using a single call. These macros can | |
200 | * also be used to set a multiple-bit bit pattern using a mask, by | |
201 | * specifying the mask in the 'clear' parameter and the new bit pattern | |
202 | * in the 'set' parameter. | |
203 | */ | |
204 | ||
205 | #define clrbits(type, addr, clear) \ | |
206 | out_##type((addr), in_##type(addr) & ~(clear)) | |
207 | ||
208 | #define setbits(type, addr, set) \ | |
209 | out_##type((addr), in_##type(addr) | (set)) | |
210 | ||
211 | #define clrsetbits(type, addr, clear, set) \ | |
212 | out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) | |
213 | ||
214 | #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) | |
215 | #define setbits_be32(addr, set) setbits(be32, addr, set) | |
216 | #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) | |
217 | ||
218 | #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) | |
219 | #define setbits_le32(addr, set) setbits(le32, addr, set) | |
220 | #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) | |
221 | ||
222 | #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) | |
223 | #define setbits_be16(addr, set) setbits(be16, addr, set) | |
224 | #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) | |
225 | ||
226 | #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) | |
227 | #define setbits_le16(addr, set) setbits(le16, addr, set) | |
228 | #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) | |
229 | ||
230 | #define clrbits_8(addr, clear) clrbits(8, addr, clear) | |
231 | #define setbits_8(addr, set) setbits(8, addr, set) | |
232 | #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) | |
233 | ||
505fe9cd | 234 | #include <asm-generic/io.h> |
65e43a10 | 235 | |
0b135cfc NI |
236 | #endif /* __KERNEL__ */ |
237 | #endif /* __ASM_SH_IO_H */ |