]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - bfd/archures.c
bfd, binutils: add gfx11 amdgpu architectures
[thirdparty/binutils-gdb.git] / bfd / archures.c
CommitLineData
252b5132 1/* BFD library support routines for architectures.
d87bef3a 2 Copyright (C) 1990-2023 Free Software Foundation, Inc.
252b5132
RH
3 Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
4
3af9a47b 5 This file is part of BFD, the Binary File Descriptor library.
252b5132 6
3af9a47b
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
3af9a47b 10 (at your option) any later version.
252b5132 11
3af9a47b
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
3af9a47b
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
252b5132 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
252b5132 24#include "libbfd.h"
3882b010 25#include "safe-ctype.h"
252b5132
RH
26
27/*
28
29SECTION
30 Architectures
31
32 BFD keeps one atom in a BFD describing the
33 architecture of the data attached to the BFD: a pointer to a
0ef5a5bd 34 <<bfd_arch_info_type>>.
252b5132
RH
35
36 Pointers to structures can be requested independently of a BFD
37 so that an architecture's information can be interrogated
38 without access to an open BFD.
39
40 The architecture information is provided by each architecture package.
41 The set of default architectures is selected by the macro
42 <<SELECT_ARCHITECTURES>>. This is normally set up in the
43 @file{config/@var{target}.mt} file of your choice. If the name is not
0ef5a5bd 44 defined, then all the architectures supported are included.
252b5132
RH
45
46 When BFD starts up, all the architectures are called with an
47 initialize method. It is up to the architecture back end to
48 insert as many items into the list of architectures as it wants to;
49 generally this would be one for each machine and one for the
0ef5a5bd 50 default case (an item with a machine field of 0).
252b5132
RH
51
52 BFD's idea of an architecture is implemented in @file{archures.c}.
53*/
54
55/*
56
57SUBSECTION
58 bfd_architecture
59
60DESCRIPTION
61 This enum gives the object file's CPU architecture, in a
62 global sense---i.e., what processor family does it belong to?
63 Another field indicates which processor within
64 the family is in use. The machine gives a number which
65 distinguishes different versions of the architecture,
a8eb42a8 66 containing, for example, 68020 for Motorola 68020.
252b5132 67
0ef5a5bd 68.enum bfd_architecture
252b5132 69.{
c312a6a4
NC
70. bfd_arch_unknown, {* File arch not known. *}
71. bfd_arch_obscure, {* Arch known, not one of these. *}
07d6d2b8
AM
72. bfd_arch_m68k, {* Motorola 68xxx. *}
73.#define bfd_mach_m68000 1
74.#define bfd_mach_m68008 2
75.#define bfd_mach_m68010 3
76.#define bfd_mach_m68020 4
77.#define bfd_mach_m68030 5
78.#define bfd_mach_m68040 6
79.#define bfd_mach_m68060 7
80.#define bfd_mach_cpu32 8
81.#define bfd_mach_fido 9
82.#define bfd_mach_mcf_isa_a_nodiv 10
83.#define bfd_mach_mcf_isa_a 11
84.#define bfd_mach_mcf_isa_a_mac 12
85.#define bfd_mach_mcf_isa_a_emac 13
86.#define bfd_mach_mcf_isa_aplus 14
87.#define bfd_mach_mcf_isa_aplus_mac 15
88.#define bfd_mach_mcf_isa_aplus_emac 16
89.#define bfd_mach_mcf_isa_b_nousp 17
90.#define bfd_mach_mcf_isa_b_nousp_mac 18
91.#define bfd_mach_mcf_isa_b_nousp_emac 19
92.#define bfd_mach_mcf_isa_b 20
93.#define bfd_mach_mcf_isa_b_mac 21
94.#define bfd_mach_mcf_isa_b_emac 22
95.#define bfd_mach_mcf_isa_b_float 23
96.#define bfd_mach_mcf_isa_b_float_mac 24
97.#define bfd_mach_mcf_isa_b_float_emac 25
98.#define bfd_mach_mcf_isa_c 26
99.#define bfd_mach_mcf_isa_c_mac 27
100.#define bfd_mach_mcf_isa_c_emac 28
101.#define bfd_mach_mcf_isa_c_nodiv 29
102.#define bfd_mach_mcf_isa_c_nodiv_mac 30
103.#define bfd_mach_mcf_isa_c_nodiv_emac 31
104. bfd_arch_vax, {* DEC Vax. *}
252b5132 105.
07d6d2b8
AM
106. bfd_arch_or1k, {* OpenRISC 1000. *}
107.#define bfd_mach_or1k 1
108.#define bfd_mach_or1knd 2
3b16e843 109.
07d6d2b8 110. bfd_arch_sparc, {* SPARC. *}
252b5132
RH
111.#define bfd_mach_sparc 1
112.{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
113.#define bfd_mach_sparc_sparclet 2
114.#define bfd_mach_sparc_sparclite 3
115.#define bfd_mach_sparc_v8plus 4
c312a6a4 116.#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns. *}
252b5132
RH
117.#define bfd_mach_sparc_sparclite_le 6
118.#define bfd_mach_sparc_v9 7
c312a6a4
NC
119.#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
120.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
121.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
4f26fb3a
JM
122.#define bfd_mach_sparc_v8plusc 11 {* with UA2005 and T1 add'ns. *}
123.#define bfd_mach_sparc_v9c 12 {* with UA2005 and T1 add'ns. *}
124.#define bfd_mach_sparc_v8plusd 13 {* with UA2007 and T3 add'ns. *}
125.#define bfd_mach_sparc_v9d 14 {* with UA2007 and T3 add'ns. *}
126.#define bfd_mach_sparc_v8pluse 15 {* with OSA2001 and T4 add'ns (no IMA). *}
127.#define bfd_mach_sparc_v9e 16 {* with OSA2001 and T4 add'ns (no IMA). *}
128.#define bfd_mach_sparc_v8plusv 17 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
129.#define bfd_mach_sparc_v9v 18 {* with OSA2011 and T4 and IMA and FJMAU add'ns. *}
130.#define bfd_mach_sparc_v8plusm 19 {* with OSA2015 and M7 add'ns. *}
131.#define bfd_mach_sparc_v9m 20 {* with OSA2015 and M7 add'ns. *}
64517994
JM
132.#define bfd_mach_sparc_v8plusm8 21 {* with OSA2017 and M8 add'ns. *}
133.#define bfd_mach_sparc_v9m8 22 {* with OSA2017 and M8 add'ns. *}
252b5132
RH
134.{* Nonzero if MACH has the v9 instruction set. *}
135.#define bfd_mach_sparc_v9_p(mach) \
64517994 136. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m8 \
19f7b010 137. && (mach) != bfd_mach_sparc_sparclite_le)
7946e94a
JJ
138.{* Nonzero if MACH is a 64 bit sparc architecture. *}
139.#define bfd_mach_sparc_64bit_p(mach) \
4f26fb3a
JM
140. ((mach) >= bfd_mach_sparc_v9 \
141. && (mach) != bfd_mach_sparc_v8plusb \
142. && (mach) != bfd_mach_sparc_v8plusc \
143. && (mach) != bfd_mach_sparc_v8plusd \
144. && (mach) != bfd_mach_sparc_v8pluse \
145. && (mach) != bfd_mach_sparc_v8plusv \
64517994
JM
146. && (mach) != bfd_mach_sparc_v8plusm \
147. && (mach) != bfd_mach_sparc_v8plusm8)
07d6d2b8 148. bfd_arch_spu, {* PowerPC SPU. *}
68ffbac6 149.#define bfd_mach_spu 256
07d6d2b8 150. bfd_arch_mips, {* MIPS Rxxxx. *}
252b5132
RH
151.#define bfd_mach_mips3000 3000
152.#define bfd_mach_mips3900 3900
153.#define bfd_mach_mips4000 4000
154.#define bfd_mach_mips4010 4010
155.#define bfd_mach_mips4100 4100
156.#define bfd_mach_mips4111 4111
00707a0e 157.#define bfd_mach_mips4120 4120
252b5132
RH
158.#define bfd_mach_mips4300 4300
159.#define bfd_mach_mips4400 4400
160.#define bfd_mach_mips4600 4600
161.#define bfd_mach_mips4650 4650
162.#define bfd_mach_mips5000 5000
00707a0e
RS
163.#define bfd_mach_mips5400 5400
164.#define bfd_mach_mips5500 5500
e407c74b 165.#define bfd_mach_mips5900 5900
252b5132 166.#define bfd_mach_mips6000 6000
5a7ea749 167.#define bfd_mach_mips7000 7000
252b5132 168.#define bfd_mach_mips8000 8000
0d2e43ed 169.#define bfd_mach_mips9000 9000
252b5132 170.#define bfd_mach_mips10000 10000
d1cf510e 171.#define bfd_mach_mips12000 12000
3aa3176b
TS
172.#define bfd_mach_mips14000 14000
173.#define bfd_mach_mips16000 16000
252b5132 174.#define bfd_mach_mips16 16
07d6d2b8 175.#define bfd_mach_mips5 5
df18f71b 176.#define bfd_mach_mips_allegrex 10111431 {* octal 'AL', 31. *}
07d6d2b8
AM
177.#define bfd_mach_mips_loongson_2e 3001
178.#define bfd_mach_mips_loongson_2f 3002
ac8cb70f 179.#define bfd_mach_mips_gs464 3003
bd782c07 180.#define bfd_mach_mips_gs464e 3004
9108bc33 181.#define bfd_mach_mips_gs264e 3005
07d6d2b8 182.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01. *}
6f179bd0 183.#define bfd_mach_mips_octeon 6501
dd6a37e7 184.#define bfd_mach_mips_octeonp 6601
432233b3 185.#define bfd_mach_mips_octeon2 6502
07d6d2b8
AM
186.#define bfd_mach_mips_octeon3 6503
187.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR'. *}
188.#define bfd_mach_mips_interaptiv_mr2 736550 {* decimal 'IA2'. *}
189.#define bfd_mach_mipsisa32 32
190.#define bfd_mach_mipsisa32r2 33
191.#define bfd_mach_mipsisa32r3 34
192.#define bfd_mach_mipsisa32r5 36
193.#define bfd_mach_mipsisa32r6 37
194.#define bfd_mach_mipsisa64 64
195.#define bfd_mach_mipsisa64r2 65
196.#define bfd_mach_mipsisa64r3 66
197.#define bfd_mach_mipsisa64r5 68
198.#define bfd_mach_mipsisa64r6 69
199.#define bfd_mach_mips_micromips 96
200. bfd_arch_i386, {* Intel 386. *}
d7921315
L
201.#define bfd_mach_i386_intel_syntax (1 << 0)
202.#define bfd_mach_i386_i8086 (1 << 1)
203.#define bfd_mach_i386_i386 (1 << 2)
204.#define bfd_mach_x86_64 (1 << 3)
205.#define bfd_mach_x64_32 (1 << 4)
206.#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
207.#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
208.#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
07d6d2b8 209. bfd_arch_iamcu, {* Intel MCU. *}
bf64a951
L
210.#define bfd_mach_iamcu (1 << 8)
211.#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu)
212.#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax)
07d6d2b8
AM
213. bfd_arch_romp, {* IBM ROMP PC/RT. *}
214. bfd_arch_convex, {* Convex. *}
07d6d2b8
AM
215. bfd_arch_m98k, {* Motorola 98xxx. *}
216. bfd_arch_pyramid, {* Pyramid Technology. *}
217. bfd_arch_h8300, {* Renesas H8/300 (formerly Hitachi H8/300). *}
218.#define bfd_mach_h8300 1
219.#define bfd_mach_h8300h 2
220.#define bfd_mach_h8300s 3
221.#define bfd_mach_h8300hn 4
222.#define bfd_mach_h8300sn 5
223.#define bfd_mach_h8300sx 6
224.#define bfd_mach_h8300sxn 7
225. bfd_arch_pdp11, {* DEC PDP-11. *}
07d6d2b8 226. bfd_arch_powerpc, {* PowerPC. *}
686e4055
AM
227.#define bfd_mach_ppc 32
228.#define bfd_mach_ppc64 64
87f33987
ND
229.#define bfd_mach_ppc_403 403
230.#define bfd_mach_ppc_403gc 4030
305f7588 231.#define bfd_mach_ppc_405 405
87f33987
ND
232.#define bfd_mach_ppc_505 505
233.#define bfd_mach_ppc_601 601
234.#define bfd_mach_ppc_602 602
235.#define bfd_mach_ppc_603 603
236.#define bfd_mach_ppc_ec603e 6031
237.#define bfd_mach_ppc_604 604
238.#define bfd_mach_ppc_620 620
239.#define bfd_mach_ppc_630 630
240.#define bfd_mach_ppc_750 750
241.#define bfd_mach_ppc_860 860
242.#define bfd_mach_ppc_a35 35
243.#define bfd_mach_ppc_rs64ii 642
244.#define bfd_mach_ppc_rs64iii 643
245.#define bfd_mach_ppc_7400 7400
07d6d2b8
AM
246.#define bfd_mach_ppc_e500 500
247.#define bfd_mach_ppc_e500mc 5001
248.#define bfd_mach_ppc_e500mc64 5005
249.#define bfd_mach_ppc_e5500 5006
250.#define bfd_mach_ppc_e6500 5007
251.#define bfd_mach_ppc_titan 83
252.#define bfd_mach_ppc_vle 84
253. bfd_arch_rs6000, {* IBM RS/6000. *}
686e4055 254.#define bfd_mach_rs6k 6000
87f33987
ND
255.#define bfd_mach_rs6k_rs1 6001
256.#define bfd_mach_rs6k_rsc 6003
257.#define bfd_mach_rs6k_rs2 6002
07d6d2b8 258. bfd_arch_hppa, {* HP PA RISC. *}
42acdc7c
JB
259.#define bfd_mach_hppa10 10
260.#define bfd_mach_hppa11 11
261.#define bfd_mach_hppa20 20
262.#define bfd_mach_hppa20w 25
07d6d2b8 263. bfd_arch_d10v, {* Mitsubishi D10V. *}
686e4055 264.#define bfd_mach_d10v 1
7af8cca9
MM
265.#define bfd_mach_d10v_ts2 2
266.#define bfd_mach_d10v_ts3 3
07d6d2b8
AM
267. bfd_arch_d30v, {* Mitsubishi D30V. *}
268. bfd_arch_dlx, {* DLX. *}
269. bfd_arch_m68hc11, {* Motorola 68HC11. *}
270. bfd_arch_m68hc12, {* Motorola 68HC12. *}
bc7c6a90 271.#define bfd_mach_m6812_default 0
07d6d2b8
AM
272.#define bfd_mach_m6812 1
273.#define bfd_mach_m6812s 2
274. bfd_arch_m9s12x, {* Freescale S12X. *}
275. bfd_arch_m9s12xg, {* Freescale XGATE. *}
7b4ae824
JD
276. bfd_arch_s12z, {* Freescale S12Z. *}
277.#define bfd_mach_s12z_default 0
07d6d2b8 278. bfd_arch_z8k, {* Zilog Z8000. *}
252b5132
RH
279.#define bfd_mach_z8001 1
280.#define bfd_mach_z8002 2
07d6d2b8
AM
281. bfd_arch_sh, {* Renesas / SuperH SH (formerly Hitachi SH). *}
282.#define bfd_mach_sh 1
283.#define bfd_mach_sh2 0x20
284.#define bfd_mach_sh_dsp 0x2d
285.#define bfd_mach_sh2a 0x2a
286.#define bfd_mach_sh2a_nofpu 0x2b
e38bc3b5 287.#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
07d6d2b8
AM
288.#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
289.#define bfd_mach_sh2a_or_sh4 0x2a3
290.#define bfd_mach_sh2a_or_sh3e 0x2a4
291.#define bfd_mach_sh2e 0x2e
292.#define bfd_mach_sh3 0x30
293.#define bfd_mach_sh3_nommu 0x31
294.#define bfd_mach_sh3_dsp 0x3d
295.#define bfd_mach_sh3e 0x3e
296.#define bfd_mach_sh4 0x40
297.#define bfd_mach_sh4_nofpu 0x41
298.#define bfd_mach_sh4_nommu_nofpu 0x42
299.#define bfd_mach_sh4a 0x4a
300.#define bfd_mach_sh4a_nofpu 0x4b
301.#define bfd_mach_sh4al_dsp 0x4d
07d6d2b8
AM
302. bfd_arch_alpha, {* Dec Alpha. *}
303.#define bfd_mach_alpha_ev4 0x10
304.#define bfd_mach_alpha_ev5 0x20
305.#define bfd_mach_alpha_ev6 0x30
c312a6a4 306. bfd_arch_arm, {* Advanced Risc Machines ARM. *}
5a6c6817 307.#define bfd_mach_arm_unknown 0
252b5132 308.#define bfd_mach_arm_2 1
478d07d6 309.#define bfd_mach_arm_2a 2
252b5132 310.#define bfd_mach_arm_3 3
07d6d2b8
AM
311.#define bfd_mach_arm_3M 4
312.#define bfd_mach_arm_4 5
313.#define bfd_mach_arm_4T 6
314.#define bfd_mach_arm_5 7
478d07d6 315.#define bfd_mach_arm_5T 8
077b8428
NC
316.#define bfd_mach_arm_5TE 9
317.#define bfd_mach_arm_XScale 10
fde78edd 318.#define bfd_mach_arm_ep9312 11
e16bb312 319.#define bfd_mach_arm_iWMMXt 12
2d447fca 320.#define bfd_mach_arm_iWMMXt2 13
c0c468d5
TP
321.#define bfd_mach_arm_5TEJ 14
322.#define bfd_mach_arm_6 15
323.#define bfd_mach_arm_6KZ 16
324.#define bfd_mach_arm_6T2 17
325.#define bfd_mach_arm_6K 18
326.#define bfd_mach_arm_7 19
327.#define bfd_mach_arm_6M 20
328.#define bfd_mach_arm_6SM 21
329.#define bfd_mach_arm_7EM 22
330.#define bfd_mach_arm_8 23
331.#define bfd_mach_arm_8R 24
332.#define bfd_mach_arm_8M_BASE 25
333.#define bfd_mach_arm_8M_MAIN 26
031254f2 334.#define bfd_mach_arm_8_1M_MAIN 27
3197e593 335.#define bfd_mach_arm_9 28
07d6d2b8
AM
336. bfd_arch_nds32, {* Andes NDS32. *}
337.#define bfd_mach_n1 1
338.#define bfd_mach_n1h 2
339.#define bfd_mach_n1h_v2 3
340.#define bfd_mach_n1h_v3 4
341.#define bfd_mach_n1h_v3m 5
342. bfd_arch_ns32k, {* National Semiconductors ns32000. *}
07d6d2b8
AM
343. bfd_arch_tic30, {* Texas Instruments TMS320C30. *}
344. bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X. *}
345.#define bfd_mach_tic3x 30
346.#define bfd_mach_tic4x 40
347. bfd_arch_tic54x, {* Texas Instruments TMS320C54X. *}
348. bfd_arch_tic6x, {* Texas Instruments TMS320C6X. *}
07d6d2b8
AM
349. bfd_arch_v850, {* NEC V850. *}
350. bfd_arch_v850_rh850,{* NEC V850 (using RH850 ABI). *}
351.#define bfd_mach_v850 1
352.#define bfd_mach_v850e 'E'
353.#define bfd_mach_v850e1 '1'
354.#define bfd_mach_v850e2 0x4532
355.#define bfd_mach_v850e2v3 0x45325633
356.#define bfd_mach_v850e3v5 0x45335635 {* ('E'|'3'|'V'|'5'). *}
357. bfd_arch_arc, {* ARC Cores. *}
358.#define bfd_mach_arc_a4 0
359.#define bfd_mach_arc_a5 1
360.#define bfd_mach_arc_arc600 2
361.#define bfd_mach_arc_arc601 4
362.#define bfd_mach_arc_arc700 3
363.#define bfd_mach_arc_arcv2 5
364. bfd_arch_m32c, {* Renesas M16C/M32C. *}
365.#define bfd_mach_m16c 0x75
366.#define bfd_mach_m32c 0x78
367. bfd_arch_m32r, {* Renesas M32R (formerly Mitsubishi M32R/D). *}
686e4055 368.#define bfd_mach_m32r 1 {* For backwards compatibility. *}
a23ef39f 369.#define bfd_mach_m32rx 'x'
88845958 370.#define bfd_mach_m32r2 '2'
07d6d2b8
AM
371. bfd_arch_mn10200, {* Matsushita MN10200. *}
372. bfd_arch_mn10300, {* Matsushita MN10300. *}
373.#define bfd_mach_mn10300 300
31f8dc8f 374.#define bfd_mach_am33 330
b08fa4d3 375.#define bfd_mach_am33_2 332
252b5132
RH
376. bfd_arch_fr30,
377.#define bfd_mach_fr30 0x46523330
4e5ba5b7 378. bfd_arch_frv,
686e4055
AM
379.#define bfd_mach_frv 1
380.#define bfd_mach_frvsimple 2
4e5ba5b7
DB
381.#define bfd_mach_fr300 300
382.#define bfd_mach_fr400 400
676a64f4 383.#define bfd_mach_fr450 450
07d6d2b8 384.#define bfd_mach_frvtomcat 499 {* fr500 prototype. *}
4e5ba5b7 385.#define bfd_mach_fr500 500
9c8ee639 386.#define bfd_mach_fr550 550
07d6d2b8 387. bfd_arch_moxie, {* The moxie processor. *}
20135e4c 388.#define bfd_mach_moxie 1
07d6d2b8 389. bfd_arch_ft32, {* The ft32 processor. *}
3f8107ab 390.#define bfd_mach_ft32 1
81b42bca 391.#define bfd_mach_ft32b 2
252b5132 392. bfd_arch_mcore,
d9352518
DB
393. bfd_arch_mep,
394.#define bfd_mach_mep 1
395.#define bfd_mach_mep_h1 0x6831
4d28413b 396.#define bfd_mach_mep_c5 0x6335
a3c62988
NC
397. bfd_arch_metag,
398.#define bfd_mach_metag 1
07d6d2b8 399. bfd_arch_ia64, {* HP/Intel ia64. *}
686e4055
AM
400.#define bfd_mach_ia64_elf64 64
401.#define bfd_mach_ia64_elf32 32
cf88bb9f 402. bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
686e4055
AM
403.#define bfd_mach_ip2022 1
404.#define bfd_mach_ip2022ext 2
a75473eb 405. bfd_arch_iq2000, {* Vitesse IQ2000. *}
07d6d2b8
AM
406.#define bfd_mach_iq2000 1
407.#define bfd_mach_iq10 2
fd0de36e
JM
408. bfd_arch_bpf, {* Linux eBPF. *}
409.#define bfd_mach_bpf 1
4449c81a 410.#define bfd_mach_xbpf 2
07d6d2b8 411. bfd_arch_epiphany, {* Adapteva EPIPHANY. *}
cfb8c092
NC
412.#define bfd_mach_epiphany16 1
413.#define bfd_mach_epiphany32 2
d031aafb 414. bfd_arch_mt,
07d6d2b8
AM
415.#define bfd_mach_ms1 1
416.#define bfd_mach_mrisc2 2
417.#define bfd_mach_ms2 3
0bcb993b 418. bfd_arch_pj,
c312a6a4 419. bfd_arch_avr, {* Atmel AVR microcontrollers. *}
adde6300
AM
420.#define bfd_mach_avr1 1
421.#define bfd_mach_avr2 2
7b21ac3f 422.#define bfd_mach_avr25 25
adde6300 423.#define bfd_mach_avr3 3
7b21ac3f
EW
424.#define bfd_mach_avr31 31
425.#define bfd_mach_avr35 35
adde6300 426.#define bfd_mach_avr4 4
65aa24b6 427.#define bfd_mach_avr5 5
7b21ac3f 428.#define bfd_mach_avr51 51
28c9d252 429.#define bfd_mach_avr6 6
07d6d2b8
AM
430.#define bfd_mach_avrtiny 100
431.#define bfd_mach_avrxmega1 101
432.#define bfd_mach_avrxmega2 102
433.#define bfd_mach_avrxmega3 103
434.#define bfd_mach_avrxmega4 104
435.#define bfd_mach_avrxmega5 105
436.#define bfd_mach_avrxmega6 106
437.#define bfd_mach_avrxmega7 107
438. bfd_arch_bfin, {* ADI Blackfin. *}
439.#define bfd_mach_bfin 1
440. bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
3d3d428f 441.#define bfd_mach_cr16 1
1fe1f39c
NC
442. bfd_arch_crx, {* National Semiconductor CRX. *}
443.#define bfd_mach_crx 1
07d6d2b8 444. bfd_arch_cris, {* Axis CRIS. *}
bac23f82
HPN
445.#define bfd_mach_cris_v0_v10 255
446.#define bfd_mach_cris_v32 32
447.#define bfd_mach_cris_v10_v32 1032
e23eba97
NC
448. bfd_arch_riscv,
449.#define bfd_mach_riscv32 132
450.#define bfd_mach_riscv64 164
99c513f6 451. bfd_arch_rl78,
07d6d2b8
AM
452.#define bfd_mach_rl78 0x75
453. bfd_arch_rx, {* Renesas RX. *}
454.#define bfd_mach_rx 0x75
c8c89dac
YS
455.#define bfd_mach_rx_v2 0x76
456.#define bfd_mach_rx_v3 0x77
07d6d2b8
AM
457. bfd_arch_s390, {* IBM s390. *}
458.#define bfd_mach_s390_31 31
459.#define bfd_mach_s390_64 64
460. bfd_arch_score, {* Sunplus score. *}
461.#define bfd_mach_score3 3
462.#define bfd_mach_score7 7
c312a6a4 463. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
93fbbb04 464. bfd_arch_xstormy16,
686e4055 465.#define bfd_mach_xstormy16 1
2469cfa2 466. bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
07d6d2b8
AM
467.#define bfd_mach_msp11 11
468.#define bfd_mach_msp110 110
469.#define bfd_mach_msp12 12
470.#define bfd_mach_msp13 13
471.#define bfd_mach_msp14 14
472.#define bfd_mach_msp15 15
473.#define bfd_mach_msp16 16
474.#define bfd_mach_msp20 20
475.#define bfd_mach_msp21 21
476.#define bfd_mach_msp22 22
477.#define bfd_mach_msp23 23
478.#define bfd_mach_msp24 24
479.#define bfd_mach_msp26 26
480.#define bfd_mach_msp31 31
481.#define bfd_mach_msp32 32
482.#define bfd_mach_msp33 33
483.#define bfd_mach_msp41 41
484.#define bfd_mach_msp42 42
485.#define bfd_mach_msp43 43
486.#define bfd_mach_msp44 44
487.#define bfd_mach_msp430x 45
488.#define bfd_mach_msp46 46
489.#define bfd_mach_msp47 47
490.#define bfd_mach_msp54 54
07d6d2b8
AM
491. bfd_arch_xgate, {* Freescale XGATE. *}
492.#define bfd_mach_xgate 1
e0001a05
NC
493. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
494.#define bfd_mach_xtensa 1
3c9b82ba 495. bfd_arch_z80,
e1f85e11
AM
496.{* Zilog Z80 without undocumented opcodes. *}
497.#define bfd_mach_z80strict 1
498.{* Zilog Z180: successor with additional instructions, but without
499. halves of ix and iy. *}
500.#define bfd_mach_z180 2
501.{* Zilog Z80 with ixl, ixh, iyl, and iyh. *}
502.#define bfd_mach_z80 3
503.{* Zilog eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode. *}
504.#define bfd_mach_ez80_z80 4
505.{* Zilog eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode. *}
506.#define bfd_mach_ez80_adl 5
507.{* Z80N *}
508.#define bfd_mach_z80n 6
509.{* Zilog Z80 with all undocumented instructions. *}
510.#define bfd_mach_z80full 7
511.{* GameBoy Z80 (reduced instruction set). *}
512.#define bfd_mach_gbz80 8
513.{* ASCII R800: successor with multiplication. *}
514.#define bfd_mach_r800 11
07d6d2b8
AM
515. bfd_arch_lm32, {* Lattice Mico32. *}
516.#define bfd_mach_lm32 1
517. bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
6e712424
PI
518. bfd_arch_kvx, {* Kalray VLIW core of the MPPA processor family *}
519.#define bfd_mach_kv3_unknown 0
520.#define bfd_mach_kv3_1 1
521.#define bfd_mach_kv3_1_64 2
522.#define bfd_mach_kv3_1_usr 3
523.#define bfd_mach_kv3_2 4
524.#define bfd_mach_kv3_2_64 5
525.#define bfd_mach_kv3_2_usr 6
526.#define bfd_mach_kv4_1 7
527.#define bfd_mach_kv4_1_64 8
528.#define bfd_mach_kv4_1_usr 9
07d6d2b8
AM
529. bfd_arch_tilepro, {* Tilera TILEPro. *}
530. bfd_arch_tilegx, {* Tilera TILE-Gx. *}
531.#define bfd_mach_tilepro 1
532.#define bfd_mach_tilegx 1
533.#define bfd_mach_tilegx32 2
534. bfd_arch_aarch64, {* AArch64. *}
a06ea964 535.#define bfd_mach_aarch64 0
95830c98 536.#define bfd_mach_aarch64_8R 1
cec5225b 537.#define bfd_mach_aarch64_ilp32 32
c60b3806 538.#define bfd_mach_aarch64_llp64 64
07d6d2b8 539. bfd_arch_nios2, {* Nios II. *}
965b1d80
SL
540.#define bfd_mach_nios2 0
541.#define bfd_mach_nios2r1 1
542.#define bfd_mach_nios2r2 2
07d6d2b8 543. bfd_arch_visium, {* Visium. *}
d924db55 544.#define bfd_mach_visium 1
07d6d2b8
AM
545. bfd_arch_wasm32, {* WebAssembly. *}
546.#define bfd_mach_wasm32 1
547. bfd_arch_pru, {* PRU. *}
548.#define bfd_mach_pru 0
fe944acf
FT
549. bfd_arch_nfp, {* Netronome Flow Processor *}
550.#define bfd_mach_nfp3200 0x3200
551.#define bfd_mach_nfp6000 0x6000
b8891f8d
AJ
552. bfd_arch_csky, {* C-SKY. *}
553.#define bfd_mach_ck_unknown 0
554.#define bfd_mach_ck510 1
555.#define bfd_mach_ck610 2
556.#define bfd_mach_ck801 3
557.#define bfd_mach_ck802 4
558.#define bfd_mach_ck803 5
559.#define bfd_mach_ck807 6
560.#define bfd_mach_ck810 7
13f8a246 561.#define bfd_mach_ck860 8
e214f8db 562. bfd_arch_loongarch, {* LoongArch *}
563.#define bfd_mach_loongarch32 1
564.#define bfd_mach_loongarch64 2
978602e8
SM
565. bfd_arch_amdgcn, {* AMDGCN *}
566.#define bfd_mach_amdgcn_unknown 0x000
567.#define bfd_mach_amdgcn_gfx900 0x02c
568.#define bfd_mach_amdgcn_gfx904 0x02e
569.#define bfd_mach_amdgcn_gfx906 0x02f
570.#define bfd_mach_amdgcn_gfx908 0x030
571.#define bfd_mach_amdgcn_gfx90a 0x03f
572.#define bfd_mach_amdgcn_gfx1010 0x033
573.#define bfd_mach_amdgcn_gfx1011 0x034
574.#define bfd_mach_amdgcn_gfx1012 0x035
575.#define bfd_mach_amdgcn_gfx1030 0x036
576.#define bfd_mach_amdgcn_gfx1031 0x037
577.#define bfd_mach_amdgcn_gfx1032 0x038
a7a0cb6c
SM
578.#define bfd_mach_amdgcn_gfx1100 0x041
579.#define bfd_mach_amdgcn_gfx1101 0x046
580.#define bfd_mach_amdgcn_gfx1102 0x047
252b5132
RH
581. bfd_arch_last
582. };
252b5132
RH
583*/
584
585/*
252b5132
RH
586SUBSECTION
587 bfd_arch_info
588
589DESCRIPTION
590 This structure contains information on architectures for use
591 within BFD.
592
593.
0ef5a5bd 594.typedef struct bfd_arch_info
252b5132
RH
595.{
596. int bits_per_word;
597. int bits_per_address;
598. int bits_per_byte;
599. enum bfd_architecture arch;
600. unsigned long mach;
601. const char *arch_name;
602. const char *printable_name;
603. unsigned int section_align_power;
b34976b6 604. {* TRUE if this is the default machine for the architecture.
aa3d5824
AM
605. The default arch should be the first entry for an arch so that
606. all the entries for that arch can be accessed via <<next>>. *}
0a1b45a2 607. bool the_default;
07d6d2b8
AM
608. const struct bfd_arch_info * (*compatible) (const struct bfd_arch_info *,
609. const struct bfd_arch_info *);
252b5132 610.
0a1b45a2 611. bool (*scan) (const struct bfd_arch_info *, const char *);
252b5132 612.
b7761f11
L
613. {* Allocate via bfd_malloc and return a fill buffer of size COUNT. If
614. IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
615. TRUE, the buffer contains code. *}
0a1b45a2 616. void *(*fill) (bfd_size_type count, bool is_bigendian, bool code);
b7761f11 617.
252b5132 618. const struct bfd_arch_info *next;
aebcfb76
NC
619.
620. {* On some architectures the offset for a relocation can point into
621. the middle of an instruction. This field specifies the maximum
622. offset such a relocation can have (in octets). This affects the
623. behaviour of the disassembler, since a value greater than zero
624. means that it may need to disassemble an instruction twice, once
625. to get its length and then a second time to display it. If the
626. value is negative then this has to be done for every single
627. instruction, regardless of the offset of the reloc. *}
628. signed int max_reloc_offset_into_insn;
3b16e843
NC
629.}
630.bfd_arch_info_type;
631.
252b5132
RH
632*/
633
a06ea964 634extern const bfd_arch_info_type bfd_aarch64_arch;
252b5132 635extern const bfd_arch_info_type bfd_alpha_arch;
978602e8 636extern const bfd_arch_info_type bfd_amdgcn_arch;
252b5132
RH
637extern const bfd_arch_info_type bfd_arc_arch;
638extern const bfd_arch_info_type bfd_arm_arch;
3b16e843 639extern const bfd_arch_info_type bfd_avr_arch;
0f64bb02 640extern const bfd_arch_info_type bfd_bfin_arch;
3d3d428f 641extern const bfd_arch_info_type bfd_cr16_arch;
06c15ad7 642extern const bfd_arch_info_type bfd_cris_arch;
1fe1f39c 643extern const bfd_arch_info_type bfd_crx_arch;
b8891f8d 644extern const bfd_arch_info_type bfd_csky_arch;
252b5132
RH
645extern const bfd_arch_info_type bfd_d10v_arch;
646extern const bfd_arch_info_type bfd_d30v_arch;
d172d4ba 647extern const bfd_arch_info_type bfd_dlx_arch;
fd0de36e 648extern const bfd_arch_info_type bfd_bpf_arch;
cfb8c092 649extern const bfd_arch_info_type bfd_epiphany_arch;
3b16e843 650extern const bfd_arch_info_type bfd_fr30_arch;
4e5ba5b7 651extern const bfd_arch_info_type bfd_frv_arch;
252b5132 652extern const bfd_arch_info_type bfd_h8300_arch;
252b5132
RH
653extern const bfd_arch_info_type bfd_hppa_arch;
654extern const bfd_arch_info_type bfd_i386_arch;
bf64a951 655extern const bfd_arch_info_type bfd_iamcu_arch;
3b16e843 656extern const bfd_arch_info_type bfd_ia64_arch;
cf88bb9f 657extern const bfd_arch_info_type bfd_ip2k_arch;
a75473eb 658extern const bfd_arch_info_type bfd_iq2000_arch;
6e712424 659extern const bfd_arch_info_type bfd_kvx_arch;
84e94c90 660extern const bfd_arch_info_type bfd_lm32_arch;
e214f8db 661extern const bfd_arch_info_type bfd_loongarch_arch;
49f58d10 662extern const bfd_arch_info_type bfd_m32c_arch;
252b5132 663extern const bfd_arch_info_type bfd_m32r_arch;
60bcf0fa
NC
664extern const bfd_arch_info_type bfd_m68hc11_arch;
665extern const bfd_arch_info_type bfd_m68hc12_arch;
6927f982
NC
666extern const bfd_arch_info_type bfd_m9s12x_arch;
667extern const bfd_arch_info_type bfd_m9s12xg_arch;
7b4ae824 668extern const bfd_arch_info_type bfd_s12z_arch;
252b5132 669extern const bfd_arch_info_type bfd_m68k_arch;
3b16e843 670extern const bfd_arch_info_type bfd_mcore_arch;
d9352518 671extern const bfd_arch_info_type bfd_mep_arch;
a3c62988 672extern const bfd_arch_info_type bfd_metag_arch;
252b5132 673extern const bfd_arch_info_type bfd_mips_arch;
7ba29e2a 674extern const bfd_arch_info_type bfd_microblaze_arch;
3b16e843 675extern const bfd_arch_info_type bfd_mmix_arch;
252b5132
RH
676extern const bfd_arch_info_type bfd_mn10200_arch;
677extern const bfd_arch_info_type bfd_mn10300_arch;
9e675548 678extern const bfd_arch_info_type bfd_moxie_arch;
3f8107ab 679extern const bfd_arch_info_type bfd_ft32_arch;
2469cfa2 680extern const bfd_arch_info_type bfd_msp430_arch;
d031aafb 681extern const bfd_arch_info_type bfd_mt_arch;
35c08157 682extern const bfd_arch_info_type bfd_nds32_arch;
fe944acf 683extern const bfd_arch_info_type bfd_nfp_arch;
36591ba1 684extern const bfd_arch_info_type bfd_nios2_arch;
3b16e843 685extern const bfd_arch_info_type bfd_ns32k_arch;
73589c9d 686extern const bfd_arch_info_type bfd_or1k_arch;
e135f41b 687extern const bfd_arch_info_type bfd_pdp11_arch;
3b16e843 688extern const bfd_arch_info_type bfd_pj_arch;
899f54f5
AM
689extern const bfd_arch_info_type bfd_powerpc_archs[];
690#define bfd_powerpc_arch bfd_powerpc_archs[0]
889294f6 691extern const bfd_arch_info_type bfd_pru_arch;
e23eba97 692extern const bfd_arch_info_type bfd_riscv_arch;
252b5132 693extern const bfd_arch_info_type bfd_rs6000_arch;
99c513f6 694extern const bfd_arch_info_type bfd_rl78_arch;
c7927a3c 695extern const bfd_arch_info_type bfd_rx_arch;
3b16e843 696extern const bfd_arch_info_type bfd_s390_arch;
1c0d3aa6 697extern const bfd_arch_info_type bfd_score_arch;
252b5132
RH
698extern const bfd_arch_info_type bfd_sh_arch;
699extern const bfd_arch_info_type bfd_sparc_arch;
e9f53129 700extern const bfd_arch_info_type bfd_spu_arch;
252b5132 701extern const bfd_arch_info_type bfd_tic30_arch;
026df7c5 702extern const bfd_arch_info_type bfd_tic4x_arch;
81635ce4 703extern const bfd_arch_info_type bfd_tic54x_arch;
40b36596 704extern const bfd_arch_info_type bfd_tic6x_arch;
aa137e4d
NC
705extern const bfd_arch_info_type bfd_tilegx_arch;
706extern const bfd_arch_info_type bfd_tilepro_arch;
3b16e843 707extern const bfd_arch_info_type bfd_v850_arch;
de863c74 708extern const bfd_arch_info_type bfd_v850_rh850_arch;
252b5132 709extern const bfd_arch_info_type bfd_vax_arch;
d924db55 710extern const bfd_arch_info_type bfd_visium_arch;
8fb740dd 711extern const bfd_arch_info_type bfd_wasm32_arch;
93fbbb04 712extern const bfd_arch_info_type bfd_xstormy16_arch;
e0001a05 713extern const bfd_arch_info_type bfd_xtensa_arch;
a8acc5fb 714extern const bfd_arch_info_type bfd_xgate_arch;
3c9b82ba 715extern const bfd_arch_info_type bfd_z80_arch;
3b16e843 716extern const bfd_arch_info_type bfd_z8k_arch;
252b5132 717
3b16e843
NC
718static const bfd_arch_info_type * const bfd_archures_list[] =
719 {
252b5132 720#ifdef SELECT_ARCHITECTURES
3b16e843 721 SELECT_ARCHITECTURES,
252b5132 722#else
a06ea964 723 &bfd_aarch64_arch,
3b16e843 724 &bfd_alpha_arch,
978602e8 725 &bfd_amdgcn_arch,
3b16e843
NC
726 &bfd_arc_arch,
727 &bfd_arm_arch,
728 &bfd_avr_arch,
0f64bb02 729 &bfd_bfin_arch,
3d3d428f 730 &bfd_cr16_arch,
3b16e843 731 &bfd_cris_arch,
1fe1f39c 732 &bfd_crx_arch,
b8891f8d 733 &bfd_csky_arch,
3b16e843
NC
734 &bfd_d10v_arch,
735 &bfd_d30v_arch,
d172d4ba 736 &bfd_dlx_arch,
fd0de36e 737 &bfd_bpf_arch,
cfb8c092 738 &bfd_epiphany_arch,
3b16e843 739 &bfd_fr30_arch,
4e5ba5b7 740 &bfd_frv_arch,
3b16e843 741 &bfd_h8300_arch,
3b16e843 742 &bfd_hppa_arch,
3b16e843 743 &bfd_i386_arch,
bf64a951 744 &bfd_iamcu_arch,
3b16e843 745 &bfd_ia64_arch,
cf88bb9f 746 &bfd_ip2k_arch,
a75473eb 747 &bfd_iq2000_arch,
6e712424 748 &bfd_kvx_arch,
84e94c90 749 &bfd_lm32_arch,
e214f8db 750 &bfd_loongarch_arch,
e729279b 751 &bfd_m32c_arch,
3b16e843
NC
752 &bfd_m32r_arch,
753 &bfd_m68hc11_arch,
754 &bfd_m68hc12_arch,
6927f982
NC
755 &bfd_m9s12x_arch,
756 &bfd_m9s12xg_arch,
7b4ae824 757 &bfd_s12z_arch,
3b16e843 758 &bfd_m68k_arch,
3b16e843 759 &bfd_mcore_arch,
d9352518 760 &bfd_mep_arch,
a3c62988 761 &bfd_metag_arch,
7ba29e2a 762 &bfd_microblaze_arch,
3b16e843
NC
763 &bfd_mips_arch,
764 &bfd_mmix_arch,
765 &bfd_mn10200_arch,
766 &bfd_mn10300_arch,
9e675548 767 &bfd_moxie_arch,
3f8107ab 768 &bfd_ft32_arch,
2469cfa2 769 &bfd_msp430_arch,
9e675548 770 &bfd_mt_arch,
35c08157 771 &bfd_nds32_arch,
fe944acf 772 &bfd_nfp_arch,
36591ba1 773 &bfd_nios2_arch,
3b16e843 774 &bfd_ns32k_arch,
73589c9d 775 &bfd_or1k_arch,
3b16e843
NC
776 &bfd_pdp11_arch,
777 &bfd_powerpc_arch,
889294f6 778 &bfd_pru_arch,
e23eba97 779 &bfd_riscv_arch,
99c513f6 780 &bfd_rl78_arch,
e23eba97 781 &bfd_rs6000_arch,
c7927a3c 782 &bfd_rx_arch,
3b16e843 783 &bfd_s390_arch,
1c0d3aa6 784 &bfd_score_arch,
3b16e843
NC
785 &bfd_sh_arch,
786 &bfd_sparc_arch,
e9f53129 787 &bfd_spu_arch,
3b16e843 788 &bfd_tic30_arch,
026df7c5 789 &bfd_tic4x_arch,
3b16e843 790 &bfd_tic54x_arch,
40b36596 791 &bfd_tic6x_arch,
aa137e4d
NC
792 &bfd_tilegx_arch,
793 &bfd_tilepro_arch,
3b16e843 794 &bfd_v850_arch,
de863c74 795 &bfd_v850_rh850_arch,
3b16e843 796 &bfd_vax_arch,
d924db55 797 &bfd_visium_arch,
8fb740dd 798 &bfd_wasm32_arch,
3b16e843 799 &bfd_xstormy16_arch,
e0001a05 800 &bfd_xtensa_arch,
a8acc5fb 801 &bfd_xgate_arch,
3c9b82ba 802 &bfd_z80_arch,
3b16e843 803 &bfd_z8k_arch,
252b5132
RH
804#endif
805 0
806};
807
808/*
809FUNCTION
810 bfd_printable_name
811
812SYNOPSIS
c58b9523 813 const char *bfd_printable_name (bfd *abfd);
252b5132
RH
814
815DESCRIPTION
816 Return a printable string representing the architecture and machine
817 from the pointer to the architecture info structure.
818
819*/
820
821const char *
c58b9523 822bfd_printable_name (bfd *abfd)
252b5132
RH
823{
824 return abfd->arch_info->printable_name;
825}
826
252b5132
RH
827/*
828FUNCTION
829 bfd_scan_arch
830
831SYNOPSIS
c58b9523 832 const bfd_arch_info_type *bfd_scan_arch (const char *string);
252b5132
RH
833
834DESCRIPTION
835 Figure out if BFD supports any cpu which could be described with
836 the name @var{string}. Return a pointer to an <<arch_info>>
837 structure if a machine is found, otherwise NULL.
252b5132
RH
838*/
839
840const bfd_arch_info_type *
c58b9523 841bfd_scan_arch (const char *string)
252b5132
RH
842{
843 const bfd_arch_info_type * const *app, *ap;
844
047066e1 845 /* Look through all the installed architectures. */
252b5132
RH
846 for (app = bfd_archures_list; *app != NULL; app++)
847 {
848 for (ap = *app; ap != NULL; ap = ap->next)
849 {
850 if (ap->scan (ap, string))
851 return ap;
852 }
853 }
854
855 return NULL;
856}
857
252b5132
RH
858/*
859FUNCTION
860 bfd_arch_list
861
862SYNOPSIS
c58b9523 863 const char **bfd_arch_list (void);
252b5132
RH
864
865DESCRIPTION
866 Return a freshly malloced NULL-terminated vector of the names
867 of all the valid BFD architectures. Do not modify the names.
252b5132
RH
868*/
869
870const char **
c58b9523 871bfd_arch_list (void)
252b5132
RH
872{
873 int vec_length = 0;
874 const char **name_ptr;
875 const char **name_list;
876 const bfd_arch_info_type * const *app;
986f0783 877 size_t amt;
252b5132 878
047066e1 879 /* Determine the number of architectures. */
252b5132
RH
880 vec_length = 0;
881 for (app = bfd_archures_list; *app != NULL; app++)
882 {
883 const bfd_arch_info_type *ap;
884 for (ap = *app; ap != NULL; ap = ap->next)
885 {
886 vec_length++;
887 }
888 }
889
b4745472 890 amt = (vec_length + 1) * sizeof (char *);
a50b1753 891 name_list = (const char **) bfd_malloc (amt);
252b5132
RH
892 if (name_list == NULL)
893 return NULL;
894
047066e1 895 /* Point the list at each of the names. */
252b5132
RH
896 name_ptr = name_list;
897 for (app = bfd_archures_list; *app != NULL; app++)
898 {
899 const bfd_arch_info_type *ap;
900 for (ap = *app; ap != NULL; ap = ap->next)
901 {
902 *name_ptr = ap->printable_name;
903 name_ptr++;
904 }
905 }
906 *name_ptr = NULL;
907
908 return name_list;
909}
910
252b5132
RH
911/*
912FUNCTION
913 bfd_arch_get_compatible
914
915SYNOPSIS
c58b9523 916 const bfd_arch_info_type *bfd_arch_get_compatible
0a1b45a2 917 (const bfd *abfd, const bfd *bbfd, bool accept_unknowns);
252b5132
RH
918
919DESCRIPTION
312b768e
NC
920 Determine whether two BFDs' architectures and machine types
921 are compatible. Calculates the lowest common denominator
922 between the two architectures and machine types implied by
923 the BFDs and returns a pointer to an <<arch_info>> structure
924 describing the compatible machine.
252b5132
RH
925*/
926
927const bfd_arch_info_type *
c58b9523
AM
928bfd_arch_get_compatible (const bfd *abfd,
929 const bfd *bbfd,
0a1b45a2 930 bool accept_unknowns)
252b5132 931{
d50ec8a7 932 const bfd *ubfd, *kbfd;
312b768e
NC
933
934 /* Look for an unknown architecture. */
d50ec8a7
AM
935 if (abfd->arch_info->arch == bfd_arch_unknown)
936 ubfd = abfd, kbfd = bbfd;
937 else if (bbfd->arch_info->arch == bfd_arch_unknown)
938 ubfd = bbfd, kbfd = abfd;
939 else
940 /* Otherwise architecture-specific code has to decide. */
941 return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info);
942
b986869b
L
943 /* We can allow an unknown architecture if accept_unknowns is true,
944 if UBFD is an IR object, or if the target is the "binary" format,
945 which has an unknown architecture. Since the binary format can
d50ec8a7
AM
946 only be set by explicit request from the user, it is safe
947 to assume that they know what they are doing. */
948 if (accept_unknowns
b986869b 949 || ubfd->plugin_format == bfd_plugin_yes
d50ec8a7
AM
950 || strcmp (bfd_get_target (ubfd), "binary") == 0)
951 return kbfd->arch_info;
952 return NULL;
252b5132
RH
953}
954
252b5132
RH
955/*
956INTERNAL_DEFINITION
957 bfd_default_arch_struct
958
959DESCRIPTION
960 The <<bfd_default_arch_struct>> is an item of
961 <<bfd_arch_info_type>> which has been initialized to a fairly
962 generic state. A BFD starts life by pointing to this
963 structure, until the correct back end has determined the real
964 architecture of the file.
965
966.extern const bfd_arch_info_type bfd_default_arch_struct;
717d4bd6 967.
252b5132
RH
968*/
969
aebcfb76
NC
970const bfd_arch_info_type bfd_default_arch_struct =
971{
0a1b45a2 972 32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, true,
047066e1
KH
973 bfd_default_compatible,
974 bfd_default_scan,
b7761f11 975 bfd_arch_default_fill,
aebcfb76 976 0, 0
252b5132
RH
977};
978
979/*
980FUNCTION
981 bfd_set_arch_info
982
983SYNOPSIS
c58b9523 984 void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
252b5132
RH
985
986DESCRIPTION
987 Set the architecture info of @var{abfd} to @var{arg}.
988*/
989
990void
c58b9523 991bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg)
252b5132
RH
992{
993 abfd->arch_info = arg;
994}
995
996/*
00dad9a4 997FUNCTION
252b5132
RH
998 bfd_default_set_arch_mach
999
1000SYNOPSIS
0a1b45a2 1001 bool bfd_default_set_arch_mach
c58b9523 1002 (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
252b5132
RH
1003
1004DESCRIPTION
1005 Set the architecture and machine type in BFD @var{abfd}
1006 to @var{arch} and @var{mach}. Find the correct
1007 pointer to a structure and insert it into the <<arch_info>>
0ef5a5bd 1008 pointer.
252b5132
RH
1009*/
1010
0a1b45a2 1011bool
c58b9523
AM
1012bfd_default_set_arch_mach (bfd *abfd,
1013 enum bfd_architecture arch,
1014 unsigned long mach)
252b5132 1015{
99dc0092
AM
1016 abfd->arch_info = bfd_lookup_arch (arch, mach);
1017 if (abfd->arch_info != NULL)
0a1b45a2 1018 return true;
252b5132
RH
1019
1020 abfd->arch_info = &bfd_default_arch_struct;
1021 bfd_set_error (bfd_error_bad_value);
0a1b45a2 1022 return false;
252b5132
RH
1023}
1024
252b5132
RH
1025/*
1026FUNCTION
1027 bfd_get_arch
1028
1029SYNOPSIS
01c2b261 1030 enum bfd_architecture bfd_get_arch (const bfd *abfd);
252b5132
RH
1031
1032DESCRIPTION
1033 Return the enumerated type which describes the BFD @var{abfd}'s
1034 architecture.
252b5132
RH
1035*/
1036
1037enum bfd_architecture
01c2b261 1038bfd_get_arch (const bfd *abfd)
252b5132 1039{
047066e1 1040 return abfd->arch_info->arch;
252b5132
RH
1041}
1042
1043/*
1044FUNCTION
1045 bfd_get_mach
1046
1047SYNOPSIS
01c2b261 1048 unsigned long bfd_get_mach (const bfd *abfd);
252b5132
RH
1049
1050DESCRIPTION
1051 Return the long type which describes the BFD @var{abfd}'s
1052 machine.
1053*/
1054
0ef5a5bd 1055unsigned long
01c2b261 1056bfd_get_mach (const bfd *abfd)
252b5132 1057{
047066e1 1058 return abfd->arch_info->mach;
252b5132
RH
1059}
1060
1061/*
1062FUNCTION
1063 bfd_arch_bits_per_byte
1064
1065SYNOPSIS
01c2b261 1066 unsigned int bfd_arch_bits_per_byte (const bfd *abfd);
252b5132
RH
1067
1068DESCRIPTION
1069 Return the number of bits in one of the BFD @var{abfd}'s
1070 architecture's bytes.
252b5132
RH
1071*/
1072
1073unsigned int
01c2b261 1074bfd_arch_bits_per_byte (const bfd *abfd)
252b5132
RH
1075{
1076 return abfd->arch_info->bits_per_byte;
1077}
1078
1079/*
1080FUNCTION
1081 bfd_arch_bits_per_address
1082
1083SYNOPSIS
01c2b261 1084 unsigned int bfd_arch_bits_per_address (const bfd *abfd);
252b5132
RH
1085
1086DESCRIPTION
1087 Return the number of bits in one of the BFD @var{abfd}'s
1088 architecture's addresses.
1089*/
1090
1091unsigned int
01c2b261 1092bfd_arch_bits_per_address (const bfd *abfd)
252b5132
RH
1093{
1094 return abfd->arch_info->bits_per_address;
1095}
1096
252b5132 1097/*
0ef5a5bd 1098INTERNAL_FUNCTION
252b5132
RH
1099 bfd_default_compatible
1100
1101SYNOPSIS
1102 const bfd_arch_info_type *bfd_default_compatible
c58b9523 1103 (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
252b5132
RH
1104
1105DESCRIPTION
1106 The default function for testing for compatibility.
1107*/
1108
1109const bfd_arch_info_type *
c58b9523
AM
1110bfd_default_compatible (const bfd_arch_info_type *a,
1111 const bfd_arch_info_type *b)
252b5132
RH
1112{
1113 if (a->arch != b->arch)
1114 return NULL;
1115
b74fa2cd
AM
1116 if (a->bits_per_word != b->bits_per_word)
1117 return NULL;
1118
252b5132
RH
1119 if (a->mach > b->mach)
1120 return a;
1121
1122 if (b->mach > a->mach)
1123 return b;
1124
1125 return a;
1126}
1127
252b5132
RH
1128/*
1129INTERNAL_FUNCTION
1130 bfd_default_scan
1131
1132SYNOPSIS
0a1b45a2 1133 bool bfd_default_scan
c58b9523 1134 (const struct bfd_arch_info *info, const char *string);
252b5132
RH
1135
1136DESCRIPTION
1137 The default function for working out whether this is an
1138 architecture hit and a machine hit.
1139*/
1140
0a1b45a2 1141bool
c58b9523 1142bfd_default_scan (const bfd_arch_info_type *info, const char *string)
252b5132
RH
1143{
1144 const char *ptr_src;
1145 const char *ptr_tst;
1146 unsigned long number;
1147 enum bfd_architecture arch;
1148 const char *printable_name_colon;
1149
1150 /* Exact match of the architecture name (ARCH_NAME) and also the
047066e1 1151 default architecture? */
252b5132
RH
1152 if (strcasecmp (string, info->arch_name) == 0
1153 && info->the_default)
0a1b45a2 1154 return true;
252b5132 1155
047066e1 1156 /* Exact match of the machine name (PRINTABLE_NAME)? */
252b5132 1157 if (strcasecmp (string, info->printable_name) == 0)
0a1b45a2 1158 return true;
0ef5a5bd 1159
252b5132 1160 /* Given that printable_name contains no colon, attempt to match:
047066e1 1161 ARCH_NAME [ ":" ] PRINTABLE_NAME? */
252b5132
RH
1162 printable_name_colon = strchr (info->printable_name, ':');
1163 if (printable_name_colon == NULL)
1164 {
dc810e39 1165 size_t strlen_arch_name = strlen (info->arch_name);
252b5132
RH
1166 if (strncasecmp (string, info->arch_name, strlen_arch_name) == 0)
1167 {
1168 if (string[strlen_arch_name] == ':')
1169 {
1170 if (strcasecmp (string + strlen_arch_name + 1,
1171 info->printable_name) == 0)
0a1b45a2 1172 return true;
252b5132
RH
1173 }
1174 else
1175 {
1176 if (strcasecmp (string + strlen_arch_name,
1177 info->printable_name) == 0)
0a1b45a2 1178 return true;
252b5132
RH
1179 }
1180 }
1181 }
1182
1183 /* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>;
047066e1 1184 Attempt to match: <arch> <mach>? */
252b5132
RH
1185 if (printable_name_colon != NULL)
1186 {
dc810e39 1187 size_t colon_index = printable_name_colon - info->printable_name;
252b5132
RH
1188 if (strncasecmp (string, info->printable_name, colon_index) == 0
1189 && strcasecmp (string + colon_index,
1190 info->printable_name + colon_index + 1) == 0)
0a1b45a2 1191 return true;
252b5132
RH
1192 }
1193
1194 /* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
5c4491d3 1195 attempt to match just <mach>, it could be ambiguous. This test
0ef5a5bd 1196 is left until later. */
252b5132 1197
047066e1
KH
1198 /* NOTE: The below is retained for compatibility only. Please do
1199 not add to this code. */
252b5132
RH
1200
1201 /* See how much of the supplied string matches with the
1202 architecture, eg the string m68k:68020 would match the 68k entry
047066e1 1203 up to the :, then we get left with the machine number. */
252b5132 1204
0ef5a5bd 1205 for (ptr_src = string, ptr_tst = info->arch_name;
252b5132 1206 *ptr_src && *ptr_tst;
0ef5a5bd 1207 ptr_src++, ptr_tst++)
252b5132 1208 {
047066e1
KH
1209 if (*ptr_src != *ptr_tst)
1210 break;
252b5132
RH
1211 }
1212
1213 /* Chewed up as much of the architecture as will match, skip any
047066e1 1214 colons. */
252b5132
RH
1215 if (*ptr_src == ':')
1216 ptr_src++;
0ef5a5bd 1217
252b5132
RH
1218 if (*ptr_src == 0)
1219 {
047066e1
KH
1220 /* Nothing more, then only keep this one if it is the default
1221 machine for this architecture. */
252b5132
RH
1222 return info->the_default;
1223 }
1224
1225 number = 0;
3882b010 1226 while (ISDIGIT (*ptr_src))
252b5132 1227 {
047066e1 1228 number = number * 10 + *ptr_src - '0';
252b5132
RH
1229 ptr_src++;
1230 }
1231
1232 /* NOTE: The below is retained for compatibility only.
0ef5a5bd 1233 PLEASE DO NOT ADD TO THIS CODE. */
252b5132 1234
0ef5a5bd 1235 switch (number)
252b5132 1236 {
0ef5a5bd 1237 case 68000:
252b5132
RH
1238 arch = bfd_arch_m68k;
1239 number = bfd_mach_m68000;
1240 break;
1241 case 68010:
1242 arch = bfd_arch_m68k;
1243 number = bfd_mach_m68010;
1244 break;
1245 case 68020:
1246 arch = bfd_arch_m68k;
1247 number = bfd_mach_m68020;
1248 break;
1249 case 68030:
1250 arch = bfd_arch_m68k;
1251 number = bfd_mach_m68030;
1252 break;
1253 case 68040:
1254 arch = bfd_arch_m68k;
1255 number = bfd_mach_m68040;
1256 break;
1257 case 68060:
1258 arch = bfd_arch_m68k;
1259 number = bfd_mach_m68060;
1260 break;
1261 case 68332:
1262 arch = bfd_arch_m68k;
1263 number = bfd_mach_cpu32;
1264 break;
3cac17ae
NC
1265 case 5200:
1266 arch = bfd_arch_m68k;
0b2e31dc 1267 number = bfd_mach_mcf_isa_a_nodiv;
3cac17ae
NC
1268 break;
1269 case 5206:
1270 arch = bfd_arch_m68k;
0b2e31dc 1271 number = bfd_mach_mcf_isa_a_mac;
3cac17ae
NC
1272 break;
1273 case 5307:
1274 arch = bfd_arch_m68k;
0b2e31dc 1275 number = bfd_mach_mcf_isa_a_mac;
3cac17ae
NC
1276 break;
1277 case 5407:
1278 arch = bfd_arch_m68k;
0b2e31dc 1279 number = bfd_mach_mcf_isa_b_nousp_mac;
3cac17ae 1280 break;
3e602632
NC
1281 case 5282:
1282 arch = bfd_arch_m68k;
0b2e31dc 1283 number = bfd_mach_mcf_isa_aplus_emac;
3e602632 1284 break;
252b5132 1285
252b5132
RH
1286 case 3000:
1287 arch = bfd_arch_mips;
1288 number = bfd_mach_mips3000;
1289 break;
1290
1291 case 4000:
1292 arch = bfd_arch_mips;
1293 number = bfd_mach_mips4000;
1294 break;
1295
1296 case 6000:
1297 arch = bfd_arch_rs6000;
1298 break;
1299
d4845d57
JR
1300 case 7410:
1301 arch = bfd_arch_sh;
1302 number = bfd_mach_sh_dsp;
1303 break;
1304
1305 case 7708:
1306 arch = bfd_arch_sh;
1307 number = bfd_mach_sh3;
1308 break;
1309
1310 case 7729:
1311 arch = bfd_arch_sh;
1312 number = bfd_mach_sh3_dsp;
1313 break;
1314
1315 case 7750:
1316 arch = bfd_arch_sh;
1317 number = bfd_mach_sh4;
1318 break;
1319
0ef5a5bd 1320 default:
0a1b45a2 1321 return false;
252b5132
RH
1322 }
1323
0ef5a5bd 1324 if (arch != info->arch)
0a1b45a2 1325 return false;
252b5132
RH
1326
1327 if (number != info->mach)
0a1b45a2 1328 return false;
252b5132 1329
0a1b45a2 1330 return true;
252b5132
RH
1331}
1332
252b5132
RH
1333/*
1334FUNCTION
1335 bfd_get_arch_info
1336
1337SYNOPSIS
c58b9523 1338 const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
252b5132
RH
1339
1340DESCRIPTION
1341 Return the architecture info struct in @var{abfd}.
1342*/
1343
1344const bfd_arch_info_type *
c58b9523 1345bfd_get_arch_info (bfd *abfd)
252b5132
RH
1346{
1347 return abfd->arch_info;
1348}
1349
252b5132
RH
1350/*
1351FUNCTION
1352 bfd_lookup_arch
1353
1354SYNOPSIS
1355 const bfd_arch_info_type *bfd_lookup_arch
c58b9523 1356 (enum bfd_architecture arch, unsigned long machine);
252b5132
RH
1357
1358DESCRIPTION
5c4491d3 1359 Look for the architecture info structure which matches the
252b5132
RH
1360 arguments @var{arch} and @var{machine}. A machine of 0 matches the
1361 machine/architecture structure which marks itself as the
aa3d5824 1362 default.
252b5132
RH
1363*/
1364
0ef5a5bd 1365const bfd_arch_info_type *
c58b9523 1366bfd_lookup_arch (enum bfd_architecture arch, unsigned long machine)
252b5132
RH
1367{
1368 const bfd_arch_info_type * const *app, *ap;
1369
1370 for (app = bfd_archures_list; *app != NULL; app++)
1371 {
1372 for (ap = *app; ap != NULL; ap = ap->next)
1373 {
1374 if (ap->arch == arch
1375 && (ap->mach == machine
1376 || (machine == 0 && ap->the_default)))
1377 return ap;
1378 }
1379 }
1380
1381 return NULL;
1382}
1383
252b5132
RH
1384/*
1385FUNCTION
1386 bfd_printable_arch_mach
1387
1388SYNOPSIS
1389 const char *bfd_printable_arch_mach
c58b9523 1390 (enum bfd_architecture arch, unsigned long machine);
252b5132
RH
1391
1392DESCRIPTION
1393 Return a printable string representing the architecture and
0ef5a5bd 1394 machine type.
252b5132
RH
1395
1396 This routine is depreciated.
1397*/
1398
1399const char *
c58b9523 1400bfd_printable_arch_mach (enum bfd_architecture arch, unsigned long machine)
252b5132 1401{
047066e1 1402 const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
252b5132 1403
047066e1
KH
1404 if (ap)
1405 return ap->printable_name;
1406 return "UNKNOWN!";
252b5132 1407}
9a968f43
NC
1408
1409/*
1410FUNCTION
1411 bfd_octets_per_byte
1412
1413SYNOPSIS
61826503
CE
1414 unsigned int bfd_octets_per_byte (const bfd *abfd,
1415 const asection *sec);
9a968f43
NC
1416
1417DESCRIPTION
1418 Return the number of octets (8-bit quantities) per target byte
07d6d2b8
AM
1419 (minimum addressable unit). In most cases, this will be one, but some
1420 DSP targets have 16, 32, or even 48 bits per byte.
9a968f43
NC
1421*/
1422
f6af82bd 1423unsigned int
61826503 1424bfd_octets_per_byte (const bfd *abfd, const asection *sec)
9a968f43 1425{
61826503
CE
1426 if (bfd_get_flavour (abfd) == bfd_target_elf_flavour
1427 && sec != NULL
1428 && (sec->flags & SEC_ELF_OCTETS) != 0)
bb294208 1429 return 1;
61826503 1430
bb294208
AM
1431 return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
1432 bfd_get_mach (abfd));
9a968f43
NC
1433}
1434
1435/*
1436FUNCTION
1437 bfd_arch_mach_octets_per_byte
1438
1439SYNOPSIS
c58b9523
AM
1440 unsigned int bfd_arch_mach_octets_per_byte
1441 (enum bfd_architecture arch, unsigned long machine);
9a968f43
NC
1442
1443DESCRIPTION
1444 See bfd_octets_per_byte.
0ef5a5bd 1445
07d6d2b8
AM
1446 This routine is provided for those cases where a bfd * is not
1447 available
9a968f43
NC
1448*/
1449
f6af82bd 1450unsigned int
c58b9523
AM
1451bfd_arch_mach_octets_per_byte (enum bfd_architecture arch,
1452 unsigned long mach)
9a968f43 1453{
047066e1 1454 const bfd_arch_info_type *ap = bfd_lookup_arch (arch, mach);
0ef5a5bd 1455
047066e1
KH
1456 if (ap)
1457 return ap->bits_per_byte / 8;
1458 return 1;
9a968f43 1459}
b7761f11
L
1460
1461/*
1462INTERNAL_FUNCTION
1463 bfd_arch_default_fill
1464
1465SYNOPSIS
1466 void *bfd_arch_default_fill (bfd_size_type count,
0a1b45a2
AM
1467 bool is_bigendian,
1468 bool code);
b7761f11
L
1469
1470DESCRIPTION
1471 Allocate via bfd_malloc and return a fill buffer of size COUNT.
1472 If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If
1473 CODE is TRUE, the buffer contains code.
1474*/
1475
1476void *
1477bfd_arch_default_fill (bfd_size_type count,
0a1b45a2
AM
1478 bool is_bigendian ATTRIBUTE_UNUSED,
1479 bool code ATTRIBUTE_UNUSED)
b7761f11
L
1480{
1481 void *fill = bfd_malloc (count);
1482 if (fill != NULL)
1483 memset (fill, 0, count);
1484 return fill;
1485}
d00dd7dc 1486
0a1b45a2 1487bool
d00dd7dc
AM
1488_bfd_nowrite_set_arch_mach (bfd *abfd,
1489 enum bfd_architecture arch ATTRIBUTE_UNUSED,
1490 unsigned long mach ATTRIBUTE_UNUSED)
1491{
1492 return _bfd_bool_bfd_false_error (abfd);
1493}