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252b5132 1/* Matsushita 10200 specific support for 32-bit ELF
d87bef3a 2 Copyright (C) 1996-2023 Free Software Foundation, Inc.
252b5132 3
cd123cb7 4 This file is part of BFD, the Binary File Descriptor library.
252b5132 5
cd123cb7
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
252b5132 10
cd123cb7
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
cd123cb7
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
252b5132 21#include "sysdep.h"
3db64b00 22#include "bfd.h"
252b5132
RH
23#include "libbfd.h"
24#include "elf-bfd.h"
25
0a1b45a2 26static bool
2c3fc389 27mn10200_elf_relax_delete_bytes (bfd *, asection *, bfd_vma, int);
0a1b45a2 28static bool
2c3fc389
NC
29mn10200_elf_symbol_address_p (bfd *, asection *, Elf_Internal_Sym *, bfd_vma);
30
31enum reloc_type
32{
252b5132
RH
33 R_MN10200_NONE = 0,
34 R_MN10200_32,
35 R_MN10200_16,
36 R_MN10200_8,
37 R_MN10200_24,
38 R_MN10200_PCREL8,
39 R_MN10200_PCREL16,
40 R_MN10200_PCREL24,
41 R_MN10200_MAX
42};
43
2c3fc389
NC
44static reloc_howto_type elf_mn10200_howto_table[] =
45{
252b5132
RH
46 /* Dummy relocation. Does nothing. */
47 HOWTO (R_MN10200_NONE,
48 0,
c94cb026 49 0,
6346d5ca 50 0,
0a1b45a2 51 false,
252b5132 52 0,
6346d5ca 53 complain_overflow_dont,
252b5132
RH
54 bfd_elf_generic_reloc,
55 "R_MN10200_NONE",
0a1b45a2 56 false,
252b5132
RH
57 0,
58 0,
0a1b45a2 59 false),
252b5132
RH
60 /* Standard 32 bit reloc. */
61 HOWTO (R_MN10200_32,
62 0,
c94cb026 63 4,
252b5132 64 32,
0a1b45a2 65 false,
252b5132
RH
66 0,
67 complain_overflow_bitfield,
68 bfd_elf_generic_reloc,
69 "R_MN10200_32",
0a1b45a2 70 false,
252b5132
RH
71 0xffffffff,
72 0xffffffff,
0a1b45a2 73 false),
252b5132
RH
74 /* Standard 16 bit reloc. */
75 HOWTO (R_MN10200_16,
76 0,
c94cb026 77 2,
252b5132 78 16,
0a1b45a2 79 false,
252b5132
RH
80 0,
81 complain_overflow_bitfield,
82 bfd_elf_generic_reloc,
83 "R_MN10200_16",
0a1b45a2 84 false,
252b5132
RH
85 0xffff,
86 0xffff,
0a1b45a2 87 false),
252b5132
RH
88 /* Standard 8 bit reloc. */
89 HOWTO (R_MN10200_8,
90 0,
c94cb026 91 1,
252b5132 92 8,
0a1b45a2 93 false,
252b5132
RH
94 0,
95 complain_overflow_bitfield,
96 bfd_elf_generic_reloc,
97 "R_MN10200_8",
0a1b45a2 98 false,
252b5132
RH
99 0xff,
100 0xff,
0a1b45a2 101 false),
252b5132
RH
102 /* Standard 24 bit reloc. */
103 HOWTO (R_MN10200_24,
104 0,
c94cb026 105 4,
252b5132 106 24,
0a1b45a2 107 false,
252b5132
RH
108 0,
109 complain_overflow_bitfield,
110 bfd_elf_generic_reloc,
111 "R_MN10200_24",
0a1b45a2 112 false,
252b5132
RH
113 0xffffff,
114 0xffffff,
0a1b45a2 115 false),
252b5132
RH
116 /* Simple 8 pc-relative reloc. */
117 HOWTO (R_MN10200_PCREL8,
118 0,
c94cb026 119 1,
252b5132 120 8,
0a1b45a2 121 true,
252b5132
RH
122 0,
123 complain_overflow_bitfield,
124 bfd_elf_generic_reloc,
125 "R_MN10200_PCREL8",
0a1b45a2 126 false,
252b5132
RH
127 0xff,
128 0xff,
0a1b45a2 129 true),
252b5132
RH
130 /* Simple 16 pc-relative reloc. */
131 HOWTO (R_MN10200_PCREL16,
132 0,
c94cb026 133 2,
252b5132 134 16,
0a1b45a2 135 true,
252b5132
RH
136 0,
137 complain_overflow_bitfield,
138 bfd_elf_generic_reloc,
139 "R_MN10200_PCREL16",
0a1b45a2 140 false,
252b5132
RH
141 0xffff,
142 0xffff,
0a1b45a2 143 true),
252b5132
RH
144 /* Simple 32bit pc-relative reloc with a 1 byte adjustment
145 to get the pc-relative offset correct. */
146 HOWTO (R_MN10200_PCREL24,
147 0,
c94cb026 148 4,
252b5132 149 24,
0a1b45a2 150 true,
252b5132
RH
151 0,
152 complain_overflow_bitfield,
153 bfd_elf_generic_reloc,
154 "R_MN10200_PCREL24",
0a1b45a2 155 false,
252b5132
RH
156 0xffffff,
157 0xffffff,
0a1b45a2 158 true),
252b5132
RH
159};
160
2c3fc389
NC
161struct mn10200_reloc_map
162{
252b5132
RH
163 bfd_reloc_code_real_type bfd_reloc_val;
164 unsigned char elf_reloc_val;
165};
166
2c3fc389
NC
167static const struct mn10200_reloc_map mn10200_reloc_map[] =
168{
27def10f
KH
169 { BFD_RELOC_NONE , R_MN10200_NONE , },
170 { BFD_RELOC_32 , R_MN10200_32 , },
171 { BFD_RELOC_16 , R_MN10200_16 , },
172 { BFD_RELOC_8 , R_MN10200_8 , },
173 { BFD_RELOC_24 , R_MN10200_24 , },
174 { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , },
252b5132
RH
175 { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, },
176 { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, },
177};
178
179static reloc_howto_type *
2c3fc389
NC
180bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
181 bfd_reloc_code_real_type code)
252b5132
RH
182{
183 unsigned int i;
184
185 for (i = 0;
186 i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map);
187 i++)
188 {
189 if (mn10200_reloc_map[i].bfd_reloc_val == code)
190 return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val];
191 }
192
193 return NULL;
194}
195
157090f7
AM
196static reloc_howto_type *
197bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
198 const char *r_name)
199{
200 unsigned int i;
201
202 for (i = 0;
203 i < (sizeof (elf_mn10200_howto_table)
204 / sizeof (elf_mn10200_howto_table[0]));
205 i++)
206 if (elf_mn10200_howto_table[i].name != NULL
207 && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0)
208 return &elf_mn10200_howto_table[i];
209
210 return NULL;
211}
212
252b5132
RH
213/* Set the howto pointer for an MN10200 ELF reloc. */
214
0a1b45a2 215static bool
f3185997 216mn10200_info_to_howto (bfd *abfd,
2c3fc389
NC
217 arelent *cache_ptr,
218 Elf_Internal_Rela *dst)
252b5132
RH
219{
220 unsigned int r_type;
221
222 r_type = ELF32_R_TYPE (dst->r_info);
f3185997
NC
223 if (r_type >= (unsigned int) R_MN10200_MAX)
224 {
225 /* xgettext:c-format */
226 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
227 abfd, r_type);
228 bfd_set_error (bfd_error_bad_value);
0a1b45a2 229 return false;
f3185997 230 }
4b24dd1a 231
252b5132 232 cache_ptr->howto = &elf_mn10200_howto_table[r_type];
f3185997 233 return cache_ptr->howto != NULL;
252b5132
RH
234}
235
236/* Perform a relocation as part of a final link. */
917583ad 237
252b5132 238static bfd_reloc_status_type
2c3fc389
NC
239mn10200_elf_final_link_relocate (reloc_howto_type *howto,
240 bfd *input_bfd,
241 bfd *output_bfd ATTRIBUTE_UNUSED,
242 asection *input_section,
243 bfd_byte *contents,
244 bfd_vma offset,
245 bfd_vma value,
246 bfd_vma addend,
247 struct bfd_link_info *info ATTRIBUTE_UNUSED,
248 asection *sym_sec ATTRIBUTE_UNUSED,
249 int is_local ATTRIBUTE_UNUSED)
252b5132
RH
250{
251 unsigned long r_type = howto->type;
252 bfd_byte *hit_data = contents + offset;
253
254 switch (r_type)
255 {
256
257 case R_MN10200_NONE:
258 return bfd_reloc_ok;
259
260 case R_MN10200_32:
261 value += addend;
262 bfd_put_32 (input_bfd, value, hit_data);
263 return bfd_reloc_ok;
264
265 case R_MN10200_16:
266 value += addend;
267
27def10f 268 if ((long) value > 0x7fff || (long) value < -0x8000)
252b5132
RH
269 return bfd_reloc_overflow;
270
271 bfd_put_16 (input_bfd, value, hit_data);
272 return bfd_reloc_ok;
273
274 case R_MN10200_8:
275 value += addend;
276
27def10f 277 if ((long) value > 0x7f || (long) value < -0x80)
252b5132
RH
278 return bfd_reloc_overflow;
279
280 bfd_put_8 (input_bfd, value, hit_data);
281 return bfd_reloc_ok;
282
283 case R_MN10200_24:
284 value += addend;
285
27def10f 286 if ((long) value > 0x7fffff || (long) value < -0x800000)
252b5132
RH
287 return bfd_reloc_overflow;
288
289 value &= 0xffffff;
290 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
291 bfd_put_32 (input_bfd, value, hit_data);
292 return bfd_reloc_ok;
293
294 case R_MN10200_PCREL8:
295 value -= (input_section->output_section->vma
296 + input_section->output_offset);
297 value -= (offset + 1);
298 value += addend;
299
27def10f
KH
300 if ((long) value > 0xff || (long) value < -0x100)
301 return bfd_reloc_overflow;
252b5132
RH
302
303 bfd_put_8 (input_bfd, value, hit_data);
304 return bfd_reloc_ok;
305
306 case R_MN10200_PCREL16:
307 value -= (input_section->output_section->vma
308 + input_section->output_offset);
309 value -= (offset + 2);
310 value += addend;
311
27def10f
KH
312 if ((long) value > 0xffff || (long) value < -0x10000)
313 return bfd_reloc_overflow;
252b5132
RH
314
315 bfd_put_16 (input_bfd, value, hit_data);
316 return bfd_reloc_ok;
317
318 case R_MN10200_PCREL24:
319 value -= (input_section->output_section->vma
320 + input_section->output_offset);
321 value -= (offset + 3);
322 value += addend;
323
27def10f
KH
324 if ((long) value > 0xffffff || (long) value < -0x1000000)
325 return bfd_reloc_overflow;
252b5132
RH
326
327 value &= 0xffffff;
328 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
329 bfd_put_32 (input_bfd, value, hit_data);
330 return bfd_reloc_ok;
331
332 default:
333 return bfd_reloc_notsupported;
334 }
335}
252b5132
RH
336\f
337/* Relocate an MN10200 ELF section. */
0f684201 338static int
2c3fc389
NC
339mn10200_elf_relocate_section (bfd *output_bfd,
340 struct bfd_link_info *info,
341 bfd *input_bfd,
342 asection *input_section,
343 bfd_byte *contents,
344 Elf_Internal_Rela *relocs,
345 Elf_Internal_Sym *local_syms,
346 asection **local_sections)
252b5132
RH
347{
348 Elf_Internal_Shdr *symtab_hdr;
349 struct elf_link_hash_entry **sym_hashes;
350 Elf_Internal_Rela *rel, *relend;
351
352 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
353 sym_hashes = elf_sym_hashes (input_bfd);
354
355 rel = relocs;
356 relend = relocs + input_section->reloc_count;
357 for (; rel < relend; rel++)
358 {
359 int r_type;
360 reloc_howto_type *howto;
361 unsigned long r_symndx;
362 Elf_Internal_Sym *sym;
363 asection *sec;
364 struct elf_link_hash_entry *h;
365 bfd_vma relocation;
366 bfd_reloc_status_type r;
367
368 r_symndx = ELF32_R_SYM (rel->r_info);
369 r_type = ELF32_R_TYPE (rel->r_info);
370 howto = elf_mn10200_howto_table + r_type;
371
252b5132
RH
372 h = NULL;
373 sym = NULL;
374 sec = NULL;
375 if (r_symndx < symtab_hdr->sh_info)
376 {
377 sym = local_syms + r_symndx;
378 sec = local_sections[r_symndx];
8517fae7 379 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
380 }
381 else
382 {
0a1b45a2 383 bool unresolved_reloc, warned, ignored;
59c2e50f 384
b2a8e766
AM
385 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
386 r_symndx, symtab_hdr, sym_hashes,
387 h, sec, relocation,
62d887d4 388 unresolved_reloc, warned, ignored);
252b5132
RH
389 }
390
dbaa2011 391 if (sec != NULL && discarded_section (sec))
e4067dbb 392 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 393 rel, 1, relend, howto, 0, contents);
ab96bf03 394
0e1862bb 395 if (bfd_link_relocatable (info))
ab96bf03
AM
396 continue;
397
252b5132
RH
398 r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
399 input_section,
400 contents, rel->r_offset,
401 relocation, rel->r_addend,
402 info, sec, h == NULL);
403
404 if (r != bfd_reloc_ok)
405 {
406 const char *name;
27def10f 407 const char *msg = (const char *) 0;
252b5132
RH
408
409 if (h != NULL)
410 name = h->root.root.string;
411 else
412 {
413 name = (bfd_elf_string_from_elf_section
414 (input_bfd, symtab_hdr->sh_link, sym->st_name));
415 if (name == NULL || *name == '\0')
fd361982 416 name = bfd_section_name (sec);
252b5132
RH
417 }
418
419 switch (r)
420 {
421 case bfd_reloc_overflow:
1a72702b
AM
422 (*info->callbacks->reloc_overflow)
423 (info, (h ? &h->root : NULL), name, howto->name,
424 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
252b5132
RH
425 break;
426
427 case bfd_reloc_undefined:
1a72702b
AM
428 (*info->callbacks->undefined_symbol) (info, name, input_bfd,
429 input_section,
0a1b45a2 430 rel->r_offset, true);
252b5132
RH
431 break;
432
433 case bfd_reloc_outofrange:
434 msg = _("internal error: out of range error");
435 goto common_error;
436
437 case bfd_reloc_notsupported:
438 msg = _("internal error: unsupported relocation error");
439 goto common_error;
440
441 case bfd_reloc_dangerous:
442 msg = _("internal error: dangerous error");
443 goto common_error;
444
445 default:
446 msg = _("internal error: unknown error");
447 /* fall through */
448
449 common_error:
1a72702b
AM
450 (*info->callbacks->warning) (info, msg, name, input_bfd,
451 input_section, rel->r_offset);
252b5132
RH
452 break;
453 }
454 }
455 }
456
0a1b45a2 457 return true;
252b5132
RH
458}
459
2c3fc389
NC
460/* Delete some bytes from a section while relaxing. */
461
0a1b45a2 462static bool
2c3fc389
NC
463mn10200_elf_relax_delete_bytes (bfd *abfd, asection *sec,
464 bfd_vma addr, int count)
465{
466 Elf_Internal_Shdr *symtab_hdr;
467 unsigned int sec_shndx;
468 bfd_byte *contents;
469 Elf_Internal_Rela *irel, *irelend;
470 bfd_vma toaddr;
471 Elf_Internal_Sym *isym;
472 Elf_Internal_Sym *isymend;
473 struct elf_link_hash_entry **sym_hashes;
474 struct elf_link_hash_entry **end_hashes;
475 unsigned int symcount;
476
477 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
478
479 contents = elf_section_data (sec)->this_hdr.contents;
480
481 toaddr = sec->size;
482
483 irel = elf_section_data (sec)->relocs;
484 irelend = irel + sec->reloc_count;
485
486 /* Actually delete the bytes. */
487 memmove (contents + addr, contents + addr + count,
488 (size_t) (toaddr - addr - count));
489 sec->size -= count;
490
491 /* Adjust all the relocs. */
492 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
493 {
494 /* Get the new reloc address. */
495 if ((irel->r_offset > addr
496 && irel->r_offset < toaddr))
497 irel->r_offset -= count;
498 }
499
500 /* Adjust the local symbols defined in this section. */
501 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
502 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
503 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
504 {
505 if (isym->st_shndx == sec_shndx
506 && isym->st_value > addr
507 && isym->st_value < toaddr)
508 isym->st_value -= count;
509 }
510
511 /* Now adjust the global symbols defined in this section. */
512 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
513 - symtab_hdr->sh_info);
514 sym_hashes = elf_sym_hashes (abfd);
515 end_hashes = sym_hashes + symcount;
516 for (; sym_hashes < end_hashes; sym_hashes++)
517 {
518 struct elf_link_hash_entry *sym_hash = *sym_hashes;
519 if ((sym_hash->root.type == bfd_link_hash_defined
520 || sym_hash->root.type == bfd_link_hash_defweak)
521 && sym_hash->root.u.def.section == sec
522 && sym_hash->root.u.def.value > addr
523 && sym_hash->root.u.def.value < toaddr)
524 {
525 sym_hash->root.u.def.value -= count;
526 }
527 }
528
0a1b45a2 529 return true;
2c3fc389
NC
530}
531
252b5132
RH
532/* This function handles relaxing for the mn10200.
533
4cc11e76 534 There are quite a few relaxing opportunities available on the mn10200:
252b5132 535
07d6d2b8 536 * jsr:24 -> jsr:16 2 bytes
252b5132
RH
537
538 * jmp:24 -> jmp:16 2 bytes
539 * jmp:16 -> bra:8 1 byte
540
541 * If the previous instruction is a conditional branch
542 around the jump/bra, we may be able to reverse its condition
543 and change its target to the jump's target. The jump/bra
544 can then be deleted. 2 bytes
545
546 * mov abs24 -> mov abs16 2 byte savings
547
548 * Most instructions which accept imm24 can relax to imm16 2 bytes
549 - Most instructions which accept imm16 can relax to imm8 1 byte
550
551 * Most instructions which accept d24 can relax to d16 2 bytes
552 - Most instructions which accept d16 can relax to d8 1 byte
553
554 abs24, imm24, d24 all look the same at the reloc level. It
555 might make the code simpler if we had different relocs for
556 the various relaxable operand types.
a7c10850 557
252b5132
RH
558 We don't handle imm16->imm8 or d16->d8 as they're very rare
559 and somewhat more difficult to support. */
560
0a1b45a2 561static bool
2c3fc389
NC
562mn10200_elf_relax_section (bfd *abfd,
563 asection *sec,
564 struct bfd_link_info *link_info,
0a1b45a2 565 bool *again)
252b5132
RH
566{
567 Elf_Internal_Shdr *symtab_hdr;
568 Elf_Internal_Rela *internal_relocs;
252b5132
RH
569 Elf_Internal_Rela *irel, *irelend;
570 bfd_byte *contents = NULL;
6cdc0ccc 571 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
572
573 /* Assume nothing changes. */
0a1b45a2 574 *again = false;
252b5132 575
1049f94e 576 /* We don't have to do anything for a relocatable link, if
252b5132
RH
577 this section does not have relocs, or if this is not a
578 code section. */
0e1862bb 579 if (bfd_link_relocatable (link_info)
252b5132
RH
580 || (sec->flags & SEC_RELOC) == 0
581 || sec->reloc_count == 0
582 || (sec->flags & SEC_CODE) == 0)
0a1b45a2 583 return true;
252b5132 584
252b5132
RH
585 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
586
587 /* Get a copy of the native relocations. */
45d6a902 588 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 589 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
252b5132
RH
590 link_info->keep_memory));
591 if (internal_relocs == NULL)
592 goto error_return;
252b5132
RH
593
594 /* Walk through them looking for relaxing opportunities. */
595 irelend = internal_relocs + sec->reloc_count;
596 for (irel = internal_relocs; irel < irelend; irel++)
597 {
598 bfd_vma symval;
599
600 /* If this isn't something that can be relaxed, then ignore
601 this reloc. */
602 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE
603 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8
604 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX)
605 continue;
606
607 /* Get the section contents if we haven't done so already. */
608 if (contents == NULL)
609 {
610 /* Get cached copy if it exists. */
611 if (elf_section_data (sec)->this_hdr.contents != NULL)
612 contents = elf_section_data (sec)->this_hdr.contents;
613 else
614 {
615 /* Go get them off disk. */
eea6121a 616 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
617 goto error_return;
618 }
619 }
620
6cdc0ccc
AM
621 /* Read this BFD's local symbols if we haven't done so already. */
622 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
252b5132 623 {
6cdc0ccc
AM
624 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
625 if (isymbuf == NULL)
626 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
627 symtab_hdr->sh_info, 0,
628 NULL, NULL, NULL);
629 if (isymbuf == NULL)
630 goto error_return;
252b5132
RH
631 }
632
633 /* Get the value of the symbol referred to by the reloc. */
634 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
635 {
9ad5cbcf 636 /* A local symbol. */
6cdc0ccc 637 Elf_Internal_Sym *isym;
252b5132
RH
638 asection *sym_sec;
639
6cdc0ccc
AM
640 isym = isymbuf + ELF32_R_SYM (irel->r_info);
641 if (isym->st_shndx == SHN_UNDEF)
9ad5cbcf 642 sym_sec = bfd_und_section_ptr;
6cdc0ccc 643 else if (isym->st_shndx == SHN_ABS)
9ad5cbcf 644 sym_sec = bfd_abs_section_ptr;
6cdc0ccc 645 else if (isym->st_shndx == SHN_COMMON)
9ad5cbcf
AM
646 sym_sec = bfd_com_section_ptr;
647 else
6cdc0ccc
AM
648 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
649 symval = (isym->st_value
252b5132
RH
650 + sym_sec->output_section->vma
651 + sym_sec->output_offset);
652 }
653 else
654 {
655 unsigned long indx;
656 struct elf_link_hash_entry *h;
657
658 /* An external symbol. */
659 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
660 h = elf_sym_hashes (abfd)[indx];
661 BFD_ASSERT (h != NULL);
662 if (h->root.type != bfd_link_hash_defined
663 && h->root.type != bfd_link_hash_defweak)
664 {
665 /* This appears to be a reference to an undefined
07d6d2b8
AM
666 symbol. Just ignore it--it will be caught by the
667 regular reloc processing. */
252b5132
RH
668 continue;
669 }
670
671 symval = (h->root.u.def.value
672 + h->root.u.def.section->output_section->vma
673 + h->root.u.def.section->output_offset);
674 }
675
676 /* For simplicity of coding, we are going to modify the section
677 contents, the section relocs, and the BFD symbol table. We
678 must tell the rest of the code not to free up this
679 information. It would be possible to instead create a table
680 of changes which have to be made, as is done in coff-mips.c;
681 that would be more work, but would require less memory when
682 the linker is run. */
683
252b5132
RH
684 /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative
685 branch/call. */
686 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24)
687 {
688 bfd_vma value = symval;
689
690 /* Deal with pc-relative gunk. */
691 value -= (sec->output_section->vma + sec->output_offset);
692 value -= (irel->r_offset + 3);
693 value += irel->r_addend;
694
695 /* See if the value will fit in 16 bits, note the high value is
696 0x7fff + 2 as the target will be two bytes closer if we are
697 able to relax. */
27def10f 698 if ((long) value < 0x8001 && (long) value > -0x8000)
252b5132
RH
699 {
700 unsigned char code;
701
702 /* Get the opcode. */
703 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
704
705 if (code != 0xe0 && code != 0xe1)
706 continue;
707
708 /* Note that we've changed the relocs, section contents, etc. */
709 elf_section_data (sec)->relocs = internal_relocs;
252b5132 710 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 711 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
712
713 /* Fix the opcode. */
714 if (code == 0xe0)
715 bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2);
716 else if (code == 0xe1)
717 bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2);
718
719 /* Fix the relocation's type. */
720 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
721 R_MN10200_PCREL16);
722
723 /* The opcode got shorter too, so we have to fix the offset. */
724 irel->r_offset -= 1;
725
726 /* Delete two bytes of data. */
727 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
728 irel->r_offset + 1, 2))
729 goto error_return;
730
731 /* That will change things, so, we should relax again.
732 Note that this is not required, and it may be slow. */
0a1b45a2 733 *again = true;
252b5132
RH
734 }
735 }
736
737 /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative
738 branch. */
739 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16)
740 {
741 bfd_vma value = symval;
742
743 /* Deal with pc-relative gunk. */
744 value -= (sec->output_section->vma + sec->output_offset);
745 value -= (irel->r_offset + 2);
746 value += irel->r_addend;
747
748 /* See if the value will fit in 8 bits, note the high value is
749 0x7f + 1 as the target will be one bytes closer if we are
750 able to relax. */
27def10f 751 if ((long) value < 0x80 && (long) value > -0x80)
252b5132
RH
752 {
753 unsigned char code;
754
755 /* Get the opcode. */
756 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
757
758 if (code != 0xfc)
759 continue;
760
761 /* Note that we've changed the relocs, section contents, etc. */
762 elf_section_data (sec)->relocs = internal_relocs;
252b5132 763 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 764 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
765
766 /* Fix the opcode. */
767 bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1);
768
769 /* Fix the relocation's type. */
770 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
771 R_MN10200_PCREL8);
772
773 /* Delete one byte of data. */
774 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
775 irel->r_offset + 1, 1))
776 goto error_return;
777
778 /* That will change things, so, we should relax again.
779 Note that this is not required, and it may be slow. */
0a1b45a2 780 *again = true;
252b5132
RH
781 }
782 }
783
784 /* Try to eliminate an unconditional 8 bit pc-relative branch
785 which immediately follows a conditional 8 bit pc-relative
786 branch around the unconditional branch.
787
788 original: new:
789 bCC lab1 bCC' lab2
790 bra lab2
791 lab1: lab1:
792
252b5132
RH
793 This happens when the bCC can't reach lab2 at assembly time,
794 but due to other relaxations it can reach at link time. */
795 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8)
796 {
797 Elf_Internal_Rela *nrel;
252b5132
RH
798 unsigned char code;
799
252b5132 800 /* Do nothing if this reloc is the last byte in the section. */
eea6121a 801 if (irel->r_offset == sec->size)
252b5132
RH
802 continue;
803
804 /* See if the next instruction is an unconditional pc-relative
805 branch, more often than not this test will fail, so we
806 test it first to speed things up. */
807 code = bfd_get_8 (abfd, contents + irel->r_offset + 1);
808 if (code != 0xea)
809 continue;
810
811 /* Also make sure the next relocation applies to the next
812 instruction and that it's a pc-relative 8 bit branch. */
813 nrel = irel + 1;
814 if (nrel == irelend
815 || irel->r_offset + 2 != nrel->r_offset
816 || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8)
817 continue;
818
819 /* Make sure our destination immediately follows the
820 unconditional branch. */
821 if (symval != (sec->output_section->vma + sec->output_offset
822 + irel->r_offset + 3))
823 continue;
824
825 /* Now make sure we are a conditional branch. This may not
a7c10850 826 be necessary, but why take the chance.
252b5132
RH
827
828 Note these checks assume that R_MN10200_PCREL8 relocs
829 only occur on bCC and bCCx insns. If they occured
830 elsewhere, we'd need to know the start of this insn
831 for this check to be accurate. */
832 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
833 if (code != 0xe0 && code != 0xe1 && code != 0xe2
834 && code != 0xe3 && code != 0xe4 && code != 0xe5
835 && code != 0xe6 && code != 0xe7 && code != 0xe8
836 && code != 0xe9 && code != 0xec && code != 0xed
837 && code != 0xee && code != 0xef && code != 0xfc
838 && code != 0xfd && code != 0xfe && code != 0xff)
839 continue;
840
841 /* We also have to be sure there is no symbol/label
842 at the unconditional branch. */
6cdc0ccc
AM
843 if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf,
844 irel->r_offset + 1))
252b5132
RH
845 continue;
846
847 /* Note that we've changed the relocs, section contents, etc. */
848 elf_section_data (sec)->relocs = internal_relocs;
252b5132 849 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 850 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
851
852 /* Reverse the condition of the first branch. */
853 switch (code)
854 {
27def10f
KH
855 case 0xfc:
856 code = 0xfd;
857 break;
858 case 0xfd:
859 code = 0xfc;
860 break;
861 case 0xfe:
862 code = 0xff;
863 break;
864 case 0xff:
865 code = 0xfe;
866 break;
867 case 0xe8:
868 code = 0xe9;
869 break;
870 case 0xe9:
871 code = 0xe8;
872 break;
873 case 0xe0:
874 code = 0xe2;
875 break;
876 case 0xe2:
877 code = 0xe0;
878 break;
879 case 0xe3:
880 code = 0xe1;
881 break;
882 case 0xe1:
883 code = 0xe3;
884 break;
885 case 0xe4:
886 code = 0xe6;
887 break;
888 case 0xe6:
889 code = 0xe4;
890 break;
891 case 0xe7:
892 code = 0xe5;
893 break;
894 case 0xe5:
895 code = 0xe7;
896 break;
897 case 0xec:
898 code = 0xed;
899 break;
900 case 0xed:
901 code = 0xec;
902 break;
903 case 0xee:
904 code = 0xef;
905 break;
906 case 0xef:
907 code = 0xee;
908 break;
252b5132
RH
909 }
910 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
a7c10850 911
252b5132
RH
912 /* Set the reloc type and symbol for the first branch
913 from the second branch. */
914 irel->r_info = nrel->r_info;
915
916 /* Make the reloc for the second branch a null reloc. */
917 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
918 R_MN10200_NONE);
919
920 /* Delete two bytes of data. */
921 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
922 irel->r_offset + 1, 2))
923 goto error_return;
924
925 /* That will change things, so, we should relax again.
926 Note that this is not required, and it may be slow. */
0a1b45a2 927 *again = true;
252b5132
RH
928 }
929
930 /* Try to turn a 24bit immediate, displacement or absolute address
931 into a 16bit immediate, displacement or absolute address. */
932 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24)
933 {
934 bfd_vma value = symval;
935
a7c10850 936 /* See if the value will fit in 16 bits.
252b5132
RH
937 We allow any 16bit match here. We prune those we can't
938 handle below. */
27def10f 939 if ((long) value < 0x7fff && (long) value > -0x8000)
252b5132
RH
940 {
941 unsigned char code;
942
943 /* All insns which have 24bit operands are 5 bytes long,
944 the first byte will always be 0xf4, but we double check
945 it just in case. */
946
947 /* Get the first opcode. */
948 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
949
950 if (code != 0xf4)
951 continue;
952
953 /* Get the second opcode. */
954 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
955
956 switch (code & 0xfc)
957 {
958 /* mov imm24,dn -> mov imm16,dn */
959 case 0x70:
960 /* Not safe if the high bit is on as relaxing may
961 move the value out of high mem and thus not fit
962 in a signed 16bit value. */
963 if (value & 0x8000)
964 continue;
965
4cc11e76 966 /* Note that we've changed the relocation contents, etc. */
252b5132 967 elf_section_data (sec)->relocs = internal_relocs;
252b5132 968 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 969 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
970
971 /* Fix the opcode. */
972 bfd_put_8 (abfd, 0xf8 + (code & 0x03),
973 contents + irel->r_offset - 2);
974
975 /* Fix the relocation's type. */
976 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
977 R_MN10200_16);
978
979 /* The opcode got shorter too, so we have to fix the
980 offset. */
981 irel->r_offset -= 1;
982
983 /* Delete two bytes of data. */
984 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
985 irel->r_offset + 1, 2))
986 goto error_return;
987
988 /* That will change things, so, we should relax again.
989 Note that this is not required, and it may be slow. */
0a1b45a2 990 *again = true;
252b5132
RH
991 break;
992
a7c10850 993 /* mov imm24,an -> mov imm16,an
252b5132
RH
994 cmp imm24,an -> cmp imm16,an
995 mov (abs24),dn -> mov (abs16),dn
996 mov dn,(abs24) -> mov dn,(abs16)
997 movb dn,(abs24) -> movb dn,(abs16)
998 movbu (abs24),dn -> movbu (abs16),dn */
999 case 0x74:
1000 case 0x7c:
1001 case 0xc0:
1002 case 0x40:
1003 case 0x44:
1004 case 0xc8:
4cc11e76 1005 /* Note that we've changed the relocation contents, etc. */
252b5132 1006 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1007 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1008 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1009
1010 if ((code & 0xfc) == 0x74)
1011 code = 0xdc + (code & 0x03);
1012 else if ((code & 0xfc) == 0x7c)
1013 code = 0xec + (code & 0x03);
1014 else if ((code & 0xfc) == 0xc0)
1015 code = 0xc8 + (code & 0x03);
1016 else if ((code & 0xfc) == 0x40)
1017 code = 0xc0 + (code & 0x03);
1018 else if ((code & 0xfc) == 0x44)
1019 code = 0xc4 + (code & 0x03);
1020 else if ((code & 0xfc) == 0xc8)
1021 code = 0xcc + (code & 0x03);
1022
1023 /* Fix the opcode. */
1024 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
1025
1026 /* Fix the relocation's type. */
1027 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1028 R_MN10200_16);
1029
1030 /* The opcode got shorter too, so we have to fix the
1031 offset. */
1032 irel->r_offset -= 1;
1033
1034 /* Delete two bytes of data. */
1035 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1036 irel->r_offset + 1, 2))
1037 goto error_return;
1038
1039 /* That will change things, so, we should relax again.
1040 Note that this is not required, and it may be slow. */
0a1b45a2 1041 *again = true;
252b5132
RH
1042 break;
1043
1044 /* cmp imm24,dn -> cmp imm16,dn
1045 mov (abs24),an -> mov (abs16),an
1046 mov an,(abs24) -> mov an,(abs16)
1047 add imm24,dn -> add imm16,dn
1048 add imm24,an -> add imm16,an
1049 sub imm24,dn -> sub imm16,dn
a7c10850 1050 sub imm24,an -> sub imm16,an
252b5132
RH
1051 And all d24->d16 in memory ops. */
1052 case 0x78:
1053 case 0xd0:
1054 case 0x50:
1055 case 0x60:
1056 case 0x64:
1057 case 0x68:
1058 case 0x6c:
1059 case 0x80:
1060 case 0xf0:
1061 case 0x00:
1062 case 0x10:
1063 case 0xb0:
1064 case 0x30:
1065 case 0xa0:
1066 case 0x20:
1067 case 0x90:
1068 /* Not safe if the high bit is on as relaxing may
1069 move the value out of high mem and thus not fit
1070 in a signed 16bit value. */
1071 if (((code & 0xfc) == 0x78
27def10f
KH
1072 || (code & 0xfc) == 0x60
1073 || (code & 0xfc) == 0x64
1074 || (code & 0xfc) == 0x68
1075 || (code & 0xfc) == 0x6c
1076 || (code & 0xfc) == 0x80
1077 || (code & 0xfc) == 0xf0
1078 || (code & 0xfc) == 0x00
1079 || (code & 0xfc) == 0x10
1080 || (code & 0xfc) == 0xb0
1081 || (code & 0xfc) == 0x30
1082 || (code & 0xfc) == 0xa0
1083 || (code & 0xfc) == 0x20
1084 || (code & 0xfc) == 0x90)
1085 && (value & 0x8000) != 0)
252b5132
RH
1086 continue;
1087
4cc11e76 1088 /* Note that we've changed the relocation contents, etc. */
252b5132 1089 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1090 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1091 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1092
1093 /* Fix the opcode. */
1094 bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2);
1095
1096 if ((code & 0xfc) == 0x78)
1097 code = 0x48 + (code & 0x03);
1098 else if ((code & 0xfc) == 0xd0)
1099 code = 0x30 + (code & 0x03);
1100 else if ((code & 0xfc) == 0x50)
1101 code = 0x20 + (code & 0x03);
1102 else if ((code & 0xfc) == 0x60)
1103 code = 0x18 + (code & 0x03);
1104 else if ((code & 0xfc) == 0x64)
1105 code = 0x08 + (code & 0x03);
1106 else if ((code & 0xfc) == 0x68)
1107 code = 0x1c + (code & 0x03);
1108 else if ((code & 0xfc) == 0x6c)
1109 code = 0x0c + (code & 0x03);
1110 else if ((code & 0xfc) == 0x80)
1111 code = 0xc0 + (code & 0x07);
1112 else if ((code & 0xfc) == 0xf0)
1113 code = 0xb0 + (code & 0x07);
1114 else if ((code & 0xfc) == 0x00)
1115 code = 0x80 + (code & 0x07);
1116 else if ((code & 0xfc) == 0x10)
1117 code = 0xa0 + (code & 0x07);
1118 else if ((code & 0xfc) == 0xb0)
1119 code = 0x70 + (code & 0x07);
1120 else if ((code & 0xfc) == 0x30)
1121 code = 0x60 + (code & 0x07);
1122 else if ((code & 0xfc) == 0xa0)
1123 code = 0xd0 + (code & 0x07);
1124 else if ((code & 0xfc) == 0x20)
1125 code = 0x90 + (code & 0x07);
1126 else if ((code & 0xfc) == 0x90)
1127 code = 0x50 + (code & 0x07);
1128
1129 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
1130
1131 /* Fix the relocation's type. */
1132 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1133 R_MN10200_16);
1134
1135 /* Delete one bytes of data. */
1136 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1137 irel->r_offset + 2, 1))
1138 goto error_return;
1139
1140 /* That will change things, so, we should relax again.
1141 Note that this is not required, and it may be slow. */
0a1b45a2 1142 *again = true;
252b5132
RH
1143 break;
1144
1145 /* movb (abs24),dn ->movbu (abs16),dn extxb bn */
1146 case 0xc4:
1147 /* Note that we've changed the reldection contents, etc. */
1148 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1149 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1150 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1151
1152 bfd_put_8 (abfd, 0xcc + (code & 0x03),
1153 contents + irel->r_offset - 2);
1154
1155 bfd_put_8 (abfd, 0xb8 + (code & 0x03),
1156 contents + irel->r_offset - 1);
1157
1158 /* Fix the relocation's type. */
1159 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1160 R_MN10200_16);
1161
1162 /* The reloc will be applied one byte in front of its
1163 current location. */
1164 irel->r_offset -= 1;
1165
1166 /* Delete one bytes of data. */
1167 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1168 irel->r_offset + 2, 1))
1169 goto error_return;
1170
1171 /* That will change things, so, we should relax again.
1172 Note that this is not required, and it may be slow. */
0a1b45a2 1173 *again = true;
252b5132
RH
1174 break;
1175 }
1176 }
1177 }
1178 }
1179
6cdc0ccc
AM
1180 if (isymbuf != NULL
1181 && symtab_hdr->contents != (unsigned char *) isymbuf)
252b5132
RH
1182 {
1183 if (! link_info->keep_memory)
6cdc0ccc 1184 free (isymbuf);
252b5132
RH
1185 else
1186 {
6cdc0ccc
AM
1187 /* Cache the symbols for elf_link_input_bfd. */
1188 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132 1189 }
9ad5cbcf
AM
1190 }
1191
6cdc0ccc
AM
1192 if (contents != NULL
1193 && elf_section_data (sec)->this_hdr.contents != contents)
252b5132
RH
1194 {
1195 if (! link_info->keep_memory)
6cdc0ccc
AM
1196 free (contents);
1197 else
252b5132 1198 {
6cdc0ccc
AM
1199 /* Cache the section contents for elf_link_input_bfd. */
1200 elf_section_data (sec)->this_hdr.contents = contents;
252b5132 1201 }
252b5132
RH
1202 }
1203
c9594989 1204 if (elf_section_data (sec)->relocs != internal_relocs)
6cdc0ccc
AM
1205 free (internal_relocs);
1206
0a1b45a2 1207 return true;
252b5132
RH
1208
1209 error_return:
c9594989 1210 if (symtab_hdr->contents != (unsigned char *) isymbuf)
6cdc0ccc 1211 free (isymbuf);
c9594989 1212 if (elf_section_data (sec)->this_hdr.contents != contents)
6cdc0ccc 1213 free (contents);
c9594989 1214 if (elf_section_data (sec)->relocs != internal_relocs)
6cdc0ccc 1215 free (internal_relocs);
9ad5cbcf 1216
0a1b45a2 1217 return false;
252b5132
RH
1218}
1219
b34976b6
AM
1220/* Return TRUE if a symbol exists at the given address, else return
1221 FALSE. */
0a1b45a2 1222static bool
2c3fc389
NC
1223mn10200_elf_symbol_address_p (bfd *abfd,
1224 asection *sec,
1225 Elf_Internal_Sym *isym,
1226 bfd_vma addr)
252b5132
RH
1227{
1228 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1229 unsigned int sec_shndx;
6cdc0ccc 1230 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1231 struct elf_link_hash_entry **sym_hashes;
1232 struct elf_link_hash_entry **end_hashes;
1233 unsigned int symcount;
252b5132 1234
9ad5cbcf 1235 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132 1236
6cdc0ccc 1237 /* Examine all the local symbols. */
9ad5cbcf 1238 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc 1239 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1240 {
6cdc0ccc
AM
1241 if (isym->st_shndx == sec_shndx
1242 && isym->st_value == addr)
0a1b45a2 1243 return true;
252b5132
RH
1244 }
1245
9ad5cbcf
AM
1246 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1247 - symtab_hdr->sh_info);
1248 sym_hashes = elf_sym_hashes (abfd);
1249 end_hashes = sym_hashes + symcount;
1250 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1251 {
9ad5cbcf
AM
1252 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1253 if ((sym_hash->root.type == bfd_link_hash_defined
1254 || sym_hash->root.type == bfd_link_hash_defweak)
1255 && sym_hash->root.u.def.section == sec
1256 && sym_hash->root.u.def.value == addr)
0a1b45a2 1257 return true;
252b5132 1258 }
9ad5cbcf 1259
0a1b45a2 1260 return false;
252b5132
RH
1261}
1262
1263/* This is a version of bfd_generic_get_relocated_section_contents
1264 which uses mn10200_elf_relocate_section. */
1265
1266static bfd_byte *
2c3fc389
NC
1267mn10200_elf_get_relocated_section_contents (bfd *output_bfd,
1268 struct bfd_link_info *link_info,
1269 struct bfd_link_order *link_order,
1270 bfd_byte *data,
0a1b45a2 1271 bool relocatable,
2c3fc389 1272 asymbol **symbols)
252b5132
RH
1273{
1274 Elf_Internal_Shdr *symtab_hdr;
1275 asection *input_section = link_order->u.indirect.section;
1276 bfd *input_bfd = input_section->owner;
1277 asection **sections = NULL;
1278 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1279 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
1280
1281 /* We only need to handle the case of relaxing, or of having a
1282 particular set of section contents, specially. */
1049f94e 1283 if (relocatable
252b5132
RH
1284 || elf_section_data (input_section)->this_hdr.contents == NULL)
1285 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1286 link_order, data,
1049f94e 1287 relocatable,
252b5132
RH
1288 symbols);
1289
1290 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1291
56ba7527
AM
1292 bfd_byte *orig_data = data;
1293 if (data == NULL)
1294 {
1295 data = bfd_malloc (input_section->size);
1296 if (data == NULL)
1297 return NULL;
1298 }
252b5132 1299 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1300 (size_t) input_section->size);
252b5132
RH
1301
1302 if ((input_section->flags & SEC_RELOC) != 0
1303 && input_section->reloc_count > 0)
1304 {
6cdc0ccc
AM
1305 Elf_Internal_Sym *isym;
1306 Elf_Internal_Sym *isymend;
252b5132 1307 asection **secpp;
9ad5cbcf 1308 bfd_size_type amt;
252b5132 1309
45d6a902 1310 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 1311 (input_bfd, input_section, NULL,
0a1b45a2 1312 (Elf_Internal_Rela *) NULL, false));
252b5132
RH
1313 if (internal_relocs == NULL)
1314 goto error_return;
1315
6cdc0ccc
AM
1316 if (symtab_hdr->sh_info != 0)
1317 {
1318 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1319 if (isymbuf == NULL)
1320 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1321 symtab_hdr->sh_info, 0,
1322 NULL, NULL, NULL);
1323 if (isymbuf == NULL)
1324 goto error_return;
1325 }
252b5132 1326
9ad5cbcf
AM
1327 amt = symtab_hdr->sh_info;
1328 amt *= sizeof (asection *);
1329 sections = (asection **) bfd_malloc (amt);
1330 if (sections == NULL && amt != 0)
252b5132
RH
1331 goto error_return;
1332
6cdc0ccc
AM
1333 isymend = isymbuf + symtab_hdr->sh_info;
1334 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
252b5132
RH
1335 {
1336 asection *isec;
1337
6cdc0ccc 1338 if (isym->st_shndx == SHN_UNDEF)
252b5132 1339 isec = bfd_und_section_ptr;
6cdc0ccc 1340 else if (isym->st_shndx == SHN_ABS)
252b5132 1341 isec = bfd_abs_section_ptr;
6cdc0ccc 1342 else if (isym->st_shndx == SHN_COMMON)
252b5132
RH
1343 isec = bfd_com_section_ptr;
1344 else
6cdc0ccc 1345 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
252b5132
RH
1346
1347 *secpp = isec;
1348 }
1349
1350 if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd,
1351 input_section, data, internal_relocs,
6cdc0ccc 1352 isymbuf, sections))
252b5132
RH
1353 goto error_return;
1354
c9594989
AM
1355 free (sections);
1356 if (symtab_hdr->contents != (unsigned char *) isymbuf)
6cdc0ccc
AM
1357 free (isymbuf);
1358 if (elf_section_data (input_section)->relocs != internal_relocs)
252b5132 1359 free (internal_relocs);
252b5132
RH
1360 }
1361
1362 return data;
1363
1364 error_return:
c9594989
AM
1365 free (sections);
1366 if (symtab_hdr->contents != (unsigned char *) isymbuf)
6cdc0ccc 1367 free (isymbuf);
c9594989 1368 if (elf_section_data (input_section)->relocs != internal_relocs)
6cdc0ccc 1369 free (internal_relocs);
56ba7527
AM
1370 if (orig_data == NULL)
1371 free (data);
252b5132
RH
1372 return NULL;
1373}
1374
6d00b590 1375#define TARGET_LITTLE_SYM mn10200_elf32_vec
252b5132
RH
1376#define TARGET_LITTLE_NAME "elf32-mn10200"
1377#define ELF_ARCH bfd_arch_mn10200
aa4f99bb
AO
1378#define ELF_MACHINE_CODE EM_MN10200
1379#define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200
252b5132
RH
1380#define ELF_MAXPAGESIZE 0x1000
1381
b491616a 1382#define elf_backend_rela_normal 1
252b5132 1383#define elf_info_to_howto mn10200_info_to_howto
f3185997 1384#define elf_info_to_howto_rel NULL
252b5132
RH
1385#define elf_backend_relocate_section mn10200_elf_relocate_section
1386#define bfd_elf32_bfd_relax_section mn10200_elf_relax_section
1387#define bfd_elf32_bfd_get_relocated_section_contents \
1388 mn10200_elf_get_relocated_section_contents
1389
1390#define elf_symbol_leading_char '_'
1391
1392#include "elf32-target.h"