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c2dcd04e 1/* BFD back-end for Renesas H8/300 ELF binaries.
6f2750fe 2 Copyright (C) 1993-2016 Free Software Foundation, Inc.
e01b0e69 3
e514ac71 4 This file is part of BFD, the Binary File Descriptor library.
e01b0e69 5
e514ac71
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
e514ac71 9 (at your option) any later version.
e01b0e69 10
e514ac71
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
e01b0e69 15
e514ac71
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
e01b0e69 20
e01b0e69 21#include "sysdep.h"
3db64b00 22#include "bfd.h"
e01b0e69
JR
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/h8.h"
26
27static reloc_howto_type *elf32_h8_reloc_type_lookup
c6baf75e 28 (bfd *abfd, bfd_reloc_code_real_type code);
e01b0e69 29static void elf32_h8_info_to_howto
c6baf75e 30 (bfd *, arelent *, Elf_Internal_Rela *);
5e47149d 31static void elf32_h8_info_to_howto_rel
c6baf75e 32 (bfd *, arelent *, Elf_Internal_Rela *);
96ef1419
KH
33static unsigned long elf32_h8_mach (flagword);
34static void elf32_h8_final_write_processing (bfd *, bfd_boolean);
35static bfd_boolean elf32_h8_object_p (bfd *);
36static bfd_boolean elf32_h8_merge_private_bfd_data (bfd *, bfd *);
b34976b6 37static bfd_boolean elf32_h8_relax_section
c6baf75e 38 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
b34976b6 39static bfd_boolean elf32_h8_relax_delete_bytes
c6baf75e 40 (bfd *, asection *, bfd_vma, int);
96ef1419 41static bfd_boolean elf32_h8_symbol_address_p (bfd *, asection *, bfd_vma);
dc810e39 42static bfd_byte *elf32_h8_get_relocated_section_contents
c6baf75e
RS
43 (bfd *, struct bfd_link_info *, struct bfd_link_order *,
44 bfd_byte *, bfd_boolean, asymbol **);
5e47149d 45static bfd_reloc_status_type elf32_h8_final_link_relocate
c6baf75e
RS
46 (unsigned long, bfd *, bfd *, asection *,
47 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
48 struct bfd_link_info *, asection *, int);
b34976b6 49static bfd_boolean elf32_h8_relocate_section
c6baf75e
RS
50 (bfd *, struct bfd_link_info *, bfd *, asection *,
51 bfd_byte *, Elf_Internal_Rela *,
52 Elf_Internal_Sym *, asection **);
dc810e39 53static bfd_reloc_status_type special
2c3fc389 54 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
e01b0e69
JR
55
56/* This does not include any relocation information, but should be
57 good enough for GDB or objdump to read the file. */
58
2c3fc389
NC
59static reloc_howto_type h8_elf_howto_table[] =
60{
e01b0e69
JR
61#define R_H8_NONE_X 0
62 HOWTO (R_H8_NONE, /* type */
63 0, /* rightshift */
6346d5ca 64 3, /* size (0 = byte, 1 = short, 2 = long) */
e01b0e69 65 0, /* bitsize */
b34976b6 66 FALSE, /* pc_relative */
e01b0e69 67 0, /* bitpos */
9d29900b
NC
68 complain_overflow_dont,/* complain_on_overflow */
69 special, /* special_function */
e01b0e69 70 "R_H8_NONE", /* name */
b34976b6 71 FALSE, /* partial_inplace */
e01b0e69
JR
72 0, /* src_mask */
73 0, /* dst_mask */
b34976b6 74 FALSE), /* pcrel_offset */
e01b0e69
JR
75#define R_H8_DIR32_X (R_H8_NONE_X + 1)
76 HOWTO (R_H8_DIR32, /* type */
77 0, /* rightshift */
78 2, /* size (0 = byte, 1 = short, 2 = long) */
79 32, /* bitsize */
b34976b6 80 FALSE, /* pc_relative */
e01b0e69 81 0, /* bitpos */
9d29900b
NC
82 complain_overflow_dont,/* complain_on_overflow */
83 special, /* special_function */
e01b0e69 84 "R_H8_DIR32", /* name */
b34976b6 85 FALSE, /* partial_inplace */
e01b0e69
JR
86 0, /* src_mask */
87 0xffffffff, /* dst_mask */
b34976b6 88 FALSE), /* pcrel_offset */
e01b0e69
JR
89#define R_H8_DIR16_X (R_H8_DIR32_X + 1)
90 HOWTO (R_H8_DIR16, /* type */
91 0, /* rightshift */
92 1, /* size (0 = byte, 1 = short, 2 = long) */
93 16, /* bitsize */
b34976b6 94 FALSE, /* pc_relative */
e01b0e69 95 0, /* bitpos */
9d29900b
NC
96 complain_overflow_dont,/* complain_on_overflow */
97 special, /* special_function */
e01b0e69 98 "R_H8_DIR16", /* name */
b34976b6 99 FALSE, /* partial_inplace */
e01b0e69
JR
100 0, /* src_mask */
101 0x0000ffff, /* dst_mask */
b34976b6 102 FALSE), /* pcrel_offset */
e01b0e69
JR
103#define R_H8_DIR8_X (R_H8_DIR16_X + 1)
104 HOWTO (R_H8_DIR8, /* type */
105 0, /* rightshift */
106 0, /* size (0 = byte, 1 = short, 2 = long) */
107 8, /* bitsize */
b34976b6 108 FALSE, /* pc_relative */
e01b0e69 109 0, /* bitpos */
9d29900b
NC
110 complain_overflow_dont,/* complain_on_overflow */
111 special, /* special_function */
112 "R_H8_DIR8", /* name */
b34976b6 113 FALSE, /* partial_inplace */
e01b0e69
JR
114 0, /* src_mask */
115 0x000000ff, /* dst_mask */
b34976b6 116 FALSE), /* pcrel_offset */
e01b0e69
JR
117#define R_H8_DIR16A8_X (R_H8_DIR8_X + 1)
118 HOWTO (R_H8_DIR16A8, /* type */
119 0, /* rightshift */
120 1, /* size (0 = byte, 1 = short, 2 = long) */
121 16, /* bitsize */
b34976b6 122 FALSE, /* pc_relative */
e01b0e69
JR
123 0, /* bitpos */
124 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 125 special, /* special_function */
e01b0e69 126 "R_H8_DIR16A8", /* name */
b34976b6 127 FALSE, /* partial_inplace */
e01b0e69
JR
128 0, /* src_mask */
129 0x0000ffff, /* dst_mask */
b34976b6 130 FALSE), /* pcrel_offset */
e01b0e69
JR
131#define R_H8_DIR16R8_X (R_H8_DIR16A8_X + 1)
132 HOWTO (R_H8_DIR16R8, /* type */
133 0, /* rightshift */
134 1, /* size (0 = byte, 1 = short, 2 = long) */
135 16, /* bitsize */
b34976b6 136 FALSE, /* pc_relative */
e01b0e69
JR
137 0, /* bitpos */
138 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 139 special, /* special_function */
e01b0e69 140 "R_H8_DIR16R8", /* name */
b34976b6 141 FALSE, /* partial_inplace */
e01b0e69
JR
142 0, /* src_mask */
143 0x0000ffff, /* dst_mask */
b34976b6 144 FALSE), /* pcrel_offset */
e01b0e69
JR
145#define R_H8_DIR24A8_X (R_H8_DIR16R8_X + 1)
146 HOWTO (R_H8_DIR24A8, /* type */
147 0, /* rightshift */
148 2, /* size (0 = byte, 1 = short, 2 = long) */
149 24, /* bitsize */
b34976b6 150 FALSE, /* pc_relative */
e01b0e69
JR
151 0, /* bitpos */
152 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 153 special, /* special_function */
e01b0e69 154 "R_H8_DIR24A8", /* name */
b34976b6 155 TRUE, /* partial_inplace */
e01b0e69
JR
156 0xff000000, /* src_mask */
157 0x00ffffff, /* dst_mask */
b34976b6 158 FALSE), /* pcrel_offset */
e01b0e69
JR
159#define R_H8_DIR24R8_X (R_H8_DIR24A8_X + 1)
160 HOWTO (R_H8_DIR24R8, /* type */
161 0, /* rightshift */
162 2, /* size (0 = byte, 1 = short, 2 = long) */
163 24, /* bitsize */
b34976b6 164 FALSE, /* pc_relative */
e01b0e69
JR
165 0, /* bitpos */
166 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 167 special, /* special_function */
e01b0e69 168 "R_H8_DIR24R8", /* name */
b34976b6 169 TRUE, /* partial_inplace */
e01b0e69
JR
170 0xff000000, /* src_mask */
171 0x00ffffff, /* dst_mask */
b34976b6 172 FALSE), /* pcrel_offset */
e01b0e69
JR
173#define R_H8_DIR32A16_X (R_H8_DIR24R8_X + 1)
174 HOWTO (R_H8_DIR32A16, /* type */
175 0, /* rightshift */
176 2, /* size (0 = byte, 1 = short, 2 = long) */
177 32, /* bitsize */
b34976b6 178 FALSE, /* pc_relative */
e01b0e69 179 0, /* bitpos */
9d29900b
NC
180 complain_overflow_dont,/* complain_on_overflow */
181 special, /* special_function */
8c17da6e 182 "R_H8_DIR32A16", /* name */
b34976b6 183 FALSE, /* partial_inplace */
e01b0e69
JR
184 0, /* src_mask */
185 0xffffffff, /* dst_mask */
b34976b6 186 FALSE), /* pcrel_offset */
81f5558e
NC
187#define R_H8_DISP32A16_X (R_H8_DIR32A16_X + 1)
188 HOWTO (R_H8_DISP32A16, /* type */
189 0, /* rightshift */
190 2, /* size (0 = byte, 1 = short, 2 = long) */
191 32, /* bitsize */
192 FALSE, /* pc_relative */
193 0, /* bitpos */
194 complain_overflow_dont,/* complain_on_overflow */
195 special, /* special_function */
196 "R_H8_DISP32A16", /* name */
197 FALSE, /* partial_inplace */
198 0, /* src_mask */
199 0xffffffff, /* dst_mask */
200 FALSE), /* pcrel_offset */
201#define R_H8_PCREL16_X (R_H8_DISP32A16_X + 1)
f2352488
JL
202 HOWTO (R_H8_PCREL16, /* type */
203 0, /* rightshift */
204 1, /* size (0 = byte, 1 = short, 2 = long) */
205 16, /* bitsize */
b34976b6 206 TRUE, /* pc_relative */
f2352488 207 0, /* bitpos */
9d29900b
NC
208 complain_overflow_signed,/* complain_on_overflow */
209 special, /* special_function */
f2352488 210 "R_H8_PCREL16", /* name */
b34976b6 211 FALSE, /* partial_inplace */
f2352488
JL
212 0xffff, /* src_mask */
213 0xffff, /* dst_mask */
b34976b6 214 TRUE), /* pcrel_offset */
f2352488
JL
215#define R_H8_PCREL8_X (R_H8_PCREL16_X + 1)
216 HOWTO (R_H8_PCREL8, /* type */
217 0, /* rightshift */
218 0, /* size (0 = byte, 1 = short, 2 = long) */
219 8, /* bitsize */
b34976b6 220 TRUE, /* pc_relative */
f2352488 221 0, /* bitpos */
9d29900b
NC
222 complain_overflow_signed,/* complain_on_overflow */
223 special, /* special_function */
f2352488 224 "R_H8_PCREL8", /* name */
b34976b6 225 FALSE, /* partial_inplace */
f2352488
JL
226 0xff, /* src_mask */
227 0xff, /* dst_mask */
b34976b6 228 TRUE), /* pcrel_offset */
e01b0e69
JR
229};
230
231/* This structure is used to map BFD reloc codes to H8 ELF relocs. */
232
bc7eab72 233struct elf_reloc_map {
e01b0e69
JR
234 bfd_reloc_code_real_type bfd_reloc_val;
235 unsigned char howto_index;
236};
237
6288878d 238/* An array mapping BFD reloc codes to H8 ELF relocs. */
e01b0e69 239
bc7eab72 240static const struct elf_reloc_map h8_reloc_map[] = {
e01b0e69
JR
241 { BFD_RELOC_NONE, R_H8_NONE_X },
242 { BFD_RELOC_32, R_H8_DIR32_X },
243 { BFD_RELOC_16, R_H8_DIR16_X },
244 { BFD_RELOC_8, R_H8_DIR8_X },
245 { BFD_RELOC_H8_DIR16A8, R_H8_DIR16A8_X },
246 { BFD_RELOC_H8_DIR16R8, R_H8_DIR16R8_X },
247 { BFD_RELOC_H8_DIR24A8, R_H8_DIR24A8_X },
248 { BFD_RELOC_H8_DIR24R8, R_H8_DIR24R8_X },
249 { BFD_RELOC_H8_DIR32A16, R_H8_DIR32A16_X },
81f5558e 250 { BFD_RELOC_H8_DISP32A16, R_H8_DISP32A16_X },
f2352488
JL
251 { BFD_RELOC_16_PCREL, R_H8_PCREL16_X },
252 { BFD_RELOC_8_PCREL, R_H8_PCREL8_X },
e01b0e69
JR
253};
254
0a83638b 255
e01b0e69 256static reloc_howto_type *
c6baf75e
RS
257elf32_h8_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
258 bfd_reloc_code_real_type code)
e01b0e69
JR
259{
260 unsigned int i;
261
262 for (i = 0; i < sizeof (h8_reloc_map) / sizeof (struct elf_reloc_map); i++)
263 {
264 if (h8_reloc_map[i].bfd_reloc_val == code)
265 return &h8_elf_howto_table[(int) h8_reloc_map[i].howto_index];
266 }
267 return NULL;
268}
269
157090f7
AM
270static reloc_howto_type *
271elf32_h8_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
272 const char *r_name)
273{
274 unsigned int i;
275
276 for (i = 0;
277 i < sizeof (h8_elf_howto_table) / sizeof (h8_elf_howto_table[0]);
278 i++)
279 if (h8_elf_howto_table[i].name != NULL
280 && strcasecmp (h8_elf_howto_table[i].name, r_name) == 0)
281 return &h8_elf_howto_table[i];
282
283 return NULL;
284}
285
e01b0e69 286static void
c6baf75e
RS
287elf32_h8_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
288 Elf_Internal_Rela *elf_reloc)
e01b0e69
JR
289{
290 unsigned int r;
291 unsigned int i;
292
293 r = ELF32_R_TYPE (elf_reloc->r_info);
294 for (i = 0; i < sizeof (h8_elf_howto_table) / sizeof (reloc_howto_type); i++)
bc7eab72 295 if (h8_elf_howto_table[i].type == r)
e01b0e69
JR
296 {
297 bfd_reloc->howto = &h8_elf_howto_table[i];
298 return;
299 }
300 abort ();
301}
302
303static void
c6baf75e
RS
304elf32_h8_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
305 Elf_Internal_Rela *elf_reloc ATTRIBUTE_UNUSED)
e01b0e69
JR
306{
307 unsigned int r;
308
309 abort ();
310 r = ELF32_R_TYPE (elf_reloc->r_info);
311 bfd_reloc->howto = &h8_elf_howto_table[r];
312}
313
a00c9dbc
JL
314/* Special handling for H8/300 relocs.
315 We only come here for pcrel stuff and return normally if not an -r link.
316 When doing -r, we can't do any arithmetic for the pcrel stuff, because
317 we support relaxing on the H8/300 series chips. */
318static bfd_reloc_status_type
c6baf75e
RS
319special (bfd *abfd ATTRIBUTE_UNUSED,
320 arelent *reloc_entry ATTRIBUTE_UNUSED,
321 asymbol *symbol ATTRIBUTE_UNUSED,
2c3fc389 322 void * data ATTRIBUTE_UNUSED,
c6baf75e
RS
323 asection *input_section ATTRIBUTE_UNUSED,
324 bfd *output_bfd,
325 char **error_message ATTRIBUTE_UNUSED)
a00c9dbc
JL
326{
327 if (output_bfd == (bfd *) NULL)
328 return bfd_reloc_continue;
329
330 /* Adjust the reloc address to that in the output section. */
331 reloc_entry->address += input_section->output_offset;
332 return bfd_reloc_ok;
333}
5e47149d
JL
334
335/* Perform a relocation as part of a final link. */
336static bfd_reloc_status_type
c6baf75e
RS
337elf32_h8_final_link_relocate (unsigned long r_type, bfd *input_bfd,
338 bfd *output_bfd ATTRIBUTE_UNUSED,
339 asection *input_section ATTRIBUTE_UNUSED,
340 bfd_byte *contents, bfd_vma offset,
341 bfd_vma value, bfd_vma addend,
342 struct bfd_link_info *info ATTRIBUTE_UNUSED,
343 asection *sym_sec ATTRIBUTE_UNUSED,
344 int is_local ATTRIBUTE_UNUSED)
5e47149d
JL
345{
346 bfd_byte *hit_data = contents + offset;
347
348 switch (r_type)
349 {
5e47149d
JL
350 case R_H8_NONE:
351 return bfd_reloc_ok;
352
353 case R_H8_DIR32:
354 case R_H8_DIR32A16:
81f5558e 355 case R_H8_DISP32A16:
a00c9dbc 356 case R_H8_DIR24A8:
5e47149d
JL
357 value += addend;
358 bfd_put_32 (input_bfd, value, hit_data);
359 return bfd_reloc_ok;
360
361 case R_H8_DIR16:
362 case R_H8_DIR16A8:
363 case R_H8_DIR16R8:
364 value += addend;
365 bfd_put_16 (input_bfd, value, hit_data);
366 return bfd_reloc_ok;
367
368 /* AKA R_RELBYTE */
369 case R_H8_DIR8:
370 value += addend;
371
5e47149d
JL
372 bfd_put_8 (input_bfd, value, hit_data);
373 return bfd_reloc_ok;
374
5e47149d
JL
375 case R_H8_DIR24R8:
376 value += addend;
377
a00c9dbc 378 /* HIT_DATA is the address for the first byte for the relocated
e804e836 379 value. Subtract 1 so that we can manipulate the data in 32-bit
a00c9dbc
JL
380 hunks. */
381 hit_data--;
382
383 /* Clear out the top byte in value. */
5e47149d 384 value &= 0xffffff;
a00c9dbc
JL
385
386 /* Retrieve the type byte for value from the section contents. */
5e47149d 387 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
a00c9dbc 388
e804e836 389 /* Now scribble it out in one 32-bit hunk. */
5e47149d
JL
390 bfd_put_32 (input_bfd, value, hit_data);
391 return bfd_reloc_ok;
392
f2352488
JL
393 case R_H8_PCREL16:
394 value -= (input_section->output_section->vma
395 + input_section->output_offset);
396 value -= offset;
397 value += addend;
398
a00c9dbc
JL
399 /* The value is relative to the start of the instruction,
400 not the relocation offset. Subtract 2 to account for
401 this minor issue. */
402 value -= 2;
403
f2352488
JL
404 bfd_put_16 (input_bfd, value, hit_data);
405 return bfd_reloc_ok;
406
407 case R_H8_PCREL8:
408 value -= (input_section->output_section->vma
409 + input_section->output_offset);
410 value -= offset;
411 value += addend;
412
a00c9dbc
JL
413 /* The value is relative to the start of the instruction,
414 not the relocation offset. Subtract 1 to account for
415 this minor issue. */
416 value -= 1;
417
f2352488
JL
418 bfd_put_8 (input_bfd, value, hit_data);
419 return bfd_reloc_ok;
420
5e47149d
JL
421 default:
422 return bfd_reloc_notsupported;
423 }
424}
425\f
426/* Relocate an H8 ELF section. */
b34976b6 427static bfd_boolean
c6baf75e
RS
428elf32_h8_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
429 bfd *input_bfd, asection *input_section,
430 bfd_byte *contents, Elf_Internal_Rela *relocs,
431 Elf_Internal_Sym *local_syms,
432 asection **local_sections)
5e47149d
JL
433{
434 Elf_Internal_Shdr *symtab_hdr;
435 struct elf_link_hash_entry **sym_hashes;
436 Elf_Internal_Rela *rel, *relend;
437
438 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
439 sym_hashes = elf_sym_hashes (input_bfd);
440
441 rel = relocs;
442 relend = relocs + input_section->reloc_count;
443 for (; rel < relend; rel++)
444 {
dc810e39 445 unsigned int r_type;
5e47149d
JL
446 unsigned long r_symndx;
447 Elf_Internal_Sym *sym;
448 asection *sec;
449 struct elf_link_hash_entry *h;
450 bfd_vma relocation;
451 bfd_reloc_status_type r;
ab96bf03
AM
452 arelent bfd_reloc;
453 reloc_howto_type *howto;
454
455 elf32_h8_info_to_howto (input_bfd, &bfd_reloc, rel);
456 howto = bfd_reloc.howto;
5e47149d
JL
457
458 r_symndx = ELF32_R_SYM (rel->r_info);
459 r_type = ELF32_R_TYPE (rel->r_info);
5e47149d
JL
460 h = NULL;
461 sym = NULL;
462 sec = NULL;
463 if (r_symndx < symtab_hdr->sh_info)
464 {
465 sym = local_syms + r_symndx;
466 sec = local_sections[r_symndx];
8517fae7 467 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5e47149d
JL
468 }
469 else
470 {
62d887d4 471 bfd_boolean unresolved_reloc, warned, ignored;
59c2e50f 472
b2a8e766
AM
473 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
474 r_symndx, symtab_hdr, sym_hashes,
475 h, sec, relocation,
62d887d4 476 unresolved_reloc, warned, ignored);
5e47149d
JL
477 }
478
dbaa2011 479 if (sec != NULL && discarded_section (sec))
e4067dbb 480 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 481 rel, 1, relend, howto, 0, contents);
ab96bf03 482
0e1862bb 483 if (bfd_link_relocatable (info))
ab96bf03
AM
484 continue;
485
5e47149d
JL
486 r = elf32_h8_final_link_relocate (r_type, input_bfd, output_bfd,
487 input_section,
488 contents, rel->r_offset,
489 relocation, rel->r_addend,
490 info, sec, h == NULL);
491
492 if (r != bfd_reloc_ok)
493 {
494 const char *name;
495 const char *msg = (const char *) 0;
dc810e39 496
5e47149d
JL
497 if (h != NULL)
498 name = h->root.root.string;
499 else
500 {
501 name = (bfd_elf_string_from_elf_section
502 (input_bfd, symtab_hdr->sh_link, sym->st_name));
503 if (name == NULL || *name == '\0')
504 name = bfd_section_name (input_bfd, sec);
505 }
506
507 switch (r)
508 {
509 case bfd_reloc_overflow:
1a72702b
AM
510 (*info->callbacks->reloc_overflow)
511 (info, (h ? &h->root : NULL), name, howto->name,
512 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
5e47149d
JL
513 break;
514
515 case bfd_reloc_undefined:
1a72702b
AM
516 (*info->callbacks->undefined_symbol)
517 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
5e47149d
JL
518 break;
519
520 case bfd_reloc_outofrange:
521 msg = _("internal error: out of range error");
522 goto common_error;
523
524 case bfd_reloc_notsupported:
525 msg = _("internal error: unsupported relocation error");
526 goto common_error;
527
528 case bfd_reloc_dangerous:
529 msg = _("internal error: dangerous error");
530 goto common_error;
531
532 default:
533 msg = _("internal error: unknown error");
534 /* fall through */
535
536 common_error:
1a72702b
AM
537 (*info->callbacks->warning) (info, msg, name, input_bfd,
538 input_section, rel->r_offset);
5e47149d
JL
539 break;
540 }
541 }
542 }
543
b34976b6 544 return TRUE;
5e47149d
JL
545}
546
0a83638b
JL
547/* Object files encode the specific H8 model they were compiled
548 for in the ELF flags field.
549
550 Examine that field and return the proper BFD machine type for
551 the object file. */
dc810e39 552static unsigned long
c6baf75e 553elf32_h8_mach (flagword flags)
0a83638b
JL
554{
555 switch (flags & EF_H8_MACH)
556 {
557 case E_H8_MACH_H8300:
558 default:
559 return bfd_mach_h8300;
560
561 case E_H8_MACH_H8300H:
562 return bfd_mach_h8300h;
563
564 case E_H8_MACH_H8300S:
565 return bfd_mach_h8300s;
8d9cd6b1
NC
566
567 case E_H8_MACH_H8300HN:
568 return bfd_mach_h8300hn;
569
570 case E_H8_MACH_H8300SN:
571 return bfd_mach_h8300sn;
5d1db417
MS
572
573 case E_H8_MACH_H8300SX:
574 return bfd_mach_h8300sx;
f4984206
RS
575
576 case E_H8_MACH_H8300SXN:
577 return bfd_mach_h8300sxn;
0a83638b
JL
578 }
579}
580
581/* The final processing done just before writing out a H8 ELF object
582 file. We use this opportunity to encode the BFD machine type
583 into the flags field in the object file. */
584
dc810e39 585static void
c6baf75e
RS
586elf32_h8_final_write_processing (bfd *abfd,
587 bfd_boolean linker ATTRIBUTE_UNUSED)
0a83638b
JL
588{
589 unsigned long val;
590
591 switch (bfd_get_mach (abfd))
592 {
593 default:
594 case bfd_mach_h8300:
595 val = E_H8_MACH_H8300;
596 break;
597
598 case bfd_mach_h8300h:
599 val = E_H8_MACH_H8300H;
600 break;
601
602 case bfd_mach_h8300s:
603 val = E_H8_MACH_H8300S;
604 break;
8d9cd6b1
NC
605
606 case bfd_mach_h8300hn:
607 val = E_H8_MACH_H8300HN;
608 break;
609
610 case bfd_mach_h8300sn:
611 val = E_H8_MACH_H8300SN;
612 break;
5d1db417
MS
613
614 case bfd_mach_h8300sx:
615 val = E_H8_MACH_H8300SX;
616 break;
f4984206
RS
617
618 case bfd_mach_h8300sxn:
619 val = E_H8_MACH_H8300SXN;
620 break;
0a83638b
JL
621 }
622
623 elf_elfheader (abfd)->e_flags &= ~ (EF_H8_MACH);
624 elf_elfheader (abfd)->e_flags |= val;
625}
626
627/* Return nonzero if ABFD represents a valid H8 ELF object file; also
628 record the encoded machine type found in the ELF flags. */
629
b34976b6 630static bfd_boolean
c6baf75e 631elf32_h8_object_p (bfd *abfd)
0a83638b
JL
632{
633 bfd_default_set_arch_mach (abfd, bfd_arch_h8300,
634 elf32_h8_mach (elf_elfheader (abfd)->e_flags));
b34976b6 635 return TRUE;
0a83638b
JL
636}
637
638/* Merge backend specific data from an object file to the output
639 object file when linking. The only data we need to copy at this
640 time is the architecture/machine information. */
641
b34976b6 642static bfd_boolean
c6baf75e 643elf32_h8_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
0a83638b
JL
644{
645 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
646 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 647 return TRUE;
0a83638b
JL
648
649 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
650 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
651 {
652 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
96ef1419
KH
653 bfd_get_mach (ibfd)))
654 return FALSE;
0a83638b
JL
655 }
656
b34976b6 657 return TRUE;
0a83638b
JL
658}
659
5907e628
JL
660/* This function handles relaxing for the H8..
661
4cc11e76 662 There are a few relaxing opportunities available on the H8:
5907e628
JL
663
664 jmp/jsr:24 -> bra/bsr:8 2 bytes
665 The jmp may be completely eliminated if the previous insn is a
666 conditional branch to the insn after the jump. In that case
667 we invert the branch and delete the jump and save 4 bytes.
668
669 bCC:16 -> bCC:8 2 bytes
670 bsr:16 -> bsr:8 2 bytes
671
630a7b0a
KH
672 bset:16 -> bset:8 2 bytes
673 bset:24/32 -> bset:8 4 bytes
674 (also applicable to other bit manipulation instructions)
675
5907e628
JL
676 mov.b:16 -> mov.b:8 2 bytes
677 mov.b:24/32 -> mov.b:8 4 bytes
678
7e89635a
KH
679 bset:24/32 -> bset:16 2 bytes
680 (also applicable to other bit manipulation instructions)
681
81f5558e
NC
682 mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes
683
684 mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes. */
5907e628 685
b34976b6 686static bfd_boolean
c6baf75e
RS
687elf32_h8_relax_section (bfd *abfd, asection *sec,
688 struct bfd_link_info *link_info, bfd_boolean *again)
5907e628
JL
689{
690 Elf_Internal_Shdr *symtab_hdr;
691 Elf_Internal_Rela *internal_relocs;
5907e628
JL
692 Elf_Internal_Rela *irel, *irelend;
693 bfd_byte *contents = NULL;
6cdc0ccc 694 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
695 static asection *last_input_section = NULL;
696 static Elf_Internal_Rela *last_reloc = NULL;
697
698 /* Assume nothing changes. */
b34976b6 699 *again = FALSE;
5907e628 700
1049f94e 701 /* We don't have to do anything for a relocatable link, if
5907e628
JL
702 this section does not have relocs, or if this is not a
703 code section. */
0e1862bb 704 if (bfd_link_relocatable (link_info)
5907e628
JL
705 || (sec->flags & SEC_RELOC) == 0
706 || sec->reloc_count == 0
707 || (sec->flags & SEC_CODE) == 0)
b34976b6 708 return TRUE;
5907e628 709
5907e628
JL
710 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
711
712 /* Get a copy of the native relocations. */
45d6a902 713 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 714 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
5907e628
JL
715 link_info->keep_memory));
716 if (internal_relocs == NULL)
717 goto error_return;
5907e628
JL
718
719 if (sec != last_input_section)
720 last_reloc = NULL;
721
722 last_input_section = sec;
723
724 /* Walk through the relocs looking for relaxing opportunities. */
725 irelend = internal_relocs + sec->reloc_count;
726 for (irel = internal_relocs; irel < irelend; irel++)
727 {
728 bfd_vma symval;
729
bcb012d3
DD
730 {
731 arelent bfd_reloc;
bcb012d3
DD
732
733 elf32_h8_info_to_howto (abfd, &bfd_reloc, irel);
bcb012d3 734 }
5907e628
JL
735 /* Keep track of the previous reloc so that we can delete
736 some long jumps created by the compiler. */
737 if (irel != internal_relocs)
738 last_reloc = irel - 1;
1b786873 739
81f5558e
NC
740 switch(ELF32_R_TYPE (irel->r_info))
741 {
742 case R_H8_DIR24R8:
743 case R_H8_PCREL16:
744 case R_H8_DIR16A8:
745 case R_H8_DIR24A8:
746 case R_H8_DIR32A16:
747 case R_H8_DISP32A16:
748 break;
749 default:
750 continue;
751 }
76f99c63 752
5907e628
JL
753 /* Get the section contents if we haven't done so already. */
754 if (contents == NULL)
755 {
756 /* Get cached copy if it exists. */
757 if (elf_section_data (sec)->this_hdr.contents != NULL)
758 contents = elf_section_data (sec)->this_hdr.contents;
759 else
760 {
761 /* Go get them off disk. */
eea6121a 762 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
5907e628
JL
763 goto error_return;
764 }
765 }
766
9ad5cbcf 767 /* Read this BFD's local symbols if we haven't done so already. */
6cdc0ccc 768 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
5907e628 769 {
6cdc0ccc
AM
770 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
771 if (isymbuf == NULL)
772 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
773 symtab_hdr->sh_info, 0,
774 NULL, NULL, NULL);
775 if (isymbuf == NULL)
776 goto error_return;
5907e628
JL
777 }
778
779 /* Get the value of the symbol referred to by the reloc. */
780 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
781 {
5907e628 782 /* A local symbol. */
6cdc0ccc
AM
783 Elf_Internal_Sym *isym;
784 asection *sym_sec;
5907e628 785
32ac2c9a 786 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6cdc0ccc 787 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
03d14457
NC
788 symval = isym->st_value;
789 /* If the reloc is absolute, it will not have
790 a symbol or section associated with it. */
791 if (sym_sec)
792 symval += sym_sec->output_section->vma
793 + sym_sec->output_offset;
5907e628
JL
794 }
795 else
796 {
797 unsigned long indx;
798 struct elf_link_hash_entry *h;
799
800 /* An external symbol. */
801 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
802 h = elf_sym_hashes (abfd)[indx];
803 BFD_ASSERT (h != NULL);
804 if (h->root.type != bfd_link_hash_defined
805 && h->root.type != bfd_link_hash_defweak)
806 {
807 /* This appears to be a reference to an undefined
808 symbol. Just ignore it--it will be caught by the
809 regular reloc processing. */
810 continue;
811 }
812
813 symval = (h->root.u.def.value
814 + h->root.u.def.section->output_section->vma
815 + h->root.u.def.section->output_offset);
816 }
817
818 /* For simplicity of coding, we are going to modify the section
819 contents, the section relocs, and the BFD symbol table. We
820 must tell the rest of the code not to free up this
821 information. It would be possible to instead create a table
822 of changes which have to be made, as is done in coff-mips.c;
823 that would be more work, but would require less memory when
824 the linker is run. */
825 switch (ELF32_R_TYPE (irel->r_info))
826 {
81f5558e
NC
827 /* Try to turn a 24-bit absolute branch/call into an 8-bit
828 pc-relative branch/call. */
5907e628
JL
829 case R_H8_DIR24R8:
830 {
831 bfd_vma value = symval + irel->r_addend;
832 bfd_vma dot, gap;
833
834 /* Get the address of this instruction. */
835 dot = (sec->output_section->vma
836 + sec->output_offset + irel->r_offset - 1);
837
838 /* Compute the distance from this insn to the branch target. */
839 gap = value - dot;
840
841 /* If the distance is within -126..+130 inclusive, then we can
842 relax this jump. +130 is valid since the target will move
843 two bytes closer if we do relax this branch. */
dc810e39 844 if ((int) gap >= -126 && (int) gap <= 130)
5907e628
JL
845 {
846 unsigned char code;
847
848 /* Note that we've changed the relocs, section contents,
849 etc. */
850 elf_section_data (sec)->relocs = internal_relocs;
5907e628 851 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 852 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 853
e514ac71
NC
854 /* Get the instruction code being relaxed. */
855 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
856
5907e628
JL
857 /* If the previous instruction conditionally jumped around
858 this instruction, we may be able to reverse the condition
859 and redirect the previous instruction to the target of
860 this instruction.
861
862 Such sequences are used by the compiler to deal with
e514ac71
NC
863 long conditional branches.
864
865 Only perform this optimisation for jumps (code 0x5a) not
866 subroutine calls, as otherwise it could transform:
b34976b6 867
81f5558e
NC
868 mov.w r0,r0
869 beq .L1
870 jsr @_bar
871 .L1: rts
872 _bar: rts
e514ac71 873 into:
81f5558e
NC
874 mov.w r0,r0
875 bne _bar
876 rts
877 _bar: rts
e514ac71
NC
878
879 which changes the call (jsr) into a branch (bne). */
81f5558e 880 if (code == 0x5a /* jmp24. */
e514ac71 881 && (int) gap <= 130
dc810e39 882 && (int) gap >= -128
5907e628
JL
883 && last_reloc
884 && ELF32_R_TYPE (last_reloc->r_info) == R_H8_PCREL8
885 && ELF32_R_SYM (last_reloc->r_info) < symtab_hdr->sh_info)
886 {
887 bfd_vma last_value;
888 asection *last_sym_sec;
6cdc0ccc 889 Elf_Internal_Sym *last_sym;
5907e628
JL
890
891 /* We will need to examine the symbol used by the
892 previous relocation. */
dc810e39 893
6cdc0ccc 894 last_sym = isymbuf + ELF32_R_SYM (last_reloc->r_info);
5907e628 895 last_sym_sec
6cdc0ccc
AM
896 = bfd_section_from_elf_index (abfd, last_sym->st_shndx);
897 last_value = (last_sym->st_value
5907e628
JL
898 + last_sym_sec->output_section->vma
899 + last_sym_sec->output_offset);
900
901 /* Verify that the previous relocation was for a
902 branch around this instruction and that no symbol
903 exists at the current location. */
904 if (last_value == dot + 4
905 && last_reloc->r_offset + 2 == irel->r_offset
9ad5cbcf 906 && ! elf32_h8_symbol_address_p (abfd, sec, dot))
5907e628
JL
907 {
908 /* We can eliminate this jump. Twiddle the
909 previous relocation as necessary. */
910 irel->r_info
911 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
912 ELF32_R_TYPE (R_H8_NONE));
913
bc7eab72 914 last_reloc->r_info
5907e628 915 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
bc7eab72
KH
916 ELF32_R_TYPE (R_H8_PCREL8));
917 last_reloc->r_addend = irel->r_addend;
5907e628
JL
918
919 code = bfd_get_8 (abfd,
920 contents + last_reloc->r_offset - 1);
921 code ^= 1;
922 bfd_put_8 (abfd,
923 code,
81f5558e 924 contents + last_reloc->r_offset - 1);
5907e628
JL
925
926 /* Delete four bytes of data. */
927 if (!elf32_h8_relax_delete_bytes (abfd, sec,
928 irel->r_offset - 1,
929 4))
930 goto error_return;
931
b34976b6 932 *again = TRUE;
5907e628
JL
933 break;
934 }
935 }
936
5907e628 937 if (code == 0x5e)
81f5558e
NC
938 /* This is jsr24 */
939 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1); /* bsr8. */
5907e628 940 else if (code == 0x5a)
81f5558e
NC
941 /* This is jmp24 */
942 bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1); /* bra8. */
5907e628
JL
943 else
944 abort ();
945
946 /* Fix the relocation's type. */
947 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
948 R_H8_PCREL8);
949
950 /* Delete two bytes of data. */
951 if (!elf32_h8_relax_delete_bytes (abfd, sec,
952 irel->r_offset + 1, 2))
953 goto error_return;
954
955 /* That will change things, so, we should relax again.
956 Note that this is not required, and it may be slow. */
b34976b6 957 *again = TRUE;
5907e628
JL
958 }
959 break;
960 }
961
81f5558e
NC
962 /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative
963 branch. */
5907e628
JL
964 case R_H8_PCREL16:
965 {
966 bfd_vma value = symval + irel->r_addend;
967 bfd_vma dot;
968 bfd_vma gap;
969
970 /* Get the address of this instruction. */
971 dot = (sec->output_section->vma
972 + sec->output_offset
973 + irel->r_offset - 2);
dc810e39 974
5907e628
JL
975 gap = value - dot;
976
977 /* If the distance is within -126..+130 inclusive, then we can
978 relax this jump. +130 is valid since the target will move
979 two bytes closer if we do relax this branch. */
bc7eab72 980 if ((int) gap >= -126 && (int) gap <= 130)
5907e628 981 {
bc7eab72 982 unsigned char code;
5907e628 983
bc7eab72 984 /* Note that we've changed the relocs, section contents,
5907e628 985 etc. */
bc7eab72
KH
986 elf_section_data (sec)->relocs = internal_relocs;
987 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 988 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 989
bc7eab72
KH
990 /* Get the opcode. */
991 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628
JL
992
993 if (code == 0x58)
994 {
995 /* bCC:16 -> bCC:8 */
7e89635a
KH
996 /* Get the second byte of the original insn, which
997 contains the condition code. */
5907e628 998 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
7e89635a 999
81f5558e 1000 /* Compute the first byte of the relaxed
7e89635a
KH
1001 instruction. The original sequence 0x58 0xX0
1002 is relaxed to 0x4X, where X represents the
1003 condition code. */
5907e628
JL
1004 code &= 0xf0;
1005 code >>= 4;
1006 code |= 0x40;
81f5558e 1007 bfd_put_8 (abfd, code, contents + irel->r_offset - 2); /* bCC:8. */
5907e628 1008 }
81f5558e 1009 else if (code == 0x5c) /* bsr16. */
7e89635a 1010 /* This is bsr. */
81f5558e 1011 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2); /* bsr8. */
5907e628 1012 else
bcb012d3
DD
1013 /* Might be MOVSD. */
1014 break;
5907e628
JL
1015
1016 /* Fix the relocation's type. */
bc7eab72 1017 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1018 R_H8_PCREL8);
bc7eab72 1019 irel->r_offset--;
5907e628 1020
bc7eab72
KH
1021 /* Delete two bytes of data. */
1022 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1023 irel->r_offset + 1, 2))
1024 goto error_return;
1025
bc7eab72 1026 /* That will change things, so, we should relax again.
5907e628 1027 Note that this is not required, and it may be slow. */
b34976b6 1028 *again = TRUE;
5907e628
JL
1029 }
1030 break;
1031 }
1032
81f5558e
NC
1033 /* This is a 16-bit absolute address in one of the following
1034 instructions:
630a7b0a
KH
1035
1036 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1037 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1038 "mov.b"
1039
81f5558e
NC
1040 We may relax this into an 8-bit absolute address if it's in
1041 the right range. */
5907e628
JL
1042 case R_H8_DIR16A8:
1043 {
7a9823f1 1044 bfd_vma value;
5907e628 1045
7a9823f1
RS
1046 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1047 if (value >= 0xffffff00u)
5907e628 1048 {
bc7eab72 1049 unsigned char code;
ca9a79a1 1050 unsigned char temp_code;
5907e628 1051
bc7eab72 1052 /* Note that we've changed the relocs, section contents,
5907e628 1053 etc. */
bc7eab72
KH
1054 elf_section_data (sec)->relocs = internal_relocs;
1055 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1056 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1057
bc7eab72
KH
1058 /* Get the opcode. */
1059 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1060
630a7b0a
KH
1061 /* All instructions with R_H8_DIR16A8 start with
1062 0x6a. */
bc7eab72 1063 if (code != 0x6a)
5907e628
JL
1064 abort ();
1065
ca9a79a1 1066 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
630a7b0a
KH
1067 /* If this is a mov.b instruction, clear the lower
1068 nibble, which contains the source/destination
1069 register number. */
ca9a79a1
NC
1070 if ((temp_code & 0x10) != 0x10)
1071 temp_code &= 0xf0;
5907e628 1072
ca9a79a1
NC
1073 switch (temp_code)
1074 {
1075 case 0x00:
630a7b0a 1076 /* This is mov.b @aa:16,Rd. */
ca9a79a1
NC
1077 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1078 contents + irel->r_offset - 2);
1079 break;
1080 case 0x80:
630a7b0a 1081 /* This is mov.b Rs,@aa:16. */
ca9a79a1
NC
1082 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1083 contents + irel->r_offset - 2);
1084 break;
1085 case 0x18:
630a7b0a
KH
1086 /* This is a bit-maniputation instruction that
1087 stores one bit into memory, one of "bclr",
1088 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1089 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1090 break;
1091 case 0x10:
630a7b0a
KH
1092 /* This is a bit-maniputation instruction that
1093 loads one bit from memory, one of "band",
1094 "biand", "bild", "bior", "bixor", "bld", "bor",
1095 "btst", and "bxor". */
ca9a79a1
NC
1096 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1097 break;
1098 default:
1099 abort ();
1100 }
5907e628 1101
bc7eab72
KH
1102 /* Fix the relocation's type. */
1103 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628
JL
1104 R_H8_DIR8);
1105
8c17da6e
NC
1106 /* Move the relocation. */
1107 irel->r_offset--;
1108
bc7eab72
KH
1109 /* Delete two bytes of data. */
1110 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1111 irel->r_offset + 1, 2))
1112 goto error_return;
1113
bc7eab72 1114 /* That will change things, so, we should relax again.
5907e628 1115 Note that this is not required, and it may be slow. */
b34976b6 1116 *again = TRUE;
5907e628
JL
1117 }
1118 break;
1119 }
1120
81f5558e
NC
1121 /* This is a 24-bit absolute address in one of the following
1122 instructions:
630a7b0a
KH
1123
1124 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1125 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1126 "mov.b"
1127
81f5558e
NC
1128 We may relax this into an 8-bit absolute address if it's in
1129 the right range. */
5907e628
JL
1130 case R_H8_DIR24A8:
1131 {
7a9823f1 1132 bfd_vma value;
5907e628 1133
7a9823f1
RS
1134 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1135 if (value >= 0xffffff00u)
5907e628 1136 {
bc7eab72 1137 unsigned char code;
ca9a79a1 1138 unsigned char temp_code;
5907e628 1139
bc7eab72 1140 /* Note that we've changed the relocs, section contents,
5907e628 1141 etc. */
bc7eab72
KH
1142 elf_section_data (sec)->relocs = internal_relocs;
1143 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1144 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1145
bc7eab72
KH
1146 /* Get the opcode. */
1147 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1148
630a7b0a
KH
1149 /* All instructions with R_H8_DIR24A8 start with
1150 0x6a. */
bc7eab72 1151 if (code != 0x6a)
5907e628
JL
1152 abort ();
1153
ca9a79a1
NC
1154 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1155
630a7b0a
KH
1156 /* If this is a mov.b instruction, clear the lower
1157 nibble, which contains the source/destination
1158 register number. */
ca9a79a1
NC
1159 if ((temp_code & 0x30) != 0x30)
1160 temp_code &= 0xf0;
5907e628 1161
ca9a79a1 1162 switch (temp_code)
03d14457 1163 {
7a9823f1 1164 case 0x20:
630a7b0a 1165 /* This is mov.b @aa:24/32,Rd. */
03d14457
NC
1166 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1167 contents + irel->r_offset - 2);
1168 break;
7a9823f1 1169 case 0xa0:
630a7b0a 1170 /* This is mov.b Rs,@aa:24/32. */
03d14457
NC
1171 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1172 contents + irel->r_offset - 2);
1173 break;
ca9a79a1 1174 case 0x38:
630a7b0a
KH
1175 /* This is a bit-maniputation instruction that
1176 stores one bit into memory, one of "bclr",
1177 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1178 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1179 break;
1180 case 0x30:
630a7b0a
KH
1181 /* This is a bit-maniputation instruction that
1182 loads one bit from memory, one of "band",
1183 "biand", "bild", "bior", "bixor", "bld", "bor",
1184 "btst", and "bxor". */
ca9a79a1
NC
1185 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1186 break;
03d14457 1187 default:
ca9a79a1 1188 abort();
03d14457
NC
1189 }
1190
bc7eab72
KH
1191 /* Fix the relocation's type. */
1192 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1193 R_H8_DIR8);
7a9823f1 1194 irel->r_offset--;
5907e628 1195
81f5558e 1196 /* Delete four bytes of data. */
7a9823f1
RS
1197 if (!elf32_h8_relax_delete_bytes (abfd, sec,
1198 irel->r_offset + 1, 4))
5907e628
JL
1199 goto error_return;
1200
bc7eab72 1201 /* That will change things, so, we should relax again.
5907e628 1202 Note that this is not required, and it may be slow. */
b34976b6 1203 *again = TRUE;
7a9823f1 1204 break;
5907e628
JL
1205 }
1206 }
1207
7e89635a
KH
1208 /* Fall through. */
1209
1210 /* This is a 24-/32-bit absolute address in one of the
1211 following instructions:
1212
81f5558e
NC
1213 "band", "bclr", "biand", "bild", "bior", "bist",
1214 "bixor", "bld", "bnot", "bor", "bset", "bst", "btst",
1215 "bxor", "ldc.w", "stc.w" and "mov.[bwl]"
5907e628 1216
7e89635a
KH
1217 We may relax this into an 16-bit absolute address if it's
1218 in the right range. */
5907e628
JL
1219 case R_H8_DIR32A16:
1220 {
7a9823f1 1221 bfd_vma value;
5907e628 1222
7a9823f1
RS
1223 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1224 if (value <= 0x7fff || value >= 0xffff8000u)
5907e628 1225 {
bc7eab72 1226 unsigned char code;
bcb012d3
DD
1227 unsigned char op0, op1, op2, op3;
1228 unsigned char *op_ptr;
5907e628 1229
bc7eab72 1230 /* Note that we've changed the relocs, section contents,
5907e628 1231 etc. */
bc7eab72
KH
1232 elf_section_data (sec)->relocs = internal_relocs;
1233 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1234 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1235
bcb012d3
DD
1236 if (irel->r_offset >= 4)
1237 {
81f5558e 1238 /* Check for 4-byte MOVA relaxation (SH-specific). */
bcb012d3
DD
1239 int second_reloc = 0;
1240
1241 op_ptr = contents + irel->r_offset - 4;
1242
1243 if (last_reloc)
1244 {
1245 arelent bfd_reloc;
1246 reloc_howto_type *h;
1247 bfd_vma last_reloc_size;
1248
1249 elf32_h8_info_to_howto (abfd, &bfd_reloc, last_reloc);
1250 h = bfd_reloc.howto;
1251 last_reloc_size = 1 << h->size;
1252 if (last_reloc->r_offset + last_reloc_size
1253 == irel->r_offset)
1254 {
1255 op_ptr -= last_reloc_size;
1256 second_reloc = 1;
1257 }
1258 }
81f5558e 1259
d79dcc73 1260 if (irel + 1 < irelend)
bcb012d3
DD
1261 {
1262 Elf_Internal_Rela *next_reloc = irel + 1;
1263 arelent bfd_reloc;
1264 reloc_howto_type *h;
1265 bfd_vma next_reloc_size;
1266
1267 elf32_h8_info_to_howto (abfd, &bfd_reloc, next_reloc);
1268 h = bfd_reloc.howto;
1269 next_reloc_size = 1 << h->size;
1270 if (next_reloc->r_offset + next_reloc_size
1271 == irel->r_offset)
1272 {
1273 op_ptr -= next_reloc_size;
1274 second_reloc = 1;
1275 }
1276 }
1277
1278 op0 = bfd_get_8 (abfd, op_ptr + 0);
1279 op1 = bfd_get_8 (abfd, op_ptr + 1);
1280 op2 = bfd_get_8 (abfd, op_ptr + 2);
1281 op3 = bfd_get_8 (abfd, op_ptr + 3);
1282
1283 if (op0 == 0x01
1284 && (op1 & 0xdf) == 0x5f
1285 && (op2 & 0x40) == 0x40
1286 && (op3 & 0x80) == 0x80)
1287 {
1288 if ((op2 & 0x08) == 0)
1289 second_reloc = 1;
1290
1291 if (second_reloc)
1292 {
1293 op3 &= ~0x08;
1294 bfd_put_8 (abfd, op3, op_ptr + 3);
1295 }
1296 else
1297 {
1298 op2 &= ~0x08;
1299 bfd_put_8 (abfd, op2, op_ptr + 2);
1300 }
1301 goto r_h8_dir32a16_common;
1302 }
1303 }
1304
81f5558e 1305 /* Now check for short version of MOVA. (SH-specific) */
bcb012d3
DD
1306 op_ptr = contents + irel->r_offset - 2;
1307 op0 = bfd_get_8 (abfd, op_ptr + 0);
1308 op1 = bfd_get_8 (abfd, op_ptr + 1);
1309
1310 if (op0 == 0x7a
1311 && (op1 & 0x88) == 0x80)
1312 {
1313 op1 |= 0x08;
1314 bfd_put_8 (abfd, op1, op_ptr + 1);
1315 goto r_h8_dir32a16_common;
1316 }
1317
bc7eab72
KH
1318 /* Get the opcode. */
1319 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
5907e628 1320
7e89635a
KH
1321 /* Fix the opcode. For all the instructions that
1322 belong to this relaxation, we simply need to turn
1323 off bit 0x20 in the previous byte. */
bc7eab72 1324 code &= ~0x20;
5907e628 1325
bc7eab72 1326 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
5907e628 1327
bcb012d3 1328 r_h8_dir32a16_common:
bc7eab72
KH
1329 /* Fix the relocation's type. */
1330 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8c17da6e 1331 R_H8_DIR16);
5907e628 1332
bc7eab72
KH
1333 /* Delete two bytes of data. */
1334 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1335 irel->r_offset + 1, 2))
1336 goto error_return;
1337
bc7eab72 1338 /* That will change things, so, we should relax again.
5907e628 1339 Note that this is not required, and it may be slow. */
b34976b6 1340 *again = TRUE;
5907e628 1341 }
81f5558e 1342 break; /* case R_H8_DIR32A16 */
5907e628
JL
1343 }
1344
81f5558e
NC
1345 case R_H8_DISP32A16:
1346 /* mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes
1347 It is assured that instruction uses at least 4 bytes opcode before
1348 reloc entry addressing mode "register indirect with displacement"
1349 relaxing options (all saving 4 bytes):
1350 0x78 0sss0000 0x6A 0010dddd disp:32 mov.b @(d:32,ERs),Rd ->
1351 0x6E 0sssdddd disp:16 mov.b @(d:16,ERs),Rd
1352 0x78 0sss0000 0x6B 0010dddd disp:32 mov.w @(d:32,ERs),Rd ->
1353 0x6F 0sssdddd disp:16 mov.w @(d:16,ERs),Rd
1354 0x01 0x00 0x78 0sss0000 0x6B 00100ddd disp:32 mov.l @(d:32,ERs),ERd ->
1355 0x01 0x00 0x6F 0sss0ddd disp:16 mov.l @(d:16,ERs),ERd
1356
1357 0x78 0ddd0000 0x6A 1010ssss disp:32 mov.b Rs,@(d:32,ERd) ->
1358 0x6E 1dddssss disp:16 mov.b Rs,@(d:16,ERd)
1359 0x78 0ddd0000 0x6B 1010ssss disp:32 mov.w Rs,@(d:32,ERd) ->
1360 0x6F 1dddssss disp:16 mov.w Rs,@(d:16,ERd)
1361 0x01 0x00 0x78 xddd0000 0x6B 10100sss disp:32 mov.l ERs,@(d:32,ERd) ->
1362 0x01 0x00 0x6F 1ddd0sss disp:16 mov.l ERs,@(d:16,ERd)
1363 mov.l prefix 0x01 0x00 can be left as is and mov.l handled same
1364 as mov.w/ */
1365 {
1366 bfd_vma value;
1367
1368 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1369 if (value <= 0x7fff || value >= 0xffff8000u)
1370 {
1371 unsigned char op0, op1, op2, op3, op0n, op1n;
1372 int relax = 0;
1373
1374 /* Note that we've changed the relocs, section contents,
1375 etc. */
1376 elf_section_data (sec)->relocs = internal_relocs;
1377 elf_section_data (sec)->this_hdr.contents = contents;
1378 symtab_hdr->contents = (unsigned char *) isymbuf;
1379
1380 if (irel->r_offset >= 4)
1381 {
1382 op0 = bfd_get_8 (abfd, contents + irel->r_offset - 4);
1383 op1 = bfd_get_8 (abfd, contents + irel->r_offset - 3);
1384 op2 = bfd_get_8 (abfd, contents + irel->r_offset - 2);
1385 op3 = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1386
1387 if (op0 == 0x78)
1388 {
1389 switch(op2)
1390 {
1391 case 0x6A:
1392 if ((op1 & 0x8F) == 0x00 && (op3 & 0x70) == 0x20)
1393 {
1394 /* mov.b. */
1395 op0n = 0x6E;
1396 relax = 1;
1397 }
1398 break;
1399 case 0x6B:
1400 if ((op1 & 0x0F) == 0x00 && (op3 & 0x70) == 0x20)
1401 {
1402 /* mov.w/l. */
1403 op0n = 0x6F;
1404 relax = 1;
1405 }
1406 break;
1407 default:
1408 break;
1409 }
1410 }
1411 }
1412
1413 if (relax)
1414 {
1415 op1n = (op3 & 0x8F) | (op1 & 0x70);
1416 bfd_put_8 (abfd, op0n, contents + irel->r_offset - 4);
1417 bfd_put_8 (abfd, op1n, contents + irel->r_offset - 3);
1418
1419 /* Fix the relocation's type. */
1420 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_H8_DIR16);
1421 irel->r_offset -= 2;
1422
1423 /* Delete four bytes of data. */
1424 if (!elf32_h8_relax_delete_bytes (abfd, sec, irel->r_offset + 2, 4))
1425 goto error_return;
1426
1427 /* That will change things, so, we should relax again.
1428 Note that this is not required, and it may be slow. */
1429 *again = TRUE;
1430 }
1431 }
1432 }
1433 break;
1434
5907e628
JL
1435 default:
1436 break;
1437 }
1438 }
1439
6cdc0ccc
AM
1440 if (isymbuf != NULL
1441 && symtab_hdr->contents != (unsigned char *) isymbuf)
5907e628 1442 {
6cdc0ccc
AM
1443 if (! link_info->keep_memory)
1444 free (isymbuf);
1445 else
1446 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628
JL
1447 }
1448
6cdc0ccc
AM
1449 if (contents != NULL
1450 && elf_section_data (sec)->this_hdr.contents != contents)
5907e628
JL
1451 {
1452 if (! link_info->keep_memory)
6cdc0ccc 1453 free (contents);
5907e628
JL
1454 else
1455 {
1456 /* Cache the section contents for elf_link_input_bfd. */
1457 elf_section_data (sec)->this_hdr.contents = contents;
1458 }
9ad5cbcf
AM
1459 }
1460
6cdc0ccc
AM
1461 if (internal_relocs != NULL
1462 && elf_section_data (sec)->relocs != internal_relocs)
1463 free (internal_relocs);
5907e628 1464
b34976b6 1465 return TRUE;
5907e628
JL
1466
1467 error_return:
6cdc0ccc
AM
1468 if (isymbuf != NULL
1469 && symtab_hdr->contents != (unsigned char *) isymbuf)
1470 free (isymbuf);
1471 if (contents != NULL
1472 && elf_section_data (sec)->this_hdr.contents != contents)
1473 free (contents);
1474 if (internal_relocs != NULL
1475 && elf_section_data (sec)->relocs != internal_relocs)
1476 free (internal_relocs);
b34976b6 1477 return FALSE;
5907e628
JL
1478}
1479
1480/* Delete some bytes from a section while relaxing. */
1481
b34976b6 1482static bfd_boolean
c6baf75e 1483elf32_h8_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count)
5907e628
JL
1484{
1485 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1486 unsigned int sec_shndx;
5907e628
JL
1487 bfd_byte *contents;
1488 Elf_Internal_Rela *irel, *irelend;
6cdc0ccc
AM
1489 Elf_Internal_Sym *isym;
1490 Elf_Internal_Sym *isymend;
5907e628 1491 bfd_vma toaddr;
9ad5cbcf
AM
1492 struct elf_link_hash_entry **sym_hashes;
1493 struct elf_link_hash_entry **end_hashes;
1494 unsigned int symcount;
5907e628 1495
9ad5cbcf 1496 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1497
1498 contents = elf_section_data (sec)->this_hdr.contents;
1499
eea6121a 1500 toaddr = sec->size;
5907e628
JL
1501
1502 irel = elf_section_data (sec)->relocs;
1503 irelend = irel + sec->reloc_count;
1504
1505 /* Actually delete the bytes. */
dc810e39
AM
1506 memmove (contents + addr, contents + addr + count,
1507 (size_t) (toaddr - addr - count));
eea6121a 1508 sec->size -= count;
5907e628
JL
1509
1510 /* Adjust all the relocs. */
1511 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1512 {
1513 /* Get the new reloc address. */
1514 if ((irel->r_offset > addr
5c0df484 1515 && irel->r_offset <= toaddr))
5907e628
JL
1516 irel->r_offset -= count;
1517 }
1518
1519 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1520 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1521 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1522 isymend = isym + symtab_hdr->sh_info;
1523 for (; isym < isymend; isym++)
5907e628 1524 {
6cdc0ccc
AM
1525 if (isym->st_shndx == sec_shndx
1526 && isym->st_value > addr
5c0df484 1527 && isym->st_value <= toaddr)
6cdc0ccc 1528 isym->st_value -= count;
5907e628
JL
1529 }
1530
1531 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1532 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1533 - symtab_hdr->sh_info);
1534 sym_hashes = elf_sym_hashes (abfd);
1535 end_hashes = sym_hashes + symcount;
1536 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1537 {
9ad5cbcf 1538 struct elf_link_hash_entry *sym_hash = *sym_hashes;
5c0df484 1539
9ad5cbcf
AM
1540 if ((sym_hash->root.type == bfd_link_hash_defined
1541 || sym_hash->root.type == bfd_link_hash_defweak)
1542 && sym_hash->root.u.def.section == sec
1543 && sym_hash->root.u.def.value > addr
5c0df484
NC
1544 && sym_hash->root.u.def.value <= toaddr)
1545 sym_hash->root.u.def.value -= count;
5907e628
JL
1546 }
1547
b34976b6 1548 return TRUE;
5907e628
JL
1549}
1550
b34976b6
AM
1551/* Return TRUE if a symbol exists at the given address, else return
1552 FALSE. */
1553static bfd_boolean
c6baf75e 1554elf32_h8_symbol_address_p (bfd *abfd, asection *sec, bfd_vma addr)
5907e628
JL
1555{
1556 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1557 unsigned int sec_shndx;
6cdc0ccc
AM
1558 Elf_Internal_Sym *isym;
1559 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1560 struct elf_link_hash_entry **sym_hashes;
1561 struct elf_link_hash_entry **end_hashes;
1562 unsigned int symcount;
5907e628 1563
9ad5cbcf 1564 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1565
1566 /* Examine all the symbols. */
9ad5cbcf 1567 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc
AM
1568 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1569 isymend = isym + symtab_hdr->sh_info;
1570 for (; isym < isymend; isym++)
5907e628 1571 {
6cdc0ccc
AM
1572 if (isym->st_shndx == sec_shndx
1573 && isym->st_value == addr)
b34976b6 1574 return TRUE;
5907e628
JL
1575 }
1576
9ad5cbcf
AM
1577 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1578 - symtab_hdr->sh_info);
1579 sym_hashes = elf_sym_hashes (abfd);
1580 end_hashes = sym_hashes + symcount;
1581 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1582 {
9ad5cbcf
AM
1583 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1584 if ((sym_hash->root.type == bfd_link_hash_defined
1585 || sym_hash->root.type == bfd_link_hash_defweak)
1586 && sym_hash->root.u.def.section == sec
1587 && sym_hash->root.u.def.value == addr)
b34976b6 1588 return TRUE;
5907e628 1589 }
9ad5cbcf 1590
b34976b6 1591 return FALSE;
5907e628
JL
1592}
1593
1594/* This is a version of bfd_generic_get_relocated_section_contents
1595 which uses elf32_h8_relocate_section. */
1596
1597static bfd_byte *
c6baf75e
RS
1598elf32_h8_get_relocated_section_contents (bfd *output_bfd,
1599 struct bfd_link_info *link_info,
1600 struct bfd_link_order *link_order,
1601 bfd_byte *data,
1602 bfd_boolean relocatable,
1603 asymbol **symbols)
5907e628
JL
1604{
1605 Elf_Internal_Shdr *symtab_hdr;
1606 asection *input_section = link_order->u.indirect.section;
1607 bfd *input_bfd = input_section->owner;
1608 asection **sections = NULL;
1609 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1610 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
1611
1612 /* We only need to handle the case of relaxing, or of having a
1613 particular set of section contents, specially. */
1049f94e 1614 if (relocatable
5907e628
JL
1615 || elf_section_data (input_section)->this_hdr.contents == NULL)
1616 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1617 link_order, data,
1049f94e 1618 relocatable,
5907e628
JL
1619 symbols);
1620
1621 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1622
1623 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1624 (size_t) input_section->size);
5907e628
JL
1625
1626 if ((input_section->flags & SEC_RELOC) != 0
1627 && input_section->reloc_count > 0)
1628 {
5907e628 1629 asection **secpp;
6cdc0ccc 1630 Elf_Internal_Sym *isym, *isymend;
9ad5cbcf 1631 bfd_size_type amt;
5907e628 1632
45d6a902 1633 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 1634 (input_bfd, input_section, NULL,
b34976b6 1635 (Elf_Internal_Rela *) NULL, FALSE));
5907e628
JL
1636 if (internal_relocs == NULL)
1637 goto error_return;
1638
6cdc0ccc
AM
1639 if (symtab_hdr->sh_info != 0)
1640 {
1641 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1642 if (isymbuf == NULL)
1643 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1644 symtab_hdr->sh_info, 0,
1645 NULL, NULL, NULL);
1646 if (isymbuf == NULL)
1647 goto error_return;
1648 }
5907e628 1649
9ad5cbcf
AM
1650 amt = symtab_hdr->sh_info;
1651 amt *= sizeof (asection *);
1652 sections = (asection **) bfd_malloc (amt);
1653 if (sections == NULL && amt != 0)
5907e628
JL
1654 goto error_return;
1655
6cdc0ccc
AM
1656 isymend = isymbuf + symtab_hdr->sh_info;
1657 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
5907e628
JL
1658 {
1659 asection *isec;
1660
6cdc0ccc 1661 if (isym->st_shndx == SHN_UNDEF)
5907e628 1662 isec = bfd_und_section_ptr;
6cdc0ccc 1663 else if (isym->st_shndx == SHN_ABS)
5907e628 1664 isec = bfd_abs_section_ptr;
6cdc0ccc 1665 else if (isym->st_shndx == SHN_COMMON)
5907e628
JL
1666 isec = bfd_com_section_ptr;
1667 else
6cdc0ccc 1668 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
5907e628
JL
1669
1670 *secpp = isec;
1671 }
1672
1673 if (! elf32_h8_relocate_section (output_bfd, link_info, input_bfd,
1674 input_section, data, internal_relocs,
6cdc0ccc 1675 isymbuf, sections))
5907e628
JL
1676 goto error_return;
1677
1678 if (sections != NULL)
1679 free (sections);
6cdc0ccc
AM
1680 if (isymbuf != NULL
1681 && symtab_hdr->contents != (unsigned char *) isymbuf)
1682 free (isymbuf);
1683 if (elf_section_data (input_section)->relocs != internal_relocs)
5907e628 1684 free (internal_relocs);
5907e628
JL
1685 }
1686
1687 return data;
1688
1689 error_return:
5907e628
JL
1690 if (sections != NULL)
1691 free (sections);
6cdc0ccc
AM
1692 if (isymbuf != NULL
1693 && symtab_hdr->contents != (unsigned char *) isymbuf)
1694 free (isymbuf);
1695 if (internal_relocs != NULL
1696 && elf_section_data (input_section)->relocs != internal_relocs)
1697 free (internal_relocs);
5907e628
JL
1698 return NULL;
1699}
1700
0a83638b 1701
6d00b590 1702#define TARGET_BIG_SYM h8300_elf32_vec
e01b0e69
JR
1703#define TARGET_BIG_NAME "elf32-h8300"
1704#define ELF_ARCH bfd_arch_h8300
1705#define ELF_MACHINE_CODE EM_H8_300
1706#define ELF_MAXPAGESIZE 0x1
1707#define bfd_elf32_bfd_reloc_type_lookup elf32_h8_reloc_type_lookup
157090f7 1708#define bfd_elf32_bfd_reloc_name_lookup elf32_h8_reloc_name_lookup
e01b0e69
JR
1709#define elf_info_to_howto elf32_h8_info_to_howto
1710#define elf_info_to_howto_rel elf32_h8_info_to_howto_rel
1711
0a83638b
JL
1712/* So we can set/examine bits in e_flags to get the specific
1713 H8 architecture in use. */
1714#define elf_backend_final_write_processing \
1715 elf32_h8_final_write_processing
1716#define elf_backend_object_p \
1717 elf32_h8_object_p
1718#define bfd_elf32_bfd_merge_private_bfd_data \
1719 elf32_h8_merge_private_bfd_data
1720
e01b0e69
JR
1721/* ??? when elf_backend_relocate_section is not defined, elf32-target.h
1722 defaults to using _bfd_generic_link_hash_table_create, but
c152c796 1723 bfd_elf_size_dynamic_sections uses
e01b0e69
JR
1724 dynobj = elf_hash_table (info)->dynobj;
1725 and thus requires an elf hash table. */
1726#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
1727
5e47149d
JL
1728/* Use an H8 specific linker, not the ELF generic linker. */
1729#define elf_backend_relocate_section elf32_h8_relocate_section
f0fe0e16 1730#define elf_backend_rela_normal 1
2627de83 1731#define elf_backend_can_gc_sections 1
5e47149d 1732
5907e628
JL
1733/* And relaxing stuff. */
1734#define bfd_elf32_bfd_relax_section elf32_h8_relax_section
1735#define bfd_elf32_bfd_get_relocated_section_contents \
1736 elf32_h8_get_relocated_section_contents
1737
84477db9 1738#define elf_symbol_leading_char '_'
5907e628 1739
e01b0e69 1740#include "elf32-target.h"
5518c738
YS
1741
1742#undef TARGET_BIG_SYM
1743#define TARGET_BIG_SYM h8300_elf32_linux_vec
1744#undef TARGET_BIG_NAME
1745#define TARGET_BIG_NAME "elf32-h8300-linux"
1746#undef elf_symbol_leading_char
1747#define elf32_bed elf32_h8300_linux_bed
1748
1749#include "elf32-target.h"