]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - bfd/elf32-h8300.c
Fix Common symbol override test fails
[thirdparty/binutils-gdb.git] / bfd / elf32-h8300.c
CommitLineData
c2dcd04e 1/* BFD back-end for Renesas H8/300 ELF binaries.
2571583a 2 Copyright (C) 1993-2017 Free Software Foundation, Inc.
e01b0e69 3
e514ac71 4 This file is part of BFD, the Binary File Descriptor library.
e01b0e69 5
e514ac71
NC
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
e514ac71 9 (at your option) any later version.
e01b0e69 10
e514ac71
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
e01b0e69 15
e514ac71
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
e01b0e69 20
e01b0e69 21#include "sysdep.h"
3db64b00 22#include "bfd.h"
e01b0e69
JR
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/h8.h"
26
27static reloc_howto_type *elf32_h8_reloc_type_lookup
c6baf75e 28 (bfd *abfd, bfd_reloc_code_real_type code);
e01b0e69 29static void elf32_h8_info_to_howto
c6baf75e 30 (bfd *, arelent *, Elf_Internal_Rela *);
5e47149d 31static void elf32_h8_info_to_howto_rel
c6baf75e 32 (bfd *, arelent *, Elf_Internal_Rela *);
96ef1419
KH
33static unsigned long elf32_h8_mach (flagword);
34static void elf32_h8_final_write_processing (bfd *, bfd_boolean);
35static bfd_boolean elf32_h8_object_p (bfd *);
50e03d47
AM
36static bfd_boolean elf32_h8_merge_private_bfd_data
37 (bfd *, struct bfd_link_info *);
b34976b6 38static bfd_boolean elf32_h8_relax_section
c6baf75e 39 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
b34976b6 40static bfd_boolean elf32_h8_relax_delete_bytes
c6baf75e 41 (bfd *, asection *, bfd_vma, int);
96ef1419 42static bfd_boolean elf32_h8_symbol_address_p (bfd *, asection *, bfd_vma);
dc810e39 43static bfd_byte *elf32_h8_get_relocated_section_contents
c6baf75e
RS
44 (bfd *, struct bfd_link_info *, struct bfd_link_order *,
45 bfd_byte *, bfd_boolean, asymbol **);
5e47149d 46static bfd_reloc_status_type elf32_h8_final_link_relocate
c6baf75e
RS
47 (unsigned long, bfd *, bfd *, asection *,
48 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
49 struct bfd_link_info *, asection *, int);
b34976b6 50static bfd_boolean elf32_h8_relocate_section
c6baf75e
RS
51 (bfd *, struct bfd_link_info *, bfd *, asection *,
52 bfd_byte *, Elf_Internal_Rela *,
53 Elf_Internal_Sym *, asection **);
dc810e39 54static bfd_reloc_status_type special
2c3fc389 55 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
e01b0e69
JR
56
57/* This does not include any relocation information, but should be
58 good enough for GDB or objdump to read the file. */
59
2c3fc389
NC
60static reloc_howto_type h8_elf_howto_table[] =
61{
e01b0e69
JR
62#define R_H8_NONE_X 0
63 HOWTO (R_H8_NONE, /* type */
64 0, /* rightshift */
6346d5ca 65 3, /* size (0 = byte, 1 = short, 2 = long) */
e01b0e69 66 0, /* bitsize */
b34976b6 67 FALSE, /* pc_relative */
e01b0e69 68 0, /* bitpos */
9d29900b
NC
69 complain_overflow_dont,/* complain_on_overflow */
70 special, /* special_function */
e01b0e69 71 "R_H8_NONE", /* name */
b34976b6 72 FALSE, /* partial_inplace */
e01b0e69
JR
73 0, /* src_mask */
74 0, /* dst_mask */
b34976b6 75 FALSE), /* pcrel_offset */
e01b0e69
JR
76#define R_H8_DIR32_X (R_H8_NONE_X + 1)
77 HOWTO (R_H8_DIR32, /* type */
78 0, /* rightshift */
79 2, /* size (0 = byte, 1 = short, 2 = long) */
80 32, /* bitsize */
b34976b6 81 FALSE, /* pc_relative */
e01b0e69 82 0, /* bitpos */
9d29900b
NC
83 complain_overflow_dont,/* complain_on_overflow */
84 special, /* special_function */
e01b0e69 85 "R_H8_DIR32", /* name */
b34976b6 86 FALSE, /* partial_inplace */
e01b0e69
JR
87 0, /* src_mask */
88 0xffffffff, /* dst_mask */
b34976b6 89 FALSE), /* pcrel_offset */
e01b0e69
JR
90#define R_H8_DIR16_X (R_H8_DIR32_X + 1)
91 HOWTO (R_H8_DIR16, /* type */
92 0, /* rightshift */
93 1, /* size (0 = byte, 1 = short, 2 = long) */
94 16, /* bitsize */
b34976b6 95 FALSE, /* pc_relative */
e01b0e69 96 0, /* bitpos */
9d29900b
NC
97 complain_overflow_dont,/* complain_on_overflow */
98 special, /* special_function */
e01b0e69 99 "R_H8_DIR16", /* name */
b34976b6 100 FALSE, /* partial_inplace */
e01b0e69
JR
101 0, /* src_mask */
102 0x0000ffff, /* dst_mask */
b34976b6 103 FALSE), /* pcrel_offset */
e01b0e69
JR
104#define R_H8_DIR8_X (R_H8_DIR16_X + 1)
105 HOWTO (R_H8_DIR8, /* type */
106 0, /* rightshift */
107 0, /* size (0 = byte, 1 = short, 2 = long) */
108 8, /* bitsize */
b34976b6 109 FALSE, /* pc_relative */
e01b0e69 110 0, /* bitpos */
9d29900b
NC
111 complain_overflow_dont,/* complain_on_overflow */
112 special, /* special_function */
113 "R_H8_DIR8", /* name */
b34976b6 114 FALSE, /* partial_inplace */
e01b0e69
JR
115 0, /* src_mask */
116 0x000000ff, /* dst_mask */
b34976b6 117 FALSE), /* pcrel_offset */
e01b0e69
JR
118#define R_H8_DIR16A8_X (R_H8_DIR8_X + 1)
119 HOWTO (R_H8_DIR16A8, /* type */
120 0, /* rightshift */
121 1, /* size (0 = byte, 1 = short, 2 = long) */
122 16, /* bitsize */
b34976b6 123 FALSE, /* pc_relative */
e01b0e69
JR
124 0, /* bitpos */
125 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 126 special, /* special_function */
e01b0e69 127 "R_H8_DIR16A8", /* name */
b34976b6 128 FALSE, /* partial_inplace */
e01b0e69
JR
129 0, /* src_mask */
130 0x0000ffff, /* dst_mask */
b34976b6 131 FALSE), /* pcrel_offset */
e01b0e69
JR
132#define R_H8_DIR16R8_X (R_H8_DIR16A8_X + 1)
133 HOWTO (R_H8_DIR16R8, /* type */
134 0, /* rightshift */
135 1, /* size (0 = byte, 1 = short, 2 = long) */
136 16, /* bitsize */
b34976b6 137 FALSE, /* pc_relative */
e01b0e69
JR
138 0, /* bitpos */
139 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 140 special, /* special_function */
e01b0e69 141 "R_H8_DIR16R8", /* name */
b34976b6 142 FALSE, /* partial_inplace */
e01b0e69
JR
143 0, /* src_mask */
144 0x0000ffff, /* dst_mask */
b34976b6 145 FALSE), /* pcrel_offset */
e01b0e69
JR
146#define R_H8_DIR24A8_X (R_H8_DIR16R8_X + 1)
147 HOWTO (R_H8_DIR24A8, /* type */
148 0, /* rightshift */
149 2, /* size (0 = byte, 1 = short, 2 = long) */
150 24, /* bitsize */
b34976b6 151 FALSE, /* pc_relative */
e01b0e69
JR
152 0, /* bitpos */
153 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 154 special, /* special_function */
e01b0e69 155 "R_H8_DIR24A8", /* name */
b34976b6 156 TRUE, /* partial_inplace */
e01b0e69
JR
157 0xff000000, /* src_mask */
158 0x00ffffff, /* dst_mask */
b34976b6 159 FALSE), /* pcrel_offset */
e01b0e69
JR
160#define R_H8_DIR24R8_X (R_H8_DIR24A8_X + 1)
161 HOWTO (R_H8_DIR24R8, /* type */
162 0, /* rightshift */
163 2, /* size (0 = byte, 1 = short, 2 = long) */
164 24, /* bitsize */
b34976b6 165 FALSE, /* pc_relative */
e01b0e69
JR
166 0, /* bitpos */
167 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 168 special, /* special_function */
e01b0e69 169 "R_H8_DIR24R8", /* name */
b34976b6 170 TRUE, /* partial_inplace */
e01b0e69
JR
171 0xff000000, /* src_mask */
172 0x00ffffff, /* dst_mask */
b34976b6 173 FALSE), /* pcrel_offset */
e01b0e69
JR
174#define R_H8_DIR32A16_X (R_H8_DIR24R8_X + 1)
175 HOWTO (R_H8_DIR32A16, /* type */
176 0, /* rightshift */
177 2, /* size (0 = byte, 1 = short, 2 = long) */
178 32, /* bitsize */
b34976b6 179 FALSE, /* pc_relative */
e01b0e69 180 0, /* bitpos */
9d29900b
NC
181 complain_overflow_dont,/* complain_on_overflow */
182 special, /* special_function */
8c17da6e 183 "R_H8_DIR32A16", /* name */
b34976b6 184 FALSE, /* partial_inplace */
e01b0e69
JR
185 0, /* src_mask */
186 0xffffffff, /* dst_mask */
b34976b6 187 FALSE), /* pcrel_offset */
81f5558e
NC
188#define R_H8_DISP32A16_X (R_H8_DIR32A16_X + 1)
189 HOWTO (R_H8_DISP32A16, /* type */
190 0, /* rightshift */
191 2, /* size (0 = byte, 1 = short, 2 = long) */
192 32, /* bitsize */
193 FALSE, /* pc_relative */
194 0, /* bitpos */
195 complain_overflow_dont,/* complain_on_overflow */
196 special, /* special_function */
197 "R_H8_DISP32A16", /* name */
198 FALSE, /* partial_inplace */
199 0, /* src_mask */
200 0xffffffff, /* dst_mask */
201 FALSE), /* pcrel_offset */
202#define R_H8_PCREL16_X (R_H8_DISP32A16_X + 1)
f2352488
JL
203 HOWTO (R_H8_PCREL16, /* type */
204 0, /* rightshift */
205 1, /* size (0 = byte, 1 = short, 2 = long) */
206 16, /* bitsize */
b34976b6 207 TRUE, /* pc_relative */
f2352488 208 0, /* bitpos */
9d29900b
NC
209 complain_overflow_signed,/* complain_on_overflow */
210 special, /* special_function */
f2352488 211 "R_H8_PCREL16", /* name */
b34976b6 212 FALSE, /* partial_inplace */
f2352488
JL
213 0xffff, /* src_mask */
214 0xffff, /* dst_mask */
b34976b6 215 TRUE), /* pcrel_offset */
f2352488
JL
216#define R_H8_PCREL8_X (R_H8_PCREL16_X + 1)
217 HOWTO (R_H8_PCREL8, /* type */
218 0, /* rightshift */
219 0, /* size (0 = byte, 1 = short, 2 = long) */
220 8, /* bitsize */
b34976b6 221 TRUE, /* pc_relative */
f2352488 222 0, /* bitpos */
9d29900b
NC
223 complain_overflow_signed,/* complain_on_overflow */
224 special, /* special_function */
f2352488 225 "R_H8_PCREL8", /* name */
b34976b6 226 FALSE, /* partial_inplace */
f2352488
JL
227 0xff, /* src_mask */
228 0xff, /* dst_mask */
b34976b6 229 TRUE), /* pcrel_offset */
e01b0e69
JR
230};
231
232/* This structure is used to map BFD reloc codes to H8 ELF relocs. */
233
bc7eab72 234struct elf_reloc_map {
e01b0e69
JR
235 bfd_reloc_code_real_type bfd_reloc_val;
236 unsigned char howto_index;
237};
238
6288878d 239/* An array mapping BFD reloc codes to H8 ELF relocs. */
e01b0e69 240
bc7eab72 241static const struct elf_reloc_map h8_reloc_map[] = {
e01b0e69
JR
242 { BFD_RELOC_NONE, R_H8_NONE_X },
243 { BFD_RELOC_32, R_H8_DIR32_X },
244 { BFD_RELOC_16, R_H8_DIR16_X },
245 { BFD_RELOC_8, R_H8_DIR8_X },
246 { BFD_RELOC_H8_DIR16A8, R_H8_DIR16A8_X },
247 { BFD_RELOC_H8_DIR16R8, R_H8_DIR16R8_X },
248 { BFD_RELOC_H8_DIR24A8, R_H8_DIR24A8_X },
249 { BFD_RELOC_H8_DIR24R8, R_H8_DIR24R8_X },
250 { BFD_RELOC_H8_DIR32A16, R_H8_DIR32A16_X },
81f5558e 251 { BFD_RELOC_H8_DISP32A16, R_H8_DISP32A16_X },
f2352488
JL
252 { BFD_RELOC_16_PCREL, R_H8_PCREL16_X },
253 { BFD_RELOC_8_PCREL, R_H8_PCREL8_X },
e01b0e69
JR
254};
255
0a83638b 256
e01b0e69 257static reloc_howto_type *
c6baf75e
RS
258elf32_h8_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
259 bfd_reloc_code_real_type code)
e01b0e69
JR
260{
261 unsigned int i;
262
263 for (i = 0; i < sizeof (h8_reloc_map) / sizeof (struct elf_reloc_map); i++)
264 {
265 if (h8_reloc_map[i].bfd_reloc_val == code)
266 return &h8_elf_howto_table[(int) h8_reloc_map[i].howto_index];
267 }
268 return NULL;
269}
270
157090f7
AM
271static reloc_howto_type *
272elf32_h8_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
273 const char *r_name)
274{
275 unsigned int i;
276
277 for (i = 0;
278 i < sizeof (h8_elf_howto_table) / sizeof (h8_elf_howto_table[0]);
279 i++)
280 if (h8_elf_howto_table[i].name != NULL
281 && strcasecmp (h8_elf_howto_table[i].name, r_name) == 0)
282 return &h8_elf_howto_table[i];
283
284 return NULL;
285}
286
e01b0e69 287static void
c6baf75e
RS
288elf32_h8_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
289 Elf_Internal_Rela *elf_reloc)
e01b0e69
JR
290{
291 unsigned int r;
292 unsigned int i;
293
294 r = ELF32_R_TYPE (elf_reloc->r_info);
295 for (i = 0; i < sizeof (h8_elf_howto_table) / sizeof (reloc_howto_type); i++)
bc7eab72 296 if (h8_elf_howto_table[i].type == r)
e01b0e69
JR
297 {
298 bfd_reloc->howto = &h8_elf_howto_table[i];
299 return;
300 }
301 abort ();
302}
303
304static void
c6baf75e
RS
305elf32_h8_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
306 Elf_Internal_Rela *elf_reloc ATTRIBUTE_UNUSED)
e01b0e69
JR
307{
308 unsigned int r;
309
310 abort ();
311 r = ELF32_R_TYPE (elf_reloc->r_info);
312 bfd_reloc->howto = &h8_elf_howto_table[r];
313}
314
a00c9dbc
JL
315/* Special handling for H8/300 relocs.
316 We only come here for pcrel stuff and return normally if not an -r link.
317 When doing -r, we can't do any arithmetic for the pcrel stuff, because
318 we support relaxing on the H8/300 series chips. */
319static bfd_reloc_status_type
c6baf75e
RS
320special (bfd *abfd ATTRIBUTE_UNUSED,
321 arelent *reloc_entry ATTRIBUTE_UNUSED,
322 asymbol *symbol ATTRIBUTE_UNUSED,
2c3fc389 323 void * data ATTRIBUTE_UNUSED,
c6baf75e
RS
324 asection *input_section ATTRIBUTE_UNUSED,
325 bfd *output_bfd,
326 char **error_message ATTRIBUTE_UNUSED)
a00c9dbc
JL
327{
328 if (output_bfd == (bfd *) NULL)
329 return bfd_reloc_continue;
330
331 /* Adjust the reloc address to that in the output section. */
332 reloc_entry->address += input_section->output_offset;
333 return bfd_reloc_ok;
334}
5e47149d
JL
335
336/* Perform a relocation as part of a final link. */
337static bfd_reloc_status_type
c6baf75e
RS
338elf32_h8_final_link_relocate (unsigned long r_type, bfd *input_bfd,
339 bfd *output_bfd ATTRIBUTE_UNUSED,
340 asection *input_section ATTRIBUTE_UNUSED,
341 bfd_byte *contents, bfd_vma offset,
342 bfd_vma value, bfd_vma addend,
343 struct bfd_link_info *info ATTRIBUTE_UNUSED,
344 asection *sym_sec ATTRIBUTE_UNUSED,
345 int is_local ATTRIBUTE_UNUSED)
5e47149d
JL
346{
347 bfd_byte *hit_data = contents + offset;
348
349 switch (r_type)
350 {
5e47149d
JL
351 case R_H8_NONE:
352 return bfd_reloc_ok;
353
354 case R_H8_DIR32:
355 case R_H8_DIR32A16:
81f5558e 356 case R_H8_DISP32A16:
a00c9dbc 357 case R_H8_DIR24A8:
5e47149d
JL
358 value += addend;
359 bfd_put_32 (input_bfd, value, hit_data);
360 return bfd_reloc_ok;
361
362 case R_H8_DIR16:
363 case R_H8_DIR16A8:
364 case R_H8_DIR16R8:
365 value += addend;
366 bfd_put_16 (input_bfd, value, hit_data);
367 return bfd_reloc_ok;
368
369 /* AKA R_RELBYTE */
370 case R_H8_DIR8:
371 value += addend;
372
5e47149d
JL
373 bfd_put_8 (input_bfd, value, hit_data);
374 return bfd_reloc_ok;
375
5e47149d
JL
376 case R_H8_DIR24R8:
377 value += addend;
378
a00c9dbc 379 /* HIT_DATA is the address for the first byte for the relocated
e804e836 380 value. Subtract 1 so that we can manipulate the data in 32-bit
a00c9dbc
JL
381 hunks. */
382 hit_data--;
383
384 /* Clear out the top byte in value. */
5e47149d 385 value &= 0xffffff;
a00c9dbc
JL
386
387 /* Retrieve the type byte for value from the section contents. */
5e47149d 388 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
a00c9dbc 389
e804e836 390 /* Now scribble it out in one 32-bit hunk. */
5e47149d
JL
391 bfd_put_32 (input_bfd, value, hit_data);
392 return bfd_reloc_ok;
393
f2352488
JL
394 case R_H8_PCREL16:
395 value -= (input_section->output_section->vma
396 + input_section->output_offset);
397 value -= offset;
398 value += addend;
399
a00c9dbc
JL
400 /* The value is relative to the start of the instruction,
401 not the relocation offset. Subtract 2 to account for
402 this minor issue. */
403 value -= 2;
404
f2352488
JL
405 bfd_put_16 (input_bfd, value, hit_data);
406 return bfd_reloc_ok;
407
408 case R_H8_PCREL8:
409 value -= (input_section->output_section->vma
410 + input_section->output_offset);
411 value -= offset;
412 value += addend;
413
a00c9dbc
JL
414 /* The value is relative to the start of the instruction,
415 not the relocation offset. Subtract 1 to account for
416 this minor issue. */
417 value -= 1;
418
f2352488
JL
419 bfd_put_8 (input_bfd, value, hit_data);
420 return bfd_reloc_ok;
421
5e47149d
JL
422 default:
423 return bfd_reloc_notsupported;
424 }
425}
426\f
427/* Relocate an H8 ELF section. */
b34976b6 428static bfd_boolean
c6baf75e
RS
429elf32_h8_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
430 bfd *input_bfd, asection *input_section,
431 bfd_byte *contents, Elf_Internal_Rela *relocs,
432 Elf_Internal_Sym *local_syms,
433 asection **local_sections)
5e47149d
JL
434{
435 Elf_Internal_Shdr *symtab_hdr;
436 struct elf_link_hash_entry **sym_hashes;
437 Elf_Internal_Rela *rel, *relend;
438
439 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
440 sym_hashes = elf_sym_hashes (input_bfd);
441
442 rel = relocs;
443 relend = relocs + input_section->reloc_count;
444 for (; rel < relend; rel++)
445 {
dc810e39 446 unsigned int r_type;
5e47149d
JL
447 unsigned long r_symndx;
448 Elf_Internal_Sym *sym;
449 asection *sec;
450 struct elf_link_hash_entry *h;
451 bfd_vma relocation;
452 bfd_reloc_status_type r;
ab96bf03
AM
453 arelent bfd_reloc;
454 reloc_howto_type *howto;
455
456 elf32_h8_info_to_howto (input_bfd, &bfd_reloc, rel);
457 howto = bfd_reloc.howto;
5e47149d
JL
458
459 r_symndx = ELF32_R_SYM (rel->r_info);
460 r_type = ELF32_R_TYPE (rel->r_info);
5e47149d
JL
461 h = NULL;
462 sym = NULL;
463 sec = NULL;
464 if (r_symndx < symtab_hdr->sh_info)
465 {
466 sym = local_syms + r_symndx;
467 sec = local_sections[r_symndx];
8517fae7 468 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5e47149d
JL
469 }
470 else
471 {
62d887d4 472 bfd_boolean unresolved_reloc, warned, ignored;
59c2e50f 473
b2a8e766
AM
474 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
475 r_symndx, symtab_hdr, sym_hashes,
476 h, sec, relocation,
62d887d4 477 unresolved_reloc, warned, ignored);
5e47149d
JL
478 }
479
dbaa2011 480 if (sec != NULL && discarded_section (sec))
e4067dbb 481 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 482 rel, 1, relend, howto, 0, contents);
ab96bf03 483
0e1862bb 484 if (bfd_link_relocatable (info))
ab96bf03
AM
485 continue;
486
5e47149d
JL
487 r = elf32_h8_final_link_relocate (r_type, input_bfd, output_bfd,
488 input_section,
489 contents, rel->r_offset,
490 relocation, rel->r_addend,
491 info, sec, h == NULL);
492
493 if (r != bfd_reloc_ok)
494 {
495 const char *name;
496 const char *msg = (const char *) 0;
dc810e39 497
5e47149d
JL
498 if (h != NULL)
499 name = h->root.root.string;
500 else
501 {
502 name = (bfd_elf_string_from_elf_section
503 (input_bfd, symtab_hdr->sh_link, sym->st_name));
504 if (name == NULL || *name == '\0')
505 name = bfd_section_name (input_bfd, sec);
506 }
507
508 switch (r)
509 {
510 case bfd_reloc_overflow:
1a72702b
AM
511 (*info->callbacks->reloc_overflow)
512 (info, (h ? &h->root : NULL), name, howto->name,
513 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
5e47149d
JL
514 break;
515
516 case bfd_reloc_undefined:
1a72702b
AM
517 (*info->callbacks->undefined_symbol)
518 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
5e47149d
JL
519 break;
520
521 case bfd_reloc_outofrange:
522 msg = _("internal error: out of range error");
523 goto common_error;
524
525 case bfd_reloc_notsupported:
526 msg = _("internal error: unsupported relocation error");
527 goto common_error;
528
529 case bfd_reloc_dangerous:
530 msg = _("internal error: dangerous error");
531 goto common_error;
532
533 default:
534 msg = _("internal error: unknown error");
535 /* fall through */
536
537 common_error:
1a72702b
AM
538 (*info->callbacks->warning) (info, msg, name, input_bfd,
539 input_section, rel->r_offset);
5e47149d
JL
540 break;
541 }
542 }
543 }
544
b34976b6 545 return TRUE;
5e47149d
JL
546}
547
0a83638b
JL
548/* Object files encode the specific H8 model they were compiled
549 for in the ELF flags field.
550
551 Examine that field and return the proper BFD machine type for
552 the object file. */
dc810e39 553static unsigned long
c6baf75e 554elf32_h8_mach (flagword flags)
0a83638b
JL
555{
556 switch (flags & EF_H8_MACH)
557 {
558 case E_H8_MACH_H8300:
559 default:
560 return bfd_mach_h8300;
561
562 case E_H8_MACH_H8300H:
563 return bfd_mach_h8300h;
564
565 case E_H8_MACH_H8300S:
566 return bfd_mach_h8300s;
8d9cd6b1
NC
567
568 case E_H8_MACH_H8300HN:
569 return bfd_mach_h8300hn;
570
571 case E_H8_MACH_H8300SN:
572 return bfd_mach_h8300sn;
5d1db417
MS
573
574 case E_H8_MACH_H8300SX:
575 return bfd_mach_h8300sx;
f4984206
RS
576
577 case E_H8_MACH_H8300SXN:
578 return bfd_mach_h8300sxn;
0a83638b
JL
579 }
580}
581
582/* The final processing done just before writing out a H8 ELF object
583 file. We use this opportunity to encode the BFD machine type
584 into the flags field in the object file. */
585
dc810e39 586static void
c6baf75e
RS
587elf32_h8_final_write_processing (bfd *abfd,
588 bfd_boolean linker ATTRIBUTE_UNUSED)
0a83638b
JL
589{
590 unsigned long val;
591
592 switch (bfd_get_mach (abfd))
593 {
594 default:
595 case bfd_mach_h8300:
596 val = E_H8_MACH_H8300;
597 break;
598
599 case bfd_mach_h8300h:
600 val = E_H8_MACH_H8300H;
601 break;
602
603 case bfd_mach_h8300s:
604 val = E_H8_MACH_H8300S;
605 break;
8d9cd6b1
NC
606
607 case bfd_mach_h8300hn:
608 val = E_H8_MACH_H8300HN;
609 break;
610
611 case bfd_mach_h8300sn:
612 val = E_H8_MACH_H8300SN;
613 break;
5d1db417
MS
614
615 case bfd_mach_h8300sx:
616 val = E_H8_MACH_H8300SX;
617 break;
f4984206
RS
618
619 case bfd_mach_h8300sxn:
620 val = E_H8_MACH_H8300SXN;
621 break;
0a83638b
JL
622 }
623
624 elf_elfheader (abfd)->e_flags &= ~ (EF_H8_MACH);
625 elf_elfheader (abfd)->e_flags |= val;
626}
627
628/* Return nonzero if ABFD represents a valid H8 ELF object file; also
629 record the encoded machine type found in the ELF flags. */
630
b34976b6 631static bfd_boolean
c6baf75e 632elf32_h8_object_p (bfd *abfd)
0a83638b
JL
633{
634 bfd_default_set_arch_mach (abfd, bfd_arch_h8300,
635 elf32_h8_mach (elf_elfheader (abfd)->e_flags));
b34976b6 636 return TRUE;
0a83638b
JL
637}
638
639/* Merge backend specific data from an object file to the output
640 object file when linking. The only data we need to copy at this
641 time is the architecture/machine information. */
642
b34976b6 643static bfd_boolean
50e03d47 644elf32_h8_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
0a83638b 645{
50e03d47
AM
646 bfd *obfd = info->output_bfd;
647
0a83638b
JL
648 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
649 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 650 return TRUE;
0a83638b
JL
651
652 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
653 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
654 {
655 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
96ef1419
KH
656 bfd_get_mach (ibfd)))
657 return FALSE;
0a83638b
JL
658 }
659
b34976b6 660 return TRUE;
0a83638b
JL
661}
662
5907e628
JL
663/* This function handles relaxing for the H8..
664
4cc11e76 665 There are a few relaxing opportunities available on the H8:
5907e628
JL
666
667 jmp/jsr:24 -> bra/bsr:8 2 bytes
668 The jmp may be completely eliminated if the previous insn is a
669 conditional branch to the insn after the jump. In that case
670 we invert the branch and delete the jump and save 4 bytes.
671
672 bCC:16 -> bCC:8 2 bytes
673 bsr:16 -> bsr:8 2 bytes
674
630a7b0a
KH
675 bset:16 -> bset:8 2 bytes
676 bset:24/32 -> bset:8 4 bytes
677 (also applicable to other bit manipulation instructions)
678
5907e628
JL
679 mov.b:16 -> mov.b:8 2 bytes
680 mov.b:24/32 -> mov.b:8 4 bytes
681
7e89635a
KH
682 bset:24/32 -> bset:16 2 bytes
683 (also applicable to other bit manipulation instructions)
684
81f5558e
NC
685 mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes
686
687 mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes. */
5907e628 688
b34976b6 689static bfd_boolean
c6baf75e
RS
690elf32_h8_relax_section (bfd *abfd, asection *sec,
691 struct bfd_link_info *link_info, bfd_boolean *again)
5907e628
JL
692{
693 Elf_Internal_Shdr *symtab_hdr;
694 Elf_Internal_Rela *internal_relocs;
5907e628
JL
695 Elf_Internal_Rela *irel, *irelend;
696 bfd_byte *contents = NULL;
6cdc0ccc 697 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
698 static asection *last_input_section = NULL;
699 static Elf_Internal_Rela *last_reloc = NULL;
700
701 /* Assume nothing changes. */
b34976b6 702 *again = FALSE;
5907e628 703
1049f94e 704 /* We don't have to do anything for a relocatable link, if
5907e628
JL
705 this section does not have relocs, or if this is not a
706 code section. */
0e1862bb 707 if (bfd_link_relocatable (link_info)
5907e628
JL
708 || (sec->flags & SEC_RELOC) == 0
709 || sec->reloc_count == 0
710 || (sec->flags & SEC_CODE) == 0)
b34976b6 711 return TRUE;
5907e628 712
5907e628
JL
713 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
714
715 /* Get a copy of the native relocations. */
45d6a902 716 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 717 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
5907e628
JL
718 link_info->keep_memory));
719 if (internal_relocs == NULL)
720 goto error_return;
5907e628
JL
721
722 if (sec != last_input_section)
723 last_reloc = NULL;
724
725 last_input_section = sec;
726
727 /* Walk through the relocs looking for relaxing opportunities. */
728 irelend = internal_relocs + sec->reloc_count;
729 for (irel = internal_relocs; irel < irelend; irel++)
730 {
731 bfd_vma symval;
732
bcb012d3
DD
733 {
734 arelent bfd_reloc;
bcb012d3
DD
735
736 elf32_h8_info_to_howto (abfd, &bfd_reloc, irel);
bcb012d3 737 }
5907e628
JL
738 /* Keep track of the previous reloc so that we can delete
739 some long jumps created by the compiler. */
740 if (irel != internal_relocs)
741 last_reloc = irel - 1;
1b786873 742
81f5558e
NC
743 switch(ELF32_R_TYPE (irel->r_info))
744 {
745 case R_H8_DIR24R8:
746 case R_H8_PCREL16:
747 case R_H8_DIR16A8:
748 case R_H8_DIR24A8:
749 case R_H8_DIR32A16:
750 case R_H8_DISP32A16:
751 break;
752 default:
753 continue;
754 }
76f99c63 755
5907e628
JL
756 /* Get the section contents if we haven't done so already. */
757 if (contents == NULL)
758 {
759 /* Get cached copy if it exists. */
760 if (elf_section_data (sec)->this_hdr.contents != NULL)
761 contents = elf_section_data (sec)->this_hdr.contents;
762 else
763 {
764 /* Go get them off disk. */
eea6121a 765 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
5907e628
JL
766 goto error_return;
767 }
768 }
769
9ad5cbcf 770 /* Read this BFD's local symbols if we haven't done so already. */
6cdc0ccc 771 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
5907e628 772 {
6cdc0ccc
AM
773 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
774 if (isymbuf == NULL)
775 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
776 symtab_hdr->sh_info, 0,
777 NULL, NULL, NULL);
778 if (isymbuf == NULL)
779 goto error_return;
5907e628
JL
780 }
781
782 /* Get the value of the symbol referred to by the reloc. */
783 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
784 {
5907e628 785 /* A local symbol. */
6cdc0ccc
AM
786 Elf_Internal_Sym *isym;
787 asection *sym_sec;
5907e628 788
32ac2c9a 789 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6cdc0ccc 790 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
03d14457
NC
791 symval = isym->st_value;
792 /* If the reloc is absolute, it will not have
793 a symbol or section associated with it. */
794 if (sym_sec)
795 symval += sym_sec->output_section->vma
796 + sym_sec->output_offset;
5907e628
JL
797 }
798 else
799 {
800 unsigned long indx;
801 struct elf_link_hash_entry *h;
802
803 /* An external symbol. */
804 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
805 h = elf_sym_hashes (abfd)[indx];
806 BFD_ASSERT (h != NULL);
807 if (h->root.type != bfd_link_hash_defined
808 && h->root.type != bfd_link_hash_defweak)
809 {
810 /* This appears to be a reference to an undefined
811 symbol. Just ignore it--it will be caught by the
812 regular reloc processing. */
813 continue;
814 }
815
816 symval = (h->root.u.def.value
817 + h->root.u.def.section->output_section->vma
818 + h->root.u.def.section->output_offset);
819 }
820
821 /* For simplicity of coding, we are going to modify the section
822 contents, the section relocs, and the BFD symbol table. We
823 must tell the rest of the code not to free up this
824 information. It would be possible to instead create a table
825 of changes which have to be made, as is done in coff-mips.c;
826 that would be more work, but would require less memory when
827 the linker is run. */
828 switch (ELF32_R_TYPE (irel->r_info))
829 {
81f5558e
NC
830 /* Try to turn a 24-bit absolute branch/call into an 8-bit
831 pc-relative branch/call. */
5907e628
JL
832 case R_H8_DIR24R8:
833 {
834 bfd_vma value = symval + irel->r_addend;
835 bfd_vma dot, gap;
836
837 /* Get the address of this instruction. */
838 dot = (sec->output_section->vma
839 + sec->output_offset + irel->r_offset - 1);
840
841 /* Compute the distance from this insn to the branch target. */
842 gap = value - dot;
843
844 /* If the distance is within -126..+130 inclusive, then we can
845 relax this jump. +130 is valid since the target will move
846 two bytes closer if we do relax this branch. */
dc810e39 847 if ((int) gap >= -126 && (int) gap <= 130)
5907e628
JL
848 {
849 unsigned char code;
850
851 /* Note that we've changed the relocs, section contents,
852 etc. */
853 elf_section_data (sec)->relocs = internal_relocs;
5907e628 854 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 855 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 856
e514ac71
NC
857 /* Get the instruction code being relaxed. */
858 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
859
5907e628
JL
860 /* If the previous instruction conditionally jumped around
861 this instruction, we may be able to reverse the condition
862 and redirect the previous instruction to the target of
863 this instruction.
864
865 Such sequences are used by the compiler to deal with
e514ac71
NC
866 long conditional branches.
867
868 Only perform this optimisation for jumps (code 0x5a) not
869 subroutine calls, as otherwise it could transform:
b34976b6 870
81f5558e
NC
871 mov.w r0,r0
872 beq .L1
873 jsr @_bar
874 .L1: rts
875 _bar: rts
e514ac71 876 into:
81f5558e
NC
877 mov.w r0,r0
878 bne _bar
879 rts
880 _bar: rts
e514ac71
NC
881
882 which changes the call (jsr) into a branch (bne). */
81f5558e 883 if (code == 0x5a /* jmp24. */
e514ac71 884 && (int) gap <= 130
dc810e39 885 && (int) gap >= -128
5907e628
JL
886 && last_reloc
887 && ELF32_R_TYPE (last_reloc->r_info) == R_H8_PCREL8
888 && ELF32_R_SYM (last_reloc->r_info) < symtab_hdr->sh_info)
889 {
890 bfd_vma last_value;
891 asection *last_sym_sec;
6cdc0ccc 892 Elf_Internal_Sym *last_sym;
5907e628
JL
893
894 /* We will need to examine the symbol used by the
895 previous relocation. */
dc810e39 896
6cdc0ccc 897 last_sym = isymbuf + ELF32_R_SYM (last_reloc->r_info);
5907e628 898 last_sym_sec
6cdc0ccc
AM
899 = bfd_section_from_elf_index (abfd, last_sym->st_shndx);
900 last_value = (last_sym->st_value
5907e628
JL
901 + last_sym_sec->output_section->vma
902 + last_sym_sec->output_offset);
903
904 /* Verify that the previous relocation was for a
905 branch around this instruction and that no symbol
906 exists at the current location. */
907 if (last_value == dot + 4
908 && last_reloc->r_offset + 2 == irel->r_offset
9ad5cbcf 909 && ! elf32_h8_symbol_address_p (abfd, sec, dot))
5907e628
JL
910 {
911 /* We can eliminate this jump. Twiddle the
912 previous relocation as necessary. */
913 irel->r_info
914 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
915 ELF32_R_TYPE (R_H8_NONE));
916
bc7eab72 917 last_reloc->r_info
5907e628 918 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
bc7eab72
KH
919 ELF32_R_TYPE (R_H8_PCREL8));
920 last_reloc->r_addend = irel->r_addend;
5907e628
JL
921
922 code = bfd_get_8 (abfd,
923 contents + last_reloc->r_offset - 1);
924 code ^= 1;
925 bfd_put_8 (abfd,
926 code,
81f5558e 927 contents + last_reloc->r_offset - 1);
5907e628
JL
928
929 /* Delete four bytes of data. */
930 if (!elf32_h8_relax_delete_bytes (abfd, sec,
931 irel->r_offset - 1,
932 4))
933 goto error_return;
934
b34976b6 935 *again = TRUE;
5907e628
JL
936 break;
937 }
938 }
939
5907e628 940 if (code == 0x5e)
81f5558e
NC
941 /* This is jsr24 */
942 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1); /* bsr8. */
5907e628 943 else if (code == 0x5a)
81f5558e
NC
944 /* This is jmp24 */
945 bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1); /* bra8. */
5907e628
JL
946 else
947 abort ();
948
949 /* Fix the relocation's type. */
950 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
951 R_H8_PCREL8);
952
953 /* Delete two bytes of data. */
954 if (!elf32_h8_relax_delete_bytes (abfd, sec,
955 irel->r_offset + 1, 2))
956 goto error_return;
957
958 /* That will change things, so, we should relax again.
959 Note that this is not required, and it may be slow. */
b34976b6 960 *again = TRUE;
5907e628
JL
961 }
962 break;
963 }
964
81f5558e
NC
965 /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative
966 branch. */
5907e628
JL
967 case R_H8_PCREL16:
968 {
969 bfd_vma value = symval + irel->r_addend;
970 bfd_vma dot;
971 bfd_vma gap;
972
973 /* Get the address of this instruction. */
974 dot = (sec->output_section->vma
975 + sec->output_offset
976 + irel->r_offset - 2);
dc810e39 977
5907e628
JL
978 gap = value - dot;
979
980 /* If the distance is within -126..+130 inclusive, then we can
981 relax this jump. +130 is valid since the target will move
982 two bytes closer if we do relax this branch. */
bc7eab72 983 if ((int) gap >= -126 && (int) gap <= 130)
5907e628 984 {
bc7eab72 985 unsigned char code;
5907e628 986
bc7eab72 987 /* Note that we've changed the relocs, section contents,
5907e628 988 etc. */
bc7eab72
KH
989 elf_section_data (sec)->relocs = internal_relocs;
990 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 991 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 992
bc7eab72
KH
993 /* Get the opcode. */
994 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628
JL
995
996 if (code == 0x58)
997 {
998 /* bCC:16 -> bCC:8 */
7e89635a
KH
999 /* Get the second byte of the original insn, which
1000 contains the condition code. */
5907e628 1001 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
7e89635a 1002
81f5558e 1003 /* Compute the first byte of the relaxed
7e89635a
KH
1004 instruction. The original sequence 0x58 0xX0
1005 is relaxed to 0x4X, where X represents the
1006 condition code. */
5907e628
JL
1007 code &= 0xf0;
1008 code >>= 4;
1009 code |= 0x40;
81f5558e 1010 bfd_put_8 (abfd, code, contents + irel->r_offset - 2); /* bCC:8. */
5907e628 1011 }
81f5558e 1012 else if (code == 0x5c) /* bsr16. */
7e89635a 1013 /* This is bsr. */
81f5558e 1014 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2); /* bsr8. */
5907e628 1015 else
bcb012d3
DD
1016 /* Might be MOVSD. */
1017 break;
5907e628
JL
1018
1019 /* Fix the relocation's type. */
bc7eab72 1020 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1021 R_H8_PCREL8);
bc7eab72 1022 irel->r_offset--;
5907e628 1023
bc7eab72
KH
1024 /* Delete two bytes of data. */
1025 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1026 irel->r_offset + 1, 2))
1027 goto error_return;
1028
bc7eab72 1029 /* That will change things, so, we should relax again.
5907e628 1030 Note that this is not required, and it may be slow. */
b34976b6 1031 *again = TRUE;
5907e628
JL
1032 }
1033 break;
1034 }
1035
81f5558e
NC
1036 /* This is a 16-bit absolute address in one of the following
1037 instructions:
630a7b0a
KH
1038
1039 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1040 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1041 "mov.b"
1042
81f5558e
NC
1043 We may relax this into an 8-bit absolute address if it's in
1044 the right range. */
5907e628
JL
1045 case R_H8_DIR16A8:
1046 {
7a9823f1 1047 bfd_vma value;
5907e628 1048
7a9823f1
RS
1049 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1050 if (value >= 0xffffff00u)
5907e628 1051 {
bc7eab72 1052 unsigned char code;
ca9a79a1 1053 unsigned char temp_code;
5907e628 1054
bc7eab72 1055 /* Note that we've changed the relocs, section contents,
5907e628 1056 etc. */
bc7eab72
KH
1057 elf_section_data (sec)->relocs = internal_relocs;
1058 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1059 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1060
bc7eab72
KH
1061 /* Get the opcode. */
1062 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1063
630a7b0a
KH
1064 /* All instructions with R_H8_DIR16A8 start with
1065 0x6a. */
bc7eab72 1066 if (code != 0x6a)
5907e628
JL
1067 abort ();
1068
ca9a79a1 1069 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
630a7b0a
KH
1070 /* If this is a mov.b instruction, clear the lower
1071 nibble, which contains the source/destination
1072 register number. */
ca9a79a1
NC
1073 if ((temp_code & 0x10) != 0x10)
1074 temp_code &= 0xf0;
5907e628 1075
ca9a79a1
NC
1076 switch (temp_code)
1077 {
1078 case 0x00:
630a7b0a 1079 /* This is mov.b @aa:16,Rd. */
ca9a79a1
NC
1080 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1081 contents + irel->r_offset - 2);
1082 break;
1083 case 0x80:
630a7b0a 1084 /* This is mov.b Rs,@aa:16. */
ca9a79a1
NC
1085 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1086 contents + irel->r_offset - 2);
1087 break;
1088 case 0x18:
630a7b0a
KH
1089 /* This is a bit-maniputation instruction that
1090 stores one bit into memory, one of "bclr",
1091 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1092 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1093 break;
1094 case 0x10:
630a7b0a
KH
1095 /* This is a bit-maniputation instruction that
1096 loads one bit from memory, one of "band",
1097 "biand", "bild", "bior", "bixor", "bld", "bor",
1098 "btst", and "bxor". */
ca9a79a1
NC
1099 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1100 break;
1101 default:
1102 abort ();
1103 }
5907e628 1104
bc7eab72
KH
1105 /* Fix the relocation's type. */
1106 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628
JL
1107 R_H8_DIR8);
1108
8c17da6e
NC
1109 /* Move the relocation. */
1110 irel->r_offset--;
1111
bc7eab72
KH
1112 /* Delete two bytes of data. */
1113 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1114 irel->r_offset + 1, 2))
1115 goto error_return;
1116
bc7eab72 1117 /* That will change things, so, we should relax again.
5907e628 1118 Note that this is not required, and it may be slow. */
b34976b6 1119 *again = TRUE;
5907e628
JL
1120 }
1121 break;
1122 }
1123
81f5558e
NC
1124 /* This is a 24-bit absolute address in one of the following
1125 instructions:
630a7b0a
KH
1126
1127 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1128 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1129 "mov.b"
1130
81f5558e
NC
1131 We may relax this into an 8-bit absolute address if it's in
1132 the right range. */
5907e628
JL
1133 case R_H8_DIR24A8:
1134 {
7a9823f1 1135 bfd_vma value;
5907e628 1136
7a9823f1
RS
1137 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1138 if (value >= 0xffffff00u)
5907e628 1139 {
bc7eab72 1140 unsigned char code;
ca9a79a1 1141 unsigned char temp_code;
5907e628 1142
bc7eab72 1143 /* Note that we've changed the relocs, section contents,
5907e628 1144 etc. */
bc7eab72
KH
1145 elf_section_data (sec)->relocs = internal_relocs;
1146 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1147 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1148
bc7eab72
KH
1149 /* Get the opcode. */
1150 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1151
630a7b0a
KH
1152 /* All instructions with R_H8_DIR24A8 start with
1153 0x6a. */
bc7eab72 1154 if (code != 0x6a)
5907e628
JL
1155 abort ();
1156
ca9a79a1
NC
1157 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1158
630a7b0a
KH
1159 /* If this is a mov.b instruction, clear the lower
1160 nibble, which contains the source/destination
1161 register number. */
ca9a79a1
NC
1162 if ((temp_code & 0x30) != 0x30)
1163 temp_code &= 0xf0;
5907e628 1164
ca9a79a1 1165 switch (temp_code)
03d14457 1166 {
7a9823f1 1167 case 0x20:
630a7b0a 1168 /* This is mov.b @aa:24/32,Rd. */
03d14457
NC
1169 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1170 contents + irel->r_offset - 2);
1171 break;
7a9823f1 1172 case 0xa0:
630a7b0a 1173 /* This is mov.b Rs,@aa:24/32. */
03d14457
NC
1174 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1175 contents + irel->r_offset - 2);
1176 break;
ca9a79a1 1177 case 0x38:
630a7b0a
KH
1178 /* This is a bit-maniputation instruction that
1179 stores one bit into memory, one of "bclr",
1180 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1181 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1182 break;
1183 case 0x30:
630a7b0a
KH
1184 /* This is a bit-maniputation instruction that
1185 loads one bit from memory, one of "band",
1186 "biand", "bild", "bior", "bixor", "bld", "bor",
1187 "btst", and "bxor". */
ca9a79a1
NC
1188 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1189 break;
03d14457 1190 default:
ca9a79a1 1191 abort();
03d14457
NC
1192 }
1193
bc7eab72
KH
1194 /* Fix the relocation's type. */
1195 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1196 R_H8_DIR8);
7a9823f1 1197 irel->r_offset--;
5907e628 1198
81f5558e 1199 /* Delete four bytes of data. */
7a9823f1
RS
1200 if (!elf32_h8_relax_delete_bytes (abfd, sec,
1201 irel->r_offset + 1, 4))
5907e628
JL
1202 goto error_return;
1203
bc7eab72 1204 /* That will change things, so, we should relax again.
5907e628 1205 Note that this is not required, and it may be slow. */
b34976b6 1206 *again = TRUE;
7a9823f1 1207 break;
5907e628
JL
1208 }
1209 }
1210
7e89635a
KH
1211 /* Fall through. */
1212
1213 /* This is a 24-/32-bit absolute address in one of the
1214 following instructions:
1215
81f5558e
NC
1216 "band", "bclr", "biand", "bild", "bior", "bist",
1217 "bixor", "bld", "bnot", "bor", "bset", "bst", "btst",
1218 "bxor", "ldc.w", "stc.w" and "mov.[bwl]"
5907e628 1219
7e89635a
KH
1220 We may relax this into an 16-bit absolute address if it's
1221 in the right range. */
5907e628
JL
1222 case R_H8_DIR32A16:
1223 {
7a9823f1 1224 bfd_vma value;
5907e628 1225
7a9823f1
RS
1226 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1227 if (value <= 0x7fff || value >= 0xffff8000u)
5907e628 1228 {
bc7eab72 1229 unsigned char code;
bcb012d3
DD
1230 unsigned char op0, op1, op2, op3;
1231 unsigned char *op_ptr;
5907e628 1232
bc7eab72 1233 /* Note that we've changed the relocs, section contents,
5907e628 1234 etc. */
bc7eab72
KH
1235 elf_section_data (sec)->relocs = internal_relocs;
1236 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1237 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1238
bcb012d3
DD
1239 if (irel->r_offset >= 4)
1240 {
81f5558e 1241 /* Check for 4-byte MOVA relaxation (SH-specific). */
bcb012d3
DD
1242 int second_reloc = 0;
1243
1244 op_ptr = contents + irel->r_offset - 4;
1245
1246 if (last_reloc)
1247 {
1248 arelent bfd_reloc;
1249 reloc_howto_type *h;
1250 bfd_vma last_reloc_size;
1251
1252 elf32_h8_info_to_howto (abfd, &bfd_reloc, last_reloc);
1253 h = bfd_reloc.howto;
1254 last_reloc_size = 1 << h->size;
1255 if (last_reloc->r_offset + last_reloc_size
1256 == irel->r_offset)
1257 {
1258 op_ptr -= last_reloc_size;
1259 second_reloc = 1;
1260 }
1261 }
81f5558e 1262
d79dcc73 1263 if (irel + 1 < irelend)
bcb012d3
DD
1264 {
1265 Elf_Internal_Rela *next_reloc = irel + 1;
1266 arelent bfd_reloc;
1267 reloc_howto_type *h;
1268 bfd_vma next_reloc_size;
1269
1270 elf32_h8_info_to_howto (abfd, &bfd_reloc, next_reloc);
1271 h = bfd_reloc.howto;
1272 next_reloc_size = 1 << h->size;
1273 if (next_reloc->r_offset + next_reloc_size
1274 == irel->r_offset)
1275 {
1276 op_ptr -= next_reloc_size;
1277 second_reloc = 1;
1278 }
1279 }
1280
1281 op0 = bfd_get_8 (abfd, op_ptr + 0);
1282 op1 = bfd_get_8 (abfd, op_ptr + 1);
1283 op2 = bfd_get_8 (abfd, op_ptr + 2);
1284 op3 = bfd_get_8 (abfd, op_ptr + 3);
1285
1286 if (op0 == 0x01
1287 && (op1 & 0xdf) == 0x5f
1288 && (op2 & 0x40) == 0x40
1289 && (op3 & 0x80) == 0x80)
1290 {
1291 if ((op2 & 0x08) == 0)
1292 second_reloc = 1;
1293
1294 if (second_reloc)
1295 {
1296 op3 &= ~0x08;
1297 bfd_put_8 (abfd, op3, op_ptr + 3);
1298 }
1299 else
1300 {
1301 op2 &= ~0x08;
1302 bfd_put_8 (abfd, op2, op_ptr + 2);
1303 }
1304 goto r_h8_dir32a16_common;
1305 }
1306 }
1307
81f5558e 1308 /* Now check for short version of MOVA. (SH-specific) */
bcb012d3
DD
1309 op_ptr = contents + irel->r_offset - 2;
1310 op0 = bfd_get_8 (abfd, op_ptr + 0);
1311 op1 = bfd_get_8 (abfd, op_ptr + 1);
1312
1313 if (op0 == 0x7a
1314 && (op1 & 0x88) == 0x80)
1315 {
1316 op1 |= 0x08;
1317 bfd_put_8 (abfd, op1, op_ptr + 1);
1318 goto r_h8_dir32a16_common;
1319 }
1320
bc7eab72
KH
1321 /* Get the opcode. */
1322 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
5907e628 1323
7e89635a
KH
1324 /* Fix the opcode. For all the instructions that
1325 belong to this relaxation, we simply need to turn
1326 off bit 0x20 in the previous byte. */
bc7eab72 1327 code &= ~0x20;
5907e628 1328
bc7eab72 1329 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
5907e628 1330
bcb012d3 1331 r_h8_dir32a16_common:
bc7eab72
KH
1332 /* Fix the relocation's type. */
1333 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8c17da6e 1334 R_H8_DIR16);
5907e628 1335
bc7eab72
KH
1336 /* Delete two bytes of data. */
1337 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1338 irel->r_offset + 1, 2))
1339 goto error_return;
1340
bc7eab72 1341 /* That will change things, so, we should relax again.
5907e628 1342 Note that this is not required, and it may be slow. */
b34976b6 1343 *again = TRUE;
5907e628 1344 }
81f5558e 1345 break; /* case R_H8_DIR32A16 */
5907e628
JL
1346 }
1347
81f5558e
NC
1348 case R_H8_DISP32A16:
1349 /* mov.[bwl] @(displ:24/32+ERx) -> mov.[bwl] @(displ:16+ERx) 4 bytes
1350 It is assured that instruction uses at least 4 bytes opcode before
1351 reloc entry addressing mode "register indirect with displacement"
1352 relaxing options (all saving 4 bytes):
1353 0x78 0sss0000 0x6A 0010dddd disp:32 mov.b @(d:32,ERs),Rd ->
1354 0x6E 0sssdddd disp:16 mov.b @(d:16,ERs),Rd
1355 0x78 0sss0000 0x6B 0010dddd disp:32 mov.w @(d:32,ERs),Rd ->
1356 0x6F 0sssdddd disp:16 mov.w @(d:16,ERs),Rd
1357 0x01 0x00 0x78 0sss0000 0x6B 00100ddd disp:32 mov.l @(d:32,ERs),ERd ->
1358 0x01 0x00 0x6F 0sss0ddd disp:16 mov.l @(d:16,ERs),ERd
1359
1360 0x78 0ddd0000 0x6A 1010ssss disp:32 mov.b Rs,@(d:32,ERd) ->
1361 0x6E 1dddssss disp:16 mov.b Rs,@(d:16,ERd)
1362 0x78 0ddd0000 0x6B 1010ssss disp:32 mov.w Rs,@(d:32,ERd) ->
1363 0x6F 1dddssss disp:16 mov.w Rs,@(d:16,ERd)
1364 0x01 0x00 0x78 xddd0000 0x6B 10100sss disp:32 mov.l ERs,@(d:32,ERd) ->
1365 0x01 0x00 0x6F 1ddd0sss disp:16 mov.l ERs,@(d:16,ERd)
1366 mov.l prefix 0x01 0x00 can be left as is and mov.l handled same
1367 as mov.w/ */
1368 {
1369 bfd_vma value;
1370
1371 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1372 if (value <= 0x7fff || value >= 0xffff8000u)
1373 {
1374 unsigned char op0, op1, op2, op3, op0n, op1n;
1375 int relax = 0;
1376
1377 /* Note that we've changed the relocs, section contents,
1378 etc. */
1379 elf_section_data (sec)->relocs = internal_relocs;
1380 elf_section_data (sec)->this_hdr.contents = contents;
1381 symtab_hdr->contents = (unsigned char *) isymbuf;
1382
1383 if (irel->r_offset >= 4)
1384 {
1385 op0 = bfd_get_8 (abfd, contents + irel->r_offset - 4);
1386 op1 = bfd_get_8 (abfd, contents + irel->r_offset - 3);
1387 op2 = bfd_get_8 (abfd, contents + irel->r_offset - 2);
1388 op3 = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1389
1390 if (op0 == 0x78)
1391 {
1392 switch(op2)
1393 {
1394 case 0x6A:
1395 if ((op1 & 0x8F) == 0x00 && (op3 & 0x70) == 0x20)
1396 {
1397 /* mov.b. */
1398 op0n = 0x6E;
1399 relax = 1;
1400 }
1401 break;
1402 case 0x6B:
1403 if ((op1 & 0x0F) == 0x00 && (op3 & 0x70) == 0x20)
1404 {
1405 /* mov.w/l. */
1406 op0n = 0x6F;
1407 relax = 1;
1408 }
1409 break;
1410 default:
1411 break;
1412 }
1413 }
1414 }
1415
1416 if (relax)
1417 {
1418 op1n = (op3 & 0x8F) | (op1 & 0x70);
1419 bfd_put_8 (abfd, op0n, contents + irel->r_offset - 4);
1420 bfd_put_8 (abfd, op1n, contents + irel->r_offset - 3);
1421
1422 /* Fix the relocation's type. */
1423 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_H8_DIR16);
1424 irel->r_offset -= 2;
1425
1426 /* Delete four bytes of data. */
1427 if (!elf32_h8_relax_delete_bytes (abfd, sec, irel->r_offset + 2, 4))
1428 goto error_return;
1429
1430 /* That will change things, so, we should relax again.
1431 Note that this is not required, and it may be slow. */
1432 *again = TRUE;
1433 }
1434 }
1435 }
1436 break;
1437
5907e628
JL
1438 default:
1439 break;
1440 }
1441 }
1442
6cdc0ccc
AM
1443 if (isymbuf != NULL
1444 && symtab_hdr->contents != (unsigned char *) isymbuf)
5907e628 1445 {
6cdc0ccc
AM
1446 if (! link_info->keep_memory)
1447 free (isymbuf);
1448 else
1449 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628
JL
1450 }
1451
6cdc0ccc
AM
1452 if (contents != NULL
1453 && elf_section_data (sec)->this_hdr.contents != contents)
5907e628
JL
1454 {
1455 if (! link_info->keep_memory)
6cdc0ccc 1456 free (contents);
5907e628
JL
1457 else
1458 {
1459 /* Cache the section contents for elf_link_input_bfd. */
1460 elf_section_data (sec)->this_hdr.contents = contents;
1461 }
9ad5cbcf
AM
1462 }
1463
6cdc0ccc
AM
1464 if (internal_relocs != NULL
1465 && elf_section_data (sec)->relocs != internal_relocs)
1466 free (internal_relocs);
5907e628 1467
b34976b6 1468 return TRUE;
5907e628
JL
1469
1470 error_return:
6cdc0ccc
AM
1471 if (isymbuf != NULL
1472 && symtab_hdr->contents != (unsigned char *) isymbuf)
1473 free (isymbuf);
1474 if (contents != NULL
1475 && elf_section_data (sec)->this_hdr.contents != contents)
1476 free (contents);
1477 if (internal_relocs != NULL
1478 && elf_section_data (sec)->relocs != internal_relocs)
1479 free (internal_relocs);
b34976b6 1480 return FALSE;
5907e628
JL
1481}
1482
1483/* Delete some bytes from a section while relaxing. */
1484
b34976b6 1485static bfd_boolean
c6baf75e 1486elf32_h8_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count)
5907e628
JL
1487{
1488 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1489 unsigned int sec_shndx;
5907e628
JL
1490 bfd_byte *contents;
1491 Elf_Internal_Rela *irel, *irelend;
6cdc0ccc
AM
1492 Elf_Internal_Sym *isym;
1493 Elf_Internal_Sym *isymend;
5907e628 1494 bfd_vma toaddr;
9ad5cbcf
AM
1495 struct elf_link_hash_entry **sym_hashes;
1496 struct elf_link_hash_entry **end_hashes;
1497 unsigned int symcount;
5907e628 1498
9ad5cbcf 1499 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1500
1501 contents = elf_section_data (sec)->this_hdr.contents;
1502
eea6121a 1503 toaddr = sec->size;
5907e628
JL
1504
1505 irel = elf_section_data (sec)->relocs;
1506 irelend = irel + sec->reloc_count;
1507
1508 /* Actually delete the bytes. */
dc810e39
AM
1509 memmove (contents + addr, contents + addr + count,
1510 (size_t) (toaddr - addr - count));
eea6121a 1511 sec->size -= count;
5907e628
JL
1512
1513 /* Adjust all the relocs. */
1514 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1515 {
1516 /* Get the new reloc address. */
1517 if ((irel->r_offset > addr
5c0df484 1518 && irel->r_offset <= toaddr))
5907e628
JL
1519 irel->r_offset -= count;
1520 }
1521
1522 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1523 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1524 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1525 isymend = isym + symtab_hdr->sh_info;
1526 for (; isym < isymend; isym++)
5907e628 1527 {
6cdc0ccc
AM
1528 if (isym->st_shndx == sec_shndx
1529 && isym->st_value > addr
5c0df484 1530 && isym->st_value <= toaddr)
6cdc0ccc 1531 isym->st_value -= count;
5907e628
JL
1532 }
1533
1534 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1535 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1536 - symtab_hdr->sh_info);
1537 sym_hashes = elf_sym_hashes (abfd);
1538 end_hashes = sym_hashes + symcount;
1539 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1540 {
9ad5cbcf 1541 struct elf_link_hash_entry *sym_hash = *sym_hashes;
5c0df484 1542
9ad5cbcf
AM
1543 if ((sym_hash->root.type == bfd_link_hash_defined
1544 || sym_hash->root.type == bfd_link_hash_defweak)
1545 && sym_hash->root.u.def.section == sec
1546 && sym_hash->root.u.def.value > addr
5c0df484
NC
1547 && sym_hash->root.u.def.value <= toaddr)
1548 sym_hash->root.u.def.value -= count;
5907e628
JL
1549 }
1550
b34976b6 1551 return TRUE;
5907e628
JL
1552}
1553
b34976b6
AM
1554/* Return TRUE if a symbol exists at the given address, else return
1555 FALSE. */
1556static bfd_boolean
c6baf75e 1557elf32_h8_symbol_address_p (bfd *abfd, asection *sec, bfd_vma addr)
5907e628
JL
1558{
1559 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1560 unsigned int sec_shndx;
6cdc0ccc
AM
1561 Elf_Internal_Sym *isym;
1562 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1563 struct elf_link_hash_entry **sym_hashes;
1564 struct elf_link_hash_entry **end_hashes;
1565 unsigned int symcount;
5907e628 1566
9ad5cbcf 1567 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1568
1569 /* Examine all the symbols. */
9ad5cbcf 1570 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc
AM
1571 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1572 isymend = isym + symtab_hdr->sh_info;
1573 for (; isym < isymend; isym++)
5907e628 1574 {
6cdc0ccc
AM
1575 if (isym->st_shndx == sec_shndx
1576 && isym->st_value == addr)
b34976b6 1577 return TRUE;
5907e628
JL
1578 }
1579
9ad5cbcf
AM
1580 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1581 - symtab_hdr->sh_info);
1582 sym_hashes = elf_sym_hashes (abfd);
1583 end_hashes = sym_hashes + symcount;
1584 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1585 {
9ad5cbcf
AM
1586 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1587 if ((sym_hash->root.type == bfd_link_hash_defined
1588 || sym_hash->root.type == bfd_link_hash_defweak)
1589 && sym_hash->root.u.def.section == sec
1590 && sym_hash->root.u.def.value == addr)
b34976b6 1591 return TRUE;
5907e628 1592 }
9ad5cbcf 1593
b34976b6 1594 return FALSE;
5907e628
JL
1595}
1596
1597/* This is a version of bfd_generic_get_relocated_section_contents
1598 which uses elf32_h8_relocate_section. */
1599
1600static bfd_byte *
c6baf75e
RS
1601elf32_h8_get_relocated_section_contents (bfd *output_bfd,
1602 struct bfd_link_info *link_info,
1603 struct bfd_link_order *link_order,
1604 bfd_byte *data,
1605 bfd_boolean relocatable,
1606 asymbol **symbols)
5907e628
JL
1607{
1608 Elf_Internal_Shdr *symtab_hdr;
1609 asection *input_section = link_order->u.indirect.section;
1610 bfd *input_bfd = input_section->owner;
1611 asection **sections = NULL;
1612 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1613 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
1614
1615 /* We only need to handle the case of relaxing, or of having a
1616 particular set of section contents, specially. */
1049f94e 1617 if (relocatable
5907e628
JL
1618 || elf_section_data (input_section)->this_hdr.contents == NULL)
1619 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1620 link_order, data,
1049f94e 1621 relocatable,
5907e628
JL
1622 symbols);
1623
1624 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1625
1626 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1627 (size_t) input_section->size);
5907e628
JL
1628
1629 if ((input_section->flags & SEC_RELOC) != 0
1630 && input_section->reloc_count > 0)
1631 {
5907e628 1632 asection **secpp;
6cdc0ccc 1633 Elf_Internal_Sym *isym, *isymend;
9ad5cbcf 1634 bfd_size_type amt;
5907e628 1635
45d6a902 1636 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 1637 (input_bfd, input_section, NULL,
b34976b6 1638 (Elf_Internal_Rela *) NULL, FALSE));
5907e628
JL
1639 if (internal_relocs == NULL)
1640 goto error_return;
1641
6cdc0ccc
AM
1642 if (symtab_hdr->sh_info != 0)
1643 {
1644 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1645 if (isymbuf == NULL)
1646 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1647 symtab_hdr->sh_info, 0,
1648 NULL, NULL, NULL);
1649 if (isymbuf == NULL)
1650 goto error_return;
1651 }
5907e628 1652
9ad5cbcf
AM
1653 amt = symtab_hdr->sh_info;
1654 amt *= sizeof (asection *);
1655 sections = (asection **) bfd_malloc (amt);
1656 if (sections == NULL && amt != 0)
5907e628
JL
1657 goto error_return;
1658
6cdc0ccc
AM
1659 isymend = isymbuf + symtab_hdr->sh_info;
1660 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
5907e628
JL
1661 {
1662 asection *isec;
1663
6cdc0ccc 1664 if (isym->st_shndx == SHN_UNDEF)
5907e628 1665 isec = bfd_und_section_ptr;
6cdc0ccc 1666 else if (isym->st_shndx == SHN_ABS)
5907e628 1667 isec = bfd_abs_section_ptr;
6cdc0ccc 1668 else if (isym->st_shndx == SHN_COMMON)
5907e628
JL
1669 isec = bfd_com_section_ptr;
1670 else
6cdc0ccc 1671 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
5907e628
JL
1672
1673 *secpp = isec;
1674 }
1675
1676 if (! elf32_h8_relocate_section (output_bfd, link_info, input_bfd,
1677 input_section, data, internal_relocs,
6cdc0ccc 1678 isymbuf, sections))
5907e628
JL
1679 goto error_return;
1680
1681 if (sections != NULL)
1682 free (sections);
6cdc0ccc
AM
1683 if (isymbuf != NULL
1684 && symtab_hdr->contents != (unsigned char *) isymbuf)
1685 free (isymbuf);
1686 if (elf_section_data (input_section)->relocs != internal_relocs)
5907e628 1687 free (internal_relocs);
5907e628
JL
1688 }
1689
1690 return data;
1691
1692 error_return:
5907e628
JL
1693 if (sections != NULL)
1694 free (sections);
6cdc0ccc
AM
1695 if (isymbuf != NULL
1696 && symtab_hdr->contents != (unsigned char *) isymbuf)
1697 free (isymbuf);
1698 if (internal_relocs != NULL
1699 && elf_section_data (input_section)->relocs != internal_relocs)
1700 free (internal_relocs);
5907e628
JL
1701 return NULL;
1702}
1703
0a83638b 1704
6d00b590 1705#define TARGET_BIG_SYM h8300_elf32_vec
e01b0e69
JR
1706#define TARGET_BIG_NAME "elf32-h8300"
1707#define ELF_ARCH bfd_arch_h8300
1708#define ELF_MACHINE_CODE EM_H8_300
1709#define ELF_MAXPAGESIZE 0x1
1710#define bfd_elf32_bfd_reloc_type_lookup elf32_h8_reloc_type_lookup
157090f7 1711#define bfd_elf32_bfd_reloc_name_lookup elf32_h8_reloc_name_lookup
e01b0e69
JR
1712#define elf_info_to_howto elf32_h8_info_to_howto
1713#define elf_info_to_howto_rel elf32_h8_info_to_howto_rel
1714
0a83638b
JL
1715/* So we can set/examine bits in e_flags to get the specific
1716 H8 architecture in use. */
1717#define elf_backend_final_write_processing \
1718 elf32_h8_final_write_processing
1719#define elf_backend_object_p \
1720 elf32_h8_object_p
1721#define bfd_elf32_bfd_merge_private_bfd_data \
1722 elf32_h8_merge_private_bfd_data
1723
e01b0e69
JR
1724/* ??? when elf_backend_relocate_section is not defined, elf32-target.h
1725 defaults to using _bfd_generic_link_hash_table_create, but
c152c796 1726 bfd_elf_size_dynamic_sections uses
e01b0e69
JR
1727 dynobj = elf_hash_table (info)->dynobj;
1728 and thus requires an elf hash table. */
1729#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
1730
5e47149d
JL
1731/* Use an H8 specific linker, not the ELF generic linker. */
1732#define elf_backend_relocate_section elf32_h8_relocate_section
f0fe0e16 1733#define elf_backend_rela_normal 1
2627de83 1734#define elf_backend_can_gc_sections 1
5e47149d 1735
5907e628
JL
1736/* And relaxing stuff. */
1737#define bfd_elf32_bfd_relax_section elf32_h8_relax_section
1738#define bfd_elf32_bfd_get_relocated_section_contents \
1739 elf32_h8_get_relocated_section_contents
1740
84477db9 1741#define elf_symbol_leading_char '_'
5907e628 1742
e01b0e69 1743#include "elf32-target.h"
5518c738
YS
1744
1745#undef TARGET_BIG_SYM
1746#define TARGET_BIG_SYM h8300_elf32_linux_vec
1747#undef TARGET_BIG_NAME
1748#define TARGET_BIG_NAME "elf32-h8300-linux"
1749#undef elf_symbol_leading_char
1750#define elf32_bed elf32_h8300_linux_bed
1751
1752#include "elf32-target.h"