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2469cfa2 1/* MSP430-specific support for 32-bit ELF
ab96bf03 2 Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007
07adf181 3 Free Software Foundation, Inc.
2469cfa2
NC		 4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of BFD, the Binary File Descriptor library.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
3e110533 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
2469cfa2 21
2469cfa2 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
2469cfa2
NC		 24#include "libiberty.h"
25#include "libbfd.h"
26#include "elf-bfd.h"
27#include "elf/msp430.h"
28
2469cfa2
NC		 29/* Use RELA instead of REL. */
30#undef USE_REL
31
32static reloc_howto_type elf_msp430_howto_table[] =
33{
34 HOWTO (R_MSP430_NONE, /* type */
35 0, /* rightshift */
36 2, /* size (0 = byte, 1 = short, 2 = long) */
37 32, /* bitsize */
38 FALSE, /* pc_relative */
39 0, /* bitpos */
b18c562e 40 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 41 bfd_elf_generic_reloc, /* special_function */
42 "R_MSP430_NONE", /* name */
43 FALSE, /* partial_inplace */
44 0, /* src_mask */
45 0, /* dst_mask */
46 FALSE), /* pcrel_offset */
47
48 HOWTO (R_MSP430_32, /* type */
49 0, /* rightshift */
50 2, /* size (0 = byte, 1 = short, 2 = long) */
51 32, /* bitsize */
52 FALSE, /* pc_relative */
53 0, /* bitpos */
b18c562e 54 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 55 bfd_elf_generic_reloc, /* special_function */
56 "R_MSP430_32", /* name */
57 FALSE, /* partial_inplace */
58 0xffffffff, /* src_mask */
59 0xffffffff, /* dst_mask */
60 FALSE), /* pcrel_offset */
61
62 /* A 13 bit PC relative relocation. */
63 HOWTO (R_MSP430_10_PCREL, /* type */
64 1, /* rightshift */
65 1, /* size (0 = byte, 1 = short, 2 = long) */
66 10, /* bitsize */
67 TRUE, /* pc_relative */
68 0, /* bitpos */
b18c562e 69 complain_overflow_bitfield,/* complain_on_overflow */
2469cfa2
NC		 70 bfd_elf_generic_reloc, /* special_function */
71 "R_MSP430_13_PCREL", /* name */
72 FALSE, /* partial_inplace */
73 0xfff, /* src_mask */
74 0xfff, /* dst_mask */
75 TRUE), /* pcrel_offset */
76
77 /* A 16 bit absolute relocation. */
78 HOWTO (R_MSP430_16, /* type */
79 0, /* rightshift */
80 1, /* size (0 = byte, 1 = short, 2 = long) */
81 16, /* bitsize */
82 FALSE, /* pc_relative */
83 0, /* bitpos */
84 complain_overflow_dont,/* complain_on_overflow */
85 bfd_elf_generic_reloc, /* special_function */
86 "R_MSP430_16", /* name */
87 FALSE, /* partial_inplace */
b18c562e 88 0, /* src_mask */
2469cfa2
NC		 89 0xffff, /* dst_mask */
90 FALSE), /* pcrel_offset */
91
92 /* A 16 bit absolute relocation for command address. */
93 HOWTO (R_MSP430_16_PCREL, /* type */
94 1, /* rightshift */
95 1, /* size (0 = byte, 1 = short, 2 = long) */
96 16, /* bitsize */
97 TRUE, /* pc_relative */
98 0, /* bitpos */
99 complain_overflow_dont,/* complain_on_overflow */
100 bfd_elf_generic_reloc, /* special_function */
101 "R_MSP430_16_PCREL", /* name */
102 FALSE, /* partial_inplace */
b18c562e 103 0, /* src_mask */
2469cfa2
NC		 104 0xffff, /* dst_mask */
105 TRUE), /* pcrel_offset */
106
107 /* A 16 bit absolute relocation, byte operations. */
108 HOWTO (R_MSP430_16_BYTE, /* type */
109 0, /* rightshift */
110 1, /* size (0 = byte, 1 = short, 2 = long) */
111 16, /* bitsize */
112 FALSE, /* pc_relative */
113 0, /* bitpos */
114 complain_overflow_dont,/* complain_on_overflow */
115 bfd_elf_generic_reloc, /* special_function */
116 "R_MSP430_16_BYTE", /* name */
117 FALSE, /* partial_inplace */
118 0xffff, /* src_mask */
119 0xffff, /* dst_mask */
120 FALSE), /* pcrel_offset */
121
122 /* A 16 bit absolute relocation for command address. */
123 HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
124 1, /* rightshift */
125 1, /* size (0 = byte, 1 = short, 2 = long) */
126 16, /* bitsize */
127 TRUE, /* pc_relative */
128 0, /* bitpos */
129 complain_overflow_dont,/* complain_on_overflow */
130 bfd_elf_generic_reloc, /* special_function */
b18c562e 131 "R_MSP430_16_PCREL_BYTE",/* name */
2469cfa2
NC		 132 FALSE, /* partial_inplace */
133 0xffff, /* src_mask */
134 0xffff, /* dst_mask */
b18c562e
NC		 135 TRUE), /* pcrel_offset */
136
137 /* A 13 bit PC relative relocation for complicated polymorphs. */
138 HOWTO (R_MSP430_2X_PCREL, /* type */
139 1, /* rightshift */
140 2, /* size (0 = byte, 1 = short, 2 = long) */
141 10, /* bitsize */
142 TRUE, /* pc_relative */
143 0, /* bitpos */
144 complain_overflow_bitfield,/* complain_on_overflow */
145 bfd_elf_generic_reloc, /* special_function */
146 "R_MSP430_2X_PCREL", /* name */
147 FALSE, /* partial_inplace */
148 0xfff, /* src_mask */
149 0xfff, /* dst_mask */
150 TRUE), /* pcrel_offset */
151
152 /* A 16 bit relaxable relocation for command address. */
153 HOWTO (R_MSP430_RL_PCREL, /* type */
154 1, /* rightshift */
155 1, /* size (0 = byte, 1 = short, 2 = long) */
156 16, /* bitsize */
157 TRUE, /* pc_relative */
158 0, /* bitpos */
159 complain_overflow_dont,/* complain_on_overflow */
160 bfd_elf_generic_reloc, /* special_function */
161 "R_MSP430_RL_PCREL", /* name */
162 FALSE, /* partial_inplace */
163 0, /* src_mask */
164 0xffff, /* dst_mask */
2469cfa2
NC		 165 TRUE) /* pcrel_offset */
166};
167
168/* Map BFD reloc types to MSP430 ELF reloc types. */
169
170struct msp430_reloc_map
171{
172 bfd_reloc_code_real_type bfd_reloc_val;
173 unsigned int elf_reloc_val;
174};
175
176static const struct msp430_reloc_map msp430_reloc_map[] =
177 {
b18c562e
NC		 178 {BFD_RELOC_NONE, R_MSP430_NONE},
179 {BFD_RELOC_32, R_MSP430_32},
180 {BFD_RELOC_MSP430_10_PCREL, R_MSP430_10_PCREL},
181 {BFD_RELOC_16, R_MSP430_16_BYTE},
182 {BFD_RELOC_MSP430_16_PCREL, R_MSP430_16_PCREL},
183 {BFD_RELOC_MSP430_16, R_MSP430_16},
2469cfa2 184 {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
b18c562e
NC		 185 {BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
186 {BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
187 {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
2469cfa2
NC		 188 };
189
190static reloc_howto_type *
b18c562e
NC		 191bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
192 bfd_reloc_code_real_type code)
2469cfa2
NC		 193{
194 unsigned int i;
195
196 for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
197 if (msp430_reloc_map[i].bfd_reloc_val == code)
198 return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
199
200 return NULL;
201}
202
157090f7
AM		 203static reloc_howto_type *
204bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
205 const char *r_name)
206{
207 unsigned int i;
208
209 for (i = 0;
210 i < (sizeof (elf_msp430_howto_table)
211 / sizeof (elf_msp430_howto_table[0]));
212 i++)
213 if (elf_msp430_howto_table[i].name != NULL
214 && strcasecmp (elf_msp430_howto_table[i].name, r_name) == 0)
215 return &elf_msp430_howto_table[i];
216
217 return NULL;
218}
219
2469cfa2
NC		 220/* Set the howto pointer for an MSP430 ELF reloc. */
221
222static void
b18c562e
NC		 223msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
224 arelent * cache_ptr,
225 Elf_Internal_Rela * dst)
2469cfa2
NC		 226{
227 unsigned int r_type;
228
229 r_type = ELF32_R_TYPE (dst->r_info);
230 BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
231 cache_ptr->howto = &elf_msp430_howto_table[r_type];
232}
233
2469cfa2
NC		 234/* Look through the relocs for a section during the first phase.
235 Since we don't do .gots or .plts, we just need to consider the
236 virtual table relocs for gc. */
237
238static bfd_boolean
b18c562e
NC		 239elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
240 asection * sec, const Elf_Internal_Rela * relocs)
2469cfa2
NC		 241{
242 Elf_Internal_Shdr *symtab_hdr;
243 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
244 const Elf_Internal_Rela *rel;
245 const Elf_Internal_Rela *rel_end;
246
1049f94e 247 if (info->relocatable)
2469cfa2
NC		 248 return TRUE;
249
250 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
251 sym_hashes = elf_sym_hashes (abfd);
252 sym_hashes_end =
253 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
254 if (!elf_bad_symtab (abfd))
255 sym_hashes_end -= symtab_hdr->sh_info;
256
257 rel_end = relocs + sec->reloc_count;
258 for (rel = relocs; rel < rel_end; rel++)
259 {
260 struct elf_link_hash_entry *h;
261 unsigned long r_symndx;
262
263 r_symndx = ELF32_R_SYM (rel->r_info);
264 if (r_symndx < symtab_hdr->sh_info)
265 h = NULL;
266 else
973a3492
L		 267 {
268 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
269 while (h->root.type == bfd_link_hash_indirect
270 || h->root.type == bfd_link_hash_warning)
271 h = (struct elf_link_hash_entry *) h->root.u.i.link;
272 }
2469cfa2
NC		 273 }
274
275 return TRUE;
276}
277
278/* Perform a single relocation. By default we use the standard BFD
279 routines, but a few relocs, we have to do them ourselves. */
280
281static bfd_reloc_status_type
b18c562e
NC		 282msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
283 asection * input_section, bfd_byte * contents,
284 Elf_Internal_Rela * rel, bfd_vma relocation)
2469cfa2
NC		 285{
286 bfd_reloc_status_type r = bfd_reloc_ok;
287 bfd_vma x;
288 bfd_signed_vma srel;
289
290 switch (howto->type)
291 {
292 case R_MSP430_10_PCREL:
293 contents += rel->r_offset;
294 srel = (bfd_signed_vma) relocation;
295 srel += rel->r_addend;
296 srel -= rel->r_offset;
297 srel -= 2; /* Branch instructions add 2 to the PC... */
298 srel -= (input_section->output_section->vma +
299 input_section->output_offset);
300
301 if (srel & 1)
302 return bfd_reloc_outofrange;
303
304 /* MSP430 addresses commands as words. */
305 srel >>= 1;
306
307 /* Check for an overflow. */
308 if (srel < -512 || srel > 511)
309 return bfd_reloc_overflow;
310
311 x = bfd_get_16 (input_bfd, contents);
312 x = (x & 0xfc00) | (srel & 0x3ff);
313 bfd_put_16 (input_bfd, x, contents);
314 break;
315
b18c562e
NC		 316 case R_MSP430_2X_PCREL:
317 contents += rel->r_offset;
318 srel = (bfd_signed_vma) relocation;
319 srel += rel->r_addend;
320 srel -= rel->r_offset;
321 srel -= 2; /* Branch instructions add 2 to the PC... */
322 srel -= (input_section->output_section->vma +
323 input_section->output_offset);
324
325 if (srel & 1)
326 return bfd_reloc_outofrange;
327
328 /* MSP430 addresses commands as words. */
329 srel >>= 1;
330
331 /* Check for an overflow. */
332 if (srel < -512 || srel > 511)
333 return bfd_reloc_overflow;
334
335 x = bfd_get_16 (input_bfd, contents);
336 x = (x & 0xfc00) | (srel & 0x3ff);
337 bfd_put_16 (input_bfd, x, contents);
338 /* Handle second jump instruction. */
339 x = bfd_get_16 (input_bfd, contents - 2);
340 srel += 1;
341 x = (x & 0xfc00) | (srel & 0x3ff);
342 bfd_put_16 (input_bfd, x, contents - 2);
343 break;
344
2469cfa2 345 case R_MSP430_16_PCREL:
b18c562e 346 case R_MSP430_RL_PCREL:
2469cfa2
NC		 347 contents += rel->r_offset;
348 srel = (bfd_signed_vma) relocation;
349 srel += rel->r_addend;
350 srel -= rel->r_offset;
351 /* Only branch instructions add 2 to the PC... */
352 srel -= (input_section->output_section->vma +
353 input_section->output_offset);
354
355 if (srel & 1)
356 return bfd_reloc_outofrange;
357
358 bfd_put_16 (input_bfd, srel & 0xffff, contents);
359 break;
360
361 case R_MSP430_16_PCREL_BYTE:
362 contents += rel->r_offset;
363 srel = (bfd_signed_vma) relocation;
364 srel += rel->r_addend;
365 srel -= rel->r_offset;
366 /* Only branch instructions add 2 to the PC... */
367 srel -= (input_section->output_section->vma +
368 input_section->output_offset);
369
370 bfd_put_16 (input_bfd, srel & 0xffff, contents);
371 break;
372
373 case R_MSP430_16_BYTE:
374 contents += rel->r_offset;
375 srel = (bfd_signed_vma) relocation;
376 srel += rel->r_addend;
377 bfd_put_16 (input_bfd, srel & 0xffff, contents);
378 break;
379
380 case R_MSP430_16:
381 contents += rel->r_offset;
382 srel = (bfd_signed_vma) relocation;
383 srel += rel->r_addend;
384
385 if (srel & 1)
386 return bfd_reloc_notsupported;
387
388 bfd_put_16 (input_bfd, srel & 0xffff, contents);
389 break;
390
391 default:
392 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
393 contents, rel->r_offset,
394 relocation, rel->r_addend);
395 }
396
397 return r;
398}
399
400/* Relocate an MSP430 ELF section. */
401
402static bfd_boolean
b18c562e
NC		 403elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
404 struct bfd_link_info * info,
405 bfd * input_bfd,
406 asection * input_section,
407 bfd_byte * contents,
408 Elf_Internal_Rela * relocs,
409 Elf_Internal_Sym * local_syms,
410 asection ** local_sections)
2469cfa2
NC		 411{
412 Elf_Internal_Shdr *symtab_hdr;
413 struct elf_link_hash_entry **sym_hashes;
414 Elf_Internal_Rela *rel;
415 Elf_Internal_Rela *relend;
416
417 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
418 sym_hashes = elf_sym_hashes (input_bfd);
419 relend = relocs + input_section->reloc_count;
420
421 for (rel = relocs; rel < relend; rel++)
422 {
423 reloc_howto_type *howto;
424 unsigned long r_symndx;
425 Elf_Internal_Sym *sym;
426 asection *sec;
427 struct elf_link_hash_entry *h;
428 bfd_vma relocation;
429 bfd_reloc_status_type r;
430 const char *name = NULL;
431 int r_type;
432
2469cfa2
NC		 433 r_type = ELF32_R_TYPE (rel->r_info);
434 r_symndx = ELF32_R_SYM (rel->r_info);
435 howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
436 h = NULL;
437 sym = NULL;
438 sec = NULL;
439
440 if (r_symndx < symtab_hdr->sh_info)
441 {
442 sym = local_syms + r_symndx;
443 sec = local_sections[r_symndx];
8517fae7 444 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
2469cfa2
NC		 445
446 name = bfd_elf_string_from_elf_section
447 (input_bfd, symtab_hdr->sh_link, sym->st_name);
448 name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
449 }
450 else
451 {
59c2e50f 452 bfd_boolean unresolved_reloc, warned;
2469cfa2 453
b2a8e766
AM		 454 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
455 r_symndx, symtab_hdr, sym_hashes,
456 h, sec, relocation,
457 unresolved_reloc, warned);
2469cfa2
NC		 458 }
459
ab96bf03
AM		 460 if (sec != NULL && elf_discarded_section (sec))
461 {
462 /* For relocs against symbols from removed linkonce sections,
463 or sections discarded by a linker script, we just want the
464 section contents zeroed. Avoid any special processing. */
465 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
466 rel->r_info = 0;
467 rel->r_addend = 0;
468 continue;
469 }
470
471 if (info->relocatable)
472 continue;
473
2469cfa2
NC		 474 r = msp430_final_link_relocate (howto, input_bfd, input_section,
475 contents, rel, relocation);
476
477 if (r != bfd_reloc_ok)
478 {
479 const char *msg = (const char *) NULL;
480
481 switch (r)
482 {
483 case bfd_reloc_overflow:
484 r = info->callbacks->reloc_overflow
dfeffb9f
L		 485 (info, (h ? &h->root : NULL), name, howto->name,
486 (bfd_vma) 0, input_bfd, input_section,
487 rel->r_offset);
2469cfa2
NC		 488 break;
489
490 case bfd_reloc_undefined:
491 r = info->callbacks->undefined_symbol
492 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
493 break;
494
495 case bfd_reloc_outofrange:
496 msg = _("internal error: out of range error");
497 break;
498
499 case bfd_reloc_notsupported:
500 msg = _("internal error: unsupported relocation error");
501 break;
502
503 case bfd_reloc_dangerous:
504 msg = _("internal error: dangerous relocation");
505 break;
506
507 default:
508 msg = _("internal error: unknown error");
509 break;
510 }
511
512 if (msg)
513 r = info->callbacks->warning
514 (info, msg, name, input_bfd, input_section, rel->r_offset);
515
516 if (!r)
517 return FALSE;
518 }
519
520 }
521
522 return TRUE;
523}
524
525/* The final processing done just before writing out a MSP430 ELF object
526 file. This gets the MSP430 architecture right based on the machine
527 number. */
528
529static void
b18c562e
NC		 530bfd_elf_msp430_final_write_processing (bfd * abfd,
531 bfd_boolean linker ATTRIBUTE_UNUSED)
2469cfa2
NC		 532{
533 unsigned long val;
534
535 switch (bfd_get_mach (abfd))
536 {
537 default:
2469cfa2
NC		 538 case bfd_mach_msp110:
539 val = E_MSP430_MACH_MSP430x11x1;
540 break;
541
542 case bfd_mach_msp11:
543 val = E_MSP430_MACH_MSP430x11;
544 break;
545
3b260895
NC		 546 case bfd_mach_msp12:
547 val = E_MSP430_MACH_MSP430x12;
548 break;
549
2469cfa2
NC		 550 case bfd_mach_msp13:
551 val = E_MSP430_MACH_MSP430x13;
552 break;
553
554 case bfd_mach_msp14:
555 val = E_MSP430_MACH_MSP430x14;
556 break;
557
3b260895
NC		 558 case bfd_mach_msp15:
559 val = E_MSP430_MACH_MSP430x15;
2469cfa2
NC		 560 break;
561
3b260895
NC		 562 case bfd_mach_msp16:
563 val = E_MSP430_MACH_MSP430x16;
2469cfa2
NC		 564 break;
565
566 case bfd_mach_msp31:
567 val = E_MSP430_MACH_MSP430x31;
568 break;
569
570 case bfd_mach_msp32:
571 val = E_MSP430_MACH_MSP430x32;
572 break;
573
574 case bfd_mach_msp33:
575 val = E_MSP430_MACH_MSP430x33;
576 break;
577
3b260895
NC		 578 case bfd_mach_msp41:
579 val = E_MSP430_MACH_MSP430x41;
2469cfa2
NC		 580 break;
581
3b260895
NC		 582 case bfd_mach_msp42:
583 val = E_MSP430_MACH_MSP430x42;
584 break;
585
586 case bfd_mach_msp43:
587 val = E_MSP430_MACH_MSP430x43;
588 break;
589
590 case bfd_mach_msp44:
591 val = E_MSP430_MACH_MSP430x44;
2469cfa2
NC		 592 break;
593 }
594
595 elf_elfheader (abfd)->e_machine = EM_MSP430;
596 elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
597 elf_elfheader (abfd)->e_flags |= val;
598}
599
600/* Set the right machine number. */
601
602static bfd_boolean
b18c562e 603elf32_msp430_object_p (bfd * abfd)
2469cfa2
NC		 604{
605 int e_set = bfd_mach_msp14;
606
607 if (elf_elfheader (abfd)->e_machine == EM_MSP430
608 || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
609 {
610 int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
611
612 switch (e_mach)
613 {
614 default:
2469cfa2
NC		 615 case E_MSP430_MACH_MSP430x11:
616 e_set = bfd_mach_msp11;
617 break;
618
619 case E_MSP430_MACH_MSP430x11x1:
620 e_set = bfd_mach_msp110;
621 break;
622
3b260895
NC		 623 case E_MSP430_MACH_MSP430x12:
624 e_set = bfd_mach_msp12;
625 break;
626
2469cfa2
NC		 627 case E_MSP430_MACH_MSP430x13:
628 e_set = bfd_mach_msp13;
629 break;
630
631 case E_MSP430_MACH_MSP430x14:
632 e_set = bfd_mach_msp14;
633 break;
634
3b260895
NC		 635 case E_MSP430_MACH_MSP430x15:
636 e_set = bfd_mach_msp15;
637 break;
638
639 case E_MSP430_MACH_MSP430x16:
640 e_set = bfd_mach_msp16;
2469cfa2
NC		 641 break;
642
643 case E_MSP430_MACH_MSP430x31:
644 e_set = bfd_mach_msp31;
645 break;
646
647 case E_MSP430_MACH_MSP430x32:
648 e_set = bfd_mach_msp32;
649 break;
650
651 case E_MSP430_MACH_MSP430x33:
652 e_set = bfd_mach_msp33;
653 break;
654
3b260895
NC		 655 case E_MSP430_MACH_MSP430x41:
656 e_set = bfd_mach_msp41;
2469cfa2
NC		 657 break;
658
3b260895
NC		 659 case E_MSP430_MACH_MSP430x42:
660 e_set = bfd_mach_msp42;
2469cfa2
NC		 661 break;
662
3b260895
NC		 663 case E_MSP430_MACH_MSP430x43:
664 e_set = bfd_mach_msp43;
2469cfa2
NC		 665 break;
666
3b260895
NC		 667 case E_MSP430_MACH_MSP430x44:
668 e_set = bfd_mach_msp44;
2469cfa2
NC		 669 break;
670 }
671 }
672
673 return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
674}
675
b18c562e
NC		 676/* These functions handle relaxing for the msp430.
677 Relaxation required only in two cases:
678 - Bad hand coding like jumps from one section to another or
679 from file to file.
680 - Sibling calls. This will affect onlu 'jump label' polymorph. Without
681 relaxing this enlarges code by 2 bytes. Sibcalls implemented but
682 do not work in gcc's port by the reason I do not know.
683 Anyway, if a relaxation required, user should pass -relax option to the
684 linker.
685
686 There are quite a few relaxing opportunities available on the msp430:
687
688 ================================================================
689
690 1. 3 words -> 1 word
691
692 eq == jeq label jne +4; br lab
693 ne != jne label jeq +4; br lab
694 lt < jl label jge +4; br lab
695 ltu < jlo label lhs +4; br lab
696 ge >= jge label jl +4; br lab
697 geu >= jhs label jlo +4; br lab
698
699 2. 4 words -> 1 word
700
701 ltn < jn jn +2; jmp +4; br lab
702
703 3. 4 words -> 2 words
704
705 gt > jeq +2; jge label jeq +6; jl +4; br label
706 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
707
708 4. 4 words -> 2 words and 2 labels
709
710 leu <= jeq label; jlo label jeq +2; jhs +4; br label
711 le <= jeq label; jl label jeq +2; jge +4; br label
712 =================================================================
713
714 codemap for first cases is (labels masked ):
715 eq: 0x2002,0x4010,0x0000 -> 0x2400
716 ne: 0x2402,0x4010,0x0000 -> 0x2000
717 lt: 0x3402,0x4010,0x0000 -> 0x3800
718 ltu: 0x2c02,0x4010,0x0000 -> 0x2800
719 ge: 0x3802,0x4010,0x0000 -> 0x3400
720 geu: 0x2802,0x4010,0x0000 -> 0x2c00
721
722 second case:
723 ltn: 0x3001,0x3c02,0x4010,0x0000 -> 0x3000
724
725 third case:
726 gt: 0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
727 gtu: 0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
728
729 fourth case:
730 leu: 0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
731 le: 0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
732
733 Unspecified case :)
734 jump: 0x4010,0x0000 -> 0x3c00. */
735
736#define NUMB_RELAX_CODES 12
737static struct rcodes_s
738{
739 int f0, f1; /* From code. */
740 int t0, t1; /* To code. */
741 int labels; /* Position of labels: 1 - one label at first
742 word, 2 - one at second word, 3 - two
743 labels at both. */
744 int cdx; /* Words to match. */
745 int bs; /* Shrink bytes. */
746 int off; /* Offset from old label for new code. */
747 int ncl; /* New code length. */
748} rcode[] =
749{/* lab,cdx,bs,off,ncl */
750 { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2, 2}, /* jump */
751 { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4, 2}, /* eq */
752 { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4, 2}, /* ne */
753 { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4, 2}, /* lt */
754 { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4, 2}, /* ltu */
755 { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4, 2}, /* ge */
756 { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4, 2}, /* geu */
757 { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6, 2}, /* ltn */
758 { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6, 4}, /* gt */
759 { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6, 4}, /* gtu */
760 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* leu , 2 labels */
761 { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6, 4}, /* le , 2 labels */
762 { 0, 0, 0, 0, 0, 0, 0, 0, 0}
763};
764
765/* Return TRUE if a symbol exists at the given address. */
766
767static bfd_boolean
768msp430_elf_symbol_address_p (bfd * abfd,
769 asection * sec,
770 Elf_Internal_Sym * isym,
771 bfd_vma addr)
772{
773 Elf_Internal_Shdr *symtab_hdr;
774 unsigned int sec_shndx;
775 Elf_Internal_Sym *isymend;
776 struct elf_link_hash_entry **sym_hashes;
777 struct elf_link_hash_entry **end_hashes;
778 unsigned int symcount;
779
780 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
781
782 /* Examine all the local symbols. */
783 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
784 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
785 if (isym->st_shndx == sec_shndx && isym->st_value == addr)
786 return TRUE;
787
788 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
789 - symtab_hdr->sh_info);
790 sym_hashes = elf_sym_hashes (abfd);
791 end_hashes = sym_hashes + symcount;
792 for (; sym_hashes < end_hashes; sym_hashes++)
793 {
794 struct elf_link_hash_entry *sym_hash = *sym_hashes;
795
796 if ((sym_hash->root.type == bfd_link_hash_defined
797 || sym_hash->root.type == bfd_link_hash_defweak)
798 && sym_hash->root.u.def.section == sec
799 && sym_hash->root.u.def.value == addr)
800 return TRUE;
801 }
802
803 return FALSE;
804}
805
046aeb74
DD		 806/* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx)
807 referenced from current and other sections */
808static bfd_boolean
809msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr,
810 int count, unsigned int sec_shndx, bfd_vma toaddr)
811{
812 Elf_Internal_Shdr *symtab_hdr;
813 Elf_Internal_Rela *irel;
814 Elf_Internal_Rela *irelend;
815 Elf_Internal_Sym *isym;
816
817 irel = elf_section_data (sec)->relocs;
818 irelend = irel + sec->reloc_count;
819 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
820 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
821
822 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
823 {
824 int sidx = ELF32_R_SYM(irel->r_info);
825 Elf_Internal_Sym *lsym = isym + sidx;
826
827 /* Adjust symbols referenced by .sec+0xXX */
828 if (irel->r_addend > addr && irel->r_addend < toaddr
829 && lsym->st_shndx == sec_shndx)
830 irel->r_addend -= count;
831 }
832
833 return TRUE;
834}
835
b18c562e
NC		 836/* Delete some bytes from a section while relaxing. */
837
838static bfd_boolean
839msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
840 int count)
841{
842 Elf_Internal_Shdr *symtab_hdr;
843 unsigned int sec_shndx;
844 bfd_byte *contents;
845 Elf_Internal_Rela *irel;
846 Elf_Internal_Rela *irelend;
847 Elf_Internal_Rela *irelalign;
848 bfd_vma toaddr;
849 Elf_Internal_Sym *isym;
850 Elf_Internal_Sym *isymend;
851 struct elf_link_hash_entry **sym_hashes;
852 struct elf_link_hash_entry **end_hashes;
853 unsigned int symcount;
046aeb74 854 asection *p;
b18c562e
NC		 855
856 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
857
858 contents = elf_section_data (sec)->this_hdr.contents;
859
860 /* The deletion must stop at the next ALIGN reloc for an aligment
861 power larger than the number of bytes we are deleting. */
862
863 irelalign = NULL;
864 toaddr = sec->size;
865
866 irel = elf_section_data (sec)->relocs;
867 irelend = irel + sec->reloc_count;
868
869 /* Actually delete the bytes. */
870 memmove (contents + addr, contents + addr + count,
871 (size_t) (toaddr - addr - count));
872 sec->size -= count;
873
874 /* Adjust all the relocs. */
fa9ee72b
DD		 875 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
876 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
b18c562e 877 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
fa9ee72b 878 {
fa9ee72b
DD		 879 /* Get the new reloc address. */
880 if ((irel->r_offset > addr && irel->r_offset < toaddr))
881 irel->r_offset -= count;
fa9ee72b 882 }
b18c562e 883
046aeb74
DD		 884 for (p = abfd->sections; p != NULL; p = p->next)
885 msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr);
886
b18c562e
NC		 887 /* Adjust the local symbols defined in this section. */
888 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
889 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
890 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
891 if (isym->st_shndx == sec_shndx
892 && isym->st_value > addr && isym->st_value < toaddr)
893 isym->st_value -= count;
894
895 /* Now adjust the global symbols defined in this section. */
896 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
897 - symtab_hdr->sh_info);
898 sym_hashes = elf_sym_hashes (abfd);
899 end_hashes = sym_hashes + symcount;
900 for (; sym_hashes < end_hashes; sym_hashes++)
901 {
902 struct elf_link_hash_entry *sym_hash = *sym_hashes;
903
904 if ((sym_hash->root.type == bfd_link_hash_defined
905 || sym_hash->root.type == bfd_link_hash_defweak)
906 && sym_hash->root.u.def.section == sec
907 && sym_hash->root.u.def.value > addr
908 && sym_hash->root.u.def.value < toaddr)
909 sym_hash->root.u.def.value -= count;
910 }
911
912 return TRUE;
913}
914
915
916static bfd_boolean
917msp430_elf_relax_section (bfd * abfd, asection * sec,
918 struct bfd_link_info * link_info,
919 bfd_boolean * again)
920{
921 Elf_Internal_Shdr * symtab_hdr;
922 Elf_Internal_Rela * internal_relocs;
923 Elf_Internal_Rela * irel;
924 Elf_Internal_Rela * irelend;
925 bfd_byte * contents = NULL;
926 Elf_Internal_Sym * isymbuf = NULL;
927
928 /* Assume nothing changes. */
929 *again = FALSE;
930
931 /* We don't have to do anything for a relocatable link, if
932 this section does not have relocs, or if this is not a
933 code section. */
934 if (link_info->relocatable
935 || (sec->flags & SEC_RELOC) == 0
936 || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
937 return TRUE;
938
939 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
940
941 /* Get a copy of the native relocations. */
942 internal_relocs =
943 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
944 if (internal_relocs == NULL)
945 goto error_return;
946
947 /* Walk through them looking for relaxing opportunities. */
948 irelend = internal_relocs + sec->reloc_count;
949 for (irel = internal_relocs; irel < irelend; irel++)
950 {
951 bfd_vma symval;
952
953 /* If this isn't something that can be relaxed, then ignore
954 this reloc. */
955 if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
956 continue;
957
958 /* Get the section contents if we haven't done so already. */
959 if (contents == NULL)
960 {
961 /* Get cached copy if it exists. */
962 if (elf_section_data (sec)->this_hdr.contents != NULL)
963 contents = elf_section_data (sec)->this_hdr.contents;
964 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
965 goto error_return;
966 }
967
968 /* Read this BFD's local symbols if we haven't done so already. */
969 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
970 {
971 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
972 if (isymbuf == NULL)
973 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
974 symtab_hdr->sh_info, 0,
975 NULL, NULL, NULL);
976 if (isymbuf == NULL)
977 goto error_return;
978 }
979
980 /* Get the value of the symbol referred to by the reloc. */
981 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
982 {
983 /* A local symbol. */
984 Elf_Internal_Sym *isym;
985 asection *sym_sec;
986
987 isym = isymbuf + ELF32_R_SYM (irel->r_info);
988 if (isym->st_shndx == SHN_UNDEF)
989 sym_sec = bfd_und_section_ptr;
990 else if (isym->st_shndx == SHN_ABS)
991 sym_sec = bfd_abs_section_ptr;
992 else if (isym->st_shndx == SHN_COMMON)
993 sym_sec = bfd_com_section_ptr;
994 else
995 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
996 symval = (isym->st_value
997 + sym_sec->output_section->vma + sym_sec->output_offset);
998 }
999 else
1000 {
1001 unsigned long indx;
1002 struct elf_link_hash_entry *h;
1003
1004 /* An external symbol. */
1005 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1006 h = elf_sym_hashes (abfd)[indx];
1007 BFD_ASSERT (h != NULL);
1008
1009 if (h->root.type != bfd_link_hash_defined
1010 && h->root.type != bfd_link_hash_defweak)
1011 /* This appears to be a reference to an undefined
1012 symbol. Just ignore it--it will be caught by the
1013 regular reloc processing. */
1014 continue;
1015
1016 symval = (h->root.u.def.value
1017 + h->root.u.def.section->output_section->vma
1018 + h->root.u.def.section->output_offset);
1019 }
1020
1021 /* For simplicity of coding, we are going to modify the section
1022 contents, the section relocs, and the BFD symbol table. We
1023 must tell the rest of the code not to free up this
1024 information. It would be possible to instead create a table
1025 of changes which have to be made, as is done in coff-mips.c;
1026 that would be more work, but would require less memory when
1027 the linker is run. */
1028
1029 /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
1030 branch. */
1031 /* Paranoia? paranoia... */
1032 if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
1033 {
1034 bfd_vma value = symval;
1035
1036 /* Deal with pc-relative gunk. */
1037 value -= (sec->output_section->vma + sec->output_offset);
1038 value -= irel->r_offset;
1039 value += irel->r_addend;
1040
1041 /* See if the value will fit in 10 bits, note the high value is
1042 1016 as the target will be two bytes closer if we are
1043 able to relax. */
1044 if ((long) value < 1016 && (long) value > -1016)
1045 {
1046 int code0 = 0, code1 = 0, code2 = 0;
1047 int i;
1048 struct rcodes_s *rx;
1049
1050 /* Get the opcode. */
1051 if (irel->r_offset >= 6)
1052 code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
1053
1054 if (irel->r_offset >= 4)
1055 code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
1056
1057 code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
1058
1059 if (code2 != 0x4010)
1060 continue;
1061
1062 /* Check r4 and r3. */
1063 for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
1064 {
1065 rx = &rcode[i];
1066 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
1067 break;
1068 else if (rx->cdx == 1 && rx->f1 == code1)
1069 break;
1070 else if (rx->cdx == 0) /* This is an unconditional jump. */
1071 break;
1072 }
1073
1074 /* Check labels:
1075 .Label0: ; we do not care about this label
1076 jeq +6
1077 .Label1: ; make sure there is no label here
1078 jl +4
1079 .Label2: ; make sure there is no label here
1080 br .Label_dst
1081
1082 So, if there is .Label1 or .Label2 we cannot relax this code.
1083 This actually should not happen, cause for relaxable
1084 instructions we use RL_PCREL reloc instead of 16_PCREL.
1085 Will change this in the future. */
1086
1087 if (rx->cdx > 0
1088 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1089 irel->r_offset - 2))
1090 continue;
1091 if (rx->cdx > 1
1092 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
1093 irel->r_offset - 4))
1094 continue;
1095
1096 /* Note that we've changed the relocs, section contents, etc. */
1097 elf_section_data (sec)->relocs = internal_relocs;
1098 elf_section_data (sec)->this_hdr.contents = contents;
1099 symtab_hdr->contents = (unsigned char *) isymbuf;
1100
1101 /* Fix the relocation's type. */
1102 if (rx->labels == 3) /* Handle special cases. */
1103 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1104 R_MSP430_2X_PCREL);
1105 else
1106 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1107 R_MSP430_10_PCREL);
1108
1109 /* Fix the opcode right way. */
1110 bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
1111 if (rx->t1)
1112 bfd_put_16 (abfd, rx->t1,
1113 contents + irel->r_offset - rx->off + 2);
1114
1115 /* Delete bytes. */
1116 if (!msp430_elf_relax_delete_bytes (abfd, sec,
1117 irel->r_offset - rx->off +
1118 rx->ncl, rx->bs))
1119 goto error_return;
1120
1121 /* Handle unconditional jumps. */
1122 if (rx->cdx == 0)
1123 irel->r_offset -= 2;
1124
1125 /* That will change things, so, we should relax again.
1126 Note that this is not required, and it may be slow. */
1127 *again = TRUE;
1128 }
1129 }
1130 }
1131
1132 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1133 {
1134 if (!link_info->keep_memory)
1135 free (isymbuf);
1136 else
1137 {
1138 /* Cache the symbols for elf_link_input_bfd. */
1139 symtab_hdr->contents = (unsigned char *) isymbuf;
1140 }
1141 }
1142
1143 if (contents != NULL
1144 && elf_section_data (sec)->this_hdr.contents != contents)
1145 {
1146 if (!link_info->keep_memory)
1147 free (contents);
1148 else
1149 {
1150 /* Cache the section contents for elf_link_input_bfd. */
1151 elf_section_data (sec)->this_hdr.contents = contents;
1152 }
1153 }
1154
1155 if (internal_relocs != NULL
1156 && elf_section_data (sec)->relocs != internal_relocs)
1157 free (internal_relocs);
1158
1159 return TRUE;
1160
1161error_return:
1162 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
1163 free (isymbuf);
1164 if (contents != NULL
1165 && elf_section_data (sec)->this_hdr.contents != contents)
1166 free (contents);
1167 if (internal_relocs != NULL
1168 && elf_section_data (sec)->relocs != internal_relocs)
1169 free (internal_relocs);
1170
1171 return FALSE;
1172}
1173
2469cfa2
NC		 1174
1175#define ELF_ARCH bfd_arch_msp430
1176#define ELF_MACHINE_CODE EM_MSP430
1177#define ELF_MACHINE_ALT1 EM_MSP430_OLD
1178#define ELF_MAXPAGESIZE 1
d1036acb 1179#define ELF_OSABI ELFOSABI_STANDALONE
2469cfa2
NC		 1180
1181#define TARGET_LITTLE_SYM bfd_elf32_msp430_vec
1182#define TARGET_LITTLE_NAME "elf32-msp430"
1183
1184#define elf_info_to_howto msp430_info_to_howto_rela
1185#define elf_info_to_howto_rel NULL
1186#define elf_backend_relocate_section elf32_msp430_relocate_section
2469cfa2
NC		 1187#define elf_backend_check_relocs elf32_msp430_check_relocs
1188#define elf_backend_can_gc_sections 1
1189#define elf_backend_final_write_processing bfd_elf_msp430_final_write_processing
1190#define elf_backend_object_p elf32_msp430_object_p
d1036acb 1191#define elf_backend_post_process_headers _bfd_elf_set_osabi
b18c562e 1192#define bfd_elf32_bfd_relax_section msp430_elf_relax_section
2469cfa2
NC		 1193
1194#include "elf32-target.h"
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