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35c08157 1/* NDS32-specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 59
60/* Nds32 helper functions. */
35c08157 61static bfd_vma calculate_memory_address
0c4bd9d9
KLC		 62(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
35c08157 65static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 66(bfd *, asection *, struct bfd_link_info *);
1c8f6a4d
KLC		 67static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
68static void nds32_elf_ex9_import_table (struct bfd_link_info *);
69static void nds32_elf_ex9_finish (struct bfd_link_info *);
70static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 71static void nds32_elf_get_insn_with_reg
1c8f6a4d 72 (Elf_Internal_Rela *, uint32_t, uint32_t *);
35c08157
KLC		 73static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
74 Elf_Internal_Sym **);
75static bfd_boolean nds32_elf_ex9_replace_instruction
76 (struct bfd_link_info *, bfd *, asection *);
77static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
78 asection *);
1c8f6a4d 79static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 80static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 81static bfd_boolean nds32_elf_ifc_reloc (void);
35c08157
KLC		 82static bfd_boolean nds32_relax_fp_as_gp
83 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
84 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
85 Elf_Internal_Sym *isymbuf);
86static bfd_boolean nds32_fag_remove_unused_fpbase
87 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
88 Elf_Internal_Rela *irelend);
89
90enum
91{
92 MACH_V1 = bfd_mach_n1h,
93 MACH_V2 = bfd_mach_n1h_v2,
94 MACH_V3 = bfd_mach_n1h_v3,
95 MACH_V3M = bfd_mach_n1h_v3m
96};
97
98#define MIN(a, b) ((a) > (b) ? (b) : (a))
99#define MAX(a, b) ((a) > (b) ? (a) : (b))
100
101/* The name of the dynamic interpreter. This is put in the .interp
102 section. */
103#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
104
105/* The nop opcode we use. */
106#define NDS32_NOP32 0x40000009
107#define NDS32_NOP16 0x9200
108
109/* The size in bytes of an entry in the procedure linkage table. */
110#define PLT_ENTRY_SIZE 24
111#define PLT_HEADER_SIZE 24
112
113/* The first entry in a procedure linkage table are reserved,
114 and the initial contents are unimportant (we zero them out).
115 Subsequent entries look like this. */
07d6d2b8
AM		 116#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
117#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
118#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
119#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
120#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 121
122/* $ta is change to $r15 (from $r25). */
123#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 124#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
125#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
126#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
127#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
128#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
129
130#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
131#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
132#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
133#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
134#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 135
136#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 137#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
138#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
139#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
140#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
141#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 142
1c8f6a4d
KLC		 143/* These are macros used to get the relocation accurate value. */
144#define ACCURATE_8BIT_S1 (0x100)
145#define ACCURATE_U9BIT_S1 (0x400)
146#define ACCURATE_12BIT_S1 (0x2000)
147#define ACCURATE_14BIT_S1 (0x4000)
148#define ACCURATE_19BIT (0x40000)
149
150/* These are macros used to get the relocation conservative value. */
151#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
152#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
153#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
154#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
155/* These must be more conservative because the address may be in
156 different segment. */
157#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
158#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
159#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
160#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
161#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
162
35c08157
KLC		 163/* Size of small data/bss sections, used to calculate SDA_BASE. */
164static long got_size = 0;
165static int is_SDA_BASE_set = 0;
166static int is_ITB_BASE_set = 0;
167
35c08157
KLC		 168/* Convert ELF-VER in eflags to string for debugging purpose. */
169static const char *const nds32_elfver_strtab[] =
170{
171 "ELF-1.2",
172 "ELF-1.3",
173 "ELF-1.4",
174};
175
176/* The nds32 linker needs to keep track of the number of relocs that it
177 decides to copy in check_relocs for each symbol. This is so that
178 it can discard PC relative relocs if it doesn't need them when
179 linking with -Bsymbolic. We store the information in a field
180 extending the regular ELF linker hash table. */
181
182/* This structure keeps track of the number of PC relative relocs we
183 have copied for a given symbol. */
184
185struct elf_nds32_pcrel_relocs_copied
186{
187 /* Next section. */
188 struct elf_nds32_pcrel_relocs_copied *next;
189 /* A section in dynobj. */
190 asection *section;
191 /* Number of relocs copied in this section. */
192 bfd_size_type count;
193};
194
35c08157
KLC		 195/* Nds32 ELF linker hash entry. */
196
197struct elf_nds32_link_hash_entry
198{
199 struct elf_link_hash_entry root;
200
201 /* Track dynamic relocs copied for this symbol. */
3bf083ed 202 struct elf_dyn_relocs *dyn_relocs;
1c8f6a4d
KLC		 203
204 /* For checking relocation type. */
205#define GOT_UNKNOWN 0
206#define GOT_NORMAL 1
207#define GOT_TLS_IE 2
208 unsigned int tls_type;
35c08157
KLC		 209};
210
211/* Get the nds32 ELF linker hash table from a link_info structure. */
212
213#define FP_BASE_NAME "_FP_BASE_"
214static int check_start_export_sym = 0;
215static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
216
1c8f6a4d
KLC		 217/* The offset for executable tls relaxation. */
218#define TP_OFFSET 0x0
219
220struct elf_nds32_obj_tdata
221{
222 struct elf_obj_tdata root;
223
224 /* tls_type for each local got entry. */
225 char *local_got_tls_type;
226};
227
228#define elf_nds32_tdata(bfd) \
229 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
230
231#define elf32_nds32_local_got_tls_type(bfd) \
232 (elf_nds32_tdata (bfd)->local_got_tls_type)
233
234#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
235
236static bfd_boolean
237nds32_elf_mkobject (bfd *abfd)
238{
239 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
240 NDS32_ELF_DATA);
241}
242
35c08157
KLC		 243/* Relocations used for relocation. */
244static reloc_howto_type nds32_elf_howto_table[] =
245{
246 /* This reloc does nothing. */
247 HOWTO (R_NDS32_NONE, /* type */
248 0, /* rightshift */
6346d5ca
AM		 249 3, /* size (0 = byte, 1 = short, 2 = long) */
250 0, /* bitsize */
35c08157
KLC		 251 FALSE, /* pc_relative */
252 0, /* bitpos */
6346d5ca 253 complain_overflow_dont, /* complain_on_overflow */
35c08157
KLC		 254 bfd_elf_generic_reloc, /* special_function */
255 "R_NDS32_NONE", /* name */
256 FALSE, /* partial_inplace */
257 0, /* src_mask */
258 0, /* dst_mask */
259 FALSE), /* pcrel_offset */
260
261 /* A 16 bit absolute relocation. */
262 HOWTO (R_NDS32_16, /* type */
263 0, /* rightshift */
264 1, /* size (0 = byte, 1 = short, 2 = long) */
265 16, /* bitsize */
266 FALSE, /* pc_relative */
267 0, /* bitpos */
268 complain_overflow_bitfield, /* complain_on_overflow */
269 nds32_elf_generic_reloc, /* special_function */
270 "R_NDS32_16", /* name */
271 FALSE, /* partial_inplace */
272 0xffff, /* src_mask */
273 0xffff, /* dst_mask */
274 FALSE), /* pcrel_offset */
275
276 /* A 32 bit absolute relocation. */
277 HOWTO (R_NDS32_32, /* type */
278 0, /* rightshift */
279 2, /* size (0 = byte, 1 = short, 2 = long) */
280 32, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_bitfield, /* complain_on_overflow */
284 nds32_elf_generic_reloc, /* special_function */
285 "R_NDS32_32", /* name */
286 FALSE, /* partial_inplace */
287 0xffffffff, /* src_mask */
288 0xffffffff, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* A 20 bit address. */
292 HOWTO (R_NDS32_20, /* type */
293 0, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 20, /* bitsize */
296 FALSE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_unsigned, /* complain_on_overflow */
299 nds32_elf_generic_reloc, /* special_function */
300 "R_NDS32_20", /* name */
301 FALSE, /* partial_inplace */
302 0xfffff, /* src_mask */
303 0xfffff, /* dst_mask */
304 FALSE), /* pcrel_offset */
305
306 /* An PC Relative 9-bit relocation, shifted by 2.
307 This reloc is complicated because relocations are relative to pc & -4.
308 i.e. branches in the right insn slot use the address of the left insn
309 slot for pc. */
310 /* ??? It's not clear whether this should have partial_inplace set or not.
311 Branch relaxing in the assembler can store the addend in the insn,
312 and if bfd_install_relocation gets called the addend may get added
313 again. */
314 HOWTO (R_NDS32_9_PCREL, /* type */
315 1, /* rightshift */
316 1, /* size (0 = byte, 1 = short, 2 = long) */
317 8, /* bitsize */
318 TRUE, /* pc_relative */
319 0, /* bitpos */
320 complain_overflow_signed, /* complain_on_overflow */
321 nds32_elf_9_pcrel_reloc, /* special_function */
322 "R_NDS32_9_PCREL", /* name */
323 FALSE, /* partial_inplace */
324 0xff, /* src_mask */
325 0xff, /* dst_mask */
326 TRUE), /* pcrel_offset */
327
328 /* A relative 15 bit relocation, right shifted by 1. */
329 HOWTO (R_NDS32_15_PCREL, /* type */
330 1, /* rightshift */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
332 14, /* bitsize */
333 TRUE, /* pc_relative */
334 0, /* bitpos */
335 complain_overflow_signed, /* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_NDS32_15_PCREL", /* name */
338 FALSE, /* partial_inplace */
339 0x3fff, /* src_mask */
340 0x3fff, /* dst_mask */
341 TRUE), /* pcrel_offset */
342
343 /* A relative 17 bit relocation, right shifted by 1. */
344 HOWTO (R_NDS32_17_PCREL, /* type */
345 1, /* rightshift */
346 2, /* size (0 = byte, 1 = short, 2 = long) */
347 16, /* bitsize */
348 TRUE, /* pc_relative */
349 0, /* bitpos */
350 complain_overflow_signed, /* complain_on_overflow */
351 bfd_elf_generic_reloc, /* special_function */
352 "R_NDS32_17_PCREL", /* name */
353 FALSE, /* partial_inplace */
354 0xffff, /* src_mask */
355 0xffff, /* dst_mask */
356 TRUE), /* pcrel_offset */
357
358 /* A relative 25 bit relocation, right shifted by 1. */
359 /* ??? It's not clear whether this should have partial_inplace set or not.
360 Branch relaxing in the assembler can store the addend in the insn,
361 and if bfd_install_relocation gets called the addend may get added
362 again. */
363 HOWTO (R_NDS32_25_PCREL, /* type */
364 1, /* rightshift */
365 2, /* size (0 = byte, 1 = short, 2 = long) */
366 24, /* bitsize */
367 TRUE, /* pc_relative */
368 0, /* bitpos */
369 complain_overflow_signed, /* complain_on_overflow */
370 bfd_elf_generic_reloc, /* special_function */
371 "R_NDS32_25_PCREL", /* name */
372 FALSE, /* partial_inplace */
373 0xffffff, /* src_mask */
374 0xffffff, /* dst_mask */
375 TRUE), /* pcrel_offset */
376
377 /* High 20 bits of address when lower 12 is or'd in. */
378 HOWTO (R_NDS32_HI20, /* type */
379 12, /* rightshift */
380 2, /* size (0 = byte, 1 = short, 2 = long) */
381 20, /* bitsize */
382 FALSE, /* pc_relative */
383 0, /* bitpos */
384 complain_overflow_dont,/* complain_on_overflow */
385 nds32_elf_hi20_reloc, /* special_function */
386 "R_NDS32_HI20", /* name */
387 FALSE, /* partial_inplace */
388 0x000fffff, /* src_mask */
389 0x000fffff, /* dst_mask */
390 FALSE), /* pcrel_offset */
391
392 /* Lower 12 bits of address. */
393 HOWTO (R_NDS32_LO12S3, /* type */
394 3, /* rightshift */
395 2, /* size (0 = byte, 1 = short, 2 = long) */
396 9, /* bitsize */
397 FALSE, /* pc_relative */
398 0, /* bitpos */
399 complain_overflow_dont,/* complain_on_overflow */
400 nds32_elf_lo12_reloc, /* special_function */
401 "R_NDS32_LO12S3", /* name */
402 FALSE, /* partial_inplace */
403 0x000001ff, /* src_mask */
404 0x000001ff, /* dst_mask */
405 FALSE), /* pcrel_offset */
406
407 /* Lower 12 bits of address. */
408 HOWTO (R_NDS32_LO12S2, /* type */
409 2, /* rightshift */
410 2, /* size (0 = byte, 1 = short, 2 = long) */
411 10, /* bitsize */
412 FALSE, /* pc_relative */
413 0, /* bitpos */
414 complain_overflow_dont,/* complain_on_overflow */
415 nds32_elf_lo12_reloc, /* special_function */
416 "R_NDS32_LO12S2", /* name */
417 FALSE, /* partial_inplace */
418 0x000003ff, /* src_mask */
419 0x000003ff, /* dst_mask */
420 FALSE), /* pcrel_offset */
421
422 /* Lower 12 bits of address. */
423 HOWTO (R_NDS32_LO12S1, /* type */
424 1, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 11, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_dont,/* complain_on_overflow */
430 nds32_elf_lo12_reloc, /* special_function */
431 "R_NDS32_LO12S1", /* name */
432 FALSE, /* partial_inplace */
433 0x000007ff, /* src_mask */
434 0x000007ff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 /* Lower 12 bits of address. */
438 HOWTO (R_NDS32_LO12S0, /* type */
439 0, /* rightshift */
440 2, /* size (0 = byte, 1 = short, 2 = long) */
441 12, /* bitsize */
442 FALSE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_dont,/* complain_on_overflow */
445 nds32_elf_lo12_reloc, /* special_function */
446 "R_NDS32_LO12S0", /* name */
447 FALSE, /* partial_inplace */
448 0x00000fff, /* src_mask */
449 0x00000fff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451
452 /* Small data area 15 bits offset. */
453 HOWTO (R_NDS32_SDA15S3, /* type */
454 3, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 15, /* bitsize */
457 FALSE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_signed, /* complain_on_overflow */
460 nds32_elf_sda15_reloc, /* special_function */
461 "R_NDS32_SDA15S3", /* name */
462 FALSE, /* partial_inplace */
463 0x00007fff, /* src_mask */
464 0x00007fff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 /* Small data area 15 bits offset. */
468 HOWTO (R_NDS32_SDA15S2, /* type */
469 2, /* rightshift */
470 2, /* size (0 = byte, 1 = short, 2 = long) */
471 15, /* bitsize */
472 FALSE, /* pc_relative */
473 0, /* bitpos */
474 complain_overflow_signed, /* complain_on_overflow */
475 nds32_elf_sda15_reloc, /* special_function */
476 "R_NDS32_SDA15S2", /* name */
477 FALSE, /* partial_inplace */
478 0x00007fff, /* src_mask */
479 0x00007fff, /* dst_mask */
480 FALSE), /* pcrel_offset */
481
482 /* Small data area 15 bits offset. */
483 HOWTO (R_NDS32_SDA15S1, /* type */
484 1, /* rightshift */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
486 15, /* bitsize */
487 FALSE, /* pc_relative */
488 0, /* bitpos */
489 complain_overflow_signed, /* complain_on_overflow */
490 nds32_elf_sda15_reloc, /* special_function */
491 "R_NDS32_SDA15S1", /* name */
492 FALSE, /* partial_inplace */
493 0x00007fff, /* src_mask */
494 0x00007fff, /* dst_mask */
495 FALSE), /* pcrel_offset */
496
497 /* Small data area 15 bits offset. */
498 HOWTO (R_NDS32_SDA15S0, /* type */
499 0, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 15, /* bitsize */
502 FALSE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed, /* complain_on_overflow */
505 nds32_elf_sda15_reloc, /* special_function */
506 "R_NDS32_SDA15S0", /* name */
507 FALSE, /* partial_inplace */
508 0x00007fff, /* src_mask */
509 0x00007fff, /* dst_mask */
510 FALSE), /* pcrel_offset */
511
512 /* GNU extension to record C++ vtable hierarchy */
513 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
514 0, /* rightshift */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
516 0, /* bitsize */
517 FALSE, /* pc_relative */
518 0, /* bitpos */
519 complain_overflow_dont,/* complain_on_overflow */
520 NULL, /* special_function */
521 "R_NDS32_GNU_VTINHERIT", /* name */
522 FALSE, /* partial_inplace */
523 0, /* src_mask */
524 0, /* dst_mask */
525 FALSE), /* pcrel_offset */
526
527 /* GNU extension to record C++ vtable member usage */
528 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
529 0, /* rightshift */
530 2, /* size (0 = byte, 1 = short, 2 = long) */
531 0, /* bitsize */
532 FALSE, /* pc_relative */
533 0, /* bitpos */
534 complain_overflow_dont,/* complain_on_overflow */
535 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
536 "R_NDS32_GNU_VTENTRY", /* name */
537 FALSE, /* partial_inplace */
538 0, /* src_mask */
539 0, /* dst_mask */
540 FALSE), /* pcrel_offset */
541
542 /* A 16 bit absolute relocation. */
543 HOWTO (R_NDS32_16_RELA, /* type */
544 0, /* rightshift */
545 1, /* size (0 = byte, 1 = short, 2 = long) */
546 16, /* bitsize */
547 FALSE, /* pc_relative */
548 0, /* bitpos */
549 complain_overflow_bitfield, /* complain_on_overflow */
550 bfd_elf_generic_reloc, /* special_function */
551 "R_NDS32_16_RELA", /* name */
552 FALSE, /* partial_inplace */
553 0xffff, /* src_mask */
554 0xffff, /* dst_mask */
555 FALSE), /* pcrel_offset */
556
557 /* A 32 bit absolute relocation. */
558 HOWTO (R_NDS32_32_RELA, /* type */
559 0, /* rightshift */
560 2, /* size (0 = byte, 1 = short, 2 = long) */
561 32, /* bitsize */
562 FALSE, /* pc_relative */
563 0, /* bitpos */
564 complain_overflow_bitfield, /* complain_on_overflow */
565 bfd_elf_generic_reloc, /* special_function */
566 "R_NDS32_32_RELA", /* name */
567 FALSE, /* partial_inplace */
568 0xffffffff, /* src_mask */
569 0xffffffff, /* dst_mask */
570 FALSE), /* pcrel_offset */
571
572 /* A 20 bit address. */
573 HOWTO (R_NDS32_20_RELA, /* type */
574 0, /* rightshift */
575 2, /* size (0 = byte, 1 = short, 2 = long) */
576 20, /* bitsize */
577 FALSE, /* pc_relative */
578 0, /* bitpos */
579 complain_overflow_signed, /* complain_on_overflow */
580 bfd_elf_generic_reloc, /* special_function */
581 "R_NDS32_20_RELA", /* name */
582 FALSE, /* partial_inplace */
583 0xfffff, /* src_mask */
584 0xfffff, /* dst_mask */
585 FALSE), /* pcrel_offset */
586
587 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
588 1, /* rightshift */
589 1, /* size (0 = byte, 1 = short, 2 = long) */
590 8, /* bitsize */
591 TRUE, /* pc_relative */
592 0, /* bitpos */
593 complain_overflow_signed, /* complain_on_overflow */
594 bfd_elf_generic_reloc, /* special_function */
595 "R_NDS32_9_PCREL_RELA",/* name */
596 FALSE, /* partial_inplace */
597 0xff, /* src_mask */
598 0xff, /* dst_mask */
599 TRUE), /* pcrel_offset */
600
601 /* A relative 15 bit relocation, right shifted by 1. */
602 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
603 1, /* rightshift */
604 2, /* size (0 = byte, 1 = short, 2 = long) */
605 14, /* bitsize */
606 TRUE, /* pc_relative */
607 0, /* bitpos */
608 complain_overflow_signed, /* complain_on_overflow */
609 bfd_elf_generic_reloc, /* special_function */
610 "R_NDS32_15_PCREL_RELA", /* name */
611 FALSE, /* partial_inplace */
612 0x3fff, /* src_mask */
613 0x3fff, /* dst_mask */
614 TRUE), /* pcrel_offset */
615
616 /* A relative 17 bit relocation, right shifted by 1. */
617 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
618 1, /* rightshift */
619 2, /* size (0 = byte, 1 = short, 2 = long) */
620 16, /* bitsize */
621 TRUE, /* pc_relative */
622 0, /* bitpos */
623 complain_overflow_signed, /* complain_on_overflow */
624 bfd_elf_generic_reloc, /* special_function */
625 "R_NDS32_17_PCREL_RELA", /* name */
626 FALSE, /* partial_inplace */
627 0xffff, /* src_mask */
628 0xffff, /* dst_mask */
629 TRUE), /* pcrel_offset */
630
631 /* A relative 25 bit relocation, right shifted by 2. */
632 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
633 1, /* rightshift */
634 2, /* size (0 = byte, 1 = short, 2 = long) */
635 24, /* bitsize */
636 TRUE, /* pc_relative */
637 0, /* bitpos */
638 complain_overflow_signed, /* complain_on_overflow */
639 bfd_elf_generic_reloc, /* special_function */
640 "R_NDS32_25_PCREL_RELA", /* name */
641 FALSE, /* partial_inplace */
642 0xffffff, /* src_mask */
643 0xffffff, /* dst_mask */
644 TRUE), /* pcrel_offset */
645
646 /* High 20 bits of address when lower 16 is or'd in. */
647 HOWTO (R_NDS32_HI20_RELA, /* type */
648 12, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 20, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_NDS32_HI20_RELA", /* name */
656 FALSE, /* partial_inplace */
657 0x000fffff, /* src_mask */
658 0x000fffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 /* Lower 12 bits of address. */
662 HOWTO (R_NDS32_LO12S3_RELA, /* type */
663 3, /* rightshift */
664 2, /* size (0 = byte, 1 = short, 2 = long) */
665 9, /* bitsize */
666 FALSE, /* pc_relative */
667 0, /* bitpos */
668 complain_overflow_dont,/* complain_on_overflow */
669 bfd_elf_generic_reloc, /* special_function */
670 "R_NDS32_LO12S3_RELA", /* name */
671 FALSE, /* partial_inplace */
672 0x000001ff, /* src_mask */
673 0x000001ff, /* dst_mask */
674 FALSE), /* pcrel_offset */
675
676 /* Lower 12 bits of address. */
677 HOWTO (R_NDS32_LO12S2_RELA, /* type */
678 2, /* rightshift */
679 2, /* size (0 = byte, 1 = short, 2 = long) */
680 10, /* bitsize */
681 FALSE, /* pc_relative */
682 0, /* bitpos */
683 complain_overflow_dont,/* complain_on_overflow */
684 bfd_elf_generic_reloc, /* special_function */
685 "R_NDS32_LO12S2_RELA", /* name */
686 FALSE, /* partial_inplace */
687 0x000003ff, /* src_mask */
688 0x000003ff, /* dst_mask */
689 FALSE), /* pcrel_offset */
690
691 /* Lower 12 bits of address. */
692 HOWTO (R_NDS32_LO12S1_RELA, /* type */
693 1, /* rightshift */
694 2, /* size (0 = byte, 1 = short, 2 = long) */
695 11, /* bitsize */
696 FALSE, /* pc_relative */
697 0, /* bitpos */
698 complain_overflow_dont,/* complain_on_overflow */
699 bfd_elf_generic_reloc, /* special_function */
700 "R_NDS32_LO12S1_RELA", /* name */
701 FALSE, /* partial_inplace */
702 0x000007ff, /* src_mask */
703 0x000007ff, /* dst_mask */
704 FALSE), /* pcrel_offset */
705
706 /* Lower 12 bits of address. */
707 HOWTO (R_NDS32_LO12S0_RELA, /* type */
708 0, /* rightshift */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
710 12, /* bitsize */
711 FALSE, /* pc_relative */
712 0, /* bitpos */
713 complain_overflow_dont,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_NDS32_LO12S0_RELA", /* name */
716 FALSE, /* partial_inplace */
717 0x00000fff, /* src_mask */
718 0x00000fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
720
721 /* Small data area 15 bits offset. */
722 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
723 3, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 15, /* bitsize */
726 FALSE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_signed, /* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_NDS32_SDA15S3_RELA",/* name */
731 FALSE, /* partial_inplace */
732 0x00007fff, /* src_mask */
733 0x00007fff, /* dst_mask */
734 FALSE), /* pcrel_offset */
735
736 /* Small data area 15 bits offset. */
737 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
738 2, /* rightshift */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
740 15, /* bitsize */
741 FALSE, /* pc_relative */
742 0, /* bitpos */
743 complain_overflow_signed, /* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_NDS32_SDA15S2_RELA",/* name */
746 FALSE, /* partial_inplace */
747 0x00007fff, /* src_mask */
748 0x00007fff, /* dst_mask */
749 FALSE), /* pcrel_offset */
750
751 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
752 1, /* rightshift */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
754 15, /* bitsize */
755 FALSE, /* pc_relative */
756 0, /* bitpos */
757 complain_overflow_signed, /* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_NDS32_SDA15S1_RELA",/* name */
760 FALSE, /* partial_inplace */
761 0x00007fff, /* src_mask */
762 0x00007fff, /* dst_mask */
763 FALSE), /* pcrel_offset */
764
765 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
766 0, /* rightshift */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
768 15, /* bitsize */
769 FALSE, /* pc_relative */
770 0, /* bitpos */
771 complain_overflow_signed, /* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_NDS32_SDA15S0_RELA",/* name */
774 FALSE, /* partial_inplace */
775 0x00007fff, /* src_mask */
776 0x00007fff, /* dst_mask */
777 FALSE), /* pcrel_offset */
778
779 /* GNU extension to record C++ vtable hierarchy */
780 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
781 0, /* rightshift */
782 2, /* size (0 = byte, 1 = short, 2 = long) */
783 0, /* bitsize */
784 FALSE, /* pc_relative */
785 0, /* bitpos */
786 complain_overflow_dont,/* complain_on_overflow */
787 NULL, /* special_function */
788 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
789 FALSE, /* partial_inplace */
790 0, /* src_mask */
791 0, /* dst_mask */
792 FALSE), /* pcrel_offset */
793
794 /* GNU extension to record C++ vtable member usage */
795 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
796 0, /* rightshift */
797 2, /* size (0 = byte, 1 = short, 2 = long) */
798 0, /* bitsize */
799 FALSE, /* pc_relative */
800 0, /* bitpos */
801 complain_overflow_dont,/* complain_on_overflow */
802 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
803 "R_NDS32_RELA_GNU_VTENTRY", /* name */
804 FALSE, /* partial_inplace */
805 0, /* src_mask */
806 0, /* dst_mask */
807 FALSE), /* pcrel_offset */
808
809 /* Like R_NDS32_20, but referring to the GOT table entry for
810 the symbol. */
811 HOWTO (R_NDS32_GOT20, /* type */
812 0, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 20, /* bitsize */
815 FALSE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_signed, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 "R_NDS32_GOT20", /* name */
820 FALSE, /* partial_inplace */
821 0xfffff, /* src_mask */
822 0xfffff, /* dst_mask */
823 FALSE), /* pcrel_offset */
824
825 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
826 entry for the symbol. */
827 HOWTO (R_NDS32_25_PLTREL, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 24, /* bitsize */
831 TRUE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_25_PLTREL", /* name */
836 FALSE, /* partial_inplace */
837 0xffffff, /* src_mask */
838 0xffffff, /* dst_mask */
839 TRUE), /* pcrel_offset */
840
841 /* This is used only by the dynamic linker. The symbol should exist
842 both in the object being run and in some shared library. The
843 dynamic linker copies the data addressed by the symbol from the
844 shared library into the object, because the object being
845 run has to have the data at some particular address. */
846 HOWTO (R_NDS32_COPY, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 32, /* bitsize */
850 FALSE, /* pc_relative */
851 0, /* bitpos */
852 complain_overflow_bitfield, /* complain_on_overflow */
853 bfd_elf_generic_reloc, /* special_function */
854 "R_NDS32_COPY", /* name */
855 FALSE, /* partial_inplace */
856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
858 FALSE), /* pcrel_offset */
859
860 /* Like R_NDS32_20, but used when setting global offset table
861 entries. */
862 HOWTO (R_NDS32_GLOB_DAT, /* type */
863 0, /* rightshift */
864 2, /* size (0 = byte, 1 = short, 2 = long) */
865 32, /* bitsize */
866 FALSE, /* pc_relative */
867 0, /* bitpos */
868 complain_overflow_bitfield, /* complain_on_overflow */
869 bfd_elf_generic_reloc, /* special_function */
870 "R_NDS32_GLOB_DAT", /* name */
871 FALSE, /* partial_inplace */
872 0xffffffff, /* src_mask */
873 0xffffffff, /* dst_mask */
874 FALSE), /* pcrel_offset */
875
876 /* Marks a procedure linkage table entry for a symbol. */
877 HOWTO (R_NDS32_JMP_SLOT, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_JMP_SLOT", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 /* Used only by the dynamic linker. When the object is run, this
892 longword is set to the load address of the object, plus the
893 addend. */
894 HOWTO (R_NDS32_RELATIVE, /* type */
895 0, /* rightshift */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
897 32, /* bitsize */
898 FALSE, /* pc_relative */
899 0, /* bitpos */
900 complain_overflow_bitfield, /* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_NDS32_RELATIVE", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 FALSE), /* pcrel_offset */
907
908 HOWTO (R_NDS32_GOTOFF, /* type */
909 0, /* rightshift */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
911 20, /* bitsize */
912 FALSE, /* pc_relative */
913 0, /* bitpos */
914 complain_overflow_signed, /* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_NDS32_GOTOFF", /* name */
917 FALSE, /* partial_inplace */
918 0xfffff, /* src_mask */
919 0xfffff, /* dst_mask */
920 FALSE), /* pcrel_offset */
921
922 /* An PC Relative 20-bit relocation used when setting PIC offset
923 table register. */
924 HOWTO (R_NDS32_GOTPC20, /* type */
925 0, /* rightshift */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
927 20, /* bitsize */
928 TRUE, /* pc_relative */
929 0, /* bitpos */
930 complain_overflow_signed, /* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_NDS32_GOTPC20", /* name */
933 FALSE, /* partial_inplace */
934 0xfffff, /* src_mask */
935 0xfffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
937
938 /* Like R_NDS32_HI20, but referring to the GOT table entry for
939 the symbol. */
940 HOWTO (R_NDS32_GOT_HI20, /* type */
941 12, /* rightshift */
942 2, /* size (0 = byte, 1 = short, 2 = long) */
943 20, /* bitsize */
944 FALSE, /* pc_relative */
945 0, /* bitpos */
946 complain_overflow_dont,/* complain_on_overflow */
947 bfd_elf_generic_reloc, /* special_function */
948 "R_NDS32_GOT_HI20", /* name */
949 FALSE, /* partial_inplace */
950 0x000fffff, /* src_mask */
951 0x000fffff, /* dst_mask */
952 FALSE), /* pcrel_offset */
953 HOWTO (R_NDS32_GOT_LO12, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 12, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOT_LO12", /* name */
962 FALSE, /* partial_inplace */
963 0x00000fff, /* src_mask */
964 0x00000fff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* An PC Relative relocation used when setting PIC offset table register.
968 Like R_NDS32_HI20, but referring to the GOT table entry for
969 the symbol. */
970 HOWTO (R_NDS32_GOTPC_HI20, /* type */
971 12, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 20, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_dont,/* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_GOTPC_HI20", /* name */
979 FALSE, /* partial_inplace */
980 0x000fffff, /* src_mask */
981 0x000fffff, /* dst_mask */
982 TRUE), /* pcrel_offset */
983 HOWTO (R_NDS32_GOTPC_LO12, /* type */
984 0, /* rightshift */
985 2, /* size (0 = byte, 1 = short, 2 = long) */
986 12, /* bitsize */
987 FALSE, /* pc_relative */
988 0, /* bitpos */
989 complain_overflow_dont, /* complain_on_overflow */
990 bfd_elf_generic_reloc, /* special_function */
991 "R_NDS32_GOTPC_LO12", /* name */
992 FALSE, /* partial_inplace */
993 0x00000fff, /* src_mask */
994 0x00000fff, /* dst_mask */
995 TRUE), /* pcrel_offset */
996
997 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
998 12, /* rightshift */
999 2, /* size (0 = byte, 1 = short, 2 = long) */
1000 20, /* bitsize */
1001 FALSE, /* pc_relative */
1002 0, /* bitpos */
1003 complain_overflow_dont,/* complain_on_overflow */
1004 bfd_elf_generic_reloc, /* special_function */
1005 "R_NDS32_GOTOFF_HI20", /* name */
1006 FALSE, /* partial_inplace */
1007 0x000fffff, /* src_mask */
1008 0x000fffff, /* dst_mask */
1009 FALSE), /* pcrel_offset */
1010 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 12, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 bfd_elf_generic_reloc, /* special_function */
1018 "R_NDS32_GOTOFF_LO12", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for relaxable instruction. This is used with
1025 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1026 in order to make next label aligned on word boundary. */
1027 HOWTO (R_NDS32_INSN16, /* type */
1028 0, /* rightshift */
1029 2, /* size (0 = byte, 1 = short, 2 = long) */
1030 32, /* bitsize */
1031 FALSE, /* pc_relative */
1032 0, /* bitpos */
1033 complain_overflow_dont,/* complain_on_overflow */
1034 nds32_elf_ignore_reloc,/* special_function */
1035 "R_NDS32_INSN16", /* name */
1036 FALSE, /* partial_inplace */
1037 0x00000fff, /* src_mask */
1038 0x00000fff, /* dst_mask */
1039 FALSE), /* pcrel_offset */
1040
1041 /* Alignment hint for label. */
1042 HOWTO (R_NDS32_LABEL, /* type */
1043 0, /* rightshift */
1044 2, /* size (0 = byte, 1 = short, 2 = long) */
1045 32, /* bitsize */
1046 FALSE, /* pc_relative */
1047 0, /* bitpos */
1048 complain_overflow_dont,/* complain_on_overflow */
1049 nds32_elf_ignore_reloc,/* special_function */
1050 "R_NDS32_LABEL", /* name */
1051 FALSE, /* partial_inplace */
1052 0xffffffff, /* src_mask */
1053 0xffffffff, /* dst_mask */
1054 FALSE), /* pcrel_offset */
1055
1056 /* Relax hint for unconditional call sequence */
1057 HOWTO (R_NDS32_LONGCALL1, /* type */
1058 0, /* rightshift */
1059 2, /* size (0 = byte, 1 = short, 2 = long) */
1060 32, /* bitsize */
1061 FALSE, /* pc_relative */
1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_LONGCALL1", /* name */
1066 FALSE, /* partial_inplace */
1067 0xffffffff, /* src_mask */
1068 0xffffffff, /* dst_mask */
1069 FALSE), /* pcrel_offset */
1070
1071 /* Relax hint for conditional call sequence. */
1072 HOWTO (R_NDS32_LONGCALL2, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 FALSE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LONGCALL2", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 FALSE), /* pcrel_offset */
1085
1086 /* Relax hint for conditional call sequence. */
1087 HOWTO (R_NDS32_LONGCALL3, /* type */
1088 0, /* rightshift */
1089 2, /* size (0 = byte, 1 = short, 2 = long) */
1090 32, /* bitsize */
1091 FALSE, /* pc_relative */
1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL3", /* name */
1096 FALSE, /* partial_inplace */
1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
1099 FALSE), /* pcrel_offset */
1100
1101 /* Relax hint for unconditional branch sequence. */
1102 HOWTO (R_NDS32_LONGJUMP1, /* type */
1103 0, /* rightshift */
1104 2, /* size (0 = byte, 1 = short, 2 = long) */
1105 32, /* bitsize */
1106 FALSE, /* pc_relative */
1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGJUMP1", /* name */
1111 FALSE, /* partial_inplace */
1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
1114 FALSE), /* pcrel_offset */
1115
1116 /* Relax hint for conditional branch sequence. */
1117 HOWTO (R_NDS32_LONGJUMP2, /* type */
1118 0, /* rightshift */
1119 2, /* size (0 = byte, 1 = short, 2 = long) */
1120 32, /* bitsize */
1121 FALSE, /* pc_relative */
1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGJUMP2", /* name */
1126 FALSE, /* partial_inplace */
1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
1129 FALSE), /* pcrel_offset */
1130
1131 /* Relax hint for conditional branch sequence. */
1132 HOWTO (R_NDS32_LONGJUMP3, /* type */
1133 0, /* rightshift */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1135 32, /* bitsize */
1136 FALSE, /* pc_relative */
1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP3", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 FALSE), /* pcrel_offset */
1145
1146 /* Relax hint for load/store sequence. */
1147 HOWTO (R_NDS32_LOADSTORE, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 FALSE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LOADSTORE", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 FALSE), /* pcrel_offset */
1160
1161 /* Relax hint for load/store sequence. */
1162 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1163 0, /* rightshift */
1164 1, /* size (0 = byte, 1 = short, 2 = long) */
1165 16, /* bitsize */
1166 FALSE, /* pc_relative */
1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_9_FIXED_RELA",/* name */
1171 FALSE, /* partial_inplace */
1172 0x000000ff, /* src_mask */
1173 0x000000ff, /* dst_mask */
1174 FALSE), /* pcrel_offset */
1175
1176 /* Relax hint for load/store sequence. */
1177 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1178 0, /* rightshift */
1179 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 32, /* bitsize */
1181 FALSE, /* pc_relative */
1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_15_FIXED_RELA", /* name */
1186 FALSE, /* partial_inplace */
1187 0x00003fff, /* src_mask */
1188 0x00003fff, /* dst_mask */
1189 FALSE), /* pcrel_offset */
1190
1191 /* Relax hint for load/store sequence. */
1192 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1193 0, /* rightshift */
1194 2, /* size (0 = byte, 1 = short, 2 = long) */
1195 32, /* bitsize */
1196 FALSE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_17_FIXED_RELA", /* name */
1201 FALSE, /* partial_inplace */
1202 0x0000ffff, /* src_mask */
1203 0x0000ffff, /* dst_mask */
1204 FALSE), /* pcrel_offset */
1205
1206 /* Relax hint for load/store sequence. */
1207 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1208 0, /* rightshift */
1209 2, /* size (0 = byte, 1 = short, 2 = long) */
1210 32, /* bitsize */
1211 FALSE, /* pc_relative */
1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_25_FIXED_RELA", /* name */
1216 FALSE, /* partial_inplace */
1217 0x00ffffff, /* src_mask */
1218 0x00ffffff, /* dst_mask */
1219 FALSE), /* pcrel_offset */
1220
1221 /* High 20 bits of PLT symbol offset relative to PC. */
1222 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1223 12, /* rightshift */
1224 2, /* size (0 = byte, 1 = short, 2 = long) */
1225 20, /* bitsize */
1226 FALSE, /* pc_relative */
1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 bfd_elf_generic_reloc, /* special_function */
1230 "R_NDS32_PLTREL_HI20", /* name */
1231 FALSE, /* partial_inplace */
1232 0x000fffff, /* src_mask */
1233 0x000fffff, /* dst_mask */
1234 FALSE), /* pcrel_offset */
1235
1236 /* Low 12 bits of PLT symbol offset relative to PC. */
1237 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1238 0, /* rightshift */
1239 2, /* size (0 = byte, 1 = short, 2 = long) */
1240 12, /* bitsize */
1241 FALSE, /* pc_relative */
1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 bfd_elf_generic_reloc, /* special_function */
1245 "R_NDS32_PLTREL_LO12", /* name */
1246 FALSE, /* partial_inplace */
1247 0x00000fff, /* src_mask */
1248 0x00000fff, /* dst_mask */
1249 FALSE), /* pcrel_offset */
1250
1251 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1252 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1253 12, /* rightshift */
1254 2, /* size (0 = byte, 1 = short, 2 = long) */
1255 20, /* bitsize */
1256 FALSE, /* pc_relative */
1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLT_GOTREL_HI20", /* name */
1261 FALSE, /* partial_inplace */
1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
1264 FALSE), /* pcrel_offset */
1265
1266 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1267 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1268 0, /* rightshift */
1269 2, /* size (0 = byte, 1 = short, 2 = long) */
1270 12, /* bitsize */
1271 FALSE, /* pc_relative */
1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLT_GOTREL_LO12", /* name */
1276 FALSE, /* partial_inplace */
1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
1279 FALSE), /* pcrel_offset */
1280
1281 /* Small data area 12 bits offset. */
1282 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1283 2, /* rightshift */
1284 2, /* size (0 = byte, 1 = short, 2 = long) */
1285 12, /* bitsize */
1286 FALSE, /* pc_relative */
1287 0, /* bitpos */
1288 complain_overflow_signed, /* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_SDA12S2_DP_RELA", /* name */
1291 FALSE, /* partial_inplace */
1292 0x00000fff, /* src_mask */
1293 0x00000fff, /* dst_mask */
1294 FALSE), /* pcrel_offset */
1295
1296 /* Small data area 12 bits offset. */
1297 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1298 2, /* rightshift */
1299 2, /* size (0 = byte, 1 = short, 2 = long) */
1300 12, /* bitsize */
1301 FALSE, /* pc_relative */
1302 0, /* bitpos */
1303 complain_overflow_signed, /* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_SDA12S2_SP_RELA", /* name */
1306 FALSE, /* partial_inplace */
1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
1309 FALSE), /* pcrel_offset */
1310 /* Lower 12 bits of address. */
1311
1312 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1313 2, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 10, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_LO12S2_DP_RELA", /* name */
1321 FALSE, /* partial_inplace */
1322 0x000003ff, /* src_mask */
1323 0x000003ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 /* Lower 12 bits of address. */
1327 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1328 2, /* rightshift */
1329 2, /* size (0 = byte, 1 = short, 2 = long) */
1330 10, /* bitsize */
1331 FALSE, /* pc_relative */
1332 0, /* bitpos */
1333 complain_overflow_dont,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_LO12S2_SP_RELA", /* name */
1336 FALSE, /* partial_inplace */
1337 0x000003ff, /* src_mask */
1338 0x000003ff, /* dst_mask */
1339 FALSE), /* pcrel_offset */
1340 /* Lower 12 bits of address. Special identity for or case. */
1341 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1342 0, /* rightshift */
1343 2, /* size (0 = byte, 1 = short, 2 = long) */
1344 12, /* bitsize */
1345 FALSE, /* pc_relative */
1346 0, /* bitpos */
1347 complain_overflow_dont,/* complain_on_overflow */
1348 bfd_elf_generic_reloc, /* special_function */
1349 "R_NDS32_LO12S0_ORI_RELA", /* name */
1350 FALSE, /* partial_inplace */
1351 0x00000fff, /* src_mask */
1352 0x00000fff, /* dst_mask */
1353 FALSE), /* pcrel_offset */
1354 /* Small data area 19 bits offset. */
1355 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1356 3, /* rightshift */
1357 2, /* size (0 = byte, 1 = short, 2 = long) */
1358 16, /* bitsize */
1359 FALSE, /* pc_relative */
1360 0, /* bitpos */
1361 complain_overflow_signed, /* complain_on_overflow */
1362 bfd_elf_generic_reloc, /* special_function */
1363 "R_NDS32_SDA16S3_RELA",/* name */
1364 FALSE, /* partial_inplace */
1365 0x0000ffff, /* src_mask */
1366 0x0000ffff, /* dst_mask */
1367 FALSE), /* pcrel_offset */
1368
1369 /* Small data area 15 bits offset. */
1370 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1371 2, /* rightshift */
1372 2, /* size (0 = byte, 1 = short, 2 = long) */
1373 17, /* bitsize */
1374 FALSE, /* pc_relative */
1375 0, /* bitpos */
1376 complain_overflow_signed, /* complain_on_overflow */
1377 bfd_elf_generic_reloc, /* special_function */
1378 "R_NDS32_SDA17S2_RELA",/* name */
1379 FALSE, /* partial_inplace */
1380 0x0001ffff, /* src_mask */
1381 0x0001ffff, /* dst_mask */
1382 FALSE), /* pcrel_offset */
1383
1384 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1385 1, /* rightshift */
1386 2, /* size (0 = byte, 1 = short, 2 = long) */
1387 18, /* bitsize */
1388 FALSE, /* pc_relative */
1389 0, /* bitpos */
1390 complain_overflow_signed, /* complain_on_overflow */
1391 bfd_elf_generic_reloc, /* special_function */
1392 "R_NDS32_SDA18S1_RELA",/* name */
1393 FALSE, /* partial_inplace */
1394 0x0003ffff, /* src_mask */
1395 0x0003ffff, /* dst_mask */
1396 FALSE), /* pcrel_offset */
1397
1398 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1399 0, /* rightshift */
1400 2, /* size (0 = byte, 1 = short, 2 = long) */
1401 19, /* bitsize */
1402 FALSE, /* pc_relative */
1403 0, /* bitpos */
1404 complain_overflow_signed, /* complain_on_overflow */
1405 bfd_elf_generic_reloc, /* special_function */
1406 "R_NDS32_SDA19S0_RELA",/* name */
1407 FALSE, /* partial_inplace */
1408 0x0007ffff, /* src_mask */
1409 0x0007ffff, /* dst_mask */
1410 FALSE), /* pcrel_offset */
1411 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1412 0, /* rightshift */
1413 0, /* size (0 = byte, 1 = short, 2 = long) */
1414 8, /* bitsize */
1415 FALSE, /* pc_relative */
1416 0, /* bitpos */
1417 complain_overflow_dont,/* complain_on_overflow */
1418 nds32_elf_ignore_reloc,/* special_function */
1419 "R_NDS32_DWARF2_OP1_RELA", /* name */
1420 FALSE, /* partial_inplace */
1421 0xff, /* src_mask */
1422 0xff, /* dst_mask */
1423 FALSE), /* pcrel_offset */
1424 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1425 0, /* rightshift */
1426 1, /* size (0 = byte, 1 = short, 2 = long) */
1427 16, /* bitsize */
1428 FALSE, /* pc_relative */
1429 0, /* bitpos */
1430 complain_overflow_dont,/* complain_on_overflow */
1431 nds32_elf_ignore_reloc,/* special_function */
1432 "R_NDS32_DWARF2_OP2_RELA", /* name */
1433 FALSE, /* partial_inplace */
1434 0xffff, /* src_mask */
1435 0xffff, /* dst_mask */
1436 FALSE), /* pcrel_offset */
1437 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1438 0, /* rightshift */
1439 2, /* size (0 = byte, 1 = short, 2 = long) */
1440 32, /* bitsize */
1441 FALSE, /* pc_relative */
1442 0, /* bitpos */
1443 complain_overflow_dont,/* complain_on_overflow */
1444 nds32_elf_ignore_reloc,/* special_function */
1445 "R_NDS32_DWARF2_LEB_RELA", /* name */
1446 FALSE, /* partial_inplace */
1447 0xffffffff, /* src_mask */
1448 0xffffffff, /* dst_mask */
1449 FALSE), /* pcrel_offset */
1450 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1451 0, /* rightshift */
1452 1, /* size (0 = byte, 1 = short, 2 = long) */
1453 16, /* bitsize */
1454 FALSE, /* pc_relative */
1455 0, /* bitpos */
1456 complain_overflow_dont,/* complain_on_overflow */
1457 nds32_elf_ignore_reloc,/* special_function */
1458 "R_NDS32_UPDATE_TA_RELA", /* name */
1459 FALSE, /* partial_inplace */
1460 0xffff, /* src_mask */
1461 0xffff, /* dst_mask */
1462 FALSE), /* pcrel_offset */
1463 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1464 entry for the symbol. */
1465 HOWTO (R_NDS32_9_PLTREL, /* type */
1466 1, /* rightshift */
1467 1, /* size (0 = byte, 1 = short, 2 = long) */
1468 8, /* bitsize */
1469 TRUE, /* pc_relative */
1470 0, /* bitpos */
1471 complain_overflow_signed, /* complain_on_overflow */
1472 bfd_elf_generic_reloc, /* special_function */
1473 "R_NDS32_9_PLTREL", /* name */
1474 FALSE, /* partial_inplace */
1475 0xff, /* src_mask */
1476 0xff, /* dst_mask */
1477 TRUE), /* pcrel_offset */
1478 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1479 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1480 0, /* rightshift */
1481 2, /* size (0 = byte, 1 = short, 2 = long) */
1482 20, /* bitsize */
1483 FALSE, /* pc_relative */
1484 0, /* bitpos */
1485 complain_overflow_dont,/* complain_on_overflow */
1486 bfd_elf_generic_reloc, /* special_function */
1487 "R_NDS32_PLT_GOTREL_LO20", /* name */
1488 FALSE, /* partial_inplace */
1489 0x000fffff, /* src_mask */
1490 0x000fffff, /* dst_mask */
1491 FALSE), /* pcrel_offset */
1492 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1493 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1494 0, /* rightshift */
1495 2, /* size (0 = byte, 1 = short, 2 = long) */
1496 15, /* bitsize */
1497 FALSE, /* pc_relative */
1498 0, /* bitpos */
1499 complain_overflow_dont,/* complain_on_overflow */
1500 bfd_elf_generic_reloc, /* special_function */
1501 "R_NDS32_PLT_GOTREL_LO15", /* name */
1502 FALSE, /* partial_inplace */
1503 0x00007fff, /* src_mask */
1504 0x00007fff, /* dst_mask */
1505 FALSE), /* pcrel_offset */
1506 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1507 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1508 0, /* rightshift */
1509 2, /* size (0 = byte, 1 = short, 2 = long) */
1510 19, /* bitsize */
1511 FALSE, /* pc_relative */
1512 0, /* bitpos */
1513 complain_overflow_dont,/* complain_on_overflow */
1514 bfd_elf_generic_reloc, /* special_function */
1515 "R_NDS32_PLT_GOTREL_LO19", /* name */
1516 FALSE, /* partial_inplace */
1517 0x0007ffff, /* src_mask */
1518 0x0007ffff, /* dst_mask */
1519 FALSE), /* pcrel_offset */
1520 HOWTO (R_NDS32_GOT_LO15, /* type */
1521 0, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 15, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_dont,/* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 "R_NDS32_GOT_LO15", /* name */
1529 FALSE, /* partial_inplace */
1530 0x00007fff, /* src_mask */
1531 0x00007fff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533 HOWTO (R_NDS32_GOT_LO19, /* type */
1534 0, /* rightshift */
1535 2, /* size (0 = byte, 1 = short, 2 = long) */
1536 19, /* bitsize */
1537 FALSE, /* pc_relative */
1538 0, /* bitpos */
1539 complain_overflow_dont,/* complain_on_overflow */
1540 bfd_elf_generic_reloc, /* special_function */
1541 "R_NDS32_GOT_LO19", /* name */
1542 FALSE, /* partial_inplace */
1543 0x0007ffff, /* src_mask */
1544 0x0007ffff, /* dst_mask */
1545 FALSE), /* pcrel_offset */
1546 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 15, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_GOTOFF_LO15", /* name */
1555 FALSE, /* partial_inplace */
1556 0x00007fff, /* src_mask */
1557 0x00007fff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1560 0, /* rightshift */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1562 19, /* bitsize */
1563 FALSE, /* pc_relative */
1564 0, /* bitpos */
1565 complain_overflow_dont,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_NDS32_GOTOFF_LO19", /* name */
1568 FALSE, /* partial_inplace */
1569 0x0007ffff, /* src_mask */
1570 0x0007ffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1572 /* GOT 15 bits offset. */
1573 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1574 2, /* rightshift */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1576 15, /* bitsize */
1577 FALSE, /* pc_relative */
1578 0, /* bitpos */
1579 complain_overflow_signed, /* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_NDS32_GOT15S2_RELA",/* name */
1582 FALSE, /* partial_inplace */
1583 0x00007fff, /* src_mask */
1584 0x00007fff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1586 /* GOT 17 bits offset. */
1587 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1588 2, /* rightshift */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1590 17, /* bitsize */
1591 FALSE, /* pc_relative */
1592 0, /* bitpos */
1593 complain_overflow_signed, /* complain_on_overflow */
1594 bfd_elf_generic_reloc, /* special_function */
1595 "R_NDS32_GOT17S2_RELA",/* name */
1596 FALSE, /* partial_inplace */
1597 0x0001ffff, /* src_mask */
1598 0x0001ffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1600 /* A 5 bit address. */
1601 HOWTO (R_NDS32_5_RELA, /* type */
1602 0, /* rightshift */
1603 1, /* size (0 = byte, 1 = short, 2 = long) */
1604 5, /* bitsize */
1605 FALSE, /* pc_relative */
1606 0, /* bitpos */
1607 complain_overflow_signed, /* complain_on_overflow */
1608 bfd_elf_generic_reloc, /* special_function */
1609 "R_NDS32_5_RELA", /* name */
1610 FALSE, /* partial_inplace */
1611 0x1f, /* src_mask */
1612 0x1f, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1614 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1615 1, /* rightshift */
1616 1, /* size (0 = byte, 1 = short, 2 = long) */
1617 9, /* bitsize */
1618 TRUE, /* pc_relative */
1619 0, /* bitpos */
1620 complain_overflow_unsigned, /* complain_on_overflow */
1621 bfd_elf_generic_reloc, /* special_function */
1622 "R_NDS32_10_UPCREL_RELA", /* name */
1623 FALSE, /* partial_inplace */
1624 0x1ff, /* src_mask */
1625 0x1ff, /* dst_mask */
1626 TRUE), /* pcrel_offset */
1627 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1628 2, /* rightshift */
1629 1, /* size (0 = byte, 1 = short, 2 = long) */
1630 7, /* bitsize */
1631 FALSE, /* pc_relative */
1632 0, /* bitpos */
1633 complain_overflow_unsigned, /* complain_on_overflow */
1634 bfd_elf_generic_reloc, /* special_function */
1635 "R_NDS32_SDA_FP7U2_RELA", /* name */
1636 FALSE, /* partial_inplace */
1637 0x0000007f, /* src_mask */
1638 0x0000007f, /* dst_mask */
1639 FALSE), /* pcrel_offset */
1640 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1641 1, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 8, /* bitsize */
1644 TRUE, /* pc_relative */
1645 0, /* bitpos */
1646 complain_overflow_signed, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1649 FALSE, /* partial_inplace */
1650 0xff, /* src_mask */
1651 0xff, /* dst_mask */
1652 TRUE), /* pcrel_offset */
1653 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1654 1, /* rightshift */
1655 2, /* size (0 = byte, 1 = short, 2 = long) */
1656 24, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_NDS32_25_ABS_RELA", /* name */
1662 FALSE, /* partial_inplace */
1663 0xffffff, /* src_mask */
1664 0xffffff, /* dst_mask */
1665 FALSE), /* pcrel_offset */
1666
1667 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1668 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1669 1, /* rightshift */
1670 2, /* size (0 = byte, 1 = short, 2 = long) */
1671 16, /* bitsize */
1672 TRUE, /* pc_relative */
1673 0, /* bitpos */
1674 complain_overflow_signed, /* complain_on_overflow */
1675 bfd_elf_generic_reloc, /* special_function */
1676 "R_NDS32_17IFC_PCREL_RELA", /* name */
1677 FALSE, /* partial_inplace */
1678 0xffff, /* src_mask */
1679 0xffff, /* dst_mask */
1680 TRUE), /* pcrel_offset */
1681
1682 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1683 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1684 1, /* rightshift */
1685 1, /* size (0 = byte, 1 = short, 2 = long) */
1686 9, /* bitsize */
1687 TRUE, /* pc_relative */
1688 0, /* bitpos */
1689 complain_overflow_unsigned, /* complain_on_overflow */
1690 bfd_elf_generic_reloc, /* special_function */
1691 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1692 FALSE, /* partial_inplace */
1693 0x1ff, /* src_mask */
1694 0x1ff, /* dst_mask */
1695 TRUE), /* pcrel_offset */
1c8f6a4d
KLC		 1696
1697 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1698 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1699 12, /* rightshift */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 20, /* bitsize */
1702 FALSE, /* pc_relative */
1703 0, /* bitpos */
1704 complain_overflow_dont, /* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_NDS32_TLS_LE_HI20", /* name */
1707 FALSE, /* partial_inplace */
1708 0x000fffff, /* src_mask */
1709 0x000fffff, /* dst_mask */
1710 FALSE), /* pcrel_offset */
1711 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1712 0, /* rightshift */
1713 2, /* size (0 = byte, 1 = short, 2 = long) */
1714 12, /* bitsize */
1715 FALSE, /* pc_relative */
1716 0, /* bitpos */
1717 complain_overflow_dont, /* complain_on_overflow */
1718 bfd_elf_generic_reloc, /* special_function */
1719 "R_NDS32_TLS_LE_LO12", /* name */
1720 FALSE, /* partial_inplace */
1721 0x00000fff, /* src_mask */
1722 0x00000fff, /* dst_mask */
1723 FALSE), /* pcrel_offset */
1724
1725 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1726 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1727 12, /* rightshift */
1728 2, /* size (0 = byte, 1 = short, 2 = long) */
1729 20, /* bitsize */
1730 FALSE, /* pc_relative */
1731 0, /* bitpos */
1732 complain_overflow_dont, /* complain_on_overflow */
1733 bfd_elf_generic_reloc, /* special_function */
1734 "R_NDS32_TLS_IE_HI20", /* name */
1735 FALSE, /* partial_inplace */
1736 0x000fffff, /* src_mask */
1737 0x000fffff, /* dst_mask */
1738 FALSE), /* pcrel_offset */
1739 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1740 2, /* rightshift */
1741 2, /* size (0 = byte, 1 = short, 2 = long) */
1742 10, /* bitsize */
1743 FALSE, /* pc_relative */
1744 0, /* bitpos */
1745 complain_overflow_dont, /* complain_on_overflow */
1746 bfd_elf_generic_reloc, /* special_function */
1747 "R_NDS32_TLS_IE_LO12S2", /* name */
1748 FALSE, /* partial_inplace */
1749 0x000003ff, /* src_mask */
1750 0x000003ff, /* dst_mask */
1751 FALSE), /* pcrel_offset */
1752 /* Mark a TLS IE entry in GOT. */
1753 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1754 0, /* rightshift */
1755 2, /* size (0 = byte, 1 = short, 2 = long) */
1756 32, /* bitsize */
1757 FALSE, /* pc_relative */
1758 0, /* bitpos */
1759 complain_overflow_bitfield, /* complain_on_overflow */
1760 bfd_elf_generic_reloc, /* special_function */
1761 "R_NDS32_TLS_TPOFF", /* name */
1762 FALSE, /* partial_inplace */
1763 0xffffffff, /* src_mask */
1764 0xffffffff, /* dst_mask */
1765 FALSE), /* pcrel_offset */
1766 /* A 20 bit address. */
1767 HOWTO (R_NDS32_TLS_LE_20, /* type */
1768 0, /* rightshift */
1769 2, /* size (0 = byte, 1 = short, 2 = long) */
1770 20, /* bitsize */
1771 FALSE, /* pc_relative */
1772 0, /* bitpos */
1773 complain_overflow_signed, /* complain_on_overflow */
1774 bfd_elf_generic_reloc, /* special_function */
1775 "R_NDS32_TLS_LE_20", /* name */
1776 FALSE, /* partial_inplace */
1777 0xfffff, /* src_mask */
1778 0xfffff, /* dst_mask */
1779 FALSE), /* pcrel_offset */
1780 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1781 0, /* rightshift */
1782 2, /* size (0 = byte, 1 = short, 2 = long) */
1783 15, /* bitsize */
1784 FALSE, /* pc_relative */
1785 0, /* bitpos */
1786 complain_overflow_signed, /* complain_on_overflow */
1787 bfd_elf_generic_reloc, /* special_function */
1788 "R_NDS32_TLS_LE_15S0", /* name */
1789 FALSE, /* partial_inplace */
1790 0x7fff, /* src_mask */
1791 0x7fff, /* dst_mask */
1792 FALSE), /* pcrel_offset */
1793 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1794 1, /* rightshift */
1795 2, /* size (0 = byte, 1 = short, 2 = long) */
1796 15, /* bitsize */
1797 FALSE, /* pc_relative */
1798 0, /* bitpos */
1799 complain_overflow_signed, /* complain_on_overflow */
1800 bfd_elf_generic_reloc, /* special_function */
1801 "R_NDS32_TLS_LE_15S1", /* name */
1802 FALSE, /* partial_inplace */
1803 0x7fff, /* src_mask */
1804 0x7fff, /* dst_mask */
1805 FALSE), /* pcrel_offset */
1806 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1807 2, /* rightshift */
1808 2, /* size (0 = byte, 1 = short, 2 = long) */
1809 15, /* bitsize */
1810 FALSE, /* pc_relative */
1811 0, /* bitpos */
1812 complain_overflow_signed, /* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_LE_15S2", /* name */
1815 FALSE, /* partial_inplace */
1816 0x7fff, /* src_mask */
1817 0x7fff, /* dst_mask */
1818 FALSE), /* pcrel_offset */
1819
1820 /* Relax hint for unconditional call sequence */
1821 HOWTO (R_NDS32_LONGCALL4, /* type */
1822 0, /* rightshift */
1823 2, /* size (0 = byte, 1 = short, 2 = long) */
1824 32, /* bitsize */
1825 FALSE, /* pc_relative */
1826 0, /* bitpos */
1827 complain_overflow_dont, /* complain_on_overflow */
1828 nds32_elf_ignore_reloc, /* special_function */
1829 "R_NDS32_LONGCALL4", /* name */
1830 FALSE, /* partial_inplace */
1831 0xffffffff, /* src_mask */
1832 0xffffffff, /* dst_mask */
1833 FALSE), /* pcrel_offset */
1834
1835 /* Relax hint for conditional call sequence. */
1836 HOWTO (R_NDS32_LONGCALL5, /* type */
1837 0, /* rightshift */
1838 2, /* size (0 = byte, 1 = short, 2 = long) */
1839 32, /* bitsize */
1840 FALSE, /* pc_relative */
1841 0, /* bitpos */
1842 complain_overflow_dont, /* complain_on_overflow */
1843 nds32_elf_ignore_reloc, /* special_function */
1844 "R_NDS32_LONGCALL5", /* name */
1845 FALSE, /* partial_inplace */
1846 0xffffffff, /* src_mask */
1847 0xffffffff, /* dst_mask */
1848 FALSE), /* pcrel_offset */
1849
1850 /* Relax hint for conditional call sequence. */
1851 HOWTO (R_NDS32_LONGCALL6, /* type */
1852 0, /* rightshift */
1853 2, /* size (0 = byte, 1 = short, 2 = long) */
1854 32, /* bitsize */
1855 FALSE, /* pc_relative */
1856 0, /* bitpos */
1857 complain_overflow_dont, /* complain_on_overflow */
1858 nds32_elf_ignore_reloc, /* special_function */
1859 "R_NDS32_LONGCALL6", /* name */
1860 FALSE, /* partial_inplace */
1861 0xffffffff, /* src_mask */
1862 0xffffffff, /* dst_mask */
1863 FALSE), /* pcrel_offset */
1864
1865 /* Relax hint for unconditional branch sequence. */
1866 HOWTO (R_NDS32_LONGJUMP4, /* type */
1867 0, /* rightshift */
1868 2, /* size (0 = byte, 1 = short, 2 = long) */
1869 32, /* bitsize */
1870 FALSE, /* pc_relative */
1871 0, /* bitpos */
1872 complain_overflow_dont, /* complain_on_overflow */
1873 nds32_elf_ignore_reloc, /* special_function */
1874 "R_NDS32_LONGJUMP4", /* name */
1875 FALSE, /* partial_inplace */
1876 0xffffffff, /* src_mask */
1877 0xffffffff, /* dst_mask */
1878 FALSE), /* pcrel_offset */
1879
1880 /* Relax hint for conditional branch sequence. */
1881 HOWTO (R_NDS32_LONGJUMP5, /* type */
1882 0, /* rightshift */
1883 2, /* size (0 = byte, 1 = short, 2 = long) */
1884 32, /* bitsize */
1885 FALSE, /* pc_relative */
1886 0, /* bitpos */
1887 complain_overflow_dont, /* complain_on_overflow */
1888 nds32_elf_ignore_reloc, /* special_function */
1889 "R_NDS32_LONGJUMP5", /* name */
1890 FALSE, /* partial_inplace */
1891 0xffffffff, /* src_mask */
1892 0xffffffff, /* dst_mask */
1893 FALSE), /* pcrel_offset */
1894
1895 /* Relax hint for conditional branch sequence. */
1896 HOWTO (R_NDS32_LONGJUMP6, /* type */
1897 0, /* rightshift */
1898 2, /* size (0 = byte, 1 = short, 2 = long) */
1899 32, /* bitsize */
1900 FALSE, /* pc_relative */
1901 0, /* bitpos */
1902 complain_overflow_dont, /* complain_on_overflow */
1903 nds32_elf_ignore_reloc, /* special_function */
1904 "R_NDS32_LONGJUMP6", /* name */
1905 FALSE, /* partial_inplace */
1906 0xffffffff, /* src_mask */
1907 0xffffffff, /* dst_mask */
1908 FALSE), /* pcrel_offset */
1909
1910 /* Relax hint for conditional branch sequence. */
1911 HOWTO (R_NDS32_LONGJUMP7, /* type */
1912 0, /* rightshift */
1913 2, /* size (0 = byte, 1 = short, 2 = long) */
1914 32, /* bitsize */
1915 FALSE, /* pc_relative */
1916 0, /* bitpos */
1917 complain_overflow_dont, /* complain_on_overflow */
1918 nds32_elf_ignore_reloc, /* special_function */
1919 "R_NDS32_LONGJUMP7", /* name */
1920 FALSE, /* partial_inplace */
1921 0xffffffff, /* src_mask */
1922 0xffffffff, /* dst_mask */
1923 FALSE), /* pcrel_offset */
35c08157
KLC		 1924};
1925
1926/* Relocations used for relaxation. */
1927static reloc_howto_type nds32_elf_relax_howto_table[] =
1928{
1929 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1930 0, /* rightshift */
1931 2, /* size (0 = byte, 1 = short, 2 = long) */
1932 32, /* bitsize */
1933 FALSE, /* pc_relative */
1934 0, /* bitpos */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 nds32_elf_ignore_reloc,/* special_function */
1937 "R_NDS32_RELAX_ENTRY", /* name */
1938 FALSE, /* partial_inplace */
1939 0xffffffff, /* src_mask */
1940 0xffffffff, /* dst_mask */
1941 FALSE), /* pcrel_offset */
1942 HOWTO (R_NDS32_GOT_SUFF, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont,/* complain_on_overflow */
1949 nds32_elf_ignore_reloc,/* special_function */
1950 "R_NDS32_GOT_SUFF", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1956 0, /* rightshift */
1957 2, /* size (0 = byte, 1 = short, 2 = long) */
1958 32, /* bitsize */
1959 FALSE, /* pc_relative */
1960 0, /* bitpos */
1961 complain_overflow_bitfield, /* complain_on_overflow */
1962 nds32_elf_ignore_reloc,/* special_function */
1963 "R_NDS32_GOTOFF_SUFF", /* name */
1964 FALSE, /* partial_inplace */
1965 0xffffffff, /* src_mask */
1966 0xffffffff, /* dst_mask */
1967 FALSE), /* pcrel_offset */
1968 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1969 0, /* rightshift */
1970 2, /* size (0 = byte, 1 = short, 2 = long) */
1971 32, /* bitsize */
1972 FALSE, /* pc_relative */
1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_PLT_GOT_SUFF",/* name */
1977 FALSE, /* partial_inplace */
1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
1980 FALSE), /* pcrel_offset */
1981 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1982 0, /* rightshift */
1983 2, /* size (0 = byte, 1 = short, 2 = long) */
1984 32, /* bitsize */
1985 FALSE, /* pc_relative */
1986 0, /* bitpos */
1987 complain_overflow_dont,/* complain_on_overflow */
1988 nds32_elf_ignore_reloc,/* special_function */
1989 "R_NDS32_MULCALL_SUFF",/* name */
1990 FALSE, /* partial_inplace */
1991 0xffffffff, /* src_mask */
1992 0xffffffff, /* dst_mask */
1993 FALSE), /* pcrel_offset */
1994 HOWTO (R_NDS32_PTR, /* type */
1995 0, /* rightshift */
1996 2, /* size (0 = byte, 1 = short, 2 = long) */
1997 32, /* bitsize */
1998 FALSE, /* pc_relative */
1999 0, /* bitpos */
2000 complain_overflow_dont,/* complain_on_overflow */
2001 nds32_elf_ignore_reloc,/* special_function */
2002 "R_NDS32_PTR", /* name */
2003 FALSE, /* partial_inplace */
2004 0xffffffff, /* src_mask */
2005 0xffffffff, /* dst_mask */
2006 FALSE), /* pcrel_offset */
2007 HOWTO (R_NDS32_PTR_COUNT, /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 32, /* bitsize */
2011 FALSE, /* pc_relative */
2012 0, /* bitpos */
2013 complain_overflow_dont,/* complain_on_overflow */
2014 nds32_elf_ignore_reloc,/* special_function */
2015 "R_NDS32_PTR_COUNT", /* name */
2016 FALSE, /* partial_inplace */
2017 0xffffffff, /* src_mask */
2018 0xffffffff, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2021 0, /* rightshift */
2022 2, /* size (0 = byte, 1 = short, 2 = long) */
2023 32, /* bitsize */
2024 FALSE, /* pc_relative */
2025 0, /* bitpos */
2026 complain_overflow_dont,/* complain_on_overflow */
2027 nds32_elf_ignore_reloc,/* special_function */
2028 "R_NDS32_PTR_RESOLVED",/* name */
2029 FALSE, /* partial_inplace */
2030 0xffffffff, /* src_mask */
2031 0xffffffff, /* dst_mask */
2032 FALSE), /* pcrel_offset */
2033 HOWTO (R_NDS32_PLTBLOCK, /* type */
2034 0, /* rightshift */
2035 2, /* size (0 = byte, 1 = short, 2 = long) */
2036 32, /* bitsize */
2037 FALSE, /* pc_relative */
2038 0, /* bitpos */
2039 complain_overflow_dont,/* complain_on_overflow */
2040 nds32_elf_ignore_reloc,/* special_function */
2041 "R_NDS32_PLTBLOCK", /* name */
2042 FALSE, /* partial_inplace */
2043 0xffffffff, /* src_mask */
2044 0xffffffff, /* dst_mask */
2045 FALSE), /* pcrel_offset */
2046 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2047 0, /* rightshift */
2048 2, /* size (0 = byte, 1 = short, 2 = long) */
2049 32, /* bitsize */
2050 FALSE, /* pc_relative */
2051 0, /* bitpos */
2052 complain_overflow_dont,/* complain_on_overflow */
2053 nds32_elf_ignore_reloc,/* special_function */
2054 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2055 FALSE, /* partial_inplace */
2056 0xffffffff, /* src_mask */
2057 0xffffffff, /* dst_mask */
2058 FALSE), /* pcrel_offset */
2059 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2060 0, /* rightshift */
2061 2, /* size (0 = byte, 1 = short, 2 = long) */
2062 32, /* bitsize */
2063 FALSE, /* pc_relative */
2064 0, /* bitpos */
2065 complain_overflow_dont,/* complain_on_overflow */
2066 nds32_elf_ignore_reloc,/* special_function */
2067 "R_NDS32_RELAX_REGION_END", /* name */
2068 FALSE, /* partial_inplace */
2069 0xffffffff, /* src_mask */
2070 0xffffffff, /* dst_mask */
2071 FALSE), /* pcrel_offset */
2072 HOWTO (R_NDS32_MINUEND, /* type */
2073 0, /* rightshift */
2074 2, /* size (0 = byte, 1 = short, 2 = long) */
2075 32, /* bitsize */
2076 FALSE, /* pc_relative */
2077 0, /* bitpos */
2078 complain_overflow_dont,/* complain_on_overflow */
2079 nds32_elf_ignore_reloc,/* special_function */
2080 "R_NDS32_MINUEND", /* name */
2081 FALSE, /* partial_inplace */
2082 0xffffffff, /* src_mask */
2083 0xffffffff, /* dst_mask */
2084 FALSE), /* pcrel_offset */
2085 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2086 0, /* rightshift */
2087 2, /* size (0 = byte, 1 = short, 2 = long) */
2088 32, /* bitsize */
2089 FALSE, /* pc_relative */
2090 0, /* bitpos */
2091 complain_overflow_dont,/* complain_on_overflow */
2092 nds32_elf_ignore_reloc,/* special_function */
2093 "R_NDS32_SUBTRAHEND", /* name */
2094 FALSE, /* partial_inplace */
2095 0xffffffff, /* src_mask */
2096 0xffffffff, /* dst_mask */
2097 FALSE), /* pcrel_offset */
2098 HOWTO (R_NDS32_DIFF8, /* type */
2099 0, /* rightshift */
2100 0, /* size (0 = byte, 1 = short, 2 = long) */
2101 8, /* bitsize */
2102 FALSE, /* pc_relative */
2103 0, /* bitpos */
2104 complain_overflow_dont,/* complain_on_overflow */
2105 nds32_elf_ignore_reloc,/* special_function */
2106 "R_NDS32_DIFF8", /* name */
2107 FALSE, /* partial_inplace */
2108 0x000000ff, /* src_mask */
2109 0x000000ff, /* dst_mask */
2110 FALSE), /* pcrel_offset */
2111 HOWTO (R_NDS32_DIFF16, /* type */
2112 0, /* rightshift */
2113 1, /* size (0 = byte, 1 = short, 2 = long) */
2114 16, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
2117 complain_overflow_dont,/* complain_on_overflow */
2118 nds32_elf_ignore_reloc,/* special_function */
2119 "R_NDS32_DIFF16", /* name */
2120 FALSE, /* partial_inplace */
2121 0x0000ffff, /* src_mask */
2122 0x0000ffff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124 HOWTO (R_NDS32_DIFF32, /* type */
2125 0, /* rightshift */
2126 2, /* size (0 = byte, 1 = short, 2 = long) */
2127 32, /* bitsize */
2128 FALSE, /* pc_relative */
2129 0, /* bitpos */
2130 complain_overflow_dont,/* complain_on_overflow */
2131 nds32_elf_ignore_reloc,/* special_function */
2132 "R_NDS32_DIFF32", /* name */
2133 FALSE, /* partial_inplace */
2134 0xffffffff, /* src_mask */
2135 0xffffffff, /* dst_mask */
2136 FALSE), /* pcrel_offset */
2137 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2138 0, /* rightshift */
2139 0, /* size (0 = byte, 1 = short, 2 = long) */
2140 0, /* bitsize */
2141 FALSE, /* pc_relative */
2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_DIFF_ULEB128",/* name */
2146 FALSE, /* partial_inplace */
2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
2149 FALSE), /* pcrel_offset */
2150 HOWTO (R_NDS32_DATA, /* type */
2151 0, /* rightshift */
2152 2, /* size (0 = byte, 1 = short, 2 = long) */
2153 32, /* bitsize */
2154 FALSE, /* pc_relative */
2155 0, /* bitpos */
2156 complain_overflow_dont,/* complain_on_overflow */
2157 nds32_elf_ignore_reloc,/* special_function */
2158 "R_NDS32_DATA", /* name */
2159 FALSE, /* partial_inplace */
2160 0xffffffff, /* src_mask */
2161 0xffffffff, /* dst_mask */
2162 FALSE), /* pcrel_offset */
2163 HOWTO (R_NDS32_TRAN, /* type */
2164 0, /* rightshift */
2165 2, /* size (0 = byte, 1 = short, 2 = long) */
2166 32, /* bitsize */
2167 FALSE, /* pc_relative */
2168 0, /* bitpos */
2169 complain_overflow_dont,/* complain_on_overflow */
2170 nds32_elf_ignore_reloc,/* special_function */
2171 "R_NDS32_TRAN", /* name */
2172 FALSE, /* partial_inplace */
2173 0xffffffff, /* src_mask */
2174 0xffffffff, /* dst_mask */
2175 FALSE), /* pcrel_offset */
1c8f6a4d
KLC		 2176 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2177 0, /* rightshift */
2178 2, /* size (0 = byte, 1 = short, 2 = long) */
2179 32, /* bitsize */
2180 FALSE, /* pc_relative */
2181 0, /* bitpos */
2182 complain_overflow_dont, /* complain_on_overflow */
2183 nds32_elf_ignore_reloc, /* special_function */
2184 "R_NDS32_TLS_LE_ADD", /* name */
2185 FALSE, /* partial_inplace */
2186 0xffffffff, /* src_mask */
2187 0xffffffff, /* dst_mask */
2188 FALSE), /* pcrel_offset */
2189 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2190 0, /* rightshift */
2191 2, /* size (0 = byte, 1 = short, 2 = long) */
2192 32, /* bitsize */
2193 FALSE, /* pc_relative */
2194 0, /* bitpos */
2195 complain_overflow_dont, /* complain_on_overflow */
2196 nds32_elf_ignore_reloc, /* special_function */
2197 "R_NDS32_TLS_LE_LS", /* name */
2198 FALSE, /* partial_inplace */
2199 0xffffffff, /* src_mask */
2200 0xffffffff, /* dst_mask */
2201 FALSE), /* pcrel_offset */
2202 HOWTO (R_NDS32_EMPTY, /* type */
2203 0, /* rightshift */
2204 2, /* size (0 = byte, 1 = short, 2 = long) */
2205 32, /* bitsize */
2206 FALSE, /* pc_relative */
2207 0, /* bitpos */
2208 complain_overflow_dont, /* complain_on_overflow */
2209 nds32_elf_ignore_reloc, /* special_function */
2210 "R_NDS32_EMPTY", /* name */
2211 FALSE, /* partial_inplace */
2212 0xffffffff, /* src_mask */
2213 0xffffffff, /* dst_mask */
2214 FALSE), /* pcrel_offset */
35c08157
KLC		 2215};
2216
2217\f
2218/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2219 This prototype is the same as qsort (). */
2220
2221void
2222nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2223 int (*compar) (const void *lhs, const void *rhs))
2224{
2225 char *ptr = (char *) base;
1c8f6a4d 2226 int i, j;
e1fa0163 2227 char *tmp = xmalloc (size);
35c08157
KLC		 2228
2229 /* If i is less than j, i is inserted before j.
2230
2231 |---- j ----- i --------------|
2232 \ / \ /
2233 sorted unsorted
2234 */
2235
1c8f6a4d 2236 for (i = 1; i < (int) nmemb; i++)
35c08157 2237 {
1c8f6a4d
KLC		 2238 for (j = (i - 1); j >= 0; j--)
2239 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2240 break;
2241
1c8f6a4d
KLC		 2242 j++;
2243
35c08157 2244 if (i == j)
1c8f6a4d 2245 continue; /* i is in order. */
35c08157
KLC		 2246
2247 memcpy (tmp, ptr + i * size, size);
2248 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2249 memcpy (ptr + j * size, tmp, size);
2250 }
e1fa0163 2251 free (tmp);
35c08157
KLC		 2252}
2253
2254/* Sort relocation by r_offset.
2255
2256 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2257 algorithm. Relocations at the same r_offset must keep their order.
2258 For example, RELAX_ENTRY must be the very first relocation entry.
2259
2260 Currently, this function implements insertion-sort.
2261
2262 FIXME: If we already sort them in assembler, why bother sort them
2263 here again? */
2264
2265static int
2266compar_reloc (const void *lhs, const void *rhs)
2267{
2268 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2269 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2270
2271 if (l->r_offset > r->r_offset)
2272 return 1;
2273 else if (l->r_offset == r->r_offset)
2274 return 0;
2275 else
2276 return -1;
2277}
2278
2279/* Functions listed below are only used for old relocs.
2280 * nds32_elf_9_pcrel_reloc
2281 * nds32_elf_do_9_pcrel_reloc
2282 * nds32_elf_hi20_reloc
2283 * nds32_elf_relocate_hi20
2284 * nds32_elf_lo12_reloc
2285 * nds32_elf_sda15_reloc
2286 * nds32_elf_generic_reloc
2287 */
2288
2289/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2290
2291static bfd_reloc_status_type
2292nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2293 void *data, asection *input_section, bfd *output_bfd,
2294 char **error_message ATTRIBUTE_UNUSED)
2295{
2296 /* This part is from bfd_elf_generic_reloc. */
2297 if (output_bfd != (bfd *) NULL
2298 && (symbol->flags & BSF_SECTION_SYM) == 0
2299 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2300 {
2301 reloc_entry->address += input_section->output_offset;
2302 return bfd_reloc_ok;
2303 }
2304
2305 if (output_bfd != NULL)
2306 {
2307 /* FIXME: See bfd_perform_relocation. Is this right? */
2308 return bfd_reloc_continue;
2309 }
2310
2311 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2312 input_section,
2313 data, reloc_entry->address,
2314 symbol->section,
2315 (symbol->value
2316 + symbol->section->output_section->vma
2317 + symbol->section->output_offset),
2318 reloc_entry->addend);
2319}
2320
2321/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2322#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2323
2324static bfd_reloc_status_type
2325nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2326 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC		 2327 bfd_vma offset,
2328 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC		 2329 bfd_vma symbol_value, bfd_vma addend)
2330{
2331 bfd_signed_vma relocation;
2332 unsigned short x;
2333 bfd_reloc_status_type status;
2334
2335 /* Sanity check the address (offset in section). */
2336 if (offset > bfd_get_section_limit (abfd, input_section))
2337 return bfd_reloc_outofrange;
2338
2339 relocation = symbol_value + addend;
2340 /* Make it pc relative. */
2341 relocation -= (input_section->output_section->vma
2342 + input_section->output_offset);
2343 /* These jumps mask off the lower two bits of the current address
2344 before doing pcrel calculations. */
2345 relocation -= (offset & -(bfd_vma) 2);
2346
1c8f6a4d 2347 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2348 status = bfd_reloc_overflow;
2349 else
2350 status = bfd_reloc_ok;
2351
2352 x = bfd_getb16 (data + offset);
2353
2354 relocation >>= howto->rightshift;
2355 relocation <<= howto->bitpos;
2356 x = (x & ~howto->dst_mask)
2357 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2358
2359 bfd_putb16 ((bfd_vma) x, data + offset);
2360
2361 return status;
2362}
2363
2364/* Handle the R_NDS32_HI20_[SU]LO relocs.
2365 HI20_SLO is for the add3 and load/store with displacement instructions.
2366 HI20 is for the or3 instruction.
2367 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2368 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2369 we must add one to the high 16 bytes (which will get subtracted off when
2370 the low 16 bits are added).
2371 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2372 because there is a carry from the LO12 to the HI20. Here we just save
2373 the information we need; we do the actual relocation when we see the LO12.
2374 This code is copied from the elf32-mips.c. We also support an arbitrary
2375 number of HI20 relocs to be associated with a single LO12 reloc. The
2376 assembler sorts the relocs to ensure each HI20 immediately precedes its
2377 LO12. However if there are multiple copies, the assembler may not find
2378 the real LO12 so it picks the first one it finds. */
2379
2380struct nds32_hi20
2381{
2382 struct nds32_hi20 *next;
2383 bfd_byte *addr;
2384 bfd_vma addend;
2385};
2386
2387static struct nds32_hi20 *nds32_hi20_list;
2388
2389static bfd_reloc_status_type
2390nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2391 asymbol *symbol, void *data, asection *input_section,
2392 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2393{
2394 bfd_reloc_status_type ret;
2395 bfd_vma relocation;
2396 struct nds32_hi20 *n;
2397
2398 /* This part is from bfd_elf_generic_reloc.
2399 If we're relocating, and this an external symbol, we don't want
2400 to change anything. */
2401 if (output_bfd != (bfd *) NULL
2402 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2403 {
2404 reloc_entry->address += input_section->output_offset;
2405 return bfd_reloc_ok;
2406 }
2407
2408 /* Sanity check the address (offset in section). */
2409 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2410 return bfd_reloc_outofrange;
2411
2412 ret = bfd_reloc_ok;
2413 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2414 ret = bfd_reloc_undefined;
2415
2416 if (bfd_is_com_section (symbol->section))
2417 relocation = 0;
2418 else
2419 relocation = symbol->value;
2420
2421 relocation += symbol->section->output_section->vma;
2422 relocation += symbol->section->output_offset;
2423 relocation += reloc_entry->addend;
2424
2425 /* Save the information, and let LO12 do the actual relocation. */
2426 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2427 if (n == NULL)
2428 return bfd_reloc_outofrange;
2429
2430 n->addr = (bfd_byte *) data + reloc_entry->address;
2431 n->addend = relocation;
2432 n->next = nds32_hi20_list;
2433 nds32_hi20_list = n;
2434
2435 if (output_bfd != (bfd *) NULL)
2436 reloc_entry->address += input_section->output_offset;
2437
2438 return ret;
2439}
2440
2441/* Handle an NDS32 ELF HI20 reloc. */
2442
2443static void
2444nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2445 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2446 Elf_Internal_Rela *rello, bfd_byte *contents,
2447 bfd_vma addend)
2448{
2449 unsigned long insn;
2450 bfd_vma addlo;
2451
2452 insn = bfd_getb32 (contents + relhi->r_offset);
2453
2454 addlo = bfd_getb32 (contents + rello->r_offset);
2455 addlo &= 0xfff;
2456
2457 addend += ((insn & 0xfffff) << 20) + addlo;
2458
2459 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2460 bfd_putb32 (insn, contents + relhi->r_offset);
2461}
2462
2463/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2464 inplace relocation; this function exists in order to do the
2465 R_NDS32_HI20_[SU]LO relocation described above. */
2466
2467static bfd_reloc_status_type
2468nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2469 void *data, asection *input_section, bfd *output_bfd,
2470 char **error_message)
2471{
2472 /* This part is from bfd_elf_generic_reloc.
2473 If we're relocating, and this an external symbol, we don't want
2474 to change anything. */
2475 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2476 && reloc_entry->addend == 0)
2477 {
2478 reloc_entry->address += input_section->output_offset;
2479 return bfd_reloc_ok;
2480 }
2481
2482 if (nds32_hi20_list != NULL)
2483 {
2484 struct nds32_hi20 *l;
2485
2486 l = nds32_hi20_list;
2487 while (l != NULL)
2488 {
2489 unsigned long insn;
2490 unsigned long val;
2491 unsigned long vallo;
2492 struct nds32_hi20 *next;
2493
2494 /* Do the HI20 relocation. Note that we actually don't need
2495 to know anything about the LO12 itself, except where to
2496 find the low 12 bits of the addend needed by the LO12. */
2497 insn = bfd_getb32 (l->addr);
2498 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2499 vallo &= 0xfff;
2500 switch (reloc_entry->howto->type)
2501 {
2502 case R_NDS32_LO12S3:
2503 vallo <<= 3;
2504 break;
2505
2506 case R_NDS32_LO12S2:
2507 vallo <<= 2;
2508 break;
2509
2510 case R_NDS32_LO12S1:
2511 vallo <<= 1;
2512 break;
2513
2514 case R_NDS32_LO12S0:
2515 vallo <<= 0;
2516 break;
2517 }
2518
2519 val = ((insn & 0xfffff) << 12) + vallo;
2520 val += l->addend;
2521
2522 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2523 bfd_putb32 ((bfd_vma) insn, l->addr);
2524
2525 next = l->next;
2526 free (l);
2527 l = next;
2528 }
2529
2530 nds32_hi20_list = NULL;
2531 }
2532
2533 /* Now do the LO12 reloc in the usual way.
2534 ??? It would be nice to call bfd_elf_generic_reloc here,
2535 but we have partial_inplace set. bfd_elf_generic_reloc will
2536 pass the handling back to bfd_install_relocation which will install
2537 a section relative addend which is wrong. */
2538 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2539 input_section, output_bfd, error_message);
2540}
2541
2542/* Do generic partial_inplace relocation.
2543 This is a local replacement for bfd_elf_generic_reloc. */
2544
2545static bfd_reloc_status_type
2546nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2547 asymbol *symbol, void *data, asection *input_section,
2548 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2549{
2550 bfd_reloc_status_type ret;
2551 bfd_vma relocation;
2552 bfd_byte *inplace_address;
2553
2554 /* This part is from bfd_elf_generic_reloc.
2555 If we're relocating, and this an external symbol, we don't want
2556 to change anything. */
2557 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2558 && reloc_entry->addend == 0)
2559 {
2560 reloc_entry->address += input_section->output_offset;
2561 return bfd_reloc_ok;
2562 }
2563
2564 /* Now do the reloc in the usual way.
2565 ??? It would be nice to call bfd_elf_generic_reloc here,
2566 but we have partial_inplace set. bfd_elf_generic_reloc will
2567 pass the handling back to bfd_install_relocation which will install
2568 a section relative addend which is wrong. */
2569
2570 /* Sanity check the address (offset in section). */
2571 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2572 return bfd_reloc_outofrange;
2573
2574 ret = bfd_reloc_ok;
2575 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2576 ret = bfd_reloc_undefined;
2577
2578 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2579 relocation = 0;
2580 else
2581 relocation = symbol->value;
2582
2583 /* Only do this for a final link. */
2584 if (output_bfd == (bfd *) NULL)
2585 {
2586 relocation += symbol->section->output_section->vma;
2587 relocation += symbol->section->output_offset;
2588 }
2589
2590 relocation += reloc_entry->addend;
2591 switch (reloc_entry->howto->type)
2592 {
2593 case R_NDS32_LO12S3:
2594 relocation >>= 3;
2595 break;
2596
2597 case R_NDS32_LO12S2:
2598 relocation >>= 2;
2599 break;
2600
2601 case R_NDS32_LO12S1:
2602 relocation >>= 1;
2603 break;
2604
2605 case R_NDS32_LO12S0:
2606 default:
2607 relocation >>= 0;
2608 break;
2609 }
2610
2611 inplace_address = (bfd_byte *) data + reloc_entry->address;
2612
2613#define DOIT(x) \
2614 x = ((x & ~reloc_entry->howto->dst_mask) | \
2615 (((x & reloc_entry->howto->src_mask) + relocation) & \
2616 reloc_entry->howto->dst_mask))
2617
2618 switch (reloc_entry->howto->size)
2619 {
2620 case 1:
2621 {
2622 short x = bfd_getb16 (inplace_address);
2623
2624 DOIT (x);
2625 bfd_putb16 ((bfd_vma) x, inplace_address);
2626 }
2627 break;
2628 case 2:
2629 {
2630 unsigned long x = bfd_getb32 (inplace_address);
2631
2632 DOIT (x);
2633 bfd_putb32 ((bfd_vma) x, inplace_address);
2634 }
2635 break;
2636 default:
2637 BFD_ASSERT (0);
2638 }
2639
2640 if (output_bfd != (bfd *) NULL)
2641 reloc_entry->address += input_section->output_offset;
2642
2643 return ret;
2644}
2645
2646/* Handle the R_NDS32_SDA15 reloc.
2647 This reloc is used to compute the address of objects in the small data area
2648 and to perform loads and stores from that area.
2649 The lower 15 bits are sign extended and added to the register specified
2650 in the instruction, which is assumed to point to _SDA_BASE_.
2651
2652 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2653 the access size, this must be taken care of. */
2654
2655static bfd_reloc_status_type
2656nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2657 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2658 asection *input_section, bfd *output_bfd,
2659 char **error_message ATTRIBUTE_UNUSED)
2660{
2661 /* This part is from bfd_elf_generic_reloc. */
2662 if (output_bfd != (bfd *) NULL
2663 && (symbol->flags & BSF_SECTION_SYM) == 0
2664 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2665 {
2666 reloc_entry->address += input_section->output_offset;
2667 return bfd_reloc_ok;
2668 }
2669
2670 if (output_bfd != NULL)
2671 {
2672 /* FIXME: See bfd_perform_relocation. Is this right? */
2673 return bfd_reloc_continue;
2674 }
2675
2676 /* FIXME: not sure what to do here yet. But then again, the linker
2677 may never call us. */
2678 abort ();
2679}
2680
2681/* nds32_elf_ignore_reloc is the special function for
2682 relocation types which don't need to be relocated
2683 like relaxation relocation types.
2684 This function simply return bfd_reloc_ok when it is
2685 invoked. */
2686
2687static bfd_reloc_status_type
2688nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2689 asymbol *symbol ATTRIBUTE_UNUSED,
2690 void *data ATTRIBUTE_UNUSED, asection *input_section,
2691 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2692{
2693 if (output_bfd != NULL)
2694 reloc_entry->address += input_section->output_offset;
2695
2696 return bfd_reloc_ok;
2697}
2698\f
2699
2700/* Map BFD reloc types to NDS32 ELF reloc types. */
2701
2702struct nds32_reloc_map_entry
2703{
2704 bfd_reloc_code_real_type bfd_reloc_val;
2705 unsigned char elf_reloc_val;
2706};
2707
2708static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2709{
2710 {BFD_RELOC_NONE, R_NDS32_NONE},
2711 {BFD_RELOC_16, R_NDS32_16_RELA},
2712 {BFD_RELOC_32, R_NDS32_32_RELA},
2713 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2714 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2715 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2716 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2717 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2718 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2719 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2720 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2721 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2722 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2723 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2724 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2725 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2726 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2727 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2728 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2729 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2730 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2731 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2732 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2733
2734 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2735 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2736 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2737 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2738 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2739 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2740 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2741 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2742 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2743 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2744 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2745 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2746 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2747 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2748 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2749 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2750 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2751 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2752 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2753 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2754 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2755 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2756 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2757 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC		 2758 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2759 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2760 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC		 2761 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2762 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2763 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC		 2764 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2765 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2766 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2767 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 2768 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2769 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2770 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2771 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2772 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2773 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2774 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2775 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2776 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2777 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2778 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2779 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2780 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2781 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2782 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2783 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2784 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2785 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2786 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2787 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2788 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2789 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2790 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2791 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2792 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2793 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2794 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2795 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2796 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2797 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2798 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2799 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2800 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2801 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2802 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2803 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2804 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2805 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2806 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2807 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2808 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 2809
2810 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2811 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2812 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2813 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2814 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2815 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2816 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2817 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2818 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC		 2819 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2820 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2821 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2822 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2823 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2824 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2825 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2826 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2827 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2828 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2829 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC		 2830};
2831
2832/* Patch tag. */
2833
2834static reloc_howto_type *
2835bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2836 const char *r_name)
2837{
2838 unsigned int i;
2839
2840 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2841 if (nds32_elf_howto_table[i].name != NULL
2842 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2843 return &nds32_elf_howto_table[i];
2844
2845 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2846 if (nds32_elf_relax_howto_table[i].name != NULL
2847 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2848 return &nds32_elf_relax_howto_table[i];
2849
2850 return NULL;
2851}
2852
2853static reloc_howto_type *
2854bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2855{
2856 if (code < R_NDS32_RELAX_ENTRY)
2857 {
2858 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2859 return &nds32_elf_howto_table[code];
2860 }
2861 else
2862 {
2863 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2864 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2865 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2866 }
2867}
2868
2869static reloc_howto_type *
2870bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2871 bfd_reloc_code_real_type code)
2872{
2873 unsigned int i;
2874
2875 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2876 {
2877 if (nds32_reloc_map[i].bfd_reloc_val == code)
2878 return bfd_elf32_bfd_reloc_type_table_lookup
2879 (nds32_reloc_map[i].elf_reloc_val);
2880 }
2881
2882 return NULL;
2883}
2884
2885/* Set the howto pointer for an NDS32 ELF reloc. */
2886
2887static void
2888nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2889 Elf_Internal_Rela *dst)
2890{
2891 enum elf_nds32_reloc_type r_type;
2892
2893 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 2894 if (r_type > R_NDS32_GNU_VTENTRY)
2895 {
695344c0 2896 /* xgettext:c-format */
0aa13fee
AM		 2897 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2898 abfd, r_type);
5860e3f8
NC		 2899 r_type = 0;
2900 }
35c08157
KLC		 2901 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2902}
2903
2904static void
2905nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2906 Elf_Internal_Rela *dst)
2907{
2908 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2909 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2910 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2911 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2912}
2913
2914/* Support for core dump NOTE sections.
2915 Reference to include/linux/elfcore.h in Linux. */
2916
2917static bfd_boolean
2918nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2919{
2920 int offset;
2921 size_t size;
2922
2923 switch (note->descsz)
2924 {
2925 case 0x114:
2926 /* Linux/NDS32 32-bit, ABI1 */
2927
2928 /* pr_cursig */
2929 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2930
2931 /* pr_pid */
2932 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2933
2934 /* pr_reg */
2935 offset = 72;
2936 size = 200;
2937 break;
2938
2939 case 0xfc:
2940 /* Linux/NDS32 32-bit */
2941
2942 /* pr_cursig */
2943 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2944
2945 /* pr_pid */
2946 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2947
2948 /* pr_reg */
2949 offset = 72;
2950 size = 176;
2951 break;
2952
2953 default:
2954 return FALSE;
2955 }
2956
2957 /* Make a ".reg" section. */
2958 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2959 size, note->descpos + offset);
2960}
2961
2962static bfd_boolean
2963nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2964{
2965 switch (note->descsz)
2966 {
2967 case 124:
2968 /* Linux/NDS32 */
2969
2970 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2971 elf_tdata (abfd)->core->program =
2972 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2973 elf_tdata (abfd)->core->command =
2974 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 2975 break;
35c08157
KLC		 2976
2977 default:
2978 return FALSE;
2979 }
2980
2981 /* Note that for some reason, a spurious space is tacked
2982 onto the end of the args in some (at least one anyway)
2983 implementations, so strip it off if it exists. */
2984 {
2985 char *command = elf_tdata (abfd)->core->command;
2986 int n = strlen (command);
2987
2988 if (0 < n && command[n - 1] == ' ')
2989 command[n - 1] = '\0';
2990 }
2991
2992 return TRUE;
2993}
2994
2995/* Hook called by the linker routine which adds symbols from an object
2996 file. We must handle the special NDS32 section numbers here.
2997 We also keep watching for whether we need to create the sdata special
2998 linker sections. */
2999
3000static bfd_boolean
3001nds32_elf_add_symbol_hook (bfd *abfd,
3002 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3003 Elf_Internal_Sym *sym,
3004 const char **namep ATTRIBUTE_UNUSED,
3005 flagword *flagsp ATTRIBUTE_UNUSED,
3006 asection **secp, bfd_vma *valp)
3007{
3008 switch (sym->st_shndx)
3009 {
3010 case SHN_COMMON:
3011 /* Common symbols less than the GP size are automatically
3012 treated as SHN_MIPS_SCOMMON symbols. */
3013 if (sym->st_size > elf_gp_size (abfd)
3014 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3015 break;
3016
3017 /* st_value is the alignemnt constraint.
3018 That might be its actual size if it is an array or structure. */
3019 switch (sym->st_value)
3020 {
3021 case 1:
3022 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3023 break;
3024 case 2:
3025 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3026 break;
3027 case 4:
3028 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3029 break;
3030 case 8:
3031 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3032 break;
3033 default:
3034 return TRUE;
3035 }
3036
3037 (*secp)->flags |= SEC_IS_COMMON;
3038 *valp = sym->st_size;
3039 break;
3040 }
3041
3042 return TRUE;
3043}
3044
3045
3046/* This function can figure out the best location for a base register to access
3047 data relative to this base register
3048 INPUT:
3049 sda_d0: size of first DOUBLE WORD data section
3050 sda_w0: size of first WORD data section
3051 sda_h0: size of first HALF WORD data section
3052 sda_b : size of BYTE data section
3053 sda_hi: size of second HALF WORD data section
3054 sda_w1: size of second WORD data section
3055 sda_d1: size of second DOUBLE WORD data section
3056 OUTPUT:
3057 offset (always positive) from the beginning of sda_d0 if OK
3058 a negative error value if fail
3059 NOTE:
3060 these 7 sections have to be located back to back if exist
3061 a pass in 0 value for non-existing section */
3062
3063/* Due to the interpretation of simm15 field of load/store depending on
3064 data accessing size, the organization of base register relative data shall
3065 like the following figure
3066 -------------------------------------------
3067 | DOUBLE WORD sized data (range +/- 128K)
3068 -------------------------------------------
3069 | WORD sized data (range +/- 64K)
3070 -------------------------------------------
3071 | HALF WORD sized data (range +/- 32K)
3072 -------------------------------------------
3073 | BYTE sized data (range +/- 16K)
3074 -------------------------------------------
3075 | HALF WORD sized data (range +/- 32K)
3076 -------------------------------------------
3077 | WORD sized data (range +/- 64K)
3078 -------------------------------------------
3079 | DOUBLE WORD sized data (range +/- 128K)
3080 -------------------------------------------
3081 Its base register shall be set to access these data freely. */
3082
3083/* We have to figure out the SDA_BASE value, so that we can adjust the
3084 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3085 BFD. If we can't find it, we're stuck. We cache it in the ELF
3086 target data. We don't need to adjust the symbol value for an
3087 external symbol if we are producing relocatable output. */
3088
3089static asection *sda_rela_sec = NULL;
3090
1c8f6a4d 3091#define SDA_SECTION_NUM 10
35c08157
KLC		 3092
3093static bfd_reloc_status_type
3094nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3095 bfd_vma *psb, bfd_boolean add_symbol)
3096{
3097 int relax_fp_as_gp;
3098 struct elf_nds32_link_hash_table *table;
3099 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3100 long unsigned int total = 0;
35c08157
KLC		 3101
3102 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3103 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3104 {
3105 asection *first = NULL, *final = NULL, *temp;
3106 bfd_vma sda_base;
3107 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3108 4 byte-aligned. Therefore, it has to set the first section ".data"
3109 4 byte-aligned. */
3110 static const char sec_name[SDA_SECTION_NUM][10] =
3111 {
3112 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3113 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3114 };
3115 size_t i = 0;
3116
3117 if (output_bfd->sections == NULL)
3118 {
3119 *psb = elf_gp (output_bfd);
3120 return bfd_reloc_ok;
3121 }
3122
3123 /* Get the first and final section. */
1c8f6a4d 3124 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3125 {
3126 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3127 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3128 first = temp;
3129 if (temp && (temp->size != 0 || temp->rawsize != 0))
3130 final = temp;
1c8f6a4d
KLC		 3131
3132 /* Summarize the sections in order to check if joining .bss. */
3133 if (temp && temp->size != 0)
3134 total += temp->size;
3135 else if (temp && temp->rawsize != 0)
3136 total += temp->rawsize;
3137
35c08157
KLC		 3138 i++;
3139 }
3140
1c8f6a4d
KLC		 3141 /* Check .bss size. */
3142 temp = bfd_get_section_by_name (output_bfd, ".bss");
3143 if (temp)
3144 {
3145 if (temp->size != 0)
3146 total += temp->size;
3147 else if (temp->rawsize != 0)
3148 total += temp->rawsize;
3149
3150 if (total < 0x80000)
3151 {
3152 if (!first && (temp->size != 0 || temp->rawsize != 0))
3153 first = temp;
3154 if ((temp->size != 0 || temp->rawsize != 0))
3155 final = temp;
3156 }
3157 }
3158
35c08157
KLC		 3159 if (first && final)
3160 {
3161 /* The middle of data region. */
1c8f6a4d 3162 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3163
3164 /* Find the section sda_base located. */
3165 i = 0;
1c8f6a4d 3166 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC		 3167 {
3168 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3169 if (final && (final->size != 0 || final->rawsize != 0)
3170 && sda_base >= final->vma)
3171 {
3172 first = final;
3173 i++;
3174 }
3175 else
3176 break;
3177 }
3178 }
3179 else
3180 {
3181 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3182 first output section. */
3183 first = output_bfd->sections;
3184 while (first && first->size == 0 && first->rawsize == 0)
3185 first = first->next;
3186 if (!first)
3187 {
3188 *psb = elf_gp (output_bfd);
3189 return bfd_reloc_ok;
3190 }
1c8f6a4d 3191 sda_base = first->vma + first->rawsize;
35c08157
KLC		 3192 }
3193
3194 sda_base -= first->vma;
3195 sda_base = sda_base & (~7);
3196
3197 if (!_bfd_generic_link_add_one_symbol
3198 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3199 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3200 get_elf_backend_data (output_bfd)->collect, &h))
3201 return FALSE;
3202
3203 sda_rela_sec = first;
3204
3205 table = nds32_elf_hash_table (info);
3206 relax_fp_as_gp = table->relax_fp_as_gp;
3207 if (relax_fp_as_gp)
3208 {
3209 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3210 FALSE, FALSE, FALSE);
3211 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3212 And set FP equal to SDA_BASE to do relaxation for
3213 la $fp, _FP_BASE_. */
3214 if (!_bfd_generic_link_add_one_symbol
3215 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3216 first, (bfd_vma) sda_base, (const char *) NULL,
3217 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3218 return FALSE;
3219 }
3220 }
3221
535b785f 3222 if (add_symbol)
35c08157
KLC		 3223 {
3224 if (h)
3225 {
3226 /* Now set gp. */
3227 elf_gp (output_bfd) = (h->u.def.value
3228 + h->u.def.section->output_section->vma
3229 + h->u.def.section->output_offset);
3230 }
3231 else
3232 {
38f14ab8 3233 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC		 3234 return bfd_reloc_dangerous;
3235 }
3236 }
3237
3238 *psb = h->u.def.value + h->u.def.section->output_section->vma
3239 + h->u.def.section->output_offset;
3240 return bfd_reloc_ok;
3241}
3242\f
3243
3244/* Return size of a PLT entry. */
3245#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3246
3247
3248/* Create an entry in an nds32 ELF linker hash table. */
3249
3250static struct bfd_hash_entry *
3251nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3252 struct bfd_hash_table *table,
3253 const char *string)
3254{
3255 struct elf_nds32_link_hash_entry *ret;
3256
3257 ret = (struct elf_nds32_link_hash_entry *) entry;
3258
3259 /* Allocate the structure if it has not already been allocated by a
3260 subclass. */
3261 if (ret == NULL)
3262 ret = (struct elf_nds32_link_hash_entry *)
3263 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3264
3265 if (ret == NULL)
3266 return (struct bfd_hash_entry *) ret;
3267
3268 /* Call the allocation method of the superclass. */
3269 ret = (struct elf_nds32_link_hash_entry *)
3270 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3271
3272 if (ret != NULL)
3273 {
3274 struct elf_nds32_link_hash_entry *eh;
3275
3276 eh = (struct elf_nds32_link_hash_entry *) ret;
3277 eh->dyn_relocs = NULL;
1c8f6a4d 3278 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC		 3279 }
3280
3281 return (struct bfd_hash_entry *) ret;
3282}
3283
3284/* Create an nds32 ELF linker hash table. */
3285
3286static struct bfd_link_hash_table *
3287nds32_elf_link_hash_table_create (bfd *abfd)
3288{
3289 struct elf_nds32_link_hash_table *ret;
3290
3291 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3292
3293 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3294 if (ret == NULL)
3295 return NULL;
3296
3297 /* patch tag. */
3298 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3299 nds32_elf_link_hash_newfunc,
3300 sizeof (struct elf_nds32_link_hash_entry),
3301 NDS32_ELF_DATA))
3302 {
3303 free (ret);
3304 return NULL;
3305 }
3306
35c08157
KLC		 3307 return &ret->root.root;
3308}
3309
35c08157
KLC		 3310/* Create dynamic sections when linking against a dynamic object. */
3311
3312static bfd_boolean
3313nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3314{
3315 struct elf_nds32_link_hash_table *htab;
3316 flagword flags, pltflags;
3317 register asection *s;
3318 const struct elf_backend_data *bed;
3319 int ptralign = 2; /* 32-bit */
3320
3321 bed = get_elf_backend_data (abfd);
3322
3323 htab = nds32_elf_hash_table (info);
3324
3325 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3326 .rel[a].bss sections. */
3327
3328 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3329 | SEC_LINKER_CREATED);
3330
3331 pltflags = flags;
3332 pltflags |= SEC_CODE;
3333 if (bed->plt_not_loaded)
3334 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3335 if (bed->plt_readonly)
3336 pltflags |= SEC_READONLY;
3337
3338 s = bfd_make_section (abfd, ".plt");
ce558b89 3339 htab->root.splt = s;
35c08157
KLC		 3340 if (s == NULL
3341 || !bfd_set_section_flags (abfd, s, pltflags)
3342 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3343 return FALSE;
3344
3345 if (bed->want_plt_sym)
3346 {
3347 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3348 .plt section. */
3349 struct bfd_link_hash_entry *bh = NULL;
3350 struct elf_link_hash_entry *h;
3351
3352 if (!(_bfd_generic_link_add_one_symbol
3353 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3354 (bfd_vma) 0, (const char *) NULL, FALSE,
3355 get_elf_backend_data (abfd)->collect, &bh)))
3356 return FALSE;
3357
3358 h = (struct elf_link_hash_entry *) bh;
3359 h->def_regular = 1;
3360 h->type = STT_OBJECT;
3361
0e1862bb 3362 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC		 3363 return FALSE;
3364 }
3365
3366 s = bfd_make_section (abfd,
3367 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
ce558b89 3368 htab->root.srelplt = s;
35c08157
KLC		 3369 if (s == NULL
3370 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3371 || !bfd_set_section_alignment (abfd, s, ptralign))
3372 return FALSE;
3373
ce558b89 3374 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
35c08157
KLC		 3375 return FALSE;
3376
3377 {
3378 const char *secname;
3379 char *relname;
3380 flagword secflags;
3381 asection *sec;
3382
3383 for (sec = abfd->sections; sec; sec = sec->next)
3384 {
3385 secflags = bfd_get_section_flags (abfd, sec);
3386 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3387 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3388 continue;
3389 secname = bfd_get_section_name (abfd, sec);
3390 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3391 strcpy (relname, ".rela");
3392 strcat (relname, secname);
3393 if (bfd_get_section_by_name (abfd, secname))
3394 continue;
3395 s = bfd_make_section (abfd, relname);
3396 if (s == NULL
3397 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3398 || !bfd_set_section_alignment (abfd, s, ptralign))
3399 return FALSE;
3400 }
3401 }
3402
3403 if (bed->want_dynbss)
3404 {
3405 /* The .dynbss section is a place to put symbols which are defined
3406 by dynamic objects, are referenced by regular objects, and are
3407 not functions. We must allocate space for them in the process
3408 image and use a R_*_COPY reloc to tell the dynamic linker to
3409 initialize them at run time. The linker script puts the .dynbss
3410 section into the .bss section of the final image. */
3411 s = bfd_make_section (abfd, ".dynbss");
3412 htab->sdynbss = s;
3413 if (s == NULL
3414 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3415 return FALSE;
3416 /* The .rel[a].bss section holds copy relocs. This section is not
3417 normally needed. We need to create it here, though, so that the
3418 linker will map it to an output section. We can't just create it
3419 only if we need it, because we will not know whether we need it
3420 until we have seen all the input files, and the first time the
3421 main linker code calls BFD after examining all the input files
3422 (size_dynamic_sections) the input sections have already been
3423 mapped to the output sections. If the section turns out not to
3424 be needed, we can discard it later. We will never need this
3425 section when generating a shared object, since they do not use
3426 copy relocs. */
0e1862bb 3427 if (!bfd_link_pic (info))
35c08157
KLC		 3428 {
3429 s = bfd_make_section (abfd, (bed->default_use_rela_p
3430 ? ".rela.bss" : ".rel.bss"));
3431 htab->srelbss = s;
3432 if (s == NULL
3433 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3434 || !bfd_set_section_alignment (abfd, s, ptralign))
3435 return FALSE;
3436 }
3437 }
3438
3439 return TRUE;
3440}
3441
3442/* Copy the extra info we tack onto an elf_link_hash_entry. */
3443static void
3444nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3445 struct elf_link_hash_entry *dir,
3446 struct elf_link_hash_entry *ind)
3447{
3448 struct elf_nds32_link_hash_entry *edir, *eind;
3449
3450 edir = (struct elf_nds32_link_hash_entry *) dir;
3451 eind = (struct elf_nds32_link_hash_entry *) ind;
3452
3453 if (eind->dyn_relocs != NULL)
3454 {
3455 if (edir->dyn_relocs != NULL)
3456 {
3bf083ed
AM		 3457 struct elf_dyn_relocs **pp;
3458 struct elf_dyn_relocs *p;
35c08157
KLC		 3459
3460 if (ind->root.type == bfd_link_hash_indirect)
3461 abort ();
3462
3463 /* Add reloc counts against the weak sym to the strong sym
3464 list. Merge any entries against the same section. */
3465 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3466 {
3bf083ed 3467 struct elf_dyn_relocs *q;
35c08157
KLC		 3468
3469 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3470 if (q->sec == p->sec)
3471 {
3472 q->pc_count += p->pc_count;
3473 q->count += p->count;
3474 *pp = p->next;
3475 break;
3476 }
3477 if (q == NULL)
3478 pp = &p->next;
3479 }
3480 *pp = edir->dyn_relocs;
3481 }
3482
3483 edir->dyn_relocs = eind->dyn_relocs;
3484 eind->dyn_relocs = NULL;
3485 }
3486
3487 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3488}
3489\f
63c1f59d
AM		 3490/* Find dynamic relocs for H that apply to read-only sections. */
3491
3492static asection *
3493readonly_dynrelocs (struct elf_link_hash_entry *h)
3494{
3bf083ed 3495 struct elf_dyn_relocs *p;
63c1f59d
AM		 3496
3497 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3498 {
3499 asection *s = p->sec->output_section;
3500
3501 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3502 return p->sec;
3503 }
3504 return NULL;
3505}
35c08157
KLC		 3506
3507/* Adjust a symbol defined by a dynamic object and referenced by a
3508 regular object. The current definition is in some section of the
3509 dynamic object, but we're not including those sections. We have to
3510 change the definition to something the rest of the link can
3511 understand. */
3512
3513static bfd_boolean
3514nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3515 struct elf_link_hash_entry *h)
3516{
3517 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3518 bfd *dynobj;
3519 asection *s;
3520 unsigned int power_of_two;
3521
3522 dynobj = elf_hash_table (info)->dynobj;
3523
3524 /* Make sure we know what is going on here. */
3525 BFD_ASSERT (dynobj != NULL
3526 && (h->needs_plt
60d67dc8 3527 || h->is_weakalias
35c08157
KLC		 3528 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3529
3530
3531 /* If this is a function, put it in the procedure linkage table. We
3532 will fill in the contents of the procedure linkage table later,
3533 when we know the address of the .got section. */
3534 if (h->type == STT_FUNC || h->needs_plt)
3535 {
0e1862bb 3536 if (!bfd_link_pic (info)
35c08157
KLC		 3537 && !h->def_dynamic
3538 && !h->ref_dynamic
3539 && h->root.type != bfd_link_hash_undefweak
3540 && h->root.type != bfd_link_hash_undefined)
3541 {
3542 /* This case can occur if we saw a PLT reloc in an input
3543 file, but the symbol was never referred to by a dynamic
3544 object. In such a case, we don't actually need to build
3545 a procedure linkage table, and we can just do a PCREL
3546 reloc instead. */
3547 h->plt.offset = (bfd_vma) - 1;
3548 h->needs_plt = 0;
3549 }
3550
3551 return TRUE;
3552 }
3553 else
3554 h->plt.offset = (bfd_vma) - 1;
3555
3556 /* If this is a weak symbol, and there is a real definition, the
3557 processor independent code will have arranged for us to see the
3558 real definition first, and we can just use the same value. */
60d67dc8 3559 if (h->is_weakalias)
35c08157 3560 {
60d67dc8
AM		 3561 struct elf_link_hash_entry *def = weakdef (h);
3562 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3563 h->root.u.def.section = def->root.u.def.section;
3564 h->root.u.def.value = def->root.u.def.value;
35c08157
KLC		 3565 return TRUE;
3566 }
3567
3568 /* This is a reference to a symbol defined by a dynamic object which
3569 is not a function. */
3570
3571 /* If we are creating a shared library, we must presume that the
3572 only references to the symbol are via the global offset table.
3573 For such cases we need not do anything here; the relocations will
3574 be handled correctly by relocate_section. */
0e1862bb 3575 if (bfd_link_pic (info))
35c08157
KLC		 3576 return TRUE;
3577
3578 /* If there are no references to this symbol that do not use the
3579 GOT, we don't need to generate a copy reloc. */
3580 if (!h->non_got_ref)
3581 return TRUE;
3582
3583 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 3584 if (0 && info->nocopyreloc)
35c08157
KLC		 3585 {
3586 h->non_got_ref = 0;
3587 return TRUE;
3588 }
3589
3bf083ed
AM		 3590 /* If we don't find any dynamic relocs in read-only sections, then
3591 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3592 if (0 && !readonly_dynrelocs (h))
35c08157
KLC		 3593 {
3594 h->non_got_ref = 0;
3595 return TRUE;
3596 }
3597
3598 /* We must allocate the symbol in our .dynbss section, which will
3599 become part of the .bss section of the executable. There will be
3600 an entry for this symbol in the .dynsym section. The dynamic
3601 object will contain position independent code, so all references
3602 from the dynamic object to this symbol will go through the global
3603 offset table. The dynamic linker will use the .dynsym entry to
3604 determine the address it must put in the global offset table, so
3605 both the dynamic object and the regular object will refer to the
3606 same memory location for the variable. */
3607
3608 htab = nds32_elf_hash_table (info);
3609 s = htab->sdynbss;
3610 BFD_ASSERT (s != NULL);
3611
3612 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3613 to copy the initial value out of the dynamic object and into the
3614 runtime process image. We need to remember the offset into the
3615 .rela.bss section we are going to use. */
3616 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3617 {
3618 asection *srel;
3619
3620 srel = htab->srelbss;
3621 BFD_ASSERT (srel != NULL);
3622 srel->size += sizeof (Elf32_External_Rela);
3623 h->needs_copy = 1;
3624 }
3625
3626 /* We need to figure out the alignment required for this symbol. I
3627 have no idea how ELF linkers handle this. */
3628 power_of_two = bfd_log2 (h->size);
3629 if (power_of_two > 3)
3630 power_of_two = 3;
3631
3632 /* Apply the required alignment. */
3633 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3634 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3635 {
3636 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3637 return FALSE;
3638 }
3639
3640 /* Define the symbol as being at this point in the section. */
3641 h->root.u.def.section = s;
3642 h->root.u.def.value = s->size;
3643
3644 /* Increment the section size to make room for the symbol. */
3645 s->size += h->size;
3646
3647 return TRUE;
3648}
3649
3650/* Allocate space in .plt, .got and associated reloc sections for
3651 dynamic relocs. */
3652
3653static bfd_boolean
3654allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3655{
3656 struct bfd_link_info *info;
3657 struct elf_nds32_link_hash_table *htab;
3658 struct elf_nds32_link_hash_entry *eh;
3bf083ed 3659 struct elf_dyn_relocs *p;
35c08157
KLC		 3660
3661 if (h->root.type == bfd_link_hash_indirect)
3662 return TRUE;
3663
3664 if (h->root.type == bfd_link_hash_warning)
3665 /* When warning symbols are created, they **replace** the "real"
3666 entry in the hash table, thus we never get to see the real
3667 symbol in a hash traversal. So look at it now. */
3668 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3669
3670 info = (struct bfd_link_info *) inf;
3671 htab = nds32_elf_hash_table (info);
3672
3673 eh = (struct elf_nds32_link_hash_entry *) h;
3674
3675 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3676 {
3677 /* Make sure this symbol is output as a dynamic symbol.
3678 Undefined weak syms won't yet be marked as dynamic. */
3679 if (h->dynindx == -1 && !h->forced_local)
3680 {
3681 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3682 return FALSE;
3683 }
3684
0e1862bb 3685 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 3686 {
ce558b89 3687 asection *s = htab->root.splt;
35c08157
KLC		 3688
3689 /* If this is the first .plt entry, make room for the special
3690 first entry. */
3691 if (s->size == 0)
3692 s->size += PLT_ENTRY_SIZE;
3693
3694 h->plt.offset = s->size;
3695
3696 /* If this symbol is not defined in a regular file, and we are
3697 not generating a shared library, then set the symbol to this
3698 location in the .plt. This is required to make function
3699 pointers compare as equal between the normal executable and
3700 the shared library. */
0e1862bb 3701 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 3702 {
3703 h->root.u.def.section = s;
3704 h->root.u.def.value = h->plt.offset;
3705 }
3706
3707 /* Make room for this entry. */
3708 s->size += PLT_ENTRY_SIZE;
3709
3710 /* We also need to make an entry in the .got.plt section, which
3711 will be placed in the .got section by the linker script. */
ce558b89 3712 htab->root.sgotplt->size += 4;
35c08157
KLC		 3713
3714 /* We also need to make an entry in the .rel.plt section. */
ce558b89 3715 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3716 }
3717 else
3718 {
3719 h->plt.offset = (bfd_vma) - 1;
3720 h->needs_plt = 0;
3721 }
3722 }
3723 else
3724 {
3725 h->plt.offset = (bfd_vma) - 1;
3726 h->needs_plt = 0;
3727 }
3728
3729 if (h->got.refcount > 0)
3730 {
3731 asection *s;
3732 bfd_boolean dyn;
1c8f6a4d 3733 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 3734
3735 /* Make sure this symbol is output as a dynamic symbol.
3736 Undefined weak syms won't yet be marked as dynamic. */
3737 if (h->dynindx == -1 && !h->forced_local)
3738 {
3739 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3740 return FALSE;
3741 }
3742
ce558b89 3743 s = htab->root.sgot;
35c08157 3744 h->got.offset = s->size;
1c8f6a4d
KLC		 3745
3746 if (tls_type == GOT_UNKNOWN)
3747 abort ();
3748 else if (tls_type == GOT_NORMAL
3749 || tls_type == GOT_TLS_IE)
3750 /* Need a GOT slot. */
3751 s->size += 4;
3752
35c08157 3753 dyn = htab->root.dynamic_sections_created;
0e1862bb 3754 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
ce558b89 3755 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
35c08157
KLC		 3756 }
3757 else
3758 h->got.offset = (bfd_vma) - 1;
3759
3760 if (eh->dyn_relocs == NULL)
3761 return TRUE;
3762
3763 /* In the shared -Bsymbolic case, discard space allocated for
3764 dynamic pc-relative relocs against symbols which turn out to be
3765 defined in regular objects. For the normal shared case, discard
3766 space for pc-relative relocs that have become local due to symbol
3767 visibility changes. */
3768
0e1862bb 3769 if (bfd_link_pic (info))
35c08157
KLC		 3770 {
3771 if (h->def_regular && (h->forced_local || info->symbolic))
3772 {
3bf083ed 3773 struct elf_dyn_relocs **pp;
35c08157
KLC		 3774
3775 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3776 {
3777 p->count -= p->pc_count;
3778 p->pc_count = 0;
3779 if (p->count == 0)
3780 *pp = p->next;
3781 else
3782 pp = &p->next;
3783 }
3784 }
3785 }
3786 else
3787 {
3788 /* For the non-shared case, discard space for relocs against
3789 symbols which turn out to need copy relocs or are not dynamic. */
3790
3791 if (!h->non_got_ref
3792 && ((h->def_dynamic
3793 && !h->def_regular)
3794 || (htab->root.dynamic_sections_created
3795 && (h->root.type == bfd_link_hash_undefweak
3796 || h->root.type == bfd_link_hash_undefined))))
3797 {
3798 /* Make sure this symbol is output as a dynamic symbol.
3799 Undefined weak syms won't yet be marked as dynamic. */
3800 if (h->dynindx == -1 && !h->forced_local)
3801 {
3802 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3803 return FALSE;
3804 }
3805
3806 /* If that succeeded, we know we'll be keeping all the
3807 relocs. */
3808 if (h->dynindx != -1)
3809 goto keep;
3810 }
3811
3812 eh->dyn_relocs = NULL;
3813
3814 keep:;
3815 }
3816
3817 /* Finally, allocate space. */
3818 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3819 {
3820 asection *sreloc = elf_section_data (p->sec)->sreloc;
3821 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3822 }
3823
3824 return TRUE;
3825}
3826
63c1f59d
AM		 3827/* Set DF_TEXTREL if we find any dynamic relocs that apply to
3828 read-only sections. */
35c08157
KLC		 3829
3830static bfd_boolean
63c1f59d 3831maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
35c08157 3832{
63c1f59d 3833 asection *sec;
35c08157 3834
63c1f59d
AM		 3835 if (h->root.type == bfd_link_hash_indirect)
3836 return TRUE;
35c08157 3837
63c1f59d
AM		 3838 sec = readonly_dynrelocs (h);
3839 if (sec != NULL)
35c08157 3840 {
63c1f59d 3841 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
35c08157 3842
63c1f59d
AM		 3843 info->flags |= DF_TEXTREL;
3844 info->callbacks->minfo
c1c8c1ef 3845 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
63c1f59d 3846 sec->owner, h->root.root.string, sec);
35c08157 3847
63c1f59d
AM		 3848 /* Not an error, just cut short the traversal. */
3849 return FALSE;
35c08157
KLC		 3850 }
3851 return TRUE;
3852}
3853
3854/* Set the sizes of the dynamic sections. */
3855
3856static bfd_boolean
3857nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3858 struct bfd_link_info *info)
3859{
3860 struct elf_nds32_link_hash_table *htab;
3861 bfd *dynobj;
3862 asection *s;
3863 bfd_boolean relocs;
3864 bfd *ibfd;
3865
3866 htab = nds32_elf_hash_table (info);
3867 dynobj = htab->root.dynobj;
3868 BFD_ASSERT (dynobj != NULL);
3869
3870 if (htab->root.dynamic_sections_created)
3871 {
3872 /* Set the contents of the .interp section to the interpreter. */
f5233a16 3873 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 3874 {
3875 s = bfd_get_section_by_name (dynobj, ".interp");
3876 BFD_ASSERT (s != NULL);
3877 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3878 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3879 }
3880 }
3881
3882 /* Set up .got offsets for local syms, and space for local dynamic
3883 relocs. */
c72f2fb2 3884 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 3885 {
3886 bfd_signed_vma *local_got;
3887 bfd_signed_vma *end_local_got;
3888 bfd_size_type locsymcount;
3889 Elf_Internal_Shdr *symtab_hdr;
3890 asection *srel;
3891
3892 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3893 continue;
3894
3895 for (s = ibfd->sections; s != NULL; s = s->next)
3896 {
3bf083ed 3897 struct elf_dyn_relocs *p;
35c08157 3898
3bf083ed 3899 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 3900 elf_section_data (s)->local_dynrel);
3901 p != NULL; p = p->next)
3902 {
3903 if (!bfd_is_abs_section (p->sec)
3904 && bfd_is_abs_section (p->sec->output_section))
3905 {
3906 /* Input section has been discarded, either because
3907 it is a copy of a linkonce section or due to
3908 linker script /DISCARD/, so we'll be discarding
3909 the relocs too. */
3910 }
3911 else if (p->count != 0)
3912 {
3913 srel = elf_section_data (p->sec)->sreloc;
3914 srel->size += p->count * sizeof (Elf32_External_Rela);
3915 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3916 info->flags |= DF_TEXTREL;
3917 }
3918 }
3919 }
3920
3921 local_got = elf_local_got_refcounts (ibfd);
3922 if (!local_got)
3923 continue;
3924
3925 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3926 locsymcount = symtab_hdr->sh_info;
3927 end_local_got = local_got + locsymcount;
ce558b89
AM		 3928 s = htab->root.sgot;
3929 srel = htab->root.srelgot;
35c08157
KLC		 3930 for (; local_got < end_local_got; ++local_got)
3931 {
3932 if (*local_got > 0)
3933 {
3934 *local_got = s->size;
3935 s->size += 4;
0e1862bb 3936 if (bfd_link_pic (info))
35c08157
KLC		 3937 srel->size += sizeof (Elf32_External_Rela);
3938 }
3939 else
3940 *local_got = (bfd_vma) - 1;
3941 }
3942 }
3943
3944 /* Allocate global sym .plt and .got entries, and space for global
3945 sym dynamic relocs. */
3946 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3947
3948 /* We now have determined the sizes of the various dynamic sections.
3949 Allocate memory for them. */
3950 relocs = FALSE;
3951 for (s = dynobj->sections; s != NULL; s = s->next)
3952 {
3953 if ((s->flags & SEC_LINKER_CREATED) == 0)
3954 continue;
3955
ce558b89 3956 if (s == htab->root.splt)
35c08157
KLC		 3957 {
3958 /* Strip this section if we don't need it; see the
3959 comment below. */
3960 }
ce558b89 3961 else if (s == htab->root.sgot)
35c08157
KLC		 3962 {
3963 got_size += s->size;
3964 }
ce558b89 3965 else if (s == htab->root.sgotplt)
35c08157
KLC		 3966 {
3967 got_size += s->size;
3968 }
3969 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3970 {
ce558b89 3971 if (s->size != 0 && s != htab->root.srelplt)
35c08157
KLC		 3972 relocs = TRUE;
3973
3974 /* We use the reloc_count field as a counter if we need
3975 to copy relocs into the output file. */
3976 s->reloc_count = 0;
3977 }
3978 else
3979 {
3980 /* It's not one of our sections, so don't allocate space. */
3981 continue;
3982 }
3983
3984 if (s->size == 0)
3985 {
3986 /* If we don't need this section, strip it from the
3987 output file. This is mostly to handle .rela.bss and
3988 .rela.plt. We must create both sections in
3989 create_dynamic_sections, because they must be created
3990 before the linker maps input sections to output
3991 sections. The linker does that before
3992 adjust_dynamic_symbol is called, and it is that
3993 function which decides whether anything needs to go
3994 into these sections. */
3995 s->flags |= SEC_EXCLUDE;
3996 continue;
3997 }
3998
3999 /* Allocate memory for the section contents. We use bfd_zalloc
4000 here in case unused entries are not reclaimed before the
4001 section's contents are written out. This should not happen,
4002 but this way if it does, we get a R_NDS32_NONE reloc instead
4003 of garbage. */
4004 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4005 if (s->contents == NULL)
4006 return FALSE;
4007 }
4008
4009
4010 if (htab->root.dynamic_sections_created)
4011 {
4012 /* Add some entries to the .dynamic section. We fill in the
4013 values later, in nds32_elf_finish_dynamic_sections, but we
4014 must add the entries now so that we get the correct size for
4015 the .dynamic section. The DT_DEBUG entry is filled in by the
4016 dynamic linker and used by the debugger. */
4017#define add_dynamic_entry(TAG, VAL) \
4018 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4019
0e1862bb 4020 if (!bfd_link_pic (info))
35c08157
KLC		 4021 {
4022 if (!add_dynamic_entry (DT_DEBUG, 0))
4023 return FALSE;
4024 }
4025
ce558b89 4026 if (htab->root.splt->size != 0)
35c08157
KLC		 4027 {
4028 if (!add_dynamic_entry (DT_PLTGOT, 0)
4029 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4030 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4031 || !add_dynamic_entry (DT_JMPREL, 0))
4032 return FALSE;
4033 }
4034
4035 if (relocs)
4036 {
4037 if (!add_dynamic_entry (DT_RELA, 0)
4038 || !add_dynamic_entry (DT_RELASZ, 0)
4039 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4040 return FALSE;
4041
4042 /* If any dynamic relocs apply to a read-only section,
4043 then we need a DT_TEXTREL entry. */
4044 if ((info->flags & DF_TEXTREL) == 0)
63c1f59d 4045 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
35c08157
KLC		 4046 (void *) info);
4047
4048 if ((info->flags & DF_TEXTREL) != 0)
4049 {
4050 if (!add_dynamic_entry (DT_TEXTREL, 0))
4051 return FALSE;
4052 }
4053 }
4054 }
4055#undef add_dynamic_entry
4056
4057 return TRUE;
4058}
4059
4060static bfd_reloc_status_type
4061nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4062 bfd_vma relocation, bfd_byte *location)
4063{
4064 int size;
4065 bfd_vma x = 0;
4066 bfd_reloc_status_type flag;
4067 unsigned int rightshift = howto->rightshift;
4068 unsigned int bitpos = howto->bitpos;
4069
4070 /* If the size is negative, negate RELOCATION. This isn't very
4071 general. */
4072 if (howto->size < 0)
4073 relocation = -relocation;
4074
4075 /* Get the value we are going to relocate. */
4076 size = bfd_get_reloc_size (howto);
4077 switch (size)
4078 {
4079 default:
35c08157
KLC		 4080 abort ();
4081 break;
6346d5ca
AM		 4082 case 0:
4083 return bfd_reloc_ok;
35c08157
KLC		 4084 case 2:
4085 x = bfd_getb16 (location);
4086 break;
4087 case 4:
4088 x = bfd_getb32 (location);
4089 break;
4090 }
4091
4092 /* Check for overflow. FIXME: We may drop bits during the addition
4093 which we don't check for. We must either check at every single
4094 operation, which would be tedious, or we must do the computations
4095 in a type larger than bfd_vma, which would be inefficient. */
4096 flag = bfd_reloc_ok;
4097 if (howto->complain_on_overflow != complain_overflow_dont)
4098 {
4099 bfd_vma addrmask, fieldmask, signmask, ss;
4100 bfd_vma a, b, sum;
4101
4102 /* Get the values to be added together. For signed and unsigned
4103 relocations, we assume that all values should be truncated to
4104 the size of an address. For bitfields, all the bits matter.
4105 See also bfd_check_overflow. */
4106 fieldmask = N_ONES (howto->bitsize);
4107 signmask = ~fieldmask;
4108 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4109 a = (relocation & addrmask) >> rightshift;
4110 b = (x & howto->src_mask & addrmask) >> bitpos;
4111
4112 switch (howto->complain_on_overflow)
4113 {
4114 case complain_overflow_signed:
4115 /* If any sign bits are set, all sign bits must be set.
4116 That is, A must be a valid negative address after
4117 shifting. */
4118 signmask = ~(fieldmask >> 1);
4119 /* Fall through. */
4120
4121 case complain_overflow_bitfield:
4122 /* Much like the signed check, but for a field one bit
4123 wider. We allow a bitfield to represent numbers in the
4124 range -2**n to 2**n-1, where n is the number of bits in the
4125 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4126 can't overflow, which is exactly what we want. */
4127 ss = a & signmask;
4128 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4129 flag = bfd_reloc_overflow;
4130
4131 /* We only need this next bit of code if the sign bit of B
4132 is below the sign bit of A. This would only happen if
4133 SRC_MASK had fewer bits than BITSIZE. Note that if
4134 SRC_MASK has more bits than BITSIZE, we can get into
4135 trouble; we would need to verify that B is in range, as
4136 we do for A above. */
4137 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4138 ss >>= bitpos;
4139
4140 /* Set all the bits above the sign bit. */
4141 b = (b ^ ss) - ss;
4142
4143 /* Now we can do the addition. */
4144 sum = a + b;
4145
4146 /* See if the result has the correct sign. Bits above the
4147 sign bit are junk now; ignore them. If the sum is
4148 positive, make sure we did not have all negative inputs;
4149 if the sum is negative, make sure we did not have all
4150 positive inputs. The test below looks only at the sign
4151 bits, and it really just
4152 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4153
4154 We mask with addrmask here to explicitly allow an address
4155 wrap-around. The Linux kernel relies on it, and it is
4156 the only way to write assembler code which can run when
4157 loaded at a location 0x80000000 away from the location at
4158 which it is linked. */
4159 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4160 flag = bfd_reloc_overflow;
4161
4162 break;
4163
4164 case complain_overflow_unsigned:
4165 /* Checking for an unsigned overflow is relatively easy:
4166 trim the addresses and add, and trim the result as well.
4167 Overflow is normally indicated when the result does not
4168 fit in the field. However, we also need to consider the
4169 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4170 input is 0x80000000, and bfd_vma is only 32 bits; then we
4171 will get sum == 0, but there is an overflow, since the
4172 inputs did not fit in the field. Instead of doing a
4173 separate test, we can check for this by or-ing in the
4174 operands when testing for the sum overflowing its final
4175 field. */
4176 sum = (a + b) & addrmask;
4177 if ((a | b | sum) & signmask)
4178 flag = bfd_reloc_overflow;
4179 break;
4180
4181 default:
4182 abort ();
4183 }
4184 }
4185
4186 /* Put RELOCATION in the right bits. */
4187 relocation >>= (bfd_vma) rightshift;
4188 relocation <<= (bfd_vma) bitpos;
4189
4190 /* Add RELOCATION to the right bits of X. */
4191 /* FIXME : 090616
4192 Because the relaxation may generate duplicate relocation at one address,
4193 an addition to immediate in the instruction may cause the relocation added
4194 several times.
4195 This bug should be fixed in assembler, but a check is also needed here. */
4196 if (howto->partial_inplace)
4197 x = ((x & ~howto->dst_mask)
4198 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4199 else
4200 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4201
4202
4203 /* Put the relocated value back in the object file. */
4204 switch (size)
4205 {
4206 default:
4207 case 0:
4208 case 1:
4209 case 8:
4210 abort ();
4211 break;
4212 case 2:
4213 bfd_putb16 (x, location);
4214 break;
4215 case 4:
4216 bfd_putb32 (x, location);
4217 break;
4218 }
4219
4220 return flag;
4221}
4222
4223static bfd_reloc_status_type
4224nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4225 asection *input_section, bfd_byte *contents,
4226 bfd_vma address, bfd_vma value, bfd_vma addend)
4227{
4228 bfd_vma relocation;
4229
4230 /* Sanity check the address. */
4231 if (address > bfd_get_section_limit (input_bfd, input_section))
4232 return bfd_reloc_outofrange;
4233
4234 /* This function assumes that we are dealing with a basic relocation
4235 against a symbol. We want to compute the value of the symbol to
4236 relocate to. This is just VALUE, the value of the symbol, plus
4237 ADDEND, any addend associated with the reloc. */
4238 relocation = value + addend;
4239
4240 /* If the relocation is PC relative, we want to set RELOCATION to
4241 the distance between the symbol (currently in RELOCATION) and the
4242 location we are relocating. Some targets (e.g., i386-aout)
4243 arrange for the contents of the section to be the negative of the
4244 offset of the location within the section; for such targets
4245 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4246 simply leave the contents of the section as zero; for such
4247 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4248 need to subtract out the offset of the location within the
4249 section (which is just ADDRESS). */
4250 if (howto->pc_relative)
4251 {
4252 relocation -= (input_section->output_section->vma
4253 + input_section->output_offset);
4254 if (howto->pcrel_offset)
4255 relocation -= address;
4256 }
4257
4258 return nds32_relocate_contents (howto, input_bfd, relocation,
4259 contents + address);
4260}
4261
4262static bfd_boolean
4263nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4264 const char *name,
4265 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4266 asection *input_sec,
4267 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4268{
4269 const char *source;
4270 FILE *sym_ld_script = NULL;
4271 struct elf_nds32_link_hash_table *table;
4272
4273 table = nds32_elf_hash_table (info);
4274 sym_ld_script = table->sym_ld_script;
4275 if (!sym_ld_script)
4276 return TRUE;
4277
4278 if (!h || !name || *name == '\0')
4279 return TRUE;
4280
4281 if (input_sec->flags & SEC_EXCLUDE)
4282 return TRUE;
4283
4284 if (!check_start_export_sym)
4285 {
4286 fprintf (sym_ld_script, "SECTIONS\n{\n");
4287 check_start_export_sym = 1;
4288 }
4289
4290 if (h->root.type == bfd_link_hash_defined
4291 || h->root.type == bfd_link_hash_defweak)
4292 {
4293 if (!h->root.u.def.section->output_section)
4294 return TRUE;
4295
4296 if (bfd_is_const_section (input_sec))
4297 source = input_sec->name;
4298 else
4299 source = input_sec->owner->filename;
4300
4301 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4302 h->root.root.string,
4303 (long) (h->root.u.def.value
4304 + h->root.u.def.section->output_section->vma
4305 + h->root.u.def.section->output_offset), source);
4306 }
4307
4308 return TRUE;
4309}
4310
4311/* Relocate an NDS32/D ELF section.
4312 There is some attempt to make this function usable for many architectures,
4313 both for RELA and REL type relocs, if only to serve as a learning tool.
4314
4315 The RELOCATE_SECTION function is called by the new ELF backend linker
4316 to handle the relocations for a section.
4317
4318 The relocs are always passed as Rela structures; if the section
4319 actually uses Rel structures, the r_addend field will always be
4320 zero.
4321
4322 This function is responsible for adjust the section contents as
4323 necessary, and (if using Rela relocs and generating a
4324 relocatable output file) adjusting the reloc addend as
4325 necessary.
4326
4327 This function does not have to worry about setting the reloc
4328 address or the reloc symbol index.
4329
4330 LOCAL_SYMS is a pointer to the swapped in local symbols.
4331
4332 LOCAL_SECTIONS is an array giving the section in the input file
4333 corresponding to the st_shndx field of each local symbol.
4334
4335 The global hash table entry for the global symbols can be found
4336 via elf_sym_hashes (input_bfd).
4337
4338 When generating relocatable output, this function must handle
4339 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4340 going to be the section symbol corresponding to the output
4341 section, which means that the addend must be adjusted
4342 accordingly. */
4343
1c8f6a4d
KLC		 4344static bfd_vma
4345dtpoff_base (struct bfd_link_info *info)
4346{
4347 /* If tls_sec is NULL, we should have signalled an error already. */
4348 if (elf_hash_table (info)->tls_sec == NULL)
4349 return 0;
4350 return elf_hash_table (info)->tls_sec->vma;
4351}
4352
35c08157 4353static bfd_boolean
07d6d2b8 4354nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
35c08157 4355 struct bfd_link_info * info,
07d6d2b8
AM		 4356 bfd * input_bfd,
4357 asection * input_section,
4358 bfd_byte * contents,
4359 Elf_Internal_Rela * relocs,
4360 Elf_Internal_Sym * local_syms,
4361 asection ** local_sections)
35c08157
KLC		 4362{
4363 Elf_Internal_Shdr *symtab_hdr;
4364 struct elf_link_hash_entry **sym_hashes;
4365 Elf_Internal_Rela *rel, *relend;
4366 bfd_boolean ret = TRUE; /* Assume success. */
4367 int align = 0;
4368 bfd_reloc_status_type r;
4369 const char *errmsg = NULL;
4370 bfd_vma gp;
4371 struct elf_nds32_link_hash_table *htab;
4372 bfd *dynobj;
4373 bfd_vma *local_got_offsets;
4374 asection *sgot, *splt, *sreloc;
4375 bfd_vma high_address;
4376 struct elf_nds32_link_hash_table *table;
4377 int eliminate_gc_relocs;
4378 bfd_vma fpbase_addr;
4379
4380 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4381 sym_hashes = elf_sym_hashes (input_bfd);
4382 htab = nds32_elf_hash_table (info);
4383 high_address = bfd_get_section_limit (input_bfd, input_section);
4384
4385 dynobj = htab->root.dynobj;
4386 local_got_offsets = elf_local_got_offsets (input_bfd);
4387
ce558b89
AM		 4388 sgot = htab->root.sgot;
4389 splt = htab->root.splt;
35c08157
KLC		 4390 sreloc = NULL;
4391
4392 rel = relocs;
4393 relend = relocs + input_section->reloc_count;
4394
4395 table = nds32_elf_hash_table (info);
4396 eliminate_gc_relocs = table->eliminate_gc_relocs;
4397 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4398 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 4399 {
4400 is_SDA_BASE_set = 1;
4401 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4402 if (r != bfd_reloc_ok)
4403 return FALSE;
4404 }
4405
0c4bd9d9
KLC		 4406 if (is_ITB_BASE_set == 0)
4407 {
4408 /* Set the _ITB_BASE_. */
4409 if (!nds32_elf_ex9_itb_base (info))
4410 {
38f14ab8
AM		 4411 _bfd_error_handler (_("%pB: error: cannot set %s"),
4412 output_bfd, "_ITB_BASE_");
0c4bd9d9
KLC		 4413 bfd_set_error (bfd_error_bad_value);
4414 }
4415 }
4416
1c8f6a4d
KLC		 4417 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4418 if (!nds32_elf_ifc_reloc ())
38f14ab8 4419 _bfd_error_handler (_("error: IFC relocation error"));
1c8f6a4d
KLC		 4420
4421 /* Relocation for .ex9.itable. */
4422 if (table->target_optimize & NDS32_RELAX_EX9_ON
4423 || (table->ex9_import_file && table->update_ex9_table))
4424 nds32_elf_ex9_reloc_jmp (info);
4425
35c08157
KLC		 4426 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4427 the fp value is set as gp, and it has be reverted for instruction
4428 setting fp. */
4429 fpbase_addr = elf_gp (output_bfd);
4430
4431 for (rel = relocs; rel < relend; rel++)
4432 {
4433 enum elf_nds32_reloc_type r_type;
4434 reloc_howto_type *howto = NULL;
4435 unsigned long r_symndx;
4436 struct elf_link_hash_entry *h = NULL;
4437 Elf_Internal_Sym *sym = NULL;
4438 asection *sec;
4439 bfd_vma relocation;
4440
4441 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4442 ensure it's zero (we use REL relocs, not RELA). Therefore this
4443 should be assigning zero to `addend', but for clarity we use
4444 `r_addend'. */
4445
4446 bfd_vma addend = rel->r_addend;
4447 bfd_vma offset = rel->r_offset;
4448
4449 r_type = ELF32_R_TYPE (rel->r_info);
4450 if (r_type >= R_NDS32_max)
4451 {
695344c0 4452 /* xgettext:c-format */
0aa13fee 4453 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 4454 input_bfd, r_type);
35c08157
KLC		 4455 bfd_set_error (bfd_error_bad_value);
4456 ret = FALSE;
4457 continue;
4458 }
4459
4460 if (r_type == R_NDS32_GNU_VTENTRY
4461 || r_type == R_NDS32_GNU_VTINHERIT
4462 || r_type == R_NDS32_NONE
4463 || r_type == R_NDS32_RELA_GNU_VTENTRY
4464 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4465 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4466 || r_type == R_NDS32_DATA
1c8f6a4d 4467 || r_type == R_NDS32_TRAN
0c4bd9d9 4468 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC		 4469 continue;
4470
0c4bd9d9
KLC		 4471 /* If we enter the fp-as-gp region. Resolve the address
4472 of best fp-base. */
35c08157
KLC		 4473 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4474 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4475 {
4476 int dist;
4477
4478 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4479 dist = rel->r_addend >> 16;
4480 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4481 local_syms, symtab_hdr);
4482 }
4483 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4484 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4485 {
4486 fpbase_addr = elf_gp (output_bfd);
4487 }
4488
4489 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4490 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4491 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC		 4492 continue;
4493
4494 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4495 r_symndx = ELF32_R_SYM (rel->r_info);
4496
4497 /* This is a final link. */
4498 sym = NULL;
4499 sec = NULL;
4500 h = NULL;
4501
4502 if (r_symndx < symtab_hdr->sh_info)
4503 {
4504 /* Local symbol. */
4505 sym = local_syms + r_symndx;
4506 sec = local_sections[r_symndx];
4507
4508 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4509 addend = rel->r_addend;
4510 }
4511 else
4512 {
4513 /* External symbol. */
4514 bfd_boolean warned, ignored, unresolved_reloc;
4515 int symndx = r_symndx - symtab_hdr->sh_info;
4516
4517 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4518 r_symndx, symtab_hdr, sym_hashes, h, sec,
4519 relocation, unresolved_reloc, warned,
4520 ignored);
4521
4522 /* la $fp, _FP_BASE_ is per-function (region).
4523 Handle it specially. */
4524 switch ((int) r_type)
4525 {
4526 case R_NDS32_SDA19S0_RELA:
4527 case R_NDS32_SDA15S0_RELA:
4528 case R_NDS32_20_RELA:
4529 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4530 FP_BASE_NAME) == 0)
4531 {
4532 relocation = fpbase_addr;
4533 break;
4534 }
4535 }
4536
4537 }
4538
0e1862bb 4539 if (bfd_link_relocatable (info))
35c08157
KLC		 4540 {
4541 /* This is a relocatable link. We don't have to change
4542 anything, unless the reloc is against a section symbol,
4543 in which case we have to adjust according to where the
4544 section symbol winds up in the output section. */
4545 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4546 rel->r_addend += sec->output_offset + sym->st_value;
4547
4548 continue;
4549 }
4550
4551 /* Sanity check the address. */
4552 if (offset > high_address)
4553 {
4554 r = bfd_reloc_outofrange;
4555 goto check_reloc;
4556 }
4557
4558 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4559 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4560 || r_type >= R_NDS32_RELAX_ENTRY)
4561 continue;
4562
4563 switch ((int) r_type)
4564 {
4565 case R_NDS32_GOTOFF:
4566 /* Relocation is relative to the start of the global offset
4567 table (for ld24 rx, #uimm24), e.g. access at label+addend
4568
4569 ld24 rx. #label@GOTOFF + addend
4570 sub rx, r12. */
4571 case R_NDS32_GOTOFF_HI20:
4572 case R_NDS32_GOTOFF_LO12:
4573 case R_NDS32_GOTOFF_LO15:
4574 case R_NDS32_GOTOFF_LO19:
4575 BFD_ASSERT (sgot != NULL);
4576
4577 relocation -= elf_gp (output_bfd);
4578 break;
4579
4580 case R_NDS32_9_PLTREL:
4581 case R_NDS32_25_PLTREL:
4582 /* Relocation is to the entry for this symbol in the
4583 procedure linkage table. */
4584
4585 /* The native assembler will generate a 25_PLTREL reloc
4586 for a local symbol if you assemble a call from one
4587 section to another when using -K pic. */
4588 if (h == NULL)
4589 break;
4590
4591 if (h->forced_local)
4592 break;
4593
4594 /* We didn't make a PLT entry for this symbol. This
4595 happens when statically linking PIC code, or when
4596 using -Bsymbolic. */
4597 if (h->plt.offset == (bfd_vma) - 1)
4598 break;
4599
4600 relocation = (splt->output_section->vma
4601 + splt->output_offset + h->plt.offset);
4602 break;
4603
4604 case R_NDS32_PLT_GOTREL_HI20:
4605 case R_NDS32_PLT_GOTREL_LO12:
4606 case R_NDS32_PLT_GOTREL_LO15:
4607 case R_NDS32_PLT_GOTREL_LO19:
4608 case R_NDS32_PLT_GOTREL_LO20:
4609 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4610 {
4611 /* We didn't make a PLT entry for this symbol. This
4612 happens when statically linking PIC code, or when
4613 using -Bsymbolic. */
4614 relocation -= elf_gp (output_bfd);
4615 break;
4616 }
4617
4618 relocation = (splt->output_section->vma
4619 + splt->output_offset + h->plt.offset);
4620
4621 relocation -= elf_gp (output_bfd);
4622 break;
4623
4624 case R_NDS32_PLTREL_HI20:
4625 case R_NDS32_PLTREL_LO12:
4626
4627 /* Relocation is to the entry for this symbol in the
4628 procedure linkage table. */
4629
4630 /* The native assembler will generate a 25_PLTREL reloc
4631 for a local symbol if you assemble a call from one
4632 section to another when using -K pic. */
4633 if (h == NULL)
4634 break;
4635
4636 if (h->forced_local)
4637 break;
4638
4639 if (h->plt.offset == (bfd_vma) - 1)
4640 /* We didn't make a PLT entry for this symbol. This
4641 happens when statically linking PIC code, or when
4642 using -Bsymbolic. */
4643 break;
4644
4645 if (splt == NULL)
4646 break;
4647
4648 relocation = (splt->output_section->vma
4649 + splt->output_offset
4650 + h->plt.offset + 4)
4651 - (input_section->output_section->vma
4652 + input_section->output_offset
4653 + rel->r_offset);
4654
4655 break;
4656
4657 case R_NDS32_GOTPC20:
4658 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4659 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4660 relocation = elf_gp (output_bfd);
4661 break;
4662
4663 case R_NDS32_GOTPC_HI20:
4664 case R_NDS32_GOTPC_LO12:
4665 {
4666 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4667 bl .+4
4668 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4669 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4670 or
4671 bl .+4
4672 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4673 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4674 */
4675 relocation = elf_gp (output_bfd);
4676 relocation -= (input_section->output_section->vma
4677 + input_section->output_offset + rel->r_offset);
4678 break;
4679 }
4680
4681 case R_NDS32_GOT20:
4682 /* Fall through. */
4683 case R_NDS32_GOT_HI20:
4684 case R_NDS32_GOT_LO12:
4685 case R_NDS32_GOT_LO15:
4686 case R_NDS32_GOT_LO19:
4687 /* Relocation is to the entry for this symbol in the global
4688 offset table. */
4689 BFD_ASSERT (sgot != NULL);
4690
4691 if (h != NULL)
4692 {
4693 bfd_boolean dyn;
4694 bfd_vma off;
4695
4696 off = h->got.offset;
4697 BFD_ASSERT (off != (bfd_vma) - 1);
4698 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 4699 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4700 bfd_link_pic (info),
4701 h)
4702 || (bfd_link_pic (info)
35c08157
KLC		 4703 && (info->symbolic
4704 || h->dynindx == -1
4705 || h->forced_local) && h->def_regular))
4706 {
4707 /* This is actually a static link, or it is a
4708 -Bsymbolic link and the symbol is defined
4709 locally, or the symbol was forced to be local
4710 because of a version file. We must initialize
4711 this entry in the global offset table. Since the
4712 offset must always be a multiple of 4, we use the
4713 least significant bit to record whether we have
4714 initialized it already.
4715
4716 When doing a dynamic link, we create a .rela.got
4717 relocation entry to initialize the value. This
4718 is done in the finish_dynamic_symbol routine. */
4719 if ((off & 1) != 0)
4720 off &= ~1;
4721 else
4722 {
4723 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4724 h->got.offset |= 1;
4725 }
4726 }
4727 relocation = sgot->output_section->vma + sgot->output_offset + off
4728 - elf_gp (output_bfd);
4729 }
4730 else
4731 {
4732 bfd_vma off;
4733 bfd_byte *loc;
4734
4735 BFD_ASSERT (local_got_offsets != NULL
4736 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4737
4738 off = local_got_offsets[r_symndx];
4739
4740 /* The offset must always be a multiple of 4. We use
4741 the least significant bit to record whether we have
4742 already processed this entry. */
4743 if ((off & 1) != 0)
4744 off &= ~1;
4745 else
4746 {
4747 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4748
0e1862bb 4749 if (bfd_link_pic (info))
35c08157
KLC		 4750 {
4751 asection *srelgot;
4752 Elf_Internal_Rela outrel;
4753
4754 /* We need to generate a R_NDS32_RELATIVE reloc
4755 for the dynamic linker. */
ce558b89 4756 srelgot = htab->root.srelgot;
35c08157
KLC		 4757 BFD_ASSERT (srelgot != NULL);
4758
4759 outrel.r_offset = (elf_gp (output_bfd)
4760 + sgot->output_offset + off);
4761 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4762 outrel.r_addend = relocation;
4763 loc = srelgot->contents;
4764 loc +=
4765 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4766 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4767 ++srelgot->reloc_count;
4768 }
4769 local_got_offsets[r_symndx] |= 1;
4770 }
4771 relocation = sgot->output_section->vma + sgot->output_offset + off
4772 - elf_gp (output_bfd);
4773 }
4774
4775 break;
4776
4777 case R_NDS32_16_RELA:
4778 case R_NDS32_20_RELA:
4779 case R_NDS32_5_RELA:
4780 case R_NDS32_32_RELA:
4781 case R_NDS32_9_PCREL_RELA:
4782 case R_NDS32_WORD_9_PCREL_RELA:
4783 case R_NDS32_10_UPCREL_RELA:
4784 case R_NDS32_15_PCREL_RELA:
4785 case R_NDS32_17_PCREL_RELA:
4786 case R_NDS32_25_PCREL_RELA:
4787 case R_NDS32_HI20_RELA:
4788 case R_NDS32_LO12S3_RELA:
4789 case R_NDS32_LO12S2_RELA:
4790 case R_NDS32_LO12S2_DP_RELA:
4791 case R_NDS32_LO12S2_SP_RELA:
4792 case R_NDS32_LO12S1_RELA:
4793 case R_NDS32_LO12S0_RELA:
4794 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4795 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 4796 && (input_section->flags & SEC_ALLOC) != 0
4797 && (eliminate_gc_relocs == 0
4798 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4799 && ((r_type != R_NDS32_9_PCREL_RELA
4800 && r_type != R_NDS32_WORD_9_PCREL_RELA
4801 && r_type != R_NDS32_10_UPCREL_RELA
4802 && r_type != R_NDS32_15_PCREL_RELA
4803 && r_type != R_NDS32_17_PCREL_RELA
4804 && r_type != R_NDS32_25_PCREL_RELA
4805 && !(r_type == R_NDS32_32_RELA
4806 && strcmp (input_section->name, ".eh_frame") == 0))
4807 || (h != NULL && h->dynindx != -1
4808 && (!info->symbolic || !h->def_regular))))
4809 {
4810 Elf_Internal_Rela outrel;
4811 bfd_boolean skip, relocate;
4812 bfd_byte *loc;
4813
4814 /* When generating a shared object, these relocations
4815 are copied into the output file to be resolved at run
4816 time. */
4817
4818 if (sreloc == NULL)
4819 {
4820 const char *name;
4821
4822 name = bfd_elf_string_from_elf_section
4823 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4824 elf_section_data (input_section)->rela.hdr->sh_name);
4825 if (name == NULL)
4826 return FALSE;
4827
4828 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4829 && strcmp (bfd_get_section_name (input_bfd,
4830 input_section),
4831 name + 5) == 0);
4832
4833 sreloc = bfd_get_section_by_name (dynobj, name);
4834 BFD_ASSERT (sreloc != NULL);
4835 }
4836
4837 skip = FALSE;
4838 relocate = FALSE;
4839
4840 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4841 info,
4842 input_section,
4843 rel->r_offset);
4844 if (outrel.r_offset == (bfd_vma) - 1)
4845 skip = TRUE;
4846 else if (outrel.r_offset == (bfd_vma) - 2)
4847 skip = TRUE, relocate = TRUE;
4848 outrel.r_offset += (input_section->output_section->vma
4849 + input_section->output_offset);
4850
4851 if (skip)
4852 memset (&outrel, 0, sizeof outrel);
4853 else if (r_type == R_NDS32_17_PCREL_RELA
4854 || r_type == R_NDS32_15_PCREL_RELA
4855 || r_type == R_NDS32_25_PCREL_RELA)
4856 {
4857 BFD_ASSERT (h != NULL && h->dynindx != -1);
4858 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4859 outrel.r_addend = rel->r_addend;
4860 }
4861 else
4862 {
4863 /* h->dynindx may be -1 if this symbol was marked to
4864 become local. */
4865 if (h == NULL
4866 || ((info->symbolic || h->dynindx == -1)
4867 && h->def_regular))
4868 {
4869 relocate = TRUE;
4870 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4871 outrel.r_addend = relocation + rel->r_addend;
4872 }
4873 else
4874 {
4875 BFD_ASSERT (h->dynindx != -1);
4876 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4877 outrel.r_addend = rel->r_addend;
4878 }
4879 }
4880
4881 loc = sreloc->contents;
4882 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4883 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4884 ++sreloc->reloc_count;
4885
4886 /* If this reloc is against an external symbol, we do
4887 not want to fiddle with the addend. Otherwise, we
4888 need to include the symbol value so that it becomes
4889 an addend for the dynamic reloc. */
4890 if (!relocate)
4891 continue;
4892 }
4893 break;
4894
4895 case R_NDS32_25_ABS_RELA:
0e1862bb 4896 if (bfd_link_pic (info))
35c08157 4897 {
4eca0228 4898 _bfd_error_handler
38f14ab8
AM		 4899 (_("%pB: warning: %s unsupported in shared mode"),
4900 input_bfd, "R_NDS32_25_ABS_RELA");
35c08157
KLC		 4901 return FALSE;
4902 }
4903 break;
4904
4905 case R_NDS32_9_PCREL:
4906 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4907 contents, offset,
4908 sec, relocation, addend);
4909 goto check_reloc;
4910
4911 case R_NDS32_HI20:
4912 {
4913 Elf_Internal_Rela *lorel;
4914
4915 /* We allow an arbitrary number of HI20 relocs before the
4916 LO12 reloc. This permits gcc to emit the HI and LO relocs
4917 itself. */
4918 for (lorel = rel + 1;
4919 (lorel < relend
4920 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4921 continue;
4922 if (lorel < relend
4923 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4924 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4925 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4926 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4927 {
4928 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4929 contents, relocation + addend);
4930 r = bfd_reloc_ok;
4931 }
4932 else
4933 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC		 4934 contents, offset, relocation,
4935 addend);
35c08157
KLC		 4936 }
4937
4938 goto check_reloc;
4939
4940 case R_NDS32_GOT17S2_RELA:
4941 case R_NDS32_GOT15S2_RELA:
4942 {
4943 bfd_vma off;
4944
4945 BFD_ASSERT (sgot != NULL);
4946
4947 if (h != NULL)
4948 {
4949 bfd_boolean dyn;
4950
4951 off = h->got.offset;
4952 BFD_ASSERT (off != (bfd_vma) - 1);
4953
4954 dyn = htab->root.dynamic_sections_created;
4955 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L		 4956 (dyn, bfd_link_pic (info), h)
4957 || (bfd_link_pic (info)
4958 && (info->symbolic
4959 || h->dynindx == -1
4960 || h->forced_local)
4961 && h->def_regular))
35c08157
KLC		 4962 {
4963 /* This is actually a static link, or it is a
4964 -Bsymbolic link and the symbol is defined
4965 locally, or the symbol was forced to be local
4966 because of a version file. We must initialize
4967 this entry in the global offset table. Since the
4968 offset must always be a multiple of 4, we use the
4969 least significant bit to record whether we have
4970 initialized it already.
4971
4972 When doing a dynamic link, we create a .rela.got
4973 relocation entry to initialize the value. This
4974 is done in the finish_dynamic_symbol routine. */
4975 if ((off & 1) != 0)
4976 off &= ~1;
4977 else
4978 {
4979 bfd_put_32 (output_bfd, relocation,
4980 sgot->contents + off);
4981 h->got.offset |= 1;
4982 }
4983 }
4984 }
4985 else
4986 {
4987 bfd_byte *loc;
4988
4989 BFD_ASSERT (local_got_offsets != NULL
4990 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4991
4992 off = local_got_offsets[r_symndx];
4993
4994 /* The offset must always be a multiple of 4. We use
4995 the least significant bit to record whether we have
4996 already processed this entry. */
4997 if ((off & 1) != 0)
4998 off &= ~1;
4999 else
5000 {
5001 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5002
0e1862bb 5003 if (bfd_link_pic (info))
35c08157
KLC		 5004 {
5005 asection *srelgot;
5006 Elf_Internal_Rela outrel;
5007
5008 /* We need to generate a R_NDS32_RELATIVE reloc
5009 for the dynamic linker. */
ce558b89 5010 srelgot = htab->root.srelgot;
35c08157
KLC		 5011 BFD_ASSERT (srelgot != NULL);
5012
5013 outrel.r_offset = (elf_gp (output_bfd)
5014 + sgot->output_offset + off);
5015 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5016 outrel.r_addend = relocation;
5017 loc = srelgot->contents;
5018 loc +=
5019 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5020 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5021 ++srelgot->reloc_count;
5022 }
5023 local_got_offsets[r_symndx] |= 1;
5024 }
5025 }
5026 relocation = sgot->output_section->vma + sgot->output_offset + off
5027 - elf_gp (output_bfd);
5028 }
5029 if (relocation & align)
5030 {
5031 /* Incorrect alignment. */
4eca0228 5032 _bfd_error_handler
38f14ab8 5033 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
35c08157
KLC		 5034 ret = FALSE;
5035 r = bfd_reloc_dangerous;
5036 goto check_reloc;
5037 }
5038 break;
5039
5040 case R_NDS32_SDA16S3_RELA:
5041 case R_NDS32_SDA15S3_RELA:
5042 case R_NDS32_SDA15S3:
5043 align = 0x7;
5044 goto handle_sda;
5045
5046 case R_NDS32_SDA17S2_RELA:
5047 case R_NDS32_SDA15S2_RELA:
5048 case R_NDS32_SDA12S2_SP_RELA:
5049 case R_NDS32_SDA12S2_DP_RELA:
5050 case R_NDS32_SDA15S2:
5051 case R_NDS32_SDA_FP7U2_RELA:
5052 align = 0x3;
5053 goto handle_sda;
5054
5055 case R_NDS32_SDA18S1_RELA:
5056 case R_NDS32_SDA15S1_RELA:
5057 case R_NDS32_SDA15S1:
5058 align = 0x1;
5059 goto handle_sda;
5060
5061 case R_NDS32_SDA19S0_RELA:
5062 case R_NDS32_SDA15S0_RELA:
5063 case R_NDS32_SDA15S0:
5064 {
5065 align = 0x0;
5066handle_sda:
5067 BFD_ASSERT (sec != NULL);
5068
5069 /* If the symbol is in the abs section, the out_bfd will be null.
5070 This happens when the relocation has a symbol@GOTOFF. */
5071 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5072 if (r != bfd_reloc_ok)
5073 {
4eca0228 5074 _bfd_error_handler
38f14ab8 5075 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
35c08157
KLC		 5076 ret = FALSE;
5077 goto check_reloc;
5078 }
5079
5080 /* At this point `relocation' contains the object's
5081 address. */
5082 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5083 {
5084 relocation -= fpbase_addr;
5085 }
5086 else
5087 relocation -= gp;
5088 /* Now it contains the offset from _SDA_BASE_. */
5089
5090 /* Make sure alignment is correct. */
5091
5092 if (relocation & align)
5093 {
5094 /* Incorrect alignment. */
4eca0228 5095 _bfd_error_handler
695344c0 5096 /* xgettext:c-format */
38f14ab8
AM		 5097 (_("%pB(%pA): warning: unaligned small data access"
5098 " of type %d"),
35c08157
KLC		 5099 input_bfd, input_section, r_type);
5100 ret = FALSE;
5101 goto check_reloc;
5102 }
5103 }
5104
5105 break;
5106 case R_NDS32_17IFC_PCREL_RELA:
5107 case R_NDS32_10IFCU_PCREL_RELA:
5108 /* do nothing */
5109 break;
5110
1c8f6a4d
KLC		 5111 case R_NDS32_TLS_LE_HI20:
5112 case R_NDS32_TLS_LE_LO12:
5113 case R_NDS32_TLS_LE_20:
5114 case R_NDS32_TLS_LE_15S0:
5115 case R_NDS32_TLS_LE_15S1:
5116 case R_NDS32_TLS_LE_15S2:
5117 if (elf_hash_table (info)->tls_sec != NULL)
5118 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5119 break;
5120 case R_NDS32_TLS_IE_HI20:
5121 case R_NDS32_TLS_IE_LO12S2:
5122 {
5123 /* Relocation is to the entry for this symbol in the global
5124 offset table. */
5125 unsigned int tls_type;
5126 asection *srelgot;
5127 Elf_Internal_Rela outrel;
5128 bfd_vma off;
5129 bfd_byte *loc;
5130 int indx = 0;
5131
5132 BFD_ASSERT (sgot != NULL);
5133 if (h != NULL)
5134 {
5135 bfd_boolean dyn;
5136
5137 off = h->got.offset;
5138 BFD_ASSERT (off != (bfd_vma) - 1);
5139 dyn = htab->root.dynamic_sections_created;
5140 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5141 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5142 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5143 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5144 indx = h->dynindx;
5145 }
5146 else
5147 {
5148 /* Never happen currently. */
5149 BFD_ASSERT (local_got_offsets != NULL
5150 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5151
5152 off = local_got_offsets[r_symndx];
5153
5154 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5155 }
5156 relocation = sgot->output_section->vma + sgot->output_offset + off;
5157
5158 if (r_type == R_NDS32_TLS_IE_LO12S2)
5159 break;
5160
5161 /* The offset must always be a multiple of 4. We use
5162 the least significant bit to record whether we have
5163 already processed this entry. */
5164 if ((off & 1) != 0)
5165 off &= ~1;
5166 else
5167 {
5168 bfd_boolean need_relocs = FALSE;
ce558b89 5169 srelgot = htab->root.srelgot;
0e1862bb 5170 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC		 5171 && (h == NULL
5172 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5173 || h->root.type != bfd_link_hash_undefweak))
5174 {
5175 need_relocs = TRUE;
5176 BFD_ASSERT (srelgot != NULL);
5177 }
5178 if (tls_type & GOT_TLS_IE)
5179 {
5180 if (need_relocs)
5181 {
5182 if (h->dynindx == 0)
5183 outrel.r_addend = relocation - dtpoff_base (info);
5184 else
5185 outrel.r_addend = 0;
5186 outrel.r_offset = (sgot->output_section->vma
5187 + sgot->output_offset
5188 + off);
5189 outrel.r_info =
5190 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5191
5192 loc = srelgot->contents;
5193 loc +=
5194 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5195 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5196 ++srelgot->reloc_count;
5197 }
5198 else
5199 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5200 sgot->contents + off);
5201 }
5202 }
5203 }
5204 break;
5205
35c08157
KLC		 5206 /* DON'T fall through. */
5207
5208 default:
5209 /* OLD_NDS32_RELOC. */
5210
5211 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5212 contents, offset, relocation, addend);
5213 goto check_reloc;
5214 }
5215
5216 switch ((int) r_type)
5217 {
5218 case R_NDS32_20_RELA:
5219 case R_NDS32_5_RELA:
5220 case R_NDS32_9_PCREL_RELA:
5221 case R_NDS32_WORD_9_PCREL_RELA:
5222 case R_NDS32_10_UPCREL_RELA:
5223 case R_NDS32_15_PCREL_RELA:
5224 case R_NDS32_17_PCREL_RELA:
5225 case R_NDS32_25_PCREL_RELA:
5226 case R_NDS32_25_ABS_RELA:
5227 case R_NDS32_HI20_RELA:
5228 case R_NDS32_LO12S3_RELA:
5229 case R_NDS32_LO12S2_RELA:
5230 case R_NDS32_LO12S2_DP_RELA:
5231 case R_NDS32_LO12S2_SP_RELA:
5232 case R_NDS32_LO12S1_RELA:
5233 case R_NDS32_LO12S0_RELA:
5234 case R_NDS32_LO12S0_ORI_RELA:
5235 case R_NDS32_SDA16S3_RELA:
5236 case R_NDS32_SDA17S2_RELA:
5237 case R_NDS32_SDA18S1_RELA:
5238 case R_NDS32_SDA19S0_RELA:
5239 case R_NDS32_SDA15S3_RELA:
5240 case R_NDS32_SDA15S2_RELA:
5241 case R_NDS32_SDA12S2_DP_RELA:
5242 case R_NDS32_SDA12S2_SP_RELA:
5243 case R_NDS32_SDA15S1_RELA:
5244 case R_NDS32_SDA15S0_RELA:
5245 case R_NDS32_SDA_FP7U2_RELA:
5246 case R_NDS32_9_PLTREL:
5247 case R_NDS32_25_PLTREL:
5248 case R_NDS32_GOT20:
5249 case R_NDS32_GOT_HI20:
5250 case R_NDS32_GOT_LO12:
5251 case R_NDS32_GOT_LO15:
5252 case R_NDS32_GOT_LO19:
5253 case R_NDS32_GOT15S2_RELA:
5254 case R_NDS32_GOT17S2_RELA:
5255 case R_NDS32_GOTPC20:
5256 case R_NDS32_GOTPC_HI20:
5257 case R_NDS32_GOTPC_LO12:
5258 case R_NDS32_GOTOFF:
5259 case R_NDS32_GOTOFF_HI20:
5260 case R_NDS32_GOTOFF_LO12:
5261 case R_NDS32_GOTOFF_LO15:
5262 case R_NDS32_GOTOFF_LO19:
5263 case R_NDS32_PLTREL_HI20:
5264 case R_NDS32_PLTREL_LO12:
5265 case R_NDS32_PLT_GOTREL_HI20:
5266 case R_NDS32_PLT_GOTREL_LO12:
5267 case R_NDS32_PLT_GOTREL_LO15:
5268 case R_NDS32_PLT_GOTREL_LO19:
5269 case R_NDS32_PLT_GOTREL_LO20:
5270 case R_NDS32_17IFC_PCREL_RELA:
5271 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 5272 case R_NDS32_TLS_LE_HI20:
5273 case R_NDS32_TLS_LE_LO12:
5274 case R_NDS32_TLS_IE_HI20:
5275 case R_NDS32_TLS_IE_LO12S2:
5276 case R_NDS32_TLS_LE_20:
5277 case R_NDS32_TLS_LE_15S0:
5278 case R_NDS32_TLS_LE_15S1:
5279 case R_NDS32_TLS_LE_15S2:
35c08157 5280 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5281 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 5282 r = nds32_elf_final_link_relocate (howto, input_bfd,
5283 input_section, contents,
5284 rel->r_offset, relocation,
5285 rel->r_addend);
5286 break;
5287
5288 default:
5289 /* All other relocs can use default handler. */
5290 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5291 contents, rel->r_offset,
5292 relocation, rel->r_addend);
5293 break;
5294 }
5295
5296check_reloc:
5297
5298 if (r != bfd_reloc_ok)
5299 {
5300 /* FIXME: This should be generic enough to go in a utility. */
5301 const char *name;
5302
5303 if (h != NULL)
5304 name = h->root.root.string;
5305 else
5306 {
5307 name = bfd_elf_string_from_elf_section
5308 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5309 if (name == NULL || *name == '\0')
5310 name = bfd_section_name (input_bfd, sec);
5311 }
5312
5313 if (errmsg != NULL)
5314 goto common_error;
5315
5316 switch (r)
5317 {
5318 case bfd_reloc_overflow:
1a72702b
AM		 5319 (*info->callbacks->reloc_overflow)
5320 (info, (h ? &h->root : NULL), name, howto->name,
5321 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 5322 break;
5323
5324 case bfd_reloc_undefined:
1a72702b
AM		 5325 (*info->callbacks->undefined_symbol)
5326 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC		 5327 break;
5328
5329 case bfd_reloc_outofrange:
5330 errmsg = _("internal error: out of range error");
5331 goto common_error;
5332
5333 case bfd_reloc_notsupported:
5334 errmsg = _("internal error: unsupported relocation error");
5335 goto common_error;
5336
5337 case bfd_reloc_dangerous:
5338 errmsg = _("internal error: dangerous error");
5339 goto common_error;
5340
5341 default:
5342 errmsg = _("internal error: unknown error");
5343 /* Fall through. */
5344
1a72702b
AM		 5345 common_error:
5346 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5347 input_section, offset);
35c08157
KLC		 5348 break;
5349 }
5350 }
5351 }
5352
5353 return ret;
5354}
5355
5356/* Finish up dynamic symbol handling. We set the contents of various
5357 dynamic sections here. */
5358
5359static bfd_boolean
5360nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5361 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5362{
5363 struct elf_nds32_link_hash_table *htab;
5364 bfd_byte *loc;
5365
5366 htab = nds32_elf_hash_table (info);
5367
5368 if (h->plt.offset != (bfd_vma) - 1)
5369 {
5370 asection *splt;
5371 asection *sgot;
5372 asection *srela;
5373
5374 bfd_vma plt_index;
5375 bfd_vma got_offset;
5376 bfd_vma local_plt_offset;
5377 Elf_Internal_Rela rela;
5378
5379 /* This symbol has an entry in the procedure linkage table. Set
5380 it up. */
5381
5382 BFD_ASSERT (h->dynindx != -1);
5383
ce558b89
AM		 5384 splt = htab->root.splt;
5385 sgot = htab->root.sgotplt;
5386 srela = htab->root.srelplt;
35c08157
KLC		 5387 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5388
5389 /* Get the index in the procedure linkage table which
5390 corresponds to this symbol. This is the index of this symbol
5391 in all the symbols for which we are making plt entries. The
5392 first entry in the procedure linkage table is reserved. */
5393 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5394
5395 /* Get the offset into the .got table of the entry that
5396 corresponds to this function. Each .got entry is 4 bytes.
5397 The first three are reserved. */
5398 got_offset = (plt_index + 3) * 4;
5399
5400 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5401 if (!bfd_link_pic (info))
35c08157
KLC		 5402 {
5403 unsigned long insn;
5404
5405 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5406 + sgot->output_offset + got_offset) >> 12)
5407 & 0xfffff);
5408 bfd_putb32 (insn, splt->contents + h->plt.offset);
5409
5410 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5411 + sgot->output_offset + got_offset) & 0x0fff)
5412 >> 2);
5413 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5414
5415 insn = PLT_ENTRY_WORD2;
5416 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5417
5418 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5419 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5420
5421 insn = PLT_ENTRY_WORD4
5422 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5423 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5424 local_plt_offset = 12;
5425 }
5426 else
5427 {
5428 /* sda_base must be set at this time. */
5429 unsigned long insn;
5430 long offset;
5431
5432 /* FIXME, sda_base is 65536, it will damage opcode. */
5433 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5434 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5435 - elf_gp (output_bfd);
5436 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5437 bfd_putb32 (insn, splt->contents + h->plt.offset);
5438
5439 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5440 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5441
5442 insn = PLT_PIC_ENTRY_WORD2;
5443 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5444
5445 insn = PLT_PIC_ENTRY_WORD3;
5446 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5447
5448 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5449 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5450
5451 insn = PLT_PIC_ENTRY_WORD5
5452 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5453 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5454
5455 local_plt_offset = 16;
5456 }
5457
5458 /* Fill in the entry in the global offset table,
5459 so it will fall through to the next instruction for the first time. */
5460 bfd_put_32 (output_bfd,
5461 (splt->output_section->vma + splt->output_offset
5462 + h->plt.offset + local_plt_offset),
5463 sgot->contents + got_offset);
5464
5465 /* Fill in the entry in the .rela.plt section. */
5466 rela.r_offset = (sgot->output_section->vma
5467 + sgot->output_offset + got_offset);
5468 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5469 rela.r_addend = 0;
5470 loc = srela->contents;
5471 loc += plt_index * sizeof (Elf32_External_Rela);
5472 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5473
5474 if (!h->def_regular)
5475 {
5476 /* Mark the symbol as undefined, rather than as defined in
5477 the .plt section. Leave the value alone. */
5478 sym->st_shndx = SHN_UNDEF;
5479 if (!h->ref_regular_nonweak)
5480 sym->st_value = 0;
5481 }
5482 }
5483
5484 if (h->got.offset != (bfd_vma) - 1)
5485 {
5486 asection *sgot;
5487 asection *srela;
5488 Elf_Internal_Rela rela;
5489
5490 /* This symbol has an entry in the global offset table.
5491 Set it up. */
5492
ce558b89
AM		 5493 sgot = htab->root.sgot;
5494 srela = htab->root.srelgot;
35c08157
KLC		 5495 BFD_ASSERT (sgot != NULL && srela != NULL);
5496
5497 rela.r_offset = (sgot->output_section->vma
5498 + sgot->output_offset + (h->got.offset & ~1));
5499
5500 /* If this is a -Bsymbolic link, and the symbol is defined
5501 locally, we just want to emit a RELATIVE reloc. Likewise if
5502 the symbol was forced to be local because of a version file.
5503 The entry in the global offset table will already have been
5504 initialized in the relocate_section function. */
0e1862bb 5505 if (bfd_link_pic (info)
35c08157
KLC		 5506 && (info->symbolic
5507 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5508 {
5509 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5510 rela.r_addend = (h->root.u.def.value
5511 + h->root.u.def.section->output_section->vma
5512 + h->root.u.def.section->output_offset);
5513 }
5514 else
5515 {
5516 BFD_ASSERT ((h->got.offset & 1) == 0);
5517 bfd_put_32 (output_bfd, (bfd_vma) 0,
5518 sgot->contents + h->got.offset);
5519 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5520 rela.r_addend = 0;
5521 }
5522
5523 loc = srela->contents;
5524 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5525 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5526 ++srela->reloc_count;
5527 }
5528
5529 if (h->needs_copy)
5530 {
5531 asection *s;
5532 Elf_Internal_Rela rela;
5533
5534 /* This symbols needs a copy reloc. Set it up. */
5535
5536 BFD_ASSERT (h->dynindx != -1
5537 && (h->root.type == bfd_link_hash_defined
5538 || h->root.type == bfd_link_hash_defweak));
5539
5540 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5541 BFD_ASSERT (s != NULL);
5542
5543 rela.r_offset = (h->root.u.def.value
5544 + h->root.u.def.section->output_section->vma
5545 + h->root.u.def.section->output_offset);
5546 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5547 rela.r_addend = 0;
5548 loc = s->contents;
5549 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5550 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5551 ++s->reloc_count;
5552 }
5553
5554 /* Mark some specially defined symbols as absolute. */
5555 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5556 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5557 sym->st_shndx = SHN_ABS;
5558
5559 return TRUE;
5560}
5561
5562
5563/* Finish up the dynamic sections. */
5564
5565static bfd_boolean
5566nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5567{
5568 struct elf_nds32_link_hash_table *htab;
5569 bfd *dynobj;
5570 asection *sdyn;
5571 asection *sgot;
5572
5573 htab = nds32_elf_hash_table (info);
5574 dynobj = htab->root.dynobj;
5575
ce558b89 5576 sgot = htab->root.sgotplt;
35c08157
KLC		 5577 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5578
5579 if (htab->root.dynamic_sections_created)
5580 {
5581 asection *splt;
5582 Elf32_External_Dyn *dyncon, *dynconend;
5583
5584 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5585
5586 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5587 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5588
5589 for (; dyncon < dynconend; dyncon++)
5590 {
5591 Elf_Internal_Dyn dyn;
5592 asection *s;
5593
5594 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5595
5596 switch (dyn.d_tag)
5597 {
5598 default:
5599 break;
5600
5601 case DT_PLTGOT:
ce558b89 5602 s = htab->root.sgotplt;
35c08157
KLC		 5603 goto get_vma;
5604 case DT_JMPREL:
ce558b89 5605 s = htab->root.srelplt;
35c08157 5606 get_vma:
4ade44b7 5607 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 5608 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5609 break;
5610
5611 case DT_PLTRELSZ:
ce558b89 5612 s = htab->root.srelplt;
35c08157
KLC		 5613 dyn.d_un.d_val = s->size;
5614 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5615 break;
35c08157
KLC		 5616 }
5617 }
5618
5619 /* Fill in the first entry in the procedure linkage table. */
ce558b89 5620 splt = htab->root.splt;
35c08157
KLC		 5621 if (splt && splt->size > 0)
5622 {
0e1862bb 5623 if (bfd_link_pic (info))
35c08157
KLC		 5624 {
5625 unsigned long insn;
5626 long offset;
5627
5628 /* FIXME, sda_base is 65536, it will damage opcode. */
5629 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5630 offset = sgot->output_section->vma + sgot->output_offset + 4
5631 - elf_gp (output_bfd);
5632 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5633 bfd_putb32 (insn, splt->contents);
5634
5635 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5636 /* here has a typo? */
5637 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5638 bfd_putb32 (insn, splt->contents + 4);
5639
5640 insn = PLT0_PIC_ENTRY_WORD2;
5641 bfd_putb32 (insn, splt->contents + 8);
5642
5643 insn = PLT0_PIC_ENTRY_WORD3;
5644 bfd_putb32 (insn, splt->contents + 12);
5645
5646 insn = PLT0_PIC_ENTRY_WORD4;
5647 bfd_putb32 (insn, splt->contents + 16);
5648
5649 insn = PLT0_PIC_ENTRY_WORD5;
5650 bfd_putb32 (insn, splt->contents + 20);
5651 }
5652 else
5653 {
5654 unsigned long insn;
5655 unsigned long addr;
5656
5657 /* addr = .got + 4 */
5658 addr = sgot->output_section->vma + sgot->output_offset + 4;
5659 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5660 bfd_putb32 (insn, splt->contents);
5661
5662 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5663 bfd_putb32 (insn, splt->contents + 4);
5664
5665 insn = PLT0_ENTRY_WORD2;
5666 bfd_putb32 (insn, splt->contents + 8);
5667
5668 insn = PLT0_ENTRY_WORD3;
5669 bfd_putb32 (insn, splt->contents + 12);
5670
5671 insn = PLT0_ENTRY_WORD4;
5672 bfd_putb32 (insn, splt->contents + 16);
5673 }
5674
5675 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5676 PLT_ENTRY_SIZE;
5677 }
5678 }
5679
5680 /* Fill in the first three entries in the global offset table. */
5681 if (sgot && sgot->size > 0)
5682 {
5683 if (sdyn == NULL)
5684 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5685 else
5686 bfd_put_32 (output_bfd,
5687 sdyn->output_section->vma + sdyn->output_offset,
5688 sgot->contents);
5689 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5690 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5691
5692 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5693 }
5694
5695 return TRUE;
5696}
5697\f
5698
5699/* Set the right machine number. */
5700
5701static bfd_boolean
5702nds32_elf_object_p (bfd *abfd)
5703{
5704 static unsigned int cur_arch = 0;
5705
5706 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5707 {
5708 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5709 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5710 }
5711
5712 switch (cur_arch)
5713 {
5714 default:
5715 case E_N1_ARCH:
5716 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5717 break;
5718 case E_N1H_ARCH:
5719 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5720 break;
5721 case E_NDS_ARCH_STAR_V2_0:
5722 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5723 break;
5724 case E_NDS_ARCH_STAR_V3_0:
5725 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5726 break;
5727 case E_NDS_ARCH_STAR_V3_M:
5728 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5729 break;
5730 }
5731
5732 return TRUE;
5733}
5734
5735/* Store the machine number in the flags field. */
5736
5737static void
5738nds32_elf_final_write_processing (bfd *abfd,
5739 bfd_boolean linker ATTRIBUTE_UNUSED)
5740{
5741 unsigned long val;
5742 static unsigned int cur_mach = 0;
5743
5744 if (bfd_mach_n1 != bfd_get_mach (abfd))
5745 {
5746 cur_mach = bfd_get_mach (abfd);
5747 }
5748
5749 switch (cur_mach)
5750 {
5751 case bfd_mach_n1:
5752 /* Only happen when object is empty, since the case is abandon. */
5753 val = E_N1_ARCH;
5754 val |= E_NDS_ABI_AABI;
5755 val |= E_NDS32_ELF_VER_1_4;
5756 break;
5757 case bfd_mach_n1h:
5758 val = E_N1H_ARCH;
5759 break;
5760 case bfd_mach_n1h_v2:
5761 val = E_NDS_ARCH_STAR_V2_0;
5762 break;
5763 case bfd_mach_n1h_v3:
5764 val = E_NDS_ARCH_STAR_V3_0;
5765 break;
5766 case bfd_mach_n1h_v3m:
5767 val = E_NDS_ARCH_STAR_V3_M;
5768 break;
5769 default:
5770 val = 0;
5771 break;
5772 }
5773
5774 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5775 elf_elfheader (abfd)->e_flags |= val;
5776}
5777
5778/* Function to keep NDS32 specific file flags. */
5779
5780static bfd_boolean
5781nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5782{
5783 BFD_ASSERT (!elf_flags_init (abfd)
5784 || elf_elfheader (abfd)->e_flags == flags);
5785
5786 elf_elfheader (abfd)->e_flags = flags;
5787 elf_flags_init (abfd) = TRUE;
5788 return TRUE;
5789}
5790
5791static unsigned int
5792convert_e_flags (unsigned int e_flags, unsigned int arch)
5793{
5794 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5795 {
5796 /* From 0.9 to 1.0. */
5797 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5798
5799 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5800 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5801 if (arch == E_NDS_ARCH_STAR_V1_0)
5802 {
5803 /* Done. */
5804 return e_flags;
5805 }
5806 }
5807
5808 /* From 1.0 to 2.0. */
5809 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5810
5811 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5812 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5813
5814 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5815 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5816 return e_flags;
5817}
5818
5819static bfd_boolean
5820nds32_check_vec_size (bfd *ibfd)
5821{
5822 static unsigned int nds32_vec_size = 0;
5823
5824 asection *sec_t = NULL;
5825 bfd_byte *contents = NULL;
5826
5827 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5828
5829 if (sec_t && sec_t->size >= 4)
5830 {
5831 /* Get vec_size in file. */
5832 unsigned int flag_t;
5833
0c4bd9d9 5834 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC		 5835 flag_t = bfd_get_32 (ibfd, contents);
5836
5837 /* The value could only be 4 or 16. */
5838
5839 if (!nds32_vec_size)
5840 /* Set if not set yet. */
5841 nds32_vec_size = (flag_t & 0x3);
5842 else if (nds32_vec_size != (flag_t & 0x3))
5843 {
4eca0228 5844 _bfd_error_handler
695344c0 5845 /* xgettext:c-format */
871b3ab2 5846 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 5847 " with previous modules, previous %u-byte, current %u-byte"),
5848 ibfd,
5849 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5850 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC		 5851 return FALSE;
5852 }
5853 else
5854 /* Only keep the first vec_size section. */
5855 sec_t->flags |= SEC_EXCLUDE;
5856 }
5857
5858 return TRUE;
5859}
5860
5861/* Merge backend specific data from an object file to the output
5862 object file when linking. */
5863
5864static bfd_boolean
50e03d47 5865nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5866{
50e03d47 5867 bfd *obfd = info->output_bfd;
35c08157
KLC		 5868 flagword out_flags;
5869 flagword in_flags;
5870 flagword out_16regs;
5871 flagword in_no_mac;
5872 flagword out_no_mac;
5873 flagword in_16regs;
5874 flagword out_version;
5875 flagword in_version;
5876 flagword out_fpu_config;
5877 flagword in_fpu_config;
5878
5879 /* TODO: Revise to use object-attributes instead. */
5880 if (!nds32_check_vec_size (ibfd))
5881 return FALSE;
5882
5883 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5884 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5885 return TRUE;
5886
5887 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5888 {
4eca0228 5889 _bfd_error_handler
38f14ab8 5890 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC		 5891
5892 bfd_set_error (bfd_error_bad_value);
5893 return FALSE;
5894 }
5895
5896 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5897 if (in_version == E_NDS32_ELF_VER_1_2)
5898 {
4eca0228 5899 _bfd_error_handler
38f14ab8
AM		 5900 (_("%pB: warning: older version of object file encountered, "
5901 "please recompile with current tool chain"), ibfd);
35c08157
KLC		 5902 }
5903
5904 /* We may need to merge V1 and V2 arch object files to V2. */
5905 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5906 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5907 {
5908 /* Need to convert version. */
5909 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5910 == E_NDS_ARCH_STAR_RESERVED)
5911 {
5912 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5913 }
5914 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5915 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5916 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5917 {
5918 elf_elfheader (obfd)->e_flags =
5919 convert_e_flags (elf_elfheader (obfd)->e_flags,
5920 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5921 }
5922 else
5923 {
5924 elf_elfheader (ibfd)->e_flags =
5925 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5926 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5927 }
5928 }
5929
5930 /* Extract some flags. */
5931 in_flags = elf_elfheader (ibfd)->e_flags
5932 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5933 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5934
5935 /* The following flags need special treatment. */
5936 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5937 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5938 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5939
5940 /* Extract some flags. */
5941 out_flags = elf_elfheader (obfd)->e_flags
5942 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5943 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5944
5945 /* The following flags need special treatment. */
5946 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5947 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5948 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5949 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5950 if (!elf_flags_init (obfd))
5951 {
5952 /* If the input is the default architecture then do not
5953 bother setting the flags for the output architecture,
5954 instead allow future merges to do this. If no future
5955 merges ever set these flags then they will retain their
5956 unitialised values, which surprise surprise, correspond
5957 to the default values. */
5958 if (bfd_get_arch_info (ibfd)->the_default)
5959 return TRUE;
5960
5961 elf_flags_init (obfd) = TRUE;
5962 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5963
5964 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5965 && bfd_get_arch_info (obfd)->the_default)
5966 {
5967 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5968 bfd_get_mach (ibfd));
5969 }
5970
5971 return TRUE;
5972 }
5973
5974 /* Check flag compatibility. */
5975 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5976 {
4eca0228 5977 _bfd_error_handler
38f14ab8 5978 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157
KLC		 5979
5980 bfd_set_error (bfd_error_bad_value);
5981 return FALSE;
5982 }
5983
5984 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5985 {
5986 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5987 {
4eca0228 5988 _bfd_error_handler
38f14ab8
AM		 5989 (_("%pB: error: instruction set mismatch with previous modules"),
5990 ibfd);
35c08157
KLC		 5991
5992 bfd_set_error (bfd_error_bad_value);
5993 return FALSE;
5994 }
5995 }
5996
5997 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5998 and perf ext1 and DIV are mergerd to perf ext1. */
5999 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6000 {
6001 elf_elfheader (obfd)->e_flags =
6002 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6003 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6004 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6005 ? E_NDS32_HAS_EXT_INST : 0)
6006 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6007 ? E_NDS32_HAS_EXT_INST : 0)
6008 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6009 | ((in_version > out_version) ? out_version : in_version);
6010 }
6011 else
6012 {
6013 if (in_version != out_version)
4eca0228 6014 _bfd_error_handler
695344c0 6015 /* xgettext:c-format */
38f14ab8 6016 (_("%pB: warning: incompatible elf-versions %s and %s"),
4eca0228
AM		 6017 ibfd, nds32_elfver_strtab[out_version],
6018 nds32_elfver_strtab[in_version]);
35c08157
KLC		 6019
6020 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6021 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6022 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6023 | (in_version > out_version ? out_version : in_version);
6024 }
6025
6026 return TRUE;
6027}
6028
6029/* Display the flags field. */
6030
6031static bfd_boolean
6032nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6033{
6034 FILE *file = (FILE *) ptr;
6035
6036 BFD_ASSERT (abfd != NULL && ptr != NULL);
6037
6038 _bfd_elf_print_private_bfd_data (abfd, ptr);
6039
6040 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6041
6042 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6043 {
6044 default:
6045 case E_N1_ARCH:
6046 fprintf (file, _(": n1 instructions"));
6047 break;
6048 case E_N1H_ARCH:
6049 fprintf (file, _(": n1h instructions"));
6050 break;
6051 }
6052
6053 fputc ('\n', file);
6054
6055 return TRUE;
6056}
6057
6058static unsigned int
6059nds32_elf_action_discarded (asection *sec)
6060{
6061
6062 if (strncmp
6063 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6064 return 0;
6065
6066 return _bfd_elf_default_action_discarded (sec);
6067}
6068
6069static asection *
6070nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6071 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6072 Elf_Internal_Sym *sym)
6073{
6074 if (h != NULL)
6075 switch (ELF32_R_TYPE (rel->r_info))
6076 {
6077 case R_NDS32_GNU_VTINHERIT:
6078 case R_NDS32_GNU_VTENTRY:
6079 case R_NDS32_RELA_GNU_VTINHERIT:
6080 case R_NDS32_RELA_GNU_VTENTRY:
6081 return NULL;
6082 }
6083
6084 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6085}
6086
35c08157
KLC		 6087/* Look through the relocs for a section during the first phase.
6088 Since we don't do .gots or .plts, we just need to consider the
6089 virtual table relocs for gc. */
6090
6091static bfd_boolean
6092nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6093 asection *sec, const Elf_Internal_Rela *relocs)
6094{
6095 Elf_Internal_Shdr *symtab_hdr;
6096 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6097 const Elf_Internal_Rela *rel;
6098 const Elf_Internal_Rela *rel_end;
6099 struct elf_nds32_link_hash_table *htab;
6100 bfd *dynobj;
6101 asection *sreloc = NULL;
6102
0e1862bb 6103 if (bfd_link_relocatable (info))
35c08157
KLC		 6104 return TRUE;
6105
65281396
AM		 6106 /* Don't do anything special with non-loaded, non-alloced sections.
6107 In particular, any relocs in such sections should not affect GOT
6108 and PLT reference counting (ie. we don't allow them to create GOT
6109 or PLT entries), there's no possibility or desire to optimize TLS
6110 relocs, and there's not much point in propagating relocs to shared
6111 libs that the dynamic linker won't relocate. */
6112 if ((sec->flags & SEC_ALLOC) == 0)
6113 return TRUE;
6114
35c08157
KLC		 6115 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6116 sym_hashes = elf_sym_hashes (abfd);
6117 sym_hashes_end =
6118 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6119 if (!elf_bad_symtab (abfd))
6120 sym_hashes_end -= symtab_hdr->sh_info;
6121
6122 htab = nds32_elf_hash_table (info);
6123 dynobj = htab->root.dynobj;
6124
6125 rel_end = relocs + sec->reloc_count;
6126 for (rel = relocs; rel < rel_end; rel++)
6127 {
6128 enum elf_nds32_reloc_type r_type;
6129 struct elf_link_hash_entry *h;
6130 unsigned long r_symndx;
1c8f6a4d 6131 int tls_type, old_tls_type;
35c08157
KLC		 6132
6133 r_symndx = ELF32_R_SYM (rel->r_info);
6134 r_type = ELF32_R_TYPE (rel->r_info);
6135 if (r_symndx < symtab_hdr->sh_info)
6136 h = NULL;
6137 else
6138 {
6139 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6140 while (h->root.type == bfd_link_hash_indirect
6141 || h->root.type == bfd_link_hash_warning)
6142 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6143 }
6144
1c8f6a4d
KLC		 6145 /* Some relocs require a global offset table. We create
6146 got section here, since these relocation need got section
6147 and it is not created yet. */
ce558b89 6148 if (htab->root.sgot == NULL)
35c08157
KLC		 6149 {
6150 switch (r_type)
6151 {
6152 case R_NDS32_GOT_HI20:
6153 case R_NDS32_GOT_LO12:
6154 case R_NDS32_GOT_LO15:
6155 case R_NDS32_GOT_LO19:
6156 case R_NDS32_GOT17S2_RELA:
6157 case R_NDS32_GOT15S2_RELA:
6158 case R_NDS32_GOTOFF:
6159 case R_NDS32_GOTOFF_HI20:
6160 case R_NDS32_GOTOFF_LO12:
6161 case R_NDS32_GOTOFF_LO15:
6162 case R_NDS32_GOTOFF_LO19:
6163 case R_NDS32_GOTPC20:
6164 case R_NDS32_GOTPC_HI20:
6165 case R_NDS32_GOTPC_LO12:
6166 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6167 case R_NDS32_TLS_IE_HI20:
6168 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC		 6169 if (dynobj == NULL)
6170 htab->root.dynobj = dynobj = abfd;
ce558b89 6171 if (!_bfd_elf_create_got_section (dynobj, info))
35c08157
KLC		 6172 return FALSE;
6173 break;
6174
6175 default:
6176 break;
6177 }
6178 }
6179
6180 switch ((int) r_type)
6181 {
6182 case R_NDS32_GOT_HI20:
6183 case R_NDS32_GOT_LO12:
6184 case R_NDS32_GOT_LO15:
6185 case R_NDS32_GOT_LO19:
6186 case R_NDS32_GOT20:
1c8f6a4d
KLC		 6187 case R_NDS32_TLS_IE_HI20:
6188 case R_NDS32_TLS_IE_LO12S2:
6189 switch (r_type)
6190 {
6191 case R_NDS32_TLS_IE_HI20:
6192 case R_NDS32_TLS_IE_LO12S2:
6193 tls_type = GOT_TLS_IE;
6194 break;
6195 default:
6196 tls_type = GOT_NORMAL;
6197 break;
6198 }
35c08157 6199 if (h != NULL)
1c8f6a4d
KLC		 6200 {
6201 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6202 h->got.refcount += 1;
6203 }
35c08157
KLC		 6204 else
6205 {
6206 bfd_signed_vma *local_got_refcounts;
6207
6208 /* This is a global offset table entry for a local
6209 symbol. */
6210 local_got_refcounts = elf_local_got_refcounts (abfd);
6211 if (local_got_refcounts == NULL)
6212 {
6213 bfd_size_type size;
6214
6215 size = symtab_hdr->sh_info;
6216 size *= sizeof (bfd_signed_vma);
6217 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6218 if (local_got_refcounts == NULL)
6219 return FALSE;
6220 elf_local_got_refcounts (abfd) = local_got_refcounts;
6221 }
6222 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6223 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6224 }
35c08157 6225
1c8f6a4d
KLC		 6226 /* We will already have issued an error message if there
6227 is a TLS/non-TLS mismatch, based on the symbol
6228 type. So just combine any TLS types needed. */
6229 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6230 && tls_type != GOT_NORMAL)
6231 tls_type |= old_tls_type;
6232
6233 if (old_tls_type != tls_type)
6234 {
6235 if (h != NULL)
6236 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6237 else
6238 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6239 }
6240 break;
6241 case R_NDS32_9_PLTREL:
35c08157
KLC		 6242 case R_NDS32_25_PLTREL:
6243 case R_NDS32_PLTREL_HI20:
6244 case R_NDS32_PLTREL_LO12:
6245 case R_NDS32_PLT_GOTREL_HI20:
6246 case R_NDS32_PLT_GOTREL_LO12:
6247 case R_NDS32_PLT_GOTREL_LO15:
6248 case R_NDS32_PLT_GOTREL_LO19:
6249 case R_NDS32_PLT_GOTREL_LO20:
6250
6251 /* This symbol requires a procedure linkage table entry. We
6252 actually build the entry in adjust_dynamic_symbol,
6253 because this might be a case of linking PIC code without
6254 linking in any dynamic objects, in which case we don't
6255 need to generate a procedure linkage table after all. */
6256
6257 /* If this is a local symbol, we resolve it directly without
6258 creating a procedure linkage table entry. */
6259 if (h == NULL)
6260 continue;
6261
6262 if (h->forced_local)
6263 break;
6264
1c8f6a4d 6265 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 6266 h->needs_plt = 1;
6267 h->plt.refcount += 1;
6268 break;
6269
6270 case R_NDS32_16_RELA:
6271 case R_NDS32_20_RELA:
6272 case R_NDS32_5_RELA:
6273 case R_NDS32_32_RELA:
6274 case R_NDS32_HI20_RELA:
6275 case R_NDS32_LO12S3_RELA:
6276 case R_NDS32_LO12S2_RELA:
6277 case R_NDS32_LO12S2_DP_RELA:
6278 case R_NDS32_LO12S2_SP_RELA:
6279 case R_NDS32_LO12S1_RELA:
6280 case R_NDS32_LO12S0_RELA:
6281 case R_NDS32_LO12S0_ORI_RELA:
6282 case R_NDS32_SDA16S3_RELA:
6283 case R_NDS32_SDA17S2_RELA:
6284 case R_NDS32_SDA18S1_RELA:
6285 case R_NDS32_SDA19S0_RELA:
6286 case R_NDS32_SDA15S3_RELA:
6287 case R_NDS32_SDA15S2_RELA:
6288 case R_NDS32_SDA12S2_DP_RELA:
6289 case R_NDS32_SDA12S2_SP_RELA:
6290 case R_NDS32_SDA15S1_RELA:
6291 case R_NDS32_SDA15S0_RELA:
6292 case R_NDS32_SDA_FP7U2_RELA:
6293 case R_NDS32_15_PCREL_RELA:
6294 case R_NDS32_17_PCREL_RELA:
6295 case R_NDS32_25_PCREL_RELA:
6296
0e1862bb 6297 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 6298 {
6299 h->non_got_ref = 1;
6300 h->plt.refcount += 1;
6301 }
6302
6303 /* If we are creating a shared library, and this is a reloc against
6304 a global symbol, or a non PC relative reloc against a local
6305 symbol, then we need to copy the reloc into the shared library.
6306 However, if we are linking with -Bsymbolic, we do not need to
6307 copy a reloc against a global symbol which is defined in an
6308 object we are including in the link (i.e., DEF_REGULAR is set).
6309 At this point we have not seen all the input files, so it is
6310 possible that DEF_REGULAR is not set now but will be set later
6311 (it is never cleared). We account for that possibility below by
6312 storing information in the dyn_relocs field of the hash table
6313 entry. A similar situation occurs when creating shared libraries
6314 and symbol visibility changes render the symbol local.
6315
6316 If on the other hand, we are creating an executable, we may need
6317 to keep relocations for symbols satisfied by a dynamic library
6318 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6319 if ((bfd_link_pic (info)
35c08157
KLC		 6320 && (sec->flags & SEC_ALLOC) != 0
6321 && ((r_type != R_NDS32_25_PCREL_RELA
6322 && r_type != R_NDS32_15_PCREL_RELA
6323 && r_type != R_NDS32_17_PCREL_RELA
6324 && !(r_type == R_NDS32_32_RELA
6325 && strcmp (sec->name, ".eh_frame") == 0))
6326 || (h != NULL
6327 && (!info->symbolic
6328 || h->root.type == bfd_link_hash_defweak
6329 || !h->def_regular))))
0e1862bb 6330 || (!bfd_link_pic (info)
35c08157
KLC		 6331 && (sec->flags & SEC_ALLOC) != 0
6332 && h != NULL
6333 && (h->root.type == bfd_link_hash_defweak
6334 || !h->def_regular)))
6335 {
3bf083ed
AM		 6336 struct elf_dyn_relocs *p;
6337 struct elf_dyn_relocs **head;
35c08157
KLC		 6338
6339 if (dynobj == NULL)
6340 htab->root.dynobj = dynobj = abfd;
6341
6342 /* When creating a shared object, we must copy these
6343 relocs into the output file. We create a reloc
6344 section in dynobj and make room for the reloc. */
6345 if (sreloc == NULL)
6346 {
6347 const char *name;
6348
6349 name = bfd_elf_string_from_elf_section
6350 (abfd, elf_elfheader (abfd)->e_shstrndx,
6351 elf_section_data (sec)->rela.hdr->sh_name);
6352 if (name == NULL)
6353 return FALSE;
6354
6355 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6356 && strcmp (bfd_get_section_name (abfd, sec),
6357 name + 5) == 0);
6358
6359 sreloc = bfd_get_section_by_name (dynobj, name);
6360 if (sreloc == NULL)
6361 {
6362 flagword flags;
6363
6364 sreloc = bfd_make_section (dynobj, name);
6365 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6366 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6367 if ((sec->flags & SEC_ALLOC) != 0)
6368 flags |= SEC_ALLOC | SEC_LOAD;
6369 if (sreloc == NULL
6370 || !bfd_set_section_flags (dynobj, sreloc, flags)
6371 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6372 return FALSE;
6373
6374 elf_section_type (sreloc) = SHT_RELA;
6375 }
6376 elf_section_data (sec)->sreloc = sreloc;
6377 }
6378
6379 /* If this is a global symbol, we count the number of
6380 relocations we need for this symbol. */
6381 if (h != NULL)
6382 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6383 else
6384 {
6385 asection *s;
61034b0b 6386 void *vpp;
35c08157
KLC		 6387
6388 Elf_Internal_Sym *isym;
6389 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6390 if (isym == NULL)
6391 return FALSE;
6392
6393 /* Track dynamic relocs needed for local syms too. */
6394 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6395 if (s == NULL)
6396 return FALSE;
6397
61034b0b 6398 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 6399 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 6400 }
6401
6402 p = *head;
6403 if (p == NULL || p->sec != sec)
6404 {
6405 bfd_size_type amt = sizeof (*p);
3bf083ed 6406 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157
KLC		 6407 if (p == NULL)
6408 return FALSE;
6409 p->next = *head;
6410 *head = p;
6411 p->sec = sec;
6412 p->count = 0;
6413 p->pc_count = 0;
6414 }
6415
6416 p->count += 1;
6417 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6418 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6419 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6420 p->pc_count += 1;
6421 }
6422 break;
6423
6424 /* This relocation describes the C++ object vtable hierarchy.
6425 Reconstruct it for later use during GC. */
6426 case R_NDS32_RELA_GNU_VTINHERIT:
6427 case R_NDS32_GNU_VTINHERIT:
6428 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6429 return FALSE;
6430 break;
6431
6432 /* This relocation describes which C++ vtable entries are actually
6433 used. Record for later use during GC. */
6434 case R_NDS32_GNU_VTENTRY:
6435 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6436 return FALSE;
6437 break;
6438 case R_NDS32_RELA_GNU_VTENTRY:
6439 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6440 return FALSE;
6441 break;
6442 }
6443 }
6444
6445 return TRUE;
6446}
6447
6448/* Write VAL in uleb128 format to P, returning a pointer to the
6449 following byte.
6450 This code is copied from elf-attr.c. */
6451
6452static bfd_byte *
6453write_uleb128 (bfd_byte *p, unsigned int val)
6454{
6455 bfd_byte c;
6456 do
6457 {
6458 c = val & 0x7f;
6459 val >>= 7;
6460 if (val)
6461 c |= 0x80;
6462 *(p++) = c;
6463 }
6464 while (val);
6465 return p;
6466}
6467
6468static bfd_signed_vma
6469calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6470 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6471 int *pic_ext_target)
6472{
6473 bfd_signed_vma foff;
6474 bfd_vma symval, addend;
6475 asection *sym_sec;
6476
6477 /* Get the value of the symbol referred to by the reloc. */
6478 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6479 {
6480 Elf_Internal_Sym *isym;
6481
6482 /* A local symbol. */
6483 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6484
6485 if (isym->st_shndx == SHN_UNDEF)
6486 sym_sec = bfd_und_section_ptr;
6487 else if (isym->st_shndx == SHN_ABS)
6488 sym_sec = bfd_abs_section_ptr;
6489 else if (isym->st_shndx == SHN_COMMON)
6490 sym_sec = bfd_com_section_ptr;
6491 else
6492 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6493 symval = isym->st_value + sym_sec->output_section->vma
6494 + sym_sec->output_offset;
6495 }
6496 else
6497 {
6498 unsigned long indx;
6499 struct elf_link_hash_entry *h;
6500 bfd *owner;
6501
6502 /* An external symbol. */
6503 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6504 h = elf_sym_hashes (abfd)[indx];
6505 BFD_ASSERT (h != NULL);
6506
6507 if (h->root.type != bfd_link_hash_defined
6508 && h->root.type != bfd_link_hash_defweak)
6509 /* This appears to be a reference to an undefined
6510 symbol. Just ignore it--it will be caught by the
6511 regular reloc processing. */
6512 return 0;
6513 owner = h->root.u.def.section->owner;
6514 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6515 *pic_ext_target = 1;
6516
6517 if (h->root.u.def.section->flags & SEC_MERGE)
6518 {
6519 sym_sec = h->root.u.def.section;
6520 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6521 elf_section_data (sym_sec)->sec_info,
6522 h->root.u.def.value);
6523 symval = symval + sym_sec->output_section->vma
6524 + sym_sec->output_offset;
6525 }
6526 else
6527 symval = (h->root.u.def.value
6528 + h->root.u.def.section->output_section->vma
6529 + h->root.u.def.section->output_offset);
6530 }
6531
6532 addend = irel->r_addend;
6533
6534 foff = (symval + addend
6535 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6536 return foff;
6537}
6538
6539static bfd_vma
6540calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6541 Elf_Internal_Sym *isymbuf,
6542 Elf_Internal_Rela *irel,
6543 Elf_Internal_Shdr *symtab_hdr)
6544{
6545 bfd_vma symval;
6546
6547 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6548 {
6549 Elf_Internal_Sym *isym;
6550 asection *sym_sec;
6551 /* A local symbol. */
6552 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6553
6554 if (isym->st_shndx == SHN_UNDEF)
6555 sym_sec = bfd_und_section_ptr;
6556 else if (isym->st_shndx == SHN_ABS)
6557 sym_sec = bfd_abs_section_ptr;
6558 else if (isym->st_shndx == SHN_COMMON)
6559 sym_sec = bfd_com_section_ptr;
6560 else
6561 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6562 symval = isym->st_value + sym_sec->output_section->vma
6563 + sym_sec->output_offset;
6564 }
6565 else
6566 {
6567 unsigned long indx;
6568 struct elf_link_hash_entry *h;
6569 struct elf_nds32_link_hash_table *htab;
6570 asection *splt;
6571
6572 /* An external symbol. */
6573 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6574 h = elf_sym_hashes (abfd)[indx];
6575 BFD_ASSERT (h != NULL);
6576 htab = nds32_elf_hash_table (link_info);
ce558b89 6577 splt = htab->root.splt;
35c08157
KLC		 6578
6579 while (h->root.type == bfd_link_hash_indirect
6580 || h->root.type == bfd_link_hash_warning)
6581 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6582
6583 if (h->plt.offset == (bfd_vma) - 1)
6584 {
6585 if (h->root.type != bfd_link_hash_defined
6586 && h->root.type != bfd_link_hash_defweak)
6587 /* This appears to be a reference to an undefined
6588 * symbol. Just ignore it--it will be caught by the
6589 * regular reloc processing. */
6590 return 0;
6591 symval = (h->root.u.def.value
6592 + h->root.u.def.section->output_section->vma
6593 + h->root.u.def.section->output_offset);
6594 }
6595 else
6596 symval = splt->output_section->vma + h->plt.offset;
6597 }
6598
6599 return symval;
6600}
6601
6602static bfd_signed_vma
6603calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6604 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6605 Elf_Internal_Shdr *symtab_hdr)
6606{
6607 bfd_vma foff;
6608 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6609 symtab_hdr)) == 0)
6610 return 0;
6611 else
6612 return foff - (irel->r_offset
6613 + sec->output_section->vma + sec->output_offset);
6614}
6615\f
6616/* Convert a 32-bit instruction to 16-bit one.
6617 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6618 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6619 type of INSN16. Return 1 if successful. */
6620
6621static int
6622nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6623 int *pinsn_type)
6624{
6625 uint16_t insn16 = 0;
6cae483a 6626 int insn_type = 0;
35c08157
KLC		 6627 unsigned long mach = bfd_get_mach (abfd);
6628
6629 if (N32_SH5 (insn) != 0)
6630 return 0;
6631
6632 switch (N32_SUB5 (insn))
6633 {
6634 case N32_ALU1_ADD_SLLI:
6635 case N32_ALU1_ADD_SRLI:
6636 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6637 {
6638 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6639 N32_RB5 (insn));
6640 insn_type = NDS32_INSN_ADD333;
6641 }
6642 else if (N32_IS_RT4 (insn))
6643 {
6644 if (N32_RT5 (insn) == N32_RA5 (insn))
6645 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6646 else if (N32_RT5 (insn) == N32_RB5 (insn))
6647 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6648 insn_type = NDS32_INSN_ADD45;
6649 }
6650 break;
6651
6652 case N32_ALU1_SUB_SLLI:
6653 case N32_ALU1_SUB_SRLI:
6654 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6655 {
6656 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6657 N32_RB5 (insn));
6658 insn_type = NDS32_INSN_SUB333;
6659 }
6660 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6661 {
6662 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6663 insn_type = NDS32_INSN_SUB45;
6664 }
6665 break;
6666
6667 case N32_ALU1_AND_SLLI:
6668 case N32_ALU1_AND_SRLI:
6669 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6670 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6671 && N32_IS_RB3 (insn))
6672 {
6673 if (N32_RT5 (insn) == N32_RA5 (insn))
6674 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6675 else if (N32_RT5 (insn) == N32_RB5 (insn))
6676 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6677 if (insn16)
6678 insn_type = NDS32_INSN_AND33;
6679 }
6680 break;
6681
6682 case N32_ALU1_XOR_SLLI:
6683 case N32_ALU1_XOR_SRLI:
6684 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6685 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6686 && N32_IS_RB3 (insn))
6687 {
6688 if (N32_RT5 (insn) == N32_RA5 (insn))
6689 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6690 else if (N32_RT5 (insn) == N32_RB5 (insn))
6691 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6692 if (insn16)
6693 insn_type = NDS32_INSN_XOR33;
6694 }
6695 break;
6696
6697 case N32_ALU1_OR_SLLI:
6698 case N32_ALU1_OR_SRLI:
6699 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6700 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6701 && N32_IS_RB3 (insn))
6702 {
6703 if (N32_RT5 (insn) == N32_RA5 (insn))
6704 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6705 else if (N32_RT5 (insn) == N32_RB5 (insn))
6706 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6707 if (insn16)
6708 insn_type = NDS32_INSN_OR33;
6709 }
6710 break;
6711 case N32_ALU1_NOR:
6712 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6713 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6714 && N32_RA5 (insn) == N32_RB5 (insn))
6715 {
6716 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6717 insn_type = NDS32_INSN_NOT33;
6718 }
6719 break;
6720 case N32_ALU1_SRAI:
6721 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6722 {
6723 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6724 insn_type = NDS32_INSN_SRAI45;
6725 }
6726 break;
6727
6728 case N32_ALU1_SRLI:
6729 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6730 {
6731 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6732 insn_type = NDS32_INSN_SRLI45;
6733 }
6734 break;
6735
6736 case N32_ALU1_SLLI:
6737 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6738 {
6739 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6740 N32_UB5 (insn));
6741 insn_type = NDS32_INSN_SLLI333;
6742 }
6743 break;
6744
6745 case N32_ALU1_ZEH:
6746 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6747 {
6748 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6749 insn_type = NDS32_INSN_ZEH33;
6750 }
6751 break;
6752
6753 case N32_ALU1_SEB:
6754 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6755 {
6756 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6757 insn_type = NDS32_INSN_SEB33;
6758 }
6759 break;
6760
6761 case N32_ALU1_SEH:
6762 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6763 {
6764 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6765 insn_type = NDS32_INSN_SEH33;
6766 }
6767 break;
6768
6769 case N32_ALU1_SLT:
6770 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6771 {
6772 /* Implicit r15. */
6773 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6774 insn_type = NDS32_INSN_SLT45;
6775 }
6776 break;
6777
6778 case N32_ALU1_SLTS:
6779 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6780 {
6781 /* Implicit r15. */
6782 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6783 insn_type = NDS32_INSN_SLTS45;
6784 }
6785 break;
6786 }
6787
6788 if ((insn16 & 0x8000) == 0)
6789 return 0;
6790
6791 if (pinsn16)
6792 *pinsn16 = insn16;
6793 if (pinsn_type)
6794 *pinsn_type = insn_type;
6795 return 1;
6796}
6797
6798static int
6799nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6800 int *pinsn_type)
6801{
6802 uint16_t insn16 = 0;
6803 int insn_type;
6804 unsigned long mach = bfd_get_mach (abfd);
6805
6806 /* TODO: bset, bclr, btgl, btst. */
6807 if (__GF (insn, 6, 4) != 0)
6808 return 0;
6809
6810 switch (N32_IMMU (insn, 6))
6811 {
6812 case N32_ALU2_MUL:
6813 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6814 && N32_IS_RB3 (insn))
6815 {
6816 if (N32_RT5 (insn) == N32_RA5 (insn))
6817 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6818 else if (N32_RT5 (insn) == N32_RB5 (insn))
6819 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6820 if (insn16)
6821 insn_type = NDS32_INSN_MUL33;
6822 }
6823 }
6824
6825 if ((insn16 & 0x8000) == 0)
6826 return 0;
6827
6828 if (pinsn16)
6829 *pinsn16 = insn16;
6830 if (pinsn_type)
6831 *pinsn_type = insn_type;
6832 return 1;
6833}
6834
6835int
6836nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6837 int *pinsn_type)
6838{
6839 int op6;
6840 uint16_t insn16 = 0;
6841 int insn_type;
6842 unsigned long mach = bfd_get_mach (abfd);
6843
6844 /* Decode 32-bit instruction. */
6845 if (insn & 0x80000000)
6846 {
6847 /* Not 32-bit insn. */
6848 return 0;
6849 }
6850
6851 op6 = N32_OP6 (insn);
6852
6853 /* Convert it to 16-bit instruction. */
6854 switch (op6)
6855 {
6856 case N32_OP6_MOVI:
6857 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6858 {
6859 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6860 insn_type = NDS32_INSN_MOVI55;
6861 }
6862 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6863 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6864 {
6865 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6866 N32_IMM20S (insn) - 16);
6867 insn_type = NDS32_INSN_MOVPI45;
6868 }
6869 break;
6870
6871 case N32_OP6_ADDI:
6872 if (N32_IMM15S (insn) == 0)
6873 {
6874 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6875 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6876 if (mach <= MACH_V2
6877 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6878 {
6879 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6880 insn_type = NDS32_INSN_MOV55;
6881 }
6882 }
6883 else if (N32_IMM15S (insn) > 0)
6884 {
6885 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6886 {
6887 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6888 N32_IMM15S (insn));
6889 insn_type = NDS32_INSN_ADDI333;
6890 }
6891 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6892 && N32_IMM15S (insn) < 32)
6893 {
6894 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6895 insn_type = NDS32_INSN_ADDI45;
6896 }
6897 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6898 && N32_RT5 (insn) == N32_RA5 (insn)
6899 && N32_IMM15S (insn) < 512)
6900 {
6901 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6902 insn_type = NDS32_INSN_ADDI10_SP;
6903 }
6904 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6905 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6906 && (N32_IMM15S (insn) % 4 == 0))
6907 {
6908 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6909 N32_IMM15S (insn) >> 2);
6910 insn_type = NDS32_INSN_ADDRI36_SP;
6911 }
6912 }
6913 else
6914 {
6915 /* Less than 0. */
6916 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6917 {
6918 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6919 0 - N32_IMM15S (insn));
6920 insn_type = NDS32_INSN_SUBI333;
6921 }
6922 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6923 && N32_IMM15S (insn) > -32)
6924 {
1c8f6a4d
KLC		 6925 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6926 0 - N32_IMM15S (insn));
35c08157
KLC		 6927 insn_type = NDS32_INSN_SUBI45;
6928 }
6929 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6930 && N32_RT5 (insn) == N32_RA5 (insn)
6931 && N32_IMM15S (insn) >= -512)
6932 {
6933 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6934 insn_type = NDS32_INSN_ADDI10_SP;
6935 }
6936 }
6937 break;
6938
6939 case N32_OP6_ORI:
6940 if (N32_IMM15S (insn) == 0)
6941 {
6942 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6943 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6944 if (mach <= MACH_V2
6945 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6946 {
6947 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6948 insn_type = NDS32_INSN_MOV55;
6949 }
6950 }
6951 break;
6952
6953 case N32_OP6_SUBRI:
6954 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6955 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6956 {
6957 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6958 insn_type = NDS32_INSN_NEG33;
6959 }
6960 break;
6961
6962 case N32_OP6_ANDI:
6963 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6964 {
6965 if (N32_IMM15U (insn) == 1)
6966 {
6967 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6968 insn_type = NDS32_INSN_XLSB33;
6969 }
6970 else if (N32_IMM15U (insn) == 0x7ff)
6971 {
6972 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6973 insn_type = NDS32_INSN_X11B33;
6974 }
6975 else if (N32_IMM15U (insn) == 0xff)
6976 {
6977 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6978 insn_type = NDS32_INSN_ZEB33;
6979 }
6980 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6981 && N32_IMM15U (insn) < 256)
6982 {
6983 int imm15u = N32_IMM15U (insn);
6984
6985 if (__builtin_popcount (imm15u) == 1)
6986 {
6987 /* BMSKI33 */
6988 int imm3u = __builtin_ctz (imm15u);
6989
6990 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6991 insn_type = NDS32_INSN_BMSKI33;
6992 }
6993 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6994 {
6995 /* FEXTI33 */
6996 int imm3u = __builtin_ctz (imm15u + 1) - 1;
6997
6998 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6999 insn_type = NDS32_INSN_FEXTI33;
7000 }
7001 }
7002 }
7003 break;
7004
7005 case N32_OP6_SLTI:
7006 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7007 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7008 {
7009 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7010 insn_type = NDS32_INSN_SLTI45;
7011 }
7012 break;
7013
7014 case N32_OP6_SLTSI:
7015 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7016 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7017 {
7018 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7019 insn_type = NDS32_INSN_SLTSI45;
7020 }
7021 break;
7022
7023 case N32_OP6_LWI:
7024 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7025 {
7026 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7027 insn_type = NDS32_INSN_LWI450;
7028 }
7029 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7030 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7031 {
7032 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7033 N32_IMM15S (insn));
7034 insn_type = NDS32_INSN_LWI333;
7035 }
7036 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7037 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7038 {
7039 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7040 insn_type = NDS32_INSN_LWI37;
7041 }
7042 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7043 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7044 {
7045 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7046 insn_type = NDS32_INSN_LWI37_SP;
7047 }
7048 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7049 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7050 {
1c8f6a4d
KLC		 7051 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7052 N32_IMM15S (insn) + 32);
35c08157
KLC		 7053 insn_type = NDS32_INSN_LWI45_FE;
7054 }
7055 break;
7056
7057 case N32_OP6_SWI:
7058 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7059 {
7060 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7061 insn_type = NDS32_INSN_SWI450;
7062 }
7063 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7064 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7065 {
1c8f6a4d
KLC		 7066 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7067 N32_IMM15S (insn));
35c08157
KLC		 7068 insn_type = NDS32_INSN_SWI333;
7069 }
7070 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7071 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7072 {
7073 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7074 insn_type = NDS32_INSN_SWI37;
7075 }
7076 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7077 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7078 {
7079 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7080 insn_type = NDS32_INSN_SWI37_SP;
7081 }
7082 break;
7083
7084 case N32_OP6_LWI_BI:
7085 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7086 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7087 {
7088 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7089 N32_IMM15S (insn));
7090 insn_type = NDS32_INSN_LWI333_BI;
7091 }
7092 break;
7093
7094 case N32_OP6_SWI_BI:
7095 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7096 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7097 {
7098 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7099 N32_IMM15S (insn));
7100 insn_type = NDS32_INSN_SWI333_BI;
7101 }
7102 break;
7103
7104 case N32_OP6_LHI:
7105 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7106 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7107 {
7108 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7109 N32_IMM15S (insn));
7110 insn_type = NDS32_INSN_LHI333;
7111 }
7112 break;
7113
7114 case N32_OP6_SHI:
7115 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7116 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7117 {
7118 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7119 N32_IMM15S (insn));
7120 insn_type = NDS32_INSN_SHI333;
7121 }
7122 break;
7123
7124 case N32_OP6_LBI:
7125 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7126 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7127 {
7128 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7129 N32_IMM15S (insn));
7130 insn_type = NDS32_INSN_LBI333;
7131 }
7132 break;
7133
7134 case N32_OP6_SBI:
7135 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7136 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7137 {
7138 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7139 N32_IMM15S (insn));
7140 insn_type = NDS32_INSN_SBI333;
7141 }
7142 break;
7143
7144 case N32_OP6_ALU1:
7145 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7146
7147 case N32_OP6_ALU2:
7148 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7149
7150 case N32_OP6_BR1:
7151 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7152 goto done;
7153
4ec521f2 7154 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 7155 {
7156 /* N32_BR1_BEQ */
7157 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7158 && N32_RT5 (insn) != REG_R5)
7159 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7160 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7161 && N32_RA5 (insn) != REG_R5)
7162 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7163 insn_type = NDS32_INSN_BEQS38;
7164 break;
7165 }
7166 else
7167 {
7168 /* N32_BR1_BNE */
7169 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7170 && N32_RT5 (insn) != REG_R5)
7171 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7172 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7173 && N32_RA5 (insn) != REG_R5)
7174 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7175 insn_type = NDS32_INSN_BNES38;
7176 break;
7177 }
7178 break;
7179
7180 case N32_OP6_BR2:
7181 switch (N32_BR2_SUB (insn))
7182 {
7183 case N32_BR2_BEQZ:
7184 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7185 {
7186 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7187 insn_type = NDS32_INSN_BEQZ38;
7188 }
1c8f6a4d
KLC		 7189 else if (N32_RT5 (insn) == REG_R15
7190 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7191 {
7192 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7193 insn_type = NDS32_INSN_BEQZS8;
7194 }
7195 break;
7196
7197 case N32_BR2_BNEZ:
7198 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7199 {
7200 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7201 insn_type = NDS32_INSN_BNEZ38;
7202 }
1c8f6a4d
KLC		 7203 else if (N32_RT5 (insn) == REG_R15
7204 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 7205 {
7206 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7207 insn_type = NDS32_INSN_BNEZS8;
7208 }
7209 break;
7210
7211 case N32_BR2_IFCALL:
7212 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7213 {
7214 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7215 insn_type = NDS32_INSN_IFCALL9;
7216 }
7217 break;
7218 }
7219 break;
7220
7221 case N32_OP6_JI:
4ec521f2 7222 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 7223 {
7224 /* N32_JI_J */
7225 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7226 {
7227 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7228 insn_type = NDS32_INSN_J8;
7229 }
7230 }
7231 break;
7232
7233 case N32_OP6_JREG:
7234 if (__GF (insn, 8, 2) != 0)
7235 goto done;
7236
7237 switch (N32_IMMU (insn, 5))
7238 {
7239 case N32_JREG_JR:
7240 if (N32_JREG_HINT (insn) == 0)
7241 {
7242 /* jr */
7243 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7244 insn_type = NDS32_INSN_JR5;
7245 }
7246 else if (N32_JREG_HINT (insn) == 1)
7247 {
7248 /* ret */
7249 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7250 insn_type = NDS32_INSN_RET5;
7251 }
7252 else if (N32_JREG_HINT (insn) == 3)
7253 {
7254 /* ifret = mov55 $sp, $sp */
7255 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7256 insn_type = NDS32_INSN_IFRET;
7257 }
7258 break;
7259
7260 case N32_JREG_JRAL:
7261 /* It's convertible when return rt5 is $lp and address
7262 translation is kept. */
7263 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7264 {
7265 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7266 insn_type = NDS32_INSN_JRAL5;
7267 }
7268 break;
7269 }
7270 break;
7271
7272 case N32_OP6_MISC:
7273 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7274 {
7275 /* For v3, swid above 31 are used for ex9.it. */
7276 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7277 insn_type = NDS32_INSN_BREAK16;
7278 }
7279 break;
7280
7281 default:
7282 /* This instruction has no 16-bit variant. */
7283 goto done;
7284 }
7285
7286done:
7287 /* Bit-15 of insn16 should be set for a valid instruction. */
7288 if ((insn16 & 0x8000) == 0)
7289 return 0;
7290
7291 if (pinsn16)
7292 *pinsn16 = insn16;
7293 if (pinsn_type)
7294 *pinsn_type = insn_type;
7295 return 1;
7296}
7297
7298static int
7299special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7300 Elf_Internal_Rela *reloc)
7301{
7302 uint16_t insn16 = 0;
7303
7304 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7305 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7306 return 0;
7307
7308 if (!N32_IS_RT3 (insn))
7309 return 0;
7310
7311 switch (N32_OP6 (insn))
7312 {
7313 case N32_OP6_LWI:
7314 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7315 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7316 break;
7317 case N32_OP6_SWI:
7318 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7319 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7320 break;
7321 case N32_OP6_HWGP:
7322 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7323 break;
7324
7325 if (__GF (insn, 17, 3) == 6)
7326 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7327 else if (__GF (insn, 17, 3) == 7)
7328 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7329 break;
7330 }
7331
7332 if ((insn16 & 0x8000) == 0)
7333 return 0;
7334
7335 *pinsn16 = insn16;
7336 return 1;
7337}
7338
7339/* Convert a 16-bit instruction to 32-bit one.
7340 INSN16 it the input and PINSN it the point to output.
7341 Return non-zero on successful. Otherwise 0 is returned. */
7342
7343int
7344nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7345{
7346 uint32_t insn = 0xffffffff;
7347 unsigned long mach = bfd_get_mach (abfd);
7348
7349 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7350
7351 switch (__GF (insn16, 9, 6))
7352 {
7353 case 0x4: /* add45 */
1c8f6a4d
KLC		 7354 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7355 N16_RA5 (insn16));
35c08157
KLC		 7356 goto done;
7357 case 0x5: /* sub45 */
1c8f6a4d
KLC		 7358 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7359 N16_RA5 (insn16));
35c08157
KLC		 7360 goto done;
7361 case 0x6: /* addi45 */
1c8f6a4d
KLC		 7362 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7363 N16_IMM5U (insn16));
35c08157
KLC		 7364 goto done;
7365 case 0x7: /* subi45 */
1c8f6a4d
KLC		 7366 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7367 -N16_IMM5U (insn16));
35c08157
KLC		 7368 goto done;
7369 case 0x8: /* srai45 */
1c8f6a4d
KLC		 7370 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7371 N16_IMM5U (insn16));
35c08157
KLC		 7372 goto done;
7373 case 0x9: /* srli45 */
1c8f6a4d
KLC		 7374 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7375 N16_IMM5U (insn16));
35c08157 7376 goto done;
35c08157 7377 case 0xa: /* slli333 */
1c8f6a4d
KLC		 7378 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7379 N16_IMM3U (insn16));
35c08157
KLC		 7380 goto done;
7381 case 0xc: /* add333 */
1c8f6a4d
KLC		 7382 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7383 N16_RB3 (insn16));
35c08157
KLC		 7384 goto done;
7385 case 0xd: /* sub333 */
1c8f6a4d
KLC		 7386 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7387 N16_RB3 (insn16));
35c08157
KLC		 7388 goto done;
7389 case 0xe: /* addi333 */
1c8f6a4d
KLC		 7390 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7391 N16_IMM3U (insn16));
35c08157
KLC		 7392 goto done;
7393 case 0xf: /* subi333 */
1c8f6a4d
KLC		 7394 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7395 -N16_IMM3U (insn16));
35c08157 7396 goto done;
35c08157 7397 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 7398 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7399 N16_IMM3U (insn16));
35c08157
KLC		 7400 goto done;
7401 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 7402 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7403 N16_IMM3U (insn16));
35c08157
KLC		 7404 goto done;
7405 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 7406 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7407 N16_IMM3U (insn16));
35c08157
KLC		 7408 goto done;
7409 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 7410 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7411 N16_IMM3U (insn16));
35c08157
KLC		 7412 goto done;
7413 case 0x14: /* swi333 */
1c8f6a4d
KLC		 7414 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7415 N16_IMM3U (insn16));
35c08157
KLC		 7416 goto done;
7417 case 0x16: /* shi333 */
1c8f6a4d
KLC		 7418 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7419 N16_IMM3U (insn16));
35c08157
KLC		 7420 goto done;
7421 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 7422 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7423 N16_IMM3U (insn16));
35c08157
KLC		 7424 goto done;
7425 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 7426 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7427 N16_IMM3U (insn16));
35c08157 7428 goto done;
35c08157 7429 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 7430 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7431 N16_IMM6U (insn16) << 2);
35c08157 7432 goto done;
35c08157 7433 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 7434 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7435 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 7436 goto done;
7437 case 0x1a: /* lwi450 */
7438 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7439 goto done;
7440 case 0x1b: /* swi450 */
7441 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7442 goto done;
7443
1c8f6a4d 7444 /* These are r15 implied instructions. */
35c08157
KLC		 7445 case 0x30: /* slts45 */
7446 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7447 goto done;
7448 case 0x31: /* slt45 */
7449 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7450 goto done;
7451 case 0x32: /* sltsi45 */
7452 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7453 goto done;
7454 case 0x33: /* slti45 */
7455 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7456 goto done;
7457 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 7458 if (insn16 & N32_BIT (8))
35c08157
KLC		 7459 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7460 else
7461 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7462 goto done;
7463
7464 case 0x35: /* break16, ex9.it */
7465 /* Only consider range of v3 break16. */
7466 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7467 goto done;
7468
7469 case 0x3c: /* ifcall9 */
7470 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7471 goto done;
7472 case 0x3d: /* movpi45 */
7473 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7474 goto done;
7475
7476 case 0x3f: /* MISC33 */
1c8f6a4d 7477 switch (insn16 & 0x7)
35c08157
KLC		 7478 {
7479 case 2: /* neg33 */
7480 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7481 break;
7482 case 3: /* not33 */
1c8f6a4d
KLC		 7483 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7484 N16_RA3 (insn16));
35c08157
KLC		 7485 break;
7486 case 4: /* mul33 */
1c8f6a4d
KLC		 7487 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7488 N16_RA3 (insn16));
35c08157
KLC		 7489 break;
7490 case 5: /* xor33 */
1c8f6a4d
KLC		 7491 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7492 N16_RA3 (insn16));
35c08157
KLC		 7493 break;
7494 case 6: /* and33 */
1c8f6a4d
KLC		 7495 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7496 N16_RA3 (insn16));
35c08157
KLC		 7497 break;
7498 case 7: /* or33 */
1c8f6a4d
KLC		 7499 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7500 N16_RA3 (insn16));
35c08157
KLC		 7501 break;
7502 }
7503 goto done;
7504
1c8f6a4d 7505 case 0xb:
35c08157
KLC		 7506 switch (insn16 & 0x7)
7507 {
7508 case 0: /* zeb33 */
7509 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7510 break;
7511 case 1: /* zeh33 */
7512 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7513 break;
7514 case 2: /* seb33 */
7515 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7516 break;
7517 case 3: /* seh33 */
7518 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7519 break;
7520 case 4: /* xlsb33 */
7521 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7522 break;
7523 case 5: /* x11b33 */
7524 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7525 break;
7526 case 6: /* bmski33 */
7527 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7528 1 << __GF (insn16, 3, 3));
35c08157
KLC		 7529 break;
7530 case 7: /* fexti33 */
7531 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7532 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 7533 break;
7534 }
7535 goto done;
7536 }
7537
7538 switch (__GF (insn16, 10, 5))
7539 {
7540 case 0x0: /* mov55 or ifret16 */
7541 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7542 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7543 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7544 else
1c8f6a4d 7545 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 7546 goto done;
7547 case 0x1: /* movi55 */
7548 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7549 goto done;
7550 case 0x1b: /* addi10s (V2) */
7551 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7552 goto done;
7553 }
7554
7555 switch (__GF (insn16, 11, 4))
7556 {
7557 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 7558 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 7559 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7560 else /* lwi37.fp */
7561 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7562 goto done;
7563 case 0x8: /* beqz38 */
7564 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7565 goto done;
7566 case 0x9: /* bnez38 */
7567 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7568 goto done;
7569 case 0xa: /* beqs38/j8, implied r5 */
7570 if (N16_RT38 (insn16) == 5)
7571 insn = N32_JI (J, N16_IMM8S (insn16));
7572 else
7573 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7574 goto done;
7575 case 0xb: /* bnes38 and others */
7576 if (N16_RT38 (insn16) == 5)
7577 {
7578 switch (__GF (insn16, 5, 3))
7579 {
7580 case 0: /* jr5 */
7581 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7582 break;
7583 case 4: /* ret5 */
7584 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7585 break;
7586 case 1: /* jral5 */
7587 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7588 break;
7589 case 2: /* ex9.it imm5 */
7590 /* ex9.it had no 32-bit variantl. */
7591 break;
7592 case 5: /* add5.pc */
7593 /* add5.pc had no 32-bit variantl. */
7594 break;
7595 }
7596 }
7597 else /* bnes38 */
7598 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7599 goto done;
7600 case 0xe: /* lwi37/swi37 */
7601 if (insn16 & (1 << 7)) /* swi37.sp */
7602 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7603 else /* lwi37.sp */
7604 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7605 goto done;
7606 }
7607
7608done:
7609 if (insn & 0x80000000)
7610 return 0;
7611
7612 if (pinsn)
7613 *pinsn = insn;
7614 return 1;
7615}
7616\f
7617static bfd_boolean
7618is_sda_access_insn (unsigned long insn)
7619{
7620 switch (N32_OP6 (insn))
7621 {
7622 case N32_OP6_LWI:
7623 case N32_OP6_LHI:
7624 case N32_OP6_LHSI:
7625 case N32_OP6_LBI:
7626 case N32_OP6_LBSI:
7627 case N32_OP6_SWI:
7628 case N32_OP6_SHI:
7629 case N32_OP6_SBI:
7630 case N32_OP6_LWC:
7631 case N32_OP6_LDC:
7632 case N32_OP6_SWC:
7633 case N32_OP6_SDC:
7634 return TRUE;
7635 default:
7636 ;
7637 }
7638 return FALSE;
7639}
7640
7641static unsigned long
7642turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7643{
7644 uint32_t oinsn = 0;
7645
7646 switch (type)
7647 {
7648 case R_NDS32_GOT_LO12:
7649 case R_NDS32_GOTOFF_LO12:
7650 case R_NDS32_PLTREL_LO12:
7651 case R_NDS32_PLT_GOTREL_LO12:
7652 case R_NDS32_LO12S0_RELA:
7653 switch (N32_OP6 (insn))
7654 {
7655 case N32_OP6_LBI:
7656 /* lbi.gp */
7657 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7658 break;
7659 case N32_OP6_LBSI:
7660 /* lbsi.gp */
4ec521f2 7661 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7662 break;
7663 case N32_OP6_SBI:
7664 /* sbi.gp */
7665 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7666 break;
7667 case N32_OP6_ORI:
7668 /* addi.gp */
4ec521f2 7669 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7670 break;
7671 }
7672 break;
7673
7674 case R_NDS32_LO12S1_RELA:
7675 switch (N32_OP6 (insn))
7676 {
7677 case N32_OP6_LHI:
7678 /* lhi.gp */
7679 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7680 break;
7681 case N32_OP6_LHSI:
7682 /* lhsi.gp */
4ec521f2 7683 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 7684 break;
7685 case N32_OP6_SHI:
7686 /* shi.gp */
4ec521f2 7687 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 7688 break;
7689 }
7690 break;
7691
7692 case R_NDS32_LO12S2_RELA:
7693 switch (N32_OP6 (insn))
7694 {
7695 case N32_OP6_LWI:
7696 /* lwi.gp */
7697 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7698 break;
7699 case N32_OP6_SWI:
7700 /* swi.gp */
7701 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7702 break;
7703 }
7704 break;
7705
7706 case R_NDS32_LO12S2_DP_RELA:
7707 case R_NDS32_LO12S2_SP_RELA:
7708 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7709 break;
7710 }
7711
7712 if (oinsn)
7713 *pinsn = oinsn;
7714
7715 return oinsn != 0;
7716}
7717
7718/* Linker hasn't found the correct merge section for non-section symbol
7719 in relax time, this work is left to the function elf_link_input_bfd().
7720 So for non-section symbol, _bfd_merged_section_offset is also needed
7721 to find the correct symbol address. */
7722
7723static bfd_vma
7724nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7725 asection **psec, Elf_Internal_Rela *rel)
7726{
7727 asection *sec = *psec;
7728 bfd_vma relocation;
7729
7730 relocation = (sec->output_section->vma
7731 + sec->output_offset + sym->st_value);
7732 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7733 {
7734 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7735 rel->r_addend =
7736 _bfd_merged_section_offset (abfd, psec,
7737 elf_section_data (sec)->sec_info,
7738 sym->st_value + rel->r_addend);
7739 else
7740 rel->r_addend =
7741 _bfd_merged_section_offset (abfd, psec,
7742 elf_section_data (sec)->sec_info,
7743 sym->st_value) + rel->r_addend;
7744
7745 if (sec != *psec)
7746 {
7747 /* If we have changed the section, and our original section is
7748 marked with SEC_EXCLUDE, it means that the original
7749 SEC_MERGE section has been completely subsumed in some
7750 other SEC_MERGE section. In this case, we need to leave
7751 some info around for --emit-relocs. */
7752 if ((sec->flags & SEC_EXCLUDE) != 0)
7753 sec->kept_section = *psec;
7754 sec = *psec;
7755 }
7756 rel->r_addend -= relocation;
7757 rel->r_addend += sec->output_section->vma + sec->output_offset;
7758 }
7759 return relocation;
7760}
7761
7762static bfd_vma
7763calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7764 Elf_Internal_Sym *isymbuf,
7765 Elf_Internal_Shdr *symtab_hdr)
7766{
7767 bfd_signed_vma foff;
7768 bfd_vma symval, addend;
7769 Elf_Internal_Rela irel_fn;
7770 Elf_Internal_Sym *isym;
7771 asection *sym_sec;
7772
7773 /* Get the value of the symbol referred to by the reloc. */
7774 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7775 {
7776 /* A local symbol. */
7777 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7778
7779 if (isym->st_shndx == SHN_UNDEF)
7780 sym_sec = bfd_und_section_ptr;
7781 else if (isym->st_shndx == SHN_ABS)
7782 sym_sec = bfd_abs_section_ptr;
7783 else if (isym->st_shndx == SHN_COMMON)
7784 sym_sec = bfd_com_section_ptr;
7785 else
7786 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7787 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7788 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7789 addend = irel_fn.r_addend;
7790 }
7791 else
7792 {
7793 unsigned long indx;
7794 struct elf_link_hash_entry *h;
7795
7796 /* An external symbol. */
7797 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7798 h = elf_sym_hashes (abfd)[indx];
7799 BFD_ASSERT (h != NULL);
7800
7801 while (h->root.type == bfd_link_hash_indirect
7802 || h->root.type == bfd_link_hash_warning)
7803 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7804
7805 if (h->root.type != bfd_link_hash_defined
7806 && h->root.type != bfd_link_hash_defweak)
7807 /* This appears to be a reference to an undefined
7808 symbol. Just ignore it--it will be caught by the
7809 regular reloc processing. */
7810 return 0;
7811
7812 if (h->root.u.def.section->flags & SEC_MERGE)
7813 {
7814 sym_sec = h->root.u.def.section;
7815 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7816 (sym_sec)->sec_info, h->root.u.def.value);
7817 symval = symval + sym_sec->output_section->vma
7818 + sym_sec->output_offset;
7819 }
7820 else
7821 symval = (h->root.u.def.value
7822 + h->root.u.def.section->output_section->vma
7823 + h->root.u.def.section->output_offset);
7824 addend = irel->r_addend;
7825 }
7826
7827 foff = symval + addend;
7828
7829 return foff;
7830}
7831
7832static bfd_vma
7833calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7834 Elf_Internal_Rela *irel,
7835 Elf_Internal_Shdr *symtab_hdr)
7836{
7837 int symndx;
7838 bfd_vma *local_got_offsets;
7839 /* Get the value of the symbol referred to by the reloc. */
7840 struct elf_link_hash_entry *h;
7841 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7842
7843 /* An external symbol. */
7844 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7845 h = elf_sym_hashes (abfd)[symndx];
7846 while (h->root.type == bfd_link_hash_indirect
7847 || h->root.type == bfd_link_hash_warning)
7848 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7849
7850 if (symndx >= 0)
7851 {
7852 BFD_ASSERT (h != NULL);
ce558b89
AM		 7853 return (htab->root.sgot->output_section->vma
7854 + htab->root.sgot->output_offset
7855 + h->got.offset);
35c08157
KLC		 7856 }
7857 else
7858 {
7859 local_got_offsets = elf_local_got_offsets (abfd);
7860 BFD_ASSERT (local_got_offsets != NULL);
ce558b89
AM		 7861 return (htab->root.sgot->output_section->vma
7862 + htab->root.sgot->output_offset
7863 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
35c08157
KLC		 7864 }
7865
7866 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7867 /* The check of h->root.type is passed. */
7868}
7869
7870static int
7871is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7872 asection *sec, Elf_Internal_Rela *rel)
7873{
7874 bfd_byte *contents;
7875 unsigned short insn16;
7876
7877 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7878 return FALSE;
7879 contents = elf_section_data (sec)->this_hdr.contents;
7880 insn16 = bfd_getb16 (contents + rel->r_offset);
7881 if (insn16 == NDS32_NOP16)
7882 return TRUE;
7883 return FALSE;
7884}
7885
7886/* It checks whether the instruction could be converted to
7887 16-bit form and returns the converted one.
7888
7889 `internal_relocs' is supposed to be sorted. */
7890
7891static int
7892is_convert_32_to_16 (bfd *abfd, asection *sec,
7893 Elf_Internal_Rela *reloc,
7894 Elf_Internal_Rela *internal_relocs,
7895 Elf_Internal_Rela *irelend,
7896 uint16_t *insn16)
7897{
7898#define NORMAL_32_TO_16 (1 << 0)
7899#define SPECIAL_32_TO_16 (1 << 1)
7900 bfd_byte *contents = NULL;
7901 bfd_signed_vma off;
7902 bfd_vma mem_addr;
7903 uint32_t insn = 0;
7904 Elf_Internal_Rela *pc_rel;
7905 int pic_ext_target = 0;
7906 Elf_Internal_Shdr *symtab_hdr;
7907 Elf_Internal_Sym *isymbuf = NULL;
7908 int convert_type;
7909 bfd_vma offset;
7910
7911 if (reloc->r_offset + 4 > sec->size)
7912 return FALSE;
7913
7914 offset = reloc->r_offset;
7915
0c4bd9d9 7916 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 7917 return FALSE;
7918 insn = bfd_getb32 (contents + offset);
7919
7920 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7921 convert_type = NORMAL_32_TO_16;
7922 else if (special_convert_32_to_16 (insn, insn16, reloc))
7923 convert_type = SPECIAL_32_TO_16;
7924 else
7925 return FALSE;
7926
7927 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7928 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7929 return FALSE;
7930
7931 /* Find the first relocation of the same relocation-type,
7932 so we iteratie them forward. */
7933 pc_rel = reloc;
1c8f6a4d 7934 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 7935 pc_rel--;
7936
7937 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7938 {
7939 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7940 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7941 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7942 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7943 {
7944 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7945 &pic_ext_target);
1c8f6a4d
KLC		 7946 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7947 || off == 0)
35c08157
KLC		 7948 return FALSE;
7949 break;
7950 }
7951 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7952 {
7953 /* movi => movi55 */
1c8f6a4d
KLC		 7954 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7955 symtab_hdr);
7956 /* mem_addr is unsigned, but the value should
7957 be between [-16, 15]. */
35c08157
KLC		 7958 if ((mem_addr + 0x10) >> 5)
7959 return FALSE;
7960 break;
7961 }
1c8f6a4d
KLC		 7962 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7963 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7964 {
7965 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7966 because it can be relaxed to addi for TLS_LE_ADD. */
7967 return FALSE;
7968 }
35c08157
KLC		 7969 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7970 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7971 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7972 && convert_type == SPECIAL_32_TO_16)
7973 {
7974 /* fp-as-gp
7975 We've selected a best fp-base for this access, so we can
7976 always resolve it anyway. Do nothing. */
7977 break;
7978 }
7979 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7980 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7981 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7982 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7983 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7984 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7985 {
1c8f6a4d
KLC		 7986 /* Prevent unresolved addi instruction translate
7987 to addi45 or addi333. */
35c08157
KLC		 7988 return FALSE;
7989 }
1c8f6a4d
KLC		 7990 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
7991 {
7992 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7993 &pic_ext_target);
7994 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
7995 return FALSE;
7996 break;
7997 }
35c08157
KLC		 7998 }
7999
8000 return TRUE;
8001}
8002
8003static void
8004nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8005 Elf_Internal_Rela *reloc,
8006 Elf_Internal_Rela *internal_relocs,
8007 Elf_Internal_Rela *irelend,
8008 unsigned short insn16)
8009{
8010 Elf_Internal_Rela *pc_rel;
8011 bfd_vma offset;
8012
8013 offset = reloc->r_offset;
8014 bfd_putb16 (insn16, contents + offset);
8015 /* Find the first relocation of the same relocation-type,
8016 so we iteratie them forward. */
8017 pc_rel = reloc;
8018 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8019 pc_rel--;
8020
8021 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8022 {
8023 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8024 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8025 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8026 {
8027 pc_rel->r_info =
8028 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8029 }
8030 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8031 pc_rel->r_info =
8032 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8033 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8034 pc_rel->r_info =
8035 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8036 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8037 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8038 pc_rel->r_info =
8039 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8040 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8041 pc_rel->r_info =
8042 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8043 }
8044}
8045
8046/* Find a relocation of type specified by `reloc_type'
8047 of the same r_offset with reloc.
8048 If not found, return irelend.
8049
8050 Assuming relocations are sorted by r_offset,
8051 we find the relocation from `reloc' backward untill relocs,
8052 or find it from `reloc' forward untill irelend. */
8053
8054static Elf_Internal_Rela *
8055find_relocs_at_address (Elf_Internal_Rela *reloc,
8056 Elf_Internal_Rela *relocs,
8057 Elf_Internal_Rela *irelend,
8058 enum elf_nds32_reloc_type reloc_type)
8059{
8060 Elf_Internal_Rela *rel_t;
8061
8062 /* Find backward. */
8063 for (rel_t = reloc;
8064 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8065 rel_t--)
8066 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8067 return rel_t;
8068
1c8f6a4d 8069 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8070 for (rel_t = reloc;
8071 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8072 rel_t++)
8073 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8074 return rel_t;
8075
8076 return irelend;
8077}
8078
8079/* Find a relocation of specified type and offset.
8080 `reloc' is just a refence point to find a relocation at specified offset.
8081 If not found, return irelend.
8082
8083 Assuming relocations are sorted by r_offset,
8084 we find the relocation from `reloc' backward untill relocs,
8085 or find it from `reloc' forward untill irelend. */
8086
8087static Elf_Internal_Rela *
8088find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8089 Elf_Internal_Rela *relocs,
8090 Elf_Internal_Rela *irelend,
6cae483a 8091 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8092 bfd_vma offset_p)
8093{
8094 Elf_Internal_Rela *rel_t = NULL;
8095
8096 /* First, we try to find a relocation of offset `offset_p',
8097 and then we use find_relocs_at_address to find specific type. */
8098
8099 if (reloc->r_offset > offset_p)
8100 {
8101 /* Find backward. */
8102 for (rel_t = reloc;
8103 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8104 /* Do nothing. */;
8105 }
8106 else if (reloc->r_offset < offset_p)
8107 {
8108 /* Find forward. */
8109 for (rel_t = reloc;
8110 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8111 /* Do nothing. */;
8112 }
8113 else
8114 rel_t = reloc;
8115
8116 /* Not found? */
8117 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8118 return irelend;
8119
8120 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8121}
8122
8123static bfd_boolean
8124nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8125 Elf_Internal_Rela *internal_relocs,
8126 Elf_Internal_Rela *irelend,
8127 unsigned char reloc_type)
8128{
8129 Elf_Internal_Rela *rel_t;
8130
8131 for (rel_t = reloc;
8132 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8133 rel_t--)
8134 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8135 {
8136 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8137 && rel_t->r_addend == reloc->r_addend)
8138 continue;
8139 return TRUE;
8140 }
8141
8142 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8143 rel_t++)
8144 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8145 {
8146 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8147 && rel_t->r_addend == reloc->r_addend)
8148 continue;
8149 return TRUE;
8150 }
8151
8152 return FALSE;
8153}
8154
8155typedef struct nds32_elf_blank nds32_elf_blank_t;
8156struct nds32_elf_blank
8157{
8158 /* Where the blank begins. */
8159 bfd_vma offset;
8160 /* The size of the blank. */
8161 bfd_vma size;
8162 /* The accumulative size before this blank. */
8163 bfd_vma total_size;
8164 nds32_elf_blank_t *next;
8165 nds32_elf_blank_t *prev;
8166};
8167
8168static nds32_elf_blank_t *blank_free_list = NULL;
8169
8170static nds32_elf_blank_t *
8171create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8172{
8173 nds32_elf_blank_t *blank_t;
8174
8175 if (blank_free_list)
8176 {
8177 blank_t = blank_free_list;
8178 blank_free_list = blank_free_list->next;
8179 }
8180 else
8181 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8182
8183 if (blank_t == NULL)
8184 return NULL;
8185
8186 blank_t->offset = offset_p;
8187 blank_t->size = size_p;
8188 blank_t->total_size = 0;
8189 blank_t->next = NULL;
8190 blank_t->prev = NULL;
8191
8192 return blank_t;
8193}
8194
8195static void
8196remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8197{
8198 if (blank_free_list)
8199 {
8200 blank_free_list->prev = blank_p;
8201 blank_p->next = blank_free_list;
8202 }
8203 else
8204 blank_p->next = NULL;
8205
8206 blank_p->prev = NULL;
8207 blank_free_list = blank_p;
8208}
8209
8210static void
8211clean_nds32_elf_blank (void)
8212{
8213 nds32_elf_blank_t *blank_t;
8214
8215 while (blank_free_list)
8216 {
8217 blank_t = blank_free_list;
8218 blank_free_list = blank_free_list->next;
8219 free (blank_t);
8220 }
8221}
8222
8223static nds32_elf_blank_t *
8224search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8225{
8226 nds32_elf_blank_t *blank_t;
8227
8228 if (!blank_p)
8229 return NULL;
8230 blank_t = blank_p;
8231
8232 while (blank_t && addr < blank_t->offset)
8233 blank_t = blank_t->prev;
8234 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8235 blank_t = blank_t->next;
8236
8237 return blank_t;
8238}
8239
8240static bfd_vma
8241get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8242 int overwrite)
8243{
8244 nds32_elf_blank_t *blank_t;
8245
8246 blank_t = search_nds32_elf_blank (*blank_p, addr);
8247 if (!blank_t)
8248 return 0;
8249
8250 if (overwrite)
8251 *blank_p = blank_t;
8252
8253 if (addr < blank_t->offset + blank_t->size)
8254 return blank_t->total_size + (addr - blank_t->offset);
8255 else
8256 return blank_t->total_size + blank_t->size;
8257}
8258
8259static bfd_boolean
8260insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8261{
8262 nds32_elf_blank_t *blank_t, *blank_t2;
8263
8264 if (!*blank_p)
8265 {
8266 *blank_p = create_nds32_elf_blank (addr, len);
8267 return *blank_p ? TRUE : FALSE;
8268 }
8269
8270 blank_t = search_nds32_elf_blank (*blank_p, addr);
8271
8272 if (blank_t == NULL)
8273 {
8274 blank_t = create_nds32_elf_blank (addr, len);
8275 if (!blank_t)
8276 return FALSE;
8277 while ((*blank_p)->prev != NULL)
8278 *blank_p = (*blank_p)->prev;
8279 blank_t->next = *blank_p;
8280 (*blank_p)->prev = blank_t;
8281 (*blank_p) = blank_t;
8282 return TRUE;
8283 }
8284
8285 if (addr < blank_t->offset + blank_t->size)
8286 {
8287 if (addr > blank_t->offset + blank_t->size)
8288 blank_t->size = addr - blank_t->offset;
8289 }
8290 else
8291 {
8292 blank_t2 = create_nds32_elf_blank (addr, len);
8293 if (!blank_t2)
8294 return FALSE;
8295 if (blank_t->next)
8296 {
8297 blank_t->next->prev = blank_t2;
8298 blank_t2->next = blank_t->next;
8299 }
8300 blank_t2->prev = blank_t;
8301 blank_t->next = blank_t2;
8302 *blank_p = blank_t2;
8303 }
8304
8305 return TRUE;
8306}
8307
8308static bfd_boolean
8309insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8310 bfd_vma len)
8311{
8312 nds32_elf_blank_t *blank_t;
8313
8314 if (!insert_nds32_elf_blank (blank_p, addr, len))
8315 return FALSE;
8316
8317 blank_t = *blank_p;
8318
8319 if (!blank_t->prev)
8320 {
8321 blank_t->total_size = 0;
8322 blank_t = blank_t->next;
8323 }
8324
8325 while (blank_t)
8326 {
8327 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8328 blank_t = blank_t->next;
8329 }
8330
8331 return TRUE;
8332}
8333
8334static void
8335calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8336{
8337 nds32_elf_blank_t *blank_t;
8338 bfd_vma total_size = 0;
8339
8340 if (!blank_p)
8341 return;
8342
8343 blank_t = blank_p;
8344 while (blank_t->prev)
8345 blank_t = blank_t->prev;
8346 while (blank_t)
8347 {
8348 blank_t->total_size = total_size;
8349 total_size += blank_t->size;
8350 blank_t = blank_t->next;
8351 }
8352}
8353
8354static bfd_boolean
8355nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8356 nds32_elf_blank_t *blank_p)
8357{
8358 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8359 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 8360 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8361 unsigned int sec_shndx; /* The section the be relaxed. */
8362 bfd_byte *contents; /* Contents data of iterating section. */
8363 Elf_Internal_Rela *internal_relocs;
8364 Elf_Internal_Rela *irel;
8365 Elf_Internal_Rela *irelend;
8366 struct elf_link_hash_entry **sym_hashes;
8367 struct elf_link_hash_entry **end_hashes;
8368 unsigned int symcount;
8369 asection *sect;
8370 nds32_elf_blank_t *blank_t;
8371 nds32_elf_blank_t *blank_t2;
8372 nds32_elf_blank_t *blank_head;
8373
8374 blank_head = blank_t = blank_p;
8375 while (blank_head->prev != NULL)
8376 blank_head = blank_head->prev;
8377 while (blank_t->next != NULL)
8378 blank_t = blank_t->next;
8379
8380 if (blank_t->offset + blank_t->size <= sec->size)
8381 {
8382 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8383 blank_t->next->prev = blank_t;
8384 }
8385 if (blank_head->offset > 0)
8386 {
8387 blank_head->prev = create_nds32_elf_blank (0, 0);
8388 blank_head->prev->next = blank_head;
8389 blank_head = blank_head->prev;
8390 }
8391
8392 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8393
8394 /* The deletion must stop at the next ALIGN reloc for an alignment
8395 power larger than the number of bytes we are deleting. */
8396
8397 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8398 if (!nds32_get_local_syms (abfd, sec, &isym))
8399 return FALSE;
8400
8401 if (isym == NULL)
8402 {
8403 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8404 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8405 symtab_hdr->contents = (bfd_byte *) isym;
8406 }
8407
8408 if (isym == NULL || symtab_hdr->sh_info == 0)
8409 return FALSE;
8410
8411 blank_t = blank_head;
8412 calc_nds32_blank_total (blank_head);
8413
8414 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8415 {
8416 /* Adjust all the relocs. */
8417
8418 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8419 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8420 TRUE /* keep_memory */);
8421 irelend = internal_relocs + sect->reloc_count;
8422
8423 blank_t = blank_head;
8424 blank_t2 = blank_head;
8425
8426 if (!(sect->flags & SEC_RELOC))
8427 continue;
8428
0c4bd9d9 8429 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC		 8430
8431 for (irel = internal_relocs; irel < irelend; irel++)
8432 {
8433 bfd_vma raddr;
8434
8435 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8436 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8437 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8438 {
8439 unsigned long val = 0;
1c8f6a4d
KLC		 8440 unsigned long mask;
8441 long before, between;
6cae483a 8442 long offset = 0;
35c08157
KLC		 8443
8444 switch (ELF32_R_TYPE (irel->r_info))
8445 {
8446 case R_NDS32_DIFF8:
1c8f6a4d 8447 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 8448 break;
8449 case R_NDS32_DIFF16:
1c8f6a4d 8450 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 8451 break;
8452 case R_NDS32_DIFF32:
8453 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 8454 /* Get the signed bit and mask for the high part. The
8455 gcc will alarm when right shift 32-bit since the
8456 type size of long may be 32-bit. */
8457 mask = 0 - (val >> 31);
8458 if (mask)
8459 offset = (val | (mask - 0xffffffff));
8460 else
8461 offset = val;
35c08157
KLC		 8462 break;
8463 default:
8464 BFD_ASSERT (0);
8465 }
8466
8467 /* DIFF value
8468 0 |encoded in location|
8469 |------------|-------------------|---------
8470 sym+off(addend)
8471 -- before ---| *****************
8472 --------------------- between ---|
8473
1c8f6a4d
KLC		 8474 We only care how much data are relax between DIFF,
8475 marked as ***. */
35c08157
KLC		 8476
8477 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8478 between = get_nds32_elf_blank_total (&blank_t,
8479 irel->r_addend + offset, 0);
35c08157
KLC		 8480 if (between == before)
8481 goto done_adjust_diff;
8482
8483 switch (ELF32_R_TYPE (irel->r_info))
8484 {
8485 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 8486 bfd_put_8 (abfd, offset - (between - before),
8487 contents + irel->r_offset);
35c08157
KLC		 8488 break;
8489 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 8490 bfd_put_16 (abfd, offset - (between - before),
8491 contents + irel->r_offset);
35c08157
KLC		 8492 break;
8493 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 8494 bfd_put_32 (abfd, offset - (between - before),
8495 contents + irel->r_offset);
35c08157
KLC		 8496 break;
8497 }
8498 }
8499 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8500 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8501 {
8502 bfd_vma val = 0;
8503 unsigned int len = 0;
8504 unsigned long before, between;
8505 bfd_byte *endp, *p;
8506
4265548c
PA		 8507 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8508 &len);
35c08157
KLC		 8509
8510 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 8511 between = get_nds32_elf_blank_total (&blank_t,
8512 irel->r_addend + val, 0);
35c08157
KLC		 8513 if (between == before)
8514 goto done_adjust_diff;
8515
8516 p = contents + irel->r_offset;
8517 endp = p + len -1;
8518 memset (p, 0x80, len);
8519 *(endp) = 0;
8520 p = write_uleb128 (p, val - (between - before)) - 1;
8521 if (p < endp)
8522 *p |= 0x80;
8523 }
8524done_adjust_diff:
8525
8526 if (sec == sect)
8527 {
8528 raddr = irel->r_offset;
1c8f6a4d
KLC		 8529 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8530 irel->r_offset, 1);
35c08157
KLC		 8531
8532 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8533 continue;
8534 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 8535 && (blank_t2->offset > raddr
8536 || blank_t2->next->offset <= raddr))
4eca0228 8537 _bfd_error_handler
38f14ab8
AM		 8538 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
8539 abfd);
35c08157
KLC		 8540
8541 /* Mark reloc in deleted portion as NONE.
8542 For some relocs like R_NDS32_LABEL that doesn't modify the
8543 content in the section. R_NDS32_LABEL doesn't belong to the
8544 instruction in the section, so we should preserve it. */
8545 if (raddr >= blank_t2->offset
8546 && raddr < blank_t2->offset + blank_t2->size
8547 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8548 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8549 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8550 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8551 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8552 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8553 {
8554 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8555 R_NDS32_NONE);
8556 continue;
8557 }
8558 }
8559
8560 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8561 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8562 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8563 continue;
8564
8565 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8566 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8567 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8568 {
8569 if (irel->r_addend <= sec->size)
8570 irel->r_addend -=
8571 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8572 }
8573 }
8574 }
8575
8576 /* Adjust the local symbols defined in this section. */
8577 blank_t = blank_head;
8578 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8579 {
8580 if (isym->st_shndx == sec_shndx)
8581 {
8582 if (isym->st_value <= sec->size)
8583 {
8584 bfd_vma ahead;
8585 bfd_vma orig_addr = isym->st_value;
8586
8587 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8588 isym->st_value -= ahead;
8589
8590 /* Adjust function size. */
1c8f6a4d
KLC		 8591 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8592 && isym->st_size > 0)
8593 isym->st_size -=
8594 get_nds32_elf_blank_total
8595 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 8596 }
8597 }
8598 }
8599
8600 /* Now adjust the global symbols defined in this section. */
8601 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8602 - symtab_hdr->sh_info);
8603 sym_hashes = elf_sym_hashes (abfd);
8604 end_hashes = sym_hashes + symcount;
8605 blank_t = blank_head;
8606 for (; sym_hashes < end_hashes; sym_hashes++)
8607 {
8608 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8609
8610 if ((sym_hash->root.type == bfd_link_hash_defined
8611 || sym_hash->root.type == bfd_link_hash_defweak)
8612 && sym_hash->root.u.def.section == sec)
8613 {
8614 if (sym_hash->root.u.def.value <= sec->size)
8615 {
8616 bfd_vma ahead;
8617 bfd_vma orig_addr = sym_hash->root.u.def.value;
8618
8619 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8620 sym_hash->root.u.def.value -= ahead;
8621
8622 /* Adjust function size. */
8623 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 8624 sym_hash->size -=
8625 get_nds32_elf_blank_total
8626 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 8627
8628 }
8629 }
8630 }
8631
8632 contents = elf_section_data (sec)->this_hdr.contents;
8633 blank_t = blank_head;
8634 while (blank_t->next)
8635 {
8636 /* Actually delete the bytes. */
8637
8638 /* If current blank is the last blank overlap with current section,
8639 go to finish process. */
8640 if (sec->size <= (blank_t->next->offset))
8641 break;
8642
8643 memmove (contents + blank_t->offset - blank_t->total_size,
8644 contents + blank_t->offset + blank_t->size,
8645 blank_t->next->offset - (blank_t->offset + blank_t->size));
8646
8647 blank_t = blank_t->next;
8648 }
8649
8650 if (sec->size > (blank_t->offset + blank_t->size))
8651 {
8652 /* There are remaining code between blank and section boundary.
8653 Move the remaining code to appropriate location. */
8654 memmove (contents + blank_t->offset - blank_t->total_size,
8655 contents + blank_t->offset + blank_t->size,
8656 sec->size - (blank_t->offset + blank_t->size));
8657 sec->size -= blank_t->total_size + blank_t->size;
8658 }
8659 else
8660 /* This blank is not entirely included in the section,
8661 reduce the section size by only part of the blank size. */
8662 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8663
8664 while (blank_head)
8665 {
8666 blank_t = blank_head;
8667 blank_head = blank_head->next;
8668 remove_nds32_elf_blank (blank_t);
8669 }
8670
8671 return TRUE;
8672}
8673
8674/* Get the contents of a section. */
8675
8676static int
0c4bd9d9
KLC		 8677nds32_get_section_contents (bfd *abfd, asection *sec,
8678 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC		 8679{
8680 /* Get the section contents. */
8681 if (elf_section_data (sec)->this_hdr.contents != NULL)
8682 *contents_p = elf_section_data (sec)->this_hdr.contents;
8683 else
8684 {
8685 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8686 return FALSE;
0c4bd9d9
KLC		 8687 if (cache)
8688 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 8689 }
8690
8691 return TRUE;
8692}
8693
8694/* Get the contents of the internal symbol of abfd. */
8695
8696static int
8697nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8698 Elf_Internal_Sym **isymbuf_p)
8699{
8700 Elf_Internal_Shdr *symtab_hdr;
8701 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8702
8703 /* Read this BFD's local symbols if we haven't done so already. */
8704 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8705 {
8706 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8707 if (*isymbuf_p == NULL)
8708 {
8709 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8710 symtab_hdr->sh_info, 0,
8711 NULL, NULL, NULL);
8712 if (*isymbuf_p == NULL)
8713 return FALSE;
8714 }
8715 }
8716 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8717
8718 return TRUE;
8719}
8720
8721/* Range of small data. */
1c8f6a4d
KLC		 8722static bfd_vma sdata_range[2][2];
8723static bfd_vma const sdata_init_range[2] =
8724{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 8725
8726static int
8727nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8728 bfd_byte *contents, bfd_vma addr)
8729{
8730 unsigned long insn = bfd_getb32 (contents + addr);
8731
8732 if (insn & 0x80000000)
8733 return 2;
8734
8735 return 4;
8736}
8737
8738/* Set the gp relax range. We have to measure the safe range
8739 to do gp relaxation. */
8740
8741static void
8742relax_range_measurement (bfd *abfd)
8743{
8744 asection *sec_f, *sec_b;
8745 /* For upper bound. */
8746 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8747 bfd_vma align;
35c08157
KLC		 8748 static int decide_relax_range = 0;
8749 int i;
1c8f6a4d 8750 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC		 8751
8752 if (decide_relax_range)
8753 return;
8754 decide_relax_range = 1;
8755
8756 if (sda_rela_sec == NULL)
8757 {
8758 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8759 for (i = 0; i < range_number; i++)
35c08157
KLC		 8760 {
8761 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8762 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8763 }
8764 return;
8765 }
8766
8767 /* Get the biggest alignment power after the gp located section. */
8768 sec_f = sda_rela_sec->output_section;
8769 sec_b = sec_f->next;
8770 align = 0;
8771 while (sec_b != NULL)
8772 {
8773 if ((unsigned)(1 << sec_b->alignment_power) > align)
8774 align = (1 << sec_b->alignment_power);
8775 sec_b = sec_b->next;
8776 }
8777
8778 /* I guess we can not determine the section before
8779 gp located section, so we assume the align is max page size. */
1c8f6a4d 8780 for (i = 0; i < range_number; i++)
35c08157 8781 {
1c8f6a4d 8782 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 8783 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 8784 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 8785 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8786 }
8787}
8788
8789/* These are macros used to check flags encoded in r_addend.
8790 They are only used by nds32_elf_relax_section (). */
8791#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8792#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8793#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8794#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8795
695344c0
NC		 8796static const char * unrecognized_reloc_msg =
8797 /* xgettext:c-format */
2dcf00ce 8798 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 8799
1c8f6a4d
KLC		 8800/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8801
35c08157 8802static bfd_boolean
1c8f6a4d
KLC		 8803nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8804 Elf_Internal_Rela *internal_relocs, int *insn_len,
8805 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8806 Elf_Internal_Shdr *symtab_hdr)
8807{
8808 /* There are 3 variations for LONGCALL1
8809 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 8810 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8811 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8812 jral5 ta ;
1c8f6a4d
KLC		 8813
8814 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 8815 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8816 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8817 jral ta ;
1c8f6a4d
KLC		 8818
8819 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 8820 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8821 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8822 jral ta ;
1c8f6a4d
KLC		 8823 Check code for -mlong-calls output. */
8824
8825 /* Get the reloc for the address from which the register is
8826 being loaded. This reloc will tell us which function is
8827 actually being called. */
8828
8829 bfd_vma laddr;
8830 int seq_len; /* Original length of instruction sequence. */
35c08157 8831 uint32_t insn;
1c8f6a4d
KLC		 8832 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8833 int pic_ext_target = 0;
8834 bfd_signed_vma foff;
35c08157 8835 uint16_t insn16;
35c08157 8836
1c8f6a4d
KLC		 8837 irelend = internal_relocs + sec->reloc_count;
8838 seq_len = GET_SEQ_LEN (irel->r_addend);
8839 laddr = irel->r_offset;
8840 *insn_len = seq_len;
35c08157 8841
1c8f6a4d
KLC		 8842 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8843 R_NDS32_HI20_RELA, laddr);
8844 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8845 R_NDS32_LO12S0_ORI_RELA,
8846 laddr + 4);
35c08157 8847
1c8f6a4d 8848 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 8849 {
695344c0 8850 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 8851 (uint64_t) irel->r_offset);
1c8f6a4d 8852 return FALSE;
35c08157
KLC		 8853 }
8854
1c8f6a4d
KLC		 8855 /* Get the value of the symbol referred to by the reloc. */
8856 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8857 &pic_ext_target);
35c08157 8858
1c8f6a4d
KLC		 8859 /* This condition only happened when symbol is undefined. */
8860 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8861 || foff >= CONSERVATIVE_24BIT_S1)
8862 return FALSE;
35c08157 8863
1c8f6a4d
KLC		 8864 /* Relax to: jal symbol; 25_PCREL */
8865 /* For simplicity of coding, we are going to modify the section
8866 contents, the section relocs, and the BFD symbol table. We
8867 must tell the rest of the code not to free up this
8868 information. It would be possible to instead create a table
8869 of changes which have to be made, as is done in coff-mips.c;
8870 that would be more work, but would require less memory when
8871 the linker is run. */
8872
8873 /* Replace the long call with a jal. */
8874 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8875 R_NDS32_25_PCREL_RELA);
8876 irel->r_addend = hi_irelfn->r_addend;
8877
8878 /* We don't resolve this here but resolve it in relocate_section. */
8879 insn = INSN_JAL;
8880 bfd_putb32 (insn, contents + irel->r_offset);
8881
8882 hi_irelfn->r_info =
8883 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8884 lo_irelfn->r_info =
8885 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8886 *insn_len = 4;
8887
8888 if (seq_len & 0x2)
8889 {
8890 insn16 = NDS32_NOP16;
8891 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8892 lo_irelfn->r_info =
8893 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8894 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8895 *insn_len += 2;
8896 }
8897 return TRUE;
8898}
35c08157 8899
1c8f6a4d
KLC		 8900#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8901/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 8902
1c8f6a4d
KLC		 8903static bfd_boolean
8904nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8905 Elf_Internal_Rela *internal_relocs, int *insn_len,
8906 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8907 Elf_Internal_Shdr *symtab_hdr)
8908{
8909 /* bltz rt, .L1 ; LONGCALL2
8910 jal symbol ; 25_PCREL
8911 .L1: */
35c08157 8912
1c8f6a4d
KLC		 8913 /* Get the reloc for the address from which the register is
8914 being loaded. This reloc will tell us which function is
8915 actually being called. */
35c08157 8916
1c8f6a4d
KLC		 8917 bfd_vma laddr;
8918 uint32_t insn;
8919 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8920 int pic_ext_target = 0;
8921 bfd_signed_vma foff;
35c08157 8922
1c8f6a4d
KLC		 8923 irelend = internal_relocs + sec->reloc_count;
8924 laddr = irel->r_offset;
8925 i1_irelfn =
8926 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8927 R_NDS32_25_PCREL_RELA, laddr + 4);
8928
8929 if (i1_irelfn == irelend)
35c08157 8930 {
695344c0 8931 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 8932 (uint64_t) irel->r_offset);
1c8f6a4d 8933 return FALSE;
35c08157
KLC		 8934 }
8935
1c8f6a4d 8936 insn = bfd_getb32 (contents + laddr);
35c08157 8937
1c8f6a4d
KLC		 8938 /* Get the value of the symbol referred to by the reloc. */
8939 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8940 &pic_ext_target);
35c08157 8941
1c8f6a4d
KLC		 8942 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8943 || foff >= CONSERVATIVE_16BIT_S1)
8944 return FALSE;
35c08157 8945
1c8f6a4d
KLC		 8946 /* Relax to bgezal rt, label ; 17_PCREL
8947 or bltzal rt, label ; 17_PCREL */
8948
8949 /* Convert to complimentary conditional call. */
8950 insn = CONVERT_CONDITION_CALL (insn);
8951
8952 /* For simplicity of coding, we are going to modify the section
8953 contents, the section relocs, and the BFD symbol table. We
8954 must tell the rest of the code not to free up this
8955 information. It would be possible to instead create a table
8956 of changes which have to be made, as is done in coff-mips.c;
8957 that would be more work, but would require less memory when
8958 the linker is run. */
8959
8960 /* Clean unnessary relocations. */
8961 i1_irelfn->r_info =
8962 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8963 cond_irelfn =
8964 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8965 R_NDS32_17_PCREL_RELA, laddr);
8966 if (cond_irelfn != irelend)
8967 cond_irelfn->r_info =
8968 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8969
8970 /* Replace the long call with a bgezal. */
8971 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8972 R_NDS32_17_PCREL_RELA);
8973 irel->r_addend = i1_irelfn->r_addend;
8974
8975 bfd_putb32 (insn, contents + irel->r_offset);
8976
8977 *insn_len = 4;
8978 return TRUE;
8979}
35c08157 8980
1c8f6a4d
KLC		 8981/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8982
8983static bfd_boolean
8984nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8985 Elf_Internal_Rela *internal_relocs, int *insn_len,
8986 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8987 Elf_Internal_Shdr *symtab_hdr)
8988{
8989 /* There are 3 variations for LONGCALL3
8990 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 8991 bltz rt, $1 ; LONGCALL3
8992 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8993 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8994 jral5 ta ;
1c8f6a4d
KLC		 8995 $1
8996
8997 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 8998 bltz rt, $1 ; LONGCALL3
8999 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9000 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9001 jral ta ;
1c8f6a4d
KLC		 9002 $1
9003
9004 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9005 bltz rt, $1 ; LONGCALL3
9006 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9007 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9008 jral ta ;
1c8f6a4d
KLC		 9009 $1 */
9010
9011 /* Get the reloc for the address from which the register is
9012 being loaded. This reloc will tell us which function is
9013 actually being called. */
9014
9015 bfd_vma laddr;
9016 int seq_len; /* Original length of instruction sequence. */
9017 uint32_t insn;
9018 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9019 int pic_ext_target = 0;
9020 bfd_signed_vma foff;
9021 uint16_t insn16;
9022
9023 irelend = internal_relocs + sec->reloc_count;
9024 seq_len = GET_SEQ_LEN (irel->r_addend);
9025 laddr = irel->r_offset;
9026 *insn_len = seq_len;
9027
9028 hi_irelfn =
9029 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9030 R_NDS32_HI20_RELA, laddr + 4);
9031 lo_irelfn =
9032 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9033 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9034
9035 if (hi_irelfn == irelend || lo_irelfn == irelend)
9036 {
695344c0 9037 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9038 (uint64_t) irel->r_offset);
1c8f6a4d 9039 return FALSE;
35c08157
KLC		 9040 }
9041
1c8f6a4d
KLC		 9042 /* Get the value of the symbol referred to by the reloc. */
9043 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9044 &pic_ext_target);
35c08157 9045
1c8f6a4d
KLC		 9046 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9047 || foff >= CONSERVATIVE_24BIT_S1)
9048 return FALSE;
35c08157 9049
1c8f6a4d
KLC		 9050 insn = bfd_getb32 (contents + laddr);
9051 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9052 {
1c8f6a4d
KLC		 9053 /* Relax to bgezal rt, label ; 17_PCREL
9054 or bltzal rt, label ; 17_PCREL */
35c08157 9055
1c8f6a4d
KLC		 9056 /* Convert to complimentary conditional call. */
9057 insn = CONVERT_CONDITION_CALL (insn);
9058 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9059
1c8f6a4d
KLC		 9060 *insn_len = 4;
9061 irel->r_info =
9062 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9063 hi_irelfn->r_info =
9064 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9065 lo_irelfn->r_info =
9066 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9067
9068 cond_irelfn =
9069 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9070 R_NDS32_17_PCREL_RELA, laddr);
9071 if (cond_irelfn != irelend)
35c08157 9072 {
1c8f6a4d
KLC		 9073 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9074 R_NDS32_17_PCREL_RELA);
9075 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9076 }
1c8f6a4d
KLC		 9077
9078 if (seq_len & 0x2)
35c08157 9079 {
1c8f6a4d
KLC		 9080 insn16 = NDS32_NOP16;
9081 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9082 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9083 R_NDS32_INSN16);
9084 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9085 insn_len += 2;
35c08157 9086 }
1c8f6a4d
KLC		 9087 }
9088 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9089 {
9090 /* Relax to the following instruction sequence
9091 bltz rt, $1 ; LONGCALL2
9092 jal symbol ; 25_PCREL
9093 $1 */
9094 *insn_len = 8;
9095 insn = INSN_JAL;
9096 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9097
1c8f6a4d
KLC		 9098 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9099 R_NDS32_25_PCREL_RELA);
9100 irel->r_info =
9101 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9102
9103 lo_irelfn->r_info =
9104 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9105
1c8f6a4d 9106 if (seq_len & 0x2)
35c08157 9107 {
1c8f6a4d
KLC		 9108 insn16 = NDS32_NOP16;
9109 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9110 lo_irelfn->r_info =
9111 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9112 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9113 insn_len += 2;
9114 }
9115 }
9116 return TRUE;
9117}
35c08157 9118
1c8f6a4d 9119/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9120
1c8f6a4d
KLC		 9121static bfd_boolean
9122nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9123 Elf_Internal_Rela *internal_relocs, int *insn_len,
9124 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9125 Elf_Internal_Shdr *symtab_hdr)
9126{
9127 /* There are 3 variations for LONGJUMP1
9128 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9129 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9130 ori ta, ta, lo12(symbol) ; LO12S0
9131 jr5 ta ;
1c8f6a4d
KLC		 9132
9133 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9134 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9135 ori ta, ta, lo12(symbol) ; LO12S0
9136 jr ta ;
1c8f6a4d
KLC		 9137
9138 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9139 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9140 ori ta, ta, lo12(symbol) ; LO12S0
9141 jr ta ; */
1c8f6a4d
KLC		 9142
9143 /* Get the reloc for the address from which the register is
9144 being loaded. This reloc will tell us which function is
9145 actually being called. */
9146
9147 bfd_vma laddr;
9148 int seq_len; /* Original length of instruction sequence. */
9149 int insn16_on; /* 16-bit on/off. */
9150 uint32_t insn;
9151 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9152 int pic_ext_target = 0;
9153 bfd_signed_vma foff;
9154 uint16_t insn16;
9155 unsigned long reloc;
35c08157 9156
1c8f6a4d
KLC		 9157 irelend = internal_relocs + sec->reloc_count;
9158 seq_len = GET_SEQ_LEN (irel->r_addend);
9159 laddr = irel->r_offset;
9160 *insn_len = seq_len;
9161 insn16_on = IS_16BIT_ON (irel->r_addend);
9162
9163 hi_irelfn =
9164 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9165 R_NDS32_HI20_RELA, laddr);
9166 lo_irelfn =
9167 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9168 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9169 if (hi_irelfn == irelend || lo_irelfn == irelend)
9170 {
695344c0 9171 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9172 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9173 return FALSE;
9174 }
35c08157 9175
1c8f6a4d
KLC		 9176 /* Get the value of the symbol referred to by the reloc. */
9177 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9178 &pic_ext_target);
35c08157 9179
1c8f6a4d
KLC		 9180 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9181 || foff < -CONSERVATIVE_24BIT_S1)
9182 return FALSE;
35c08157 9183
1c8f6a4d
KLC		 9184 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9185 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9186 {
9187 /* j8 label */
9188 /* 16-bit on, but not optimized for speed. */
9189 reloc = R_NDS32_9_PCREL_RELA;
9190 insn16 = INSN_J8;
9191 bfd_putb16 (insn16, contents + irel->r_offset);
9192 *insn_len = 2;
9193 irel->r_info =
9194 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9195 }
9196 else
9197 {
9198 /* j label */
9199 reloc = R_NDS32_25_PCREL_RELA;
9200 insn = INSN_J;
9201 bfd_putb32 (insn, contents + irel->r_offset);
9202 *insn_len = 4;
9203 irel->r_info =
9204 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9205 irel->r_addend = 0;
9206 }
35c08157 9207
1c8f6a4d
KLC		 9208 hi_irelfn->r_info =
9209 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9210 lo_irelfn->r_info =
9211 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9212
1c8f6a4d
KLC		 9213 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9214 {
9215 insn16 = NDS32_NOP16;
9216 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9217 lo_irelfn->r_info =
9218 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9219 R_NDS32_INSN16);
9220 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9221 *insn_len += 2;
9222 }
9223 return TRUE;
9224}
9225
9226/* Revert condition branch. This function does not check if the input
9227 instruction is condition branch or not. */
9228
9229static void
9230nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9231 uint16_t *re_insn16, uint32_t *re_insn)
9232{
9233 uint32_t comp_insn = 0;
9234 uint16_t comp_insn16 = 0;
9235
9236 if (insn)
9237 {
9238 if (N32_OP6 (insn) == N32_OP6_BR1)
9239 {
9240 /* beqs label. */
9241 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9242 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9243 {
1c8f6a4d
KLC		 9244 /* Insn can be contracted to 16-bit implied r5. */
9245 comp_insn16 =
9246 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9247 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9248 }
1c8f6a4d
KLC		 9249 }
9250 else if (N32_OP6 (insn) == N32_OP6_BR3)
9251 {
9252 /* bnec $ta, imm11, label. */
9253 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9254 }
9255 else
9256 {
9257 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9258 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9259 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9260 {
1c8f6a4d 9261 if (N32_IS_RT3 (insn))
35c08157 9262 {
1c8f6a4d
KLC		 9263 /* Insn can be contracted to 16-bit. */
9264 comp_insn16 =
9265 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9266 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9267 }
9268 else if (N32_RT5 (insn) == REG_R15)
9269 {
9270 /* Insn can be contracted to 16-bit. */
9271 comp_insn16 =
9272 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9273 }
35c08157
KLC		 9274 }
9275 }
1c8f6a4d
KLC		 9276 }
9277 else
9278 {
9279 switch ((insn16 & 0xf000) >> 12)
35c08157 9280 {
1c8f6a4d
KLC		 9281 case 0xc:
9282 /* beqz38 or bnez38 */
9283 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9284 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9285 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9286 break;
35c08157 9287
1c8f6a4d
KLC		 9288 case 0xd:
9289 /* beqs38 or bnes38 */
9290 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9291 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9292 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9293 | (REG_R5 << 15);
9294 break;
35c08157 9295
1c8f6a4d
KLC		 9296 case 0xe:
9297 /* beqzS8 or bnezS8 */
9298 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9299 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9300 comp_insn |= REG_R15 << 20;
9301 break;
35c08157 9302
1c8f6a4d
KLC		 9303 default:
9304 break;
9305 }
9306 }
9307 if (comp_insn && re_insn)
9308 *re_insn = comp_insn;
9309 if (comp_insn16 && re_insn16)
9310 *re_insn16 = comp_insn16;
9311}
35c08157 9312
1c8f6a4d 9313/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9314
1c8f6a4d
KLC		 9315static bfd_boolean
9316nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9317 Elf_Internal_Rela *internal_relocs, int *insn_len,
9318 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9319 Elf_Internal_Shdr *symtab_hdr)
9320{
9321 /* There are 3 variations for LONGJUMP2
9322 case 2-4; 1st insn convertible, 16-bit on,
9323 optimize off or optimize for space
9324 bnes38 rt, ra, $1 ; LONGJUMP2
9325 j label ; 25_PCREL
9326 $1:
9327
9328 case 4-4; 1st insn not convertible
9329 bne rt, ra, $1 ; LONGJUMP2
9330 j label ; 25_PCREL
9331 $1:
9332
9333 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9334 bne rt, ra, $1 ; LONGJUMP2
9335 j label ; 25_PCREL
9336 $1: */
9337
9338 /* Get the reloc for the address from which the register is
9339 being loaded. This reloc will tell us which function is
9340 actually being called. */
9341
9342 bfd_vma laddr;
9343 int seq_len; /* Original length of instruction sequence. */
9344 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9345 int pic_ext_target = 0, first_size;
9346 unsigned int i;
9347 bfd_signed_vma foff;
9348 uint32_t insn, re_insn = 0;
9349 uint16_t insn16, re_insn16 = 0;
9350 unsigned long reloc, cond_reloc;
35c08157 9351
1c8f6a4d
KLC		 9352 enum elf_nds32_reloc_type checked_types[] =
9353 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9354
1c8f6a4d
KLC		 9355 irelend = internal_relocs + sec->reloc_count;
9356 seq_len = GET_SEQ_LEN (irel->r_addend);
9357 laddr = irel->r_offset;
9358 *insn_len = seq_len;
9359 first_size = (seq_len == 6) ? 2 : 4;
9360
9361 i2_irelfn =
9362 find_relocs_at_address_addr (irel, internal_relocs,
9363 irelend, R_NDS32_25_PCREL_RELA,
9364 laddr + first_size);
9365
9366 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9367 {
9368 cond_irelfn =
9369 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9370 checked_types[i], laddr);
9371 if (cond_irelfn != irelend)
9372 break;
9373 }
35c08157 9374
1c8f6a4d
KLC		 9375 if (i2_irelfn == irelend || cond_irelfn == irelend)
9376 {
695344c0 9377 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 9378 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9379 return FALSE;
9380 }
35c08157 9381
1c8f6a4d
KLC		 9382 /* Get the value of the symbol referred to by the reloc. */
9383 foff =
9384 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9385 &pic_ext_target);
9386 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9387 || foff >= CONSERVATIVE_16BIT_S1)
9388 return FALSE;
35c08157 9389
1c8f6a4d
KLC		 9390 /* Get the all corresponding instructions. */
9391 if (first_size == 4)
9392 {
9393 insn = bfd_getb32 (contents + laddr);
9394 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9395 }
9396 else
9397 {
9398 insn16 = bfd_getb16 (contents + laddr);
9399 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9400 }
35c08157 9401
1c8f6a4d
KLC		 9402 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9403 && foff < ACCURATE_8BIT_S1 - first_size)
9404 {
9405 if (first_size == 4)
9406 {
9407 /* Don't convert it to 16-bit now, keep this as relaxable for
9408 ``label reloc; INSN16''. */
35c08157 9409
1c8f6a4d
KLC		 9410 /* Save comp_insn32 to buffer. */
9411 bfd_putb32 (re_insn, contents + irel->r_offset);
9412 *insn_len = 4;
9413 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9414 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9415 cond_reloc = R_NDS32_INSN16;
9416 }
9417 else
9418 {
9419 bfd_putb16 (re_insn16, contents + irel->r_offset);
9420 *insn_len = 2;
9421 reloc = R_NDS32_9_PCREL_RELA;
9422 cond_reloc = R_NDS32_NONE;
9423 }
9424 }
9425 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9426 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9427 && foff < ACCURATE_14BIT_S1 - first_size))
9428 {
9429 /* beqs label ; 15_PCREL */
9430 bfd_putb32 (re_insn, contents + irel->r_offset);
9431 *insn_len = 4;
9432 reloc = R_NDS32_15_PCREL_RELA;
9433 cond_reloc = R_NDS32_NONE;
9434 }
9435 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9436 && foff >= -CONSERVATIVE_16BIT_S1
9437 && foff < CONSERVATIVE_16BIT_S1)
9438 {
9439 /* beqz label ; 17_PCREL */
9440 bfd_putb32 (re_insn, contents + irel->r_offset);
9441 *insn_len = 4;
9442 reloc = R_NDS32_17_PCREL_RELA;
9443 cond_reloc = R_NDS32_NONE;
9444 }
9445 else
9446 return FALSE;
35c08157 9447
1c8f6a4d
KLC		 9448 /* Set all relocations. */
9449 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9450 irel->r_addend = i2_irelfn->r_addend;
35c08157 9451
1c8f6a4d
KLC		 9452 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9453 cond_reloc);
9454 cond_irelfn->r_addend = 0;
35c08157 9455
1c8f6a4d
KLC		 9456 if ((seq_len ^ *insn_len ) & 0x2)
9457 {
9458 insn16 = NDS32_NOP16;
9459 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9460 i2_irelfn->r_offset = 4;
9461 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9462 R_NDS32_INSN16);
9463 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9464 *insn_len += 2;
9465 }
9466 else
9467 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9468 R_NDS32_NONE);
9469 return TRUE;
9470}
35c08157 9471
1c8f6a4d 9472/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9473
1c8f6a4d
KLC		 9474static bfd_boolean
9475nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9476 Elf_Internal_Rela *internal_relocs, int *insn_len,
9477 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9478 Elf_Internal_Shdr *symtab_hdr)
9479{
9480 /* There are 5 variations for LONGJUMP3
9481 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9482 optimize off or optimize for space
07d6d2b8
AM		 9483 bnes38 rt, ra, $1 ; LONGJUMP3
9484 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9485 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9486 jr5 ta ;
9487 $1: ;
1c8f6a4d
KLC		 9488
9489 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 9490 bnes38 rt, ra, $1 ; LONGJUMP3
9491 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9492 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9493 jr5 ta ;
9494 $1: ; LABEL
1c8f6a4d
KLC		 9495
9496 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9497 optimize off or optimize for space
07d6d2b8
AM		 9498 bne rt, ra, $1 ; LONGJUMP3
9499 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9500 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9501 jr5 ta ;
9502 $1: ;
1c8f6a4d
KLC		 9503
9504 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9505 16-bit off if no INSN16
07d6d2b8
AM		 9506 bne rt, ra, $1 ; LONGJUMP3
9507 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9508 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9509 jr ta ;
9510 $1: ;
1c8f6a4d
KLC		 9511
9512 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9513 16-bit off if no INSN16
07d6d2b8
AM		 9514 bne rt, ra, $1 ; LONGJUMP3
9515 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9516 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 9517 jr ta ;
9518 $1: ; LABEL */
1c8f6a4d
KLC		 9519
9520 /* Get the reloc for the address from which the register is
9521 being loaded. This reloc will tell us which function is
9522 actually being called. */
9523 enum elf_nds32_reloc_type checked_types[] =
9524 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9525
9526 int reloc_off = 0, cond_removed = 0, convertible;
9527 bfd_vma laddr;
9528 int seq_len; /* Original length of instruction sequence. */
9529 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9530 int pic_ext_target = 0, first_size;
9531 unsigned int i;
9532 bfd_signed_vma foff;
9533 uint32_t insn, re_insn = 0;
9534 uint16_t insn16, re_insn16 = 0;
9535 unsigned long reloc, cond_reloc;
35c08157 9536
1c8f6a4d
KLC		 9537 irelend = internal_relocs + sec->reloc_count;
9538 seq_len = GET_SEQ_LEN (irel->r_addend);
9539 laddr = irel->r_offset;
9540 *insn_len = seq_len;
35c08157 9541
1c8f6a4d 9542 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9543
1c8f6a4d
KLC		 9544 if (convertible)
9545 first_size = 2;
9546 else
9547 first_size = 4;
9548
9549 /* Get all needed relocations. */
9550 hi_irelfn =
9551 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9552 R_NDS32_HI20_RELA, laddr + first_size);
9553 lo_irelfn =
9554 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9555 R_NDS32_LO12S0_ORI_RELA,
9556 laddr + first_size + 4);
9557
9558 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9559 {
9560 cond_irelfn =
9561 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9562 checked_types[i], laddr);
9563 if (cond_irelfn != irelend)
9564 break;
9565 }
35c08157 9566
1c8f6a4d
KLC		 9567 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9568 {
695344c0 9569 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 9570 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9571 return FALSE;
9572 }
35c08157 9573
1c8f6a4d
KLC		 9574 /* Get the value of the symbol referred to by the reloc. */
9575 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9576 &pic_ext_target);
35c08157 9577
1c8f6a4d
KLC		 9578 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9579 || foff >= CONSERVATIVE_24BIT_S1)
9580 return FALSE;
35c08157 9581
1c8f6a4d
KLC		 9582 /* Get the all corresponding instructions. */
9583 if (first_size == 4)
9584 {
9585 insn = bfd_getb32 (contents + laddr);
9586 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9587 }
9588 else
9589 {
9590 insn16 = bfd_getb16 (contents + laddr);
9591 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9592 }
35c08157 9593
1c8f6a4d
KLC		 9594 /* For simplicity of coding, we are going to modify the section
9595 contents, the section relocs, and the BFD symbol table. We
9596 must tell the rest of the code not to free up this
9597 information. It would be possible to instead create a table
9598 of changes which have to be made, as is done in coff-mips.c;
9599 that would be more work, but would require less memory when
9600 the linker is run. */
35c08157 9601
1c8f6a4d
KLC		 9602 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9603 && foff < ACCURATE_8BIT_S1 - first_size)
9604 {
9605 if (!(seq_len & 0x2))
9606 {
9607 /* Don't convert it to 16-bit now, keep this as relaxable
9608 for ``label reloc; INSN1a''6. */
9609 /* Save comp_insn32 to buffer. */
9610 bfd_putb32 (re_insn, contents + irel->r_offset);
9611 *insn_len = 4;
9612 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9613 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9614 cond_reloc = R_NDS32_INSN16;
9615 }
9616 else
9617 {
9618 /* Not optimize for speed; convert sequence to 16-bit. */
9619 /* Save comp_insn16 to buffer. */
9620 bfd_putb16 (re_insn16, contents + irel->r_offset);
9621 *insn_len = 2;
9622 reloc = R_NDS32_9_PCREL_RELA;
9623 cond_reloc = R_NDS32_NONE;
9624 }
9625 cond_removed = 1;
9626 }
9627 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9628 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9629 && foff < ACCURATE_14BIT_S1 - first_size))
9630 {
9631 /* beqs label ; 15_PCREL */
9632 bfd_putb32 (re_insn, contents + irel->r_offset);
9633 *insn_len = 4;
9634 reloc = R_NDS32_15_PCREL_RELA;
9635 cond_reloc = R_NDS32_NONE;
9636 cond_removed = 1;
9637 }
9638 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9639 && foff >= -CONSERVATIVE_16BIT_S1
9640 && foff < CONSERVATIVE_16BIT_S1)
9641 {
9642 /* beqz label ; 17_PCREL */
9643 bfd_putb32 (re_insn, contents + irel->r_offset);
9644 *insn_len = 4;
9645 reloc = R_NDS32_17_PCREL_RELA;
9646 cond_reloc = R_NDS32_NONE;
9647 cond_removed = 1;
9648 }
9649 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9650 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9651 {
9652 /* Relax to one of the following 3 variations
9653
9654 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9655 for space
9656 bnes38 rt, $1 ; LONGJUMP2
9657 j label ; 25_PCREL
9658 $1
9659
9660 case 4-4; 1st insn not convertible, others don't care
9661 bne rt, ra, $1 ; LONGJUMP2
9662 j label ; 25_PCREL
9663 $1
9664
9665 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9666 bne rt, ra, $1 ; LONGJUMP2
9667 j label ; 25_PCREL
9668 $1 */
9669
9670 /* Offset for first instruction. */
9671
9672 /* Use j label as second instruction. */
9673 *insn_len = 4 + first_size;
9674 insn = INSN_J;
9675 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9676 reloc = R_NDS32_LONGJUMP2;
9677 cond_reloc = R_NDS32_25_PLTREL;
9678 }
9679 else
9680 return FALSE;
35c08157 9681
1c8f6a4d
KLC		 9682 if (cond_removed == 1)
9683 {
9684 /* Set all relocations. */
9685 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9686 irel->r_addend = hi_irelfn->r_addend;
9687
9688 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9689 cond_reloc);
9690 cond_irelfn->r_addend = 0;
9691 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9692 R_NDS32_NONE);
9693 }
9694 else
9695 {
9696 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
1c8f6a4d
KLC		 9697 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9698 cond_reloc);
9699 }
35c08157 9700
1c8f6a4d
KLC		 9701 if ((seq_len ^ *insn_len ) & 0x2)
9702 {
9703 insn16 = NDS32_NOP16;
9704 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9705 lo_irelfn->r_offset = *insn_len;
9706 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9707 R_NDS32_INSN16);
9708 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9709 *insn_len += 2;
9710 }
9711 else
9712 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9713 R_NDS32_NONE);
9714 return TRUE;
9715}
35c08157 9716
1c8f6a4d 9717/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9718
1c8f6a4d
KLC		 9719static bfd_boolean
9720nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9721 Elf_Internal_Rela *internal_relocs, int *insn_len,
9722 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9723 Elf_Internal_Shdr *symtab_hdr)
9724{
9725 /* The pattern for LONGCALL4. Support for function cse.
9726 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9727 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9728 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9729
1c8f6a4d
KLC		 9730 bfd_vma laddr;
9731 uint32_t insn;
9732 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9733 Elf_Internal_Rela *irelend;
9734 int pic_ext_target = 0;
9735 bfd_signed_vma foff;
35c08157 9736
1c8f6a4d
KLC		 9737 irelend = internal_relocs + sec->reloc_count;
9738 laddr = irel->r_offset;
35c08157 9739
1c8f6a4d
KLC		 9740 /* Get the reloc for the address from which the register is
9741 being loaded. This reloc will tell us which function is
9742 actually being called. */
9743 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9744 R_NDS32_HI20_RELA, laddr);
35c08157 9745
1c8f6a4d
KLC		 9746 if (hi_irel == irelend)
9747 {
695344c0 9748 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9749 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9750 return FALSE;
9751 }
35c08157 9752
1c8f6a4d
KLC		 9753 /* Get the value of the symbol referred to by the reloc. */
9754 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9755 &pic_ext_target);
35c08157 9756
1c8f6a4d
KLC		 9757 /* This condition only happened when symbol is undefined. */
9758 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9759 || foff >= CONSERVATIVE_24BIT_S1)
9760 return FALSE;
35c08157 9761
1c8f6a4d
KLC		 9762 /* Relax to: jal symbol; 25_PCREL */
9763 /* For simplicity of coding, we are going to modify the section
9764 contents, the section relocs, and the BFD symbol table. We
9765 must tell the rest of the code not to free up this
9766 information. It would be possible to instead create a table
9767 of changes which have to be made, as is done in coff-mips.c;
9768 that would be more work, but would require less memory when
9769 the linker is run. */
35c08157 9770
1c8f6a4d
KLC		 9771 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9772 R_NDS32_PTR_RESOLVED, irel->r_addend);
9773 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9774 R_NDS32_EMPTY, irel->r_addend);
35c08157 9775
1c8f6a4d
KLC		 9776 if (ptr_irel == irelend || em_irel == irelend)
9777 {
695344c0 9778 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9779 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9780 return FALSE;
9781 }
9782 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9783 insn = bfd_getb32 (contents + irel->r_addend);
9784 if (insn & 0x80000000)
9785 return FALSE;
35c08157 9786
1c8f6a4d
KLC		 9787 /* Replace the long call with a jal. */
9788 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9789 R_NDS32_25_PCREL_RELA);
9790 ptr_irel->r_addend = 1;
35c08157 9791
1c8f6a4d
KLC		 9792 /* We don't resolve this here but resolve it in relocate_section. */
9793 insn = INSN_JAL;
9794 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9795
1c8f6a4d
KLC		 9796 irel->r_info =
9797 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9798
1c8f6a4d
KLC		 9799 /* If there is function cse, HI20 can not remove now. */
9800 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9801 R_NDS32_LONGCALL4, laddr);
9802 if (call_irel == irelend)
9803 {
9804 *insn_len = 0;
9805 hi_irel->r_info =
9806 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9807 }
35c08157 9808
1c8f6a4d
KLC		 9809 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9810 R_NDS32_INSN16, irel->r_addend);
9811 if (insn_irel != irelend)
9812 insn_irel->r_info =
9813 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9814
1c8f6a4d
KLC		 9815 return TRUE;
9816}
35c08157 9817
1c8f6a4d 9818/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 9819
1c8f6a4d
KLC		 9820static bfd_boolean
9821nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9822 Elf_Internal_Rela *internal_relocs, int *insn_len,
9823 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9824 Elf_Internal_Shdr *symtab_hdr)
9825{
9826 /* The pattern for LONGCALL5.
9827 bltz rt, .L1 ; LONGCALL5/17_PCREL
9828 jal symbol ; 25_PCREL
9829 .L1: */
35c08157 9830
1c8f6a4d
KLC		 9831 bfd_vma laddr;
9832 uint32_t insn;
9833 Elf_Internal_Rela *cond_irel, *irelend;
9834 int pic_ext_target = 0;
9835 bfd_signed_vma foff;
35c08157 9836
1c8f6a4d
KLC		 9837 irelend = internal_relocs + sec->reloc_count;
9838 laddr = irel->r_offset;
9839 insn = bfd_getb32 (contents + laddr);
35c08157 9840
1c8f6a4d
KLC		 9841 /* Get the reloc for the address from which the register is
9842 being loaded. This reloc will tell us which function is
9843 actually being called. */
9844 cond_irel =
9845 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9846 R_NDS32_25_PCREL_RELA, irel->r_addend);
9847 if (cond_irel == irelend)
9848 {
695344c0 9849 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 9850 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9851 return FALSE;
9852 }
35c08157 9853
1c8f6a4d
KLC		 9854 /* Get the value of the symbol referred to by the reloc. */
9855 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9856 &pic_ext_target);
35c08157 9857
1c8f6a4d
KLC		 9858 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9859 || foff >= CONSERVATIVE_16BIT_S1)
9860 return FALSE;
35c08157 9861
1c8f6a4d
KLC		 9862 /* Relax to bgezal rt, label ; 17_PCREL
9863 or bltzal rt, label ; 17_PCREL */
35c08157 9864
1c8f6a4d
KLC		 9865 /* Convert to complimentary conditional call. */
9866 insn = CONVERT_CONDITION_CALL (insn);
35c08157 9867
1c8f6a4d
KLC		 9868 /* For simplicity of coding, we are going to modify the section
9869 contents, the section relocs, and the BFD symbol table. We
9870 must tell the rest of the code not to free up this
9871 information. It would be possible to instead create a table
9872 of changes which have to be made, as is done in coff-mips.c;
9873 that would be more work, but would require less memory when
9874 the linker is run. */
35c08157 9875
1c8f6a4d
KLC		 9876 /* Modify relocation and contents. */
9877 cond_irel->r_info =
9878 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 9879
1c8f6a4d
KLC		 9880 /* Replace the long call with a bgezal. */
9881 bfd_putb32 (insn, contents + cond_irel->r_offset);
9882 *insn_len = 0;
35c08157 9883
1c8f6a4d
KLC		 9884 /* Clean unnessary relocations. */
9885 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9886
1c8f6a4d
KLC		 9887 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9888 R_NDS32_17_PCREL_RELA, laddr);
9889 cond_irel->r_info =
9890 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9891
1c8f6a4d
KLC		 9892 return TRUE;
9893}
35c08157 9894
1c8f6a4d 9895/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 9896
1c8f6a4d
KLC		 9897static bfd_boolean
9898nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9899 Elf_Internal_Rela *internal_relocs, int *insn_len,
9900 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9901 Elf_Internal_Shdr *symtab_hdr)
9902{
9903 /* The pattern for LONGCALL6.
9904 bltz rt, .L1 ; LONGCALL6/17_PCREL
9905 sethi ta, hi20(symbol) ; HI20/PTR
9906 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9907 jral ta ; PTR_RES/EMPTY/INSN16
9908 .L1 */
9909
9910 bfd_vma laddr;
9911 uint32_t insn;
9912 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9913 int pic_ext_target = 0;
9914 bfd_signed_vma foff;
35c08157 9915
1c8f6a4d
KLC		 9916 irelend = internal_relocs + sec->reloc_count;
9917 laddr = irel->r_offset;
35c08157 9918
1c8f6a4d
KLC		 9919 /* Get the reloc for the address from which the register is
9920 being loaded. This reloc will tell us which function is
9921 actually being called. */
9922 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9923 R_NDS32_EMPTY, irel->r_addend);
35c08157 9924
1c8f6a4d
KLC		 9925 if (em_irel == irelend)
9926 {
695344c0 9927 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 9928 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9929 return FALSE;
9930 }
35c08157 9931
1c8f6a4d
KLC		 9932 /* Get the value of the symbol referred to by the reloc. */
9933 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9934 &pic_ext_target);
35c08157 9935
1c8f6a4d
KLC		 9936 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9937 || foff >= CONSERVATIVE_24BIT_S1)
9938 return FALSE;
35c08157 9939
1c8f6a4d
KLC		 9940 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9941 insn = bfd_getb32 (contents + irel->r_addend);
9942 if (insn & 0x80000000)
9943 return FALSE;
35c08157 9944
1c8f6a4d
KLC		 9945 insn = bfd_getb32 (contents + laddr);
9946 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9947 {
9948 /* Relax to bgezal rt, label ; 17_PCREL
9949 or bltzal rt, label ; 17_PCREL */
35c08157 9950
1c8f6a4d
KLC		 9951 /* Convert to complimentary conditional call. */
9952 *insn_len = 0;
9953 insn = CONVERT_CONDITION_CALL (insn);
9954 bfd_putb32 (insn, contents + em_irel->r_offset);
9955
9956 em_irel->r_info =
9957 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9958
9959 /* Set resolved relocation. */
9960 cond_irel =
9961 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9962 R_NDS32_PTR_RESOLVED, irel->r_addend);
9963 if (cond_irel == irelend)
35c08157 9964 {
695344c0 9965 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9966 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 9967 return FALSE;
9968 }
9969 cond_irel->r_addend = 1;
35c08157 9970
1c8f6a4d 9971 /* Clear relocations. */
35c08157 9972
1c8f6a4d
KLC		 9973 irel->r_info =
9974 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9975
1c8f6a4d
KLC		 9976 cond_irel =
9977 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9978 R_NDS32_17_PCREL_RELA, laddr);
9979 if (cond_irel != irelend)
9980 cond_irel->r_info =
9981 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9982
1c8f6a4d
KLC		 9983 cond_irel =
9984 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9985 R_NDS32_INSN16, irel->r_addend);
9986 if (cond_irel != irelend)
9987 cond_irel->r_info =
9988 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9989
1c8f6a4d
KLC		 9990 }
9991 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9992 {
9993 /* Relax to the following instruction sequence
9994 bltz rt, .L1 ; LONGCALL2/17_PCREL
9995 jal symbol ; 25_PCREL/PTR_RES
9996 .L1 */
9997 *insn_len = 4;
9998 /* Convert instruction. */
9999 insn = INSN_JAL;
10000 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10001
1c8f6a4d
KLC		 10002 /* Convert relocations. */
10003 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10004 R_NDS32_25_PCREL_RELA);
10005 irel->r_info =
10006 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10007
1c8f6a4d
KLC		 10008 /* Set resolved relocation. */
10009 cond_irel =
10010 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10011 R_NDS32_PTR_RESOLVED, irel->r_addend);
10012 if (cond_irel == irelend)
10013 {
695344c0 10014 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10015 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10016 return FALSE;
10017 }
10018 cond_irel->r_addend = 1;
35c08157 10019
1c8f6a4d
KLC		 10020 cond_irel =
10021 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10022 R_NDS32_INSN16, irel->r_addend);
10023 if (cond_irel != irelend)
10024 cond_irel->r_info =
10025 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10026 }
10027 return TRUE;
10028}
35c08157 10029
1c8f6a4d 10030/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10031
1c8f6a4d
KLC		 10032static bfd_boolean
10033nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10034 Elf_Internal_Rela *internal_relocs, int *insn_len,
10035 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10036 Elf_Internal_Shdr *symtab_hdr)
10037{
10038 /* The pattern for LONGJUMP4.
10039 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10040 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10041 jr ta ; PTR_RES/INSN16/EMPTY */
10042
10043 bfd_vma laddr;
10044 int seq_len; /* Original length of instruction sequence. */
10045 uint32_t insn;
10046 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10047 int pic_ext_target = 0;
10048 bfd_signed_vma foff;
35c08157 10049
1c8f6a4d
KLC		 10050 irelend = internal_relocs + sec->reloc_count;
10051 seq_len = GET_SEQ_LEN (irel->r_addend);
10052 laddr = irel->r_offset;
10053 *insn_len = seq_len;
35c08157 10054
1c8f6a4d
KLC		 10055 /* Get the reloc for the address from which the register is
10056 being loaded. This reloc will tell us which function is
10057 actually being called. */
35c08157 10058
1c8f6a4d
KLC		 10059 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10060 R_NDS32_HI20_RELA, laddr);
35c08157 10061
1c8f6a4d
KLC		 10062 if (hi_irel == irelend)
10063 {
695344c0 10064 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10065 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10066 return FALSE;
10067 }
35c08157 10068
1c8f6a4d
KLC		 10069 /* Get the value of the symbol referred to by the reloc. */
10070 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10071 &pic_ext_target);
35c08157 10072
1c8f6a4d
KLC		 10073 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10074 || foff < -CONSERVATIVE_24BIT_S1)
10075 return FALSE;
35c08157 10076
1c8f6a4d
KLC		 10077 /* Convert it to "j label", it may be converted to j8 in the final
10078 pass of relaxation. Therefore, we do not consider this currently. */
10079 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10080 R_NDS32_PTR_RESOLVED, irel->r_addend);
10081 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10082 R_NDS32_EMPTY, irel->r_addend);
35c08157 10083
1c8f6a4d
KLC		 10084 if (ptr_irel == irelend || em_irel == irelend)
10085 {
695344c0 10086 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10087 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10088 return FALSE;
10089 }
35c08157 10090
1c8f6a4d
KLC		 10091 em_irel->r_info =
10092 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10093 ptr_irel->r_addend = 1;
35c08157 10094
1c8f6a4d
KLC		 10095 /* Write instruction. */
10096 insn = INSN_J;
10097 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10098
1c8f6a4d
KLC		 10099 /* Clear relocations. */
10100 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10101
1c8f6a4d
KLC		 10102 /* If there is function cse, HI20 can not remove now. */
10103 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10104 R_NDS32_LONGJUMP4, laddr);
10105 if (call_irel == irelend)
10106 {
10107 *insn_len = 0;
10108 hi_irel->r_info =
10109 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10110 }
35c08157 10111
1c8f6a4d
KLC		 10112 return TRUE;
10113}
35c08157 10114
1c8f6a4d 10115/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10116
1c8f6a4d
KLC		 10117static bfd_boolean
10118nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10119 Elf_Internal_Rela *internal_relocs, int *insn_len,
10120 int *seq_len, bfd_byte *contents,
10121 Elf_Internal_Sym *isymbuf,
10122 Elf_Internal_Shdr *symtab_hdr)
10123{
10124 /* There are 2 variations for LONGJUMP5
10125 case 2-4; 1st insn convertible, 16-bit on.
10126 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10127 j label ; 25_PCREL/INSN16
10128 $1:
10129
10130 case 4-4; 1st insn not convertible
10131 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10132 j label ; 25_PCREL/INSN16
10133 .L1: */
10134
10135 bfd_vma laddr;
10136 Elf_Internal_Rela *cond_irel, *irelend;
10137 int pic_ext_target = 0;
10138 unsigned int i;
10139 bfd_signed_vma foff;
10140 uint32_t insn, re_insn = 0;
10141 uint16_t insn16, re_insn16 = 0;
10142 unsigned long reloc;
35c08157 10143
1c8f6a4d
KLC		 10144 enum elf_nds32_reloc_type checked_types[] =
10145 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10146 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10147
1c8f6a4d
KLC		 10148 irelend = internal_relocs + sec->reloc_count;
10149 laddr = irel->r_offset;
35c08157 10150
1c8f6a4d
KLC		 10151 /* Get the reloc for the address from which the register is
10152 being loaded. This reloc will tell us which function is
10153 actually being called. */
35c08157 10154
1c8f6a4d
KLC		 10155 cond_irel =
10156 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10157 R_NDS32_25_PCREL_RELA, irel->r_addend);
10158 if (cond_irel == irelend)
10159 {
695344c0 10160 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10161 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10162 return FALSE;
10163 }
35c08157 10164
1c8f6a4d
KLC		 10165 /* Get the value of the symbol referred to by the reloc. */
10166 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10167 &pic_ext_target);
35c08157 10168
1c8f6a4d
KLC		 10169 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10170 || foff >= CONSERVATIVE_16BIT_S1)
10171 return FALSE;
35c08157 10172
1c8f6a4d
KLC		 10173 /* Get the all corresponding instructions. */
10174 insn = bfd_getb32 (contents + laddr);
10175 /* Check instruction size. */
10176 if (insn & 0x80000000)
10177 {
10178 *seq_len = 0;
10179 insn16 = insn >> 16;
10180 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10181 }
10182 else
10183 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10184
1c8f6a4d
KLC		 10185 if (N32_OP6 (re_insn) == N32_OP6_BR1
10186 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10187 {
10188 /* beqs label ; 15_PCREL. */
10189 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10190 reloc = R_NDS32_15_PCREL_RELA;
10191 }
10192 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10193 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10194 {
10195 /* beqz label ; 17_PCREL. */
10196 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10197 reloc = R_NDS32_17_PCREL_RELA;
10198 }
10199 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10200 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10201 {
10202 /* beqc label ; 9_PCREL. */
10203 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10204 reloc = R_NDS32_WORD_9_PCREL_RELA;
10205 }
10206 else
10207 return FALSE;
35c08157 10208
1c8f6a4d
KLC		 10209 /* Set all relocations. */
10210 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10211
1c8f6a4d
KLC		 10212 /* Clean relocations. */
10213 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10214 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10215 {
10216 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10217 checked_types[i], laddr);
10218 if (cond_irel != irelend)
10219 {
10220 if (*seq_len == 0
10221 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10222 {
1c8f6a4d
KLC		 10223 /* If the branch instruction is 2 byte, it cannot remove
10224 directly. Only convert it to nop16 and remove it after
10225 checking alignment issue. */
10226 insn16 = NDS32_NOP16;
10227 bfd_putb16 (insn16, contents + laddr);
10228 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 10229 }
10230 else
1c8f6a4d
KLC		 10231 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10232 R_NDS32_NONE);
35c08157 10233 }
1c8f6a4d
KLC		 10234 }
10235 *insn_len = 0;
35c08157 10236
1c8f6a4d
KLC		 10237 return TRUE;
10238}
35c08157 10239
1c8f6a4d 10240/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10241
1c8f6a4d
KLC		 10242static bfd_boolean
10243nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10244 Elf_Internal_Rela *internal_relocs, int *insn_len,
10245 int *seq_len, bfd_byte *contents,
10246 Elf_Internal_Sym *isymbuf,
10247 Elf_Internal_Shdr *symtab_hdr)
10248{
10249 /* There are 5 variations for LONGJUMP6
10250 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10251 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10252 sethi ta, hi20(symbol) ; HI20/PTR
10253 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10254 jr ta ; PTR_RES/INSN16/EMPTY
10255 .L1:
10256
10257 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10258 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10259 sethi ta, hi20(symbol) ; HI20/PTR
10260 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10261 jr ta ; PTR_RES/INSN16/EMPTY
10262 .L1: */
10263
10264 enum elf_nds32_reloc_type checked_types[] =
10265 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10266 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10267
10268 int reloc_off = 0, cond_removed = 0;
10269 bfd_vma laddr;
10270 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10271 int pic_ext_target = 0;
10272 unsigned int i;
10273 bfd_signed_vma foff;
10274 uint32_t insn, re_insn = 0;
10275 uint16_t insn16, re_insn16 = 0;
10276 unsigned long reloc;
35c08157 10277
1c8f6a4d
KLC		 10278 irelend = internal_relocs + sec->reloc_count;
10279 laddr = irel->r_offset;
35c08157 10280
1c8f6a4d
KLC		 10281 /* Get the reloc for the address from which the register is
10282 being loaded. This reloc will tell us which function is
10283 actually being called. */
10284 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10285 R_NDS32_EMPTY, irel->r_addend);
35c08157 10286
1c8f6a4d
KLC		 10287 if (em_irel == irelend)
10288 {
695344c0 10289 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 10290 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10291 return FALSE;
10292 }
35c08157 10293
1c8f6a4d
KLC		 10294 /* Get the value of the symbol referred to by the reloc. */
10295 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10296 &pic_ext_target);
35c08157 10297
1c8f6a4d
KLC		 10298 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10299 || foff >= CONSERVATIVE_24BIT_S1)
10300 return FALSE;
35c08157 10301
1c8f6a4d
KLC		 10302 insn = bfd_getb32 (contents + laddr);
10303 /* Check instruction size. */
10304 if (insn & 0x80000000)
10305 {
10306 *seq_len = 0;
10307 insn16 = insn >> 16;
10308 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10309 }
10310 else
10311 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10312
1c8f6a4d
KLC		 10313 /* For simplicity of coding, we are going to modify the section
10314 contents, the section relocs, and the BFD symbol table. We
10315 must tell the rest of the code not to free up this
10316 information. It would be possible to instead create a table
10317 of changes which have to be made, as is done in coff-mips.c;
10318 that would be more work, but would require less memory when
10319 the linker is run. */
35c08157 10320
1c8f6a4d
KLC		 10321 if (N32_OP6 (re_insn) == N32_OP6_BR1
10322 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10323 {
10324 /* beqs label ; 15_PCREL */
10325 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10326 reloc = R_NDS32_15_PCREL_RELA;
10327 cond_removed = 1;
10328 }
10329 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10330 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10331 {
10332 /* beqz label ; 17_PCREL */
10333 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10334 reloc = R_NDS32_17_PCREL_RELA;
10335 cond_removed = 1;
10336 }
10337 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10338 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10339 {
10340 /* Relax to one of the following 2 variations
35c08157 10341
1c8f6a4d
KLC		 10342 case 2-4; 1st insn convertible, 16-bit on.
10343 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10344 j label ; 25_PCREL/INSN16
10345 $1:
35c08157 10346
1c8f6a4d
KLC		 10347 case 4-4; 1st insn not convertible
10348 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10349 j label ; 25_PCREL/INSN16
10350 .L1: */
35c08157 10351
1c8f6a4d
KLC		 10352 /* Use j label as second instruction. */
10353 insn = INSN_J;
10354 reloc = R_NDS32_25_PCREL_RELA;
10355 bfd_putb32 (insn, contents + em_irel->r_offset);
10356 }
10357 else
10358 return FALSE;
35c08157 10359
1c8f6a4d
KLC		 10360 /* Set all relocations. */
10361 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10362
1c8f6a4d
KLC		 10363 cond_irel =
10364 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10365 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10366 cond_irel->r_addend = 1;
35c08157 10367
1c8f6a4d
KLC		 10368 /* Use INSN16 of first branch instruction to distinguish if keeping
10369 INSN16 of final instruction or not. */
10370 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10371 R_NDS32_INSN16, irel->r_offset);
10372 if (insn_irel == irelend)
10373 {
10374 /* Clean the final INSN16. */
10375 insn_irel =
10376 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10377 R_NDS32_INSN16, em_irel->r_offset);
10378 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10379 R_NDS32_NONE);
10380 }
10381
10382 if (cond_removed == 1)
10383 {
10384 *insn_len = 0;
10385
10386 /* Clear relocations. */
10387 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10388
1c8f6a4d
KLC		 10389 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10390 {
10391 cond_irel =
10392 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10393 checked_types[i], laddr);
10394 if (cond_irel != irelend)
35c08157 10395 {
1c8f6a4d
KLC		 10396 if (*seq_len == 0
10397 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10398 {
10399 /* If the branch instruction is 2 byte, it cannot remove
10400 directly. Only convert it to nop16 and remove it after
10401 checking alignment issue. */
10402 insn16 = NDS32_NOP16;
10403 bfd_putb16 (insn16, contents + laddr);
10404 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10405 }
10406 else
10407 cond_irel->r_info =
10408 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10409 }
35c08157 10410 }
1c8f6a4d
KLC		 10411 }
10412 else
10413 {
10414 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10415 R_NDS32_LONGJUMP5);
10416 }
35c08157 10417
1c8f6a4d
KLC		 10418 return TRUE;
10419}
35c08157 10420
1c8f6a4d 10421/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10422
1c8f6a4d
KLC		 10423static bfd_boolean
10424nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10425 Elf_Internal_Rela *internal_relocs, int *insn_len,
10426 int *seq_len, bfd_byte *contents,
10427 Elf_Internal_Sym *isymbuf,
10428 Elf_Internal_Shdr *symtab_hdr)
10429{
10430 /* There are 2 variations for LONGJUMP5
10431 case 2-4; 1st insn convertible, 16-bit on.
10432 movi55 ta, imm11 ; LONGJUMP7/INSN16
10433 beq rt, ta, label ; 15_PCREL
10434
10435 case 4-4; 1st insn not convertible
10436 movi55 ta, imm11 ; LONGJUMP7/INSN16
10437 beq rt, ta, label ; 15_PCREL */
10438
10439 bfd_vma laddr;
10440 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10441 int pic_ext_target = 0;
10442 bfd_signed_vma foff;
10443 uint32_t insn, re_insn = 0;
10444 uint16_t insn16;
10445 uint32_t imm11;
35c08157 10446
1c8f6a4d
KLC		 10447 irelend = internal_relocs + sec->reloc_count;
10448 laddr = irel->r_offset;
35c08157 10449
1c8f6a4d
KLC		 10450 /* Get the reloc for the address from which the register is
10451 being loaded. This reloc will tell us which function is
10452 actually being called. */
35c08157 10453
1c8f6a4d
KLC		 10454 cond_irel =
10455 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10456 R_NDS32_15_PCREL_RELA, irel->r_addend);
10457 if (cond_irel == irelend)
10458 {
695344c0 10459 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 10460 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10461 return FALSE;
10462 }
35c08157 10463
1c8f6a4d
KLC		 10464 /* Get the value of the symbol referred to by the reloc. */
10465 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10466 &pic_ext_target);
35c08157 10467
1c8f6a4d
KLC		 10468 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10469 || foff >= CONSERVATIVE_8BIT_S1)
10470 return FALSE;
35c08157 10471
1c8f6a4d
KLC		 10472 /* Get the first instruction for its size. */
10473 insn = bfd_getb32 (contents + laddr);
10474 if (insn & 0x80000000)
10475 {
10476 *seq_len = 0;
10477 /* Get the immediate from movi55. */
10478 imm11 = N16_IMM5S (insn >> 16);
10479 }
10480 else
10481 {
10482 /* Get the immediate from movi. */
10483 imm11 = N32_IMM20S (insn);
35c08157
KLC		 10484 }
10485
1c8f6a4d
KLC		 10486 /* Get the branch instruction. */
10487 insn = bfd_getb32 (contents + irel->r_addend);
10488 /* Convert instruction to BR3. */
10489 if ((insn >> 14) & 0x1)
10490 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10491 else
10492 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10493
1c8f6a4d 10494 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10495
1c8f6a4d
KLC		 10496 /* Set all relocations. */
10497 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10498 R_NDS32_WORD_9_PCREL_RELA);
10499
10500 /* Clean relocations. */
10501 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10502 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10503 R_NDS32_INSN16, irel->r_offset);
10504 if (insn_irel != irelend)
10505 {
10506 if (*seq_len == 0)
35c08157 10507 {
1c8f6a4d
KLC		 10508 /* If the first insntruction is 16bit, convert it to nop16. */
10509 insn16 = NDS32_NOP16;
10510 bfd_putb16 (insn16, contents + laddr);
10511 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10512 }
1c8f6a4d
KLC		 10513 else
10514 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10515 R_NDS32_NONE);
35c08157 10516 }
1c8f6a4d 10517 *insn_len = 0;
35c08157 10518
1c8f6a4d
KLC		 10519 return TRUE;
10520}
35c08157 10521
1c8f6a4d 10522#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10523
1c8f6a4d 10524/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10525
1c8f6a4d
KLC		 10526static bfd_boolean
10527nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10528 asection *sec, Elf_Internal_Rela *irel,
10529 Elf_Internal_Rela *internal_relocs, int *insn_len,
10530 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10531 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10532{
6cae483a
AM		 10533 int eliminate_sethi = 0, range_type;
10534 unsigned int i;
1c8f6a4d
KLC		 10535 bfd_vma local_sda, laddr;
10536 int seq_len; /* Original length of instruction sequence. */
10537 uint32_t insn;
10538 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10539 bfd_vma access_addr = 0;
10540 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10541 enum elf_nds32_reloc_type checked_types[] =
10542 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10543 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10544 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10545 R_NDS32_TLS_LE_HI20
10546 };
35c08157 10547
1c8f6a4d
KLC		 10548 irelend = internal_relocs + sec->reloc_count;
10549 seq_len = GET_SEQ_LEN (irel->r_addend);
10550 laddr = irel->r_offset;
10551 *insn_len = seq_len;
35c08157 10552
1c8f6a4d 10553 /* Get the high part relocation. */
6cae483a 10554 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10555 {
10556 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10557 checked_types[i], laddr);
10558 if (hi_irelfn != irelend)
10559 break;
10560 }
35c08157 10561
1c8f6a4d
KLC		 10562 if (hi_irelfn == irelend)
10563 {
695344c0 10564 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
2dcf00ce 10565 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 10566 return FALSE;
10567 }
35c08157 10568
1c8f6a4d
KLC		 10569 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10570 nds32_elf_final_sda_base (sec->output_section->owner,
10571 link_info, &local_sda, FALSE);
35c08157 10572
1c8f6a4d
KLC		 10573 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10574 {
10575 case R_NDS32_HI20_RELA:
10576 insn = bfd_getb32 (contents + laddr);
10577 access_addr =
10578 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10579
10580 if (range_type == NDS32_LOADSTORE_IMM)
10581 {
10582 struct elf_link_hash_entry *h = NULL;
10583 int indx;
35c08157 10584
1c8f6a4d 10585 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10586 {
1c8f6a4d
KLC		 10587 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10588 h = elf_sym_hashes (abfd)[indx];
35c08157 10589 }
35c08157 10590
1c8f6a4d
KLC		 10591 if ((access_addr < CONSERVATIVE_20BIT)
10592 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10593 {
1c8f6a4d
KLC		 10594 eliminate_sethi = 1;
10595 break;
35c08157 10596 }
1c8f6a4d
KLC		 10597
10598 /* This is avoid to relax symbol address which is fixed
10599 relocations. Ex: _stack. */
10600 if (h && bfd_is_abs_section (h->root.u.def.section))
10601 return FALSE;
10602 }
10603
10604 if (!load_store_relax)
10605 return FALSE;
10606
10607 /* Case for set gp register. */
10608 if (N32_RT5 (insn) == REG_GP)
10609 break;
10610
10611 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 10612 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 10613 {
10614 range_l = sdata_range[0][0];
10615 range_h = sdata_range[0][1];
10616 }
10617 else
10618 {
10619 range_l = sdata_range[1][0];
10620 range_h = sdata_range[1][1];
10621 }
10622 break;
10623
10624 case R_NDS32_GOT_HI20:
10625 access_addr =
10626 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10627
10628 /* If this symbol is not in .got, the return value will be -1.
10629 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10630 a negative offset is allowed. */
10631 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10632 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10633 eliminate_sethi = 1;
10634 break;
10635
10636 case R_NDS32_PLT_GOTREL_HI20:
10637 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10638 hi_irelfn, symtab_hdr);
10639
10640 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10641 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10642 eliminate_sethi = 1;
10643 break;
10644
10645 case R_NDS32_GOTOFF_HI20:
10646 access_addr =
10647 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10648
10649 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10650 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10651 eliminate_sethi = 1;
10652 break;
10653
10654 case R_NDS32_GOTPC_HI20:
10655 /* The access_addr must consider r_addend of hi_irel. */
10656 access_addr = sec->output_section->vma + sec->output_offset
10657 + irel->r_offset + hi_irelfn->r_addend;
10658
10659 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10660 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10661 eliminate_sethi = 1;
10662 break;
10663
10664 case R_NDS32_TLS_LE_HI20:
10665 access_addr =
10666 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10667 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10668 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10669 if ((range_type == NDS32_LOADSTORE_IMM)
10670 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10671 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10672 eliminate_sethi = 1;
10673 break;
10674
10675 default:
10676 return FALSE;
10677 }
10678
10679 /* Delete sethi instruction. */
10680 if (eliminate_sethi == 1
10681 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10682 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10683 {
10684 hi_irelfn->r_info =
10685 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10686 irel->r_info =
10687 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10688 *insn_len = 0;
10689 }
10690 return TRUE;
10691}
10692
10693/* Relax LO12 relocation for nds32_elf_relax_section. */
10694
10695static void
10696nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10697 asection *sec, Elf_Internal_Rela *irel,
10698 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10699 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10700{
10701 uint32_t insn;
10702 bfd_vma local_sda, laddr;
10703 unsigned long reloc;
10704 bfd_vma access_addr;
10705 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10706 Elf_Internal_Rela *irelfn = NULL, *irelend;
10707 struct elf_link_hash_entry *h = NULL;
10708 int indx;
10709
10710 /* For SDA base relative relaxation. */
10711 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10712 &local_sda, FALSE);
10713
10714 irelend = internal_relocs + sec->reloc_count;
10715 laddr = irel->r_offset;
10716 insn = bfd_getb32 (contents + laddr);
10717
10718 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10719 return;
10720
10721 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10722
10723 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10724 {
10725 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10726 h = elf_sym_hashes (abfd)[indx];
10727 }
10728
10729 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10730 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10731 {
10732 reloc = R_NDS32_20_RELA;
10733 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10734 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10735 bfd_putb32 (insn, contents + laddr);
10736 }
10737 /* This is avoid to relax symbol address which is fixed
10738 relocations. Ex: _stack. */
10739 else if (N32_OP6 (insn) == N32_OP6_ORI
10740 && h && bfd_is_abs_section (h->root.u.def.section))
10741 return;
10742 else
10743 {
10744 range_l = sdata_range[1][0];
10745 range_h = sdata_range[1][1];
10746 switch (ELF32_R_TYPE (irel->r_info))
10747 {
10748 case R_NDS32_LO12S0_RELA:
10749 reloc = R_NDS32_SDA19S0_RELA;
10750 break;
10751 case R_NDS32_LO12S1_RELA:
10752 reloc = R_NDS32_SDA18S1_RELA;
10753 break;
10754 case R_NDS32_LO12S2_RELA:
10755 reloc = R_NDS32_SDA17S2_RELA;
10756 break;
10757 case R_NDS32_LO12S2_DP_RELA:
10758 range_l = sdata_range[0][0];
10759 range_h = sdata_range[0][1];
10760 reloc = R_NDS32_SDA12S2_DP_RELA;
10761 break;
10762 case R_NDS32_LO12S2_SP_RELA:
10763 range_l = sdata_range[0][0];
10764 range_h = sdata_range[0][1];
10765 reloc = R_NDS32_SDA12S2_SP_RELA;
10766 break;
10767 default:
10768 return;
10769 }
10770
10771 /* There are range_h and range_l because linker has to promise
10772 all sections move cross one page together. */
10773 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10774 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10775 {
10776 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 10777 {
1c8f6a4d
KLC		 10778 /* Maybe we should add R_NDS32_INSN16 reloc type here
10779 or manually do some optimization. sethi can't be
10780 eliminated when updating $gp so the relative ori
10781 needs to be preserved. */
10782 return;
35c08157 10783 }
1c8f6a4d
KLC		 10784 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10785 &insn))
10786 return;
10787 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10788 bfd_putb32 (insn, contents + laddr);
10789
10790 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10791 R_NDS32_INSN16);
10792 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10793 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10794 irelfn->r_info =
10795 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10796
35c08157 10797 }
1c8f6a4d
KLC		 10798 }
10799 return;
10800}
35c08157 10801
1c8f6a4d
KLC		 10802/* Relax low part of PIC instruction pattern. */
10803
10804static void
10805nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10806 asection *sec, Elf_Internal_Rela *irel,
10807 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10808 Elf_Internal_Shdr *symtab_hdr)
10809{
10810 uint32_t insn;
10811 bfd_vma local_sda, laddr;
10812 bfd_signed_vma foff;
10813 unsigned long reloc;
10814
10815 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10816 &local_sda, FALSE);
10817 laddr = irel->r_offset;
10818 insn = bfd_getb32 (contents + laddr);
10819
10820 if (N32_OP6 (insn) != N32_OP6_ORI)
10821 return;
10822
10823 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10824 {
10825 foff = calculate_got_memory_address (abfd, link_info, irel,
10826 symtab_hdr) - local_sda;
10827 reloc = R_NDS32_GOT20;
10828 }
10829 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10830 {
10831 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10832 symtab_hdr) - local_sda;
10833 reloc = R_NDS32_PLT_GOTREL_LO20;
10834 }
10835 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10836 {
10837 foff = calculate_memory_address (abfd, irel, isymbuf,
10838 symtab_hdr) - local_sda;
10839 reloc = R_NDS32_GOTOFF;
10840 }
10841 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10842 {
10843 foff = local_sda - sec->output_section->vma + sec->output_offset
10844 + irel->r_offset + irel->r_addend;
10845 reloc = R_NDS32_GOTPC20;
10846 }
10847 else
10848 return;
10849
10850 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10851 {
10852 /* Turn into MOVI. */
10853 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10854 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10855 bfd_putb32 (insn, contents + laddr);
10856 }
10857}
10858
10859/* Relax low part of LE TLS instruction pattern. */
10860
10861static void
10862nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10863 Elf_Internal_Rela *irel,
10864 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10865 Elf_Internal_Shdr *symtab_hdr)
10866{
10867 uint32_t insn;
10868 bfd_vma laddr;
10869 bfd_signed_vma foff;
10870 unsigned long reloc;
10871
10872 laddr = irel->r_offset;
10873 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10874 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10875 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10876 insn = bfd_getb32 (contents + laddr);
10877
10878 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10879 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10880 {
10881 /* Pattern sethi-ori transform to movi. */
10882 reloc = R_NDS32_TLS_LE_20;
10883 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10884 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10885 bfd_putb32 (insn, contents + laddr);
10886 }
10887}
10888
10889/* Relax LE TLS calculate address instruction pattern. */
10890
10891static void
10892nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10893 asection *sec, Elf_Internal_Rela *irel,
10894 Elf_Internal_Rela *internal_relocs,
10895 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10896 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10897{
10898 /* Local TLS non-pic
07d6d2b8 10899 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
1c8f6a4d 10900 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
07d6d2b8 10901 add ra, ta, tp ; TLS_LE_ADD */
1c8f6a4d
KLC		 10902
10903 uint32_t insn;
10904 bfd_vma laddr;
10905 bfd_signed_vma foff;
10906 Elf_Internal_Rela *i1_irelfn, *irelend;
10907
10908 irelend = internal_relocs + sec->reloc_count;
10909 laddr = irel->r_offset;
10910 insn = bfd_getb32 (contents + laddr);
10911 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10912 R_NDS32_PTR_RESOLVED);
10913 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10914 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10915 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10916
10917 /* The range is +/-16k. */
10918 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10919 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10920 {
10921 /* Transform add to addi. */
10922 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10923 irel->r_info =
10924 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10925
10926 bfd_putb32 (insn, contents + laddr);
10927 if (i1_irelfn != irelend)
10928 {
10929 i1_irelfn->r_addend |= 1;
10930 *again = TRUE;
10931 }
10932 }
10933}
10934
10935/* Relax LE TLS load store instruction pattern. */
10936
10937static void
10938nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10939 asection *sec, Elf_Internal_Rela *irel,
10940 Elf_Internal_Rela *internal_relocs,
10941 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10942 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10943{
10944
10945 uint32_t insn;
10946 bfd_vma laddr;
10947 bfd_signed_vma foff;
10948 Elf_Internal_Rela *i1_irelfn, *irelend;
10949 int success = 0;
10950
10951 irelend = internal_relocs + sec->reloc_count;
10952 laddr = irel->r_offset;
10953 insn = bfd_getb32 (contents + laddr);
10954 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10955 R_NDS32_PTR_RESOLVED);
10956 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10957 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10958 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10959
10960 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10961 {
10962 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10963 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10964 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10965 /* The range is +/-16k. */
10966 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10967 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10968 {
10969 insn =
10970 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10971 irel->r_info =
10972 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10973 success = 1;
10974 break;
10975 }
1a0670f3 10976 /* Fall through. */
1c8f6a4d
KLC		 10977 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10978 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10979 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10980 /* The range is +/-32k. */
10981 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10982 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 10983 {
1c8f6a4d
KLC		 10984 insn =
10985 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10986 irel->r_info =
10987 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
10988 success = 1;
10989 break;
10990 }
1a0670f3 10991 /* Fall through. */
1c8f6a4d
KLC		 10992 case (N32_OP6_MEM << 8) | N32_MEM_LW:
10993 case (N32_OP6_MEM << 8) | N32_MEM_SW:
10994 /* The range is +/-64k. */
10995 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
10996 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
10997 {
10998 insn =
10999 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11000 irel->r_info =
11001 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11002 success = 1;
11003 break;
11004 }
1a0670f3 11005 /* Fall through. */
1c8f6a4d
KLC		 11006 default:
11007 break;
11008 }
35c08157 11009
1c8f6a4d
KLC		 11010 if (success)
11011 {
11012 bfd_putb32 (insn, contents + laddr);
11013 if (i1_irelfn != irelend)
11014 {
11015 i1_irelfn->r_addend |= 1;
11016 *again = TRUE;
11017 }
11018 }
11019}
35c08157 11020
1c8f6a4d 11021/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11022
1c8f6a4d
KLC		 11023static bfd_boolean
11024nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11025 Elf_Internal_Rela *internal_relocs, int *insn_len,
11026 int *seq_len, bfd_byte *contents)
11027{
11028 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11029
1c8f6a4d 11030 irelend = internal_relocs + sec->reloc_count;
35c08157 11031
1c8f6a4d
KLC		 11032 re_irel =
11033 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11034 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11035
1c8f6a4d
KLC		 11036 if (re_irel == irelend)
11037 {
695344c0 11038 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11039 (uint64_t) irel->r_offset);
1c8f6a4d
KLC		 11040 return FALSE;
11041 }
35c08157 11042
1c8f6a4d
KLC		 11043 if (re_irel->r_addend != 1)
11044 return FALSE;
35c08157 11045
1c8f6a4d
KLC		 11046 /* Pointed target is relaxed and no longer needs this void *,
11047 change the type to NONE. */
11048 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11049
1c8f6a4d
KLC		 11050 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11051 not exist, it means only count 1 and remove it directly. */
11052 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11053 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11054 R_NDS32_PTR_COUNT);
11055 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11056 R_NDS32_PTR);
11057 if (count_irel != irelend)
11058 {
11059 if (--count_irel->r_addend > 0)
11060 return FALSE;
11061 }
11062
11063 if (ptr_irel != irelend)
11064 return FALSE;
11065
11066 /* If the PTR_COUNT is already 0, remove current instruction. */
11067 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11068 *insn_len = 0;
11069 return TRUE;
11070}
11071
11072/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11073
11074static void
11075nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11076 asection *sec, Elf_Internal_Rela *irel,
11077 Elf_Internal_Rela *internal_relocs,
11078 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11079 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11080{
11081 uint32_t insn;
11082 bfd_signed_vma foff;
11083 Elf_Internal_Rela *i1_irelfn, *irelend;
11084 bfd_vma local_sda, laddr;
11085
11086 irelend = internal_relocs + sec->reloc_count;
11087 laddr = irel->r_offset;
11088 insn = bfd_getb32 (contents + laddr);
11089
11090 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11091 we need additional space. It might be help if we could
11092 borrow some space from instructions to be eliminated
11093 such as sethi, ori, add. */
11094 if (insn & 0x80000000)
11095 return;
11096
11097 if (nds32_elf_check_dup_relocs
11098 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11099 return;
11100
11101 i1_irelfn =
11102 find_relocs_at_address (irel, internal_relocs, irelend,
11103 R_NDS32_PTR_RESOLVED);
11104
11105 /* FIXIT 090606
11106 The boundary should be reduced since the .plt section hasn't
11107 been created and the address of specific entry is still unknown
11108 Maybe the range between the function call and the begin of the
11109 .text section can be used to decide if the .plt is in the range
11110 of function call. */
11111
11112 if (N32_OP6 (insn) == N32_OP6_ALU1
11113 && N32_SUB5 (insn) == N32_ALU1_ADD)
11114 {
11115 /* Get the value of the symbol referred to by the reloc. */
11116 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11117 &local_sda, FALSE);
11118 foff = (bfd_signed_vma) (calculate_plt_memory_address
11119 (abfd, link_info, isymbuf, irel,
11120 symtab_hdr) - local_sda);
11121 /* This condition only happened when symbol is undefined. */
11122 if (foff == 0)
11123 return;
11124
11125 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11126 return;
11127 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11128 R_NDS32_PLT_GOTREL_LO19);
11129 /* addi.gp */
4ec521f2 11130 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11131 }
11132 else if (N32_OP6 (insn) == N32_OP6_JREG
11133 && N32_SUB5 (insn) == N32_JREG_JRAL)
11134 {
11135 /* Get the value of the symbol referred to by the reloc. */
11136 foff =
11137 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11138 /* This condition only happened when symbol is undefined. */
11139 if (foff == 0)
11140 return;
11141 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11142 return;
11143 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11144 insn = INSN_JAL;
11145 }
11146 else
11147 return;
11148
11149 bfd_putb32 (insn, contents + laddr);
11150 if (i1_irelfn != irelend)
11151 {
11152 i1_irelfn->r_addend |= 1;
11153 *again = TRUE;
11154 }
11155}
11156
11157/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11158
11159static void
11160nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11161 asection *sec, Elf_Internal_Rela *irel,
11162 Elf_Internal_Rela *internal_relocs,
11163 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11164 bfd_boolean *again)
11165{
11166 uint32_t insn;
11167 bfd_signed_vma foff;
11168 Elf_Internal_Rela *i1_irelfn, *irelend;
11169 bfd_vma local_sda, laddr;
11170
11171 irelend = internal_relocs + sec->reloc_count;
11172 laddr = irel->r_offset;
11173 insn = bfd_getb32 (contents + laddr);
11174 if (insn & 0x80000000)
11175 return;
11176
11177 if (nds32_elf_check_dup_relocs
11178 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11179 return;
11180
11181 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11182 R_NDS32_PTR_RESOLVED);
11183
11184 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11185 &local_sda, FALSE);
11186 foff = calculate_got_memory_address (abfd, link_info, irel,
11187 symtab_hdr) - local_sda;
11188
11189 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11190 {
11191 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11192 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11193 irel->r_info =
11194 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11195 bfd_putb32 (insn, contents + laddr);
11196 if (i1_irelfn != irelend)
11197 {
11198 i1_irelfn->r_addend |= 1;
11199 *again = TRUE;
11200 }
11201 }
11202}
11203
11204/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11205
11206static void
11207nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11208 asection *sec, Elf_Internal_Rela *irel,
11209 Elf_Internal_Rela *internal_relocs,
11210 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11211 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11212{
11213 int opc_insn_gotoff;
11214 uint32_t insn;
11215 bfd_signed_vma foff;
11216 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11217 bfd_vma local_sda, laddr;
11218
11219 irelend = internal_relocs + sec->reloc_count;
11220 laddr = irel->r_offset;
11221 insn = bfd_getb32 (contents + laddr);
11222
11223 if (insn & 0x80000000)
11224 return;
11225
11226 if (nds32_elf_check_dup_relocs
11227 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11228 return;
11229
11230 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11231 R_NDS32_PTR_RESOLVED);
11232 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11233 &local_sda, FALSE);
11234 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11235 foff = foff - local_sda;
11236
11237 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11238 return;
11239
11240 /* Concatenate opcode and sub-opcode for switch case.
11241 It may be MEM or ALU1. */
11242 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11243 switch (opc_insn_gotoff)
11244 {
11245 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11246 /* 4-byte aligned. */
11247 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11248 irel->r_info =
11249 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11250 break;
11251 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11252 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11253 irel->r_info =
11254 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11255 break;
11256 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11257 /* 2-byte aligned. */
11258 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11259 irel->r_info =
11260 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11261 break;
11262 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
4ec521f2 11263 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
1c8f6a4d
KLC		 11264 irel->r_info =
11265 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11266 break;
11267 case (N32_OP6_MEM << 8) | N32_MEM_SH:
4ec521f2 11268 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11269 irel->r_info =
11270 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11271 break;
11272 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11273 /* 1-byte aligned. */
11274 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11275 irel->r_info =
11276 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11277 break;
11278 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
4ec521f2 11279 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11280 irel->r_info =
11281 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11282 break;
11283 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11284 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11285 irel->r_info =
11286 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11287 break;
11288 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
4ec521f2 11289 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC		 11290 irel->r_info =
11291 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11292 break;
11293 default:
11294 return;
11295 }
11296
11297 bfd_putb32 (insn, contents + laddr);
11298 if (i1_irelfn != irelend)
11299 {
11300 i1_irelfn->r_addend |= 1;
11301 *again = TRUE;
11302 }
11303 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11304 R_NDS32_INSN16)) != irelend)
11305 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11306
11307}
11308
11309static bfd_boolean
11310nds32_relax_adjust_label (bfd *abfd, asection *sec,
11311 Elf_Internal_Rela *internal_relocs,
11312 bfd_byte *contents,
11313 nds32_elf_blank_t **relax_blank_list,
11314 int optimize, int opt_size)
11315{
11316 /* This code block is used to adjust 4-byte alignment by relax a pair
11317 of instruction a time.
11318
11319 It recognizes three types of relocations.
de194d85 11320 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11321 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11322 3. is_16bit_NOP () - remove a 16-bit instruction. */
11323
de194d85
YC		 11324 /* TODO: It seems currently implementation only support 4-byte alignment.
11325 We should handle any-alignment. */
1c8f6a4d
KLC		 11326
11327 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11328 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11329 Elf_Internal_Rela rel_temp;
11330 Elf_Internal_Rela *irelend;
11331 bfd_vma address;
11332 uint16_t insn16;
11333
11334 /* Checking for branch relaxation relies on the relocations to
11335 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11336 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11337 sizeof (Elf_Internal_Rela), compar_reloc);
11338
11339 irelend = internal_relocs + sec->reloc_count;
11340
11341 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11342 /* FIXME: Can we generate the right order in assembler?
11343 So we don't have to swapping them here. */
11344
11345 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11346 label_rel < irelend; label_rel++)
11347 {
11348 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11349 continue;
11350
11351 /* Find the first reloc has the same offset with label_rel. */
11352 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11353 insn_rel++;
11354
11355 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11356 insn_rel++)
11357 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11358 address. */
11359 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11360 break;
11361
11362 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11363 && insn_rel < label_rel)
11364 {
11365 /* Swap the two reloc if the R_NDS32_INSN16 is
11366 before R_NDS32_LABEL. */
11367 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11368 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11369 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11370 }
11371 }
11372
11373 label_rel = NULL;
11374 insn_rel = NULL;
11375 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11376 or higher, remove other R_NDS32_LABEL with lower alignment.
11377 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11378 then the R_NDS32_LABEL sequence is broke. */
11379 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11380 {
11381 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11382 {
11383 if (label_rel == NULL)
11384 {
11385 if (tmp_rel->r_addend < 2)
11386 label_rel = tmp_rel;
11387 continue;
11388 }
11389 else if (tmp_rel->r_addend > 1)
11390 {
11391 /* Remove all LABEL relocation from label_rel to tmp_rel
11392 including relocations with same offset as tmp_rel. */
11393 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11394 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11395 {
11396 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11397 && tmp2_rel->r_addend < 2)
11398 tmp2_rel->r_info =
11399 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11400 R_NDS32_NONE);
11401 }
11402 label_rel = NULL;
11403 }
11404 }
11405 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11406 {
11407 /* A new INSN16 which can be converted, so clear label_rel. */
11408 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11409 irelend, &insn16)
11410 || is_16bit_NOP (abfd, sec, tmp_rel))
11411 label_rel = NULL;
11412 }
11413 }
11414
11415 label_rel = NULL;
11416 insn_rel = NULL;
11417 /* Optimized for speed and nothing has not been relaxed.
11418 It's time to align labels.
11419 We may convert a 16-bit instruction right before a label to
11420 32-bit, in order to align the label if necessary
11421 all reloc entries has been sorted by r_offset. */
11422 for (irel = internal_relocs; irel < irelend; irel++)
11423 {
11424 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11425 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11426 continue;
11427
11428 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11429 {
11430 /* A new INSN16 found, resize the old one. */
11431 if (is_convert_32_to_16
11432 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11433 || is_16bit_NOP (abfd, sec, irel))
11434 {
11435 if (insn_rel)
11436 {
11437 /* Previous INSN16 reloc exists, reduce its
11438 size to 16-bit. */
11439 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11440 irelend, &insn16))
35c08157 11441 {
1c8f6a4d
KLC		 11442 nds32_elf_write_16 (abfd, contents, insn_rel,
11443 internal_relocs, irelend, insn16);
11444
11445 if (!insert_nds32_elf_blank_recalc_total
11446 (relax_blank_list, insn_rel->r_offset + 2, 2))
11447 return FALSE;
11448 }
11449 else if (is_16bit_NOP (abfd, sec, insn_rel))
11450 {
11451 if (!insert_nds32_elf_blank_recalc_total
11452 (relax_blank_list, insn_rel->r_offset, 2))
11453 return FALSE;
11454 }
11455 insn_rel->r_info =
11456 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11457 }
11458 /* Save the new one for later use. */
11459 insn_rel = irel;
11460 }
11461 else
11462 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11463 R_NDS32_NONE);
11464 }
11465 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11466 {
11467 /* Search for label. */
11468 int force_relax = 0;
11469
11470 /* Label on 16-bit instruction or optimization
11471 needless, just reset this reloc. */
11472 insn16 = bfd_getb16 (contents + irel->r_offset);
11473 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11474 {
11475 irel->r_info =
11476 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11477 continue;
11478 }
11479
11480 address =
11481 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11482 irel->r_offset, 1);
11483
11484 if (!insn_rel)
11485 {
11486 /* Check if there is case which can not be aligned. */
11487 if (irel->r_addend == 2 && address & 0x2)
11488 return FALSE;
11489 continue;
11490 }
11491
11492 /* Try to align this label. */
11493
11494 if ((irel->r_addend & 0x1f) < 2)
11495 {
11496 /* Check if there is a INSN16 at the same address.
11497 Label_rel always seats before insn_rel after
11498 our sort. */
11499
11500 /* Search for INSN16 at LABEL location. If INSN16 is at
11501 same location and this LABEL alignment is lower than 2,
11502 the INSN16 can be converted to 2-byte. */
11503 for (tmp_rel = irel;
11504 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11505 tmp_rel++)
11506 {
11507 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11508 && (is_convert_32_to_16
11509 (abfd, sec, tmp_rel, internal_relocs,
11510 irelend, &insn16)
11511 || is_16bit_NOP (abfd, sec, tmp_rel)))
11512 {
11513 force_relax = 1;
11514 break;
11515 }
11516 }
11517 }
11518
11519 if (force_relax || irel->r_addend == 1 || address & 0x2)
11520 {
11521 /* Label not aligned. */
11522 /* Previous reloc exists, reduce its size to 16-bit. */
11523 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11524 internal_relocs, irelend, &insn16))
11525 {
11526 nds32_elf_write_16 (abfd, contents, insn_rel,
11527 internal_relocs, irelend, insn16);
11528
11529 if (!insert_nds32_elf_blank_recalc_total
11530 (relax_blank_list, insn_rel->r_offset + 2, 2))
11531 return FALSE;
11532 }
11533 else if (is_16bit_NOP (abfd, sec, insn_rel))
11534 {
11535 if (!insert_nds32_elf_blank_recalc_total
11536 (relax_blank_list, insn_rel->r_offset, 2))
11537 return FALSE;
11538 }
11539
11540 }
11541 /* INSN16 reloc is used. */
11542 insn_rel = NULL;
11543 }
11544 }
11545
11546 address =
11547 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11548 if (insn_rel && (address & 0x2 || opt_size))
11549 {
11550 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11551 irelend, &insn16))
11552 {
11553 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11554 irelend, insn16);
11555 if (!insert_nds32_elf_blank_recalc_total
11556 (relax_blank_list, insn_rel->r_offset + 2, 2))
11557 return FALSE;
11558 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11559 R_NDS32_NONE);
11560 }
11561 else if (is_16bit_NOP (abfd, sec, insn_rel))
11562 {
11563 if (!insert_nds32_elf_blank_recalc_total
11564 (relax_blank_list, insn_rel->r_offset, 2))
11565 return FALSE;
11566 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11567 R_NDS32_NONE);
11568 }
11569 }
11570 insn_rel = NULL;
11571 return TRUE;
11572}
11573
11574/* Pick relaxation round. */
11575
11576static int
11577nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11578 struct elf_nds32_link_hash_table *table,
11579 struct bfd_link_info *link_info)
11580{
18393a2e
KLC		 11581 static asection *final_sec, *first_sec = NULL;
11582 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC		 11583 static bfd_boolean set = FALSE;
11584 static bfd_boolean first = TRUE;
11585 int round_table[] = {
11586 NDS32_RELAX_NORMAL_ROUND,
11587 NDS32_RELAX_JUMP_IFC_ROUND,
11588 NDS32_RELAX_EX9_BUILD_ROUND,
11589 NDS32_RELAX_EX9_REPLACE_ROUND,
11590 };
11591 static int pass = 0;
11592 static int relax_round;
11593
18393a2e
KLC		 11594 /* The new round. */
11595 if (init && first_sec == sec)
11596 {
11597 set = TRUE;
11598 normal_again = FALSE;
11599 }
11600
1c8f6a4d
KLC		 11601 if (first)
11602 {
11603 /* Run an empty run to get the final section. */
11604 relax_round = NDS32_RELAX_EMPTY_ROUND;
11605
11606 /* It has to enter relax again because we can
11607 not make sure what the final turn is. */
11608 *again = TRUE;
18393a2e 11609
1c8f6a4d 11610 first = FALSE;
18393a2e 11611 first_sec = sec;
1c8f6a4d
KLC		 11612 }
11613
18393a2e 11614 if (!set)
1c8f6a4d 11615 {
18393a2e 11616 /* Not reenter yet. */
1c8f6a4d
KLC		 11617 final_sec = sec;
11618 return relax_round;
11619 }
11620
1c8f6a4d
KLC		 11621 relax_round = round_table[pass];
11622
18393a2e
KLC		 11623 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11624 normal_again = TRUE;
11625
1c8f6a4d
KLC		 11626 if (!init && final_sec == sec)
11627 {
11628 switch (relax_round)
11629 {
11630 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11631 if (!normal_again)
1c8f6a4d
KLC		 11632 {
11633 /* Normal relaxation done. */
11634 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11635 {
11636 pass++;
11637 *again = TRUE;
11638 }
11639 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11640 {
11641 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11642 *again = TRUE;
11643 }
11644 else if (table->ex9_import_file)
11645 {
11646 /* Import ex9 table. */
11647 if (table->update_ex9_table)
11648 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11649 else
11650 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11651 nds32_elf_ex9_import_table (link_info);
11652 *again = TRUE;
11653 }
11654 }
11655 break;
11656 case NDS32_RELAX_JUMP_IFC_ROUND:
11657 if (!nds32_elf_ifc_finish (link_info))
38f14ab8 11658 _bfd_error_handler (_("error: jump IFC fail"));
1c8f6a4d
KLC		 11659 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11660 {
11661 pass++;
11662 *again = TRUE;
11663 }
11664 break;
11665 case NDS32_RELAX_EX9_BUILD_ROUND:
11666 nds32_elf_ex9_finish (link_info);
11667 pass++;
11668 *again = TRUE;
11669 break;
11670 case NDS32_RELAX_EX9_REPLACE_ROUND:
11671 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11672 {
11673 /* Do jump IFC optimization again. */
11674 if (!nds32_elf_ifc_finish (link_info))
38f14ab8 11675 _bfd_error_handler (_("error: jump IFC fail"));
1c8f6a4d
KLC		 11676 }
11677 break;
11678 default:
11679 break;
11680 }
11681 }
11682
11683 return relax_round;
11684}
11685
11686static bfd_boolean
11687nds32_elf_relax_section (bfd *abfd, asection *sec,
11688 struct bfd_link_info *link_info, bfd_boolean *again)
11689{
11690 nds32_elf_blank_t *relax_blank_list = NULL;
11691 Elf_Internal_Shdr *symtab_hdr;
11692 Elf_Internal_Rela *internal_relocs;
11693 Elf_Internal_Rela *irel;
11694 Elf_Internal_Rela *irelend;
11695 Elf_Internal_Sym *isymbuf = NULL;
11696 bfd_byte *contents = NULL;
11697 bfd_boolean result = TRUE;
11698 int optimize = 0;
11699 int opt_size = 0;
11700 uint32_t insn;
11701 uint16_t insn16;
11702
11703 /* Target dependnet option. */
11704 struct elf_nds32_link_hash_table *table;
11705 int load_store_relax;
11706 int relax_round;
11707
11708 relax_blank_list = NULL;
11709
11710 *again = FALSE;
11711
11712 /* Nothing to do for
11713 * relocatable link or
11714 * non-relocatable section or
11715 * non-code section or
11716 * empty content or
11717 * no reloc entry. */
0e1862bb 11718 if (bfd_link_relocatable (link_info)
1c8f6a4d 11719 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 11720 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d
KLC		 11721 || (sec->flags & SEC_CODE) == 0
11722 || sec->size == 0)
11723 return TRUE;
11724
11725 /* 09.12.11 Workaround. */
11726 /* We have to adjust align for R_NDS32_LABEL if needed.
11727 The adjust approach only can fix 2-byte align once. */
11728 if (sec->alignment_power > 2)
11729 return TRUE;
11730
11731 /* The optimization type to do. */
11732
11733 table = nds32_elf_hash_table (link_info);
11734 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11735 switch (relax_round)
11736 {
11737 case NDS32_RELAX_JUMP_IFC_ROUND:
11738 /* Here is the entrance of ifc jump relaxation. */
11739 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11740 return FALSE;
11741 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11742 return TRUE;
11743
11744 case NDS32_RELAX_EX9_BUILD_ROUND:
11745 /* Here is the entrance of ex9 relaxation. There are two pass of
11746 ex9 relaxation. The one is to traverse all instructions and build
11747 the hash table. The other one is to compare instructions and replace
11748 it by ex9.it. */
11749 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
11750 return FALSE;
11751 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11752 return TRUE;
11753
11754 case NDS32_RELAX_EX9_REPLACE_ROUND:
11755 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
11756 return FALSE;
11757 return TRUE;
11758
11759 case NDS32_RELAX_EMPTY_ROUND:
11760 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11761 return TRUE;
11762
11763 case NDS32_RELAX_NORMAL_ROUND:
11764 default:
11765 if (sec->reloc_count == 0)
11766 return TRUE;
11767 break;
11768 }
11769
11770 /* The begining of general relaxation. */
11771
11772 if (is_SDA_BASE_set == 0)
11773 {
11774 bfd_vma gp;
11775 is_SDA_BASE_set = 1;
11776 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11777 &gp, FALSE);
11778 relax_range_measurement (abfd);
11779 }
11780
11781 if (is_ITB_BASE_set == 0)
11782 {
11783 /* Set the _ITB_BASE_. */
11784 if (!nds32_elf_ex9_itb_base (link_info))
11785 {
38f14ab8
AM		 11786 _bfd_error_handler (_("%pB: error: cannot set %s"),
11787 abfd, "_ITB_BASE_");
1c8f6a4d
KLC		 11788 bfd_set_error (bfd_error_bad_value);
11789 }
11790 }
11791
11792 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11793 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11794 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11795 TRUE /* keep_memory */);
11796 if (internal_relocs == NULL)
11797 goto error_return;
11798
11799 irelend = internal_relocs + sec->reloc_count;
11800 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11801 irelend, R_NDS32_RELAX_ENTRY);
11802
11803 if (irel == irelend)
11804 return TRUE;
11805
11806 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11807 {
11808 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC		 11809 {
11810 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11811 return TRUE;
11812 }
1c8f6a4d
KLC		 11813
11814 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11815 optimize = 1;
11816
11817 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11818 opt_size = 1;
11819 }
11820
11821 load_store_relax = table->load_store_relax;
11822
11823 /* Get symbol table and section content. */
0c4bd9d9 11824 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC		 11825 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11826 goto error_return;
11827
11828 /* Do relax loop only when finalize is not done.
11829 Take care of relaxable relocs except INSN16. */
11830 for (irel = internal_relocs; irel < irelend; irel++)
11831 {
11832 int seq_len; /* Original length of instruction sequence. */
11833 int insn_len = 0; /* Final length of instruction sequence. */
11834 bfd_boolean removed;
11835
11836 insn = 0;
11837 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11838 && (irel->r_addend & 0x1f) >= 2)
11839 optimize = 1;
11840
11841 /* Relocation Types
11842 R_NDS32_LONGCALL1 53
11843 R_NDS32_LONGCALL2 54
11844 R_NDS32_LONGCALL3 55
11845 R_NDS32_LONGJUMP1 56
11846 R_NDS32_LONGJUMP2 57
11847 R_NDS32_LONGJUMP3 58
11848 R_NDS32_LOADSTORE 59 */
11849 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11850 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11851 seq_len = GET_SEQ_LEN (irel->r_addend);
11852
11853 /* Relocation Types
11854 R_NDS32_LONGCALL4 107
11855 R_NDS32_LONGCALL5 108
11856 R_NDS32_LONGCALL6 109
11857 R_NDS32_LONGJUMP4 110
11858 R_NDS32_LONGJUMP5 111
11859 R_NDS32_LONGJUMP6 112
11860 R_NDS32_LONGJUMP7 113 */
11861 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11862 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11863 seq_len = 4;
11864
11865 /* Relocation Types
11866 R_NDS32_LO12S0_RELA 30
11867 R_NDS32_LO12S1_RELA 29
11868 R_NDS32_LO12S2_RELA 28
11869 R_NDS32_LO12S2_SP_RELA 71
11870 R_NDS32_LO12S2_DP_RELA 70
11871 R_NDS32_GOT_LO12 46
11872 R_NDS32_GOTOFF_LO12 50
11873 R_NDS32_PLTREL_LO12 65
11874 R_NDS32_PLT_GOTREL_LO12 67
11875 R_NDS32_17IFC_PCREL_RELA 96
11876 R_NDS32_GOT_SUFF 193
11877 R_NDS32_GOTOFF_SUFF 194
11878 R_NDS32_PLT_GOT_SUFF 195
11879 R_NDS32_MULCALL_SUFF 196
11880 R_NDS32_PTR 197 */
11881 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11882 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11883 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11884 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11885 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11886 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11887 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11888 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11889 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11890 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11891 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11892 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11893 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11894 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11895 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11896 seq_len = 0;
11897 else
11898 continue;
11899
11900 insn_len = seq_len;
11901 removed = FALSE;
11902
11903 switch (ELF32_R_TYPE (irel->r_info))
11904 {
11905 case R_NDS32_LONGCALL1:
11906 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11907 &insn_len, contents, isymbuf,
11908 symtab_hdr);
11909 break;
11910 case R_NDS32_LONGCALL2:
11911 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11912 &insn_len, contents, isymbuf,
11913 symtab_hdr);
11914 break;
11915 case R_NDS32_LONGCALL3:
11916 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11917 &insn_len, contents, isymbuf,
11918 symtab_hdr);
11919 break;
11920 case R_NDS32_LONGJUMP1:
11921 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11922 &insn_len, contents, isymbuf,
11923 symtab_hdr);
11924 break;
11925 case R_NDS32_LONGJUMP2:
11926 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11927 &insn_len, contents, isymbuf,
11928 symtab_hdr);
11929 break;
11930 case R_NDS32_LONGJUMP3:
11931 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11932 &insn_len, contents, isymbuf,
11933 symtab_hdr);
11934 break;
11935 case R_NDS32_LONGCALL4:
11936 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11937 &insn_len, contents, isymbuf,
11938 symtab_hdr);
11939 break;
11940 case R_NDS32_LONGCALL5:
11941 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11942 &insn_len, contents, isymbuf,
11943 symtab_hdr);
11944 break;
11945 case R_NDS32_LONGCALL6:
11946 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11947 &insn_len, contents, isymbuf,
11948 symtab_hdr);
11949 break;
11950 case R_NDS32_LONGJUMP4:
11951 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11952 &insn_len, contents, isymbuf,
11953 symtab_hdr);
11954 break;
11955 case R_NDS32_LONGJUMP5:
11956 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11957 &insn_len, &seq_len, contents,
11958 isymbuf, symtab_hdr);
11959 break;
11960 case R_NDS32_LONGJUMP6:
11961 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11962 &insn_len, &seq_len, contents,
11963 isymbuf, symtab_hdr);
11964 break;
11965 case R_NDS32_LONGJUMP7:
11966 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11967 &insn_len, &seq_len, contents,
11968 isymbuf, symtab_hdr);
11969 break;
11970 case R_NDS32_LOADSTORE:
11971 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11972 internal_relocs, &insn_len,
11973 contents, isymbuf, symtab_hdr,
11974 load_store_relax);
11975 break;
11976 case R_NDS32_LO12S0_RELA:
11977 case R_NDS32_LO12S1_RELA:
11978 case R_NDS32_LO12S2_DP_RELA:
11979 case R_NDS32_LO12S2_SP_RELA:
11980 case R_NDS32_LO12S2_RELA:
11981 /* Relax for low part. */
11982 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11983 contents, isymbuf, symtab_hdr);
11984
11985 /* It is impossible to delete blank, so just continue. */
11986 continue;
11987 case R_NDS32_GOT_LO12:
11988 case R_NDS32_GOTOFF_LO12:
11989 case R_NDS32_PLTREL_LO12:
11990 case R_NDS32_PLT_GOTREL_LO12:
11991 case R_NDS32_GOTPC_LO12:
11992 /* Relax for PIC gp-relative low part. */
11993 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
11994 isymbuf, symtab_hdr);
35c08157 11995
1c8f6a4d
KLC		 11996 /* It is impossible to delete blank, so just continue. */
11997 continue;
11998 case R_NDS32_TLS_LE_LO12:
11999 /* Relax for LE TLS low part. */
12000 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12001 isymbuf, symtab_hdr);
35c08157 12002
1c8f6a4d
KLC		 12003 /* It is impossible to delete blank, so just continue. */
12004 continue;
12005 case R_NDS32_TLS_LE_ADD:
12006 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12007 contents, isymbuf, symtab_hdr, again);
12008 /* It is impossible to delete blank, so just continue. */
12009 continue;
12010 case R_NDS32_TLS_LE_LS:
12011 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12012 contents, isymbuf, symtab_hdr, again);
12013 continue;
12014 case R_NDS32_PTR:
12015 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12016 &insn_len, &seq_len, contents);
12017 break;
12018 case R_NDS32_PLT_GOT_SUFF:
12019 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12020 internal_relocs, contents,
12021 isymbuf, symtab_hdr, again);
12022 /* It is impossible to delete blank, so just continue. */
12023 continue;
12024 case R_NDS32_GOT_SUFF:
12025 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12026 internal_relocs, contents,
12027 symtab_hdr, again);
12028 /* It is impossible to delete blank, so just continue. */
12029 continue;
12030 case R_NDS32_GOTOFF_SUFF:
12031 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12032 internal_relocs, contents,
12033 isymbuf, symtab_hdr, again);
12034 /* It is impossible to delete blank, so just continue. */
12035 continue;
12036 default:
12037 continue;
12038
12039 }
12040 if (removed && seq_len - insn_len > 0)
12041 {
12042 if (!insert_nds32_elf_blank
12043 (&relax_blank_list, irel->r_offset + insn_len,
12044 seq_len - insn_len))
12045 goto error_return;
12046 *again = TRUE;
35c08157 12047 }
1c8f6a4d
KLC		 12048 }
12049
12050 calc_nds32_blank_total (relax_blank_list);
12051
12052 if (table->relax_fp_as_gp)
12053 {
12054 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12055 irelend, isymbuf))
12056 goto error_return;
35c08157 12057
535b785f 12058 if (!*again)
35c08157 12059 {
1c8f6a4d
KLC		 12060 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12061 irelend))
12062 goto error_return;
35c08157
KLC		 12063 }
12064 }
1c8f6a4d
KLC		 12065
12066 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12067
535b785f 12068 if (!*again)
1c8f6a4d
KLC		 12069 {
12070 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12071 &relax_blank_list, optimize, opt_size))
12072 goto error_return;
12073 }
12074
12075 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12076 If object file is assembled with flag '-Os',
12077 the we don't adjust jump-destination on 4-byte boundary. */
12078
12079 if (relax_blank_list)
12080 {
12081 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12082 relax_blank_list = NULL;
12083 }
12084
535b785f 12085 if (!*again)
35c08157
KLC		 12086 {
12087 /* Closing the section, so we don't relax it anymore. */
12088 bfd_vma sec_size_align;
12089 Elf_Internal_Rela *tmp_rel;
12090
12091 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12092 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12093 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12094 if ((sec_size_align - sec->size) & 0x2)
12095 {
12096 insn16 = NDS32_NOP16;
12097 bfd_putb16 (insn16, contents + sec->size);
12098 sec->size += 2;
12099 }
12100
12101 while (sec_size_align != sec->size)
12102 {
12103 insn = NDS32_NOP32;
12104 bfd_putb32 (insn, contents + sec->size);
12105 sec->size += 4;
12106 }
12107
1c8f6a4d
KLC		 12108 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12109 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12110 if (tmp_rel != irelend)
12111 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12112
12113 clean_nds32_elf_blank ();
12114 }
12115
12116finish:
12117 if (internal_relocs != NULL
12118 && elf_section_data (sec)->relocs != internal_relocs)
12119 free (internal_relocs);
12120
12121 if (contents != NULL
12122 && elf_section_data (sec)->this_hdr.contents != contents)
12123 free (contents);
12124
12125 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12126 free (isymbuf);
12127
12128 return result;
12129
12130error_return:
12131 result = FALSE;
12132 goto finish;
12133}
12134
12135static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12136{
12137 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12138 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12139 {NULL, 0, 0, 0, 0}
12140};
12141
12142static bfd_boolean
12143nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12144 struct bfd_link_info *info,
12145 void *finfo ATTRIBUTE_UNUSED,
12146 bfd_boolean (*func) (void *, const char *,
12147 Elf_Internal_Sym *,
12148 asection *,
12149 struct elf_link_hash_entry *)
12150 ATTRIBUTE_UNUSED)
12151{
12152 FILE *sym_ld_script = NULL;
12153 struct elf_nds32_link_hash_table *table;
12154
12155 table = nds32_elf_hash_table (info);
12156 sym_ld_script = table->sym_ld_script;
12157
12158 if (check_start_export_sym)
12159 fprintf (sym_ld_script, "}\n");
12160
12161 return TRUE;
12162}
12163
12164static enum elf_reloc_type_class
12165nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12166 const asection *rel_sec ATTRIBUTE_UNUSED,
12167 const Elf_Internal_Rela *rela)
12168{
12169 switch ((int) ELF32_R_TYPE (rela->r_info))
12170 {
12171 case R_NDS32_RELATIVE:
12172 return reloc_class_relative;
12173 case R_NDS32_JMP_SLOT:
12174 return reloc_class_plt;
12175 case R_NDS32_COPY:
12176 return reloc_class_copy;
12177 default:
12178 return reloc_class_normal;
12179 }
12180}
12181
12182/* Put target dependent option into info hash table. */
12183void
12184bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12185 int relax_fp_as_gp,
12186 int eliminate_gc_relocs,
12187 FILE * sym_ld_script, int load_store_relax,
12188 int target_optimize, int relax_status,
12189 int relax_round, FILE * ex9_export_file,
12190 FILE * ex9_import_file,
12191 int update_ex9_table, int ex9_limit,
12192 bfd_boolean ex9_loop_aware,
12193 bfd_boolean ifc_loop_aware)
12194{
12195 struct elf_nds32_link_hash_table *table;
12196
12197 table = nds32_elf_hash_table (link_info);
12198 if (table == NULL)
12199 return;
12200
12201 table->relax_fp_as_gp = relax_fp_as_gp;
12202 table->eliminate_gc_relocs = eliminate_gc_relocs;
12203 table->sym_ld_script = sym_ld_script;
12204 table ->load_store_relax = load_store_relax;
12205 table->target_optimize = target_optimize;
12206 table->relax_status = relax_status;
12207 table->relax_round = relax_round;
12208 table->ex9_export_file = ex9_export_file;
12209 table->ex9_import_file = ex9_import_file;
12210 table->update_ex9_table = update_ex9_table;
12211 table->ex9_limit = ex9_limit;
12212 table->ex9_loop_aware = ex9_loop_aware;
12213 table->ifc_loop_aware = ifc_loop_aware;
12214}
12215\f
12216/* These functions and data-structures are used for fp-as-gp
12217 optimization. */
12218
12219#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12220/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12221 the read-only section and read-write section. */
12222#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12223
12224/* An nds32_fag represent a gp-relative access.
12225 We find best fp-base by using a sliding window
12226 to find a base address which can cover most gp-access. */
12227struct nds32_fag
12228{
12229 struct nds32_fag *next; /* NULL-teminated linked list. */
12230 bfd_vma addr; /* The address of this fag. */
12231 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12232 It is used for applying FP7U2_FLAG. */
12233 int count; /* How many times this address is referred.
12234 There should be exactly `count' relocations
12235 in relas. */
12236 int relas_capcity; /* The buffer size of relas.
12237 We use an array instead of linked-list,
12238 and realloc is used to adjust buffer size. */
12239};
12240
12241static void
12242nds32_fag_init (struct nds32_fag *head)
12243{
12244 memset (head, 0, sizeof (struct nds32_fag));
12245}
12246
12247static void
12248nds32_fag_verify (struct nds32_fag *head)
12249{
12250 struct nds32_fag *iter;
12251 struct nds32_fag *prev;
12252
12253 prev = NULL;
12254 iter = head->next;
12255 while (iter)
12256 {
12257 if (prev && prev->addr >= iter->addr)
12258 puts ("Bug in fp-as-gp insertion.");
12259 prev = iter;
12260 iter = iter->next;
12261 }
12262}
12263
12264/* Insert a fag in ascending order.
12265 If a fag of the same address already exists,
12266 they are chained by relas array. */
12267
12268static void
12269nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12270 Elf_Internal_Rela * rel)
12271{
12272 struct nds32_fag *iter;
12273 struct nds32_fag *new_fag;
12274 const int INIT_RELAS_CAP = 4;
12275
12276 for (iter = head;
12277 iter->next && iter->next->addr <= addr;
12278 iter = iter->next)
12279 /* Find somewhere to insert. */ ;
12280
12281 /* `iter' will be equal to `head' if the list is empty. */
12282 if (iter != head && iter->addr == addr)
12283 {
12284 /* The address exists in the list.
12285 Insert `rel' into relocation list, relas. */
12286
12287 /* Check whether relas is big enough. */
12288 if (iter->count >= iter->relas_capcity)
12289 {
12290 iter->relas_capcity *= 2;
12291 iter->relas = bfd_realloc
12292 (iter->relas, iter->relas_capcity * sizeof (void *));
12293 }
12294 iter->relas[iter->count++] = rel;
12295 return;
12296 }
12297
12298 /* This is a new address. Create a fag node for it. */
12299 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12300 memset (new_fag, 0, sizeof (*new_fag));
12301 new_fag->addr = addr;
12302 new_fag->count = 1;
12303 new_fag->next = iter->next;
12304 new_fag->relas_capcity = INIT_RELAS_CAP;
12305 new_fag->relas = (Elf_Internal_Rela **)
12306 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12307 new_fag->relas[0] = rel;
12308 iter->next = new_fag;
12309
12310 nds32_fag_verify (head);
12311}
12312
12313static void
12314nds32_fag_free_list (struct nds32_fag *head)
12315{
12316 struct nds32_fag *iter;
12317
12318 iter = head->next;
12319 while (iter)
12320 {
12321 struct nds32_fag *tmp = iter;
12322 iter = iter->next;
12323 free (tmp->relas);
12324 tmp->relas = NULL;
12325 free (tmp);
12326 }
12327}
12328
35c08157
KLC		 12329/* Find the best fp-base address.
12330 The relocation associated with that address is returned,
12331 so we can track the symbol instead of a fixed address.
12332
12333 When relaxation, the address of an datum may change,
12334 because a text section is shrinked, so the data section
1c8f6a4d 12335 moves forward. If the aligments of text and data section
35c08157
KLC		 12336 are different, their distance may change too.
12337 Therefore, tracking a fixed address is not appriate. */
12338
12339static int
12340nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12341{
12342 struct nds32_fag *base; /* First fag in the window. */
12343 struct nds32_fag *last; /* First fag outside the window. */
12344 int accu = 0; /* Usage accumulation. */
12345 struct nds32_fag *best; /* Best fag. */
12346 int baccu = 0; /* Best accumulation. */
12347
12348 /* Use first fag for initial, and find the last fag in the window.
12349
12350 In each iteration, we could simply subtract previous fag
12351 and accumulate following fags which are inside the window,
12352 untill we each the end. */
12353
1c8f6a4d
KLC		 12354 if (head->next == NULL)
12355 {
12356 *bestpp = NULL;
12357 return 0;
12358 }
35c08157
KLC		 12359
12360 /* Initialize base. */
12361 base = head->next;
12362 best = base;
12363 for (last = base;
12364 last && last->addr < base->addr + FAG_WINDOW;
12365 last = last->next)
12366 accu += last->count;
12367
12368 baccu = accu;
12369
12370 /* Record the best base in each iteration. */
12371 while (base->next)
1c8f6a4d
KLC		 12372 {
12373 accu -= base->count;
12374 base = base->next;
12375 /* Account fags in window. */
12376 for (/* Nothing. */;
12377 last && last->addr < base->addr + FAG_WINDOW;
12378 last = last->next)
12379 accu += last->count;
12380
12381 /* A better fp-base? */
12382 if (accu > baccu)
12383 {
12384 best = base;
12385 baccu = accu;
12386 }
12387 }
35c08157
KLC		 12388
12389 if (bestpp)
12390 *bestpp = best;
12391 return baccu;
12392}
12393
12394/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12395 so we can convert it fo fp-relative access later.
12396 `best_fag' is the best fp-base. Only those inside the window
12397 of best_fag is applied the flag. */
12398
12399static bfd_boolean
12400nds32_fag_mark_relax (struct bfd_link_info *link_info,
12401 bfd *abfd, struct nds32_fag *best_fag,
12402 Elf_Internal_Rela *internal_relocs,
12403 Elf_Internal_Rela *irelend)
12404{
12405 struct nds32_fag *ifag;
12406 bfd_vma best_fpbase, gp;
12407 bfd *output_bfd;
12408
12409 output_bfd = abfd->sections->output_section->owner;
12410 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12411 best_fpbase = best_fag->addr;
12412
1c8f6a4d
KLC		 12413 if (best_fpbase > gp + sdata_range[1][1]
12414 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC		 12415 return FALSE;
12416
12417 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12418 so we know they can be converted to lwi37.fp. */
12419 for (ifag = best_fag;
12420 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12421 {
12422 int i;
12423
12424 for (i = 0; i < ifag->count; i++)
12425 {
12426 Elf_Internal_Rela *insn16_rel;
12427 Elf_Internal_Rela *fag_rel;
12428
12429 fag_rel = ifag->relas[i];
12430
12431 /* Only if this is within the WINDOWS, FP7U2_FLAG
12432 is applied. */
12433
12434 insn16_rel = find_relocs_at_address
12435 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12436
12437 if (insn16_rel != irelend)
12438 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12439 }
12440 }
12441 return TRUE;
12442}
12443
1c8f6a4d
KLC		 12444/* Reset INSN16 to clean fp as gp. */
12445
12446static void
12447nds32_fag_unmark_relax (struct nds32_fag *fag,
12448 Elf_Internal_Rela *internal_relocs,
12449 Elf_Internal_Rela *irelend)
12450{
12451 struct nds32_fag *ifag;
12452 int i;
12453 Elf_Internal_Rela *insn16_rel;
12454 Elf_Internal_Rela *fag_rel;
12455
12456 for (ifag = fag; ifag; ifag = ifag->next)
12457 {
12458 for (i = 0; i < ifag->count; i++)
12459 {
12460 fag_rel = ifag->relas[i];
12461
12462 /* Restore the INSN16 relocation. */
12463 insn16_rel = find_relocs_at_address
12464 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12465
12466 if (insn16_rel != irelend)
12467 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12468 }
12469 }
12470}
12471
35c08157
KLC		 12472/* This is the main function of fp-as-gp optimization.
12473 It should be called by relax_section. */
12474
12475static bfd_boolean
12476nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12477 bfd *abfd, asection *sec,
12478 Elf_Internal_Rela *internal_relocs,
12479 Elf_Internal_Rela *irelend,
12480 Elf_Internal_Sym *isymbuf)
12481{
12482 Elf_Internal_Rela *begin_rel = NULL;
12483 Elf_Internal_Rela *irel;
12484 struct nds32_fag fag_head;
12485 Elf_Internal_Shdr *symtab_hdr;
12486 bfd_byte *contents;
1c8f6a4d 12487 bfd_boolean ifc_inside = FALSE;
35c08157
KLC		 12488
12489 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12490
12491 /* Per-function fp-base selection.
12492 1. Create a list for all the gp-relative access.
12493 2. Base on those gp-relative address,
12494 find a fp-base which can cover most access.
12495 3. Use the fp-base for fp-as-gp relaxation.
12496
12497 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12498 we should
12499 1. delete the `la $fp, _FP_BASE_' instruction and
12500 2. not convert lwi.gp to lwi37.fp.
12501
12502 To delete the _FP_BASE_ instruction, we simply apply
12503 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12504
12505 To suppress the conversion, we simply NOT to apply
12506 R_NDS32_INSN16_FP7U2_FLAG flag. */
12507
12508 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12509
0c4bd9d9 12510 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 12511 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12512 return FALSE;
12513
12514 /* Check whether it is worth for fp-as-gp optimization,
12515 i.e., at least 3 gp-load.
12516
12517 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12518 apply this optimization. */
12519
12520 for (irel = internal_relocs; irel < irelend; irel++)
12521 {
12522 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12523 One we enter the begin of the region, we track all the LW/ST
12524 instructions, so when we leave the region, we try to find
12525 the best fp-base address for those LW/ST instructions. */
12526
12527 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12528 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12529 {
12530 /* Begin of the region. */
12531 if (begin_rel)
695344c0 12532 /* xgettext:c-format */
38f14ab8 12533 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC		 12534
12535 begin_rel = irel;
12536 nds32_fag_init (&fag_head);
1c8f6a4d 12537 ifc_inside = FALSE;
35c08157
KLC		 12538 }
12539 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12540 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12541 {
12542 int accu;
1c8f6a4d 12543 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12544 int dist;
12545
12546 /* End of the region.
12547 Check whether it is worth to do fp-as-gp. */
12548
12549 if (begin_rel == NULL)
12550 {
695344c0 12551 /* xgettext:c-format */
38f14ab8
AM		 12552 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12553 abfd, sec);
35c08157
KLC		 12554 continue;
12555 }
12556
12557 accu = nds32_fag_find_base (&fag_head, &best_fag);
12558
1c8f6a4d
KLC		 12559 /* Clean FP7U2_FLAG because they may set ever. */
12560 tmp_fag = fag_head.next;
12561 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12562
35c08157
KLC		 12563 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12564 if (accu < FAG_THRESHOLD
12565 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12566 internal_relocs, irelend))
12567 {
12568 /* Not worth to do fp-as-gp. */
12569 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12570 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12571 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12572 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12573 nds32_fag_free_list (&fag_head);
12574 begin_rel = NULL;
12575 continue;
12576 }
12577
12578 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12579 so we use it to record the distance to the reloction of best
12580 fp-base. */
12581 dist = best_fag->relas[0] - begin_rel;
12582 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12583 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12584 relocation. And get the base value when relocating. */
1c8f6a4d 12585 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12586 begin_rel->r_addend |= dist << 16;
12587
12588 nds32_fag_free_list (&fag_head);
12589 begin_rel = NULL;
12590 }
12591
1c8f6a4d 12592 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12593 /* Skip if we are not in the region of fp-as-gp. */
12594 continue;
12595
12596 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12597 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12598 {
12599 bfd_vma addr;
12600 uint32_t insn;
12601
12602 /* A gp-relative access is found. Insert it to the fag-list. */
12603
12604 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12605 insn = bfd_getb32 (contents + irel->r_offset);
12606 if (!N32_IS_RT3 (insn))
12607 continue;
12608
12609 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12610 nds32_fag_insert (&fag_head, addr, irel);
12611 }
12612 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12613 {
12614 begin_rel = NULL;
12615 }
1c8f6a4d
KLC		 12616 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12617 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12618 {
12619 /* Suppress fp as gp when encounter ifc. */
12620 ifc_inside = TRUE;
12621 }
35c08157
KLC		 12622 }
12623
12624 return TRUE;
12625}
12626
12627/* Remove unused `la $fp, _FD_BASE_' instruction. */
12628
12629static bfd_boolean
12630nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12631 Elf_Internal_Rela *internal_relocs,
12632 Elf_Internal_Rela *irelend)
12633{
12634 Elf_Internal_Rela *irel;
12635 Elf_Internal_Shdr *symtab_hdr;
12636 bfd_byte *contents = NULL;
12637 nds32_elf_blank_t *relax_blank_list = NULL;
12638 bfd_boolean result = TRUE;
12639 bfd_boolean unused_region = FALSE;
12640
12641 /*
12642 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12643 * R_NDS32_17IFC_PCREL_RELA
12644 * R_NDS32_10IFCU_PCREL_RELA
12645
12646 CASE??????????????
12647 */
12648
12649 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12650 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC		 12651
12652 for (irel = internal_relocs; irel < irelend; irel++)
12653 {
12654 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12655 we marked to in previous pass.
12656 DO NOT scan relocations again, since we've alreadly decided it
12657 and set the flag. */
12658 const char *syname;
12659 int syndx;
12660 uint32_t insn;
12661
12662 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12663 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12664 unused_region = TRUE;
12665 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12666 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12667 unused_region = FALSE;
12668
12669 /* We're not in the region. */
12670 if (!unused_region)
12671 continue;
12672
12673 /* _FP_BASE_ must be a GLOBAL symbol. */
12674 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12675 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12676 continue;
12677
12678 /* The symbol name must be _FP_BASE_. */
12679 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12680 if (strcmp (syname, FP_BASE_NAME) != 0)
12681 continue;
12682
12683 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12684 {
12685 /* addi.gp $fp, -256 */
12686 insn = bfd_getb32 (contents + irel->r_offset);
12687 if (insn != INSN_ADDIGP_TO_FP)
12688 continue;
12689 }
12690 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12691 {
12692 /* addi $fp, $gp, -256 */
12693 insn = bfd_getb32 (contents + irel->r_offset);
12694 if (insn != INSN_ADDI_GP_TO_FP)
12695 continue;
12696 }
12697 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12698 {
12699 /* movi $fp, FP_BASE */
12700 insn = bfd_getb32 (contents + irel->r_offset);
12701 if (insn != INSN_MOVI_TO_FP)
12702 continue;
12703 }
12704 else
12705 continue;
12706
12707 /* We got here because a FP_BASE instruction is found. */
12708 if (!insert_nds32_elf_blank_recalc_total
12709 (&relax_blank_list, irel->r_offset, 4))
12710 goto error_return;
12711 }
12712
12713finish:
12714 if (relax_blank_list)
12715 {
12716 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12717 relax_blank_list = NULL;
12718 }
12719 return result;
12720
12721error_return:
12722 result = FALSE;
12723 goto finish;
12724}
1c8f6a4d
KLC		 12725
12726/* This is a version of bfd_generic_get_relocated_section_contents.
12727 We need this variety because relaxation will modify the dwarf
12728 infomation. When there is undefined symbol reference error mesage,
12729 linker need to dump line number where the symbol be used. However
12730 the address is be relaxed, it can not get the original dwarf contents.
12731 The variety only modify function call for reading in the section. */
12732
12733static bfd_byte *
12734nds32_elf_get_relocated_section_contents (bfd *abfd,
12735 struct bfd_link_info *link_info,
12736 struct bfd_link_order *link_order,
12737 bfd_byte *data,
12738 bfd_boolean relocatable,
12739 asymbol **symbols)
12740{
12741 bfd *input_bfd = link_order->u.indirect.section->owner;
12742 asection *input_section = link_order->u.indirect.section;
12743 long reloc_size;
12744 arelent **reloc_vector;
12745 long reloc_count;
12746
12747 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12748 if (reloc_size < 0)
12749 return NULL;
12750
12751 /* Read in the section. */
0c4bd9d9 12752 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC		 12753 return NULL;
12754
12755 if (reloc_size == 0)
12756 return data;
12757
12758 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12759 if (reloc_vector == NULL)
12760 return NULL;
12761
12762 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12763 reloc_vector, symbols);
12764 if (reloc_count < 0)
12765 goto error_return;
12766
12767 if (reloc_count > 0)
12768 {
12769 arelent **parent;
12770 for (parent = reloc_vector; *parent != NULL; parent++)
12771 {
12772 char *error_message = NULL;
12773 asymbol *symbol;
12774 bfd_reloc_status_type r;
12775
12776 symbol = *(*parent)->sym_ptr_ptr;
12777 if (symbol->section && discarded_section (symbol->section))
12778 {
12779 bfd_byte *p;
12780 static reloc_howto_type none_howto
12781 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12782 "unused", FALSE, 0, 0, FALSE);
12783
12784 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12785 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12786 p);
12787 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12788 (*parent)->addend = 0;
12789 (*parent)->howto = &none_howto;
12790 r = bfd_reloc_ok;
12791 }
12792 else
12793 r = bfd_perform_relocation (input_bfd, *parent, data,
12794 input_section,
12795 relocatable ? abfd : NULL,
12796 &error_message);
12797
12798 if (relocatable)
12799 {
12800 asection *os = input_section->output_section;
12801
12802 /* A partial link, so keep the relocs. */
12803 os->orelocation[os->reloc_count] = *parent;
12804 os->reloc_count++;
12805 }
12806
12807 if (r != bfd_reloc_ok)
12808 {
12809 switch (r)
12810 {
12811 case bfd_reloc_undefined:
1a72702b
AM		 12812 (*link_info->callbacks->undefined_symbol)
12813 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12814 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC		 12815 break;
12816 case bfd_reloc_dangerous:
12817 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 12818 (*link_info->callbacks->reloc_dangerous)
12819 (link_info, error_message,
12820 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12821 break;
12822 case bfd_reloc_overflow:
1a72702b
AM		 12823 (*link_info->callbacks->reloc_overflow)
12824 (link_info, NULL,
12825 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12826 (*parent)->howto->name, (*parent)->addend,
12827 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 12828 break;
12829 case bfd_reloc_outofrange:
12830 /* PR ld/13730:
12831 This error can result when processing some partially
12832 complete binaries. Do not abort, but issue an error
12833 message instead. */
12834 link_info->callbacks->einfo
695344c0 12835 /* xgettext:c-format */
c1c8c1ef 12836 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 12837 abfd, input_section, * parent);
12838 goto error_return;
12839
12840 default:
12841 abort ();
12842 break;
12843 }
12844 }
12845 }
12846 }
12847
12848 free (reloc_vector);
12849 return data;
12850
12851error_return:
12852 free (reloc_vector);
12853 return NULL;
12854}
35c08157
KLC		 12855\f
12856/* Link-time IFC relaxation.
12857 In this optimization, we chains jump instructions
12858 of the same destination with ifcall. */
12859
12860
12861/* List to save jal and j relocation. */
12862struct elf_nds32_ifc_symbol_entry
12863{
12864 asection *sec;
12865 struct elf_link_hash_entry *h;
12866 struct elf_nds32_ifc_irel_list *irel_head;
12867 unsigned long insn;
12868 int times;
12869 int enable; /* Apply ifc. */
12870 int ex9_enable; /* Apply ifc after ex9. */
12871 struct elf_nds32_ifc_symbol_entry *next;
12872};
12873
12874struct elf_nds32_ifc_irel_list
12875{
12876 Elf_Internal_Rela *irel;
12877 asection *sec;
12878 bfd_vma addr;
12879 /* If this is set, then it is the last instruction for
12880 ifc-chain, so it must be keep for the actual branching. */
12881 int keep;
12882 struct elf_nds32_ifc_irel_list *next;
12883};
12884
12885static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
12886
12887/* Insert symbol of jal and j for ifc. */
12888
12889static void
12890nds32_elf_ifc_insert_symbol (asection *sec,
12891 struct elf_link_hash_entry *h,
12892 Elf_Internal_Rela *irel,
12893 unsigned long insn)
12894{
12895 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
12896
12897 /* Check there is target of existing entry the same as the new one. */
12898 while (ptr != NULL)
12899 {
12900 if (((h == NULL && ptr->sec == sec
12901 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
12902 && ptr->irel_head->irel->r_addend == irel->r_addend)
12903 || h != NULL)
12904 && ptr->h == h
12905 && ptr->insn == insn)
12906 {
12907 /* The same target exist, so insert into list. */
12908 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
12909
12910 while (irel_list->next != NULL)
12911 irel_list = irel_list->next;
12912 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12913 irel_list = irel_list->next;
12914 irel_list->irel = irel;
12915 irel_list->keep = 1;
12916
12917 if (h == NULL)
12918 irel_list->sec = NULL;
12919 else
12920 irel_list->sec = sec;
12921 irel_list->next = NULL;
12922 return;
12923 }
12924 if (ptr->next == NULL)
12925 break;
12926 ptr = ptr->next;
12927 }
12928
12929 /* There is no same target entry, so build a new one. */
12930 if (ifc_symbol_head == NULL)
12931 {
12932 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12933 ptr = ifc_symbol_head;
12934 }
12935 else
12936 {
12937 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
12938 ptr = ptr->next;
12939 }
12940
12941 ptr->h = h;
12942 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
12943 ptr->irel_head->irel = irel;
12944 ptr->insn = insn;
12945 ptr->irel_head->keep = 1;
12946
12947 if (h == NULL)
12948 {
12949 /* Local symbols. */
12950 ptr->sec = sec;
12951 ptr->irel_head->sec = NULL;
12952 }
12953 else
12954 {
12955 /* Global symbol. */
12956 ptr->sec = NULL;
12957 ptr->irel_head->sec = sec;
12958 }
12959
12960 ptr->irel_head->next = NULL;
12961 ptr->times = 0;
12962 ptr->enable = 0;
12963 ptr->ex9_enable = 0;
12964 ptr->next = NULL;
12965}
12966
12967/* Gather all jal and j instructions. */
12968
12969static bfd_boolean
12970nds32_elf_ifc_calc (struct bfd_link_info *info,
12971 bfd *abfd, asection *sec)
12972{
12973 Elf_Internal_Rela *internal_relocs;
12974 Elf_Internal_Rela *irelend;
12975 Elf_Internal_Rela *irel;
12976 Elf_Internal_Shdr *symtab_hdr;
12977 bfd_byte *contents = NULL;
1c8f6a4d 12978 uint32_t insn, insn_with_reg;
35c08157
KLC		 12979 unsigned long r_symndx;
12980 struct elf_link_hash_entry *h;
12981 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
12982 struct elf_nds32_link_hash_table *table;
12983 bfd_boolean ifc_loop_aware;
12984
12985 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12986 TRUE /* keep_memory */);
12987 irelend = internal_relocs + sec->reloc_count;
12988 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12989
12990 /* Check if the object enable ifc. */
12991 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
12992 R_NDS32_RELAX_ENTRY);
12993
12994 if (irel == NULL
12995 || irel >= irelend
12996 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
12997 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
12998 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
12999 return TRUE;
13000
0c4bd9d9 13001 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 13002 return FALSE;
13003
13004 table = nds32_elf_hash_table (info);
13005 ifc_loop_aware = table->ifc_loop_aware;
13006 while (irel != NULL && irel < irelend)
13007 {
13008 /* Traverse all relocation and gather all of them to build the list. */
13009
13010 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13011 {
13012 if (ifc_loop_aware == 1
13013 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13014 {
13015 /* Check the region if loop or not. If it is true and
13016 ifc-loop-aware is true, ignore the region till region end. */
13017 while (irel != NULL
13018 && irel < irelend
13019 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13020 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13021 irel++;
13022 }
13023 }
13024
13025 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13026 {
13027 insn = bfd_getb32 (contents + irel->r_offset);
13028 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13029 r_symndx = ELF32_R_SYM (irel->r_info);
13030 if (r_symndx < symtab_hdr->sh_info)
13031 {
13032 /* Local symbol. */
13033 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13034 }
13035 else
13036 {
13037 /* External symbol. */
13038 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13039 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13040 }
13041 }
13042 irel++;
13043 }
13044 return TRUE;
13045}
13046
13047/* Determine whether j and jal should be substituted. */
13048
13049static void
13050nds32_elf_ifc_filter (struct bfd_link_info *info)
13051{
13052 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13053 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13054 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13055 struct elf_nds32_link_hash_table *table;
13056 int target_optimize;
13057 bfd_vma address;
13058
13059 table = nds32_elf_hash_table (info);
13060 target_optimize = table->target_optimize;
13061 while (ptr)
13062 {
13063 irel_ptr = ptr->irel_head;
13064 if (ptr->h == NULL)
13065 {
13066 /* Local symbol. */
13067 irel_keeper = irel_ptr;
13068 while (irel_ptr && irel_ptr->next)
13069 {
13070 /* Check there is jump target can be used. */
13071 if ((irel_ptr->next->irel->r_offset
13072 - irel_keeper->irel->r_offset) > 1022)
13073 irel_keeper = irel_ptr->next;
13074 else
13075 {
13076 ptr->enable = 1;
13077 irel_ptr->keep = 0;
13078 }
13079 irel_ptr = irel_ptr->next;
13080 }
13081 }
13082 else
13083 {
1c8f6a4d
KLC		 13084 /* Global symbol. */
13085 /* We have to get the absolute address and decide
13086 whether to keep it or not. */
35c08157
KLC		 13087 while (irel_ptr)
13088 {
13089 address = (irel_ptr->irel->r_offset
13090 + irel_ptr->sec->output_section->vma
13091 + irel_ptr->sec->output_offset);
13092 irel_ptr->addr = address;
13093 irel_ptr = irel_ptr->next;
13094 }
13095
13096 irel_ptr = ptr->irel_head;
13097 while (irel_ptr)
13098 {
1c8f6a4d 13099 /* Sort by address. */
35c08157
KLC		 13100 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13101 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13102 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13103 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13104
1c8f6a4d 13105 /* Get the smallest one. */
35c08157
KLC		 13106 while (irel_temp->next)
13107 {
13108 if (irel_temp->next->addr < irel_dest->addr)
13109 {
13110 irel_dest_prev = irel_temp;
13111 irel_dest = irel_temp->next;
13112 }
13113 irel_temp = irel_temp->next;
13114 }
1c8f6a4d 13115
35c08157
KLC		 13116 if (irel_dest != irel_ptr)
13117 {
13118 if (irel_ptr_prev)
13119 irel_ptr_prev->next = irel_dest;
13120 if (irel_dest_prev)
13121 irel_dest_prev->next = irel_ptr;
13122 irel_temp = irel_ptr->next;
13123 irel_ptr->next = irel_dest->next;
13124 irel_dest->next = irel_temp;
13125 }
13126 irel_ptr_prev = irel_ptr;
13127 irel_ptr = irel_ptr->next;
13128 }
13129
13130 irel_ptr = ptr->irel_head;
13131 irel_keeper = irel_ptr;
13132 while (irel_ptr && irel_ptr->next)
13133 {
13134 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13135 irel_keeper = irel_ptr->next;
13136 else
13137 {
13138 ptr->enable = 1;
13139 irel_ptr->keep = 0;
13140 }
13141 irel_ptr = irel_ptr->next;
13142 }
13143 }
13144
1c8f6a4d 13145 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC		 13146 if ((target_optimize & NDS32_RELAX_EX9_ON)
13147 && ptr->irel_head != irel_keeper)
13148 ptr->enable = 0;
13149 ptr = ptr->next;
13150 }
13151}
13152
13153/* Determine whether j and jal should be substituted after ex9 done. */
13154
13155static void
13156nds32_elf_ifc_filter_after_ex9 (void)
13157{
13158 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13159 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13160
13161 while (ptr)
13162 {
13163 if (ptr->enable == 0)
13164 {
13165 /* Check whether ifc is applied or not. */
13166 irel_ptr = ptr->irel_head;
13167 ptr->ex9_enable = 1;
13168 while (irel_ptr)
13169 {
13170 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13171 {
13172 /* Ex9 already. */
13173 ptr->ex9_enable = 0;
13174 break;
13175 }
13176 irel_ptr = irel_ptr->next;
13177 }
13178 }
13179 ptr = ptr->next;
13180 }
13181}
13182
13183/* Wrapper to do ifc relaxation. */
13184
13185bfd_boolean
13186nds32_elf_ifc_finish (struct bfd_link_info *info)
13187{
13188 int relax_status;
13189 struct elf_nds32_link_hash_table *table;
13190
13191 table = nds32_elf_hash_table (info);
13192 relax_status = table->relax_status;
13193
13194 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13195 nds32_elf_ifc_filter (info);
13196 else
13197 nds32_elf_ifc_filter_after_ex9 ();
13198
13199 if (!nds32_elf_ifc_replace (info))
13200 return FALSE;
13201
13202 if (table)
13203 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13204 return TRUE;
13205}
13206
13207/* Traverse the result of ifc filter and replace it with ifcall9. */
13208
13209static bfd_boolean
13210nds32_elf_ifc_replace (struct bfd_link_info *info)
13211{
13212 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13213 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13214 nds32_elf_blank_t *relax_blank_list = NULL;
13215 bfd_byte *contents = NULL;
13216 Elf_Internal_Rela *internal_relocs;
13217 Elf_Internal_Rela *irel;
13218 Elf_Internal_Rela *irelend;
13219 unsigned short insn16 = INSN_IFCALL9;
13220 struct elf_nds32_link_hash_table *table;
13221 int relax_status;
13222
13223 table = nds32_elf_hash_table (info);
13224 relax_status = table->relax_status;
13225
13226 while (ptr)
13227 {
13228 /* Traverse the ifc gather list, and replace the
13229 filter entries by ifcall9. */
13230 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC		 13231 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13232 && ptr->ex9_enable == 1))
35c08157
KLC		 13233 {
13234 irel_ptr = ptr->irel_head;
13235 if (ptr->h == NULL)
13236 {
13237 /* Local symbol. */
13238 internal_relocs = _bfd_elf_link_read_relocs
13239 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13240 irelend = internal_relocs + ptr->sec->reloc_count;
13241
1c8f6a4d 13242 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13243 &contents, TRUE))
35c08157
KLC		 13244 return FALSE;
13245
13246 while (irel_ptr)
13247 {
13248 if (irel_ptr->keep == 0 && irel_ptr->next)
13249 {
1c8f6a4d 13250 /* The one can be replaced. We have to check whether
35c08157
KLC		 13251 there is any alignment point in the region. */
13252 irel = irel_ptr->irel;
1c8f6a4d
KLC		 13253 while (((irel_ptr->next->keep == 0
13254 && irel < irel_ptr->next->irel)
35c08157
KLC		 13255 || (irel_ptr->next->keep == 1 && irel < irelend))
13256 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13257 && (irel->r_addend & 0x1f) == 2))
13258 irel++;
13259 if (irel >= irelend
13260 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13261 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC		 13262 && ((irel->r_offset - get_nds32_elf_blank_total
13263 (&relax_blank_list, irel->r_offset, 1))
13264 & 0x02) == 0))
35c08157
KLC		 13265 {
13266 /* Replace by ifcall9. */
13267 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13268 if (!insert_nds32_elf_blank_recalc_total
13269 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13270 return FALSE;
13271 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13272 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13273 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13274 }
13275 }
13276 irel_ptr = irel_ptr->next;
13277 }
13278
13279 /* Delete the redundant code. */
13280 if (relax_blank_list)
13281 {
13282 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13283 relax_blank_list);
13284 relax_blank_list = NULL;
13285 }
13286 }
13287 else
13288 {
13289 /* Global symbol. */
13290 while (irel_ptr)
13291 {
13292 if (irel_ptr->keep == 0 && irel_ptr->next)
13293 {
13294 /* The one can be replaced, and we have to check
13295 whether there is any alignment point in the region. */
13296 internal_relocs = _bfd_elf_link_read_relocs
13297 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13298 TRUE /* keep_memory */);
13299 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC		 13300 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13301 irel_ptr->sec, &contents,
13302 TRUE))
35c08157
KLC		 13303 return FALSE;
13304
13305 irel = irel_ptr->irel;
13306 while (((irel_ptr->sec == irel_ptr->next->sec
13307 && irel_ptr->next->keep == 0
13308 && irel < irel_ptr->next->irel)
13309 || ((irel_ptr->sec != irel_ptr->next->sec
13310 || irel_ptr->next->keep == 1)
13311 && irel < irelend))
13312 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13313 && (irel->r_addend & 0x1f) == 2))
13314 irel++;
13315 if (irel >= irelend
13316 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13317 && (irel->r_addend & 0x1f) == 2
13318 && ((irel->r_offset
13319 - get_nds32_elf_blank_total (&relax_blank_list,
13320 irel->r_offset, 1)) & 0x02) == 0))
13321 {
13322 /* Replace by ifcall9. */
13323 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13324 if (!insert_nds32_elf_blank_recalc_total
13325 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13326 return FALSE;
13327
13328 /* Delete the redundant code, and clear the relocation. */
13329 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13330 irel_ptr->sec,
13331 relax_blank_list);
13332 irel_ptr->irel->r_info =
1c8f6a4d
KLC		 13333 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13334 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 13335 relax_blank_list = NULL;
13336 }
13337 }
13338
13339 irel_ptr = irel_ptr->next;
13340 }
13341 }
13342 }
13343 ptr = ptr->next;
13344 }
13345
13346 return TRUE;
13347}
13348
13349/* Relocate ifcall. */
13350
1c8f6a4d 13351static bfd_boolean
35c08157
KLC		 13352nds32_elf_ifc_reloc (void)
13353{
13354 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13355 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13356 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13357 bfd_vma relocation, address;
13358 unsigned short insn16;
35c08157 13359 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 13360 static bfd_boolean done = FALSE;
13361
13362 if (done)
13363 return TRUE;
13364
13365 done = TRUE;
35c08157
KLC		 13366
13367 while (ptr)
13368 {
1c8f6a4d 13369 /* Check the entry is enable ifcall. */
35c08157
KLC		 13370 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13371 {
1c8f6a4d 13372 /* Get the reserve jump. */
35c08157
KLC		 13373 irel_ptr = ptr->irel_head;
13374 while (irel_ptr)
13375 {
13376 if (irel_ptr->keep == 1)
13377 {
13378 irel_keeper = irel_ptr;
13379 break;
13380 }
13381 irel_ptr = irel_ptr->next;
13382 }
13383
13384 irel_ptr = ptr->irel_head;
13385 if (ptr->h == NULL)
13386 {
13387 /* Local symbol. */
0c4bd9d9
KLC		 13388 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13389 &contents, TRUE))
35c08157
KLC		 13390 return FALSE;
13391
13392 while (irel_ptr)
13393 {
13394 if (irel_ptr->keep == 0
1c8f6a4d 13395 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC		 13396 {
13397 relocation = irel_keeper->irel->r_offset;
13398 relocation = relocation - irel_ptr->irel->r_offset;
13399 while (irel_keeper && relocation > 1022)
13400 {
13401 irel_keeper = irel_keeper->next;
13402 if (irel_keeper && irel_keeper->keep == 1)
13403 {
13404 relocation = irel_keeper->irel->r_offset;
13405 relocation = relocation - irel_ptr->irel->r_offset;
13406 }
13407 }
13408 if (relocation > 1022)
13409 {
13410 /* Double check. */
13411 irel_keeper = ptr->irel_head;
13412 while (irel_keeper)
13413 {
13414 if (irel_keeper->keep == 1)
13415 {
13416 relocation = irel_keeper->irel->r_offset;
13417 relocation = relocation - irel_ptr->irel->r_offset;
13418 }
13419 if (relocation <= 1022)
13420 break;
13421 irel_keeper = irel_keeper->next;
13422 }
13423 if (!irel_keeper)
13424 return FALSE;
13425 }
1c8f6a4d
KLC		 13426 irel_ptr->irel->r_info =
13427 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13428 R_NDS32_NONE);
35c08157
KLC		 13429 insn16 = INSN_IFCALL9 | (relocation >> 1);
13430 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13431 }
13432 irel_ptr = irel_ptr->next;
13433 }
13434 }
13435 else
13436 {
13437 /* Global symbol. */
13438 while (irel_ptr)
13439 {
13440 if (irel_ptr->keep == 0
1c8f6a4d 13441 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13442 {
1c8f6a4d 13443 /* Get the distance between ifcall and jump. */
35c08157
KLC		 13444 relocation = (irel_keeper->irel->r_offset
13445 + irel_keeper->sec->output_section->vma
13446 + irel_keeper->sec->output_offset);
13447 address = (irel_ptr->irel->r_offset
13448 + irel_ptr->sec->output_section->vma
13449 + irel_ptr->sec->output_offset);
13450 relocation = relocation - address;
1c8f6a4d
KLC		 13451
13452 /* The distance is over ragne, find callee again. */
35c08157
KLC		 13453 while (irel_keeper && relocation > 1022)
13454 {
13455 irel_keeper = irel_keeper->next;
13456 if (irel_keeper && irel_keeper->keep ==1)
13457 {
13458 relocation = (irel_keeper->irel->r_offset
13459 + irel_keeper->sec->output_section->vma
13460 + irel_keeper->sec->output_offset);
13461 relocation = relocation - address;
13462 }
13463 }
13464
13465 if (relocation > 1022)
13466 {
13467 /* Double check. */
13468 irel_keeper = ptr->irel_head;
13469 while (irel_keeper)
13470 {
13471 if (irel_keeper->keep == 1)
13472 {
13473
13474 relocation = (irel_keeper->irel->r_offset
13475 + irel_keeper->sec->output_section->vma
13476 + irel_keeper->sec->output_offset);
13477 relocation = relocation - address;
13478 }
13479 if (relocation <= 1022)
13480 break;
13481 irel_keeper = irel_keeper->next;
13482 }
13483 if (!irel_keeper)
13484 return FALSE;
13485 }
13486 if (!nds32_get_section_contents
0c4bd9d9 13487 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC		 13488 return FALSE;
13489 insn16 = INSN_IFCALL9 | (relocation >> 1);
13490 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13491 irel_ptr->irel->r_info =
13492 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13493 R_NDS32_NONE);
35c08157
KLC		 13494 }
13495 irel_ptr =irel_ptr->next;
13496 }
13497 }
13498 }
13499 ptr = ptr->next;
13500 }
13501
13502 return TRUE;
13503}
13504
13505/* End of IFC relaxation. */
13506\f
13507/* EX9 Instruction Table Relaxation. */
13508
13509/* Global hash list. */
13510struct elf_link_hash_entry_list
13511{
13512 struct elf_link_hash_entry *h;
13513 struct elf_link_hash_entry_list *next;
13514};
13515
13516/* Save different destination but same insn. */
13517struct elf_link_hash_entry_mul_list
13518{
13519 /* Global symbol times. */
13520 int times;
13521 /* Save relocation for each global symbol but useful?? */
13522 Elf_Internal_Rela *irel;
13523 /* For sethi, two sethi may have the same high-part but different low-parts. */
13524 Elf_Internal_Rela rel_backup;
13525 struct elf_link_hash_entry_list *h_list;
13526 struct elf_link_hash_entry_mul_list *next;
13527};
13528
13529/* Instruction hash table. */
13530struct elf_nds32_code_hash_entry
13531{
13532 struct bfd_hash_entry root;
13533 int times;
13534 /* For insn that can use relocation or constant ex: sethi. */
13535 int const_insn;
13536 asection *sec;
13537 struct elf_link_hash_entry_mul_list *m_list;
13538 /* Using r_addend. */
13539 Elf_Internal_Rela *irel;
13540 /* Using r_info. */
13541 Elf_Internal_Rela rel_backup;
13542};
13543
13544/* Instruction count list. */
13545struct elf_nds32_insn_times_entry
13546{
13547 const char *string;
13548 int times;
13549 int order;
13550 asection *sec;
13551 struct elf_link_hash_entry_mul_list *m_list;
13552 Elf_Internal_Rela *irel;
13553 Elf_Internal_Rela rel_backup;
13554 struct elf_nds32_insn_times_entry *next;
13555};
13556
13557/* J and JAL symbol list. */
13558struct elf_nds32_symbol_entry
13559{
13560 char *string;
13561 unsigned long insn;
13562 struct elf_nds32_symbol_entry *next;
13563};
13564
13565/* Relocation list. */
13566struct elf_nds32_irel_entry
13567{
13568 Elf_Internal_Rela *irel;
13569 struct elf_nds32_irel_entry *next;
13570};
13571
13572/* ex9.it insn need to be fixed. */
13573struct elf_nds32_ex9_refix
13574{
13575 Elf_Internal_Rela *irel;
13576 asection *sec;
13577 struct elf_link_hash_entry *h;
13578 int order;
13579 struct elf_nds32_ex9_refix *next;
13580};
13581
13582static struct bfd_hash_table ex9_code_table;
13583static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13584static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13585
13586/* EX9 hash function. */
13587
13588static struct bfd_hash_entry *
13589nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13590 struct bfd_hash_table *table,
13591 const char *string)
13592{
13593 struct elf_nds32_code_hash_entry *ret;
13594
13595 /* Allocate the structure if it has not already been allocated by a
13596 subclass. */
13597 if (entry == NULL)
13598 {
13599 entry = (struct bfd_hash_entry *)
13600 bfd_hash_allocate (table, sizeof (*ret));
13601 if (entry == NULL)
13602 return entry;
13603 }
13604
13605 /* Call the allocation method of the superclass. */
13606 entry = bfd_hash_newfunc (entry, table, string);
13607 if (entry == NULL)
13608 return entry;
13609
13610 ret = (struct elf_nds32_code_hash_entry*) entry;
13611 ret->times = 0;
13612 ret->const_insn = 0;
13613 ret->m_list = NULL;
13614 ret->sec = NULL;
13615 ret->irel = NULL;
13616 return &ret->root;
13617}
13618
13619/* Insert ex9 entry
13620 this insert must be stable sorted by times. */
13621
13622static void
13623nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13624{
13625 struct elf_nds32_insn_times_entry *temp;
13626 struct elf_nds32_insn_times_entry *temp2;
13627
13628 if (ex9_insn_head == NULL)
13629 {
13630 ex9_insn_head = ptr;
13631 ptr->next = NULL;
13632 }
13633 else
13634 {
13635 temp = ex9_insn_head;
13636 temp2 = ex9_insn_head;
13637 while (temp->next &&
13638 (temp->next->times >= ptr->times
13639 || temp->times == -1))
13640 {
13641 if (temp->times == -1)
13642 temp2 = temp;
13643 temp = temp->next;
13644 }
13645 if (ptr->times > temp->times && temp->times != -1)
13646 {
13647 ptr->next = temp;
13648 if (temp2->times == -1)
13649 temp2->next = ptr;
13650 else
13651 ex9_insn_head = ptr;
13652 }
13653 else if (temp->next == NULL)
13654 {
13655 temp->next = ptr;
13656 ptr->next = NULL;
13657 }
13658 else
13659 {
13660 ptr->next = temp->next;
13661 temp->next = ptr;
13662 }
13663 }
13664}
13665
13666/* Examine each insn times in hash table.
13667 Handle multi-link hash entry.
13668
13669 TODO: This function doesn't assign so much info since it is fake. */
13670
13671static int
13672nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13673{
13674 struct elf_nds32_insn_times_entry *ptr;
13675 int times;
13676
13677 if (h->m_list == NULL)
13678 {
13679 /* Local symbol insn or insn without relocation. */
13680 if (h->times < 3)
13681 return TRUE;
13682
13683 ptr = (struct elf_nds32_insn_times_entry *)
13684 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13685 ptr->times = h->times;
13686 ptr->string = h->root.string;
13687 ptr->m_list = NULL;
13688 ptr->sec = h->sec;
13689 ptr->irel = h->irel;
13690 ptr->rel_backup = h->rel_backup;
13691 nds32_elf_ex9_insert_entry (ptr);
13692 }
13693 else
13694 {
13695 /* Global symbol insn. */
13696 /* Only sethi insn has multiple m_list. */
13697 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13698
13699 times = 0;
13700 while (m_list)
13701 {
13702 times += m_list->times;
13703 m_list = m_list->next;
13704 }
13705 if (times >= 3)
13706 {
13707 m_list = h->m_list;
13708 ptr = (struct elf_nds32_insn_times_entry *)
13709 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13710 ptr->times = times; /* Use the total times. */
13711 ptr->string = h->root.string;
13712 ptr->m_list = m_list;
13713 ptr->sec = h->sec;
13714 ptr->irel = m_list->irel;
13715 ptr->rel_backup = m_list->rel_backup;
13716 nds32_elf_ex9_insert_entry (ptr);
13717 }
13718 if (h->const_insn == 1)
13719 {
13720 /* sethi with constant value. */
13721 if (h->times < 3)
13722 return TRUE;
13723
13724 ptr = (struct elf_nds32_insn_times_entry *)
13725 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13726 ptr->times = h->times;
13727 ptr->string = h->root.string;
13728 ptr->m_list = NULL;
13729 ptr->sec = NULL;
13730 ptr->irel = NULL;
13731 ptr->rel_backup = h->rel_backup;
13732 nds32_elf_ex9_insert_entry (ptr);
13733 }
13734 }
13735 return TRUE;
13736}
13737
13738/* Count each insn times in hash table.
13739 Handle multi-link hash entry. */
13740
13741static int
13742nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13743{
13744 int reservation, times;
13745 unsigned long relocation, min_relocation;
13746 struct elf_nds32_insn_times_entry *ptr;
13747
13748 if (h->m_list == NULL)
13749 {
13750 /* Local symbol insn or insn without relocation. */
13751 if (h->times < 3)
13752 return TRUE;
13753 ptr = (struct elf_nds32_insn_times_entry *)
13754 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13755 ptr->times = h->times;
13756 ptr->string = h->root.string;
13757 ptr->m_list = NULL;
13758 ptr->sec = h->sec;
13759 ptr->irel = h->irel;
13760 ptr->rel_backup = h->rel_backup;
13761 nds32_elf_ex9_insert_entry (ptr);
13762 }
13763 else
13764 {
13765 /* Global symbol insn. */
13766 /* Only sethi insn has multiple m_list. */
13767 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13768
13769 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
13770 && m_list->next != NULL)
13771 {
13772 /* Sethi insn has different symbol or addend but has same hi20. */
13773 times = 0;
13774 reservation = 1;
13775 relocation = 0;
13776 min_relocation = 0xffffffff;
13777 while (m_list)
13778 {
13779 /* Get the minimum sethi address
13780 and calculate how many entry the sethi-list have to use. */
13781 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
13782 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
13783 && (m_list->h_list->h->root.u.def.section != NULL
13784 && m_list->h_list->h->root.u.def.section->output_section != NULL))
13785 {
13786 relocation = (m_list->h_list->h->root.u.def.value +
13787 m_list->h_list->h->root.u.def.section->output_section->vma +
13788 m_list->h_list->h->root.u.def.section->output_offset);
13789 relocation += m_list->irel->r_addend;
13790 }
13791 else
13792 relocation = 0;
13793 if (relocation < min_relocation)
13794 min_relocation = relocation;
13795 times += m_list->times;
13796 m_list = m_list->next;
13797 }
13798 if (min_relocation < ex9_relax_size)
13799 reservation = (min_relocation >> 12) + 1;
13800 else
13801 reservation = (min_relocation >> 12)
13802 - ((min_relocation - ex9_relax_size) >> 12) + 1;
13803 if (reservation < (times / 3))
13804 {
13805 /* Efficient enough to use ex9. */
13806 int i;
13807
13808 for (i = reservation ; i > 0; i--)
13809 {
13810 /* Allocate number of reservation ex9 entry. */
13811 ptr = (struct elf_nds32_insn_times_entry *)
13812 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13813 ptr->times = h->m_list->times / reservation;
13814 ptr->string = h->root.string;
13815 ptr->m_list = h->m_list;
13816 ptr->sec = h->sec;
13817 ptr->irel = h->m_list->irel;
13818 ptr->rel_backup = h->m_list->rel_backup;
13819 nds32_elf_ex9_insert_entry (ptr);
13820 }
13821 }
13822 }
13823 else
13824 {
13825 /* Normal global symbol that means no different address symbol
13826 using same ex9 entry. */
13827 if (m_list->times >= 3)
13828 {
13829 ptr = (struct elf_nds32_insn_times_entry *)
13830 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13831 ptr->times = m_list->times;
13832 ptr->string = h->root.string;
13833 ptr->m_list = h->m_list;
13834 ptr->sec = h->sec;
13835 ptr->irel = h->m_list->irel;
13836 ptr->rel_backup = h->m_list->rel_backup;
13837 nds32_elf_ex9_insert_entry (ptr);
13838 }
13839 }
13840
13841 if (h->const_insn == 1)
13842 {
13843 /* sethi with constant value. */
13844 if (h->times < 3)
13845 return TRUE;
13846
13847 ptr = (struct elf_nds32_insn_times_entry *)
13848 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13849 ptr->times = h->times;
13850 ptr->string = h->root.string;
13851 ptr->m_list = NULL;
13852 ptr->sec = NULL;
13853 ptr->irel = NULL;
13854 ptr->rel_backup = h->rel_backup;
13855 nds32_elf_ex9_insert_entry (ptr);
13856 }
13857 }
13858
13859 return TRUE;
13860}
13861
13862/* Hash table traverse function. */
13863
13864static void
13865nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
13866{
13867 unsigned int i;
13868
13869 ex9_code_table.frozen = 1;
13870 for (i = 0; i < ex9_code_table.size; i++)
13871 {
13872 struct bfd_hash_entry *p;
13873
13874 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
13875 if (!func ((struct elf_nds32_code_hash_entry *) p))
13876 goto out;
13877 }
13878out:
13879 ex9_code_table.frozen = 0;
13880}
13881
13882
13883/* Give order number to insn list. */
13884
13885static void
13886nds32_elf_order_insn_times (struct bfd_link_info *info)
13887{
13888 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 13889 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 13890 struct elf_nds32_link_hash_table *table;
35c08157 13891 int ex9_limit;
1c8f6a4d
KLC		 13892 int number = 0;
13893
13894 if (ex9_insn_head == NULL)
13895 return;
35c08157
KLC		 13896
13897/* The max number of entries is 512. */
13898 ex9_insn = ex9_insn_head;
13899 table = nds32_elf_hash_table (info);
13900 ex9_limit = table->ex9_limit;
13901
35c08157
KLC		 13902 ex9_insn = ex9_insn_head;
13903
1c8f6a4d 13904 while (ex9_insn != NULL && number < ex9_limit)
35c08157 13905 {
1c8f6a4d 13906 ex9_insn->order = number;
35c08157 13907 number++;
1c8f6a4d 13908 temp = ex9_insn;
35c08157
KLC		 13909 ex9_insn = ex9_insn->next;
13910 }
13911
1c8f6a4d
KLC		 13912 if (ex9_insn && temp)
13913 temp->next = NULL;
35c08157
KLC		 13914
13915 while (ex9_insn != NULL)
13916 {
13917 /* Free useless entry. */
13918 temp = ex9_insn;
13919 ex9_insn = ex9_insn->next;
13920 free (temp);
13921 }
13922}
13923
13924/* Build .ex9.itable section. */
13925
13926static void
13927nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
13928{
13929 asection *table_sec;
13930 struct elf_nds32_insn_times_entry *ptr;
13931 bfd *it_abfd;
13932 int number = 0;
13933 bfd_byte *contents = NULL;
13934
13935 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 13936 it_abfd = it_abfd->link.next)
35c08157
KLC		 13937 {
13938 /* Find the section .ex9.itable, and put all entries into it. */
13939 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
13940 if (table_sec != NULL)
13941 {
0c4bd9d9 13942 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC		 13943 return;
13944
13945 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13946 number++;
13947
13948 table_sec->size = number * 4;
13949
13950 if (number == 0)
1c8f6a4d 13951 return;
35c08157
KLC		 13952
13953 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
13954 number = 0;
13955 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
13956 {
13957 long val;
13958
13959 val = strtol (ptr->string, NULL, 16);
13960 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
13961 number++;
13962 }
13963 break;
13964 }
13965 }
13966}
13967
13968/* Get insn with regs according to relocation type. */
13969
13970static void
13971nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 13972 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC		 13973{
13974 reloc_howto_type *howto = NULL;
13975
13976 if (irel == NULL
13977 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13978 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13979 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
13980 {
13981 *insn_with_reg = insn;
13982 return;
13983 }
13984
13985 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
13986 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
13987}
13988
13989/* Mask number of address bits according to relocation. */
13990
13991static unsigned long
13992nds32_elf_irel_mask (Elf_Internal_Rela *irel)
13993{
13994 reloc_howto_type *howto = NULL;
13995
13996 if (irel == NULL
13997 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
13998 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
13999 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14000 return 0;
14001
14002 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14003 return howto->dst_mask;
14004}
14005
14006static void
14007nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14008 struct elf_nds32_irel_entry *irel_ptr)
14009{
14010 if (*irel_list == NULL)
14011 {
14012 *irel_list = irel_ptr;
14013 irel_ptr->next = NULL;
14014 }
14015 else
14016 {
14017 irel_ptr->next = *irel_list;
14018 *irel_list = irel_ptr;
14019 }
14020}
14021
14022static void
14023nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14024 struct elf_link_hash_entry *h, int order)
14025{
14026 struct elf_nds32_ex9_refix *ptr;
14027
14028 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14029 ptr->sec = sec;
14030 ptr->irel = irel;
14031 ptr->h = h;
14032 ptr->order = order;
14033 ptr->next = NULL;
14034
14035 if (ex9_refix_head == NULL)
14036 ex9_refix_head = ptr;
14037 else
14038 {
14039 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14040
14041 while (temp->next != NULL)
14042 temp = temp->next;
14043 temp->next = ptr;
14044 }
14045}
14046
14047enum
14048{
14049 DATA_EXIST = 1,
14050 CLEAN_PRE = 1 << 1,
14051 PUSH_PRE = 1 << 2
14052};
14053
14054/* Check relocation type if supporting for ex9. */
14055
14056static int
14057nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14058 Elf_Internal_Rela **irel,
14059 Elf_Internal_Rela *irelend,
14060 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14061 asection *sec,bfd_vma *off,
35c08157
KLC		 14062 bfd_byte *contents)
14063{
14064 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14065 bfd_boolean nested_ex9, nested_loop;
14066 bfd_boolean ex9_loop_aware;
14067 /* We use the highest 1 byte of result to record
14068 how many bytes location counter has to move. */
14069 int result = 0;
14070 Elf_Internal_Rela *irel_save = NULL;
14071 struct elf_nds32_link_hash_table *table;
14072
14073 table = nds32_elf_hash_table (info);
14074 ex9_loop_aware = table->ex9_loop_aware;
14075
14076 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14077 {
14078 switch (ELF32_R_TYPE ((*irel)->r_info))
14079 {
14080 case R_NDS32_RELAX_REGION_BEGIN:
14081 /* Ignore code block. */
14082 nested_ex9 = FALSE;
14083 nested_loop = FALSE;
14084 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14085 || (ex9_loop_aware
14086 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14087 {
14088 /* Check the region if loop or not. If it is true and
14089 ex9-loop-aware is true, ignore the region till region end. */
14090 /* To save the status for in .no_relax ex9 region and
14091 loop region to conform the block can do ex9 relaxation. */
14092 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14093 nested_loop = (ex9_loop_aware
14094 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14095 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14096 {
14097 (*irel)++;
14098 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14099 {
14100 /* There may be nested region. */
14101 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14102 nested_ex9 = TRUE;
14103 else if (ex9_loop_aware
14104 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14105 nested_loop = TRUE;
14106 }
14107 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14108 {
14109 /* The end of region. */
14110 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14111 nested_ex9 = FALSE;
14112 else if (ex9_loop_aware
14113 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14114 nested_loop = FALSE;
14115 }
1c8f6a4d 14116 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC		 14117 && ((*irel)->r_addend & 0x1f) == 2)
14118 {
14119 /* Alignment exist in the region. */
14120 result |= CLEAN_PRE;
14121 if (((*irel)->r_offset -
14122 get_nds32_elf_blank_total (&relax_blank_list,
14123 (*irel)->r_offset, 0)) & 0x02)
14124 result |= PUSH_PRE;
14125 }
14126 }
14127 if ((*irel) >= irelend)
14128 *off = sec->size;
14129 else
14130 *off = (*irel)->r_offset;
14131
14132 /* The final instruction in the region, regard this one as data to ignore it. */
14133 result |= DATA_EXIST;
14134 return result;
14135 }
14136 break;
14137
14138 case R_NDS32_LABEL:
1c8f6a4d 14139 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC		 14140 {
14141 /* Check this point is align and decide to do ex9 or not. */
14142 result |= CLEAN_PRE;
14143 if (((*irel)->r_offset -
14144 get_nds32_elf_blank_total (&relax_blank_list,
14145 (*irel)->r_offset, 0)) & 0x02)
14146 result |= PUSH_PRE;
14147 }
14148 break;
14149 case R_NDS32_32_RELA:
14150 /* Data. */
14151 result |= (4 << 24);
14152 result |= DATA_EXIST;
14153 break;
14154 case R_NDS32_16_RELA:
14155 /* Data. */
14156 result |= (2 << 24);
14157 result |= DATA_EXIST;
14158 break;
14159 case R_NDS32_DATA:
14160 /* Data. */
14161 /* The least code alignment is 2. If the data is only one byte,
14162 we have to shift one more byte. */
14163 if ((*irel)->r_addend == 1)
14164 result |= ((*irel)->r_addend << 25) ;
14165 else
14166 result |= ((*irel)->r_addend << 24) ;
14167
14168 result |= DATA_EXIST;
14169 break;
14170
14171 case R_NDS32_25_PCREL_RELA:
14172 case R_NDS32_SDA16S3_RELA:
14173 case R_NDS32_SDA15S3_RELA:
14174 case R_NDS32_SDA15S3:
14175 case R_NDS32_SDA17S2_RELA:
14176 case R_NDS32_SDA15S2_RELA:
14177 case R_NDS32_SDA12S2_SP_RELA:
14178 case R_NDS32_SDA12S2_DP_RELA:
14179 case R_NDS32_SDA15S2:
14180 case R_NDS32_SDA18S1_RELA:
14181 case R_NDS32_SDA15S1_RELA:
14182 case R_NDS32_SDA15S1:
14183 case R_NDS32_SDA19S0_RELA:
14184 case R_NDS32_SDA15S0_RELA:
14185 case R_NDS32_SDA15S0:
14186 case R_NDS32_HI20_RELA:
14187 case R_NDS32_LO12S0_ORI_RELA:
14188 case R_NDS32_LO12S0_RELA:
14189 case R_NDS32_LO12S1_RELA:
14190 case R_NDS32_LO12S2_RELA:
14191 /* These relocation is supported ex9 relaxation currently. */
14192 /* We have to save the relocation for using later, since we have
14193 to check there is any alignment in the same address. */
14194 irel_save = *irel;
14195 break;
14196 default:
14197 /* Not support relocations. */
14198 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC		 14199 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14200 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC		 14201 {
14202 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14203 But we have to consider if there is any side-effect. */
14204 if (!(result & DATA_EXIST))
14205 {
14206 /* We have to confirm there is no data relocation in the
14207 same address. In general case, this won't happen. */
14208 /* We have to do ex9 conservative, for those relocation not
14209 considerd we ignore instruction. */
14210 result |= DATA_EXIST;
14211 if (*(contents + *off) & 0x80)
14212 result |= (2 << 24);
14213 else
14214 result |= (4 << 24);
14215 break;
14216 }
14217 }
14218 }
14219 if ((*irel) < irelend
14220 && ((*irel) + 1) < irelend
14221 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14222 /* There are relocations pointing to the same address, we have to
14223 check all of them. */
14224 (*irel)++;
14225 else
14226 {
14227 if (irel_save)
14228 *irel = irel_save;
14229 return result;
14230 }
14231 }
14232 return result;
14233}
14234
1c8f6a4d
KLC		 14235/* Replace with ex9 instruction. */
14236
14237static bfd_boolean
14238nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14239 nds32_elf_blank_t **relax_blank_list,
14240 struct elf_nds32_irel_entry *pre_irel_ptr,
14241 struct elf_nds32_irel_entry **irel_list)
14242{
14243 if (insn16 != 0)
14244 {
14245 /* Implement the ex9 relaxation. */
14246 bfd_putb16 (insn16, contents + pre_off);
14247 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14248 pre_off + 2, 2))
14249 return FALSE;
14250 if (pre_irel_ptr != NULL)
14251 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14252 }
14253 return TRUE;
14254}
14255
35c08157
KLC		 14256/* Replace input file instruction which is in ex9 itable. */
14257
14258static bfd_boolean
14259nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14260{
14261 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14262 bfd_byte *contents = NULL;
1c8f6a4d
KLC		 14263 bfd_vma off;
14264 uint16_t insn16, insn_ex9;
35c08157 14265 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC		 14266 bfd_vma pre_off = -1;
14267 uint16_t pre_insn16 = 0;
35c08157
KLC		 14268 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14269 Elf_Internal_Rela *internal_relocs;
14270 Elf_Internal_Rela *irel;
14271 Elf_Internal_Rela *irelend;
14272 Elf_Internal_Shdr *symtab_hdr;
14273 Elf_Internal_Sym *isym = NULL;
14274 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC		 14275 uint32_t insn = 0;
14276 uint32_t insn_with_reg = 0;
14277 uint32_t it_insn;
14278 uint32_t it_insn_with_reg;
35c08157
KLC		 14279 unsigned long r_symndx;
14280 asection *isec;
14281 struct elf_nds32_irel_entry *irel_list = NULL;
14282 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14283 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC		 14284 struct elf_link_hash_entry_list *h_list;
14285
35c08157
KLC		 14286
14287 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14288 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC		 14289 || !nds32_get_local_syms (abfd, sec, &isym))
14290 return FALSE;
1c8f6a4d
KLC		 14291 internal_relocs =
14292 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC		 14293 irelend = internal_relocs + sec->reloc_count;
14294 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14295
14296 off = 0;
14297
14298 /* Check if the object enable ex9. */
1c8f6a4d
KLC		 14299 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14300 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 14301
14302 /* Check this section trigger ex9 relaxation. */
14303 if (irel == NULL
14304 || irel >= irelend
14305 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14306 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14307 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14308 return TRUE;
14309
14310 irel = internal_relocs;
14311
14312 /* Check alignment and fetch proper relocation. */
14313 while (off < sec->size)
14314 {
14315 struct elf_link_hash_entry *h = NULL;
14316 struct elf_nds32_irel_entry *irel_ptr = NULL;
14317
14318 /* Syn the instruction and the relocation. */
14319 while (irel != NULL && irel < irelend && irel->r_offset < off)
14320 irel++;
14321
14322 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14323 relax_blank_list, sec,
14324 &off, contents);
14325 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC		 14326 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14327 &relax_blank_list, pre_irel_ptr,
14328 &irel_list))
14329 return FALSE;
35c08157
KLC		 14330
14331 if (data_flag & CLEAN_PRE)
14332 {
14333 pre_off = 0;
14334 pre_insn16 = 0;
14335 pre_irel_ptr = NULL;
14336 }
14337 if (data_flag & DATA_EXIST)
14338 {
14339 /* We save the move offset in the highest byte. */
14340 off += (data_flag >> 24);
14341 continue;
14342 }
14343
14344 if (*(contents + off) & 0x80)
14345 {
14346 /* 2-byte instruction. */
14347 off += 2;
14348 continue;
14349 }
14350
14351 /* Load the instruction and its opcode with register for comparing. */
14352 ex9_insn = ex9_insn_head;
14353 insn = bfd_getb32 (contents + off);
14354 insn_with_reg = 0;
14355 while (ex9_insn)
14356 {
14357 it_insn = strtol (ex9_insn->string, NULL, 16);
14358 it_insn_with_reg = 0;
14359 do_replace = 0;
14360 save_irel = 0;
14361
14362 if (irel != NULL && irel < irelend && irel->r_offset == off)
14363 {
14364 /* Insn with relocation. */
14365 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14366
14367 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC		 14368 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14369 &it_insn_with_reg);
35c08157
KLC		 14370
14371 if (ex9_insn->irel != NULL
1c8f6a4d
KLC		 14372 && (ELF32_R_TYPE (irel->r_info) ==
14373 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC		 14374 && (insn_with_reg == it_insn_with_reg))
14375 {
14376 /* Insn relocation and format is the same as table entry. */
14377
14378 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14379 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14380 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14381 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14382 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14383 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14384 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14385 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14386 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14387 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14388 && ELF32_R_TYPE (irel->r_info) <=
14389 R_NDS32_SDA12S2_SP_RELA)
14390 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14391 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14392 {
14393 r_symndx = ELF32_R_SYM (irel->r_info);
14394 if (r_symndx < symtab_hdr->sh_info)
14395 {
14396 /* Local symbol. */
14397 int shndx = isym[r_symndx].st_shndx;
14398
14399 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14400 if (ex9_insn->sec == isec
14401 && ex9_insn->irel->r_addend == irel->r_addend
14402 && ex9_insn->irel->r_info == irel->r_info)
14403 {
14404 do_replace = 1;
14405 save_irel = 1;
14406 }
14407 }
14408 else
14409 {
14410 /* External symbol. */
14411 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14412 if (ex9_insn->m_list)
14413 {
35c08157
KLC		 14414 h_list = ex9_insn->m_list->h_list;
14415 while (h_list)
14416 {
14417 if (h == h_list->h
1c8f6a4d
KLC		 14418 && (ex9_insn->m_list->irel->r_addend ==
14419 irel->r_addend))
35c08157
KLC		 14420 {
14421 do_replace = 1;
14422 save_irel = 1;
14423 break;
14424 }
14425 h_list = h_list->next;
14426 }
14427 }
14428 }
14429 }
14430 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14431 {
14432 r_symndx = ELF32_R_SYM (irel->r_info);
14433 if (r_symndx < symtab_hdr->sh_info)
14434 {
14435 /* Local symbols. Compare its base symbol and offset. */
14436 int shndx = isym[r_symndx].st_shndx;
14437
14438 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14439 if (ex9_insn->sec == isec
14440 && ex9_insn->irel->r_addend == irel->r_addend
14441 && ex9_insn->irel->r_info == irel->r_info)
14442 {
14443 do_replace = 1;
14444 save_irel = 1;
14445 }
14446 }
14447 else
14448 {
14449 /* External symbol. */
14450 struct elf_link_hash_entry_mul_list *m_list;
14451
14452 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14453 m_list = ex9_insn->m_list;
14454
14455 while (m_list)
14456 {
1c8f6a4d 14457 h_list = m_list->h_list;
35c08157
KLC		 14458
14459 while (h_list)
14460 {
14461 if (h == h_list->h
1c8f6a4d
KLC		 14462 && (m_list->irel->r_addend
14463 == irel->r_addend))
35c08157
KLC		 14464 {
14465 do_replace = 1;
14466 save_irel = 1;
14467 if (ex9_insn->next
14468 && ex9_insn->m_list
14469 && ex9_insn->m_list == ex9_insn->next->m_list)
14470 {
14471 /* sethi multiple entry must be fixed */
14472 nds32_elf_ex9_insert_fix (sec, irel,
14473 h, ex9_insn->order);
14474 }
14475 break;
14476 }
14477 h_list = h_list->next;
14478 }
14479 m_list = m_list->next;
14480 }
14481 }
14482 }
14483 }
14484
14485 /* Import table: Check the symbol hash table and the
14486 jump target. Only R_NDS32_25_PCREL_RELA now. */
14487 else if (ex9_insn->times == -1
14488 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14489 {
14490 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14491 if (insn_with_reg == it_insn_with_reg)
14492 {
14493 char code[10];
14494 bfd_vma relocation;
14495
14496 r_symndx = ELF32_R_SYM (irel->r_info);
14497 if (r_symndx >= symtab_hdr->sh_info)
14498 {
14499 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14500 if ((h->root.type == bfd_link_hash_defined
14501 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC		 14502 && h->root.u.def.section != NULL
14503 && h->root.u.def.section->output_section != NULL
35c08157 14504 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14505 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC		 14506 && h->root.u.def.value > sec->size)
14507 {
1c8f6a4d
KLC		 14508 relocation = h->root.u.def.value +
14509 h->root.u.def.section->output_section->vma +
14510 h->root.u.def.section->output_offset;
35c08157 14511 relocation += irel->r_addend;
1c8f6a4d
KLC		 14512 insn = insn_with_reg
14513 | ((relocation >> 1) & 0xffffff);
14514 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 14515 if (strcmp (code, ex9_insn->string) == 0)
14516 {
14517 do_replace = 1;
14518 save_irel = 1;
14519 }
14520 }
14521 }
14522 }
14523 }
14524 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 14525 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14526 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 14527 {
14528 /* These relocations do not have to relocate contens, so it can
14529 be regard as instruction without relocation. */
14530 if (insn == it_insn && ex9_insn->irel == NULL)
14531 do_replace = 1;
14532 }
14533 }
14534 else
14535 {
14536 /* Instruction without relocation, we only
14537 have to compare their byte code. */
14538 if (insn == it_insn && ex9_insn->irel == NULL)
14539 do_replace = 1;
14540 }
14541
14542 /* Insntruction match so replacing the code here. */
14543 if (do_replace == 1)
14544 {
14545 /* There are two formats of ex9 instruction. */
14546 if (ex9_insn->order < 32)
14547 insn_ex9 = INSN_EX9_IT_2;
14548 else
14549 insn_ex9 = INSN_EX9_IT_1;
14550 insn16 = insn_ex9 | ex9_insn->order;
14551
1c8f6a4d
KLC		 14552 /* Insert ex9 instruction. */
14553 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14554 &relax_blank_list, pre_irel_ptr,
14555 &irel_list);
35c08157
KLC		 14556 pre_off = off;
14557 pre_insn16 = insn16;
14558
14559 if (save_irel)
14560 {
14561 /* For instuction with relocation do relax. */
14562 irel_ptr = (struct elf_nds32_irel_entry *)
14563 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14564 irel_ptr->irel = irel;
14565 irel_ptr->next = NULL;
14566 pre_irel_ptr = irel_ptr;
14567 }
14568 else
14569 pre_irel_ptr = NULL;
14570 break;
14571 }
14572 ex9_insn = ex9_insn->next;
14573 }
14574 off += 4;
14575 }
14576
1c8f6a4d
KLC		 14577 /* Insert ex9 instruction. */
14578 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14579 &relax_blank_list, pre_irel_ptr,
14580 &irel_list);
35c08157
KLC		 14581
14582 /* Delete the redundant code. */
14583 if (relax_blank_list)
14584 {
14585 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14586 relax_blank_list = NULL;
14587 }
14588
14589 /* Clear the relocation that is replaced by ex9. */
14590 while (irel_list)
14591 {
14592 struct elf_nds32_irel_entry *irel_ptr;
14593
14594 irel_ptr = irel_list;
14595 irel_list = irel_ptr->next;
14596 irel_ptr->irel->r_info =
14597 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14598 free (irel_ptr);
14599 }
14600 return TRUE;
14601}
14602
14603/* Initialize ex9 hash table. */
14604
14605int
14606nds32_elf_ex9_init (void)
14607{
14608 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14609 sizeof (struct elf_nds32_code_hash_entry),
14610 1023))
14611 {
38f14ab8 14612 _bfd_error_handler (_("cannot init ex9 hash table error"));
35c08157
KLC		 14613 return FALSE;
14614 }
14615 return TRUE;
14616}
14617
14618/* Predict how many bytes will be relaxed with ex9 and ifc. */
14619
14620static void
14621nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14622{
14623 struct elf_nds32_insn_times_entry *ex9_insn;
14624 struct elf_nds32_insn_times_entry *temp;
14625 int target_optimize;
14626 struct elf_nds32_link_hash_table *table;
14627
14628 if (ex9_insn_head == NULL)
14629 return;
14630
14631 table = nds32_elf_hash_table (info);
14632 target_optimize = table->target_optimize;
14633 ex9_insn = ex9_insn_head;
14634 while (ex9_insn)
14635 {
14636 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14637 temp = ex9_insn;
14638 ex9_insn = ex9_insn->next;
14639 free (temp);
14640 }
14641 ex9_insn_head = NULL;
14642
14643 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14644 {
14645 /* Examine ifc reduce size. */
14646 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14647 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14648 int size = 0;
14649
14650 while (ifc_ent)
14651 {
14652 if (ifc_ent->enable == 0)
14653 {
14654 /* Not ifc yet. */
14655 irel_ptr = ifc_ent->irel_head;
14656 while (irel_ptr)
14657 {
14658 size += 2;
14659 irel_ptr = irel_ptr->next;
14660 }
14661 }
14662 size -= 2;
14663 ifc_ent = ifc_ent->next;
14664 }
14665 ex9_relax_size += size;
14666 }
14667}
14668
14669/* Finish ex9 table. */
14670
14671void
14672nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14673{
35c08157
KLC		 14674 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14675 nds32_elf_order_insn_times (link_info);
14676 nds32_elf_ex9_total_relax (link_info);
14677 /* Traverse the hash table and count its times. */
14678 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14679 nds32_elf_order_insn_times (link_info);
14680 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC		 14681}
14682
14683/* Relocate the entries in ex9 table. */
14684
14685static bfd_vma
14686nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14687 struct bfd_link_info *link_info)
14688{
14689 Elf_Internal_Sym *isym = NULL;
14690 bfd_vma relocation = -1;
1c8f6a4d 14691 struct elf_link_hash_entry *h;
35c08157
KLC		 14692
14693 if (ptr->m_list != NULL)
14694 {
14695 /* Global symbol. */
1c8f6a4d
KLC		 14696 h = ptr->m_list->h_list->h;
14697 if ((h->root.type == bfd_link_hash_defined
14698 || h->root.type == bfd_link_hash_defweak)
14699 && h->root.u.def.section != NULL
14700 && h->root.u.def.section->output_section != NULL)
35c08157
KLC		 14701 {
14702
1c8f6a4d
KLC		 14703 relocation = h->root.u.def.value +
14704 h->root.u.def.section->output_section->vma +
14705 h->root.u.def.section->output_offset;
35c08157
KLC		 14706 relocation += ptr->m_list->irel->r_addend;
14707 }
14708 else
14709 relocation = 0;
14710 }
14711 else if (ptr->sec !=NULL)
14712 {
14713 /* Local symbol. */
14714 Elf_Internal_Sym sym;
14715 asection *sec = NULL;
14716 asection isec;
14717 asection *isec_ptr = &isec;
14718 Elf_Internal_Rela irel_backup = *(ptr->irel);
14719 asection *sec_backup = ptr->sec;
14720 bfd *abfd = ptr->sec->owner;
14721
14722 if (!nds32_get_local_syms (abfd, sec, &isym))
14723 return FALSE;
14724 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14725
14726 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14727 if (sec != NULL)
14728 *isec_ptr = *sec;
14729 sym = *isym;
14730
14731 /* The purpose is same as elf_link_input_bfd. */
14732 if (isec_ptr != NULL
14733 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14734 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14735 {
14736 sym.st_value =
14737 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14738 elf_section_data (isec_ptr)->sec_info,
14739 isym->st_value);
14740 }
14741 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14742 &ptr->sec, ptr->irel);
14743 if (ptr->irel != NULL)
14744 relocation += ptr->irel->r_addend;
14745
14746 /* Restore origin value since there may be some insntructions that
14747 could not be replaced with ex9.it. */
14748 *(ptr->irel) = irel_backup;
14749 ptr->sec = sec_backup;
14750 }
14751
14752 return relocation;
14753}
14754
14755/* Import ex9 table and build list. */
14756
14757void
14758nds32_elf_ex9_import_table (struct bfd_link_info *info)
14759{
1c8f6a4d 14760 int num = 0;
35c08157 14761 bfd_byte *contents;
35c08157
KLC		 14762 FILE *ex9_import_file;
14763 int update_ex9_table;
14764 struct elf_nds32_link_hash_table *table;
14765
14766 table = nds32_elf_hash_table (info);
14767 ex9_import_file = table->ex9_import_file;
1c8f6a4d 14768 rewind (table->ex9_import_file);
35c08157
KLC		 14769
14770 contents = bfd_malloc (sizeof (bfd_byte) * 4);
14771
35c08157 14772 /* Read instructions from the input file and build the list. */
1c8f6a4d 14773 while (!feof (ex9_import_file))
35c08157 14774 {
1b7e3d2f 14775 unsigned long insn;
35c08157
KLC		 14776 char *code;
14777 struct elf_nds32_insn_times_entry *ptr;
14778 size_t nread;
14779
14780 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC		 14781 /* Ignore the final byte 0x0a. */
14782 if (nread < 1)
14783 break;
35c08157
KLC		 14784 insn = bfd_getb32 (contents);
14785 code = bfd_malloc (sizeof (char) * 9);
1b7e3d2f 14786 snprintf (code, 9, "%08lx", (insn & 0xffffffff));
35c08157
KLC		 14787 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14788 ptr->string = code;
14789 ptr->order = num;
14790 ptr->times = -1;
14791 ptr->sec = NULL;
14792 ptr->m_list = NULL;
14793 ptr->rel_backup.r_offset = 0;
14794 ptr->rel_backup.r_info = 0;
14795 ptr->rel_backup.r_addend = 0;
14796 ptr->irel = NULL;
14797 ptr->next = NULL;
14798 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC		 14799 num++;
14800 }
14801
14802 update_ex9_table = table->update_ex9_table;
14803 if (update_ex9_table == 1)
14804 {
14805 /* It has to consider of sethi need to use multiple page
14806 but it not be done yet. */
14807 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14808 nds32_elf_order_insn_times (info);
14809 }
14810}
14811
14812/* Export ex9 table. */
14813
14814static void
14815nds32_elf_ex9_export (struct bfd_link_info *info,
14816 bfd_byte *contents, int size)
14817{
14818 FILE *ex9_export_file;
14819 struct elf_nds32_link_hash_table *table;
14820
14821 table = nds32_elf_hash_table (info);
14822 ex9_export_file = table->ex9_export_file;
14823 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
14824 fclose (ex9_export_file);
14825}
14826
14827/* Adjust relocations of J and JAL in ex9.itable.
14828 Export ex9 table. */
14829
1c8f6a4d 14830static void
35c08157
KLC		 14831nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
14832{
14833 asection *table_sec = NULL;
14834 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14835 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
14836 bfd *it_abfd;
1c8f6a4d 14837 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC		 14838 bfd_byte *contents = NULL, *source_contents = NULL;
14839 int size = 0;
14840 bfd_vma gp;
14841 int shift, update_ex9_table, offset = 0;
14842 reloc_howto_type *howto = NULL;
14843 Elf_Internal_Rela rel_backup;
14844 unsigned short insn_ex9;
14845 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC		 14846 FILE *ex9_export_file;
14847 static bfd_boolean done = FALSE;
14848
14849 if (done)
14850 return;
14851
14852 done = TRUE;
35c08157
KLC		 14853
14854 table = nds32_elf_hash_table (link_info);
14855 if (table)
14856 table->relax_status |= NDS32_RELAX_EX9_DONE;
14857
14858
14859 update_ex9_table = table->update_ex9_table;
14860 /* Generated ex9.itable exactly. */
14861 if (update_ex9_table == 0)
14862 {
14863 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14864 it_abfd = it_abfd->link.next)
35c08157
KLC		 14865 {
14866 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14867 if (table_sec != NULL)
14868 break;
14869 }
14870
14871 if (table_sec != NULL)
14872 {
14873 bfd *output_bfd;
35c08157
KLC		 14874
14875 output_bfd = table_sec->output_section->owner;
14876 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14877 if (table_sec->size == 0)
14878 return;
14879
0c4bd9d9 14880 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 14881 return;
35c08157
KLC		 14882 }
14883 }
14884 else
14885 {
14886 /* Set gp. */
14887 bfd *output_bfd;
14888
14889 output_bfd = link_info->input_bfds->sections->output_section->owner;
14890 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
14891 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
14892 }
14893
14894 /* Relocate instruction. */
14895 while (ex9_insn)
14896 {
14897 bfd_vma relocation, min_relocation = 0xffffffff;
14898
14899 insn = strtol (ex9_insn->string, NULL, 16);
14900 insn_with_reg = 0;
14901 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
14902 {
14903 if (ex9_insn->m_list)
14904 rel_backup = ex9_insn->m_list->rel_backup;
14905 else
14906 rel_backup = ex9_insn->rel_backup;
14907
14908 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
14909 howto =
14910 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
14911 (rel_backup.r_info));
14912 shift = howto->rightshift;
14913 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
14914 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
14915 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
14916 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
14917 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
14918 {
14919 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14920 insn =
14921 insn_with_reg | ((relocation >> shift) &
14922 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14923 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14924 }
14925 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
14926 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
14927 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
14928 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
14929 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
14930 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
14931 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
14932 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
14933 {
14934 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
14935 insn =
14936 insn_with_reg | (((relocation - gp) >> shift) &
14937 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14938 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14939 }
14940 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
14941 {
14942 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC		 14943 if (ex9_insn->next && ex9_insn->m_list
14944 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 14945 {
14946 struct elf_link_hash_entry_mul_list *m_list;
14947 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 14948 struct elf_link_hash_entry *h;
35c08157
KLC		 14949
14950 temp_ptr = ex9_insn;
14951 temp_ptr2 = ex9_insn;
14952 m_list = ex9_insn->m_list;
14953 while (m_list)
14954 {
1c8f6a4d
KLC		 14955 h = m_list->h_list->h;
14956 relocation = h->root.u.def.value +
14957 h->root.u.def.section->output_section->vma +
14958 h->root.u.def.section->output_offset;
35c08157
KLC		 14959 relocation += m_list->irel->r_addend;
14960
14961 if (relocation < min_relocation)
14962 min_relocation = relocation;
14963 m_list = m_list->next;
14964 }
14965 relocation = min_relocation;
14966
14967 /* Put insntruction into ex9 table. */
14968 insn = insn_with_reg
14969 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14970 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14971 relocation = relocation + 0x1000; /* hi20 */
14972
1c8f6a4d
KLC		 14973 while (ex9_insn->next && ex9_insn->m_list
14974 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC		 14975 {
14976 /* Multiple sethi. */
14977 ex9_insn = ex9_insn->next;
14978 size += 4;
35c08157
KLC		 14979 insn =
14980 insn_with_reg | ((relocation >> shift) &
14981 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 14982 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 14983 relocation = relocation + 0x1000; /* hi20 */
14984 }
14985
14986 fix_ptr = ex9_refix_head;
14987 while (fix_ptr)
14988 {
14989 /* Fix ex9 insn. */
14990 /* temp_ptr2 points to the head of multiple sethi. */
14991 temp_ptr = temp_ptr2;
14992 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
14993 {
14994 fix_ptr = fix_ptr->next;
14995 }
14996 if (fix_ptr->order != temp_ptr->order)
14997 break;
14998
14999 /* Set source insn. */
1c8f6a4d
KLC		 15000 relocation =
15001 fix_ptr->h->root.u.def.value +
15002 fix_ptr->h->root.u.def.section->output_section->vma +
15003 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC		 15004 relocation += fix_ptr->irel->r_addend;
15005 /* sethi imm is imm20s. */
15006 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15007
15008 while (temp_ptr)
15009 {
35c08157
KLC		 15010 /* Match entry and source code. */
15011 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15012 if (insn == source_insn)
15013 {
15014 /* Fix the ex9 insn. */
15015 if (temp_ptr->order != fix_ptr->order)
15016 {
15017 if (!nds32_get_section_contents
15018 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15019 &source_contents, TRUE))
4eca0228 15020 _bfd_error_handler
38f14ab8 15021 (_("error: cannot fix ex9 relocation"));
35c08157
KLC		 15022 if (temp_ptr->order < 32)
15023 insn_ex9 = INSN_EX9_IT_2;
15024 else
15025 insn_ex9 = INSN_EX9_IT_1;
15026 insn_ex9 = insn_ex9 | temp_ptr->order;
15027 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15028 }
15029 break;
15030 }
15031 else
15032 {
15033 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
4eca0228 15034 _bfd_error_handler
35c08157
KLC		 15035 (_("Linker: error cannot fixed ex9 relocation \n"));
15036 else
15037 temp_ptr = temp_ptr->next;
15038 }
15039 }
15040 fix_ptr = fix_ptr->next;
15041 }
15042 }
15043 else
15044 {
15045 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15046 insn = insn_with_reg
15047 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15048 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC		 15049 }
15050 }
15051 }
15052 else
15053 {
15054 /* Insn without relocation does not have to be fixed
15055 if need to update export table. */
15056 if (update_ex9_table == 1)
15057 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15058 }
15059 ex9_insn = ex9_insn->next;
15060 size += 4;
15061 }
15062
15063 ex9_export_file = table->ex9_export_file;
15064 if (ex9_export_file != NULL)
1c8f6a4d 15065 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC		 15066 else if (update_ex9_table == 1)
15067 {
1c8f6a4d
KLC		 15068 table->ex9_export_file = table->ex9_import_file;
15069 rewind (table->ex9_export_file);
15070 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC		 15071 }
15072}
15073
15074/* Generate ex9 hash table. */
15075
15076static bfd_boolean
f4cb41f4 15077nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC		 15078 struct bfd_link_info *link_info)
15079{
15080 Elf_Internal_Rela *internal_relocs;
15081 Elf_Internal_Rela *irelend;
15082 Elf_Internal_Rela *irel;
15083 Elf_Internal_Rela *jrel;
15084 Elf_Internal_Rela rel_backup;
15085 Elf_Internal_Shdr *symtab_hdr;
15086 Elf_Internal_Sym *isym = NULL;
15087 asection *isec;
15088 struct elf_link_hash_entry **sym_hashes;
15089 bfd_byte *contents = NULL;
f4cb41f4 15090 bfd_vma off = 0;
35c08157 15091 unsigned long r_symndx;
1c8f6a4d 15092 uint32_t insn, insn_with_reg;
35c08157
KLC		 15093 struct elf_link_hash_entry *h;
15094 int data_flag, shift, align;
15095 bfd_vma relocation;
15096 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15097 reloc_howto_type *howto = NULL;
15098
15099 sym_hashes = elf_sym_hashes (abfd);
15100 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15101 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC		 15102 return FALSE;
15103
15104 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15105 TRUE /* keep_memory */);
15106 irelend = internal_relocs + sec->reloc_count;
15107 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15108 if (!nds32_get_local_syms (abfd, sec, &isym))
15109 return FALSE;
15110
15111 /* Check the object if enable ex9. */
15112 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15113 R_NDS32_RELAX_ENTRY);
15114
15115 /* Check this section trigger ex9 relaxation. */
15116 if (irel == NULL
15117 || irel >= irelend
15118 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15119 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15120 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15121 return TRUE;
15122
15123 irel = internal_relocs;
15124
15125 /* Push each insn into hash table. */
15126 while (off < sec->size)
15127 {
15128 char code[10];
15129 struct elf_nds32_code_hash_entry *entry;
15130
15131 while (irel != NULL && irel < irelend && irel->r_offset < off)
15132 irel++;
15133
1c8f6a4d
KLC		 15134 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15135 NULL, sec, &off, contents);
35c08157
KLC		 15136 if (data_flag & DATA_EXIST)
15137 {
15138 /* We save the move offset in the highest byte. */
15139 off += (data_flag >> 24);
15140 continue;
15141 }
15142
15143 if (*(contents + off) & 0x80)
15144 {
15145 off += 2;
15146 }
15147 else
15148 {
15149 h = NULL;
15150 isec = NULL;
15151 jrel = NULL;
15152 rel_backup.r_info = 0;
15153 rel_backup.r_offset = 0;
15154 rel_backup.r_addend = 0;
15155 /* Load the instruction and its opcode with register for comparing. */
15156 insn = bfd_getb32 (contents + off);
15157 insn_with_reg = 0;
15158 if (irel != NULL && irel < irelend && irel->r_offset == off)
15159 {
15160 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15161 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15162 shift = howto->rightshift;
15163 align = (1 << shift) - 1;
15164 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15165 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15166 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15167 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15168 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15169 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15170 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15171 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15172 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15173 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15174 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15175 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15176 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15177 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15178 {
15179 r_symndx = ELF32_R_SYM (irel->r_info);
15180 jrel = irel;
15181 rel_backup = *irel;
15182 if (r_symndx < symtab_hdr->sh_info)
15183 {
15184 /* Local symbol. */
15185 int shndx = isym[r_symndx].st_shndx;
15186
15187 bfd_vma st_value = (isym + r_symndx)->st_value;
15188 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15189 relocation = (isec->output_section->vma + isec->output_offset
15190 + st_value + irel->r_addend);
15191 }
15192 else
15193 {
15194 /* External symbol. */
15195 bfd_boolean warned ATTRIBUTE_UNUSED;
15196 bfd_boolean ignored ATTRIBUTE_UNUSED;
15197 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15198 asection *sym_sec;
15199
15200 /* Maybe there is a better way to get h and relocation */
15201 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15202 r_symndx, symtab_hdr, sym_hashes,
15203 h, sym_sec, relocation,
15204 unresolved_reloc, warned, ignored);
15205 relocation += irel->r_addend;
1c8f6a4d
KLC		 15206 if ((h->root.type != bfd_link_hash_defined
15207 && h->root.type != bfd_link_hash_defweak)
15208 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC		 15209 {
15210 off += 4;
15211 continue;
15212 }
15213 }
15214
15215 /* Check for gp relative instruction alignment. */
15216 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15217 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15218 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15219 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15220 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15221 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15222 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15223 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15224 {
15225 bfd_vma gp;
15226 bfd *output_bfd = sec->output_section->owner;
15227 bfd_reloc_status_type r;
15228
15229 /* If the symbol is in the abs section, the out_bfd will be null.
15230 This happens when the relocation has a symbol@GOTOFF. */
15231 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15232 if (r != bfd_reloc_ok)
15233 {
15234 off += 4;
15235 continue;
15236 }
15237
15238 relocation -= gp;
15239
15240 /* Make sure alignment is correct. */
15241 if (relocation & align)
15242 {
15243 /* Incorrect alignment. */
4eca0228 15244 _bfd_error_handler
695344c0 15245 /* xgettext:c-format */
871b3ab2 15246 (_("%pB: warning: unaligned small data access "
2dcf00ce
AM		 15247 "for entry: {%" PRId64 ", %" PRId64 ", %" PRId64
15248 "}, addr = %#" PRIx64 ", align = %#x"),
15249 abfd, (int64_t) irel->r_offset,
15250 (int64_t) irel->r_info, (int64_t) irel->r_addend,
15251 (uint64_t) relocation, align);
35c08157
KLC		 15252 off += 4;
15253 continue;
15254 }
15255 }
15256
15257 insn = insn_with_reg
15258 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15259 }
15260 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC		 15261 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15262 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC		 15263 {
15264 /* These relocations do not have to relocate contens, so it can
15265 be regard as instruction without relocation. */
15266 }
15267 else
15268 {
15269 off += 4;
15270 continue;
15271 }
15272 }
15273
1c8f6a4d 15274 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC		 15275 /* Copy "code". */
15276 entry = (struct elf_nds32_code_hash_entry*)
15277 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15278 if (entry == NULL)
15279 {
4eca0228 15280 _bfd_error_handler
d42c267e 15281 (_("failed creating ex9.it %s hash table entry"), code);
35c08157
KLC		 15282 return FALSE;
15283 }
15284 if (h)
15285 {
15286 if (h->root.type == bfd_link_hash_undefined)
15287 return TRUE;
15288 /* Global symbol. */
15289 /* In order to do sethi with different symbol but same value. */
15290 if (entry->m_list == NULL)
15291 {
15292 struct elf_link_hash_entry_mul_list *m_list_new;
15293 struct elf_link_hash_entry_list *h_list_new;
15294
15295 m_list_new = (struct elf_link_hash_entry_mul_list *)
15296 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15297 h_list_new = (struct elf_link_hash_entry_list *)
15298 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15299 entry->m_list = m_list_new;
15300 m_list_new->h_list = h_list_new;
15301 m_list_new->rel_backup = rel_backup;
15302 m_list_new->times = 1;
15303 m_list_new->irel = jrel;
15304 m_list_new->next = NULL;
15305 h_list_new->h = h;
15306 h_list_new->next = NULL;
15307 }
15308 else
15309 {
15310 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15311 struct elf_link_hash_entry_list *h_list;
15312
15313 while (m_list)
15314 {
15315 /* Build the different symbols that point to the same address. */
15316 h_list = m_list->h_list;
15317 if (h_list->h->root.u.def.value == h->root.u.def.value
15318 && h_list->h->root.u.def.section->output_section->vma
15319 == h->root.u.def.section->output_section->vma
15320 && h_list->h->root.u.def.section->output_offset
15321 == h->root.u.def.section->output_offset
15322 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15323 {
15324 m_list->times++;
15325 m_list->irel = jrel;
15326 while (h_list->h != h && h_list->next)
15327 h_list = h_list->next;
15328 if (h_list->h != h)
15329 {
15330 struct elf_link_hash_entry_list *h_list_new;
15331
15332 h_list_new = (struct elf_link_hash_entry_list *)
15333 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15334 h_list->next = h_list_new;
15335 h_list_new->h = h;
15336 h_list_new->next = NULL;
15337 }
15338 break;
15339 }
15340 /* The sethi case may have different address but the
15341 hi20 is the same. */
15342 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15343 && m_list->next == NULL)
15344 {
15345 struct elf_link_hash_entry_mul_list *m_list_new;
15346 struct elf_link_hash_entry_list *h_list_new;
15347
15348 m_list_new = (struct elf_link_hash_entry_mul_list *)
15349 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15350 h_list_new = (struct elf_link_hash_entry_list *)
15351 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15352 m_list->next = m_list_new;
15353 m_list_new->h_list = h_list_new;
15354 m_list_new->rel_backup = rel_backup;
15355 m_list_new->times = 1;
15356 m_list_new->irel = jrel;
15357 m_list_new->next = NULL;
15358 h_list_new->h = h;
15359 h_list_new->next = NULL;
15360 break;
15361 }
15362 m_list = m_list->next;
15363 }
15364 if (!m_list)
15365 {
15366 off += 4;
15367 continue;
15368 }
15369 }
15370 }
15371 else
15372 {
15373 /* Local symbol and insn without relocation*/
15374 entry->times++;
15375 entry->rel_backup = rel_backup;
15376 }
15377
15378 /* Use in sethi insn with constant and global symbol in same format. */
15379 if (!jrel)
15380 entry->const_insn = 1;
15381 else
15382 entry->irel = jrel;
15383 entry->sec = isec;
15384 off += 4;
15385 }
15386 }
15387 return TRUE;
15388}
15389
15390/* Set the _ITB_BASE, and point it to ex9 table. */
15391
15392bfd_boolean
15393nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15394{
15395 bfd *abfd;
15396 asection *sec;
15397 bfd *output_bfd = NULL;
15398 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC		 15399
15400 if (is_ITB_BASE_set == 1)
15401 return TRUE;
15402
15403 is_ITB_BASE_set = 1;
15404
1c8f6a4d
KLC		 15405 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15406
15407 if (bh && (bh->type == bfd_link_hash_defined
15408 || bh->type == bfd_link_hash_defweak))
15409 return TRUE;
35c08157
KLC		 15410
15411 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15412 abfd = abfd->link.next)
35c08157
KLC		 15413 {
15414 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15415 if (sec != NULL)
15416 {
15417 output_bfd = sec->output_section->owner;
15418 break;
15419 }
15420 }
15421 if (output_bfd == NULL)
15422 {
15423 output_bfd = link_info->output_bfd;
15424 if (output_bfd->sections == NULL)
15425 return TRUE;
15426 else
15427 sec = bfd_abs_section_ptr;
15428 }
15429 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15430 FALSE, FALSE, TRUE);
15431 return (_bfd_generic_link_add_one_symbol
15432 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15433 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC		 15434 (const char *) NULL, FALSE, get_elf_backend_data
15435 (output_bfd)->collect, &bh));
15436} /* End EX9.IT */
15437\f
15438
15439#define ELF_ARCH bfd_arch_nds32
15440#define ELF_MACHINE_CODE EM_NDS32
15441#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 15442#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15443
6d00b590 15444#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15445#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15446#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 15447#define TARGET_LITTLE_NAME "elf32-nds32le"
15448
15449#define elf_info_to_howto nds32_info_to_howto
15450#define elf_info_to_howto_rel nds32_info_to_howto_rel
15451
15452#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15453#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15454#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15455#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15456#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15457
07d6d2b8 15458#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 15459#define elf_backend_action_discarded nds32_elf_action_discarded
15460#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15461#define elf_backend_check_relocs nds32_elf_check_relocs
15462#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15463#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15464#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15465#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15466#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15467#define elf_backend_relocate_section nds32_elf_relocate_section
15468#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 15469#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15470#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15471#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15472#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15473#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15474#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15475#define elf_backend_object_p nds32_elf_object_p
15476#define elf_backend_final_write_processing nds32_elf_final_write_processing
15477#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d 15478#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 15479 nds32_elf_get_relocated_section_contents
35c08157
KLC		 15480
15481#define elf_backend_can_gc_sections 1
15482#define elf_backend_can_refcount 1
15483#define elf_backend_want_got_plt 1
15484#define elf_backend_plt_readonly 1
15485#define elf_backend_want_plt_sym 0
15486#define elf_backend_got_header_size 12
15487#define elf_backend_may_use_rel_p 1
15488#define elf_backend_default_use_rela_p 1
15489#define elf_backend_may_use_rela_p 1
64f52338 15490#define elf_backend_dtrel_excludes_plt 1
35c08157
KLC		 15491
15492#include "elf32-target.h"
15493
15494#undef ELF_MAXPAGESIZE
15495#define ELF_MAXPAGESIZE 0x2000
15496
15497#undef TARGET_BIG_SYM
6d00b590 15498#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC		 15499#undef TARGET_BIG_NAME
15500#define TARGET_BIG_NAME "elf32-nds32be-linux"
15501#undef TARGET_LITTLE_SYM
6d00b590 15502#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC		 15503#undef TARGET_LITTLE_NAME
15504#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15505#undef elf32_bed
15506#define elf32_bed elf32_nds32_lin_bed
15507
15508#include "elf32-target.h"
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