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[thirdparty/binutils-gdb.git] / bfd / elf32-nds32.c
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35c08157 1/* NDS32-specific support for 32-bit ELF.
6f2750fe 2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
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3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
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21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
59static void nds32_elf_relocate_hi20
60 (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
61static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
62 (enum elf_nds32_reloc_type);
63static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
64 (bfd *, bfd_reloc_code_real_type);
65
66/* Target hooks. */
67static void nds32_info_to_howto_rel
68 (bfd *, arelent *, Elf_Internal_Rela *dst);
69static void nds32_info_to_howto
70 (bfd *, arelent *, Elf_Internal_Rela *dst);
71static bfd_boolean nds32_elf_add_symbol_hook
72 (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
73 flagword *, asection **, bfd_vma *);
74static bfd_boolean nds32_elf_relocate_section
75 (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
76 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
77static bfd_boolean nds32_elf_object_p (bfd *);
78static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
79static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
80static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
81static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
82static bfd_boolean nds32_elf_gc_sweep_hook
83 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
84static bfd_boolean nds32_elf_check_relocs
85 (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
86static asection *nds32_elf_gc_mark_hook
87 (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
88 struct elf_link_hash_entry *, Elf_Internal_Sym *);
89static bfd_boolean nds32_elf_adjust_dynamic_symbol
90 (struct bfd_link_info *, struct elf_link_hash_entry *);
91static bfd_boolean nds32_elf_size_dynamic_sections
92 (bfd *, struct bfd_link_info *);
93static bfd_boolean nds32_elf_create_dynamic_sections
94 (bfd *, struct bfd_link_info *);
95static bfd_boolean nds32_elf_finish_dynamic_sections
96 (bfd *, struct bfd_link_info *info);
97static bfd_boolean nds32_elf_finish_dynamic_symbol
98 (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
99 Elf_Internal_Sym *);
1c8f6a4d 100static bfd_boolean nds32_elf_mkobject (bfd *);
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101
102/* Nds32 helper functions. */
103static bfd_reloc_status_type nds32_elf_final_sda_base
104 (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
105static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
106static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
107static Elf_Internal_Rela *find_relocs_at_address
108 (Elf_Internal_Rela *, Elf_Internal_Rela *,
109 Elf_Internal_Rela *, enum elf_nds32_reloc_type);
110static bfd_vma calculate_memory_address
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111(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
112static int nds32_get_section_contents (bfd *, asection *,
113 bfd_byte **, bfd_boolean);
35c08157 114static bfd_boolean nds32_elf_ex9_build_hash_table
0c4bd9d9 115(bfd *, asection *, struct bfd_link_info *);
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116static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
117static void nds32_elf_ex9_import_table (struct bfd_link_info *);
118static void nds32_elf_ex9_finish (struct bfd_link_info *);
119static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
35c08157 120static void nds32_elf_get_insn_with_reg
1c8f6a4d 121 (Elf_Internal_Rela *, uint32_t, uint32_t *);
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122static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
123 Elf_Internal_Sym **);
124static bfd_boolean nds32_elf_ex9_replace_instruction
125 (struct bfd_link_info *, bfd *, asection *);
126static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
127 asection *);
1c8f6a4d 128static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
35c08157 129static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
1c8f6a4d 130static bfd_boolean nds32_elf_ifc_reloc (void);
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131static bfd_boolean nds32_relax_fp_as_gp
132 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
133 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
134 Elf_Internal_Sym *isymbuf);
135static bfd_boolean nds32_fag_remove_unused_fpbase
136 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
137 Elf_Internal_Rela *irelend);
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138static bfd_byte *
139nds32_elf_get_relocated_section_contents (bfd *abfd,
140 struct bfd_link_info *link_info,
141 struct bfd_link_order *link_order,
142 bfd_byte *data,
143 bfd_boolean relocatable,
144 asymbol **symbols);
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145
146enum
147{
148 MACH_V1 = bfd_mach_n1h,
149 MACH_V2 = bfd_mach_n1h_v2,
150 MACH_V3 = bfd_mach_n1h_v3,
151 MACH_V3M = bfd_mach_n1h_v3m
152};
153
154#define MIN(a, b) ((a) > (b) ? (b) : (a))
155#define MAX(a, b) ((a) > (b) ? (a) : (b))
156
157/* The name of the dynamic interpreter. This is put in the .interp
158 section. */
159#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
160
161/* The nop opcode we use. */
162#define NDS32_NOP32 0x40000009
163#define NDS32_NOP16 0x9200
164
165/* The size in bytes of an entry in the procedure linkage table. */
166#define PLT_ENTRY_SIZE 24
167#define PLT_HEADER_SIZE 24
168
169/* The first entry in a procedure linkage table are reserved,
170 and the initial contents are unimportant (we zero them out).
171 Subsequent entries look like this. */
172#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
173#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
174#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
175#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
176#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
177
178/* $ta is change to $r15 (from $r25). */
179#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
180#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
181#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
182#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
183#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
184#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
185
186#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
187#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
188#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
189#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
190#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
191
192#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
193#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
194#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
195#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
196#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
197#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
198
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199/* These are macros used to get the relocation accurate value. */
200#define ACCURATE_8BIT_S1 (0x100)
201#define ACCURATE_U9BIT_S1 (0x400)
202#define ACCURATE_12BIT_S1 (0x2000)
203#define ACCURATE_14BIT_S1 (0x4000)
204#define ACCURATE_19BIT (0x40000)
205
206/* These are macros used to get the relocation conservative value. */
207#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
208#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
209#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
210#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
211/* These must be more conservative because the address may be in
212 different segment. */
213#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
214#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
215#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
216#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
217#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
218
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219/* Size of small data/bss sections, used to calculate SDA_BASE. */
220static long got_size = 0;
221static int is_SDA_BASE_set = 0;
222static int is_ITB_BASE_set = 0;
223
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224/* Convert ELF-VER in eflags to string for debugging purpose. */
225static const char *const nds32_elfver_strtab[] =
226{
227 "ELF-1.2",
228 "ELF-1.3",
229 "ELF-1.4",
230};
231
232/* The nds32 linker needs to keep track of the number of relocs that it
233 decides to copy in check_relocs for each symbol. This is so that
234 it can discard PC relative relocs if it doesn't need them when
235 linking with -Bsymbolic. We store the information in a field
236 extending the regular ELF linker hash table. */
237
238/* This structure keeps track of the number of PC relative relocs we
239 have copied for a given symbol. */
240
241struct elf_nds32_pcrel_relocs_copied
242{
243 /* Next section. */
244 struct elf_nds32_pcrel_relocs_copied *next;
245 /* A section in dynobj. */
246 asection *section;
247 /* Number of relocs copied in this section. */
248 bfd_size_type count;
249};
250
251/* The sh linker needs to keep track of the number of relocs that it
252 decides to copy as dynamic relocs in check_relocs for each symbol.
253 This is so that it can later discard them if they are found to be
254 unnecessary. We store the information in a field extending the
255 regular ELF linker hash table. */
256
257struct elf_nds32_dyn_relocs
258{
259 struct elf_nds32_dyn_relocs *next;
260
261 /* The input section of the reloc. */
262 asection *sec;
263
264 /* Total number of relocs copied for the input section. */
265 bfd_size_type count;
266
267 /* Number of pc-relative relocs copied for the input section. */
268 bfd_size_type pc_count;
269};
270
271/* Nds32 ELF linker hash entry. */
272
273struct elf_nds32_link_hash_entry
274{
275 struct elf_link_hash_entry root;
276
277 /* Track dynamic relocs copied for this symbol. */
278 struct elf_nds32_dyn_relocs *dyn_relocs;
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279
280 /* For checking relocation type. */
281#define GOT_UNKNOWN 0
282#define GOT_NORMAL 1
283#define GOT_TLS_IE 2
284 unsigned int tls_type;
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285};
286
287/* Get the nds32 ELF linker hash table from a link_info structure. */
288
289#define FP_BASE_NAME "_FP_BASE_"
290static int check_start_export_sym = 0;
291static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
292
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293/* The offset for executable tls relaxation. */
294#define TP_OFFSET 0x0
295
296struct elf_nds32_obj_tdata
297{
298 struct elf_obj_tdata root;
299
300 /* tls_type for each local got entry. */
301 char *local_got_tls_type;
302};
303
304#define elf_nds32_tdata(bfd) \
305 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
306
307#define elf32_nds32_local_got_tls_type(bfd) \
308 (elf_nds32_tdata (bfd)->local_got_tls_type)
309
310#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
311
312static bfd_boolean
313nds32_elf_mkobject (bfd *abfd)
314{
315 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
316 NDS32_ELF_DATA);
317}
318
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319/* Relocations used for relocation. */
320static reloc_howto_type nds32_elf_howto_table[] =
321{
322 /* This reloc does nothing. */
323 HOWTO (R_NDS32_NONE, /* type */
324 0, /* rightshift */
6346d5ca
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325 3, /* size (0 = byte, 1 = short, 2 = long) */
326 0, /* bitsize */
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327 FALSE, /* pc_relative */
328 0, /* bitpos */
6346d5ca 329 complain_overflow_dont, /* complain_on_overflow */
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330 bfd_elf_generic_reloc, /* special_function */
331 "R_NDS32_NONE", /* name */
332 FALSE, /* partial_inplace */
333 0, /* src_mask */
334 0, /* dst_mask */
335 FALSE), /* pcrel_offset */
336
337 /* A 16 bit absolute relocation. */
338 HOWTO (R_NDS32_16, /* type */
339 0, /* rightshift */
340 1, /* size (0 = byte, 1 = short, 2 = long) */
341 16, /* bitsize */
342 FALSE, /* pc_relative */
343 0, /* bitpos */
344 complain_overflow_bitfield, /* complain_on_overflow */
345 nds32_elf_generic_reloc, /* special_function */
346 "R_NDS32_16", /* name */
347 FALSE, /* partial_inplace */
348 0xffff, /* src_mask */
349 0xffff, /* dst_mask */
350 FALSE), /* pcrel_offset */
351
352 /* A 32 bit absolute relocation. */
353 HOWTO (R_NDS32_32, /* type */
354 0, /* rightshift */
355 2, /* size (0 = byte, 1 = short, 2 = long) */
356 32, /* bitsize */
357 FALSE, /* pc_relative */
358 0, /* bitpos */
359 complain_overflow_bitfield, /* complain_on_overflow */
360 nds32_elf_generic_reloc, /* special_function */
361 "R_NDS32_32", /* name */
362 FALSE, /* partial_inplace */
363 0xffffffff, /* src_mask */
364 0xffffffff, /* dst_mask */
365 FALSE), /* pcrel_offset */
366
367 /* A 20 bit address. */
368 HOWTO (R_NDS32_20, /* type */
369 0, /* rightshift */
370 2, /* size (0 = byte, 1 = short, 2 = long) */
371 20, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_unsigned, /* complain_on_overflow */
375 nds32_elf_generic_reloc, /* special_function */
376 "R_NDS32_20", /* name */
377 FALSE, /* partial_inplace */
378 0xfffff, /* src_mask */
379 0xfffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 /* An PC Relative 9-bit relocation, shifted by 2.
383 This reloc is complicated because relocations are relative to pc & -4.
384 i.e. branches in the right insn slot use the address of the left insn
385 slot for pc. */
386 /* ??? It's not clear whether this should have partial_inplace set or not.
387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
390 HOWTO (R_NDS32_9_PCREL, /* type */
391 1, /* rightshift */
392 1, /* size (0 = byte, 1 = short, 2 = long) */
393 8, /* bitsize */
394 TRUE, /* pc_relative */
395 0, /* bitpos */
396 complain_overflow_signed, /* complain_on_overflow */
397 nds32_elf_9_pcrel_reloc, /* special_function */
398 "R_NDS32_9_PCREL", /* name */
399 FALSE, /* partial_inplace */
400 0xff, /* src_mask */
401 0xff, /* dst_mask */
402 TRUE), /* pcrel_offset */
403
404 /* A relative 15 bit relocation, right shifted by 1. */
405 HOWTO (R_NDS32_15_PCREL, /* type */
406 1, /* rightshift */
407 2, /* size (0 = byte, 1 = short, 2 = long) */
408 14, /* bitsize */
409 TRUE, /* pc_relative */
410 0, /* bitpos */
411 complain_overflow_signed, /* complain_on_overflow */
412 bfd_elf_generic_reloc, /* special_function */
413 "R_NDS32_15_PCREL", /* name */
414 FALSE, /* partial_inplace */
415 0x3fff, /* src_mask */
416 0x3fff, /* dst_mask */
417 TRUE), /* pcrel_offset */
418
419 /* A relative 17 bit relocation, right shifted by 1. */
420 HOWTO (R_NDS32_17_PCREL, /* type */
421 1, /* rightshift */
422 2, /* size (0 = byte, 1 = short, 2 = long) */
423 16, /* bitsize */
424 TRUE, /* pc_relative */
425 0, /* bitpos */
426 complain_overflow_signed, /* complain_on_overflow */
427 bfd_elf_generic_reloc, /* special_function */
428 "R_NDS32_17_PCREL", /* name */
429 FALSE, /* partial_inplace */
430 0xffff, /* src_mask */
431 0xffff, /* dst_mask */
432 TRUE), /* pcrel_offset */
433
434 /* A relative 25 bit relocation, right shifted by 1. */
435 /* ??? It's not clear whether this should have partial_inplace set or not.
436 Branch relaxing in the assembler can store the addend in the insn,
437 and if bfd_install_relocation gets called the addend may get added
438 again. */
439 HOWTO (R_NDS32_25_PCREL, /* type */
440 1, /* rightshift */
441 2, /* size (0 = byte, 1 = short, 2 = long) */
442 24, /* bitsize */
443 TRUE, /* pc_relative */
444 0, /* bitpos */
445 complain_overflow_signed, /* complain_on_overflow */
446 bfd_elf_generic_reloc, /* special_function */
447 "R_NDS32_25_PCREL", /* name */
448 FALSE, /* partial_inplace */
449 0xffffff, /* src_mask */
450 0xffffff, /* dst_mask */
451 TRUE), /* pcrel_offset */
452
453 /* High 20 bits of address when lower 12 is or'd in. */
454 HOWTO (R_NDS32_HI20, /* type */
455 12, /* rightshift */
456 2, /* size (0 = byte, 1 = short, 2 = long) */
457 20, /* bitsize */
458 FALSE, /* pc_relative */
459 0, /* bitpos */
460 complain_overflow_dont,/* complain_on_overflow */
461 nds32_elf_hi20_reloc, /* special_function */
462 "R_NDS32_HI20", /* name */
463 FALSE, /* partial_inplace */
464 0x000fffff, /* src_mask */
465 0x000fffff, /* dst_mask */
466 FALSE), /* pcrel_offset */
467
468 /* Lower 12 bits of address. */
469 HOWTO (R_NDS32_LO12S3, /* type */
470 3, /* rightshift */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
472 9, /* bitsize */
473 FALSE, /* pc_relative */
474 0, /* bitpos */
475 complain_overflow_dont,/* complain_on_overflow */
476 nds32_elf_lo12_reloc, /* special_function */
477 "R_NDS32_LO12S3", /* name */
478 FALSE, /* partial_inplace */
479 0x000001ff, /* src_mask */
480 0x000001ff, /* dst_mask */
481 FALSE), /* pcrel_offset */
482
483 /* Lower 12 bits of address. */
484 HOWTO (R_NDS32_LO12S2, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 10, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_dont,/* complain_on_overflow */
491 nds32_elf_lo12_reloc, /* special_function */
492 "R_NDS32_LO12S2", /* name */
493 FALSE, /* partial_inplace */
494 0x000003ff, /* src_mask */
495 0x000003ff, /* dst_mask */
496 FALSE), /* pcrel_offset */
497
498 /* Lower 12 bits of address. */
499 HOWTO (R_NDS32_LO12S1, /* type */
500 1, /* rightshift */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
502 11, /* bitsize */
503 FALSE, /* pc_relative */
504 0, /* bitpos */
505 complain_overflow_dont,/* complain_on_overflow */
506 nds32_elf_lo12_reloc, /* special_function */
507 "R_NDS32_LO12S1", /* name */
508 FALSE, /* partial_inplace */
509 0x000007ff, /* src_mask */
510 0x000007ff, /* dst_mask */
511 FALSE), /* pcrel_offset */
512
513 /* Lower 12 bits of address. */
514 HOWTO (R_NDS32_LO12S0, /* type */
515 0, /* rightshift */
516 2, /* size (0 = byte, 1 = short, 2 = long) */
517 12, /* bitsize */
518 FALSE, /* pc_relative */
519 0, /* bitpos */
520 complain_overflow_dont,/* complain_on_overflow */
521 nds32_elf_lo12_reloc, /* special_function */
522 "R_NDS32_LO12S0", /* name */
523 FALSE, /* partial_inplace */
524 0x00000fff, /* src_mask */
525 0x00000fff, /* dst_mask */
526 FALSE), /* pcrel_offset */
527
528 /* Small data area 15 bits offset. */
529 HOWTO (R_NDS32_SDA15S3, /* type */
530 3, /* rightshift */
531 2, /* size (0 = byte, 1 = short, 2 = long) */
532 15, /* bitsize */
533 FALSE, /* pc_relative */
534 0, /* bitpos */
535 complain_overflow_signed, /* complain_on_overflow */
536 nds32_elf_sda15_reloc, /* special_function */
537 "R_NDS32_SDA15S3", /* name */
538 FALSE, /* partial_inplace */
539 0x00007fff, /* src_mask */
540 0x00007fff, /* dst_mask */
541 FALSE), /* pcrel_offset */
542
543 /* Small data area 15 bits offset. */
544 HOWTO (R_NDS32_SDA15S2, /* type */
545 2, /* rightshift */
546 2, /* size (0 = byte, 1 = short, 2 = long) */
547 15, /* bitsize */
548 FALSE, /* pc_relative */
549 0, /* bitpos */
550 complain_overflow_signed, /* complain_on_overflow */
551 nds32_elf_sda15_reloc, /* special_function */
552 "R_NDS32_SDA15S2", /* name */
553 FALSE, /* partial_inplace */
554 0x00007fff, /* src_mask */
555 0x00007fff, /* dst_mask */
556 FALSE), /* pcrel_offset */
557
558 /* Small data area 15 bits offset. */
559 HOWTO (R_NDS32_SDA15S1, /* type */
560 1, /* rightshift */
561 2, /* size (0 = byte, 1 = short, 2 = long) */
562 15, /* bitsize */
563 FALSE, /* pc_relative */
564 0, /* bitpos */
565 complain_overflow_signed, /* complain_on_overflow */
566 nds32_elf_sda15_reloc, /* special_function */
567 "R_NDS32_SDA15S1", /* name */
568 FALSE, /* partial_inplace */
569 0x00007fff, /* src_mask */
570 0x00007fff, /* dst_mask */
571 FALSE), /* pcrel_offset */
572
573 /* Small data area 15 bits offset. */
574 HOWTO (R_NDS32_SDA15S0, /* type */
575 0, /* rightshift */
576 2, /* size (0 = byte, 1 = short, 2 = long) */
577 15, /* bitsize */
578 FALSE, /* pc_relative */
579 0, /* bitpos */
580 complain_overflow_signed, /* complain_on_overflow */
581 nds32_elf_sda15_reloc, /* special_function */
582 "R_NDS32_SDA15S0", /* name */
583 FALSE, /* partial_inplace */
584 0x00007fff, /* src_mask */
585 0x00007fff, /* dst_mask */
586 FALSE), /* pcrel_offset */
587
588 /* GNU extension to record C++ vtable hierarchy */
589 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
590 0, /* rightshift */
591 2, /* size (0 = byte, 1 = short, 2 = long) */
592 0, /* bitsize */
593 FALSE, /* pc_relative */
594 0, /* bitpos */
595 complain_overflow_dont,/* complain_on_overflow */
596 NULL, /* special_function */
597 "R_NDS32_GNU_VTINHERIT", /* name */
598 FALSE, /* partial_inplace */
599 0, /* src_mask */
600 0, /* dst_mask */
601 FALSE), /* pcrel_offset */
602
603 /* GNU extension to record C++ vtable member usage */
604 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
605 0, /* rightshift */
606 2, /* size (0 = byte, 1 = short, 2 = long) */
607 0, /* bitsize */
608 FALSE, /* pc_relative */
609 0, /* bitpos */
610 complain_overflow_dont,/* complain_on_overflow */
611 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
612 "R_NDS32_GNU_VTENTRY", /* name */
613 FALSE, /* partial_inplace */
614 0, /* src_mask */
615 0, /* dst_mask */
616 FALSE), /* pcrel_offset */
617
618 /* A 16 bit absolute relocation. */
619 HOWTO (R_NDS32_16_RELA, /* type */
620 0, /* rightshift */
621 1, /* size (0 = byte, 1 = short, 2 = long) */
622 16, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_bitfield, /* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_NDS32_16_RELA", /* name */
628 FALSE, /* partial_inplace */
629 0xffff, /* src_mask */
630 0xffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 /* A 32 bit absolute relocation. */
634 HOWTO (R_NDS32_32_RELA, /* type */
635 0, /* rightshift */
636 2, /* size (0 = byte, 1 = short, 2 = long) */
637 32, /* bitsize */
638 FALSE, /* pc_relative */
639 0, /* bitpos */
640 complain_overflow_bitfield, /* complain_on_overflow */
641 bfd_elf_generic_reloc, /* special_function */
642 "R_NDS32_32_RELA", /* name */
643 FALSE, /* partial_inplace */
644 0xffffffff, /* src_mask */
645 0xffffffff, /* dst_mask */
646 FALSE), /* pcrel_offset */
647
648 /* A 20 bit address. */
649 HOWTO (R_NDS32_20_RELA, /* type */
650 0, /* rightshift */
651 2, /* size (0 = byte, 1 = short, 2 = long) */
652 20, /* bitsize */
653 FALSE, /* pc_relative */
654 0, /* bitpos */
655 complain_overflow_signed, /* complain_on_overflow */
656 bfd_elf_generic_reloc, /* special_function */
657 "R_NDS32_20_RELA", /* name */
658 FALSE, /* partial_inplace */
659 0xfffff, /* src_mask */
660 0xfffff, /* dst_mask */
661 FALSE), /* pcrel_offset */
662
663 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
664 1, /* rightshift */
665 1, /* size (0 = byte, 1 = short, 2 = long) */
666 8, /* bitsize */
667 TRUE, /* pc_relative */
668 0, /* bitpos */
669 complain_overflow_signed, /* complain_on_overflow */
670 bfd_elf_generic_reloc, /* special_function */
671 "R_NDS32_9_PCREL_RELA",/* name */
672 FALSE, /* partial_inplace */
673 0xff, /* src_mask */
674 0xff, /* dst_mask */
675 TRUE), /* pcrel_offset */
676
677 /* A relative 15 bit relocation, right shifted by 1. */
678 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
679 1, /* rightshift */
680 2, /* size (0 = byte, 1 = short, 2 = long) */
681 14, /* bitsize */
682 TRUE, /* pc_relative */
683 0, /* bitpos */
684 complain_overflow_signed, /* complain_on_overflow */
685 bfd_elf_generic_reloc, /* special_function */
686 "R_NDS32_15_PCREL_RELA", /* name */
687 FALSE, /* partial_inplace */
688 0x3fff, /* src_mask */
689 0x3fff, /* dst_mask */
690 TRUE), /* pcrel_offset */
691
692 /* A relative 17 bit relocation, right shifted by 1. */
693 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
694 1, /* rightshift */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
696 16, /* bitsize */
697 TRUE, /* pc_relative */
698 0, /* bitpos */
699 complain_overflow_signed, /* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_NDS32_17_PCREL_RELA", /* name */
702 FALSE, /* partial_inplace */
703 0xffff, /* src_mask */
704 0xffff, /* dst_mask */
705 TRUE), /* pcrel_offset */
706
707 /* A relative 25 bit relocation, right shifted by 2. */
708 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
709 1, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 24, /* bitsize */
712 TRUE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_signed, /* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_NDS32_25_PCREL_RELA", /* name */
717 FALSE, /* partial_inplace */
718 0xffffff, /* src_mask */
719 0xffffff, /* dst_mask */
720 TRUE), /* pcrel_offset */
721
722 /* High 20 bits of address when lower 16 is or'd in. */
723 HOWTO (R_NDS32_HI20_RELA, /* type */
724 12, /* rightshift */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
726 20, /* bitsize */
727 FALSE, /* pc_relative */
728 0, /* bitpos */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_NDS32_HI20_RELA", /* name */
732 FALSE, /* partial_inplace */
733 0x000fffff, /* src_mask */
734 0x000fffff, /* dst_mask */
735 FALSE), /* pcrel_offset */
736
737 /* Lower 12 bits of address. */
738 HOWTO (R_NDS32_LO12S3_RELA, /* type */
739 3, /* rightshift */
740 2, /* size (0 = byte, 1 = short, 2 = long) */
741 9, /* bitsize */
742 FALSE, /* pc_relative */
743 0, /* bitpos */
744 complain_overflow_dont,/* complain_on_overflow */
745 bfd_elf_generic_reloc, /* special_function */
746 "R_NDS32_LO12S3_RELA", /* name */
747 FALSE, /* partial_inplace */
748 0x000001ff, /* src_mask */
749 0x000001ff, /* dst_mask */
750 FALSE), /* pcrel_offset */
751
752 /* Lower 12 bits of address. */
753 HOWTO (R_NDS32_LO12S2_RELA, /* type */
754 2, /* rightshift */
755 2, /* size (0 = byte, 1 = short, 2 = long) */
756 10, /* bitsize */
757 FALSE, /* pc_relative */
758 0, /* bitpos */
759 complain_overflow_dont,/* complain_on_overflow */
760 bfd_elf_generic_reloc, /* special_function */
761 "R_NDS32_LO12S2_RELA", /* name */
762 FALSE, /* partial_inplace */
763 0x000003ff, /* src_mask */
764 0x000003ff, /* dst_mask */
765 FALSE), /* pcrel_offset */
766
767 /* Lower 12 bits of address. */
768 HOWTO (R_NDS32_LO12S1_RELA, /* type */
769 1, /* rightshift */
770 2, /* size (0 = byte, 1 = short, 2 = long) */
771 11, /* bitsize */
772 FALSE, /* pc_relative */
773 0, /* bitpos */
774 complain_overflow_dont,/* complain_on_overflow */
775 bfd_elf_generic_reloc, /* special_function */
776 "R_NDS32_LO12S1_RELA", /* name */
777 FALSE, /* partial_inplace */
778 0x000007ff, /* src_mask */
779 0x000007ff, /* dst_mask */
780 FALSE), /* pcrel_offset */
781
782 /* Lower 12 bits of address. */
783 HOWTO (R_NDS32_LO12S0_RELA, /* type */
784 0, /* rightshift */
785 2, /* size (0 = byte, 1 = short, 2 = long) */
786 12, /* bitsize */
787 FALSE, /* pc_relative */
788 0, /* bitpos */
789 complain_overflow_dont,/* complain_on_overflow */
790 bfd_elf_generic_reloc, /* special_function */
791 "R_NDS32_LO12S0_RELA", /* name */
792 FALSE, /* partial_inplace */
793 0x00000fff, /* src_mask */
794 0x00000fff, /* dst_mask */
795 FALSE), /* pcrel_offset */
796
797 /* Small data area 15 bits offset. */
798 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
799 3, /* rightshift */
800 2, /* size (0 = byte, 1 = short, 2 = long) */
801 15, /* bitsize */
802 FALSE, /* pc_relative */
803 0, /* bitpos */
804 complain_overflow_signed, /* complain_on_overflow */
805 bfd_elf_generic_reloc, /* special_function */
806 "R_NDS32_SDA15S3_RELA",/* name */
807 FALSE, /* partial_inplace */
808 0x00007fff, /* src_mask */
809 0x00007fff, /* dst_mask */
810 FALSE), /* pcrel_offset */
811
812 /* Small data area 15 bits offset. */
813 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
814 2, /* rightshift */
815 2, /* size (0 = byte, 1 = short, 2 = long) */
816 15, /* bitsize */
817 FALSE, /* pc_relative */
818 0, /* bitpos */
819 complain_overflow_signed, /* complain_on_overflow */
820 bfd_elf_generic_reloc, /* special_function */
821 "R_NDS32_SDA15S2_RELA",/* name */
822 FALSE, /* partial_inplace */
823 0x00007fff, /* src_mask */
824 0x00007fff, /* dst_mask */
825 FALSE), /* pcrel_offset */
826
827 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
828 1, /* rightshift */
829 2, /* size (0 = byte, 1 = short, 2 = long) */
830 15, /* bitsize */
831 FALSE, /* pc_relative */
832 0, /* bitpos */
833 complain_overflow_signed, /* complain_on_overflow */
834 bfd_elf_generic_reloc, /* special_function */
835 "R_NDS32_SDA15S1_RELA",/* name */
836 FALSE, /* partial_inplace */
837 0x00007fff, /* src_mask */
838 0x00007fff, /* dst_mask */
839 FALSE), /* pcrel_offset */
840
841 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
842 0, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 15, /* bitsize */
845 FALSE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_signed, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 "R_NDS32_SDA15S0_RELA",/* name */
850 FALSE, /* partial_inplace */
851 0x00007fff, /* src_mask */
852 0x00007fff, /* dst_mask */
853 FALSE), /* pcrel_offset */
854
855 /* GNU extension to record C++ vtable hierarchy */
856 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
857 0, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 0, /* bitsize */
860 FALSE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont,/* complain_on_overflow */
863 NULL, /* special_function */
864 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
865 FALSE, /* partial_inplace */
866 0, /* src_mask */
867 0, /* dst_mask */
868 FALSE), /* pcrel_offset */
869
870 /* GNU extension to record C++ vtable member usage */
871 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
872 0, /* rightshift */
873 2, /* size (0 = byte, 1 = short, 2 = long) */
874 0, /* bitsize */
875 FALSE, /* pc_relative */
876 0, /* bitpos */
877 complain_overflow_dont,/* complain_on_overflow */
878 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
879 "R_NDS32_RELA_GNU_VTENTRY", /* name */
880 FALSE, /* partial_inplace */
881 0, /* src_mask */
882 0, /* dst_mask */
883 FALSE), /* pcrel_offset */
884
885 /* Like R_NDS32_20, but referring to the GOT table entry for
886 the symbol. */
887 HOWTO (R_NDS32_GOT20, /* type */
888 0, /* rightshift */
889 2, /* size (0 = byte, 1 = short, 2 = long) */
890 20, /* bitsize */
891 FALSE, /* pc_relative */
892 0, /* bitpos */
893 complain_overflow_signed, /* complain_on_overflow */
894 bfd_elf_generic_reloc, /* special_function */
895 "R_NDS32_GOT20", /* name */
896 FALSE, /* partial_inplace */
897 0xfffff, /* src_mask */
898 0xfffff, /* dst_mask */
899 FALSE), /* pcrel_offset */
900
901 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
902 entry for the symbol. */
903 HOWTO (R_NDS32_25_PLTREL, /* type */
904 1, /* rightshift */
905 2, /* size (0 = byte, 1 = short, 2 = long) */
906 24, /* bitsize */
907 TRUE, /* pc_relative */
908 0, /* bitpos */
909 complain_overflow_signed, /* complain_on_overflow */
910 bfd_elf_generic_reloc, /* special_function */
911 "R_NDS32_25_PLTREL", /* name */
912 FALSE, /* partial_inplace */
913 0xffffff, /* src_mask */
914 0xffffff, /* dst_mask */
915 TRUE), /* pcrel_offset */
916
917 /* This is used only by the dynamic linker. The symbol should exist
918 both in the object being run and in some shared library. The
919 dynamic linker copies the data addressed by the symbol from the
920 shared library into the object, because the object being
921 run has to have the data at some particular address. */
922 HOWTO (R_NDS32_COPY, /* type */
923 0, /* rightshift */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
925 32, /* bitsize */
926 FALSE, /* pc_relative */
927 0, /* bitpos */
928 complain_overflow_bitfield, /* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_NDS32_COPY", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 FALSE), /* pcrel_offset */
935
936 /* Like R_NDS32_20, but used when setting global offset table
937 entries. */
938 HOWTO (R_NDS32_GLOB_DAT, /* type */
939 0, /* rightshift */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
941 32, /* bitsize */
942 FALSE, /* pc_relative */
943 0, /* bitpos */
944 complain_overflow_bitfield, /* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_NDS32_GLOB_DAT", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 FALSE), /* pcrel_offset */
951
952 /* Marks a procedure linkage table entry for a symbol. */
953 HOWTO (R_NDS32_JMP_SLOT, /* type */
954 0, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 32, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_bitfield, /* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_JMP_SLOT", /* name */
962 FALSE, /* partial_inplace */
963 0xffffffff, /* src_mask */
964 0xffffffff, /* dst_mask */
965 FALSE), /* pcrel_offset */
966
967 /* Used only by the dynamic linker. When the object is run, this
968 longword is set to the load address of the object, plus the
969 addend. */
970 HOWTO (R_NDS32_RELATIVE, /* type */
971 0, /* rightshift */
972 2, /* size (0 = byte, 1 = short, 2 = long) */
973 32, /* bitsize */
974 FALSE, /* pc_relative */
975 0, /* bitpos */
976 complain_overflow_bitfield, /* complain_on_overflow */
977 bfd_elf_generic_reloc, /* special_function */
978 "R_NDS32_RELATIVE", /* name */
979 FALSE, /* partial_inplace */
980 0xffffffff, /* src_mask */
981 0xffffffff, /* dst_mask */
982 FALSE), /* pcrel_offset */
983
984 HOWTO (R_NDS32_GOTOFF, /* type */
985 0, /* rightshift */
986 2, /* size (0 = byte, 1 = short, 2 = long) */
987 20, /* bitsize */
988 FALSE, /* pc_relative */
989 0, /* bitpos */
990 complain_overflow_signed, /* complain_on_overflow */
991 bfd_elf_generic_reloc, /* special_function */
992 "R_NDS32_GOTOFF", /* name */
993 FALSE, /* partial_inplace */
994 0xfffff, /* src_mask */
995 0xfffff, /* dst_mask */
996 FALSE), /* pcrel_offset */
997
998 /* An PC Relative 20-bit relocation used when setting PIC offset
999 table register. */
1000 HOWTO (R_NDS32_GOTPC20, /* type */
1001 0, /* rightshift */
1002 2, /* size (0 = byte, 1 = short, 2 = long) */
1003 20, /* bitsize */
1004 TRUE, /* pc_relative */
1005 0, /* bitpos */
1006 complain_overflow_signed, /* complain_on_overflow */
1007 bfd_elf_generic_reloc, /* special_function */
1008 "R_NDS32_GOTPC20", /* name */
1009 FALSE, /* partial_inplace */
1010 0xfffff, /* src_mask */
1011 0xfffff, /* dst_mask */
1012 TRUE), /* pcrel_offset */
1013
1014 /* Like R_NDS32_HI20, but referring to the GOT table entry for
1015 the symbol. */
1016 HOWTO (R_NDS32_GOT_HI20, /* type */
1017 12, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 20, /* bitsize */
1020 FALSE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_NDS32_GOT_HI20", /* name */
1025 FALSE, /* partial_inplace */
1026 0x000fffff, /* src_mask */
1027 0x000fffff, /* dst_mask */
1028 FALSE), /* pcrel_offset */
1029 HOWTO (R_NDS32_GOT_LO12, /* type */
1030 0, /* rightshift */
1031 2, /* size (0 = byte, 1 = short, 2 = long) */
1032 12, /* bitsize */
1033 FALSE, /* pc_relative */
1034 0, /* bitpos */
1035 complain_overflow_dont,/* complain_on_overflow */
1036 bfd_elf_generic_reloc, /* special_function */
1037 "R_NDS32_GOT_LO12", /* name */
1038 FALSE, /* partial_inplace */
1039 0x00000fff, /* src_mask */
1040 0x00000fff, /* dst_mask */
1041 FALSE), /* pcrel_offset */
1042
1043 /* An PC Relative relocation used when setting PIC offset table register.
1044 Like R_NDS32_HI20, but referring to the GOT table entry for
1045 the symbol. */
1046 HOWTO (R_NDS32_GOTPC_HI20, /* type */
1047 12, /* rightshift */
1048 2, /* size (0 = byte, 1 = short, 2 = long) */
1049 20, /* bitsize */
1050 FALSE, /* pc_relative */
1051 0, /* bitpos */
1052 complain_overflow_dont,/* complain_on_overflow */
1053 bfd_elf_generic_reloc, /* special_function */
1054 "R_NDS32_GOTPC_HI20", /* name */
1055 FALSE, /* partial_inplace */
1056 0x000fffff, /* src_mask */
1057 0x000fffff, /* dst_mask */
1058 TRUE), /* pcrel_offset */
1059 HOWTO (R_NDS32_GOTPC_LO12, /* type */
1060 0, /* rightshift */
1061 2, /* size (0 = byte, 1 = short, 2 = long) */
1062 12, /* bitsize */
1063 FALSE, /* pc_relative */
1064 0, /* bitpos */
1065 complain_overflow_dont, /* complain_on_overflow */
1066 bfd_elf_generic_reloc, /* special_function */
1067 "R_NDS32_GOTPC_LO12", /* name */
1068 FALSE, /* partial_inplace */
1069 0x00000fff, /* src_mask */
1070 0x00000fff, /* dst_mask */
1071 TRUE), /* pcrel_offset */
1072
1073 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
1074 12, /* rightshift */
1075 2, /* size (0 = byte, 1 = short, 2 = long) */
1076 20, /* bitsize */
1077 FALSE, /* pc_relative */
1078 0, /* bitpos */
1079 complain_overflow_dont,/* complain_on_overflow */
1080 bfd_elf_generic_reloc, /* special_function */
1081 "R_NDS32_GOTOFF_HI20", /* name */
1082 FALSE, /* partial_inplace */
1083 0x000fffff, /* src_mask */
1084 0x000fffff, /* dst_mask */
1085 FALSE), /* pcrel_offset */
1086 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 12, /* bitsize */
1090 FALSE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_NDS32_GOTOFF_LO12", /* name */
1095 FALSE, /* partial_inplace */
1096 0x00000fff, /* src_mask */
1097 0x00000fff, /* dst_mask */
1098 FALSE), /* pcrel_offset */
1099
1100 /* Alignment hint for relaxable instruction. This is used with
1101 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1102 in order to make next label aligned on word boundary. */
1103 HOWTO (R_NDS32_INSN16, /* type */
1104 0, /* rightshift */
1105 2, /* size (0 = byte, 1 = short, 2 = long) */
1106 32, /* bitsize */
1107 FALSE, /* pc_relative */
1108 0, /* bitpos */
1109 complain_overflow_dont,/* complain_on_overflow */
1110 nds32_elf_ignore_reloc,/* special_function */
1111 "R_NDS32_INSN16", /* name */
1112 FALSE, /* partial_inplace */
1113 0x00000fff, /* src_mask */
1114 0x00000fff, /* dst_mask */
1115 FALSE), /* pcrel_offset */
1116
1117 /* Alignment hint for label. */
1118 HOWTO (R_NDS32_LABEL, /* type */
1119 0, /* rightshift */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1121 32, /* bitsize */
1122 FALSE, /* pc_relative */
1123 0, /* bitpos */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 nds32_elf_ignore_reloc,/* special_function */
1126 "R_NDS32_LABEL", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 FALSE), /* pcrel_offset */
1131
1132 /* Relax hint for unconditional call sequence */
1133 HOWTO (R_NDS32_LONGCALL1, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 FALSE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 nds32_elf_ignore_reloc,/* special_function */
1141 "R_NDS32_LONGCALL1", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 FALSE), /* pcrel_offset */
1146
1147 /* Relax hint for conditional call sequence. */
1148 HOWTO (R_NDS32_LONGCALL2, /* type */
1149 0, /* rightshift */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 32, /* bitsize */
1152 FALSE, /* pc_relative */
1153 0, /* bitpos */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 nds32_elf_ignore_reloc,/* special_function */
1156 "R_NDS32_LONGCALL2", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 FALSE), /* pcrel_offset */
1161
1162 /* Relax hint for conditional call sequence. */
1163 HOWTO (R_NDS32_LONGCALL3, /* type */
1164 0, /* rightshift */
1165 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 32, /* bitsize */
1167 FALSE, /* pc_relative */
1168 0, /* bitpos */
1169 complain_overflow_dont,/* complain_on_overflow */
1170 nds32_elf_ignore_reloc,/* special_function */
1171 "R_NDS32_LONGCALL3", /* name */
1172 FALSE, /* partial_inplace */
1173 0xffffffff, /* src_mask */
1174 0xffffffff, /* dst_mask */
1175 FALSE), /* pcrel_offset */
1176
1177 /* Relax hint for unconditional branch sequence. */
1178 HOWTO (R_NDS32_LONGJUMP1, /* type */
1179 0, /* rightshift */
1180 2, /* size (0 = byte, 1 = short, 2 = long) */
1181 32, /* bitsize */
1182 FALSE, /* pc_relative */
1183 0, /* bitpos */
1184 complain_overflow_dont,/* complain_on_overflow */
1185 nds32_elf_ignore_reloc,/* special_function */
1186 "R_NDS32_LONGJUMP1", /* name */
1187 FALSE, /* partial_inplace */
1188 0xffffffff, /* src_mask */
1189 0xffffffff, /* dst_mask */
1190 FALSE), /* pcrel_offset */
1191
1192 /* Relax hint for conditional branch sequence. */
1193 HOWTO (R_NDS32_LONGJUMP2, /* type */
1194 0, /* rightshift */
1195 2, /* size (0 = byte, 1 = short, 2 = long) */
1196 32, /* bitsize */
1197 FALSE, /* pc_relative */
1198 0, /* bitpos */
1199 complain_overflow_dont,/* complain_on_overflow */
1200 nds32_elf_ignore_reloc,/* special_function */
1201 "R_NDS32_LONGJUMP2", /* name */
1202 FALSE, /* partial_inplace */
1203 0xffffffff, /* src_mask */
1204 0xffffffff, /* dst_mask */
1205 FALSE), /* pcrel_offset */
1206
1207 /* Relax hint for conditional branch sequence. */
1208 HOWTO (R_NDS32_LONGJUMP3, /* type */
1209 0, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 32, /* bitsize */
1212 FALSE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont,/* complain_on_overflow */
1215 nds32_elf_ignore_reloc,/* special_function */
1216 "R_NDS32_LONGJUMP3", /* name */
1217 FALSE, /* partial_inplace */
1218 0xffffffff, /* src_mask */
1219 0xffffffff, /* dst_mask */
1220 FALSE), /* pcrel_offset */
1221
1222 /* Relax hint for load/store sequence. */
1223 HOWTO (R_NDS32_LOADSTORE, /* type */
1224 0, /* rightshift */
1225 2, /* size (0 = byte, 1 = short, 2 = long) */
1226 32, /* bitsize */
1227 FALSE, /* pc_relative */
1228 0, /* bitpos */
1229 complain_overflow_dont,/* complain_on_overflow */
1230 nds32_elf_ignore_reloc,/* special_function */
1231 "R_NDS32_LOADSTORE", /* name */
1232 FALSE, /* partial_inplace */
1233 0xffffffff, /* src_mask */
1234 0xffffffff, /* dst_mask */
1235 FALSE), /* pcrel_offset */
1236
1237 /* Relax hint for load/store sequence. */
1238 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1239 0, /* rightshift */
1240 1, /* size (0 = byte, 1 = short, 2 = long) */
1241 16, /* bitsize */
1242 FALSE, /* pc_relative */
1243 0, /* bitpos */
1244 complain_overflow_dont,/* complain_on_overflow */
1245 nds32_elf_ignore_reloc,/* special_function */
1246 "R_NDS32_9_FIXED_RELA",/* name */
1247 FALSE, /* partial_inplace */
1248 0x000000ff, /* src_mask */
1249 0x000000ff, /* dst_mask */
1250 FALSE), /* pcrel_offset */
1251
1252 /* Relax hint for load/store sequence. */
1253 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1254 0, /* rightshift */
1255 2, /* size (0 = byte, 1 = short, 2 = long) */
1256 32, /* bitsize */
1257 FALSE, /* pc_relative */
1258 0, /* bitpos */
1259 complain_overflow_dont,/* complain_on_overflow */
1260 nds32_elf_ignore_reloc,/* special_function */
1261 "R_NDS32_15_FIXED_RELA", /* name */
1262 FALSE, /* partial_inplace */
1263 0x00003fff, /* src_mask */
1264 0x00003fff, /* dst_mask */
1265 FALSE), /* pcrel_offset */
1266
1267 /* Relax hint for load/store sequence. */
1268 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1269 0, /* rightshift */
1270 2, /* size (0 = byte, 1 = short, 2 = long) */
1271 32, /* bitsize */
1272 FALSE, /* pc_relative */
1273 0, /* bitpos */
1274 complain_overflow_dont,/* complain_on_overflow */
1275 nds32_elf_ignore_reloc,/* special_function */
1276 "R_NDS32_17_FIXED_RELA", /* name */
1277 FALSE, /* partial_inplace */
1278 0x0000ffff, /* src_mask */
1279 0x0000ffff, /* dst_mask */
1280 FALSE), /* pcrel_offset */
1281
1282 /* Relax hint for load/store sequence. */
1283 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1284 0, /* rightshift */
1285 2, /* size (0 = byte, 1 = short, 2 = long) */
1286 32, /* bitsize */
1287 FALSE, /* pc_relative */
1288 0, /* bitpos */
1289 complain_overflow_dont,/* complain_on_overflow */
1290 nds32_elf_ignore_reloc,/* special_function */
1291 "R_NDS32_25_FIXED_RELA", /* name */
1292 FALSE, /* partial_inplace */
1293 0x00ffffff, /* src_mask */
1294 0x00ffffff, /* dst_mask */
1295 FALSE), /* pcrel_offset */
1296
1297 /* High 20 bits of PLT symbol offset relative to PC. */
1298 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1299 12, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 20, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_NDS32_PLTREL_HI20", /* name */
1307 FALSE, /* partial_inplace */
1308 0x000fffff, /* src_mask */
1309 0x000fffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 /* Low 12 bits of PLT symbol offset relative to PC. */
1313 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1314 0, /* rightshift */
1315 2, /* size (0 = byte, 1 = short, 2 = long) */
1316 12, /* bitsize */
1317 FALSE, /* pc_relative */
1318 0, /* bitpos */
1319 complain_overflow_dont,/* complain_on_overflow */
1320 bfd_elf_generic_reloc, /* special_function */
1321 "R_NDS32_PLTREL_LO12", /* name */
1322 FALSE, /* partial_inplace */
1323 0x00000fff, /* src_mask */
1324 0x00000fff, /* dst_mask */
1325 FALSE), /* pcrel_offset */
1326
1327 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1328 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1329 12, /* rightshift */
1330 2, /* size (0 = byte, 1 = short, 2 = long) */
1331 20, /* bitsize */
1332 FALSE, /* pc_relative */
1333 0, /* bitpos */
1334 complain_overflow_dont,/* complain_on_overflow */
1335 bfd_elf_generic_reloc, /* special_function */
1336 "R_NDS32_PLT_GOTREL_HI20", /* name */
1337 FALSE, /* partial_inplace */
1338 0x000fffff, /* src_mask */
1339 0x000fffff, /* dst_mask */
1340 FALSE), /* pcrel_offset */
1341
1342 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1343 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1344 0, /* rightshift */
1345 2, /* size (0 = byte, 1 = short, 2 = long) */
1346 12, /* bitsize */
1347 FALSE, /* pc_relative */
1348 0, /* bitpos */
1349 complain_overflow_dont,/* complain_on_overflow */
1350 bfd_elf_generic_reloc, /* special_function */
1351 "R_NDS32_PLT_GOTREL_LO12", /* name */
1352 FALSE, /* partial_inplace */
1353 0x00000fff, /* src_mask */
1354 0x00000fff, /* dst_mask */
1355 FALSE), /* pcrel_offset */
1356
1357 /* Small data area 12 bits offset. */
1358 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1359 2, /* rightshift */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1361 12, /* bitsize */
1362 FALSE, /* pc_relative */
1363 0, /* bitpos */
1364 complain_overflow_signed, /* complain_on_overflow */
1365 bfd_elf_generic_reloc, /* special_function */
1366 "R_NDS32_SDA12S2_DP_RELA", /* name */
1367 FALSE, /* partial_inplace */
1368 0x00000fff, /* src_mask */
1369 0x00000fff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1371
1372 /* Small data area 12 bits offset. */
1373 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1374 2, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 12, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_signed, /* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_NDS32_SDA12S2_SP_RELA", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00000fff, /* src_mask */
1384 0x00000fff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386 /* Lower 12 bits of address. */
1387
1388 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1389 2, /* rightshift */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 10, /* bitsize */
1392 FALSE, /* pc_relative */
1393 0, /* bitpos */
1394 complain_overflow_dont,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_NDS32_LO12S2_DP_RELA", /* name */
1397 FALSE, /* partial_inplace */
1398 0x000003ff, /* src_mask */
1399 0x000003ff, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1401
1402 /* Lower 12 bits of address. */
1403 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1404 2, /* rightshift */
1405 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 10, /* bitsize */
1407 FALSE, /* pc_relative */
1408 0, /* bitpos */
1409 complain_overflow_dont,/* complain_on_overflow */
1410 bfd_elf_generic_reloc, /* special_function */
1411 "R_NDS32_LO12S2_SP_RELA", /* name */
1412 FALSE, /* partial_inplace */
1413 0x000003ff, /* src_mask */
1414 0x000003ff, /* dst_mask */
1415 FALSE), /* pcrel_offset */
1416 /* Lower 12 bits of address. Special identity for or case. */
1417 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1418 0, /* rightshift */
1419 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 12, /* bitsize */
1421 FALSE, /* pc_relative */
1422 0, /* bitpos */
1423 complain_overflow_dont,/* complain_on_overflow */
1424 bfd_elf_generic_reloc, /* special_function */
1425 "R_NDS32_LO12S0_ORI_RELA", /* name */
1426 FALSE, /* partial_inplace */
1427 0x00000fff, /* src_mask */
1428 0x00000fff, /* dst_mask */
1429 FALSE), /* pcrel_offset */
1430 /* Small data area 19 bits offset. */
1431 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1432 3, /* rightshift */
1433 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 16, /* bitsize */
1435 FALSE, /* pc_relative */
1436 0, /* bitpos */
1437 complain_overflow_signed, /* complain_on_overflow */
1438 bfd_elf_generic_reloc, /* special_function */
1439 "R_NDS32_SDA16S3_RELA",/* name */
1440 FALSE, /* partial_inplace */
1441 0x0000ffff, /* src_mask */
1442 0x0000ffff, /* dst_mask */
1443 FALSE), /* pcrel_offset */
1444
1445 /* Small data area 15 bits offset. */
1446 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1447 2, /* rightshift */
1448 2, /* size (0 = byte, 1 = short, 2 = long) */
1449 17, /* bitsize */
1450 FALSE, /* pc_relative */
1451 0, /* bitpos */
1452 complain_overflow_signed, /* complain_on_overflow */
1453 bfd_elf_generic_reloc, /* special_function */
1454 "R_NDS32_SDA17S2_RELA",/* name */
1455 FALSE, /* partial_inplace */
1456 0x0001ffff, /* src_mask */
1457 0x0001ffff, /* dst_mask */
1458 FALSE), /* pcrel_offset */
1459
1460 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1461 1, /* rightshift */
1462 2, /* size (0 = byte, 1 = short, 2 = long) */
1463 18, /* bitsize */
1464 FALSE, /* pc_relative */
1465 0, /* bitpos */
1466 complain_overflow_signed, /* complain_on_overflow */
1467 bfd_elf_generic_reloc, /* special_function */
1468 "R_NDS32_SDA18S1_RELA",/* name */
1469 FALSE, /* partial_inplace */
1470 0x0003ffff, /* src_mask */
1471 0x0003ffff, /* dst_mask */
1472 FALSE), /* pcrel_offset */
1473
1474 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1475 0, /* rightshift */
1476 2, /* size (0 = byte, 1 = short, 2 = long) */
1477 19, /* bitsize */
1478 FALSE, /* pc_relative */
1479 0, /* bitpos */
1480 complain_overflow_signed, /* complain_on_overflow */
1481 bfd_elf_generic_reloc, /* special_function */
1482 "R_NDS32_SDA19S0_RELA",/* name */
1483 FALSE, /* partial_inplace */
1484 0x0007ffff, /* src_mask */
1485 0x0007ffff, /* dst_mask */
1486 FALSE), /* pcrel_offset */
1487 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1488 0, /* rightshift */
1489 0, /* size (0 = byte, 1 = short, 2 = long) */
1490 8, /* bitsize */
1491 FALSE, /* pc_relative */
1492 0, /* bitpos */
1493 complain_overflow_dont,/* complain_on_overflow */
1494 nds32_elf_ignore_reloc,/* special_function */
1495 "R_NDS32_DWARF2_OP1_RELA", /* name */
1496 FALSE, /* partial_inplace */
1497 0xff, /* src_mask */
1498 0xff, /* dst_mask */
1499 FALSE), /* pcrel_offset */
1500 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1501 0, /* rightshift */
1502 1, /* size (0 = byte, 1 = short, 2 = long) */
1503 16, /* bitsize */
1504 FALSE, /* pc_relative */
1505 0, /* bitpos */
1506 complain_overflow_dont,/* complain_on_overflow */
1507 nds32_elf_ignore_reloc,/* special_function */
1508 "R_NDS32_DWARF2_OP2_RELA", /* name */
1509 FALSE, /* partial_inplace */
1510 0xffff, /* src_mask */
1511 0xffff, /* dst_mask */
1512 FALSE), /* pcrel_offset */
1513 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1514 0, /* rightshift */
1515 2, /* size (0 = byte, 1 = short, 2 = long) */
1516 32, /* bitsize */
1517 FALSE, /* pc_relative */
1518 0, /* bitpos */
1519 complain_overflow_dont,/* complain_on_overflow */
1520 nds32_elf_ignore_reloc,/* special_function */
1521 "R_NDS32_DWARF2_LEB_RELA", /* name */
1522 FALSE, /* partial_inplace */
1523 0xffffffff, /* src_mask */
1524 0xffffffff, /* dst_mask */
1525 FALSE), /* pcrel_offset */
1526 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1527 0, /* rightshift */
1528 1, /* size (0 = byte, 1 = short, 2 = long) */
1529 16, /* bitsize */
1530 FALSE, /* pc_relative */
1531 0, /* bitpos */
1532 complain_overflow_dont,/* complain_on_overflow */
1533 nds32_elf_ignore_reloc,/* special_function */
1534 "R_NDS32_UPDATE_TA_RELA", /* name */
1535 FALSE, /* partial_inplace */
1536 0xffff, /* src_mask */
1537 0xffff, /* dst_mask */
1538 FALSE), /* pcrel_offset */
1539 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1540 entry for the symbol. */
1541 HOWTO (R_NDS32_9_PLTREL, /* type */
1542 1, /* rightshift */
1543 1, /* size (0 = byte, 1 = short, 2 = long) */
1544 8, /* bitsize */
1545 TRUE, /* pc_relative */
1546 0, /* bitpos */
1547 complain_overflow_signed, /* complain_on_overflow */
1548 bfd_elf_generic_reloc, /* special_function */
1549 "R_NDS32_9_PLTREL", /* name */
1550 FALSE, /* partial_inplace */
1551 0xff, /* src_mask */
1552 0xff, /* dst_mask */
1553 TRUE), /* pcrel_offset */
1554 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1555 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1556 0, /* rightshift */
1557 2, /* size (0 = byte, 1 = short, 2 = long) */
1558 20, /* bitsize */
1559 FALSE, /* pc_relative */
1560 0, /* bitpos */
1561 complain_overflow_dont,/* complain_on_overflow */
1562 bfd_elf_generic_reloc, /* special_function */
1563 "R_NDS32_PLT_GOTREL_LO20", /* name */
1564 FALSE, /* partial_inplace */
1565 0x000fffff, /* src_mask */
1566 0x000fffff, /* dst_mask */
1567 FALSE), /* pcrel_offset */
1568 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1569 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1570 0, /* rightshift */
1571 2, /* size (0 = byte, 1 = short, 2 = long) */
1572 15, /* bitsize */
1573 FALSE, /* pc_relative */
1574 0, /* bitpos */
1575 complain_overflow_dont,/* complain_on_overflow */
1576 bfd_elf_generic_reloc, /* special_function */
1577 "R_NDS32_PLT_GOTREL_LO15", /* name */
1578 FALSE, /* partial_inplace */
1579 0x00007fff, /* src_mask */
1580 0x00007fff, /* dst_mask */
1581 FALSE), /* pcrel_offset */
1582 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1583 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1584 0, /* rightshift */
1585 2, /* size (0 = byte, 1 = short, 2 = long) */
1586 19, /* bitsize */
1587 FALSE, /* pc_relative */
1588 0, /* bitpos */
1589 complain_overflow_dont,/* complain_on_overflow */
1590 bfd_elf_generic_reloc, /* special_function */
1591 "R_NDS32_PLT_GOTREL_LO19", /* name */
1592 FALSE, /* partial_inplace */
1593 0x0007ffff, /* src_mask */
1594 0x0007ffff, /* dst_mask */
1595 FALSE), /* pcrel_offset */
1596 HOWTO (R_NDS32_GOT_LO15, /* type */
1597 0, /* rightshift */
1598 2, /* size (0 = byte, 1 = short, 2 = long) */
1599 15, /* bitsize */
1600 FALSE, /* pc_relative */
1601 0, /* bitpos */
1602 complain_overflow_dont,/* complain_on_overflow */
1603 bfd_elf_generic_reloc, /* special_function */
1604 "R_NDS32_GOT_LO15", /* name */
1605 FALSE, /* partial_inplace */
1606 0x00007fff, /* src_mask */
1607 0x00007fff, /* dst_mask */
1608 FALSE), /* pcrel_offset */
1609 HOWTO (R_NDS32_GOT_LO19, /* type */
1610 0, /* rightshift */
1611 2, /* size (0 = byte, 1 = short, 2 = long) */
1612 19, /* bitsize */
1613 FALSE, /* pc_relative */
1614 0, /* bitpos */
1615 complain_overflow_dont,/* complain_on_overflow */
1616 bfd_elf_generic_reloc, /* special_function */
1617 "R_NDS32_GOT_LO19", /* name */
1618 FALSE, /* partial_inplace */
1619 0x0007ffff, /* src_mask */
1620 0x0007ffff, /* dst_mask */
1621 FALSE), /* pcrel_offset */
1622 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1623 0, /* rightshift */
1624 2, /* size (0 = byte, 1 = short, 2 = long) */
1625 15, /* bitsize */
1626 FALSE, /* pc_relative */
1627 0, /* bitpos */
1628 complain_overflow_dont,/* complain_on_overflow */
1629 bfd_elf_generic_reloc, /* special_function */
1630 "R_NDS32_GOTOFF_LO15", /* name */
1631 FALSE, /* partial_inplace */
1632 0x00007fff, /* src_mask */
1633 0x00007fff, /* dst_mask */
1634 FALSE), /* pcrel_offset */
1635 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1636 0, /* rightshift */
1637 2, /* size (0 = byte, 1 = short, 2 = long) */
1638 19, /* bitsize */
1639 FALSE, /* pc_relative */
1640 0, /* bitpos */
1641 complain_overflow_dont,/* complain_on_overflow */
1642 bfd_elf_generic_reloc, /* special_function */
1643 "R_NDS32_GOTOFF_LO19", /* name */
1644 FALSE, /* partial_inplace */
1645 0x0007ffff, /* src_mask */
1646 0x0007ffff, /* dst_mask */
1647 FALSE), /* pcrel_offset */
1648 /* GOT 15 bits offset. */
1649 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1650 2, /* rightshift */
1651 2, /* size (0 = byte, 1 = short, 2 = long) */
1652 15, /* bitsize */
1653 FALSE, /* pc_relative */
1654 0, /* bitpos */
1655 complain_overflow_signed, /* complain_on_overflow */
1656 bfd_elf_generic_reloc, /* special_function */
1657 "R_NDS32_GOT15S2_RELA",/* name */
1658 FALSE, /* partial_inplace */
1659 0x00007fff, /* src_mask */
1660 0x00007fff, /* dst_mask */
1661 FALSE), /* pcrel_offset */
1662 /* GOT 17 bits offset. */
1663 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1664 2, /* rightshift */
1665 2, /* size (0 = byte, 1 = short, 2 = long) */
1666 17, /* bitsize */
1667 FALSE, /* pc_relative */
1668 0, /* bitpos */
1669 complain_overflow_signed, /* complain_on_overflow */
1670 bfd_elf_generic_reloc, /* special_function */
1671 "R_NDS32_GOT17S2_RELA",/* name */
1672 FALSE, /* partial_inplace */
1673 0x0001ffff, /* src_mask */
1674 0x0001ffff, /* dst_mask */
1675 FALSE), /* pcrel_offset */
1676 /* A 5 bit address. */
1677 HOWTO (R_NDS32_5_RELA, /* type */
1678 0, /* rightshift */
1679 1, /* size (0 = byte, 1 = short, 2 = long) */
1680 5, /* bitsize */
1681 FALSE, /* pc_relative */
1682 0, /* bitpos */
1683 complain_overflow_signed, /* complain_on_overflow */
1684 bfd_elf_generic_reloc, /* special_function */
1685 "R_NDS32_5_RELA", /* name */
1686 FALSE, /* partial_inplace */
1687 0x1f, /* src_mask */
1688 0x1f, /* dst_mask */
1689 FALSE), /* pcrel_offset */
1690 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1691 1, /* rightshift */
1692 1, /* size (0 = byte, 1 = short, 2 = long) */
1693 9, /* bitsize */
1694 TRUE, /* pc_relative */
1695 0, /* bitpos */
1696 complain_overflow_unsigned, /* complain_on_overflow */
1697 bfd_elf_generic_reloc, /* special_function */
1698 "R_NDS32_10_UPCREL_RELA", /* name */
1699 FALSE, /* partial_inplace */
1700 0x1ff, /* src_mask */
1701 0x1ff, /* dst_mask */
1702 TRUE), /* pcrel_offset */
1703 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1704 2, /* rightshift */
1705 1, /* size (0 = byte, 1 = short, 2 = long) */
1706 7, /* bitsize */
1707 FALSE, /* pc_relative */
1708 0, /* bitpos */
1709 complain_overflow_unsigned, /* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_SDA_FP7U2_RELA", /* name */
1712 FALSE, /* partial_inplace */
1713 0x0000007f, /* src_mask */
1714 0x0000007f, /* dst_mask */
1715 FALSE), /* pcrel_offset */
1716 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1717 1, /* rightshift */
1718 2, /* size (0 = byte, 1 = short, 2 = long) */
1719 8, /* bitsize */
1720 TRUE, /* pc_relative */
1721 0, /* bitpos */
1722 complain_overflow_signed, /* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1725 FALSE, /* partial_inplace */
1726 0xff, /* src_mask */
1727 0xff, /* dst_mask */
1728 TRUE), /* pcrel_offset */
1729 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1730 1, /* rightshift */
1731 2, /* size (0 = byte, 1 = short, 2 = long) */
1732 24, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_NDS32_25_ABS_RELA", /* name */
1738 FALSE, /* partial_inplace */
1739 0xffffff, /* src_mask */
1740 0xffffff, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1744 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1745 1, /* rightshift */
1746 2, /* size (0 = byte, 1 = short, 2 = long) */
1747 16, /* bitsize */
1748 TRUE, /* pc_relative */
1749 0, /* bitpos */
1750 complain_overflow_signed, /* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_NDS32_17IFC_PCREL_RELA", /* name */
1753 FALSE, /* partial_inplace */
1754 0xffff, /* src_mask */
1755 0xffff, /* dst_mask */
1756 TRUE), /* pcrel_offset */
1757
1758 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1759 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1760 1, /* rightshift */
1761 1, /* size (0 = byte, 1 = short, 2 = long) */
1762 9, /* bitsize */
1763 TRUE, /* pc_relative */
1764 0, /* bitpos */
1765 complain_overflow_unsigned, /* complain_on_overflow */
1766 bfd_elf_generic_reloc, /* special_function */
1767 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1768 FALSE, /* partial_inplace */
1769 0x1ff, /* src_mask */
1770 0x1ff, /* dst_mask */
1771 TRUE), /* pcrel_offset */
1c8f6a4d
KLC
1772
1773 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1774 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1775 12, /* rightshift */
1776 2, /* size (0 = byte, 1 = short, 2 = long) */
1777 20, /* bitsize */
1778 FALSE, /* pc_relative */
1779 0, /* bitpos */
1780 complain_overflow_dont, /* complain_on_overflow */
1781 bfd_elf_generic_reloc, /* special_function */
1782 "R_NDS32_TLS_LE_HI20", /* name */
1783 FALSE, /* partial_inplace */
1784 0x000fffff, /* src_mask */
1785 0x000fffff, /* dst_mask */
1786 FALSE), /* pcrel_offset */
1787 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1788 0, /* rightshift */
1789 2, /* size (0 = byte, 1 = short, 2 = long) */
1790 12, /* bitsize */
1791 FALSE, /* pc_relative */
1792 0, /* bitpos */
1793 complain_overflow_dont, /* complain_on_overflow */
1794 bfd_elf_generic_reloc, /* special_function */
1795 "R_NDS32_TLS_LE_LO12", /* name */
1796 FALSE, /* partial_inplace */
1797 0x00000fff, /* src_mask */
1798 0x00000fff, /* dst_mask */
1799 FALSE), /* pcrel_offset */
1800
1801 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1802 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1803 12, /* rightshift */
1804 2, /* size (0 = byte, 1 = short, 2 = long) */
1805 20, /* bitsize */
1806 FALSE, /* pc_relative */
1807 0, /* bitpos */
1808 complain_overflow_dont, /* complain_on_overflow */
1809 bfd_elf_generic_reloc, /* special_function */
1810 "R_NDS32_TLS_IE_HI20", /* name */
1811 FALSE, /* partial_inplace */
1812 0x000fffff, /* src_mask */
1813 0x000fffff, /* dst_mask */
1814 FALSE), /* pcrel_offset */
1815 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1816 2, /* rightshift */
1817 2, /* size (0 = byte, 1 = short, 2 = long) */
1818 10, /* bitsize */
1819 FALSE, /* pc_relative */
1820 0, /* bitpos */
1821 complain_overflow_dont, /* complain_on_overflow */
1822 bfd_elf_generic_reloc, /* special_function */
1823 "R_NDS32_TLS_IE_LO12S2", /* name */
1824 FALSE, /* partial_inplace */
1825 0x000003ff, /* src_mask */
1826 0x000003ff, /* dst_mask */
1827 FALSE), /* pcrel_offset */
1828 /* Mark a TLS IE entry in GOT. */
1829 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1830 0, /* rightshift */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1832 32, /* bitsize */
1833 FALSE, /* pc_relative */
1834 0, /* bitpos */
1835 complain_overflow_bitfield, /* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_NDS32_TLS_TPOFF", /* name */
1838 FALSE, /* partial_inplace */
1839 0xffffffff, /* src_mask */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 /* A 20 bit address. */
1843 HOWTO (R_NDS32_TLS_LE_20, /* type */
1844 0, /* rightshift */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 20, /* bitsize */
1847 FALSE, /* pc_relative */
1848 0, /* bitpos */
1849 complain_overflow_signed, /* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_NDS32_TLS_LE_20", /* name */
1852 FALSE, /* partial_inplace */
1853 0xfffff, /* src_mask */
1854 0xfffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1857 0, /* rightshift */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1859 15, /* bitsize */
1860 FALSE, /* pc_relative */
1861 0, /* bitpos */
1862 complain_overflow_signed, /* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_NDS32_TLS_LE_15S0", /* name */
1865 FALSE, /* partial_inplace */
1866 0x7fff, /* src_mask */
1867 0x7fff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1870 1, /* rightshift */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1872 15, /* bitsize */
1873 FALSE, /* pc_relative */
1874 0, /* bitpos */
1875 complain_overflow_signed, /* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_NDS32_TLS_LE_15S1", /* name */
1878 FALSE, /* partial_inplace */
1879 0x7fff, /* src_mask */
1880 0x7fff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1882 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1883 2, /* rightshift */
1884 2, /* size (0 = byte, 1 = short, 2 = long) */
1885 15, /* bitsize */
1886 FALSE, /* pc_relative */
1887 0, /* bitpos */
1888 complain_overflow_signed, /* complain_on_overflow */
1889 bfd_elf_generic_reloc, /* special_function */
1890 "R_NDS32_TLS_LE_15S2", /* name */
1891 FALSE, /* partial_inplace */
1892 0x7fff, /* src_mask */
1893 0x7fff, /* dst_mask */
1894 FALSE), /* pcrel_offset */
1895
1896 /* Relax hint for unconditional call sequence */
1897 HOWTO (R_NDS32_LONGCALL4, /* type */
1898 0, /* rightshift */
1899 2, /* size (0 = byte, 1 = short, 2 = long) */
1900 32, /* bitsize */
1901 FALSE, /* pc_relative */
1902 0, /* bitpos */
1903 complain_overflow_dont, /* complain_on_overflow */
1904 nds32_elf_ignore_reloc, /* special_function */
1905 "R_NDS32_LONGCALL4", /* name */
1906 FALSE, /* partial_inplace */
1907 0xffffffff, /* src_mask */
1908 0xffffffff, /* dst_mask */
1909 FALSE), /* pcrel_offset */
1910
1911 /* Relax hint for conditional call sequence. */
1912 HOWTO (R_NDS32_LONGCALL5, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont, /* complain_on_overflow */
1919 nds32_elf_ignore_reloc, /* special_function */
1920 "R_NDS32_LONGCALL5", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925
1926 /* Relax hint for conditional call sequence. */
1927 HOWTO (R_NDS32_LONGCALL6, /* type */
1928 0, /* rightshift */
1929 2, /* size (0 = byte, 1 = short, 2 = long) */
1930 32, /* bitsize */
1931 FALSE, /* pc_relative */
1932 0, /* bitpos */
1933 complain_overflow_dont, /* complain_on_overflow */
1934 nds32_elf_ignore_reloc, /* special_function */
1935 "R_NDS32_LONGCALL6", /* name */
1936 FALSE, /* partial_inplace */
1937 0xffffffff, /* src_mask */
1938 0xffffffff, /* dst_mask */
1939 FALSE), /* pcrel_offset */
1940
1941 /* Relax hint for unconditional branch sequence. */
1942 HOWTO (R_NDS32_LONGJUMP4, /* type */
1943 0, /* rightshift */
1944 2, /* size (0 = byte, 1 = short, 2 = long) */
1945 32, /* bitsize */
1946 FALSE, /* pc_relative */
1947 0, /* bitpos */
1948 complain_overflow_dont, /* complain_on_overflow */
1949 nds32_elf_ignore_reloc, /* special_function */
1950 "R_NDS32_LONGJUMP4", /* name */
1951 FALSE, /* partial_inplace */
1952 0xffffffff, /* src_mask */
1953 0xffffffff, /* dst_mask */
1954 FALSE), /* pcrel_offset */
1955
1956 /* Relax hint for conditional branch sequence. */
1957 HOWTO (R_NDS32_LONGJUMP5, /* type */
1958 0, /* rightshift */
1959 2, /* size (0 = byte, 1 = short, 2 = long) */
1960 32, /* bitsize */
1961 FALSE, /* pc_relative */
1962 0, /* bitpos */
1963 complain_overflow_dont, /* complain_on_overflow */
1964 nds32_elf_ignore_reloc, /* special_function */
1965 "R_NDS32_LONGJUMP5", /* name */
1966 FALSE, /* partial_inplace */
1967 0xffffffff, /* src_mask */
1968 0xffffffff, /* dst_mask */
1969 FALSE), /* pcrel_offset */
1970
1971 /* Relax hint for conditional branch sequence. */
1972 HOWTO (R_NDS32_LONGJUMP6, /* type */
1973 0, /* rightshift */
1974 2, /* size (0 = byte, 1 = short, 2 = long) */
1975 32, /* bitsize */
1976 FALSE, /* pc_relative */
1977 0, /* bitpos */
1978 complain_overflow_dont, /* complain_on_overflow */
1979 nds32_elf_ignore_reloc, /* special_function */
1980 "R_NDS32_LONGJUMP6", /* name */
1981 FALSE, /* partial_inplace */
1982 0xffffffff, /* src_mask */
1983 0xffffffff, /* dst_mask */
1984 FALSE), /* pcrel_offset */
1985
1986 /* Relax hint for conditional branch sequence. */
1987 HOWTO (R_NDS32_LONGJUMP7, /* type */
1988 0, /* rightshift */
1989 2, /* size (0 = byte, 1 = short, 2 = long) */
1990 32, /* bitsize */
1991 FALSE, /* pc_relative */
1992 0, /* bitpos */
1993 complain_overflow_dont, /* complain_on_overflow */
1994 nds32_elf_ignore_reloc, /* special_function */
1995 "R_NDS32_LONGJUMP7", /* name */
1996 FALSE, /* partial_inplace */
1997 0xffffffff, /* src_mask */
1998 0xffffffff, /* dst_mask */
1999 FALSE), /* pcrel_offset */
35c08157
KLC
2000};
2001
2002/* Relocations used for relaxation. */
2003static reloc_howto_type nds32_elf_relax_howto_table[] =
2004{
2005 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
2006 0, /* rightshift */
2007 2, /* size (0 = byte, 1 = short, 2 = long) */
2008 32, /* bitsize */
2009 FALSE, /* pc_relative */
2010 0, /* bitpos */
2011 complain_overflow_dont,/* complain_on_overflow */
2012 nds32_elf_ignore_reloc,/* special_function */
2013 "R_NDS32_RELAX_ENTRY", /* name */
2014 FALSE, /* partial_inplace */
2015 0xffffffff, /* src_mask */
2016 0xffffffff, /* dst_mask */
2017 FALSE), /* pcrel_offset */
2018 HOWTO (R_NDS32_GOT_SUFF, /* type */
2019 0, /* rightshift */
2020 2, /* size (0 = byte, 1 = short, 2 = long) */
2021 32, /* bitsize */
2022 FALSE, /* pc_relative */
2023 0, /* bitpos */
2024 complain_overflow_dont,/* complain_on_overflow */
2025 nds32_elf_ignore_reloc,/* special_function */
2026 "R_NDS32_GOT_SUFF", /* name */
2027 FALSE, /* partial_inplace */
2028 0xffffffff, /* src_mask */
2029 0xffffffff, /* dst_mask */
2030 FALSE), /* pcrel_offset */
2031 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
2032 0, /* rightshift */
2033 2, /* size (0 = byte, 1 = short, 2 = long) */
2034 32, /* bitsize */
2035 FALSE, /* pc_relative */
2036 0, /* bitpos */
2037 complain_overflow_bitfield, /* complain_on_overflow */
2038 nds32_elf_ignore_reloc,/* special_function */
2039 "R_NDS32_GOTOFF_SUFF", /* name */
2040 FALSE, /* partial_inplace */
2041 0xffffffff, /* src_mask */
2042 0xffffffff, /* dst_mask */
2043 FALSE), /* pcrel_offset */
2044 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
2045 0, /* rightshift */
2046 2, /* size (0 = byte, 1 = short, 2 = long) */
2047 32, /* bitsize */
2048 FALSE, /* pc_relative */
2049 0, /* bitpos */
2050 complain_overflow_dont,/* complain_on_overflow */
2051 nds32_elf_ignore_reloc,/* special_function */
2052 "R_NDS32_PLT_GOT_SUFF",/* name */
2053 FALSE, /* partial_inplace */
2054 0xffffffff, /* src_mask */
2055 0xffffffff, /* dst_mask */
2056 FALSE), /* pcrel_offset */
2057 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
2058 0, /* rightshift */
2059 2, /* size (0 = byte, 1 = short, 2 = long) */
2060 32, /* bitsize */
2061 FALSE, /* pc_relative */
2062 0, /* bitpos */
2063 complain_overflow_dont,/* complain_on_overflow */
2064 nds32_elf_ignore_reloc,/* special_function */
2065 "R_NDS32_MULCALL_SUFF",/* name */
2066 FALSE, /* partial_inplace */
2067 0xffffffff, /* src_mask */
2068 0xffffffff, /* dst_mask */
2069 FALSE), /* pcrel_offset */
2070 HOWTO (R_NDS32_PTR, /* type */
2071 0, /* rightshift */
2072 2, /* size (0 = byte, 1 = short, 2 = long) */
2073 32, /* bitsize */
2074 FALSE, /* pc_relative */
2075 0, /* bitpos */
2076 complain_overflow_dont,/* complain_on_overflow */
2077 nds32_elf_ignore_reloc,/* special_function */
2078 "R_NDS32_PTR", /* name */
2079 FALSE, /* partial_inplace */
2080 0xffffffff, /* src_mask */
2081 0xffffffff, /* dst_mask */
2082 FALSE), /* pcrel_offset */
2083 HOWTO (R_NDS32_PTR_COUNT, /* type */
2084 0, /* rightshift */
2085 2, /* size (0 = byte, 1 = short, 2 = long) */
2086 32, /* bitsize */
2087 FALSE, /* pc_relative */
2088 0, /* bitpos */
2089 complain_overflow_dont,/* complain_on_overflow */
2090 nds32_elf_ignore_reloc,/* special_function */
2091 "R_NDS32_PTR_COUNT", /* name */
2092 FALSE, /* partial_inplace */
2093 0xffffffff, /* src_mask */
2094 0xffffffff, /* dst_mask */
2095 FALSE), /* pcrel_offset */
2096 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2097 0, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 32, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont,/* complain_on_overflow */
2103 nds32_elf_ignore_reloc,/* special_function */
2104 "R_NDS32_PTR_RESOLVED",/* name */
2105 FALSE, /* partial_inplace */
2106 0xffffffff, /* src_mask */
2107 0xffffffff, /* dst_mask */
2108 FALSE), /* pcrel_offset */
2109 HOWTO (R_NDS32_PLTBLOCK, /* type */
2110 0, /* rightshift */
2111 2, /* size (0 = byte, 1 = short, 2 = long) */
2112 32, /* bitsize */
2113 FALSE, /* pc_relative */
2114 0, /* bitpos */
2115 complain_overflow_dont,/* complain_on_overflow */
2116 nds32_elf_ignore_reloc,/* special_function */
2117 "R_NDS32_PLTBLOCK", /* name */
2118 FALSE, /* partial_inplace */
2119 0xffffffff, /* src_mask */
2120 0xffffffff, /* dst_mask */
2121 FALSE), /* pcrel_offset */
2122 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2123 0, /* rightshift */
2124 2, /* size (0 = byte, 1 = short, 2 = long) */
2125 32, /* bitsize */
2126 FALSE, /* pc_relative */
2127 0, /* bitpos */
2128 complain_overflow_dont,/* complain_on_overflow */
2129 nds32_elf_ignore_reloc,/* special_function */
2130 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2131 FALSE, /* partial_inplace */
2132 0xffffffff, /* src_mask */
2133 0xffffffff, /* dst_mask */
2134 FALSE), /* pcrel_offset */
2135 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2136 0, /* rightshift */
2137 2, /* size (0 = byte, 1 = short, 2 = long) */
2138 32, /* bitsize */
2139 FALSE, /* pc_relative */
2140 0, /* bitpos */
2141 complain_overflow_dont,/* complain_on_overflow */
2142 nds32_elf_ignore_reloc,/* special_function */
2143 "R_NDS32_RELAX_REGION_END", /* name */
2144 FALSE, /* partial_inplace */
2145 0xffffffff, /* src_mask */
2146 0xffffffff, /* dst_mask */
2147 FALSE), /* pcrel_offset */
2148 HOWTO (R_NDS32_MINUEND, /* type */
2149 0, /* rightshift */
2150 2, /* size (0 = byte, 1 = short, 2 = long) */
2151 32, /* bitsize */
2152 FALSE, /* pc_relative */
2153 0, /* bitpos */
2154 complain_overflow_dont,/* complain_on_overflow */
2155 nds32_elf_ignore_reloc,/* special_function */
2156 "R_NDS32_MINUEND", /* name */
2157 FALSE, /* partial_inplace */
2158 0xffffffff, /* src_mask */
2159 0xffffffff, /* dst_mask */
2160 FALSE), /* pcrel_offset */
2161 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2162 0, /* rightshift */
2163 2, /* size (0 = byte, 1 = short, 2 = long) */
2164 32, /* bitsize */
2165 FALSE, /* pc_relative */
2166 0, /* bitpos */
2167 complain_overflow_dont,/* complain_on_overflow */
2168 nds32_elf_ignore_reloc,/* special_function */
2169 "R_NDS32_SUBTRAHEND", /* name */
2170 FALSE, /* partial_inplace */
2171 0xffffffff, /* src_mask */
2172 0xffffffff, /* dst_mask */
2173 FALSE), /* pcrel_offset */
2174 HOWTO (R_NDS32_DIFF8, /* type */
2175 0, /* rightshift */
2176 0, /* size (0 = byte, 1 = short, 2 = long) */
2177 8, /* bitsize */
2178 FALSE, /* pc_relative */
2179 0, /* bitpos */
2180 complain_overflow_dont,/* complain_on_overflow */
2181 nds32_elf_ignore_reloc,/* special_function */
2182 "R_NDS32_DIFF8", /* name */
2183 FALSE, /* partial_inplace */
2184 0x000000ff, /* src_mask */
2185 0x000000ff, /* dst_mask */
2186 FALSE), /* pcrel_offset */
2187 HOWTO (R_NDS32_DIFF16, /* type */
2188 0, /* rightshift */
2189 1, /* size (0 = byte, 1 = short, 2 = long) */
2190 16, /* bitsize */
2191 FALSE, /* pc_relative */
2192 0, /* bitpos */
2193 complain_overflow_dont,/* complain_on_overflow */
2194 nds32_elf_ignore_reloc,/* special_function */
2195 "R_NDS32_DIFF16", /* name */
2196 FALSE, /* partial_inplace */
2197 0x0000ffff, /* src_mask */
2198 0x0000ffff, /* dst_mask */
2199 FALSE), /* pcrel_offset */
2200 HOWTO (R_NDS32_DIFF32, /* type */
2201 0, /* rightshift */
2202 2, /* size (0 = byte, 1 = short, 2 = long) */
2203 32, /* bitsize */
2204 FALSE, /* pc_relative */
2205 0, /* bitpos */
2206 complain_overflow_dont,/* complain_on_overflow */
2207 nds32_elf_ignore_reloc,/* special_function */
2208 "R_NDS32_DIFF32", /* name */
2209 FALSE, /* partial_inplace */
2210 0xffffffff, /* src_mask */
2211 0xffffffff, /* dst_mask */
2212 FALSE), /* pcrel_offset */
2213 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2214 0, /* rightshift */
2215 0, /* size (0 = byte, 1 = short, 2 = long) */
2216 0, /* bitsize */
2217 FALSE, /* pc_relative */
2218 0, /* bitpos */
2219 complain_overflow_dont,/* complain_on_overflow */
2220 nds32_elf_ignore_reloc,/* special_function */
2221 "R_NDS32_DIFF_ULEB128",/* name */
2222 FALSE, /* partial_inplace */
2223 0xffffffff, /* src_mask */
2224 0xffffffff, /* dst_mask */
2225 FALSE), /* pcrel_offset */
2226 HOWTO (R_NDS32_DATA, /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 32, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont,/* complain_on_overflow */
2233 nds32_elf_ignore_reloc,/* special_function */
2234 "R_NDS32_DATA", /* name */
2235 FALSE, /* partial_inplace */
2236 0xffffffff, /* src_mask */
2237 0xffffffff, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239 HOWTO (R_NDS32_TRAN, /* type */
2240 0, /* rightshift */
2241 2, /* size (0 = byte, 1 = short, 2 = long) */
2242 32, /* bitsize */
2243 FALSE, /* pc_relative */
2244 0, /* bitpos */
2245 complain_overflow_dont,/* complain_on_overflow */
2246 nds32_elf_ignore_reloc,/* special_function */
2247 "R_NDS32_TRAN", /* name */
2248 FALSE, /* partial_inplace */
2249 0xffffffff, /* src_mask */
2250 0xffffffff, /* dst_mask */
2251 FALSE), /* pcrel_offset */
1c8f6a4d
KLC
2252 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2253 0, /* rightshift */
2254 2, /* size (0 = byte, 1 = short, 2 = long) */
2255 32, /* bitsize */
2256 FALSE, /* pc_relative */
2257 0, /* bitpos */
2258 complain_overflow_dont, /* complain_on_overflow */
2259 nds32_elf_ignore_reloc, /* special_function */
2260 "R_NDS32_TLS_LE_ADD", /* name */
2261 FALSE, /* partial_inplace */
2262 0xffffffff, /* src_mask */
2263 0xffffffff, /* dst_mask */
2264 FALSE), /* pcrel_offset */
2265 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2266 0, /* rightshift */
2267 2, /* size (0 = byte, 1 = short, 2 = long) */
2268 32, /* bitsize */
2269 FALSE, /* pc_relative */
2270 0, /* bitpos */
2271 complain_overflow_dont, /* complain_on_overflow */
2272 nds32_elf_ignore_reloc, /* special_function */
2273 "R_NDS32_TLS_LE_LS", /* name */
2274 FALSE, /* partial_inplace */
2275 0xffffffff, /* src_mask */
2276 0xffffffff, /* dst_mask */
2277 FALSE), /* pcrel_offset */
2278 HOWTO (R_NDS32_EMPTY, /* type */
2279 0, /* rightshift */
2280 2, /* size (0 = byte, 1 = short, 2 = long) */
2281 32, /* bitsize */
2282 FALSE, /* pc_relative */
2283 0, /* bitpos */
2284 complain_overflow_dont, /* complain_on_overflow */
2285 nds32_elf_ignore_reloc, /* special_function */
2286 "R_NDS32_EMPTY", /* name */
2287 FALSE, /* partial_inplace */
2288 0xffffffff, /* src_mask */
2289 0xffffffff, /* dst_mask */
2290 FALSE), /* pcrel_offset */
35c08157
KLC
2291};
2292
2293\f
2294/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2295 This prototype is the same as qsort (). */
2296
2297void
2298nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2299 int (*compar) (const void *lhs, const void *rhs))
2300{
2301 char *ptr = (char *) base;
1c8f6a4d 2302 int i, j;
e1fa0163 2303 char *tmp = xmalloc (size);
35c08157
KLC
2304
2305 /* If i is less than j, i is inserted before j.
2306
2307 |---- j ----- i --------------|
2308 \ / \ /
2309 sorted unsorted
2310 */
2311
1c8f6a4d 2312 for (i = 1; i < (int) nmemb; i++)
35c08157 2313 {
1c8f6a4d
KLC
2314 for (j = (i - 1); j >= 0; j--)
2315 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC
2316 break;
2317
1c8f6a4d
KLC
2318 j++;
2319
35c08157 2320 if (i == j)
1c8f6a4d 2321 continue; /* i is in order. */
35c08157
KLC
2322
2323 memcpy (tmp, ptr + i * size, size);
2324 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2325 memcpy (ptr + j * size, tmp, size);
2326 }
e1fa0163 2327 free (tmp);
35c08157
KLC
2328}
2329
2330/* Sort relocation by r_offset.
2331
2332 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2333 algorithm. Relocations at the same r_offset must keep their order.
2334 For example, RELAX_ENTRY must be the very first relocation entry.
2335
2336 Currently, this function implements insertion-sort.
2337
2338 FIXME: If we already sort them in assembler, why bother sort them
2339 here again? */
2340
2341static int
2342compar_reloc (const void *lhs, const void *rhs)
2343{
2344 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2345 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2346
2347 if (l->r_offset > r->r_offset)
2348 return 1;
2349 else if (l->r_offset == r->r_offset)
2350 return 0;
2351 else
2352 return -1;
2353}
2354
2355/* Functions listed below are only used for old relocs.
2356 * nds32_elf_9_pcrel_reloc
2357 * nds32_elf_do_9_pcrel_reloc
2358 * nds32_elf_hi20_reloc
2359 * nds32_elf_relocate_hi20
2360 * nds32_elf_lo12_reloc
2361 * nds32_elf_sda15_reloc
2362 * nds32_elf_generic_reloc
2363 */
2364
2365/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2366
2367static bfd_reloc_status_type
2368nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2369 void *data, asection *input_section, bfd *output_bfd,
2370 char **error_message ATTRIBUTE_UNUSED)
2371{
2372 /* This part is from bfd_elf_generic_reloc. */
2373 if (output_bfd != (bfd *) NULL
2374 && (symbol->flags & BSF_SECTION_SYM) == 0
2375 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2376 {
2377 reloc_entry->address += input_section->output_offset;
2378 return bfd_reloc_ok;
2379 }
2380
2381 if (output_bfd != NULL)
2382 {
2383 /* FIXME: See bfd_perform_relocation. Is this right? */
2384 return bfd_reloc_continue;
2385 }
2386
2387 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2388 input_section,
2389 data, reloc_entry->address,
2390 symbol->section,
2391 (symbol->value
2392 + symbol->section->output_section->vma
2393 + symbol->section->output_offset),
2394 reloc_entry->addend);
2395}
2396
2397/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2398#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2399
2400static bfd_reloc_status_type
2401nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2402 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC
2403 bfd_vma offset,
2404 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC
2405 bfd_vma symbol_value, bfd_vma addend)
2406{
2407 bfd_signed_vma relocation;
2408 unsigned short x;
2409 bfd_reloc_status_type status;
2410
2411 /* Sanity check the address (offset in section). */
2412 if (offset > bfd_get_section_limit (abfd, input_section))
2413 return bfd_reloc_outofrange;
2414
2415 relocation = symbol_value + addend;
2416 /* Make it pc relative. */
2417 relocation -= (input_section->output_section->vma
2418 + input_section->output_offset);
2419 /* These jumps mask off the lower two bits of the current address
2420 before doing pcrel calculations. */
2421 relocation -= (offset & -(bfd_vma) 2);
2422
1c8f6a4d 2423 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC
2424 status = bfd_reloc_overflow;
2425 else
2426 status = bfd_reloc_ok;
2427
2428 x = bfd_getb16 (data + offset);
2429
2430 relocation >>= howto->rightshift;
2431 relocation <<= howto->bitpos;
2432 x = (x & ~howto->dst_mask)
2433 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2434
2435 bfd_putb16 ((bfd_vma) x, data + offset);
2436
2437 return status;
2438}
2439
2440/* Handle the R_NDS32_HI20_[SU]LO relocs.
2441 HI20_SLO is for the add3 and load/store with displacement instructions.
2442 HI20 is for the or3 instruction.
2443 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2444 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2445 we must add one to the high 16 bytes (which will get subtracted off when
2446 the low 16 bits are added).
2447 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2448 because there is a carry from the LO12 to the HI20. Here we just save
2449 the information we need; we do the actual relocation when we see the LO12.
2450 This code is copied from the elf32-mips.c. We also support an arbitrary
2451 number of HI20 relocs to be associated with a single LO12 reloc. The
2452 assembler sorts the relocs to ensure each HI20 immediately precedes its
2453 LO12. However if there are multiple copies, the assembler may not find
2454 the real LO12 so it picks the first one it finds. */
2455
2456struct nds32_hi20
2457{
2458 struct nds32_hi20 *next;
2459 bfd_byte *addr;
2460 bfd_vma addend;
2461};
2462
2463static struct nds32_hi20 *nds32_hi20_list;
2464
2465static bfd_reloc_status_type
2466nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2467 asymbol *symbol, void *data, asection *input_section,
2468 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2469{
2470 bfd_reloc_status_type ret;
2471 bfd_vma relocation;
2472 struct nds32_hi20 *n;
2473
2474 /* This part is from bfd_elf_generic_reloc.
2475 If we're relocating, and this an external symbol, we don't want
2476 to change anything. */
2477 if (output_bfd != (bfd *) NULL
2478 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2479 {
2480 reloc_entry->address += input_section->output_offset;
2481 return bfd_reloc_ok;
2482 }
2483
2484 /* Sanity check the address (offset in section). */
2485 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2486 return bfd_reloc_outofrange;
2487
2488 ret = bfd_reloc_ok;
2489 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2490 ret = bfd_reloc_undefined;
2491
2492 if (bfd_is_com_section (symbol->section))
2493 relocation = 0;
2494 else
2495 relocation = symbol->value;
2496
2497 relocation += symbol->section->output_section->vma;
2498 relocation += symbol->section->output_offset;
2499 relocation += reloc_entry->addend;
2500
2501 /* Save the information, and let LO12 do the actual relocation. */
2502 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2503 if (n == NULL)
2504 return bfd_reloc_outofrange;
2505
2506 n->addr = (bfd_byte *) data + reloc_entry->address;
2507 n->addend = relocation;
2508 n->next = nds32_hi20_list;
2509 nds32_hi20_list = n;
2510
2511 if (output_bfd != (bfd *) NULL)
2512 reloc_entry->address += input_section->output_offset;
2513
2514 return ret;
2515}
2516
2517/* Handle an NDS32 ELF HI20 reloc. */
2518
2519static void
2520nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2521 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2522 Elf_Internal_Rela *rello, bfd_byte *contents,
2523 bfd_vma addend)
2524{
2525 unsigned long insn;
2526 bfd_vma addlo;
2527
2528 insn = bfd_getb32 (contents + relhi->r_offset);
2529
2530 addlo = bfd_getb32 (contents + rello->r_offset);
2531 addlo &= 0xfff;
2532
2533 addend += ((insn & 0xfffff) << 20) + addlo;
2534
2535 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2536 bfd_putb32 (insn, contents + relhi->r_offset);
2537}
2538
2539/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2540 inplace relocation; this function exists in order to do the
2541 R_NDS32_HI20_[SU]LO relocation described above. */
2542
2543static bfd_reloc_status_type
2544nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2545 void *data, asection *input_section, bfd *output_bfd,
2546 char **error_message)
2547{
2548 /* This part is from bfd_elf_generic_reloc.
2549 If we're relocating, and this an external symbol, we don't want
2550 to change anything. */
2551 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2552 && reloc_entry->addend == 0)
2553 {
2554 reloc_entry->address += input_section->output_offset;
2555 return bfd_reloc_ok;
2556 }
2557
2558 if (nds32_hi20_list != NULL)
2559 {
2560 struct nds32_hi20 *l;
2561
2562 l = nds32_hi20_list;
2563 while (l != NULL)
2564 {
2565 unsigned long insn;
2566 unsigned long val;
2567 unsigned long vallo;
2568 struct nds32_hi20 *next;
2569
2570 /* Do the HI20 relocation. Note that we actually don't need
2571 to know anything about the LO12 itself, except where to
2572 find the low 12 bits of the addend needed by the LO12. */
2573 insn = bfd_getb32 (l->addr);
2574 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2575 vallo &= 0xfff;
2576 switch (reloc_entry->howto->type)
2577 {
2578 case R_NDS32_LO12S3:
2579 vallo <<= 3;
2580 break;
2581
2582 case R_NDS32_LO12S2:
2583 vallo <<= 2;
2584 break;
2585
2586 case R_NDS32_LO12S1:
2587 vallo <<= 1;
2588 break;
2589
2590 case R_NDS32_LO12S0:
2591 vallo <<= 0;
2592 break;
2593 }
2594
2595 val = ((insn & 0xfffff) << 12) + vallo;
2596 val += l->addend;
2597
2598 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2599 bfd_putb32 ((bfd_vma) insn, l->addr);
2600
2601 next = l->next;
2602 free (l);
2603 l = next;
2604 }
2605
2606 nds32_hi20_list = NULL;
2607 }
2608
2609 /* Now do the LO12 reloc in the usual way.
2610 ??? It would be nice to call bfd_elf_generic_reloc here,
2611 but we have partial_inplace set. bfd_elf_generic_reloc will
2612 pass the handling back to bfd_install_relocation which will install
2613 a section relative addend which is wrong. */
2614 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2615 input_section, output_bfd, error_message);
2616}
2617
2618/* Do generic partial_inplace relocation.
2619 This is a local replacement for bfd_elf_generic_reloc. */
2620
2621static bfd_reloc_status_type
2622nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2623 asymbol *symbol, void *data, asection *input_section,
2624 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2625{
2626 bfd_reloc_status_type ret;
2627 bfd_vma relocation;
2628 bfd_byte *inplace_address;
2629
2630 /* This part is from bfd_elf_generic_reloc.
2631 If we're relocating, and this an external symbol, we don't want
2632 to change anything. */
2633 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2634 && reloc_entry->addend == 0)
2635 {
2636 reloc_entry->address += input_section->output_offset;
2637 return bfd_reloc_ok;
2638 }
2639
2640 /* Now do the reloc in the usual way.
2641 ??? It would be nice to call bfd_elf_generic_reloc here,
2642 but we have partial_inplace set. bfd_elf_generic_reloc will
2643 pass the handling back to bfd_install_relocation which will install
2644 a section relative addend which is wrong. */
2645
2646 /* Sanity check the address (offset in section). */
2647 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2648 return bfd_reloc_outofrange;
2649
2650 ret = bfd_reloc_ok;
2651 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2652 ret = bfd_reloc_undefined;
2653
2654 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2655 relocation = 0;
2656 else
2657 relocation = symbol->value;
2658
2659 /* Only do this for a final link. */
2660 if (output_bfd == (bfd *) NULL)
2661 {
2662 relocation += symbol->section->output_section->vma;
2663 relocation += symbol->section->output_offset;
2664 }
2665
2666 relocation += reloc_entry->addend;
2667 switch (reloc_entry->howto->type)
2668 {
2669 case R_NDS32_LO12S3:
2670 relocation >>= 3;
2671 break;
2672
2673 case R_NDS32_LO12S2:
2674 relocation >>= 2;
2675 break;
2676
2677 case R_NDS32_LO12S1:
2678 relocation >>= 1;
2679 break;
2680
2681 case R_NDS32_LO12S0:
2682 default:
2683 relocation >>= 0;
2684 break;
2685 }
2686
2687 inplace_address = (bfd_byte *) data + reloc_entry->address;
2688
2689#define DOIT(x) \
2690 x = ((x & ~reloc_entry->howto->dst_mask) | \
2691 (((x & reloc_entry->howto->src_mask) + relocation) & \
2692 reloc_entry->howto->dst_mask))
2693
2694 switch (reloc_entry->howto->size)
2695 {
2696 case 1:
2697 {
2698 short x = bfd_getb16 (inplace_address);
2699
2700 DOIT (x);
2701 bfd_putb16 ((bfd_vma) x, inplace_address);
2702 }
2703 break;
2704 case 2:
2705 {
2706 unsigned long x = bfd_getb32 (inplace_address);
2707
2708 DOIT (x);
2709 bfd_putb32 ((bfd_vma) x, inplace_address);
2710 }
2711 break;
2712 default:
2713 BFD_ASSERT (0);
2714 }
2715
2716 if (output_bfd != (bfd *) NULL)
2717 reloc_entry->address += input_section->output_offset;
2718
2719 return ret;
2720}
2721
2722/* Handle the R_NDS32_SDA15 reloc.
2723 This reloc is used to compute the address of objects in the small data area
2724 and to perform loads and stores from that area.
2725 The lower 15 bits are sign extended and added to the register specified
2726 in the instruction, which is assumed to point to _SDA_BASE_.
2727
2728 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2729 the access size, this must be taken care of. */
2730
2731static bfd_reloc_status_type
2732nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2733 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2734 asection *input_section, bfd *output_bfd,
2735 char **error_message ATTRIBUTE_UNUSED)
2736{
2737 /* This part is from bfd_elf_generic_reloc. */
2738 if (output_bfd != (bfd *) NULL
2739 && (symbol->flags & BSF_SECTION_SYM) == 0
2740 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2741 {
2742 reloc_entry->address += input_section->output_offset;
2743 return bfd_reloc_ok;
2744 }
2745
2746 if (output_bfd != NULL)
2747 {
2748 /* FIXME: See bfd_perform_relocation. Is this right? */
2749 return bfd_reloc_continue;
2750 }
2751
2752 /* FIXME: not sure what to do here yet. But then again, the linker
2753 may never call us. */
2754 abort ();
2755}
2756
2757/* nds32_elf_ignore_reloc is the special function for
2758 relocation types which don't need to be relocated
2759 like relaxation relocation types.
2760 This function simply return bfd_reloc_ok when it is
2761 invoked. */
2762
2763static bfd_reloc_status_type
2764nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2765 asymbol *symbol ATTRIBUTE_UNUSED,
2766 void *data ATTRIBUTE_UNUSED, asection *input_section,
2767 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2768{
2769 if (output_bfd != NULL)
2770 reloc_entry->address += input_section->output_offset;
2771
2772 return bfd_reloc_ok;
2773}
2774\f
2775
2776/* Map BFD reloc types to NDS32 ELF reloc types. */
2777
2778struct nds32_reloc_map_entry
2779{
2780 bfd_reloc_code_real_type bfd_reloc_val;
2781 unsigned char elf_reloc_val;
2782};
2783
2784static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2785{
2786 {BFD_RELOC_NONE, R_NDS32_NONE},
2787 {BFD_RELOC_16, R_NDS32_16_RELA},
2788 {BFD_RELOC_32, R_NDS32_32_RELA},
2789 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2790 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2791 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2792 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2793 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2794 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2795 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2796 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2797 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2798 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2799 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2800 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2801 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2802 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2803 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2804 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2805 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2806 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2807 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2808 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2809
2810 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2811 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2812 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2813 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2814 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2815 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2816 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2817 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2818 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2819 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2820 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2821 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2822 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2823 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2824 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2825 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2826 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2827 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2828 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2829 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2830 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2831 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2832 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2833 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC
2834 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2835 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2836 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC
2837 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2838 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2839 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC
2840 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2841 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2842 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2843 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC
2844 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2845 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2846 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2847 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2848 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2849 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2850 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2851 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2852 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2853 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2854 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2855 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2856 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2857 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2858 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2859 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2860 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2861 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2862 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2863 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2864 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2865 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2866 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2867 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2868 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2869 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2870 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2871 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2872 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2873 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2874 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2875 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2876 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2877 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2878 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2879 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2880 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2881 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2882 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2883 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2884 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC
2885
2886 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2887 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2888 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2889 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2890 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2891 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2892 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2893 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2894 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC
2895 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2896 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2897 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2898 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2899 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2900 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2901 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2902 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2903 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2904 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2905 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC
2906};
2907
2908/* Patch tag. */
2909
2910static reloc_howto_type *
2911bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2912 const char *r_name)
2913{
2914 unsigned int i;
2915
2916 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2917 if (nds32_elf_howto_table[i].name != NULL
2918 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2919 return &nds32_elf_howto_table[i];
2920
2921 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2922 if (nds32_elf_relax_howto_table[i].name != NULL
2923 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2924 return &nds32_elf_relax_howto_table[i];
2925
2926 return NULL;
2927}
2928
2929static reloc_howto_type *
2930bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2931{
2932 if (code < R_NDS32_RELAX_ENTRY)
2933 {
2934 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2935 return &nds32_elf_howto_table[code];
2936 }
2937 else
2938 {
2939 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2940 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2941 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2942 }
2943}
2944
2945static reloc_howto_type *
2946bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2947 bfd_reloc_code_real_type code)
2948{
2949 unsigned int i;
2950
2951 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2952 {
2953 if (nds32_reloc_map[i].bfd_reloc_val == code)
2954 return bfd_elf32_bfd_reloc_type_table_lookup
2955 (nds32_reloc_map[i].elf_reloc_val);
2956 }
2957
2958 return NULL;
2959}
2960
2961/* Set the howto pointer for an NDS32 ELF reloc. */
2962
2963static void
2964nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2965 Elf_Internal_Rela *dst)
2966{
2967 enum elf_nds32_reloc_type r_type;
2968
2969 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
2970 if (r_type > R_NDS32_GNU_VTENTRY)
2971 {
64d29018 2972 _bfd_error_handler (_("%B: invalid NDS32 reloc number: %d"), abfd, r_type);
5860e3f8
NC
2973 r_type = 0;
2974 }
35c08157
KLC
2975 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2976}
2977
2978static void
2979nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2980 Elf_Internal_Rela *dst)
2981{
2982 BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
2983 || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
2984 && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
2985 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
2986}
2987
2988/* Support for core dump NOTE sections.
2989 Reference to include/linux/elfcore.h in Linux. */
2990
2991static bfd_boolean
2992nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2993{
2994 int offset;
2995 size_t size;
2996
2997 switch (note->descsz)
2998 {
2999 case 0x114:
3000 /* Linux/NDS32 32-bit, ABI1 */
3001
3002 /* pr_cursig */
3003 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3004
3005 /* pr_pid */
3006 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3007
3008 /* pr_reg */
3009 offset = 72;
3010 size = 200;
3011 break;
3012
3013 case 0xfc:
3014 /* Linux/NDS32 32-bit */
3015
3016 /* pr_cursig */
3017 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3018
3019 /* pr_pid */
3020 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3021
3022 /* pr_reg */
3023 offset = 72;
3024 size = 176;
3025 break;
3026
3027 default:
3028 return FALSE;
3029 }
3030
3031 /* Make a ".reg" section. */
3032 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3033 size, note->descpos + offset);
3034}
3035
3036static bfd_boolean
3037nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3038{
3039 switch (note->descsz)
3040 {
3041 case 124:
3042 /* Linux/NDS32 */
3043
3044 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3045 elf_tdata (abfd)->core->program =
3046 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3047 elf_tdata (abfd)->core->command =
3048 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
3049
3050 default:
3051 return FALSE;
3052 }
3053
3054 /* Note that for some reason, a spurious space is tacked
3055 onto the end of the args in some (at least one anyway)
3056 implementations, so strip it off if it exists. */
3057 {
3058 char *command = elf_tdata (abfd)->core->command;
3059 int n = strlen (command);
3060
3061 if (0 < n && command[n - 1] == ' ')
3062 command[n - 1] = '\0';
3063 }
3064
3065 return TRUE;
3066}
3067
3068/* Hook called by the linker routine which adds symbols from an object
3069 file. We must handle the special NDS32 section numbers here.
3070 We also keep watching for whether we need to create the sdata special
3071 linker sections. */
3072
3073static bfd_boolean
3074nds32_elf_add_symbol_hook (bfd *abfd,
3075 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3076 Elf_Internal_Sym *sym,
3077 const char **namep ATTRIBUTE_UNUSED,
3078 flagword *flagsp ATTRIBUTE_UNUSED,
3079 asection **secp, bfd_vma *valp)
3080{
3081 switch (sym->st_shndx)
3082 {
3083 case SHN_COMMON:
3084 /* Common symbols less than the GP size are automatically
3085 treated as SHN_MIPS_SCOMMON symbols. */
3086 if (sym->st_size > elf_gp_size (abfd)
3087 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3088 break;
3089
3090 /* st_value is the alignemnt constraint.
3091 That might be its actual size if it is an array or structure. */
3092 switch (sym->st_value)
3093 {
3094 case 1:
3095 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3096 break;
3097 case 2:
3098 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3099 break;
3100 case 4:
3101 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3102 break;
3103 case 8:
3104 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3105 break;
3106 default:
3107 return TRUE;
3108 }
3109
3110 (*secp)->flags |= SEC_IS_COMMON;
3111 *valp = sym->st_size;
3112 break;
3113 }
3114
3115 return TRUE;
3116}
3117
3118
3119/* This function can figure out the best location for a base register to access
3120 data relative to this base register
3121 INPUT:
3122 sda_d0: size of first DOUBLE WORD data section
3123 sda_w0: size of first WORD data section
3124 sda_h0: size of first HALF WORD data section
3125 sda_b : size of BYTE data section
3126 sda_hi: size of second HALF WORD data section
3127 sda_w1: size of second WORD data section
3128 sda_d1: size of second DOUBLE WORD data section
3129 OUTPUT:
3130 offset (always positive) from the beginning of sda_d0 if OK
3131 a negative error value if fail
3132 NOTE:
3133 these 7 sections have to be located back to back if exist
3134 a pass in 0 value for non-existing section */
3135
3136/* Due to the interpretation of simm15 field of load/store depending on
3137 data accessing size, the organization of base register relative data shall
3138 like the following figure
3139 -------------------------------------------
3140 | DOUBLE WORD sized data (range +/- 128K)
3141 -------------------------------------------
3142 | WORD sized data (range +/- 64K)
3143 -------------------------------------------
3144 | HALF WORD sized data (range +/- 32K)
3145 -------------------------------------------
3146 | BYTE sized data (range +/- 16K)
3147 -------------------------------------------
3148 | HALF WORD sized data (range +/- 32K)
3149 -------------------------------------------
3150 | WORD sized data (range +/- 64K)
3151 -------------------------------------------
3152 | DOUBLE WORD sized data (range +/- 128K)
3153 -------------------------------------------
3154 Its base register shall be set to access these data freely. */
3155
3156/* We have to figure out the SDA_BASE value, so that we can adjust the
3157 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3158 BFD. If we can't find it, we're stuck. We cache it in the ELF
3159 target data. We don't need to adjust the symbol value for an
3160 external symbol if we are producing relocatable output. */
3161
3162static asection *sda_rela_sec = NULL;
3163
1c8f6a4d 3164#define SDA_SECTION_NUM 10
35c08157
KLC
3165
3166static bfd_reloc_status_type
3167nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3168 bfd_vma *psb, bfd_boolean add_symbol)
3169{
3170 int relax_fp_as_gp;
3171 struct elf_nds32_link_hash_table *table;
3172 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3173 long unsigned int total = 0;
35c08157
KLC
3174
3175 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3176 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3177 {
3178 asection *first = NULL, *final = NULL, *temp;
3179 bfd_vma sda_base;
3180 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3181 4 byte-aligned. Therefore, it has to set the first section ".data"
3182 4 byte-aligned. */
3183 static const char sec_name[SDA_SECTION_NUM][10] =
3184 {
3185 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3186 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC
3187 };
3188 size_t i = 0;
3189
3190 if (output_bfd->sections == NULL)
3191 {
3192 *psb = elf_gp (output_bfd);
3193 return bfd_reloc_ok;
3194 }
3195
3196 /* Get the first and final section. */
1c8f6a4d 3197 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3198 {
3199 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3200 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3201 first = temp;
3202 if (temp && (temp->size != 0 || temp->rawsize != 0))
3203 final = temp;
1c8f6a4d
KLC
3204
3205 /* Summarize the sections in order to check if joining .bss. */
3206 if (temp && temp->size != 0)
3207 total += temp->size;
3208 else if (temp && temp->rawsize != 0)
3209 total += temp->rawsize;
3210
35c08157
KLC
3211 i++;
3212 }
3213
1c8f6a4d
KLC
3214 /* Check .bss size. */
3215 temp = bfd_get_section_by_name (output_bfd, ".bss");
3216 if (temp)
3217 {
3218 if (temp->size != 0)
3219 total += temp->size;
3220 else if (temp->rawsize != 0)
3221 total += temp->rawsize;
3222
3223 if (total < 0x80000)
3224 {
3225 if (!first && (temp->size != 0 || temp->rawsize != 0))
3226 first = temp;
3227 if ((temp->size != 0 || temp->rawsize != 0))
3228 final = temp;
3229 }
3230 }
3231
35c08157
KLC
3232 if (first && final)
3233 {
3234 /* The middle of data region. */
1c8f6a4d 3235 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC
3236
3237 /* Find the section sda_base located. */
3238 i = 0;
1c8f6a4d 3239 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3240 {
3241 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3242 if (final && (final->size != 0 || final->rawsize != 0)
3243 && sda_base >= final->vma)
3244 {
3245 first = final;
3246 i++;
3247 }
3248 else
3249 break;
3250 }
3251 }
3252 else
3253 {
3254 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3255 first output section. */
3256 first = output_bfd->sections;
3257 while (first && first->size == 0 && first->rawsize == 0)
3258 first = first->next;
3259 if (!first)
3260 {
3261 *psb = elf_gp (output_bfd);
3262 return bfd_reloc_ok;
3263 }
1c8f6a4d 3264 sda_base = first->vma + first->rawsize;
35c08157
KLC
3265 }
3266
3267 sda_base -= first->vma;
3268 sda_base = sda_base & (~7);
3269
3270 if (!_bfd_generic_link_add_one_symbol
3271 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3272 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3273 get_elf_backend_data (output_bfd)->collect, &h))
3274 return FALSE;
3275
3276 sda_rela_sec = first;
3277
3278 table = nds32_elf_hash_table (info);
3279 relax_fp_as_gp = table->relax_fp_as_gp;
3280 if (relax_fp_as_gp)
3281 {
3282 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3283 FALSE, FALSE, FALSE);
3284 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3285 And set FP equal to SDA_BASE to do relaxation for
3286 la $fp, _FP_BASE_. */
3287 if (!_bfd_generic_link_add_one_symbol
3288 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3289 first, (bfd_vma) sda_base, (const char *) NULL,
3290 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3291 return FALSE;
3292 }
3293 }
3294
3295 if (add_symbol == TRUE)
3296 {
3297 if (h)
3298 {
3299 /* Now set gp. */
3300 elf_gp (output_bfd) = (h->u.def.value
3301 + h->u.def.section->output_section->vma
3302 + h->u.def.section->output_offset);
3303 }
3304 else
3305 {
3306 (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
3307 return bfd_reloc_dangerous;
3308 }
3309 }
3310
3311 *psb = h->u.def.value + h->u.def.section->output_section->vma
3312 + h->u.def.section->output_offset;
3313 return bfd_reloc_ok;
3314}
3315\f
3316
3317/* Return size of a PLT entry. */
3318#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3319
3320
3321/* Create an entry in an nds32 ELF linker hash table. */
3322
3323static struct bfd_hash_entry *
3324nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3325 struct bfd_hash_table *table,
3326 const char *string)
3327{
3328 struct elf_nds32_link_hash_entry *ret;
3329
3330 ret = (struct elf_nds32_link_hash_entry *) entry;
3331
3332 /* Allocate the structure if it has not already been allocated by a
3333 subclass. */
3334 if (ret == NULL)
3335 ret = (struct elf_nds32_link_hash_entry *)
3336 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3337
3338 if (ret == NULL)
3339 return (struct bfd_hash_entry *) ret;
3340
3341 /* Call the allocation method of the superclass. */
3342 ret = (struct elf_nds32_link_hash_entry *)
3343 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3344
3345 if (ret != NULL)
3346 {
3347 struct elf_nds32_link_hash_entry *eh;
3348
3349 eh = (struct elf_nds32_link_hash_entry *) ret;
3350 eh->dyn_relocs = NULL;
1c8f6a4d 3351 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC
3352 }
3353
3354 return (struct bfd_hash_entry *) ret;
3355}
3356
3357/* Create an nds32 ELF linker hash table. */
3358
3359static struct bfd_link_hash_table *
3360nds32_elf_link_hash_table_create (bfd *abfd)
3361{
3362 struct elf_nds32_link_hash_table *ret;
3363
3364 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3365
3366 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3367 if (ret == NULL)
3368 return NULL;
3369
3370 /* patch tag. */
3371 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3372 nds32_elf_link_hash_newfunc,
3373 sizeof (struct elf_nds32_link_hash_entry),
3374 NDS32_ELF_DATA))
3375 {
3376 free (ret);
3377 return NULL;
3378 }
3379
3380 ret->sgot = NULL;
3381 ret->sgotplt = NULL;
3382 ret->srelgot = NULL;
3383 ret->splt = NULL;
3384 ret->srelplt = NULL;
3385 ret->sdynbss = NULL;
3386 ret->srelbss = NULL;
3387 ret->sym_ld_script = NULL;
3388 ret->ex9_export_file = NULL;
3389 ret->ex9_import_file = NULL;
3390
3391 return &ret->root.root;
3392}
3393
3394/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3395 shortcuts to them in our hash table. */
3396
3397static bfd_boolean
3398create_got_section (bfd *dynobj, struct bfd_link_info *info)
3399{
3400 struct elf_nds32_link_hash_table *htab;
3401
3402 if (!_bfd_elf_create_got_section (dynobj, info))
3403 return FALSE;
3404
3405 htab = nds32_elf_hash_table (info);
3406 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
3407 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3408 if (!htab->sgot || !htab->sgotplt)
3409 abort ();
3410
3411 /* _bfd_elf_create_got_section will create it for us. */
3412 htab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3413 if (htab->srelgot == NULL
3414 || !bfd_set_section_flags (dynobj, htab->srelgot,
3415 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3416 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3417 | SEC_READONLY))
3418 || !bfd_set_section_alignment (dynobj, htab->srelgot, 2))
3419 return FALSE;
3420
3421 return TRUE;
3422}
3423
3424/* Create dynamic sections when linking against a dynamic object. */
3425
3426static bfd_boolean
3427nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3428{
3429 struct elf_nds32_link_hash_table *htab;
3430 flagword flags, pltflags;
3431 register asection *s;
3432 const struct elf_backend_data *bed;
3433 int ptralign = 2; /* 32-bit */
3434
3435 bed = get_elf_backend_data (abfd);
3436
3437 htab = nds32_elf_hash_table (info);
3438
3439 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3440 .rel[a].bss sections. */
3441
3442 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3443 | SEC_LINKER_CREATED);
3444
3445 pltflags = flags;
3446 pltflags |= SEC_CODE;
3447 if (bed->plt_not_loaded)
3448 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3449 if (bed->plt_readonly)
3450 pltflags |= SEC_READONLY;
3451
3452 s = bfd_make_section (abfd, ".plt");
3453 htab->splt = s;
3454 if (s == NULL
3455 || !bfd_set_section_flags (abfd, s, pltflags)
3456 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3457 return FALSE;
3458
3459 if (bed->want_plt_sym)
3460 {
3461 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3462 .plt section. */
3463 struct bfd_link_hash_entry *bh = NULL;
3464 struct elf_link_hash_entry *h;
3465
3466 if (!(_bfd_generic_link_add_one_symbol
3467 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3468 (bfd_vma) 0, (const char *) NULL, FALSE,
3469 get_elf_backend_data (abfd)->collect, &bh)))
3470 return FALSE;
3471
3472 h = (struct elf_link_hash_entry *) bh;
3473 h->def_regular = 1;
3474 h->type = STT_OBJECT;
3475
0e1862bb 3476 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC
3477 return FALSE;
3478 }
3479
3480 s = bfd_make_section (abfd,
3481 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
3482 htab->srelplt = s;
3483 if (s == NULL
3484 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3485 || !bfd_set_section_alignment (abfd, s, ptralign))
3486 return FALSE;
3487
3488 if (htab->sgot == NULL && !create_got_section (abfd, info))
3489 return FALSE;
3490
3491 {
3492 const char *secname;
3493 char *relname;
3494 flagword secflags;
3495 asection *sec;
3496
3497 for (sec = abfd->sections; sec; sec = sec->next)
3498 {
3499 secflags = bfd_get_section_flags (abfd, sec);
3500 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3501 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3502 continue;
3503 secname = bfd_get_section_name (abfd, sec);
3504 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3505 strcpy (relname, ".rela");
3506 strcat (relname, secname);
3507 if (bfd_get_section_by_name (abfd, secname))
3508 continue;
3509 s = bfd_make_section (abfd, relname);
3510 if (s == NULL
3511 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3512 || !bfd_set_section_alignment (abfd, s, ptralign))
3513 return FALSE;
3514 }
3515 }
3516
3517 if (bed->want_dynbss)
3518 {
3519 /* The .dynbss section is a place to put symbols which are defined
3520 by dynamic objects, are referenced by regular objects, and are
3521 not functions. We must allocate space for them in the process
3522 image and use a R_*_COPY reloc to tell the dynamic linker to
3523 initialize them at run time. The linker script puts the .dynbss
3524 section into the .bss section of the final image. */
3525 s = bfd_make_section (abfd, ".dynbss");
3526 htab->sdynbss = s;
3527 if (s == NULL
3528 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3529 return FALSE;
3530 /* The .rel[a].bss section holds copy relocs. This section is not
3531 normally needed. We need to create it here, though, so that the
3532 linker will map it to an output section. We can't just create it
3533 only if we need it, because we will not know whether we need it
3534 until we have seen all the input files, and the first time the
3535 main linker code calls BFD after examining all the input files
3536 (size_dynamic_sections) the input sections have already been
3537 mapped to the output sections. If the section turns out not to
3538 be needed, we can discard it later. We will never need this
3539 section when generating a shared object, since they do not use
3540 copy relocs. */
0e1862bb 3541 if (!bfd_link_pic (info))
35c08157
KLC
3542 {
3543 s = bfd_make_section (abfd, (bed->default_use_rela_p
3544 ? ".rela.bss" : ".rel.bss"));
3545 htab->srelbss = s;
3546 if (s == NULL
3547 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3548 || !bfd_set_section_alignment (abfd, s, ptralign))
3549 return FALSE;
3550 }
3551 }
3552
3553 return TRUE;
3554}
3555
3556/* Copy the extra info we tack onto an elf_link_hash_entry. */
3557static void
3558nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3559 struct elf_link_hash_entry *dir,
3560 struct elf_link_hash_entry *ind)
3561{
3562 struct elf_nds32_link_hash_entry *edir, *eind;
3563
3564 edir = (struct elf_nds32_link_hash_entry *) dir;
3565 eind = (struct elf_nds32_link_hash_entry *) ind;
3566
3567 if (eind->dyn_relocs != NULL)
3568 {
3569 if (edir->dyn_relocs != NULL)
3570 {
3571 struct elf_nds32_dyn_relocs **pp;
3572 struct elf_nds32_dyn_relocs *p;
3573
3574 if (ind->root.type == bfd_link_hash_indirect)
3575 abort ();
3576
3577 /* Add reloc counts against the weak sym to the strong sym
3578 list. Merge any entries against the same section. */
3579 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3580 {
3581 struct elf_nds32_dyn_relocs *q;
3582
3583 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3584 if (q->sec == p->sec)
3585 {
3586 q->pc_count += p->pc_count;
3587 q->count += p->count;
3588 *pp = p->next;
3589 break;
3590 }
3591 if (q == NULL)
3592 pp = &p->next;
3593 }
3594 *pp = edir->dyn_relocs;
3595 }
3596
3597 edir->dyn_relocs = eind->dyn_relocs;
3598 eind->dyn_relocs = NULL;
3599 }
3600
3601 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3602}
3603\f
3604
3605/* Adjust a symbol defined by a dynamic object and referenced by a
3606 regular object. The current definition is in some section of the
3607 dynamic object, but we're not including those sections. We have to
3608 change the definition to something the rest of the link can
3609 understand. */
3610
3611static bfd_boolean
3612nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3613 struct elf_link_hash_entry *h)
3614{
3615 struct elf_nds32_link_hash_table *htab;
3616 struct elf_nds32_link_hash_entry *eh;
3617 struct elf_nds32_dyn_relocs *p;
3618 bfd *dynobj;
3619 asection *s;
3620 unsigned int power_of_two;
3621
3622 dynobj = elf_hash_table (info)->dynobj;
3623
3624 /* Make sure we know what is going on here. */
3625 BFD_ASSERT (dynobj != NULL
3626 && (h->needs_plt
3627 || h->u.weakdef != NULL
3628 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3629
3630
3631 /* If this is a function, put it in the procedure linkage table. We
3632 will fill in the contents of the procedure linkage table later,
3633 when we know the address of the .got section. */
3634 if (h->type == STT_FUNC || h->needs_plt)
3635 {
0e1862bb 3636 if (!bfd_link_pic (info)
35c08157
KLC
3637 && !h->def_dynamic
3638 && !h->ref_dynamic
3639 && h->root.type != bfd_link_hash_undefweak
3640 && h->root.type != bfd_link_hash_undefined)
3641 {
3642 /* This case can occur if we saw a PLT reloc in an input
3643 file, but the symbol was never referred to by a dynamic
3644 object. In such a case, we don't actually need to build
3645 a procedure linkage table, and we can just do a PCREL
3646 reloc instead. */
3647 h->plt.offset = (bfd_vma) - 1;
3648 h->needs_plt = 0;
3649 }
3650
3651 return TRUE;
3652 }
3653 else
3654 h->plt.offset = (bfd_vma) - 1;
3655
3656 /* If this is a weak symbol, and there is a real definition, the
3657 processor independent code will have arranged for us to see the
3658 real definition first, and we can just use the same value. */
3659 if (h->u.weakdef != NULL)
3660 {
3661 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
3662 || h->u.weakdef->root.type == bfd_link_hash_defweak);
3663 h->root.u.def.section = h->u.weakdef->root.u.def.section;
3664 h->root.u.def.value = h->u.weakdef->root.u.def.value;
3665 return TRUE;
3666 }
3667
3668 /* This is a reference to a symbol defined by a dynamic object which
3669 is not a function. */
3670
3671 /* If we are creating a shared library, we must presume that the
3672 only references to the symbol are via the global offset table.
3673 For such cases we need not do anything here; the relocations will
3674 be handled correctly by relocate_section. */
0e1862bb 3675 if (bfd_link_pic (info))
35c08157
KLC
3676 return TRUE;
3677
3678 /* If there are no references to this symbol that do not use the
3679 GOT, we don't need to generate a copy reloc. */
3680 if (!h->non_got_ref)
3681 return TRUE;
3682
3683 /* If -z nocopyreloc was given, we won't generate them either. */
3684 if (info->nocopyreloc)
3685 {
3686 h->non_got_ref = 0;
3687 return TRUE;
3688 }
3689
3690 eh = (struct elf_nds32_link_hash_entry *) h;
3691 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3692 {
3693 s = p->sec->output_section;
3694 if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
3695 break;
3696 }
3697
3698 /* If we didn't find any dynamic relocs in sections which needs the
3699 copy reloc, then we'll be keeping the dynamic relocs and avoiding
3700 the copy reloc. */
3701 if (p == NULL)
3702 {
3703 h->non_got_ref = 0;
3704 return TRUE;
3705 }
3706
3707 /* We must allocate the symbol in our .dynbss section, which will
3708 become part of the .bss section of the executable. There will be
3709 an entry for this symbol in the .dynsym section. The dynamic
3710 object will contain position independent code, so all references
3711 from the dynamic object to this symbol will go through the global
3712 offset table. The dynamic linker will use the .dynsym entry to
3713 determine the address it must put in the global offset table, so
3714 both the dynamic object and the regular object will refer to the
3715 same memory location for the variable. */
3716
3717 htab = nds32_elf_hash_table (info);
3718 s = htab->sdynbss;
3719 BFD_ASSERT (s != NULL);
3720
3721 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3722 to copy the initial value out of the dynamic object and into the
3723 runtime process image. We need to remember the offset into the
3724 .rela.bss section we are going to use. */
3725 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3726 {
3727 asection *srel;
3728
3729 srel = htab->srelbss;
3730 BFD_ASSERT (srel != NULL);
3731 srel->size += sizeof (Elf32_External_Rela);
3732 h->needs_copy = 1;
3733 }
3734
3735 /* We need to figure out the alignment required for this symbol. I
3736 have no idea how ELF linkers handle this. */
3737 power_of_two = bfd_log2 (h->size);
3738 if (power_of_two > 3)
3739 power_of_two = 3;
3740
3741 /* Apply the required alignment. */
3742 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3743 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3744 {
3745 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3746 return FALSE;
3747 }
3748
3749 /* Define the symbol as being at this point in the section. */
3750 h->root.u.def.section = s;
3751 h->root.u.def.value = s->size;
3752
3753 /* Increment the section size to make room for the symbol. */
3754 s->size += h->size;
3755
3756 return TRUE;
3757}
3758
3759/* Allocate space in .plt, .got and associated reloc sections for
3760 dynamic relocs. */
3761
3762static bfd_boolean
3763allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3764{
3765 struct bfd_link_info *info;
3766 struct elf_nds32_link_hash_table *htab;
3767 struct elf_nds32_link_hash_entry *eh;
3768 struct elf_nds32_dyn_relocs *p;
3769
3770 if (h->root.type == bfd_link_hash_indirect)
3771 return TRUE;
3772
3773 if (h->root.type == bfd_link_hash_warning)
3774 /* When warning symbols are created, they **replace** the "real"
3775 entry in the hash table, thus we never get to see the real
3776 symbol in a hash traversal. So look at it now. */
3777 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3778
3779 info = (struct bfd_link_info *) inf;
3780 htab = nds32_elf_hash_table (info);
3781
3782 eh = (struct elf_nds32_link_hash_entry *) h;
3783
3784 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3785 {
3786 /* Make sure this symbol is output as a dynamic symbol.
3787 Undefined weak syms won't yet be marked as dynamic. */
3788 if (h->dynindx == -1 && !h->forced_local)
3789 {
3790 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3791 return FALSE;
3792 }
3793
0e1862bb 3794 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157
KLC
3795 {
3796 asection *s = htab->splt;
3797
3798 /* If this is the first .plt entry, make room for the special
3799 first entry. */
3800 if (s->size == 0)
3801 s->size += PLT_ENTRY_SIZE;
3802
3803 h->plt.offset = s->size;
3804
3805 /* If this symbol is not defined in a regular file, and we are
3806 not generating a shared library, then set the symbol to this
3807 location in the .plt. This is required to make function
3808 pointers compare as equal between the normal executable and
3809 the shared library. */
0e1862bb 3810 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC
3811 {
3812 h->root.u.def.section = s;
3813 h->root.u.def.value = h->plt.offset;
3814 }
3815
3816 /* Make room for this entry. */
3817 s->size += PLT_ENTRY_SIZE;
3818
3819 /* We also need to make an entry in the .got.plt section, which
3820 will be placed in the .got section by the linker script. */
3821 htab->sgotplt->size += 4;
3822
3823 /* We also need to make an entry in the .rel.plt section. */
3824 htab->srelplt->size += sizeof (Elf32_External_Rela);
3825 }
3826 else
3827 {
3828 h->plt.offset = (bfd_vma) - 1;
3829 h->needs_plt = 0;
3830 }
3831 }
3832 else
3833 {
3834 h->plt.offset = (bfd_vma) - 1;
3835 h->needs_plt = 0;
3836 }
3837
3838 if (h->got.refcount > 0)
3839 {
3840 asection *s;
3841 bfd_boolean dyn;
1c8f6a4d 3842 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC
3843
3844 /* Make sure this symbol is output as a dynamic symbol.
3845 Undefined weak syms won't yet be marked as dynamic. */
3846 if (h->dynindx == -1 && !h->forced_local)
3847 {
3848 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3849 return FALSE;
3850 }
3851
3852 s = htab->sgot;
35c08157 3853 h->got.offset = s->size;
1c8f6a4d
KLC
3854
3855 if (tls_type == GOT_UNKNOWN)
3856 abort ();
3857 else if (tls_type == GOT_NORMAL
3858 || tls_type == GOT_TLS_IE)
3859 /* Need a GOT slot. */
3860 s->size += 4;
3861
35c08157 3862 dyn = htab->root.dynamic_sections_created;
0e1862bb 3863 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
35c08157
KLC
3864 htab->srelgot->size += sizeof (Elf32_External_Rela);
3865 }
3866 else
3867 h->got.offset = (bfd_vma) - 1;
3868
3869 if (eh->dyn_relocs == NULL)
3870 return TRUE;
3871
3872 /* In the shared -Bsymbolic case, discard space allocated for
3873 dynamic pc-relative relocs against symbols which turn out to be
3874 defined in regular objects. For the normal shared case, discard
3875 space for pc-relative relocs that have become local due to symbol
3876 visibility changes. */
3877
0e1862bb 3878 if (bfd_link_pic (info))
35c08157
KLC
3879 {
3880 if (h->def_regular && (h->forced_local || info->symbolic))
3881 {
3882 struct elf_nds32_dyn_relocs **pp;
3883
3884 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3885 {
3886 p->count -= p->pc_count;
3887 p->pc_count = 0;
3888 if (p->count == 0)
3889 *pp = p->next;
3890 else
3891 pp = &p->next;
3892 }
3893 }
3894 }
3895 else
3896 {
3897 /* For the non-shared case, discard space for relocs against
3898 symbols which turn out to need copy relocs or are not dynamic. */
3899
3900 if (!h->non_got_ref
3901 && ((h->def_dynamic
3902 && !h->def_regular)
3903 || (htab->root.dynamic_sections_created
3904 && (h->root.type == bfd_link_hash_undefweak
3905 || h->root.type == bfd_link_hash_undefined))))
3906 {
3907 /* Make sure this symbol is output as a dynamic symbol.
3908 Undefined weak syms won't yet be marked as dynamic. */
3909 if (h->dynindx == -1 && !h->forced_local)
3910 {
3911 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3912 return FALSE;
3913 }
3914
3915 /* If that succeeded, we know we'll be keeping all the
3916 relocs. */
3917 if (h->dynindx != -1)
3918 goto keep;
3919 }
3920
3921 eh->dyn_relocs = NULL;
3922
3923 keep:;
3924 }
3925
3926 /* Finally, allocate space. */
3927 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3928 {
3929 asection *sreloc = elf_section_data (p->sec)->sreloc;
3930 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3931 }
3932
3933 return TRUE;
3934}
3935
3936/* Find any dynamic relocs that apply to read-only sections. */
3937
3938static bfd_boolean
3939readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3940{
3941 struct elf_nds32_link_hash_entry *eh;
3942 struct elf_nds32_dyn_relocs *p;
3943
3944 if (h->root.type == bfd_link_hash_warning)
3945 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3946
3947 eh = (struct elf_nds32_link_hash_entry *) h;
3948 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3949 {
3950 asection *s = p->sec->output_section;
3951
3952 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3953 {
3954 struct bfd_link_info *info = (struct bfd_link_info *) inf;
3955
3956 info->flags |= DF_TEXTREL;
3957
3958 /* Not an error, just cut short the traversal. */
3959 return FALSE;
3960 }
3961 }
3962 return TRUE;
3963}
3964
3965/* Set the sizes of the dynamic sections. */
3966
3967static bfd_boolean
3968nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3969 struct bfd_link_info *info)
3970{
3971 struct elf_nds32_link_hash_table *htab;
3972 bfd *dynobj;
3973 asection *s;
3974 bfd_boolean relocs;
3975 bfd *ibfd;
3976
3977 htab = nds32_elf_hash_table (info);
3978 dynobj = htab->root.dynobj;
3979 BFD_ASSERT (dynobj != NULL);
3980
3981 if (htab->root.dynamic_sections_created)
3982 {
3983 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 3984 if (!bfd_link_pic (info) && !info->nointerp)
35c08157
KLC
3985 {
3986 s = bfd_get_section_by_name (dynobj, ".interp");
3987 BFD_ASSERT (s != NULL);
3988 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3989 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3990 }
3991 }
3992
3993 /* Set up .got offsets for local syms, and space for local dynamic
3994 relocs. */
c72f2fb2 3995 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC
3996 {
3997 bfd_signed_vma *local_got;
3998 bfd_signed_vma *end_local_got;
3999 bfd_size_type locsymcount;
4000 Elf_Internal_Shdr *symtab_hdr;
4001 asection *srel;
4002
4003 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4004 continue;
4005
4006 for (s = ibfd->sections; s != NULL; s = s->next)
4007 {
4008 struct elf_nds32_dyn_relocs *p;
4009
4010 for (p = ((struct elf_nds32_dyn_relocs *)
4011 elf_section_data (s)->local_dynrel);
4012 p != NULL; p = p->next)
4013 {
4014 if (!bfd_is_abs_section (p->sec)
4015 && bfd_is_abs_section (p->sec->output_section))
4016 {
4017 /* Input section has been discarded, either because
4018 it is a copy of a linkonce section or due to
4019 linker script /DISCARD/, so we'll be discarding
4020 the relocs too. */
4021 }
4022 else if (p->count != 0)
4023 {
4024 srel = elf_section_data (p->sec)->sreloc;
4025 srel->size += p->count * sizeof (Elf32_External_Rela);
4026 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4027 info->flags |= DF_TEXTREL;
4028 }
4029 }
4030 }
4031
4032 local_got = elf_local_got_refcounts (ibfd);
4033 if (!local_got)
4034 continue;
4035
4036 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4037 locsymcount = symtab_hdr->sh_info;
4038 end_local_got = local_got + locsymcount;
4039 s = htab->sgot;
4040 srel = htab->srelgot;
4041 for (; local_got < end_local_got; ++local_got)
4042 {
4043 if (*local_got > 0)
4044 {
4045 *local_got = s->size;
4046 s->size += 4;
0e1862bb 4047 if (bfd_link_pic (info))
35c08157
KLC
4048 srel->size += sizeof (Elf32_External_Rela);
4049 }
4050 else
4051 *local_got = (bfd_vma) - 1;
4052 }
4053 }
4054
4055 /* Allocate global sym .plt and .got entries, and space for global
4056 sym dynamic relocs. */
4057 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4058
4059 /* We now have determined the sizes of the various dynamic sections.
4060 Allocate memory for them. */
4061 relocs = FALSE;
4062 for (s = dynobj->sections; s != NULL; s = s->next)
4063 {
4064 if ((s->flags & SEC_LINKER_CREATED) == 0)
4065 continue;
4066
4067 if (s == htab->splt)
4068 {
4069 /* Strip this section if we don't need it; see the
4070 comment below. */
4071 }
4072 else if (s == htab->sgot)
4073 {
4074 got_size += s->size;
4075 }
4076 else if (s == htab->sgotplt)
4077 {
4078 got_size += s->size;
4079 }
4080 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
4081 {
4082 if (s->size != 0 && s != htab->srelplt)
4083 relocs = TRUE;
4084
4085 /* We use the reloc_count field as a counter if we need
4086 to copy relocs into the output file. */
4087 s->reloc_count = 0;
4088 }
4089 else
4090 {
4091 /* It's not one of our sections, so don't allocate space. */
4092 continue;
4093 }
4094
4095 if (s->size == 0)
4096 {
4097 /* If we don't need this section, strip it from the
4098 output file. This is mostly to handle .rela.bss and
4099 .rela.plt. We must create both sections in
4100 create_dynamic_sections, because they must be created
4101 before the linker maps input sections to output
4102 sections. The linker does that before
4103 adjust_dynamic_symbol is called, and it is that
4104 function which decides whether anything needs to go
4105 into these sections. */
4106 s->flags |= SEC_EXCLUDE;
4107 continue;
4108 }
4109
4110 /* Allocate memory for the section contents. We use bfd_zalloc
4111 here in case unused entries are not reclaimed before the
4112 section's contents are written out. This should not happen,
4113 but this way if it does, we get a R_NDS32_NONE reloc instead
4114 of garbage. */
4115 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4116 if (s->contents == NULL)
4117 return FALSE;
4118 }
4119
4120
4121 if (htab->root.dynamic_sections_created)
4122 {
4123 /* Add some entries to the .dynamic section. We fill in the
4124 values later, in nds32_elf_finish_dynamic_sections, but we
4125 must add the entries now so that we get the correct size for
4126 the .dynamic section. The DT_DEBUG entry is filled in by the
4127 dynamic linker and used by the debugger. */
4128#define add_dynamic_entry(TAG, VAL) \
4129 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4130
0e1862bb 4131 if (!bfd_link_pic (info))
35c08157
KLC
4132 {
4133 if (!add_dynamic_entry (DT_DEBUG, 0))
4134 return FALSE;
4135 }
4136
4137 if (htab->splt->size != 0)
4138 {
4139 if (!add_dynamic_entry (DT_PLTGOT, 0)
4140 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4141 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4142 || !add_dynamic_entry (DT_JMPREL, 0))
4143 return FALSE;
4144 }
4145
4146 if (relocs)
4147 {
4148 if (!add_dynamic_entry (DT_RELA, 0)
4149 || !add_dynamic_entry (DT_RELASZ, 0)
4150 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4151 return FALSE;
4152
4153 /* If any dynamic relocs apply to a read-only section,
4154 then we need a DT_TEXTREL entry. */
4155 if ((info->flags & DF_TEXTREL) == 0)
4156 elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
4157 (void *) info);
4158
4159 if ((info->flags & DF_TEXTREL) != 0)
4160 {
4161 if (!add_dynamic_entry (DT_TEXTREL, 0))
4162 return FALSE;
4163 }
4164 }
4165 }
4166#undef add_dynamic_entry
4167
4168 return TRUE;
4169}
4170
4171static bfd_reloc_status_type
4172nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4173 bfd_vma relocation, bfd_byte *location)
4174{
4175 int size;
4176 bfd_vma x = 0;
4177 bfd_reloc_status_type flag;
4178 unsigned int rightshift = howto->rightshift;
4179 unsigned int bitpos = howto->bitpos;
4180
4181 /* If the size is negative, negate RELOCATION. This isn't very
4182 general. */
4183 if (howto->size < 0)
4184 relocation = -relocation;
4185
4186 /* Get the value we are going to relocate. */
4187 size = bfd_get_reloc_size (howto);
4188 switch (size)
4189 {
4190 default:
35c08157
KLC
4191 abort ();
4192 break;
6346d5ca
AM
4193 case 0:
4194 return bfd_reloc_ok;
35c08157
KLC
4195 case 2:
4196 x = bfd_getb16 (location);
4197 break;
4198 case 4:
4199 x = bfd_getb32 (location);
4200 break;
4201 }
4202
4203 /* Check for overflow. FIXME: We may drop bits during the addition
4204 which we don't check for. We must either check at every single
4205 operation, which would be tedious, or we must do the computations
4206 in a type larger than bfd_vma, which would be inefficient. */
4207 flag = bfd_reloc_ok;
4208 if (howto->complain_on_overflow != complain_overflow_dont)
4209 {
4210 bfd_vma addrmask, fieldmask, signmask, ss;
4211 bfd_vma a, b, sum;
4212
4213 /* Get the values to be added together. For signed and unsigned
4214 relocations, we assume that all values should be truncated to
4215 the size of an address. For bitfields, all the bits matter.
4216 See also bfd_check_overflow. */
4217 fieldmask = N_ONES (howto->bitsize);
4218 signmask = ~fieldmask;
4219 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4220 a = (relocation & addrmask) >> rightshift;
4221 b = (x & howto->src_mask & addrmask) >> bitpos;
4222
4223 switch (howto->complain_on_overflow)
4224 {
4225 case complain_overflow_signed:
4226 /* If any sign bits are set, all sign bits must be set.
4227 That is, A must be a valid negative address after
4228 shifting. */
4229 signmask = ~(fieldmask >> 1);
4230 /* Fall through. */
4231
4232 case complain_overflow_bitfield:
4233 /* Much like the signed check, but for a field one bit
4234 wider. We allow a bitfield to represent numbers in the
4235 range -2**n to 2**n-1, where n is the number of bits in the
4236 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4237 can't overflow, which is exactly what we want. */
4238 ss = a & signmask;
4239 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4240 flag = bfd_reloc_overflow;
4241
4242 /* We only need this next bit of code if the sign bit of B
4243 is below the sign bit of A. This would only happen if
4244 SRC_MASK had fewer bits than BITSIZE. Note that if
4245 SRC_MASK has more bits than BITSIZE, we can get into
4246 trouble; we would need to verify that B is in range, as
4247 we do for A above. */
4248 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4249 ss >>= bitpos;
4250
4251 /* Set all the bits above the sign bit. */
4252 b = (b ^ ss) - ss;
4253
4254 /* Now we can do the addition. */
4255 sum = a + b;
4256
4257 /* See if the result has the correct sign. Bits above the
4258 sign bit are junk now; ignore them. If the sum is
4259 positive, make sure we did not have all negative inputs;
4260 if the sum is negative, make sure we did not have all
4261 positive inputs. The test below looks only at the sign
4262 bits, and it really just
4263 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4264
4265 We mask with addrmask here to explicitly allow an address
4266 wrap-around. The Linux kernel relies on it, and it is
4267 the only way to write assembler code which can run when
4268 loaded at a location 0x80000000 away from the location at
4269 which it is linked. */
4270 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4271 flag = bfd_reloc_overflow;
4272
4273 break;
4274
4275 case complain_overflow_unsigned:
4276 /* Checking for an unsigned overflow is relatively easy:
4277 trim the addresses and add, and trim the result as well.
4278 Overflow is normally indicated when the result does not
4279 fit in the field. However, we also need to consider the
4280 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4281 input is 0x80000000, and bfd_vma is only 32 bits; then we
4282 will get sum == 0, but there is an overflow, since the
4283 inputs did not fit in the field. Instead of doing a
4284 separate test, we can check for this by or-ing in the
4285 operands when testing for the sum overflowing its final
4286 field. */
4287 sum = (a + b) & addrmask;
4288 if ((a | b | sum) & signmask)
4289 flag = bfd_reloc_overflow;
4290 break;
4291
4292 default:
4293 abort ();
4294 }
4295 }
4296
4297 /* Put RELOCATION in the right bits. */
4298 relocation >>= (bfd_vma) rightshift;
4299 relocation <<= (bfd_vma) bitpos;
4300
4301 /* Add RELOCATION to the right bits of X. */
4302 /* FIXME : 090616
4303 Because the relaxation may generate duplicate relocation at one address,
4304 an addition to immediate in the instruction may cause the relocation added
4305 several times.
4306 This bug should be fixed in assembler, but a check is also needed here. */
4307 if (howto->partial_inplace)
4308 x = ((x & ~howto->dst_mask)
4309 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4310 else
4311 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4312
4313
4314 /* Put the relocated value back in the object file. */
4315 switch (size)
4316 {
4317 default:
4318 case 0:
4319 case 1:
4320 case 8:
4321 abort ();
4322 break;
4323 case 2:
4324 bfd_putb16 (x, location);
4325 break;
4326 case 4:
4327 bfd_putb32 (x, location);
4328 break;
4329 }
4330
4331 return flag;
4332}
4333
4334static bfd_reloc_status_type
4335nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4336 asection *input_section, bfd_byte *contents,
4337 bfd_vma address, bfd_vma value, bfd_vma addend)
4338{
4339 bfd_vma relocation;
4340
4341 /* Sanity check the address. */
4342 if (address > bfd_get_section_limit (input_bfd, input_section))
4343 return bfd_reloc_outofrange;
4344
4345 /* This function assumes that we are dealing with a basic relocation
4346 against a symbol. We want to compute the value of the symbol to
4347 relocate to. This is just VALUE, the value of the symbol, plus
4348 ADDEND, any addend associated with the reloc. */
4349 relocation = value + addend;
4350
4351 /* If the relocation is PC relative, we want to set RELOCATION to
4352 the distance between the symbol (currently in RELOCATION) and the
4353 location we are relocating. Some targets (e.g., i386-aout)
4354 arrange for the contents of the section to be the negative of the
4355 offset of the location within the section; for such targets
4356 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
4357 simply leave the contents of the section as zero; for such
4358 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
4359 need to subtract out the offset of the location within the
4360 section (which is just ADDRESS). */
4361 if (howto->pc_relative)
4362 {
4363 relocation -= (input_section->output_section->vma
4364 + input_section->output_offset);
4365 if (howto->pcrel_offset)
4366 relocation -= address;
4367 }
4368
4369 return nds32_relocate_contents (howto, input_bfd, relocation,
4370 contents + address);
4371}
4372
4373static bfd_boolean
4374nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4375 const char *name,
4376 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4377 asection *input_sec,
4378 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4379{
4380 const char *source;
4381 FILE *sym_ld_script = NULL;
4382 struct elf_nds32_link_hash_table *table;
4383
4384 table = nds32_elf_hash_table (info);
4385 sym_ld_script = table->sym_ld_script;
4386 if (!sym_ld_script)
4387 return TRUE;
4388
4389 if (!h || !name || *name == '\0')
4390 return TRUE;
4391
4392 if (input_sec->flags & SEC_EXCLUDE)
4393 return TRUE;
4394
4395 if (!check_start_export_sym)
4396 {
4397 fprintf (sym_ld_script, "SECTIONS\n{\n");
4398 check_start_export_sym = 1;
4399 }
4400
4401 if (h->root.type == bfd_link_hash_defined
4402 || h->root.type == bfd_link_hash_defweak)
4403 {
4404 if (!h->root.u.def.section->output_section)
4405 return TRUE;
4406
4407 if (bfd_is_const_section (input_sec))
4408 source = input_sec->name;
4409 else
4410 source = input_sec->owner->filename;
4411
4412 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4413 h->root.root.string,
4414 (long) (h->root.u.def.value
4415 + h->root.u.def.section->output_section->vma
4416 + h->root.u.def.section->output_offset), source);
4417 }
4418
4419 return TRUE;
4420}
4421
4422/* Relocate an NDS32/D ELF section.
4423 There is some attempt to make this function usable for many architectures,
4424 both for RELA and REL type relocs, if only to serve as a learning tool.
4425
4426 The RELOCATE_SECTION function is called by the new ELF backend linker
4427 to handle the relocations for a section.
4428
4429 The relocs are always passed as Rela structures; if the section
4430 actually uses Rel structures, the r_addend field will always be
4431 zero.
4432
4433 This function is responsible for adjust the section contents as
4434 necessary, and (if using Rela relocs and generating a
4435 relocatable output file) adjusting the reloc addend as
4436 necessary.
4437
4438 This function does not have to worry about setting the reloc
4439 address or the reloc symbol index.
4440
4441 LOCAL_SYMS is a pointer to the swapped in local symbols.
4442
4443 LOCAL_SECTIONS is an array giving the section in the input file
4444 corresponding to the st_shndx field of each local symbol.
4445
4446 The global hash table entry for the global symbols can be found
4447 via elf_sym_hashes (input_bfd).
4448
4449 When generating relocatable output, this function must handle
4450 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4451 going to be the section symbol corresponding to the output
4452 section, which means that the addend must be adjusted
4453 accordingly. */
4454
1c8f6a4d
KLC
4455static bfd_vma
4456dtpoff_base (struct bfd_link_info *info)
4457{
4458 /* If tls_sec is NULL, we should have signalled an error already. */
4459 if (elf_hash_table (info)->tls_sec == NULL)
4460 return 0;
4461 return elf_hash_table (info)->tls_sec->vma;
4462}
4463
35c08157
KLC
4464static bfd_boolean
4465nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4466 struct bfd_link_info * info,
4467 bfd * input_bfd,
4468 asection * input_section,
4469 bfd_byte * contents,
4470 Elf_Internal_Rela * relocs,
4471 Elf_Internal_Sym * local_syms,
4472 asection ** local_sections)
4473{
4474 Elf_Internal_Shdr *symtab_hdr;
4475 struct elf_link_hash_entry **sym_hashes;
4476 Elf_Internal_Rela *rel, *relend;
4477 bfd_boolean ret = TRUE; /* Assume success. */
4478 int align = 0;
4479 bfd_reloc_status_type r;
4480 const char *errmsg = NULL;
4481 bfd_vma gp;
4482 struct elf_nds32_link_hash_table *htab;
4483 bfd *dynobj;
4484 bfd_vma *local_got_offsets;
4485 asection *sgot, *splt, *sreloc;
4486 bfd_vma high_address;
4487 struct elf_nds32_link_hash_table *table;
4488 int eliminate_gc_relocs;
4489 bfd_vma fpbase_addr;
4490
4491 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4492 sym_hashes = elf_sym_hashes (input_bfd);
4493 htab = nds32_elf_hash_table (info);
4494 high_address = bfd_get_section_limit (input_bfd, input_section);
4495
4496 dynobj = htab->root.dynobj;
4497 local_got_offsets = elf_local_got_offsets (input_bfd);
4498
4499 sgot = htab->sgot;
4500 splt = htab->splt;
4501 sreloc = NULL;
4502
4503 rel = relocs;
4504 relend = relocs + input_section->reloc_count;
4505
4506 table = nds32_elf_hash_table (info);
4507 eliminate_gc_relocs = table->eliminate_gc_relocs;
4508 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4509 if ((!bfd_link_relocatable (info)))
35c08157
KLC
4510 {
4511 is_SDA_BASE_set = 1;
4512 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4513 if (r != bfd_reloc_ok)
4514 return FALSE;
4515 }
4516
0c4bd9d9
KLC
4517 if (is_ITB_BASE_set == 0)
4518 {
4519 /* Set the _ITB_BASE_. */
4520 if (!nds32_elf_ex9_itb_base (info))
4521 {
4522 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"),
4523 output_bfd);
4524 bfd_set_error (bfd_error_bad_value);
4525 }
4526 }
4527
1c8f6a4d
KLC
4528 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
4529 if (!nds32_elf_ifc_reloc ())
4530 (*_bfd_error_handler) (_("error: IFC relocation error."));
4531
4532 /* Relocation for .ex9.itable. */
4533 if (table->target_optimize & NDS32_RELAX_EX9_ON
4534 || (table->ex9_import_file && table->update_ex9_table))
4535 nds32_elf_ex9_reloc_jmp (info);
4536
35c08157
KLC
4537 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4538 the fp value is set as gp, and it has be reverted for instruction
4539 setting fp. */
4540 fpbase_addr = elf_gp (output_bfd);
4541
4542 for (rel = relocs; rel < relend; rel++)
4543 {
4544 enum elf_nds32_reloc_type r_type;
4545 reloc_howto_type *howto = NULL;
4546 unsigned long r_symndx;
4547 struct elf_link_hash_entry *h = NULL;
4548 Elf_Internal_Sym *sym = NULL;
4549 asection *sec;
4550 bfd_vma relocation;
4551
4552 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4553 ensure it's zero (we use REL relocs, not RELA). Therefore this
4554 should be assigning zero to `addend', but for clarity we use
4555 `r_addend'. */
4556
4557 bfd_vma addend = rel->r_addend;
4558 bfd_vma offset = rel->r_offset;
4559
4560 r_type = ELF32_R_TYPE (rel->r_info);
4561 if (r_type >= R_NDS32_max)
4562 {
4563 (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
4564 input_bfd, r_type);
4565 bfd_set_error (bfd_error_bad_value);
4566 ret = FALSE;
4567 continue;
4568 }
4569
4570 if (r_type == R_NDS32_GNU_VTENTRY
4571 || r_type == R_NDS32_GNU_VTINHERIT
4572 || r_type == R_NDS32_NONE
4573 || r_type == R_NDS32_RELA_GNU_VTENTRY
4574 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4575 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4576 || r_type == R_NDS32_DATA
1c8f6a4d 4577 || r_type == R_NDS32_TRAN
0c4bd9d9 4578 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC
4579 continue;
4580
0c4bd9d9
KLC
4581 /* If we enter the fp-as-gp region. Resolve the address
4582 of best fp-base. */
35c08157
KLC
4583 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4584 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4585 {
4586 int dist;
4587
4588 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4589 dist = rel->r_addend >> 16;
4590 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4591 local_syms, symtab_hdr);
4592 }
4593 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4594 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4595 {
4596 fpbase_addr = elf_gp (output_bfd);
4597 }
4598
4599 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4600 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4601 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC
4602 continue;
4603
4604 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4605 r_symndx = ELF32_R_SYM (rel->r_info);
4606
4607 /* This is a final link. */
4608 sym = NULL;
4609 sec = NULL;
4610 h = NULL;
4611
4612 if (r_symndx < symtab_hdr->sh_info)
4613 {
4614 /* Local symbol. */
4615 sym = local_syms + r_symndx;
4616 sec = local_sections[r_symndx];
4617
4618 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4619 addend = rel->r_addend;
4620 }
4621 else
4622 {
4623 /* External symbol. */
4624 bfd_boolean warned, ignored, unresolved_reloc;
4625 int symndx = r_symndx - symtab_hdr->sh_info;
4626
4627 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4628 r_symndx, symtab_hdr, sym_hashes, h, sec,
4629 relocation, unresolved_reloc, warned,
4630 ignored);
4631
4632 /* la $fp, _FP_BASE_ is per-function (region).
4633 Handle it specially. */
4634 switch ((int) r_type)
4635 {
4636 case R_NDS32_SDA19S0_RELA:
4637 case R_NDS32_SDA15S0_RELA:
4638 case R_NDS32_20_RELA:
4639 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4640 FP_BASE_NAME) == 0)
4641 {
4642 relocation = fpbase_addr;
4643 break;
4644 }
4645 }
4646
4647 }
4648
0e1862bb 4649 if (bfd_link_relocatable (info))
35c08157
KLC
4650 {
4651 /* This is a relocatable link. We don't have to change
4652 anything, unless the reloc is against a section symbol,
4653 in which case we have to adjust according to where the
4654 section symbol winds up in the output section. */
4655 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4656 rel->r_addend += sec->output_offset + sym->st_value;
4657
4658 continue;
4659 }
4660
4661 /* Sanity check the address. */
4662 if (offset > high_address)
4663 {
4664 r = bfd_reloc_outofrange;
4665 goto check_reloc;
4666 }
4667
4668 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4669 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4670 || r_type >= R_NDS32_RELAX_ENTRY)
4671 continue;
4672
4673 switch ((int) r_type)
4674 {
4675 case R_NDS32_GOTOFF:
4676 /* Relocation is relative to the start of the global offset
4677 table (for ld24 rx, #uimm24), e.g. access at label+addend
4678
4679 ld24 rx. #label@GOTOFF + addend
4680 sub rx, r12. */
4681 case R_NDS32_GOTOFF_HI20:
4682 case R_NDS32_GOTOFF_LO12:
4683 case R_NDS32_GOTOFF_LO15:
4684 case R_NDS32_GOTOFF_LO19:
4685 BFD_ASSERT (sgot != NULL);
4686
4687 relocation -= elf_gp (output_bfd);
4688 break;
4689
4690 case R_NDS32_9_PLTREL:
4691 case R_NDS32_25_PLTREL:
4692 /* Relocation is to the entry for this symbol in the
4693 procedure linkage table. */
4694
4695 /* The native assembler will generate a 25_PLTREL reloc
4696 for a local symbol if you assemble a call from one
4697 section to another when using -K pic. */
4698 if (h == NULL)
4699 break;
4700
4701 if (h->forced_local)
4702 break;
4703
4704 /* We didn't make a PLT entry for this symbol. This
4705 happens when statically linking PIC code, or when
4706 using -Bsymbolic. */
4707 if (h->plt.offset == (bfd_vma) - 1)
4708 break;
4709
4710 relocation = (splt->output_section->vma
4711 + splt->output_offset + h->plt.offset);
4712 break;
4713
4714 case R_NDS32_PLT_GOTREL_HI20:
4715 case R_NDS32_PLT_GOTREL_LO12:
4716 case R_NDS32_PLT_GOTREL_LO15:
4717 case R_NDS32_PLT_GOTREL_LO19:
4718 case R_NDS32_PLT_GOTREL_LO20:
4719 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4720 {
4721 /* We didn't make a PLT entry for this symbol. This
4722 happens when statically linking PIC code, or when
4723 using -Bsymbolic. */
4724 relocation -= elf_gp (output_bfd);
4725 break;
4726 }
4727
4728 relocation = (splt->output_section->vma
4729 + splt->output_offset + h->plt.offset);
4730
4731 relocation -= elf_gp (output_bfd);
4732 break;
4733
4734 case R_NDS32_PLTREL_HI20:
4735 case R_NDS32_PLTREL_LO12:
4736
4737 /* Relocation is to the entry for this symbol in the
4738 procedure linkage table. */
4739
4740 /* The native assembler will generate a 25_PLTREL reloc
4741 for a local symbol if you assemble a call from one
4742 section to another when using -K pic. */
4743 if (h == NULL)
4744 break;
4745
4746 if (h->forced_local)
4747 break;
4748
4749 if (h->plt.offset == (bfd_vma) - 1)
4750 /* We didn't make a PLT entry for this symbol. This
4751 happens when statically linking PIC code, or when
4752 using -Bsymbolic. */
4753 break;
4754
4755 if (splt == NULL)
4756 break;
4757
4758 relocation = (splt->output_section->vma
4759 + splt->output_offset
4760 + h->plt.offset + 4)
4761 - (input_section->output_section->vma
4762 + input_section->output_offset
4763 + rel->r_offset);
4764
4765 break;
4766
4767 case R_NDS32_GOTPC20:
4768 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4769 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4770 relocation = elf_gp (output_bfd);
4771 break;
4772
4773 case R_NDS32_GOTPC_HI20:
4774 case R_NDS32_GOTPC_LO12:
4775 {
4776 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4777 bl .+4
4778 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4779 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4780 or
4781 bl .+4
4782 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4783 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4784 */
4785 relocation = elf_gp (output_bfd);
4786 relocation -= (input_section->output_section->vma
4787 + input_section->output_offset + rel->r_offset);
4788 break;
4789 }
4790
4791 case R_NDS32_GOT20:
4792 /* Fall through. */
4793 case R_NDS32_GOT_HI20:
4794 case R_NDS32_GOT_LO12:
4795 case R_NDS32_GOT_LO15:
4796 case R_NDS32_GOT_LO19:
4797 /* Relocation is to the entry for this symbol in the global
4798 offset table. */
4799 BFD_ASSERT (sgot != NULL);
4800
4801 if (h != NULL)
4802 {
4803 bfd_boolean dyn;
4804 bfd_vma off;
4805
4806 off = h->got.offset;
4807 BFD_ASSERT (off != (bfd_vma) - 1);
4808 dyn = htab->root.dynamic_sections_created;
0e1862bb
L
4809 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4810 bfd_link_pic (info),
4811 h)
4812 || (bfd_link_pic (info)
35c08157
KLC
4813 && (info->symbolic
4814 || h->dynindx == -1
4815 || h->forced_local) && h->def_regular))
4816 {
4817 /* This is actually a static link, or it is a
4818 -Bsymbolic link and the symbol is defined
4819 locally, or the symbol was forced to be local
4820 because of a version file. We must initialize
4821 this entry in the global offset table. Since the
4822 offset must always be a multiple of 4, we use the
4823 least significant bit to record whether we have
4824 initialized it already.
4825
4826 When doing a dynamic link, we create a .rela.got
4827 relocation entry to initialize the value. This
4828 is done in the finish_dynamic_symbol routine. */
4829 if ((off & 1) != 0)
4830 off &= ~1;
4831 else
4832 {
4833 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4834 h->got.offset |= 1;
4835 }
4836 }
4837 relocation = sgot->output_section->vma + sgot->output_offset + off
4838 - elf_gp (output_bfd);
4839 }
4840 else
4841 {
4842 bfd_vma off;
4843 bfd_byte *loc;
4844
4845 BFD_ASSERT (local_got_offsets != NULL
4846 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4847
4848 off = local_got_offsets[r_symndx];
4849
4850 /* The offset must always be a multiple of 4. We use
4851 the least significant bit to record whether we have
4852 already processed this entry. */
4853 if ((off & 1) != 0)
4854 off &= ~1;
4855 else
4856 {
4857 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4858
0e1862bb 4859 if (bfd_link_pic (info))
35c08157
KLC
4860 {
4861 asection *srelgot;
4862 Elf_Internal_Rela outrel;
4863
4864 /* We need to generate a R_NDS32_RELATIVE reloc
4865 for the dynamic linker. */
4866 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
4867 BFD_ASSERT (srelgot != NULL);
4868
4869 outrel.r_offset = (elf_gp (output_bfd)
4870 + sgot->output_offset + off);
4871 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4872 outrel.r_addend = relocation;
4873 loc = srelgot->contents;
4874 loc +=
4875 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4876 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4877 ++srelgot->reloc_count;
4878 }
4879 local_got_offsets[r_symndx] |= 1;
4880 }
4881 relocation = sgot->output_section->vma + sgot->output_offset + off
4882 - elf_gp (output_bfd);
4883 }
4884
4885 break;
4886
4887 case R_NDS32_16_RELA:
4888 case R_NDS32_20_RELA:
4889 case R_NDS32_5_RELA:
4890 case R_NDS32_32_RELA:
4891 case R_NDS32_9_PCREL_RELA:
4892 case R_NDS32_WORD_9_PCREL_RELA:
4893 case R_NDS32_10_UPCREL_RELA:
4894 case R_NDS32_15_PCREL_RELA:
4895 case R_NDS32_17_PCREL_RELA:
4896 case R_NDS32_25_PCREL_RELA:
4897 case R_NDS32_HI20_RELA:
4898 case R_NDS32_LO12S3_RELA:
4899 case R_NDS32_LO12S2_RELA:
4900 case R_NDS32_LO12S2_DP_RELA:
4901 case R_NDS32_LO12S2_SP_RELA:
4902 case R_NDS32_LO12S1_RELA:
4903 case R_NDS32_LO12S0_RELA:
4904 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4905 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC
4906 && (input_section->flags & SEC_ALLOC) != 0
4907 && (eliminate_gc_relocs == 0
4908 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4909 && ((r_type != R_NDS32_9_PCREL_RELA
4910 && r_type != R_NDS32_WORD_9_PCREL_RELA
4911 && r_type != R_NDS32_10_UPCREL_RELA
4912 && r_type != R_NDS32_15_PCREL_RELA
4913 && r_type != R_NDS32_17_PCREL_RELA
4914 && r_type != R_NDS32_25_PCREL_RELA
4915 && !(r_type == R_NDS32_32_RELA
4916 && strcmp (input_section->name, ".eh_frame") == 0))
4917 || (h != NULL && h->dynindx != -1
4918 && (!info->symbolic || !h->def_regular))))
4919 {
4920 Elf_Internal_Rela outrel;
4921 bfd_boolean skip, relocate;
4922 bfd_byte *loc;
4923
4924 /* When generating a shared object, these relocations
4925 are copied into the output file to be resolved at run
4926 time. */
4927
4928 if (sreloc == NULL)
4929 {
4930 const char *name;
4931
4932 name = bfd_elf_string_from_elf_section
4933 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4934 elf_section_data (input_section)->rela.hdr->sh_name);
4935 if (name == NULL)
4936 return FALSE;
4937
4938 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4939 && strcmp (bfd_get_section_name (input_bfd,
4940 input_section),
4941 name + 5) == 0);
4942
4943 sreloc = bfd_get_section_by_name (dynobj, name);
4944 BFD_ASSERT (sreloc != NULL);
4945 }
4946
4947 skip = FALSE;
4948 relocate = FALSE;
4949
4950 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4951 info,
4952 input_section,
4953 rel->r_offset);
4954 if (outrel.r_offset == (bfd_vma) - 1)
4955 skip = TRUE;
4956 else if (outrel.r_offset == (bfd_vma) - 2)
4957 skip = TRUE, relocate = TRUE;
4958 outrel.r_offset += (input_section->output_section->vma
4959 + input_section->output_offset);
4960
4961 if (skip)
4962 memset (&outrel, 0, sizeof outrel);
4963 else if (r_type == R_NDS32_17_PCREL_RELA
4964 || r_type == R_NDS32_15_PCREL_RELA
4965 || r_type == R_NDS32_25_PCREL_RELA)
4966 {
4967 BFD_ASSERT (h != NULL && h->dynindx != -1);
4968 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4969 outrel.r_addend = rel->r_addend;
4970 }
4971 else
4972 {
4973 /* h->dynindx may be -1 if this symbol was marked to
4974 become local. */
4975 if (h == NULL
4976 || ((info->symbolic || h->dynindx == -1)
4977 && h->def_regular))
4978 {
4979 relocate = TRUE;
4980 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4981 outrel.r_addend = relocation + rel->r_addend;
4982 }
4983 else
4984 {
4985 BFD_ASSERT (h->dynindx != -1);
4986 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4987 outrel.r_addend = rel->r_addend;
4988 }
4989 }
4990
4991 loc = sreloc->contents;
4992 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4993 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4994 ++sreloc->reloc_count;
4995
4996 /* If this reloc is against an external symbol, we do
4997 not want to fiddle with the addend. Otherwise, we
4998 need to include the symbol value so that it becomes
4999 an addend for the dynamic reloc. */
5000 if (!relocate)
5001 continue;
5002 }
5003 break;
5004
5005 case R_NDS32_25_ABS_RELA:
0e1862bb 5006 if (bfd_link_pic (info))
35c08157
KLC
5007 {
5008 (*_bfd_error_handler)
1c8f6a4d
KLC
5009 (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared "
5010 "mode."), bfd_get_filename (input_bfd));
35c08157
KLC
5011 return FALSE;
5012 }
5013 break;
5014
5015 case R_NDS32_9_PCREL:
5016 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5017 contents, offset,
5018 sec, relocation, addend);
5019 goto check_reloc;
5020
5021 case R_NDS32_HI20:
5022 {
5023 Elf_Internal_Rela *lorel;
5024
5025 /* We allow an arbitrary number of HI20 relocs before the
5026 LO12 reloc. This permits gcc to emit the HI and LO relocs
5027 itself. */
5028 for (lorel = rel + 1;
5029 (lorel < relend
5030 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5031 continue;
5032 if (lorel < relend
5033 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5034 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5035 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5036 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
5037 {
5038 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5039 contents, relocation + addend);
5040 r = bfd_reloc_ok;
5041 }
5042 else
5043 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC
5044 contents, offset, relocation,
5045 addend);
35c08157
KLC
5046 }
5047
5048 goto check_reloc;
5049
5050 case R_NDS32_GOT17S2_RELA:
5051 case R_NDS32_GOT15S2_RELA:
5052 {
5053 bfd_vma off;
5054
5055 BFD_ASSERT (sgot != NULL);
5056
5057 if (h != NULL)
5058 {
5059 bfd_boolean dyn;
5060
5061 off = h->got.offset;
5062 BFD_ASSERT (off != (bfd_vma) - 1);
5063
5064 dyn = htab->root.dynamic_sections_created;
5065 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L
5066 (dyn, bfd_link_pic (info), h)
5067 || (bfd_link_pic (info)
5068 && (info->symbolic
5069 || h->dynindx == -1
5070 || h->forced_local)
5071 && h->def_regular))
35c08157
KLC
5072 {
5073 /* This is actually a static link, or it is a
5074 -Bsymbolic link and the symbol is defined
5075 locally, or the symbol was forced to be local
5076 because of a version file. We must initialize
5077 this entry in the global offset table. Since the
5078 offset must always be a multiple of 4, we use the
5079 least significant bit to record whether we have
5080 initialized it already.
5081
5082 When doing a dynamic link, we create a .rela.got
5083 relocation entry to initialize the value. This
5084 is done in the finish_dynamic_symbol routine. */
5085 if ((off & 1) != 0)
5086 off &= ~1;
5087 else
5088 {
5089 bfd_put_32 (output_bfd, relocation,
5090 sgot->contents + off);
5091 h->got.offset |= 1;
5092 }
5093 }
5094 }
5095 else
5096 {
5097 bfd_byte *loc;
5098
5099 BFD_ASSERT (local_got_offsets != NULL
5100 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5101
5102 off = local_got_offsets[r_symndx];
5103
5104 /* The offset must always be a multiple of 4. We use
5105 the least significant bit to record whether we have
5106 already processed this entry. */
5107 if ((off & 1) != 0)
5108 off &= ~1;
5109 else
5110 {
5111 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5112
0e1862bb 5113 if (bfd_link_pic (info))
35c08157
KLC
5114 {
5115 asection *srelgot;
5116 Elf_Internal_Rela outrel;
5117
5118 /* We need to generate a R_NDS32_RELATIVE reloc
5119 for the dynamic linker. */
5120 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5121 BFD_ASSERT (srelgot != NULL);
5122
5123 outrel.r_offset = (elf_gp (output_bfd)
5124 + sgot->output_offset + off);
5125 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5126 outrel.r_addend = relocation;
5127 loc = srelgot->contents;
5128 loc +=
5129 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5130 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5131 ++srelgot->reloc_count;
5132 }
5133 local_got_offsets[r_symndx] |= 1;
5134 }
5135 }
5136 relocation = sgot->output_section->vma + sgot->output_offset + off
5137 - elf_gp (output_bfd);
5138 }
5139 if (relocation & align)
5140 {
5141 /* Incorrect alignment. */
5142 (*_bfd_error_handler)
5143 (_("%B: warning: unaligned access to GOT entry."), input_bfd);
5144 ret = FALSE;
5145 r = bfd_reloc_dangerous;
5146 goto check_reloc;
5147 }
5148 break;
5149
5150 case R_NDS32_SDA16S3_RELA:
5151 case R_NDS32_SDA15S3_RELA:
5152 case R_NDS32_SDA15S3:
5153 align = 0x7;
5154 goto handle_sda;
5155
5156 case R_NDS32_SDA17S2_RELA:
5157 case R_NDS32_SDA15S2_RELA:
5158 case R_NDS32_SDA12S2_SP_RELA:
5159 case R_NDS32_SDA12S2_DP_RELA:
5160 case R_NDS32_SDA15S2:
5161 case R_NDS32_SDA_FP7U2_RELA:
5162 align = 0x3;
5163 goto handle_sda;
5164
5165 case R_NDS32_SDA18S1_RELA:
5166 case R_NDS32_SDA15S1_RELA:
5167 case R_NDS32_SDA15S1:
5168 align = 0x1;
5169 goto handle_sda;
5170
5171 case R_NDS32_SDA19S0_RELA:
5172 case R_NDS32_SDA15S0_RELA:
5173 case R_NDS32_SDA15S0:
5174 {
5175 align = 0x0;
5176handle_sda:
5177 BFD_ASSERT (sec != NULL);
5178
5179 /* If the symbol is in the abs section, the out_bfd will be null.
5180 This happens when the relocation has a symbol@GOTOFF. */
5181 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5182 if (r != bfd_reloc_ok)
5183 {
5184 (*_bfd_error_handler)
5185 (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
5186 ret = FALSE;
5187 goto check_reloc;
5188 }
5189
5190 /* At this point `relocation' contains the object's
5191 address. */
5192 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5193 {
5194 relocation -= fpbase_addr;
5195 }
5196 else
5197 relocation -= gp;
5198 /* Now it contains the offset from _SDA_BASE_. */
5199
5200 /* Make sure alignment is correct. */
5201
5202 if (relocation & align)
5203 {
5204 /* Incorrect alignment. */
5205 (*_bfd_error_handler)
5206 (_("%B(%A): warning: unaligned small data access of type %d."),
5207 input_bfd, input_section, r_type);
5208 ret = FALSE;
5209 goto check_reloc;
5210 }
5211 }
5212
5213 break;
5214 case R_NDS32_17IFC_PCREL_RELA:
5215 case R_NDS32_10IFCU_PCREL_RELA:
5216 /* do nothing */
5217 break;
5218
1c8f6a4d
KLC
5219 case R_NDS32_TLS_LE_HI20:
5220 case R_NDS32_TLS_LE_LO12:
5221 case R_NDS32_TLS_LE_20:
5222 case R_NDS32_TLS_LE_15S0:
5223 case R_NDS32_TLS_LE_15S1:
5224 case R_NDS32_TLS_LE_15S2:
5225 if (elf_hash_table (info)->tls_sec != NULL)
5226 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5227 break;
5228 case R_NDS32_TLS_IE_HI20:
5229 case R_NDS32_TLS_IE_LO12S2:
5230 {
5231 /* Relocation is to the entry for this symbol in the global
5232 offset table. */
5233 unsigned int tls_type;
5234 asection *srelgot;
5235 Elf_Internal_Rela outrel;
5236 bfd_vma off;
5237 bfd_byte *loc;
5238 int indx = 0;
5239
5240 BFD_ASSERT (sgot != NULL);
5241 if (h != NULL)
5242 {
5243 bfd_boolean dyn;
5244
5245 off = h->got.offset;
5246 BFD_ASSERT (off != (bfd_vma) - 1);
5247 dyn = htab->root.dynamic_sections_created;
5248 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L
5249 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5250 && (!bfd_link_pic (info)
1c8f6a4d
KLC
5251 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5252 indx = h->dynindx;
5253 }
5254 else
5255 {
5256 /* Never happen currently. */
5257 BFD_ASSERT (local_got_offsets != NULL
5258 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5259
5260 off = local_got_offsets[r_symndx];
5261
5262 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5263 }
5264 relocation = sgot->output_section->vma + sgot->output_offset + off;
5265
5266 if (r_type == R_NDS32_TLS_IE_LO12S2)
5267 break;
5268
5269 /* The offset must always be a multiple of 4. We use
5270 the least significant bit to record whether we have
5271 already processed this entry. */
5272 if ((off & 1) != 0)
5273 off &= ~1;
5274 else
5275 {
5276 bfd_boolean need_relocs = FALSE;
5277 srelgot = htab->srelgot;
0e1862bb 5278 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC
5279 && (h == NULL
5280 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5281 || h->root.type != bfd_link_hash_undefweak))
5282 {
5283 need_relocs = TRUE;
5284 BFD_ASSERT (srelgot != NULL);
5285 }
5286 if (tls_type & GOT_TLS_IE)
5287 {
5288 if (need_relocs)
5289 {
5290 if (h->dynindx == 0)
5291 outrel.r_addend = relocation - dtpoff_base (info);
5292 else
5293 outrel.r_addend = 0;
5294 outrel.r_offset = (sgot->output_section->vma
5295 + sgot->output_offset
5296 + off);
5297 outrel.r_info =
5298 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5299
5300 loc = srelgot->contents;
5301 loc +=
5302 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5303 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5304 ++srelgot->reloc_count;
5305 }
5306 else
5307 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5308 sgot->contents + off);
5309 }
5310 }
5311 }
5312 break;
5313
35c08157
KLC
5314 /* DON'T fall through. */
5315
5316 default:
5317 /* OLD_NDS32_RELOC. */
5318
5319 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5320 contents, offset, relocation, addend);
5321 goto check_reloc;
5322 }
5323
5324 switch ((int) r_type)
5325 {
5326 case R_NDS32_20_RELA:
5327 case R_NDS32_5_RELA:
5328 case R_NDS32_9_PCREL_RELA:
5329 case R_NDS32_WORD_9_PCREL_RELA:
5330 case R_NDS32_10_UPCREL_RELA:
5331 case R_NDS32_15_PCREL_RELA:
5332 case R_NDS32_17_PCREL_RELA:
5333 case R_NDS32_25_PCREL_RELA:
5334 case R_NDS32_25_ABS_RELA:
5335 case R_NDS32_HI20_RELA:
5336 case R_NDS32_LO12S3_RELA:
5337 case R_NDS32_LO12S2_RELA:
5338 case R_NDS32_LO12S2_DP_RELA:
5339 case R_NDS32_LO12S2_SP_RELA:
5340 case R_NDS32_LO12S1_RELA:
5341 case R_NDS32_LO12S0_RELA:
5342 case R_NDS32_LO12S0_ORI_RELA:
5343 case R_NDS32_SDA16S3_RELA:
5344 case R_NDS32_SDA17S2_RELA:
5345 case R_NDS32_SDA18S1_RELA:
5346 case R_NDS32_SDA19S0_RELA:
5347 case R_NDS32_SDA15S3_RELA:
5348 case R_NDS32_SDA15S2_RELA:
5349 case R_NDS32_SDA12S2_DP_RELA:
5350 case R_NDS32_SDA12S2_SP_RELA:
5351 case R_NDS32_SDA15S1_RELA:
5352 case R_NDS32_SDA15S0_RELA:
5353 case R_NDS32_SDA_FP7U2_RELA:
5354 case R_NDS32_9_PLTREL:
5355 case R_NDS32_25_PLTREL:
5356 case R_NDS32_GOT20:
5357 case R_NDS32_GOT_HI20:
5358 case R_NDS32_GOT_LO12:
5359 case R_NDS32_GOT_LO15:
5360 case R_NDS32_GOT_LO19:
5361 case R_NDS32_GOT15S2_RELA:
5362 case R_NDS32_GOT17S2_RELA:
5363 case R_NDS32_GOTPC20:
5364 case R_NDS32_GOTPC_HI20:
5365 case R_NDS32_GOTPC_LO12:
5366 case R_NDS32_GOTOFF:
5367 case R_NDS32_GOTOFF_HI20:
5368 case R_NDS32_GOTOFF_LO12:
5369 case R_NDS32_GOTOFF_LO15:
5370 case R_NDS32_GOTOFF_LO19:
5371 case R_NDS32_PLTREL_HI20:
5372 case R_NDS32_PLTREL_LO12:
5373 case R_NDS32_PLT_GOTREL_HI20:
5374 case R_NDS32_PLT_GOTREL_LO12:
5375 case R_NDS32_PLT_GOTREL_LO15:
5376 case R_NDS32_PLT_GOTREL_LO19:
5377 case R_NDS32_PLT_GOTREL_LO20:
5378 case R_NDS32_17IFC_PCREL_RELA:
5379 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC
5380 case R_NDS32_TLS_LE_HI20:
5381 case R_NDS32_TLS_LE_LO12:
5382 case R_NDS32_TLS_IE_HI20:
5383 case R_NDS32_TLS_IE_LO12S2:
5384 case R_NDS32_TLS_LE_20:
5385 case R_NDS32_TLS_LE_15S0:
5386 case R_NDS32_TLS_LE_15S1:
5387 case R_NDS32_TLS_LE_15S2:
35c08157 5388 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5389 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC
5390 r = nds32_elf_final_link_relocate (howto, input_bfd,
5391 input_section, contents,
5392 rel->r_offset, relocation,
5393 rel->r_addend);
5394 break;
5395
5396 default:
5397 /* All other relocs can use default handler. */
5398 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5399 contents, rel->r_offset,
5400 relocation, rel->r_addend);
5401 break;
5402 }
5403
5404check_reloc:
5405
5406 if (r != bfd_reloc_ok)
5407 {
5408 /* FIXME: This should be generic enough to go in a utility. */
5409 const char *name;
5410
5411 if (h != NULL)
5412 name = h->root.root.string;
5413 else
5414 {
5415 name = bfd_elf_string_from_elf_section
5416 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5417 if (name == NULL || *name == '\0')
5418 name = bfd_section_name (input_bfd, sec);
5419 }
5420
5421 if (errmsg != NULL)
5422 goto common_error;
5423
5424 switch (r)
5425 {
5426 case bfd_reloc_overflow:
5427 if (!((*info->callbacks->reloc_overflow)
5428 (info, (h ? &h->root : NULL), name, howto->name,
5429 (bfd_vma) 0, input_bfd, input_section, offset)))
5430 return FALSE;
5431 break;
5432
5433 case bfd_reloc_undefined:
5434 if (!((*info->callbacks->undefined_symbol)
5435 (info, name, input_bfd, input_section, offset, TRUE)))
5436 return FALSE;
5437 break;
5438
5439 case bfd_reloc_outofrange:
5440 errmsg = _("internal error: out of range error");
5441 goto common_error;
5442
5443 case bfd_reloc_notsupported:
5444 errmsg = _("internal error: unsupported relocation error");
5445 goto common_error;
5446
5447 case bfd_reloc_dangerous:
5448 errmsg = _("internal error: dangerous error");
5449 goto common_error;
5450
5451 default:
5452 errmsg = _("internal error: unknown error");
5453 /* Fall through. */
5454
5455common_error:
5456 if (!((*info->callbacks->warning)
5457 (info, errmsg, name, input_bfd, input_section, offset)))
5458 return FALSE;
5459 break;
5460 }
5461 }
5462 }
5463
5464 return ret;
5465}
5466
5467/* Finish up dynamic symbol handling. We set the contents of various
5468 dynamic sections here. */
5469
5470static bfd_boolean
5471nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5472 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5473{
5474 struct elf_nds32_link_hash_table *htab;
5475 bfd_byte *loc;
5476
5477 htab = nds32_elf_hash_table (info);
5478
5479 if (h->plt.offset != (bfd_vma) - 1)
5480 {
5481 asection *splt;
5482 asection *sgot;
5483 asection *srela;
5484
5485 bfd_vma plt_index;
5486 bfd_vma got_offset;
5487 bfd_vma local_plt_offset;
5488 Elf_Internal_Rela rela;
5489
5490 /* This symbol has an entry in the procedure linkage table. Set
5491 it up. */
5492
5493 BFD_ASSERT (h->dynindx != -1);
5494
5495 splt = htab->splt;
5496 sgot = htab->sgotplt;
5497 srela = htab->srelplt;
5498 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5499
5500 /* Get the index in the procedure linkage table which
5501 corresponds to this symbol. This is the index of this symbol
5502 in all the symbols for which we are making plt entries. The
5503 first entry in the procedure linkage table is reserved. */
5504 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5505
5506 /* Get the offset into the .got table of the entry that
5507 corresponds to this function. Each .got entry is 4 bytes.
5508 The first three are reserved. */
5509 got_offset = (plt_index + 3) * 4;
5510
5511 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5512 if (!bfd_link_pic (info))
35c08157
KLC
5513 {
5514 unsigned long insn;
5515
5516 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5517 + sgot->output_offset + got_offset) >> 12)
5518 & 0xfffff);
5519 bfd_putb32 (insn, splt->contents + h->plt.offset);
5520
5521 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5522 + sgot->output_offset + got_offset) & 0x0fff)
5523 >> 2);
5524 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5525
5526 insn = PLT_ENTRY_WORD2;
5527 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5528
5529 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5530 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5531
5532 insn = PLT_ENTRY_WORD4
5533 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5534 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5535 local_plt_offset = 12;
5536 }
5537 else
5538 {
5539 /* sda_base must be set at this time. */
5540 unsigned long insn;
5541 long offset;
5542
5543 /* FIXME, sda_base is 65536, it will damage opcode. */
5544 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5545 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5546 - elf_gp (output_bfd);
5547 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5548 bfd_putb32 (insn, splt->contents + h->plt.offset);
5549
5550 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5551 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5552
5553 insn = PLT_PIC_ENTRY_WORD2;
5554 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5555
5556 insn = PLT_PIC_ENTRY_WORD3;
5557 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5558
5559 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5560 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5561
5562 insn = PLT_PIC_ENTRY_WORD5
5563 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5564 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5565
5566 local_plt_offset = 16;
5567 }
5568
5569 /* Fill in the entry in the global offset table,
5570 so it will fall through to the next instruction for the first time. */
5571 bfd_put_32 (output_bfd,
5572 (splt->output_section->vma + splt->output_offset
5573 + h->plt.offset + local_plt_offset),
5574 sgot->contents + got_offset);
5575
5576 /* Fill in the entry in the .rela.plt section. */
5577 rela.r_offset = (sgot->output_section->vma
5578 + sgot->output_offset + got_offset);
5579 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5580 rela.r_addend = 0;
5581 loc = srela->contents;
5582 loc += plt_index * sizeof (Elf32_External_Rela);
5583 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5584
5585 if (!h->def_regular)
5586 {
5587 /* Mark the symbol as undefined, rather than as defined in
5588 the .plt section. Leave the value alone. */
5589 sym->st_shndx = SHN_UNDEF;
5590 if (!h->ref_regular_nonweak)
5591 sym->st_value = 0;
5592 }
5593 }
5594
5595 if (h->got.offset != (bfd_vma) - 1)
5596 {
5597 asection *sgot;
5598 asection *srela;
5599 Elf_Internal_Rela rela;
5600
5601 /* This symbol has an entry in the global offset table.
5602 Set it up. */
5603
5604 sgot = htab->sgot;
5605 srela = htab->srelgot;
5606 BFD_ASSERT (sgot != NULL && srela != NULL);
5607
5608 rela.r_offset = (sgot->output_section->vma
5609 + sgot->output_offset + (h->got.offset & ~1));
5610
5611 /* If this is a -Bsymbolic link, and the symbol is defined
5612 locally, we just want to emit a RELATIVE reloc. Likewise if
5613 the symbol was forced to be local because of a version file.
5614 The entry in the global offset table will already have been
5615 initialized in the relocate_section function. */
0e1862bb 5616 if (bfd_link_pic (info)
35c08157
KLC
5617 && (info->symbolic
5618 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5619 {
5620 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5621 rela.r_addend = (h->root.u.def.value
5622 + h->root.u.def.section->output_section->vma
5623 + h->root.u.def.section->output_offset);
5624 }
5625 else
5626 {
5627 BFD_ASSERT ((h->got.offset & 1) == 0);
5628 bfd_put_32 (output_bfd, (bfd_vma) 0,
5629 sgot->contents + h->got.offset);
5630 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5631 rela.r_addend = 0;
5632 }
5633
5634 loc = srela->contents;
5635 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5636 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5637 ++srela->reloc_count;
5638 }
5639
5640 if (h->needs_copy)
5641 {
5642 asection *s;
5643 Elf_Internal_Rela rela;
5644
5645 /* This symbols needs a copy reloc. Set it up. */
5646
5647 BFD_ASSERT (h->dynindx != -1
5648 && (h->root.type == bfd_link_hash_defined
5649 || h->root.type == bfd_link_hash_defweak));
5650
5651 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5652 BFD_ASSERT (s != NULL);
5653
5654 rela.r_offset = (h->root.u.def.value
5655 + h->root.u.def.section->output_section->vma
5656 + h->root.u.def.section->output_offset);
5657 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5658 rela.r_addend = 0;
5659 loc = s->contents;
5660 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5661 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5662 ++s->reloc_count;
5663 }
5664
5665 /* Mark some specially defined symbols as absolute. */
5666 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5667 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5668 sym->st_shndx = SHN_ABS;
5669
5670 return TRUE;
5671}
5672
5673
5674/* Finish up the dynamic sections. */
5675
5676static bfd_boolean
5677nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5678{
5679 struct elf_nds32_link_hash_table *htab;
5680 bfd *dynobj;
5681 asection *sdyn;
5682 asection *sgot;
5683
5684 htab = nds32_elf_hash_table (info);
5685 dynobj = htab->root.dynobj;
5686
5687 sgot = htab->sgotplt;
5688 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5689
5690 if (htab->root.dynamic_sections_created)
5691 {
5692 asection *splt;
5693 Elf32_External_Dyn *dyncon, *dynconend;
5694
5695 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5696
5697 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5698 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5699
5700 for (; dyncon < dynconend; dyncon++)
5701 {
5702 Elf_Internal_Dyn dyn;
5703 asection *s;
5704
5705 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5706
5707 switch (dyn.d_tag)
5708 {
5709 default:
5710 break;
5711
5712 case DT_PLTGOT:
5713 /* name = ".got"; */
5714 s = htab->sgot->output_section;
5715 goto get_vma;
5716 case DT_JMPREL:
5717 s = htab->srelplt->output_section;
5718 get_vma:
5719 BFD_ASSERT (s != NULL);
5720 dyn.d_un.d_ptr = s->vma;
5721 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5722 break;
5723
5724 case DT_PLTRELSZ:
5725 s = htab->srelplt->output_section;
5726 BFD_ASSERT (s != NULL);
5727 dyn.d_un.d_val = s->size;
5728 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5729 break;
5730
5731 case DT_RELASZ:
5732 /* My reading of the SVR4 ABI indicates that the
5733 procedure linkage table relocs (DT_JMPREL) should be
5734 included in the overall relocs (DT_RELA). This is
5735 what Solaris does. However, UnixWare can not handle
5736 that case. Therefore, we override the DT_RELASZ entry
5737 here to make it not include the JMPREL relocs. Since
5738 the linker script arranges for .rela.plt to follow all
5739 other relocation sections, we don't have to worry
5740 about changing the DT_RELA entry. */
5741 if (htab->srelplt != NULL)
5742 {
5743 s = htab->srelplt->output_section;
5744 dyn.d_un.d_val -= s->size;
5745 }
5746 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5747 break;
5748 }
5749 }
5750
5751 /* Fill in the first entry in the procedure linkage table. */
5752 splt = htab->splt;
5753 if (splt && splt->size > 0)
5754 {
0e1862bb 5755 if (bfd_link_pic (info))
35c08157
KLC
5756 {
5757 unsigned long insn;
5758 long offset;
5759
5760 /* FIXME, sda_base is 65536, it will damage opcode. */
5761 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5762 offset = sgot->output_section->vma + sgot->output_offset + 4
5763 - elf_gp (output_bfd);
5764 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5765 bfd_putb32 (insn, splt->contents);
5766
5767 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5768 /* here has a typo? */
5769 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5770 bfd_putb32 (insn, splt->contents + 4);
5771
5772 insn = PLT0_PIC_ENTRY_WORD2;
5773 bfd_putb32 (insn, splt->contents + 8);
5774
5775 insn = PLT0_PIC_ENTRY_WORD3;
5776 bfd_putb32 (insn, splt->contents + 12);
5777
5778 insn = PLT0_PIC_ENTRY_WORD4;
5779 bfd_putb32 (insn, splt->contents + 16);
5780
5781 insn = PLT0_PIC_ENTRY_WORD5;
5782 bfd_putb32 (insn, splt->contents + 20);
5783 }
5784 else
5785 {
5786 unsigned long insn;
5787 unsigned long addr;
5788
5789 /* addr = .got + 4 */
5790 addr = sgot->output_section->vma + sgot->output_offset + 4;
5791 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5792 bfd_putb32 (insn, splt->contents);
5793
5794 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5795 bfd_putb32 (insn, splt->contents + 4);
5796
5797 insn = PLT0_ENTRY_WORD2;
5798 bfd_putb32 (insn, splt->contents + 8);
5799
5800 insn = PLT0_ENTRY_WORD3;
5801 bfd_putb32 (insn, splt->contents + 12);
5802
5803 insn = PLT0_ENTRY_WORD4;
5804 bfd_putb32 (insn, splt->contents + 16);
5805 }
5806
5807 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5808 PLT_ENTRY_SIZE;
5809 }
5810 }
5811
5812 /* Fill in the first three entries in the global offset table. */
5813 if (sgot && sgot->size > 0)
5814 {
5815 if (sdyn == NULL)
5816 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5817 else
5818 bfd_put_32 (output_bfd,
5819 sdyn->output_section->vma + sdyn->output_offset,
5820 sgot->contents);
5821 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5822 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5823
5824 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5825 }
5826
5827 return TRUE;
5828}
5829\f
5830
5831/* Set the right machine number. */
5832
5833static bfd_boolean
5834nds32_elf_object_p (bfd *abfd)
5835{
5836 static unsigned int cur_arch = 0;
5837
5838 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5839 {
5840 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5841 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5842 }
5843
5844 switch (cur_arch)
5845 {
5846 default:
5847 case E_N1_ARCH:
5848 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5849 break;
5850 case E_N1H_ARCH:
5851 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5852 break;
5853 case E_NDS_ARCH_STAR_V2_0:
5854 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5855 break;
5856 case E_NDS_ARCH_STAR_V3_0:
5857 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5858 break;
5859 case E_NDS_ARCH_STAR_V3_M:
5860 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5861 break;
5862 }
5863
5864 return TRUE;
5865}
5866
5867/* Store the machine number in the flags field. */
5868
5869static void
5870nds32_elf_final_write_processing (bfd *abfd,
5871 bfd_boolean linker ATTRIBUTE_UNUSED)
5872{
5873 unsigned long val;
5874 static unsigned int cur_mach = 0;
5875
5876 if (bfd_mach_n1 != bfd_get_mach (abfd))
5877 {
5878 cur_mach = bfd_get_mach (abfd);
5879 }
5880
5881 switch (cur_mach)
5882 {
5883 case bfd_mach_n1:
5884 /* Only happen when object is empty, since the case is abandon. */
5885 val = E_N1_ARCH;
5886 val |= E_NDS_ABI_AABI;
5887 val |= E_NDS32_ELF_VER_1_4;
5888 break;
5889 case bfd_mach_n1h:
5890 val = E_N1H_ARCH;
5891 break;
5892 case bfd_mach_n1h_v2:
5893 val = E_NDS_ARCH_STAR_V2_0;
5894 break;
5895 case bfd_mach_n1h_v3:
5896 val = E_NDS_ARCH_STAR_V3_0;
5897 break;
5898 case bfd_mach_n1h_v3m:
5899 val = E_NDS_ARCH_STAR_V3_M;
5900 break;
5901 default:
5902 val = 0;
5903 break;
5904 }
5905
5906 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5907 elf_elfheader (abfd)->e_flags |= val;
5908}
5909
5910/* Function to keep NDS32 specific file flags. */
5911
5912static bfd_boolean
5913nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5914{
5915 BFD_ASSERT (!elf_flags_init (abfd)
5916 || elf_elfheader (abfd)->e_flags == flags);
5917
5918 elf_elfheader (abfd)->e_flags = flags;
5919 elf_flags_init (abfd) = TRUE;
5920 return TRUE;
5921}
5922
5923static unsigned int
5924convert_e_flags (unsigned int e_flags, unsigned int arch)
5925{
5926 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5927 {
5928 /* From 0.9 to 1.0. */
5929 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5930
5931 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5932 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5933 if (arch == E_NDS_ARCH_STAR_V1_0)
5934 {
5935 /* Done. */
5936 return e_flags;
5937 }
5938 }
5939
5940 /* From 1.0 to 2.0. */
5941 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5942
5943 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5944 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5945
5946 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5947 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5948 return e_flags;
5949}
5950
5951static bfd_boolean
5952nds32_check_vec_size (bfd *ibfd)
5953{
5954 static unsigned int nds32_vec_size = 0;
5955
5956 asection *sec_t = NULL;
5957 bfd_byte *contents = NULL;
5958
5959 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5960
5961 if (sec_t && sec_t->size >= 4)
5962 {
5963 /* Get vec_size in file. */
5964 unsigned int flag_t;
5965
0c4bd9d9 5966 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC
5967 flag_t = bfd_get_32 (ibfd, contents);
5968
5969 /* The value could only be 4 or 16. */
5970
5971 if (!nds32_vec_size)
5972 /* Set if not set yet. */
5973 nds32_vec_size = (flag_t & 0x3);
5974 else if (nds32_vec_size != (flag_t & 0x3))
5975 {
5976 (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
5977 " with previous modules, previous %u-byte, current %u-byte"),
5978 ibfd,
5979 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5980 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
5981 return FALSE;
5982 }
5983 else
5984 /* Only keep the first vec_size section. */
5985 sec_t->flags |= SEC_EXCLUDE;
5986 }
5987
5988 return TRUE;
5989}
5990
5991/* Merge backend specific data from an object file to the output
5992 object file when linking. */
5993
5994static bfd_boolean
5995nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
5996{
5997 flagword out_flags;
5998 flagword in_flags;
5999 flagword out_16regs;
6000 flagword in_no_mac;
6001 flagword out_no_mac;
6002 flagword in_16regs;
6003 flagword out_version;
6004 flagword in_version;
6005 flagword out_fpu_config;
6006 flagword in_fpu_config;
6007
6008 /* TODO: Revise to use object-attributes instead. */
6009 if (!nds32_check_vec_size (ibfd))
6010 return FALSE;
6011
6012 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6013 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
6014 return TRUE;
6015
6016 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6017 {
6018 (*_bfd_error_handler)
6019 (_("%B: warning: Endian mismatch with previous modules."), ibfd);
6020
6021 bfd_set_error (bfd_error_bad_value);
6022 return FALSE;
6023 }
6024
6025 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6026 if (in_version == E_NDS32_ELF_VER_1_2)
6027 {
6028 (*_bfd_error_handler)
6029 (_("%B: warning: Older version of object file encountered, "
6030 "Please recompile with current tool chain."), ibfd);
6031 }
6032
6033 /* We may need to merge V1 and V2 arch object files to V2. */
6034 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6035 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6036 {
6037 /* Need to convert version. */
6038 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6039 == E_NDS_ARCH_STAR_RESERVED)
6040 {
6041 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6042 }
6043 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
6044 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6045 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6046 {
6047 elf_elfheader (obfd)->e_flags =
6048 convert_e_flags (elf_elfheader (obfd)->e_flags,
6049 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6050 }
6051 else
6052 {
6053 elf_elfheader (ibfd)->e_flags =
6054 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6055 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6056 }
6057 }
6058
6059 /* Extract some flags. */
6060 in_flags = elf_elfheader (ibfd)->e_flags
6061 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6062 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6063
6064 /* The following flags need special treatment. */
6065 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6066 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6067 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6068
6069 /* Extract some flags. */
6070 out_flags = elf_elfheader (obfd)->e_flags
6071 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6072 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6073
6074 /* The following flags need special treatment. */
6075 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6076 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6077 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6078 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6079 if (!elf_flags_init (obfd))
6080 {
6081 /* If the input is the default architecture then do not
6082 bother setting the flags for the output architecture,
6083 instead allow future merges to do this. If no future
6084 merges ever set these flags then they will retain their
6085 unitialised values, which surprise surprise, correspond
6086 to the default values. */
6087 if (bfd_get_arch_info (ibfd)->the_default)
6088 return TRUE;
6089
6090 elf_flags_init (obfd) = TRUE;
6091 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6092
6093 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6094 && bfd_get_arch_info (obfd)->the_default)
6095 {
6096 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6097 bfd_get_mach (ibfd));
6098 }
6099
6100 return TRUE;
6101 }
6102
6103 /* Check flag compatibility. */
6104 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
6105 {
6106 (*_bfd_error_handler)
6107 (_("%B: error: ABI mismatch with previous modules."), ibfd);
6108
6109 bfd_set_error (bfd_error_bad_value);
6110 return FALSE;
6111 }
6112
6113 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6114 {
6115 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6116 {
6117 (*_bfd_error_handler)
6118 (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
6119
6120 bfd_set_error (bfd_error_bad_value);
6121 return FALSE;
6122 }
6123 }
6124
6125 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6126 and perf ext1 and DIV are mergerd to perf ext1. */
6127 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6128 {
6129 elf_elfheader (obfd)->e_flags =
6130 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6131 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6132 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6133 ? E_NDS32_HAS_EXT_INST : 0)
6134 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6135 ? E_NDS32_HAS_EXT_INST : 0)
6136 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6137 | ((in_version > out_version) ? out_version : in_version);
6138 }
6139 else
6140 {
6141 if (in_version != out_version)
6142 (*_bfd_error_handler) (_("%B: warning: Incompatible elf-versions %s and %s."),
6143 ibfd, nds32_elfver_strtab[out_version],
6144 nds32_elfver_strtab[in_version]);
6145
6146 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6147 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6148 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6149 | (in_version > out_version ? out_version : in_version);
6150 }
6151
6152 return TRUE;
6153}
6154
6155/* Display the flags field. */
6156
6157static bfd_boolean
6158nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6159{
6160 FILE *file = (FILE *) ptr;
6161
6162 BFD_ASSERT (abfd != NULL && ptr != NULL);
6163
6164 _bfd_elf_print_private_bfd_data (abfd, ptr);
6165
6166 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6167
6168 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6169 {
6170 default:
6171 case E_N1_ARCH:
6172 fprintf (file, _(": n1 instructions"));
6173 break;
6174 case E_N1H_ARCH:
6175 fprintf (file, _(": n1h instructions"));
6176 break;
6177 }
6178
6179 fputc ('\n', file);
6180
6181 return TRUE;
6182}
6183
6184static unsigned int
6185nds32_elf_action_discarded (asection *sec)
6186{
6187
6188 if (strncmp
6189 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6190 return 0;
6191
6192 return _bfd_elf_default_action_discarded (sec);
6193}
6194
6195static asection *
6196nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6197 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6198 Elf_Internal_Sym *sym)
6199{
6200 if (h != NULL)
6201 switch (ELF32_R_TYPE (rel->r_info))
6202 {
6203 case R_NDS32_GNU_VTINHERIT:
6204 case R_NDS32_GNU_VTENTRY:
6205 case R_NDS32_RELA_GNU_VTINHERIT:
6206 case R_NDS32_RELA_GNU_VTENTRY:
6207 return NULL;
6208 }
6209
6210 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6211}
6212
6213static bfd_boolean
6214nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
6215 const Elf_Internal_Rela *relocs)
6216{
6217 /* Update the got entry reference counts for the section being removed. */
6218 Elf_Internal_Shdr *symtab_hdr;
6219 struct elf_link_hash_entry **sym_hashes;
6220 bfd_signed_vma *local_got_refcounts;
6221 const Elf_Internal_Rela *rel, *relend;
6222
6223 elf_section_data (sec)->local_dynrel = NULL;
6224
6225 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6226 sym_hashes = elf_sym_hashes (abfd);
6227 local_got_refcounts = elf_local_got_refcounts (abfd);
6228
6229 relend = relocs + sec->reloc_count;
6230 for (rel = relocs; rel < relend; rel++)
6231 {
6232 unsigned long r_symndx;
6233 struct elf_link_hash_entry *h = NULL;
6234
6235 r_symndx = ELF32_R_SYM (rel->r_info);
6236 if (r_symndx >= symtab_hdr->sh_info)
6237 {
6238 /* External symbol. */
6239 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6240 while (h->root.type == bfd_link_hash_indirect
6241 || h->root.type == bfd_link_hash_warning)
6242 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6243 }
6244
6245 switch (ELF32_R_TYPE (rel->r_info))
6246 {
6247 case R_NDS32_GOT_HI20:
6248 case R_NDS32_GOT_LO12:
6249 case R_NDS32_GOT_LO15:
6250 case R_NDS32_GOT_LO19:
6251 case R_NDS32_GOT17S2_RELA:
6252 case R_NDS32_GOT15S2_RELA:
6253 case R_NDS32_GOTOFF:
6254 case R_NDS32_GOTOFF_HI20:
6255 case R_NDS32_GOTOFF_LO12:
6256 case R_NDS32_GOTOFF_LO15:
6257 case R_NDS32_GOTOFF_LO19:
6258 case R_NDS32_GOT20:
6259 case R_NDS32_GOTPC_HI20:
6260 case R_NDS32_GOTPC_LO12:
6261 case R_NDS32_GOTPC20:
6262 if (h != NULL)
6263 {
6264 if (h->got.refcount > 0)
6265 h->got.refcount--;
6266 }
6267 else
6268 {
6269 if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
6270 local_got_refcounts[r_symndx]--;
6271 }
6272 break;
6273
6274 case R_NDS32_16_RELA:
6275 case R_NDS32_20_RELA:
6276 case R_NDS32_5_RELA:
6277 case R_NDS32_32_RELA:
6278 case R_NDS32_HI20_RELA:
6279 case R_NDS32_LO12S3_RELA:
6280 case R_NDS32_LO12S2_RELA:
6281 case R_NDS32_LO12S2_DP_RELA:
6282 case R_NDS32_LO12S2_SP_RELA:
6283 case R_NDS32_LO12S1_RELA:
6284 case R_NDS32_LO12S0_RELA:
6285 case R_NDS32_LO12S0_ORI_RELA:
6286 case R_NDS32_SDA16S3_RELA:
6287 case R_NDS32_SDA17S2_RELA:
6288 case R_NDS32_SDA18S1_RELA:
6289 case R_NDS32_SDA19S0_RELA:
6290 case R_NDS32_SDA15S3_RELA:
6291 case R_NDS32_SDA15S2_RELA:
6292 case R_NDS32_SDA12S2_DP_RELA:
6293 case R_NDS32_SDA12S2_SP_RELA:
6294 case R_NDS32_SDA15S1_RELA:
6295 case R_NDS32_SDA15S0_RELA:
6296 case R_NDS32_SDA_FP7U2_RELA:
6297 case R_NDS32_15_PCREL_RELA:
6298 case R_NDS32_17_PCREL_RELA:
6299 case R_NDS32_25_PCREL_RELA:
6300 if (h != NULL)
6301 {
6302 struct elf_nds32_link_hash_entry *eh;
6303 struct elf_nds32_dyn_relocs **pp;
6304 struct elf_nds32_dyn_relocs *p;
6305
0e1862bb 6306 if (!bfd_link_pic (info) && h->plt.refcount > 0)
35c08157
KLC
6307 h->plt.refcount -= 1;
6308
6309 eh = (struct elf_nds32_link_hash_entry *) h;
6310
6311 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
6312 if (p->sec == sec)
6313 {
6314 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6315 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
6316 || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
6317 p->pc_count -= 1;
6318 p->count -= 1;
6319 if (p->count == 0)
6320 *pp = p->next;
6321 break;
6322 }
6323 }
6324 break;
6325
6326 case R_NDS32_9_PLTREL:
6327 case R_NDS32_25_PLTREL:
6328 if (h != NULL)
6329 {
6330 if (h->plt.refcount > 0)
6331 h->plt.refcount--;
6332 }
6333 break;
6334
6335 default:
6336 break;
6337 }
6338 }
6339
6340 return TRUE;
6341}
6342
6343/* Look through the relocs for a section during the first phase.
6344 Since we don't do .gots or .plts, we just need to consider the
6345 virtual table relocs for gc. */
6346
6347static bfd_boolean
6348nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6349 asection *sec, const Elf_Internal_Rela *relocs)
6350{
6351 Elf_Internal_Shdr *symtab_hdr;
6352 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6353 const Elf_Internal_Rela *rel;
6354 const Elf_Internal_Rela *rel_end;
6355 struct elf_nds32_link_hash_table *htab;
6356 bfd *dynobj;
6357 asection *sreloc = NULL;
6358
0e1862bb 6359 if (bfd_link_relocatable (info))
35c08157
KLC
6360 return TRUE;
6361
6362 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6363 sym_hashes = elf_sym_hashes (abfd);
6364 sym_hashes_end =
6365 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6366 if (!elf_bad_symtab (abfd))
6367 sym_hashes_end -= symtab_hdr->sh_info;
6368
6369 htab = nds32_elf_hash_table (info);
6370 dynobj = htab->root.dynobj;
6371
6372 rel_end = relocs + sec->reloc_count;
6373 for (rel = relocs; rel < rel_end; rel++)
6374 {
6375 enum elf_nds32_reloc_type r_type;
6376 struct elf_link_hash_entry *h;
6377 unsigned long r_symndx;
1c8f6a4d 6378 int tls_type, old_tls_type;
35c08157
KLC
6379
6380 r_symndx = ELF32_R_SYM (rel->r_info);
6381 r_type = ELF32_R_TYPE (rel->r_info);
6382 if (r_symndx < symtab_hdr->sh_info)
6383 h = NULL;
6384 else
6385 {
6386 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6387 while (h->root.type == bfd_link_hash_indirect
6388 || h->root.type == bfd_link_hash_warning)
6389 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6390 }
6391
1c8f6a4d
KLC
6392 /* Some relocs require a global offset table. We create
6393 got section here, since these relocation need got section
6394 and it is not created yet. */
35c08157
KLC
6395 if (htab->sgot == NULL)
6396 {
6397 switch (r_type)
6398 {
6399 case R_NDS32_GOT_HI20:
6400 case R_NDS32_GOT_LO12:
6401 case R_NDS32_GOT_LO15:
6402 case R_NDS32_GOT_LO19:
6403 case R_NDS32_GOT17S2_RELA:
6404 case R_NDS32_GOT15S2_RELA:
6405 case R_NDS32_GOTOFF:
6406 case R_NDS32_GOTOFF_HI20:
6407 case R_NDS32_GOTOFF_LO12:
6408 case R_NDS32_GOTOFF_LO15:
6409 case R_NDS32_GOTOFF_LO19:
6410 case R_NDS32_GOTPC20:
6411 case R_NDS32_GOTPC_HI20:
6412 case R_NDS32_GOTPC_LO12:
6413 case R_NDS32_GOT20:
1c8f6a4d
KLC
6414 case R_NDS32_TLS_IE_HI20:
6415 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC
6416 if (dynobj == NULL)
6417 htab->root.dynobj = dynobj = abfd;
6418 if (!create_got_section (dynobj, info))
6419 return FALSE;
6420 break;
6421
6422 default:
6423 break;
6424 }
6425 }
6426
6427 switch ((int) r_type)
6428 {
6429 case R_NDS32_GOT_HI20:
6430 case R_NDS32_GOT_LO12:
6431 case R_NDS32_GOT_LO15:
6432 case R_NDS32_GOT_LO19:
6433 case R_NDS32_GOT20:
1c8f6a4d
KLC
6434 case R_NDS32_TLS_IE_HI20:
6435 case R_NDS32_TLS_IE_LO12S2:
6436 switch (r_type)
6437 {
6438 case R_NDS32_TLS_IE_HI20:
6439 case R_NDS32_TLS_IE_LO12S2:
6440 tls_type = GOT_TLS_IE;
6441 break;
6442 default:
6443 tls_type = GOT_NORMAL;
6444 break;
6445 }
35c08157 6446 if (h != NULL)
1c8f6a4d
KLC
6447 {
6448 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6449 h->got.refcount += 1;
6450 }
35c08157
KLC
6451 else
6452 {
6453 bfd_signed_vma *local_got_refcounts;
6454
6455 /* This is a global offset table entry for a local
6456 symbol. */
6457 local_got_refcounts = elf_local_got_refcounts (abfd);
6458 if (local_got_refcounts == NULL)
6459 {
6460 bfd_size_type size;
6461
6462 size = symtab_hdr->sh_info;
6463 size *= sizeof (bfd_signed_vma);
6464 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6465 if (local_got_refcounts == NULL)
6466 return FALSE;
6467 elf_local_got_refcounts (abfd) = local_got_refcounts;
6468 }
6469 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6470 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6471 }
35c08157 6472
1c8f6a4d
KLC
6473 /* We will already have issued an error message if there
6474 is a TLS/non-TLS mismatch, based on the symbol
6475 type. So just combine any TLS types needed. */
6476 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6477 && tls_type != GOT_NORMAL)
6478 tls_type |= old_tls_type;
6479
6480 if (old_tls_type != tls_type)
6481 {
6482 if (h != NULL)
6483 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6484 else
6485 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6486 }
6487 break;
6488 case R_NDS32_9_PLTREL:
35c08157
KLC
6489 case R_NDS32_25_PLTREL:
6490 case R_NDS32_PLTREL_HI20:
6491 case R_NDS32_PLTREL_LO12:
6492 case R_NDS32_PLT_GOTREL_HI20:
6493 case R_NDS32_PLT_GOTREL_LO12:
6494 case R_NDS32_PLT_GOTREL_LO15:
6495 case R_NDS32_PLT_GOTREL_LO19:
6496 case R_NDS32_PLT_GOTREL_LO20:
6497
6498 /* This symbol requires a procedure linkage table entry. We
6499 actually build the entry in adjust_dynamic_symbol,
6500 because this might be a case of linking PIC code without
6501 linking in any dynamic objects, in which case we don't
6502 need to generate a procedure linkage table after all. */
6503
6504 /* If this is a local symbol, we resolve it directly without
6505 creating a procedure linkage table entry. */
6506 if (h == NULL)
6507 continue;
6508
6509 if (h->forced_local)
6510 break;
6511
1c8f6a4d 6512 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC
6513 h->needs_plt = 1;
6514 h->plt.refcount += 1;
6515 break;
6516
6517 case R_NDS32_16_RELA:
6518 case R_NDS32_20_RELA:
6519 case R_NDS32_5_RELA:
6520 case R_NDS32_32_RELA:
6521 case R_NDS32_HI20_RELA:
6522 case R_NDS32_LO12S3_RELA:
6523 case R_NDS32_LO12S2_RELA:
6524 case R_NDS32_LO12S2_DP_RELA:
6525 case R_NDS32_LO12S2_SP_RELA:
6526 case R_NDS32_LO12S1_RELA:
6527 case R_NDS32_LO12S0_RELA:
6528 case R_NDS32_LO12S0_ORI_RELA:
6529 case R_NDS32_SDA16S3_RELA:
6530 case R_NDS32_SDA17S2_RELA:
6531 case R_NDS32_SDA18S1_RELA:
6532 case R_NDS32_SDA19S0_RELA:
6533 case R_NDS32_SDA15S3_RELA:
6534 case R_NDS32_SDA15S2_RELA:
6535 case R_NDS32_SDA12S2_DP_RELA:
6536 case R_NDS32_SDA12S2_SP_RELA:
6537 case R_NDS32_SDA15S1_RELA:
6538 case R_NDS32_SDA15S0_RELA:
6539 case R_NDS32_SDA_FP7U2_RELA:
6540 case R_NDS32_15_PCREL_RELA:
6541 case R_NDS32_17_PCREL_RELA:
6542 case R_NDS32_25_PCREL_RELA:
6543
0e1862bb 6544 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC
6545 {
6546 h->non_got_ref = 1;
6547 h->plt.refcount += 1;
6548 }
6549
6550 /* If we are creating a shared library, and this is a reloc against
6551 a global symbol, or a non PC relative reloc against a local
6552 symbol, then we need to copy the reloc into the shared library.
6553 However, if we are linking with -Bsymbolic, we do not need to
6554 copy a reloc against a global symbol which is defined in an
6555 object we are including in the link (i.e., DEF_REGULAR is set).
6556 At this point we have not seen all the input files, so it is
6557 possible that DEF_REGULAR is not set now but will be set later
6558 (it is never cleared). We account for that possibility below by
6559 storing information in the dyn_relocs field of the hash table
6560 entry. A similar situation occurs when creating shared libraries
6561 and symbol visibility changes render the symbol local.
6562
6563 If on the other hand, we are creating an executable, we may need
6564 to keep relocations for symbols satisfied by a dynamic library
6565 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6566 if ((bfd_link_pic (info)
35c08157
KLC
6567 && (sec->flags & SEC_ALLOC) != 0
6568 && ((r_type != R_NDS32_25_PCREL_RELA
6569 && r_type != R_NDS32_15_PCREL_RELA
6570 && r_type != R_NDS32_17_PCREL_RELA
6571 && !(r_type == R_NDS32_32_RELA
6572 && strcmp (sec->name, ".eh_frame") == 0))
6573 || (h != NULL
6574 && (!info->symbolic
6575 || h->root.type == bfd_link_hash_defweak
6576 || !h->def_regular))))
0e1862bb 6577 || (!bfd_link_pic (info)
35c08157
KLC
6578 && (sec->flags & SEC_ALLOC) != 0
6579 && h != NULL
6580 && (h->root.type == bfd_link_hash_defweak
6581 || !h->def_regular)))
6582 {
6583 struct elf_nds32_dyn_relocs *p;
6584 struct elf_nds32_dyn_relocs **head;
6585
6586 if (dynobj == NULL)
6587 htab->root.dynobj = dynobj = abfd;
6588
6589 /* When creating a shared object, we must copy these
6590 relocs into the output file. We create a reloc
6591 section in dynobj and make room for the reloc. */
6592 if (sreloc == NULL)
6593 {
6594 const char *name;
6595
6596 name = bfd_elf_string_from_elf_section
6597 (abfd, elf_elfheader (abfd)->e_shstrndx,
6598 elf_section_data (sec)->rela.hdr->sh_name);
6599 if (name == NULL)
6600 return FALSE;
6601
6602 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6603 && strcmp (bfd_get_section_name (abfd, sec),
6604 name + 5) == 0);
6605
6606 sreloc = bfd_get_section_by_name (dynobj, name);
6607 if (sreloc == NULL)
6608 {
6609 flagword flags;
6610
6611 sreloc = bfd_make_section (dynobj, name);
6612 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6613 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6614 if ((sec->flags & SEC_ALLOC) != 0)
6615 flags |= SEC_ALLOC | SEC_LOAD;
6616 if (sreloc == NULL
6617 || !bfd_set_section_flags (dynobj, sreloc, flags)
6618 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6619 return FALSE;
6620
6621 elf_section_type (sreloc) = SHT_RELA;
6622 }
6623 elf_section_data (sec)->sreloc = sreloc;
6624 }
6625
6626 /* If this is a global symbol, we count the number of
6627 relocations we need for this symbol. */
6628 if (h != NULL)
6629 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6630 else
6631 {
6632 asection *s;
6633
6634 Elf_Internal_Sym *isym;
6635 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6636 if (isym == NULL)
6637 return FALSE;
6638
6639 /* Track dynamic relocs needed for local syms too. */
6640 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6641 if (s == NULL)
6642 return FALSE;
6643
6644 head = ((struct elf_nds32_dyn_relocs **)
6645 &elf_section_data (s)->local_dynrel);
6646 }
6647
6648 p = *head;
6649 if (p == NULL || p->sec != sec)
6650 {
6651 bfd_size_type amt = sizeof (*p);
6652 p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
6653 if (p == NULL)
6654 return FALSE;
6655 p->next = *head;
6656 *head = p;
6657 p->sec = sec;
6658 p->count = 0;
6659 p->pc_count = 0;
6660 }
6661
6662 p->count += 1;
6663 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6664 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6665 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6666 p->pc_count += 1;
6667 }
6668 break;
6669
6670 /* This relocation describes the C++ object vtable hierarchy.
6671 Reconstruct it for later use during GC. */
6672 case R_NDS32_RELA_GNU_VTINHERIT:
6673 case R_NDS32_GNU_VTINHERIT:
6674 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6675 return FALSE;
6676 break;
6677
6678 /* This relocation describes which C++ vtable entries are actually
6679 used. Record for later use during GC. */
6680 case R_NDS32_GNU_VTENTRY:
6681 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6682 return FALSE;
6683 break;
6684 case R_NDS32_RELA_GNU_VTENTRY:
6685 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6686 return FALSE;
6687 break;
6688 }
6689 }
6690
6691 return TRUE;
6692}
6693
6694/* Write VAL in uleb128 format to P, returning a pointer to the
6695 following byte.
6696 This code is copied from elf-attr.c. */
6697
6698static bfd_byte *
6699write_uleb128 (bfd_byte *p, unsigned int val)
6700{
6701 bfd_byte c;
6702 do
6703 {
6704 c = val & 0x7f;
6705 val >>= 7;
6706 if (val)
6707 c |= 0x80;
6708 *(p++) = c;
6709 }
6710 while (val);
6711 return p;
6712}
6713
6714static bfd_signed_vma
6715calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6716 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6717 int *pic_ext_target)
6718{
6719 bfd_signed_vma foff;
6720 bfd_vma symval, addend;
6721 asection *sym_sec;
6722
6723 /* Get the value of the symbol referred to by the reloc. */
6724 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6725 {
6726 Elf_Internal_Sym *isym;
6727
6728 /* A local symbol. */
6729 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6730
6731 if (isym->st_shndx == SHN_UNDEF)
6732 sym_sec = bfd_und_section_ptr;
6733 else if (isym->st_shndx == SHN_ABS)
6734 sym_sec = bfd_abs_section_ptr;
6735 else if (isym->st_shndx == SHN_COMMON)
6736 sym_sec = bfd_com_section_ptr;
6737 else
6738 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6739 symval = isym->st_value + sym_sec->output_section->vma
6740 + sym_sec->output_offset;
6741 }
6742 else
6743 {
6744 unsigned long indx;
6745 struct elf_link_hash_entry *h;
6746 bfd *owner;
6747
6748 /* An external symbol. */
6749 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6750 h = elf_sym_hashes (abfd)[indx];
6751 BFD_ASSERT (h != NULL);
6752
6753 if (h->root.type != bfd_link_hash_defined
6754 && h->root.type != bfd_link_hash_defweak)
6755 /* This appears to be a reference to an undefined
6756 symbol. Just ignore it--it will be caught by the
6757 regular reloc processing. */
6758 return 0;
6759 owner = h->root.u.def.section->owner;
6760 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6761 *pic_ext_target = 1;
6762
6763 if (h->root.u.def.section->flags & SEC_MERGE)
6764 {
6765 sym_sec = h->root.u.def.section;
6766 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6767 elf_section_data (sym_sec)->sec_info,
6768 h->root.u.def.value);
6769 symval = symval + sym_sec->output_section->vma
6770 + sym_sec->output_offset;
6771 }
6772 else
6773 symval = (h->root.u.def.value
6774 + h->root.u.def.section->output_section->vma
6775 + h->root.u.def.section->output_offset);
6776 }
6777
6778 addend = irel->r_addend;
6779
6780 foff = (symval + addend
6781 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6782 return foff;
6783}
6784
6785static bfd_vma
6786calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6787 Elf_Internal_Sym *isymbuf,
6788 Elf_Internal_Rela *irel,
6789 Elf_Internal_Shdr *symtab_hdr)
6790{
6791 bfd_vma symval;
6792
6793 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6794 {
6795 Elf_Internal_Sym *isym;
6796 asection *sym_sec;
6797 /* A local symbol. */
6798 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6799
6800 if (isym->st_shndx == SHN_UNDEF)
6801 sym_sec = bfd_und_section_ptr;
6802 else if (isym->st_shndx == SHN_ABS)
6803 sym_sec = bfd_abs_section_ptr;
6804 else if (isym->st_shndx == SHN_COMMON)
6805 sym_sec = bfd_com_section_ptr;
6806 else
6807 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6808 symval = isym->st_value + sym_sec->output_section->vma
6809 + sym_sec->output_offset;
6810 }
6811 else
6812 {
6813 unsigned long indx;
6814 struct elf_link_hash_entry *h;
6815 struct elf_nds32_link_hash_table *htab;
6816 asection *splt;
6817
6818 /* An external symbol. */
6819 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6820 h = elf_sym_hashes (abfd)[indx];
6821 BFD_ASSERT (h != NULL);
6822 htab = nds32_elf_hash_table (link_info);
6823 splt = htab->splt;
6824
6825 while (h->root.type == bfd_link_hash_indirect
6826 || h->root.type == bfd_link_hash_warning)
6827 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6828
6829 if (h->plt.offset == (bfd_vma) - 1)
6830 {
6831 if (h->root.type != bfd_link_hash_defined
6832 && h->root.type != bfd_link_hash_defweak)
6833 /* This appears to be a reference to an undefined
6834 * symbol. Just ignore it--it will be caught by the
6835 * regular reloc processing. */
6836 return 0;
6837 symval = (h->root.u.def.value
6838 + h->root.u.def.section->output_section->vma
6839 + h->root.u.def.section->output_offset);
6840 }
6841 else
6842 symval = splt->output_section->vma + h->plt.offset;
6843 }
6844
6845 return symval;
6846}
6847
6848static bfd_signed_vma
6849calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6850 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6851 Elf_Internal_Shdr *symtab_hdr)
6852{
6853 bfd_vma foff;
6854 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6855 symtab_hdr)) == 0)
6856 return 0;
6857 else
6858 return foff - (irel->r_offset
6859 + sec->output_section->vma + sec->output_offset);
6860}
6861\f
6862/* Convert a 32-bit instruction to 16-bit one.
6863 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6864 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6865 type of INSN16. Return 1 if successful. */
6866
6867static int
6868nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6869 int *pinsn_type)
6870{
6871 uint16_t insn16 = 0;
6cae483a 6872 int insn_type = 0;
35c08157
KLC
6873 unsigned long mach = bfd_get_mach (abfd);
6874
6875 if (N32_SH5 (insn) != 0)
6876 return 0;
6877
6878 switch (N32_SUB5 (insn))
6879 {
6880 case N32_ALU1_ADD_SLLI:
6881 case N32_ALU1_ADD_SRLI:
6882 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6883 {
6884 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6885 N32_RB5 (insn));
6886 insn_type = NDS32_INSN_ADD333;
6887 }
6888 else if (N32_IS_RT4 (insn))
6889 {
6890 if (N32_RT5 (insn) == N32_RA5 (insn))
6891 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6892 else if (N32_RT5 (insn) == N32_RB5 (insn))
6893 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6894 insn_type = NDS32_INSN_ADD45;
6895 }
6896 break;
6897
6898 case N32_ALU1_SUB_SLLI:
6899 case N32_ALU1_SUB_SRLI:
6900 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6901 {
6902 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6903 N32_RB5 (insn));
6904 insn_type = NDS32_INSN_SUB333;
6905 }
6906 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6907 {
6908 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6909 insn_type = NDS32_INSN_SUB45;
6910 }
6911 break;
6912
6913 case N32_ALU1_AND_SLLI:
6914 case N32_ALU1_AND_SRLI:
6915 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6916 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6917 && N32_IS_RB3 (insn))
6918 {
6919 if (N32_RT5 (insn) == N32_RA5 (insn))
6920 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6921 else if (N32_RT5 (insn) == N32_RB5 (insn))
6922 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6923 if (insn16)
6924 insn_type = NDS32_INSN_AND33;
6925 }
6926 break;
6927
6928 case N32_ALU1_XOR_SLLI:
6929 case N32_ALU1_XOR_SRLI:
6930 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6931 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6932 && N32_IS_RB3 (insn))
6933 {
6934 if (N32_RT5 (insn) == N32_RA5 (insn))
6935 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6936 else if (N32_RT5 (insn) == N32_RB5 (insn))
6937 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6938 if (insn16)
6939 insn_type = NDS32_INSN_XOR33;
6940 }
6941 break;
6942
6943 case N32_ALU1_OR_SLLI:
6944 case N32_ALU1_OR_SRLI:
6945 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6946 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6947 && N32_IS_RB3 (insn))
6948 {
6949 if (N32_RT5 (insn) == N32_RA5 (insn))
6950 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6951 else if (N32_RT5 (insn) == N32_RB5 (insn))
6952 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6953 if (insn16)
6954 insn_type = NDS32_INSN_OR33;
6955 }
6956 break;
6957 case N32_ALU1_NOR:
6958 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6959 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6960 && N32_RA5 (insn) == N32_RB5 (insn))
6961 {
6962 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6963 insn_type = NDS32_INSN_NOT33;
6964 }
6965 break;
6966 case N32_ALU1_SRAI:
6967 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6968 {
6969 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6970 insn_type = NDS32_INSN_SRAI45;
6971 }
6972 break;
6973
6974 case N32_ALU1_SRLI:
6975 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6976 {
6977 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6978 insn_type = NDS32_INSN_SRLI45;
6979 }
6980 break;
6981
6982 case N32_ALU1_SLLI:
6983 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6984 {
6985 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6986 N32_UB5 (insn));
6987 insn_type = NDS32_INSN_SLLI333;
6988 }
6989 break;
6990
6991 case N32_ALU1_ZEH:
6992 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6993 {
6994 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6995 insn_type = NDS32_INSN_ZEH33;
6996 }
6997 break;
6998
6999 case N32_ALU1_SEB:
7000 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7001 {
7002 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7003 insn_type = NDS32_INSN_SEB33;
7004 }
7005 break;
7006
7007 case N32_ALU1_SEH:
7008 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7009 {
7010 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7011 insn_type = NDS32_INSN_SEH33;
7012 }
7013 break;
7014
7015 case N32_ALU1_SLT:
7016 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7017 {
7018 /* Implicit r15. */
7019 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7020 insn_type = NDS32_INSN_SLT45;
7021 }
7022 break;
7023
7024 case N32_ALU1_SLTS:
7025 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7026 {
7027 /* Implicit r15. */
7028 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7029 insn_type = NDS32_INSN_SLTS45;
7030 }
7031 break;
7032 }
7033
7034 if ((insn16 & 0x8000) == 0)
7035 return 0;
7036
7037 if (pinsn16)
7038 *pinsn16 = insn16;
7039 if (pinsn_type)
7040 *pinsn_type = insn_type;
7041 return 1;
7042}
7043
7044static int
7045nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7046 int *pinsn_type)
7047{
7048 uint16_t insn16 = 0;
7049 int insn_type;
7050 unsigned long mach = bfd_get_mach (abfd);
7051
7052 /* TODO: bset, bclr, btgl, btst. */
7053 if (__GF (insn, 6, 4) != 0)
7054 return 0;
7055
7056 switch (N32_IMMU (insn, 6))
7057 {
7058 case N32_ALU2_MUL:
7059 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7060 && N32_IS_RB3 (insn))
7061 {
7062 if (N32_RT5 (insn) == N32_RA5 (insn))
7063 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7064 else if (N32_RT5 (insn) == N32_RB5 (insn))
7065 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7066 if (insn16)
7067 insn_type = NDS32_INSN_MUL33;
7068 }
7069 }
7070
7071 if ((insn16 & 0x8000) == 0)
7072 return 0;
7073
7074 if (pinsn16)
7075 *pinsn16 = insn16;
7076 if (pinsn_type)
7077 *pinsn_type = insn_type;
7078 return 1;
7079}
7080
7081int
7082nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7083 int *pinsn_type)
7084{
7085 int op6;
7086 uint16_t insn16 = 0;
7087 int insn_type;
7088 unsigned long mach = bfd_get_mach (abfd);
7089
7090 /* Decode 32-bit instruction. */
7091 if (insn & 0x80000000)
7092 {
7093 /* Not 32-bit insn. */
7094 return 0;
7095 }
7096
7097 op6 = N32_OP6 (insn);
7098
7099 /* Convert it to 16-bit instruction. */
7100 switch (op6)
7101 {
7102 case N32_OP6_MOVI:
7103 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7104 {
7105 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7106 insn_type = NDS32_INSN_MOVI55;
7107 }
7108 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7109 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7110 {
7111 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7112 N32_IMM20S (insn) - 16);
7113 insn_type = NDS32_INSN_MOVPI45;
7114 }
7115 break;
7116
7117 case N32_OP6_ADDI:
7118 if (N32_IMM15S (insn) == 0)
7119 {
7120 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7121 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7122 if (mach <= MACH_V2
7123 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7124 {
7125 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7126 insn_type = NDS32_INSN_MOV55;
7127 }
7128 }
7129 else if (N32_IMM15S (insn) > 0)
7130 {
7131 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7132 {
7133 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7134 N32_IMM15S (insn));
7135 insn_type = NDS32_INSN_ADDI333;
7136 }
7137 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7138 && N32_IMM15S (insn) < 32)
7139 {
7140 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7141 insn_type = NDS32_INSN_ADDI45;
7142 }
7143 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7144 && N32_RT5 (insn) == N32_RA5 (insn)
7145 && N32_IMM15S (insn) < 512)
7146 {
7147 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7148 insn_type = NDS32_INSN_ADDI10_SP;
7149 }
7150 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7151 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7152 && (N32_IMM15S (insn) % 4 == 0))
7153 {
7154 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7155 N32_IMM15S (insn) >> 2);
7156 insn_type = NDS32_INSN_ADDRI36_SP;
7157 }
7158 }
7159 else
7160 {
7161 /* Less than 0. */
7162 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7163 {
7164 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7165 0 - N32_IMM15S (insn));
7166 insn_type = NDS32_INSN_SUBI333;
7167 }
7168 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7169 && N32_IMM15S (insn) > -32)
7170 {
1c8f6a4d
KLC
7171 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7172 0 - N32_IMM15S (insn));
35c08157
KLC
7173 insn_type = NDS32_INSN_SUBI45;
7174 }
7175 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7176 && N32_RT5 (insn) == N32_RA5 (insn)
7177 && N32_IMM15S (insn) >= -512)
7178 {
7179 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7180 insn_type = NDS32_INSN_ADDI10_SP;
7181 }
7182 }
7183 break;
7184
7185 case N32_OP6_ORI:
7186 if (N32_IMM15S (insn) == 0)
7187 {
7188 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7189 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7190 if (mach <= MACH_V2
7191 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7192 {
7193 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7194 insn_type = NDS32_INSN_MOV55;
7195 }
7196 }
7197 break;
7198
7199 case N32_OP6_SUBRI:
7200 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7201 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7202 {
7203 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7204 insn_type = NDS32_INSN_NEG33;
7205 }
7206 break;
7207
7208 case N32_OP6_ANDI:
7209 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7210 {
7211 if (N32_IMM15U (insn) == 1)
7212 {
7213 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7214 insn_type = NDS32_INSN_XLSB33;
7215 }
7216 else if (N32_IMM15U (insn) == 0x7ff)
7217 {
7218 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7219 insn_type = NDS32_INSN_X11B33;
7220 }
7221 else if (N32_IMM15U (insn) == 0xff)
7222 {
7223 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7224 insn_type = NDS32_INSN_ZEB33;
7225 }
7226 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7227 && N32_IMM15U (insn) < 256)
7228 {
7229 int imm15u = N32_IMM15U (insn);
7230
7231 if (__builtin_popcount (imm15u) == 1)
7232 {
7233 /* BMSKI33 */
7234 int imm3u = __builtin_ctz (imm15u);
7235
7236 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7237 insn_type = NDS32_INSN_BMSKI33;
7238 }
7239 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7240 {
7241 /* FEXTI33 */
7242 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7243
7244 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7245 insn_type = NDS32_INSN_FEXTI33;
7246 }
7247 }
7248 }
7249 break;
7250
7251 case N32_OP6_SLTI:
7252 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7253 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7254 {
7255 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7256 insn_type = NDS32_INSN_SLTI45;
7257 }
7258 break;
7259
7260 case N32_OP6_SLTSI:
7261 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7262 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7263 {
7264 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7265 insn_type = NDS32_INSN_SLTSI45;
7266 }
7267 break;
7268
7269 case N32_OP6_LWI:
7270 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7271 {
7272 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7273 insn_type = NDS32_INSN_LWI450;
7274 }
7275 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7276 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7277 {
7278 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7279 N32_IMM15S (insn));
7280 insn_type = NDS32_INSN_LWI333;
7281 }
7282 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7283 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7284 {
7285 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7286 insn_type = NDS32_INSN_LWI37;
7287 }
7288 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7289 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7290 {
7291 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7292 insn_type = NDS32_INSN_LWI37_SP;
7293 }
7294 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7295 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7296 {
1c8f6a4d
KLC
7297 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7298 N32_IMM15S (insn) + 32);
35c08157
KLC
7299 insn_type = NDS32_INSN_LWI45_FE;
7300 }
7301 break;
7302
7303 case N32_OP6_SWI:
7304 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7305 {
7306 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7307 insn_type = NDS32_INSN_SWI450;
7308 }
7309 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7310 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7311 {
1c8f6a4d
KLC
7312 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7313 N32_IMM15S (insn));
35c08157
KLC
7314 insn_type = NDS32_INSN_SWI333;
7315 }
7316 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7317 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7318 {
7319 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7320 insn_type = NDS32_INSN_SWI37;
7321 }
7322 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7323 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7324 {
7325 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7326 insn_type = NDS32_INSN_SWI37_SP;
7327 }
7328 break;
7329
7330 case N32_OP6_LWI_BI:
7331 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7332 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7333 {
7334 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7335 N32_IMM15S (insn));
7336 insn_type = NDS32_INSN_LWI333_BI;
7337 }
7338 break;
7339
7340 case N32_OP6_SWI_BI:
7341 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7342 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7343 {
7344 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7345 N32_IMM15S (insn));
7346 insn_type = NDS32_INSN_SWI333_BI;
7347 }
7348 break;
7349
7350 case N32_OP6_LHI:
7351 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7352 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7353 {
7354 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7355 N32_IMM15S (insn));
7356 insn_type = NDS32_INSN_LHI333;
7357 }
7358 break;
7359
7360 case N32_OP6_SHI:
7361 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7362 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7363 {
7364 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7365 N32_IMM15S (insn));
7366 insn_type = NDS32_INSN_SHI333;
7367 }
7368 break;
7369
7370 case N32_OP6_LBI:
7371 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7372 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7373 {
7374 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7375 N32_IMM15S (insn));
7376 insn_type = NDS32_INSN_LBI333;
7377 }
7378 break;
7379
7380 case N32_OP6_SBI:
7381 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7382 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7383 {
7384 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7385 N32_IMM15S (insn));
7386 insn_type = NDS32_INSN_SBI333;
7387 }
7388 break;
7389
7390 case N32_OP6_ALU1:
7391 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7392
7393 case N32_OP6_ALU2:
7394 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7395
7396 case N32_OP6_BR1:
7397 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7398 goto done;
7399
7400 if ((insn & __BIT (14)) == 0)
7401 {
7402 /* N32_BR1_BEQ */
7403 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7404 && N32_RT5 (insn) != REG_R5)
7405 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7406 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7407 && N32_RA5 (insn) != REG_R5)
7408 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7409 insn_type = NDS32_INSN_BEQS38;
7410 break;
7411 }
7412 else
7413 {
7414 /* N32_BR1_BNE */
7415 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7416 && N32_RT5 (insn) != REG_R5)
7417 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7418 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7419 && N32_RA5 (insn) != REG_R5)
7420 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7421 insn_type = NDS32_INSN_BNES38;
7422 break;
7423 }
7424 break;
7425
7426 case N32_OP6_BR2:
7427 switch (N32_BR2_SUB (insn))
7428 {
7429 case N32_BR2_BEQZ:
7430 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7431 {
7432 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7433 insn_type = NDS32_INSN_BEQZ38;
7434 }
1c8f6a4d
KLC
7435 else if (N32_RT5 (insn) == REG_R15
7436 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7437 {
7438 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7439 insn_type = NDS32_INSN_BEQZS8;
7440 }
7441 break;
7442
7443 case N32_BR2_BNEZ:
7444 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7445 {
7446 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7447 insn_type = NDS32_INSN_BNEZ38;
7448 }
1c8f6a4d
KLC
7449 else if (N32_RT5 (insn) == REG_R15
7450 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7451 {
7452 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7453 insn_type = NDS32_INSN_BNEZS8;
7454 }
7455 break;
7456
7457 case N32_BR2_IFCALL:
7458 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7459 {
7460 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7461 insn_type = NDS32_INSN_IFCALL9;
7462 }
7463 break;
7464 }
7465 break;
7466
7467 case N32_OP6_JI:
7468 if ((insn & __BIT (24)) == 0)
7469 {
7470 /* N32_JI_J */
7471 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7472 {
7473 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7474 insn_type = NDS32_INSN_J8;
7475 }
7476 }
7477 break;
7478
7479 case N32_OP6_JREG:
7480 if (__GF (insn, 8, 2) != 0)
7481 goto done;
7482
7483 switch (N32_IMMU (insn, 5))
7484 {
7485 case N32_JREG_JR:
7486 if (N32_JREG_HINT (insn) == 0)
7487 {
7488 /* jr */
7489 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7490 insn_type = NDS32_INSN_JR5;
7491 }
7492 else if (N32_JREG_HINT (insn) == 1)
7493 {
7494 /* ret */
7495 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7496 insn_type = NDS32_INSN_RET5;
7497 }
7498 else if (N32_JREG_HINT (insn) == 3)
7499 {
7500 /* ifret = mov55 $sp, $sp */
7501 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7502 insn_type = NDS32_INSN_IFRET;
7503 }
7504 break;
7505
7506 case N32_JREG_JRAL:
7507 /* It's convertible when return rt5 is $lp and address
7508 translation is kept. */
7509 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7510 {
7511 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7512 insn_type = NDS32_INSN_JRAL5;
7513 }
7514 break;
7515 }
7516 break;
7517
7518 case N32_OP6_MISC:
7519 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7520 {
7521 /* For v3, swid above 31 are used for ex9.it. */
7522 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7523 insn_type = NDS32_INSN_BREAK16;
7524 }
7525 break;
7526
7527 default:
7528 /* This instruction has no 16-bit variant. */
7529 goto done;
7530 }
7531
7532done:
7533 /* Bit-15 of insn16 should be set for a valid instruction. */
7534 if ((insn16 & 0x8000) == 0)
7535 return 0;
7536
7537 if (pinsn16)
7538 *pinsn16 = insn16;
7539 if (pinsn_type)
7540 *pinsn_type = insn_type;
7541 return 1;
7542}
7543
7544static int
7545special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7546 Elf_Internal_Rela *reloc)
7547{
7548 uint16_t insn16 = 0;
7549
7550 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7551 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7552 return 0;
7553
7554 if (!N32_IS_RT3 (insn))
7555 return 0;
7556
7557 switch (N32_OP6 (insn))
7558 {
7559 case N32_OP6_LWI:
7560 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7561 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7562 break;
7563 case N32_OP6_SWI:
7564 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7565 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7566 break;
7567 case N32_OP6_HWGP:
7568 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7569 break;
7570
7571 if (__GF (insn, 17, 3) == 6)
7572 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7573 else if (__GF (insn, 17, 3) == 7)
7574 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7575 break;
7576 }
7577
7578 if ((insn16 & 0x8000) == 0)
7579 return 0;
7580
7581 *pinsn16 = insn16;
7582 return 1;
7583}
7584
7585/* Convert a 16-bit instruction to 32-bit one.
7586 INSN16 it the input and PINSN it the point to output.
7587 Return non-zero on successful. Otherwise 0 is returned. */
7588
7589int
7590nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7591{
7592 uint32_t insn = 0xffffffff;
7593 unsigned long mach = bfd_get_mach (abfd);
7594
7595 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7596
7597 switch (__GF (insn16, 9, 6))
7598 {
7599 case 0x4: /* add45 */
1c8f6a4d
KLC
7600 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7601 N16_RA5 (insn16));
35c08157
KLC
7602 goto done;
7603 case 0x5: /* sub45 */
1c8f6a4d
KLC
7604 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7605 N16_RA5 (insn16));
35c08157
KLC
7606 goto done;
7607 case 0x6: /* addi45 */
1c8f6a4d
KLC
7608 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7609 N16_IMM5U (insn16));
35c08157
KLC
7610 goto done;
7611 case 0x7: /* subi45 */
1c8f6a4d
KLC
7612 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7613 -N16_IMM5U (insn16));
35c08157
KLC
7614 goto done;
7615 case 0x8: /* srai45 */
1c8f6a4d
KLC
7616 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7617 N16_IMM5U (insn16));
35c08157
KLC
7618 goto done;
7619 case 0x9: /* srli45 */
1c8f6a4d
KLC
7620 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7621 N16_IMM5U (insn16));
35c08157 7622 goto done;
35c08157 7623 case 0xa: /* slli333 */
1c8f6a4d
KLC
7624 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7625 N16_IMM3U (insn16));
35c08157
KLC
7626 goto done;
7627 case 0xc: /* add333 */
1c8f6a4d
KLC
7628 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7629 N16_RB3 (insn16));
35c08157
KLC
7630 goto done;
7631 case 0xd: /* sub333 */
1c8f6a4d
KLC
7632 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7633 N16_RB3 (insn16));
35c08157
KLC
7634 goto done;
7635 case 0xe: /* addi333 */
1c8f6a4d
KLC
7636 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7637 N16_IMM3U (insn16));
35c08157
KLC
7638 goto done;
7639 case 0xf: /* subi333 */
1c8f6a4d
KLC
7640 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7641 -N16_IMM3U (insn16));
35c08157 7642 goto done;
35c08157 7643 case 0x10: /* lwi333 */
1c8f6a4d
KLC
7644 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7645 N16_IMM3U (insn16));
35c08157
KLC
7646 goto done;
7647 case 0x12: /* lhi333 */
1c8f6a4d
KLC
7648 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7649 N16_IMM3U (insn16));
35c08157
KLC
7650 goto done;
7651 case 0x13: /* lbi333 */
1c8f6a4d
KLC
7652 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7653 N16_IMM3U (insn16));
35c08157
KLC
7654 goto done;
7655 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC
7656 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7657 N16_IMM3U (insn16));
35c08157
KLC
7658 goto done;
7659 case 0x14: /* swi333 */
1c8f6a4d
KLC
7660 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7661 N16_IMM3U (insn16));
35c08157
KLC
7662 goto done;
7663 case 0x16: /* shi333 */
1c8f6a4d
KLC
7664 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7665 N16_IMM3U (insn16));
35c08157
KLC
7666 goto done;
7667 case 0x17: /* sbi333 */
1c8f6a4d
KLC
7668 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7669 N16_IMM3U (insn16));
35c08157
KLC
7670 goto done;
7671 case 0x15: /* swi333.bi */
1c8f6a4d
KLC
7672 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7673 N16_IMM3U (insn16));
35c08157 7674 goto done;
35c08157 7675 case 0x18: /* addri36.sp */
1c8f6a4d
KLC
7676 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7677 N16_IMM6U (insn16) << 2);
35c08157 7678 goto done;
35c08157 7679 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC
7680 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7681 (N16_IMM5U (insn16) - 32));
35c08157
KLC
7682 goto done;
7683 case 0x1a: /* lwi450 */
7684 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7685 goto done;
7686 case 0x1b: /* swi450 */
7687 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7688 goto done;
7689
1c8f6a4d 7690 /* These are r15 implied instructions. */
35c08157
KLC
7691 case 0x30: /* slts45 */
7692 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7693 goto done;
7694 case 0x31: /* slt45 */
7695 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7696 goto done;
7697 case 0x32: /* sltsi45 */
7698 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7699 goto done;
7700 case 0x33: /* slti45 */
7701 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7702 goto done;
7703 case 0x34: /* beqzs8, bnezs8 */
7704 if (insn16 & __BIT (8))
7705 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7706 else
7707 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7708 goto done;
7709
7710 case 0x35: /* break16, ex9.it */
7711 /* Only consider range of v3 break16. */
7712 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7713 goto done;
7714
7715 case 0x3c: /* ifcall9 */
7716 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7717 goto done;
7718 case 0x3d: /* movpi45 */
7719 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7720 goto done;
7721
7722 case 0x3f: /* MISC33 */
1c8f6a4d 7723 switch (insn16 & 0x7)
35c08157
KLC
7724 {
7725 case 2: /* neg33 */
7726 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7727 break;
7728 case 3: /* not33 */
1c8f6a4d
KLC
7729 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7730 N16_RA3 (insn16));
35c08157
KLC
7731 break;
7732 case 4: /* mul33 */
1c8f6a4d
KLC
7733 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7734 N16_RA3 (insn16));
35c08157
KLC
7735 break;
7736 case 5: /* xor33 */
1c8f6a4d
KLC
7737 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7738 N16_RA3 (insn16));
35c08157
KLC
7739 break;
7740 case 6: /* and33 */
1c8f6a4d
KLC
7741 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7742 N16_RA3 (insn16));
35c08157
KLC
7743 break;
7744 case 7: /* or33 */
1c8f6a4d
KLC
7745 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7746 N16_RA3 (insn16));
35c08157
KLC
7747 break;
7748 }
7749 goto done;
7750
1c8f6a4d 7751 case 0xb:
35c08157
KLC
7752 switch (insn16 & 0x7)
7753 {
7754 case 0: /* zeb33 */
7755 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7756 break;
7757 case 1: /* zeh33 */
7758 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7759 break;
7760 case 2: /* seb33 */
7761 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7762 break;
7763 case 3: /* seh33 */
7764 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7765 break;
7766 case 4: /* xlsb33 */
7767 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7768 break;
7769 case 5: /* x11b33 */
7770 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7771 break;
7772 case 6: /* bmski33 */
7773 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7774 1 << __GF (insn16, 3, 3));
35c08157
KLC
7775 break;
7776 case 7: /* fexti33 */
7777 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7778 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC
7779 break;
7780 }
7781 goto done;
7782 }
7783
7784 switch (__GF (insn16, 10, 5))
7785 {
7786 case 0x0: /* mov55 or ifret16 */
7787 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7788 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7789 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7790 else
1c8f6a4d 7791 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC
7792 goto done;
7793 case 0x1: /* movi55 */
7794 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7795 goto done;
7796 case 0x1b: /* addi10s (V2) */
7797 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7798 goto done;
7799 }
7800
7801 switch (__GF (insn16, 11, 4))
7802 {
7803 case 0x7: /* lwi37.fp/swi37.fp */
7804 if (insn16 & __BIT (7)) /* swi37.fp */
7805 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7806 else /* lwi37.fp */
7807 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7808 goto done;
7809 case 0x8: /* beqz38 */
7810 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7811 goto done;
7812 case 0x9: /* bnez38 */
7813 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7814 goto done;
7815 case 0xa: /* beqs38/j8, implied r5 */
7816 if (N16_RT38 (insn16) == 5)
7817 insn = N32_JI (J, N16_IMM8S (insn16));
7818 else
7819 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7820 goto done;
7821 case 0xb: /* bnes38 and others */
7822 if (N16_RT38 (insn16) == 5)
7823 {
7824 switch (__GF (insn16, 5, 3))
7825 {
7826 case 0: /* jr5 */
7827 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7828 break;
7829 case 4: /* ret5 */
7830 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7831 break;
7832 case 1: /* jral5 */
7833 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7834 break;
7835 case 2: /* ex9.it imm5 */
7836 /* ex9.it had no 32-bit variantl. */
7837 break;
7838 case 5: /* add5.pc */
7839 /* add5.pc had no 32-bit variantl. */
7840 break;
7841 }
7842 }
7843 else /* bnes38 */
7844 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7845 goto done;
7846 case 0xe: /* lwi37/swi37 */
7847 if (insn16 & (1 << 7)) /* swi37.sp */
7848 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7849 else /* lwi37.sp */
7850 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7851 goto done;
7852 }
7853
7854done:
7855 if (insn & 0x80000000)
7856 return 0;
7857
7858 if (pinsn)
7859 *pinsn = insn;
7860 return 1;
7861}
7862\f
7863static bfd_boolean
7864is_sda_access_insn (unsigned long insn)
7865{
7866 switch (N32_OP6 (insn))
7867 {
7868 case N32_OP6_LWI:
7869 case N32_OP6_LHI:
7870 case N32_OP6_LHSI:
7871 case N32_OP6_LBI:
7872 case N32_OP6_LBSI:
7873 case N32_OP6_SWI:
7874 case N32_OP6_SHI:
7875 case N32_OP6_SBI:
7876 case N32_OP6_LWC:
7877 case N32_OP6_LDC:
7878 case N32_OP6_SWC:
7879 case N32_OP6_SDC:
7880 return TRUE;
7881 default:
7882 ;
7883 }
7884 return FALSE;
7885}
7886
7887static unsigned long
7888turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7889{
7890 uint32_t oinsn = 0;
7891
7892 switch (type)
7893 {
7894 case R_NDS32_GOT_LO12:
7895 case R_NDS32_GOTOFF_LO12:
7896 case R_NDS32_PLTREL_LO12:
7897 case R_NDS32_PLT_GOTREL_LO12:
7898 case R_NDS32_LO12S0_RELA:
7899 switch (N32_OP6 (insn))
7900 {
7901 case N32_OP6_LBI:
7902 /* lbi.gp */
7903 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7904 break;
7905 case N32_OP6_LBSI:
7906 /* lbsi.gp */
7907 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
7908 break;
7909 case N32_OP6_SBI:
7910 /* sbi.gp */
7911 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7912 break;
7913 case N32_OP6_ORI:
7914 /* addi.gp */
7915 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
7916 break;
7917 }
7918 break;
7919
7920 case R_NDS32_LO12S1_RELA:
7921 switch (N32_OP6 (insn))
7922 {
7923 case N32_OP6_LHI:
7924 /* lhi.gp */
7925 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7926 break;
7927 case N32_OP6_LHSI:
7928 /* lhsi.gp */
7929 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
7930 break;
7931 case N32_OP6_SHI:
7932 /* shi.gp */
7933 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
7934 break;
7935 }
7936 break;
7937
7938 case R_NDS32_LO12S2_RELA:
7939 switch (N32_OP6 (insn))
7940 {
7941 case N32_OP6_LWI:
7942 /* lwi.gp */
7943 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7944 break;
7945 case N32_OP6_SWI:
7946 /* swi.gp */
7947 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7948 break;
7949 }
7950 break;
7951
7952 case R_NDS32_LO12S2_DP_RELA:
7953 case R_NDS32_LO12S2_SP_RELA:
7954 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7955 break;
7956 }
7957
7958 if (oinsn)
7959 *pinsn = oinsn;
7960
7961 return oinsn != 0;
7962}
7963
7964/* Linker hasn't found the correct merge section for non-section symbol
7965 in relax time, this work is left to the function elf_link_input_bfd().
7966 So for non-section symbol, _bfd_merged_section_offset is also needed
7967 to find the correct symbol address. */
7968
7969static bfd_vma
7970nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7971 asection **psec, Elf_Internal_Rela *rel)
7972{
7973 asection *sec = *psec;
7974 bfd_vma relocation;
7975
7976 relocation = (sec->output_section->vma
7977 + sec->output_offset + sym->st_value);
7978 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7979 {
7980 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7981 rel->r_addend =
7982 _bfd_merged_section_offset (abfd, psec,
7983 elf_section_data (sec)->sec_info,
7984 sym->st_value + rel->r_addend);
7985 else
7986 rel->r_addend =
7987 _bfd_merged_section_offset (abfd, psec,
7988 elf_section_data (sec)->sec_info,
7989 sym->st_value) + rel->r_addend;
7990
7991 if (sec != *psec)
7992 {
7993 /* If we have changed the section, and our original section is
7994 marked with SEC_EXCLUDE, it means that the original
7995 SEC_MERGE section has been completely subsumed in some
7996 other SEC_MERGE section. In this case, we need to leave
7997 some info around for --emit-relocs. */
7998 if ((sec->flags & SEC_EXCLUDE) != 0)
7999 sec->kept_section = *psec;
8000 sec = *psec;
8001 }
8002 rel->r_addend -= relocation;
8003 rel->r_addend += sec->output_section->vma + sec->output_offset;
8004 }
8005 return relocation;
8006}
8007
8008static bfd_vma
8009calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8010 Elf_Internal_Sym *isymbuf,
8011 Elf_Internal_Shdr *symtab_hdr)
8012{
8013 bfd_signed_vma foff;
8014 bfd_vma symval, addend;
8015 Elf_Internal_Rela irel_fn;
8016 Elf_Internal_Sym *isym;
8017 asection *sym_sec;
8018
8019 /* Get the value of the symbol referred to by the reloc. */
8020 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8021 {
8022 /* A local symbol. */
8023 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8024
8025 if (isym->st_shndx == SHN_UNDEF)
8026 sym_sec = bfd_und_section_ptr;
8027 else if (isym->st_shndx == SHN_ABS)
8028 sym_sec = bfd_abs_section_ptr;
8029 else if (isym->st_shndx == SHN_COMMON)
8030 sym_sec = bfd_com_section_ptr;
8031 else
8032 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8033 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8034 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8035 addend = irel_fn.r_addend;
8036 }
8037 else
8038 {
8039 unsigned long indx;
8040 struct elf_link_hash_entry *h;
8041
8042 /* An external symbol. */
8043 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8044 h = elf_sym_hashes (abfd)[indx];
8045 BFD_ASSERT (h != NULL);
8046
8047 while (h->root.type == bfd_link_hash_indirect
8048 || h->root.type == bfd_link_hash_warning)
8049 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8050
8051 if (h->root.type != bfd_link_hash_defined
8052 && h->root.type != bfd_link_hash_defweak)
8053 /* This appears to be a reference to an undefined
8054 symbol. Just ignore it--it will be caught by the
8055 regular reloc processing. */
8056 return 0;
8057
8058 if (h->root.u.def.section->flags & SEC_MERGE)
8059 {
8060 sym_sec = h->root.u.def.section;
8061 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8062 (sym_sec)->sec_info, h->root.u.def.value);
8063 symval = symval + sym_sec->output_section->vma
8064 + sym_sec->output_offset;
8065 }
8066 else
8067 symval = (h->root.u.def.value
8068 + h->root.u.def.section->output_section->vma
8069 + h->root.u.def.section->output_offset);
8070 addend = irel->r_addend;
8071 }
8072
8073 foff = symval + addend;
8074
8075 return foff;
8076}
8077
8078static bfd_vma
8079calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
8080 Elf_Internal_Rela *irel,
8081 Elf_Internal_Shdr *symtab_hdr)
8082{
8083 int symndx;
8084 bfd_vma *local_got_offsets;
8085 /* Get the value of the symbol referred to by the reloc. */
8086 struct elf_link_hash_entry *h;
8087 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
8088
8089 /* An external symbol. */
8090 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8091 h = elf_sym_hashes (abfd)[symndx];
8092 while (h->root.type == bfd_link_hash_indirect
8093 || h->root.type == bfd_link_hash_warning)
8094 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8095
8096 if (symndx >= 0)
8097 {
8098 BFD_ASSERT (h != NULL);
8099 return htab->sgot->output_section->vma + htab->sgot->output_offset
8100 + h->got.offset;
8101 }
8102 else
8103 {
8104 local_got_offsets = elf_local_got_offsets (abfd);
8105 BFD_ASSERT (local_got_offsets != NULL);
8106 return htab->sgot->output_section->vma + htab->sgot->output_offset
8107 + local_got_offsets[ELF32_R_SYM (irel->r_info)];
8108 }
8109
8110 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
8111 /* The check of h->root.type is passed. */
8112}
8113
8114static int
8115is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8116 asection *sec, Elf_Internal_Rela *rel)
8117{
8118 bfd_byte *contents;
8119 unsigned short insn16;
8120
8121 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
8122 return FALSE;
8123 contents = elf_section_data (sec)->this_hdr.contents;
8124 insn16 = bfd_getb16 (contents + rel->r_offset);
8125 if (insn16 == NDS32_NOP16)
8126 return TRUE;
8127 return FALSE;
8128}
8129
8130/* It checks whether the instruction could be converted to
8131 16-bit form and returns the converted one.
8132
8133 `internal_relocs' is supposed to be sorted. */
8134
8135static int
8136is_convert_32_to_16 (bfd *abfd, asection *sec,
8137 Elf_Internal_Rela *reloc,
8138 Elf_Internal_Rela *internal_relocs,
8139 Elf_Internal_Rela *irelend,
8140 uint16_t *insn16)
8141{
8142#define NORMAL_32_TO_16 (1 << 0)
8143#define SPECIAL_32_TO_16 (1 << 1)
8144 bfd_byte *contents = NULL;
8145 bfd_signed_vma off;
8146 bfd_vma mem_addr;
8147 uint32_t insn = 0;
8148 Elf_Internal_Rela *pc_rel;
8149 int pic_ext_target = 0;
8150 Elf_Internal_Shdr *symtab_hdr;
8151 Elf_Internal_Sym *isymbuf = NULL;
8152 int convert_type;
8153 bfd_vma offset;
8154
8155 if (reloc->r_offset + 4 > sec->size)
8156 return FALSE;
8157
8158 offset = reloc->r_offset;
8159
0c4bd9d9 8160 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
8161 return FALSE;
8162 insn = bfd_getb32 (contents + offset);
8163
8164 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8165 convert_type = NORMAL_32_TO_16;
8166 else if (special_convert_32_to_16 (insn, insn16, reloc))
8167 convert_type = SPECIAL_32_TO_16;
8168 else
8169 return FALSE;
8170
8171 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8172 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
8173 return FALSE;
8174
8175 /* Find the first relocation of the same relocation-type,
8176 so we iteratie them forward. */
8177 pc_rel = reloc;
1c8f6a4d 8178 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC
8179 pc_rel--;
8180
8181 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8182 {
8183 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8184 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8185 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8186 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8187 {
8188 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8189 &pic_ext_target);
1c8f6a4d
KLC
8190 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8191 || off == 0)
35c08157
KLC
8192 return FALSE;
8193 break;
8194 }
8195 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8196 {
8197 /* movi => movi55 */
1c8f6a4d
KLC
8198 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8199 symtab_hdr);
8200 /* mem_addr is unsigned, but the value should
8201 be between [-16, 15]. */
35c08157
KLC
8202 if ((mem_addr + 0x10) >> 5)
8203 return FALSE;
8204 break;
8205 }
1c8f6a4d
KLC
8206 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8207 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8208 {
8209 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8210 because it can be relaxed to addi for TLS_LE_ADD. */
8211 return FALSE;
8212 }
35c08157
KLC
8213 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8214 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8215 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8216 && convert_type == SPECIAL_32_TO_16)
8217 {
8218 /* fp-as-gp
8219 We've selected a best fp-base for this access, so we can
8220 always resolve it anyway. Do nothing. */
8221 break;
8222 }
8223 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8224 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8225 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8226 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8227 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8228 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8229 {
1c8f6a4d
KLC
8230 /* Prevent unresolved addi instruction translate
8231 to addi45 or addi333. */
35c08157
KLC
8232 return FALSE;
8233 }
1c8f6a4d
KLC
8234 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8235 {
8236 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
8237 &pic_ext_target);
8238 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
8239 return FALSE;
8240 break;
8241 }
35c08157
KLC
8242 }
8243
8244 return TRUE;
8245}
8246
8247static void
8248nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8249 Elf_Internal_Rela *reloc,
8250 Elf_Internal_Rela *internal_relocs,
8251 Elf_Internal_Rela *irelend,
8252 unsigned short insn16)
8253{
8254 Elf_Internal_Rela *pc_rel;
8255 bfd_vma offset;
8256
8257 offset = reloc->r_offset;
8258 bfd_putb16 (insn16, contents + offset);
8259 /* Find the first relocation of the same relocation-type,
8260 so we iteratie them forward. */
8261 pc_rel = reloc;
8262 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8263 pc_rel--;
8264
8265 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8266 {
8267 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8268 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8269 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8270 {
8271 pc_rel->r_info =
8272 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8273 }
8274 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8275 pc_rel->r_info =
8276 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8277 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8278 pc_rel->r_info =
8279 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8280 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8281 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8282 pc_rel->r_info =
8283 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC
8284 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8285 pc_rel->r_info =
8286 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
8287 }
8288}
8289
8290/* Find a relocation of type specified by `reloc_type'
8291 of the same r_offset with reloc.
8292 If not found, return irelend.
8293
8294 Assuming relocations are sorted by r_offset,
8295 we find the relocation from `reloc' backward untill relocs,
8296 or find it from `reloc' forward untill irelend. */
8297
8298static Elf_Internal_Rela *
8299find_relocs_at_address (Elf_Internal_Rela *reloc,
8300 Elf_Internal_Rela *relocs,
8301 Elf_Internal_Rela *irelend,
8302 enum elf_nds32_reloc_type reloc_type)
8303{
8304 Elf_Internal_Rela *rel_t;
8305
8306 /* Find backward. */
8307 for (rel_t = reloc;
8308 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8309 rel_t--)
8310 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8311 return rel_t;
8312
1c8f6a4d 8313 /* We didn't find it backward. Try find it forward. */
35c08157
KLC
8314 for (rel_t = reloc;
8315 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8316 rel_t++)
8317 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8318 return rel_t;
8319
8320 return irelend;
8321}
8322
8323/* Find a relocation of specified type and offset.
8324 `reloc' is just a refence point to find a relocation at specified offset.
8325 If not found, return irelend.
8326
8327 Assuming relocations are sorted by r_offset,
8328 we find the relocation from `reloc' backward untill relocs,
8329 or find it from `reloc' forward untill irelend. */
8330
8331static Elf_Internal_Rela *
8332find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8333 Elf_Internal_Rela *relocs,
8334 Elf_Internal_Rela *irelend,
6cae483a 8335 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC
8336 bfd_vma offset_p)
8337{
8338 Elf_Internal_Rela *rel_t = NULL;
8339
8340 /* First, we try to find a relocation of offset `offset_p',
8341 and then we use find_relocs_at_address to find specific type. */
8342
8343 if (reloc->r_offset > offset_p)
8344 {
8345 /* Find backward. */
8346 for (rel_t = reloc;
8347 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8348 /* Do nothing. */;
8349 }
8350 else if (reloc->r_offset < offset_p)
8351 {
8352 /* Find forward. */
8353 for (rel_t = reloc;
8354 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8355 /* Do nothing. */;
8356 }
8357 else
8358 rel_t = reloc;
8359
8360 /* Not found? */
8361 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8362 return irelend;
8363
8364 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8365}
8366
8367static bfd_boolean
8368nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8369 Elf_Internal_Rela *internal_relocs,
8370 Elf_Internal_Rela *irelend,
8371 unsigned char reloc_type)
8372{
8373 Elf_Internal_Rela *rel_t;
8374
8375 for (rel_t = reloc;
8376 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8377 rel_t--)
8378 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8379 {
8380 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8381 && rel_t->r_addend == reloc->r_addend)
8382 continue;
8383 return TRUE;
8384 }
8385
8386 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8387 rel_t++)
8388 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8389 {
8390 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8391 && rel_t->r_addend == reloc->r_addend)
8392 continue;
8393 return TRUE;
8394 }
8395
8396 return FALSE;
8397}
8398
8399typedef struct nds32_elf_blank nds32_elf_blank_t;
8400struct nds32_elf_blank
8401{
8402 /* Where the blank begins. */
8403 bfd_vma offset;
8404 /* The size of the blank. */
8405 bfd_vma size;
8406 /* The accumulative size before this blank. */
8407 bfd_vma total_size;
8408 nds32_elf_blank_t *next;
8409 nds32_elf_blank_t *prev;
8410};
8411
8412static nds32_elf_blank_t *blank_free_list = NULL;
8413
8414static nds32_elf_blank_t *
8415create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8416{
8417 nds32_elf_blank_t *blank_t;
8418
8419 if (blank_free_list)
8420 {
8421 blank_t = blank_free_list;
8422 blank_free_list = blank_free_list->next;
8423 }
8424 else
8425 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8426
8427 if (blank_t == NULL)
8428 return NULL;
8429
8430 blank_t->offset = offset_p;
8431 blank_t->size = size_p;
8432 blank_t->total_size = 0;
8433 blank_t->next = NULL;
8434 blank_t->prev = NULL;
8435
8436 return blank_t;
8437}
8438
8439static void
8440remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8441{
8442 if (blank_free_list)
8443 {
8444 blank_free_list->prev = blank_p;
8445 blank_p->next = blank_free_list;
8446 }
8447 else
8448 blank_p->next = NULL;
8449
8450 blank_p->prev = NULL;
8451 blank_free_list = blank_p;
8452}
8453
8454static void
8455clean_nds32_elf_blank (void)
8456{
8457 nds32_elf_blank_t *blank_t;
8458
8459 while (blank_free_list)
8460 {
8461 blank_t = blank_free_list;
8462 blank_free_list = blank_free_list->next;
8463 free (blank_t);
8464 }
8465}
8466
8467static nds32_elf_blank_t *
8468search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8469{
8470 nds32_elf_blank_t *blank_t;
8471
8472 if (!blank_p)
8473 return NULL;
8474 blank_t = blank_p;
8475
8476 while (blank_t && addr < blank_t->offset)
8477 blank_t = blank_t->prev;
8478 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8479 blank_t = blank_t->next;
8480
8481 return blank_t;
8482}
8483
8484static bfd_vma
8485get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8486 int overwrite)
8487{
8488 nds32_elf_blank_t *blank_t;
8489
8490 blank_t = search_nds32_elf_blank (*blank_p, addr);
8491 if (!blank_t)
8492 return 0;
8493
8494 if (overwrite)
8495 *blank_p = blank_t;
8496
8497 if (addr < blank_t->offset + blank_t->size)
8498 return blank_t->total_size + (addr - blank_t->offset);
8499 else
8500 return blank_t->total_size + blank_t->size;
8501}
8502
8503static bfd_boolean
8504insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8505{
8506 nds32_elf_blank_t *blank_t, *blank_t2;
8507
8508 if (!*blank_p)
8509 {
8510 *blank_p = create_nds32_elf_blank (addr, len);
8511 return *blank_p ? TRUE : FALSE;
8512 }
8513
8514 blank_t = search_nds32_elf_blank (*blank_p, addr);
8515
8516 if (blank_t == NULL)
8517 {
8518 blank_t = create_nds32_elf_blank (addr, len);
8519 if (!blank_t)
8520 return FALSE;
8521 while ((*blank_p)->prev != NULL)
8522 *blank_p = (*blank_p)->prev;
8523 blank_t->next = *blank_p;
8524 (*blank_p)->prev = blank_t;
8525 (*blank_p) = blank_t;
8526 return TRUE;
8527 }
8528
8529 if (addr < blank_t->offset + blank_t->size)
8530 {
8531 if (addr > blank_t->offset + blank_t->size)
8532 blank_t->size = addr - blank_t->offset;
8533 }
8534 else
8535 {
8536 blank_t2 = create_nds32_elf_blank (addr, len);
8537 if (!blank_t2)
8538 return FALSE;
8539 if (blank_t->next)
8540 {
8541 blank_t->next->prev = blank_t2;
8542 blank_t2->next = blank_t->next;
8543 }
8544 blank_t2->prev = blank_t;
8545 blank_t->next = blank_t2;
8546 *blank_p = blank_t2;
8547 }
8548
8549 return TRUE;
8550}
8551
8552static bfd_boolean
8553insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8554 bfd_vma len)
8555{
8556 nds32_elf_blank_t *blank_t;
8557
8558 if (!insert_nds32_elf_blank (blank_p, addr, len))
8559 return FALSE;
8560
8561 blank_t = *blank_p;
8562
8563 if (!blank_t->prev)
8564 {
8565 blank_t->total_size = 0;
8566 blank_t = blank_t->next;
8567 }
8568
8569 while (blank_t)
8570 {
8571 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8572 blank_t = blank_t->next;
8573 }
8574
8575 return TRUE;
8576}
8577
8578static void
8579calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8580{
8581 nds32_elf_blank_t *blank_t;
8582 bfd_vma total_size = 0;
8583
8584 if (!blank_p)
8585 return;
8586
8587 blank_t = blank_p;
8588 while (blank_t->prev)
8589 blank_t = blank_t->prev;
8590 while (blank_t)
8591 {
8592 blank_t->total_size = total_size;
8593 total_size += blank_t->size;
8594 blank_t = blank_t->next;
8595 }
8596}
8597
8598static bfd_boolean
8599nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8600 nds32_elf_blank_t *blank_p)
8601{
8602 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8603 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC
8604 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8605 unsigned int sec_shndx; /* The section the be relaxed. */
8606 bfd_byte *contents; /* Contents data of iterating section. */
8607 Elf_Internal_Rela *internal_relocs;
8608 Elf_Internal_Rela *irel;
8609 Elf_Internal_Rela *irelend;
8610 struct elf_link_hash_entry **sym_hashes;
8611 struct elf_link_hash_entry **end_hashes;
8612 unsigned int symcount;
8613 asection *sect;
8614 nds32_elf_blank_t *blank_t;
8615 nds32_elf_blank_t *blank_t2;
8616 nds32_elf_blank_t *blank_head;
8617
8618 blank_head = blank_t = blank_p;
8619 while (blank_head->prev != NULL)
8620 blank_head = blank_head->prev;
8621 while (blank_t->next != NULL)
8622 blank_t = blank_t->next;
8623
8624 if (blank_t->offset + blank_t->size <= sec->size)
8625 {
8626 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8627 blank_t->next->prev = blank_t;
8628 }
8629 if (blank_head->offset > 0)
8630 {
8631 blank_head->prev = create_nds32_elf_blank (0, 0);
8632 blank_head->prev->next = blank_head;
8633 blank_head = blank_head->prev;
8634 }
8635
8636 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8637
8638 /* The deletion must stop at the next ALIGN reloc for an alignment
8639 power larger than the number of bytes we are deleting. */
8640
8641 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8642 if (!nds32_get_local_syms (abfd, sec, &isym))
8643 return FALSE;
8644
8645 if (isym == NULL)
8646 {
8647 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8648 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8649 symtab_hdr->contents = (bfd_byte *) isym;
8650 }
8651
8652 if (isym == NULL || symtab_hdr->sh_info == 0)
8653 return FALSE;
8654
8655 blank_t = blank_head;
8656 calc_nds32_blank_total (blank_head);
8657
8658 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8659 {
8660 /* Adjust all the relocs. */
8661
8662 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8663 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8664 TRUE /* keep_memory */);
8665 irelend = internal_relocs + sect->reloc_count;
8666
8667 blank_t = blank_head;
8668 blank_t2 = blank_head;
8669
8670 if (!(sect->flags & SEC_RELOC))
8671 continue;
8672
0c4bd9d9 8673 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC
8674
8675 for (irel = internal_relocs; irel < irelend; irel++)
8676 {
8677 bfd_vma raddr;
8678
8679 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8680 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8681 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8682 {
8683 unsigned long val = 0;
1c8f6a4d
KLC
8684 unsigned long mask;
8685 long before, between;
6cae483a 8686 long offset = 0;
35c08157
KLC
8687
8688 switch (ELF32_R_TYPE (irel->r_info))
8689 {
8690 case R_NDS32_DIFF8:
1c8f6a4d 8691 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC
8692 break;
8693 case R_NDS32_DIFF16:
1c8f6a4d 8694 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC
8695 break;
8696 case R_NDS32_DIFF32:
8697 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC
8698 /* Get the signed bit and mask for the high part. The
8699 gcc will alarm when right shift 32-bit since the
8700 type size of long may be 32-bit. */
8701 mask = 0 - (val >> 31);
8702 if (mask)
8703 offset = (val | (mask - 0xffffffff));
8704 else
8705 offset = val;
35c08157
KLC
8706 break;
8707 default:
8708 BFD_ASSERT (0);
8709 }
8710
8711 /* DIFF value
8712 0 |encoded in location|
8713 |------------|-------------------|---------
8714 sym+off(addend)
8715 -- before ---| *****************
8716 --------------------- between ---|
8717
1c8f6a4d
KLC
8718 We only care how much data are relax between DIFF,
8719 marked as ***. */
35c08157
KLC
8720
8721 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8722 between = get_nds32_elf_blank_total (&blank_t,
8723 irel->r_addend + offset, 0);
35c08157
KLC
8724 if (between == before)
8725 goto done_adjust_diff;
8726
8727 switch (ELF32_R_TYPE (irel->r_info))
8728 {
8729 case R_NDS32_DIFF8:
1c8f6a4d
KLC
8730 bfd_put_8 (abfd, offset - (between - before),
8731 contents + irel->r_offset);
35c08157
KLC
8732 break;
8733 case R_NDS32_DIFF16:
1c8f6a4d
KLC
8734 bfd_put_16 (abfd, offset - (between - before),
8735 contents + irel->r_offset);
35c08157
KLC
8736 break;
8737 case R_NDS32_DIFF32:
1c8f6a4d
KLC
8738 bfd_put_32 (abfd, offset - (between - before),
8739 contents + irel->r_offset);
35c08157
KLC
8740 break;
8741 }
8742 }
8743 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8744 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8745 {
8746 bfd_vma val = 0;
8747 unsigned int len = 0;
8748 unsigned long before, between;
8749 bfd_byte *endp, *p;
8750
1c8f6a4d
KLC
8751 val = read_unsigned_leb128 (abfd, contents + irel->r_offset,
8752 &len);
35c08157
KLC
8753
8754 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8755 between = get_nds32_elf_blank_total (&blank_t,
8756 irel->r_addend + val, 0);
35c08157
KLC
8757 if (between == before)
8758 goto done_adjust_diff;
8759
8760 p = contents + irel->r_offset;
8761 endp = p + len -1;
8762 memset (p, 0x80, len);
8763 *(endp) = 0;
8764 p = write_uleb128 (p, val - (between - before)) - 1;
8765 if (p < endp)
8766 *p |= 0x80;
8767 }
8768done_adjust_diff:
8769
8770 if (sec == sect)
8771 {
8772 raddr = irel->r_offset;
1c8f6a4d
KLC
8773 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8774 irel->r_offset, 1);
35c08157
KLC
8775
8776 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8777 continue;
8778 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC
8779 && (blank_t2->offset > raddr
8780 || blank_t2->next->offset <= raddr))
8781 (*_bfd_error_handler)
8782 (_("%B: %s\n"), abfd,
8783 "Error: search_nds32_elf_blank reports wrong node");
35c08157
KLC
8784
8785 /* Mark reloc in deleted portion as NONE.
8786 For some relocs like R_NDS32_LABEL that doesn't modify the
8787 content in the section. R_NDS32_LABEL doesn't belong to the
8788 instruction in the section, so we should preserve it. */
8789 if (raddr >= blank_t2->offset
8790 && raddr < blank_t2->offset + blank_t2->size
8791 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8792 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8793 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8794 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8795 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8796 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8797 {
8798 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8799 R_NDS32_NONE);
8800 continue;
8801 }
8802 }
8803
8804 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8805 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8806 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8807 continue;
8808
8809 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8810 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8811 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8812 {
8813 if (irel->r_addend <= sec->size)
8814 irel->r_addend -=
8815 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8816 }
8817 }
8818 }
8819
8820 /* Adjust the local symbols defined in this section. */
8821 blank_t = blank_head;
8822 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8823 {
8824 if (isym->st_shndx == sec_shndx)
8825 {
8826 if (isym->st_value <= sec->size)
8827 {
8828 bfd_vma ahead;
8829 bfd_vma orig_addr = isym->st_value;
8830
8831 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8832 isym->st_value -= ahead;
8833
8834 /* Adjust function size. */
1c8f6a4d
KLC
8835 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8836 && isym->st_size > 0)
8837 isym->st_size -=
8838 get_nds32_elf_blank_total
8839 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC
8840 }
8841 }
8842 }
8843
8844 /* Now adjust the global symbols defined in this section. */
8845 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8846 - symtab_hdr->sh_info);
8847 sym_hashes = elf_sym_hashes (abfd);
8848 end_hashes = sym_hashes + symcount;
8849 blank_t = blank_head;
8850 for (; sym_hashes < end_hashes; sym_hashes++)
8851 {
8852 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8853
8854 if ((sym_hash->root.type == bfd_link_hash_defined
8855 || sym_hash->root.type == bfd_link_hash_defweak)
8856 && sym_hash->root.u.def.section == sec)
8857 {
8858 if (sym_hash->root.u.def.value <= sec->size)
8859 {
8860 bfd_vma ahead;
8861 bfd_vma orig_addr = sym_hash->root.u.def.value;
8862
8863 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8864 sym_hash->root.u.def.value -= ahead;
8865
8866 /* Adjust function size. */
8867 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC
8868 sym_hash->size -=
8869 get_nds32_elf_blank_total
8870 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC
8871
8872 }
8873 }
8874 }
8875
8876 contents = elf_section_data (sec)->this_hdr.contents;
8877 blank_t = blank_head;
8878 while (blank_t->next)
8879 {
8880 /* Actually delete the bytes. */
8881
8882 /* If current blank is the last blank overlap with current section,
8883 go to finish process. */
8884 if (sec->size <= (blank_t->next->offset))
8885 break;
8886
8887 memmove (contents + blank_t->offset - blank_t->total_size,
8888 contents + blank_t->offset + blank_t->size,
8889 blank_t->next->offset - (blank_t->offset + blank_t->size));
8890
8891 blank_t = blank_t->next;
8892 }
8893
8894 if (sec->size > (blank_t->offset + blank_t->size))
8895 {
8896 /* There are remaining code between blank and section boundary.
8897 Move the remaining code to appropriate location. */
8898 memmove (contents + blank_t->offset - blank_t->total_size,
8899 contents + blank_t->offset + blank_t->size,
8900 sec->size - (blank_t->offset + blank_t->size));
8901 sec->size -= blank_t->total_size + blank_t->size;
8902 }
8903 else
8904 /* This blank is not entirely included in the section,
8905 reduce the section size by only part of the blank size. */
8906 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8907
8908 while (blank_head)
8909 {
8910 blank_t = blank_head;
8911 blank_head = blank_head->next;
8912 remove_nds32_elf_blank (blank_t);
8913 }
8914
8915 return TRUE;
8916}
8917
8918/* Get the contents of a section. */
8919
8920static int
0c4bd9d9
KLC
8921nds32_get_section_contents (bfd *abfd, asection *sec,
8922 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC
8923{
8924 /* Get the section contents. */
8925 if (elf_section_data (sec)->this_hdr.contents != NULL)
8926 *contents_p = elf_section_data (sec)->this_hdr.contents;
8927 else
8928 {
8929 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8930 return FALSE;
0c4bd9d9
KLC
8931 if (cache)
8932 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC
8933 }
8934
8935 return TRUE;
8936}
8937
8938/* Get the contents of the internal symbol of abfd. */
8939
8940static int
8941nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8942 Elf_Internal_Sym **isymbuf_p)
8943{
8944 Elf_Internal_Shdr *symtab_hdr;
8945 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8946
8947 /* Read this BFD's local symbols if we haven't done so already. */
8948 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8949 {
8950 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8951 if (*isymbuf_p == NULL)
8952 {
8953 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8954 symtab_hdr->sh_info, 0,
8955 NULL, NULL, NULL);
8956 if (*isymbuf_p == NULL)
8957 return FALSE;
8958 }
8959 }
8960 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8961
8962 return TRUE;
8963}
8964
8965/* Range of small data. */
1c8f6a4d
KLC
8966static bfd_vma sdata_range[2][2];
8967static bfd_vma const sdata_init_range[2] =
8968{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC
8969
8970static int
8971nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8972 bfd_byte *contents, bfd_vma addr)
8973{
8974 unsigned long insn = bfd_getb32 (contents + addr);
8975
8976 if (insn & 0x80000000)
8977 return 2;
8978
8979 return 4;
8980}
8981
8982/* Set the gp relax range. We have to measure the safe range
8983 to do gp relaxation. */
8984
8985static void
8986relax_range_measurement (bfd *abfd)
8987{
8988 asection *sec_f, *sec_b;
8989 /* For upper bound. */
8990 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8991 bfd_vma align;
35c08157
KLC
8992 static int decide_relax_range = 0;
8993 int i;
1c8f6a4d 8994 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC
8995
8996 if (decide_relax_range)
8997 return;
8998 decide_relax_range = 1;
8999
9000 if (sda_rela_sec == NULL)
9001 {
9002 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 9003 for (i = 0; i < range_number; i++)
35c08157
KLC
9004 {
9005 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9006 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9007 }
9008 return;
9009 }
9010
9011 /* Get the biggest alignment power after the gp located section. */
9012 sec_f = sda_rela_sec->output_section;
9013 sec_b = sec_f->next;
9014 align = 0;
9015 while (sec_b != NULL)
9016 {
9017 if ((unsigned)(1 << sec_b->alignment_power) > align)
9018 align = (1 << sec_b->alignment_power);
9019 sec_b = sec_b->next;
9020 }
9021
9022 /* I guess we can not determine the section before
9023 gp located section, so we assume the align is max page size. */
1c8f6a4d 9024 for (i = 0; i < range_number; i++)
35c08157 9025 {
1c8f6a4d 9026 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9027 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9028 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC
9029 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9030 }
9031}
9032
9033/* These are macros used to check flags encoded in r_addend.
9034 They are only used by nds32_elf_relax_section (). */
9035#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9036#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9037#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9038#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9039
1c8f6a4d
KLC
9040/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9041
35c08157 9042static bfd_boolean
1c8f6a4d
KLC
9043nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9044 Elf_Internal_Rela *internal_relocs, int *insn_len,
9045 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9046 Elf_Internal_Shdr *symtab_hdr)
9047{
9048 /* There are 3 variations for LONGCALL1
9049 case 4-4-2; 16-bit on, optimize off or optimize for space
9050 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9051 ori ta, ta, lo12(symbol) ; LO12S0
9052 jral5 ta ;
9053
9054 case 4-4-4; 16-bit off, optimize don't care
9055 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9056 ori ta, ta, lo12(symbol) ; LO12S0
9057 jral ta ;
9058
9059 case 4-4-4; 16-bit on, optimize for speed
9060 sethi ta, hi20(symbol) ; LONGCALL1/HI20
9061 ori ta, ta, lo12(symbol) ; LO12S0
9062 jral ta ;
9063 Check code for -mlong-calls output. */
9064
9065 /* Get the reloc for the address from which the register is
9066 being loaded. This reloc will tell us which function is
9067 actually being called. */
9068
9069 bfd_vma laddr;
9070 int seq_len; /* Original length of instruction sequence. */
35c08157 9071 uint32_t insn;
1c8f6a4d
KLC
9072 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9073 int pic_ext_target = 0;
9074 bfd_signed_vma foff;
35c08157 9075 uint16_t insn16;
35c08157 9076
1c8f6a4d
KLC
9077 irelend = internal_relocs + sec->reloc_count;
9078 seq_len = GET_SEQ_LEN (irel->r_addend);
9079 laddr = irel->r_offset;
9080 *insn_len = seq_len;
35c08157 9081
1c8f6a4d
KLC
9082 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9083 R_NDS32_HI20_RELA, laddr);
9084 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9085 R_NDS32_LO12S0_ORI_RELA,
9086 laddr + 4);
35c08157 9087
1c8f6a4d 9088 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157
KLC
9089 {
9090 (*_bfd_error_handler)
1c8f6a4d
KLC
9091 ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
9092 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9093 return FALSE;
35c08157
KLC
9094 }
9095
1c8f6a4d
KLC
9096 /* Get the value of the symbol referred to by the reloc. */
9097 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9098 &pic_ext_target);
35c08157 9099
1c8f6a4d
KLC
9100 /* This condition only happened when symbol is undefined. */
9101 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9102 || foff >= CONSERVATIVE_24BIT_S1)
9103 return FALSE;
35c08157 9104
1c8f6a4d
KLC
9105 /* Relax to: jal symbol; 25_PCREL */
9106 /* For simplicity of coding, we are going to modify the section
9107 contents, the section relocs, and the BFD symbol table. We
9108 must tell the rest of the code not to free up this
9109 information. It would be possible to instead create a table
9110 of changes which have to be made, as is done in coff-mips.c;
9111 that would be more work, but would require less memory when
9112 the linker is run. */
9113
9114 /* Replace the long call with a jal. */
9115 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9116 R_NDS32_25_PCREL_RELA);
9117 irel->r_addend = hi_irelfn->r_addend;
9118
9119 /* We don't resolve this here but resolve it in relocate_section. */
9120 insn = INSN_JAL;
9121 bfd_putb32 (insn, contents + irel->r_offset);
9122
9123 hi_irelfn->r_info =
9124 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9125 lo_irelfn->r_info =
9126 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9127 *insn_len = 4;
9128
9129 if (seq_len & 0x2)
9130 {
9131 insn16 = NDS32_NOP16;
9132 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9133 lo_irelfn->r_info =
9134 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9135 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9136 *insn_len += 2;
9137 }
9138 return TRUE;
9139}
35c08157 9140
1c8f6a4d
KLC
9141#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9142/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9143
1c8f6a4d
KLC
9144static bfd_boolean
9145nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9146 Elf_Internal_Rela *internal_relocs, int *insn_len,
9147 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9148 Elf_Internal_Shdr *symtab_hdr)
9149{
9150 /* bltz rt, .L1 ; LONGCALL2
9151 jal symbol ; 25_PCREL
9152 .L1: */
35c08157 9153
1c8f6a4d
KLC
9154 /* Get the reloc for the address from which the register is
9155 being loaded. This reloc will tell us which function is
9156 actually being called. */
35c08157 9157
1c8f6a4d
KLC
9158 bfd_vma laddr;
9159 uint32_t insn;
9160 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
9161 int pic_ext_target = 0;
9162 bfd_signed_vma foff;
35c08157 9163
1c8f6a4d
KLC
9164 irelend = internal_relocs + sec->reloc_count;
9165 laddr = irel->r_offset;
9166 i1_irelfn =
9167 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9168 R_NDS32_25_PCREL_RELA, laddr + 4);
9169
9170 if (i1_irelfn == irelend)
35c08157 9171 {
1c8f6a4d
KLC
9172 (*_bfd_error_handler)
9173 ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
9174 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9175 return FALSE;
35c08157
KLC
9176 }
9177
1c8f6a4d 9178 insn = bfd_getb32 (contents + laddr);
35c08157 9179
1c8f6a4d
KLC
9180 /* Get the value of the symbol referred to by the reloc. */
9181 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
9182 &pic_ext_target);
35c08157 9183
1c8f6a4d
KLC
9184 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9185 || foff >= CONSERVATIVE_16BIT_S1)
9186 return FALSE;
35c08157 9187
1c8f6a4d
KLC
9188 /* Relax to bgezal rt, label ; 17_PCREL
9189 or bltzal rt, label ; 17_PCREL */
9190
9191 /* Convert to complimentary conditional call. */
9192 insn = CONVERT_CONDITION_CALL (insn);
9193
9194 /* For simplicity of coding, we are going to modify the section
9195 contents, the section relocs, and the BFD symbol table. We
9196 must tell the rest of the code not to free up this
9197 information. It would be possible to instead create a table
9198 of changes which have to be made, as is done in coff-mips.c;
9199 that would be more work, but would require less memory when
9200 the linker is run. */
9201
9202 /* Clean unnessary relocations. */
9203 i1_irelfn->r_info =
9204 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9205 cond_irelfn =
9206 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9207 R_NDS32_17_PCREL_RELA, laddr);
9208 if (cond_irelfn != irelend)
9209 cond_irelfn->r_info =
9210 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9211
9212 /* Replace the long call with a bgezal. */
9213 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9214 R_NDS32_17_PCREL_RELA);
9215 irel->r_addend = i1_irelfn->r_addend;
9216
9217 bfd_putb32 (insn, contents + irel->r_offset);
9218
9219 *insn_len = 4;
9220 return TRUE;
9221}
35c08157 9222
1c8f6a4d
KLC
9223/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9224
9225static bfd_boolean
9226nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9227 Elf_Internal_Rela *internal_relocs, int *insn_len,
9228 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9229 Elf_Internal_Shdr *symtab_hdr)
9230{
9231 /* There are 3 variations for LONGCALL3
9232 case 4-4-4-2; 16-bit on, optimize off or optimize for space
9233 bltz rt, $1 ; LONGCALL3
9234 sethi ta, hi20(symbol) ; HI20
9235 ori ta, ta, lo12(symbol) ; LO12S0
9236 jral5 ta ;
9237 $1
9238
9239 case 4-4-4-4; 16-bit off, optimize don't care
9240 bltz rt, $1 ; LONGCALL3
9241 sethi ta, hi20(symbol) ; HI20
9242 ori ta, ta, lo12(symbol) ; LO12S0
9243 jral ta ;
9244 $1
9245
9246 case 4-4-4-4; 16-bit on, optimize for speed
9247 bltz rt, $1 ; LONGCALL3
9248 sethi ta, hi20(symbol) ; HI20
9249 ori ta, ta, lo12(symbol) ; LO12S0
9250 jral ta ;
9251 $1 */
9252
9253 /* Get the reloc for the address from which the register is
9254 being loaded. This reloc will tell us which function is
9255 actually being called. */
9256
9257 bfd_vma laddr;
9258 int seq_len; /* Original length of instruction sequence. */
9259 uint32_t insn;
9260 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9261 int pic_ext_target = 0;
9262 bfd_signed_vma foff;
9263 uint16_t insn16;
9264
9265 irelend = internal_relocs + sec->reloc_count;
9266 seq_len = GET_SEQ_LEN (irel->r_addend);
9267 laddr = irel->r_offset;
9268 *insn_len = seq_len;
9269
9270 hi_irelfn =
9271 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9272 R_NDS32_HI20_RELA, laddr + 4);
9273 lo_irelfn =
9274 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9275 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9276
9277 if (hi_irelfn == irelend || lo_irelfn == irelend)
9278 {
9279 (*_bfd_error_handler)
9280 ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
9281 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9282 return FALSE;
35c08157
KLC
9283 }
9284
1c8f6a4d
KLC
9285 /* Get the value of the symbol referred to by the reloc. */
9286 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9287 &pic_ext_target);
35c08157 9288
1c8f6a4d
KLC
9289 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9290 || foff >= CONSERVATIVE_24BIT_S1)
9291 return FALSE;
35c08157 9292
1c8f6a4d
KLC
9293 insn = bfd_getb32 (contents + laddr);
9294 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9295 {
1c8f6a4d
KLC
9296 /* Relax to bgezal rt, label ; 17_PCREL
9297 or bltzal rt, label ; 17_PCREL */
35c08157 9298
1c8f6a4d
KLC
9299 /* Convert to complimentary conditional call. */
9300 insn = CONVERT_CONDITION_CALL (insn);
9301 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9302
1c8f6a4d
KLC
9303 *insn_len = 4;
9304 irel->r_info =
9305 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9306 hi_irelfn->r_info =
9307 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9308 lo_irelfn->r_info =
9309 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9310
9311 cond_irelfn =
9312 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9313 R_NDS32_17_PCREL_RELA, laddr);
9314 if (cond_irelfn != irelend)
35c08157 9315 {
1c8f6a4d
KLC
9316 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9317 R_NDS32_17_PCREL_RELA);
9318 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9319 }
1c8f6a4d
KLC
9320
9321 if (seq_len & 0x2)
35c08157 9322 {
1c8f6a4d
KLC
9323 insn16 = NDS32_NOP16;
9324 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9325 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9326 R_NDS32_INSN16);
9327 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9328 insn_len += 2;
35c08157 9329 }
1c8f6a4d
KLC
9330 }
9331 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9332 {
9333 /* Relax to the following instruction sequence
9334 bltz rt, $1 ; LONGCALL2
9335 jal symbol ; 25_PCREL
9336 $1 */
9337 *insn_len = 8;
9338 insn = INSN_JAL;
9339 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9340
1c8f6a4d
KLC
9341 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9342 R_NDS32_25_PCREL_RELA);
9343 irel->r_info =
9344 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9345
9346 lo_irelfn->r_info =
9347 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9348
1c8f6a4d 9349 if (seq_len & 0x2)
35c08157 9350 {
1c8f6a4d
KLC
9351 insn16 = NDS32_NOP16;
9352 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9353 lo_irelfn->r_info =
9354 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9355 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9356 insn_len += 2;
9357 }
9358 }
9359 return TRUE;
9360}
35c08157 9361
1c8f6a4d 9362/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9363
1c8f6a4d
KLC
9364static bfd_boolean
9365nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9366 Elf_Internal_Rela *internal_relocs, int *insn_len,
9367 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9368 Elf_Internal_Shdr *symtab_hdr)
9369{
9370 /* There are 3 variations for LONGJUMP1
9371 case 4-4-2; 16-bit bit on, optimize off or optimize for space
9372 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9373 ori ta, ta, lo12(symbol) ; LO12S0
9374 jr5 ta ;
9375
9376 case 4-4-4; 16-bit off, optimize don't care
9377 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9378 ori ta, ta, lo12(symbol) ; LO12S0
9379 jr ta ;
9380
9381 case 4-4-4; 16-bit on, optimize for speed
9382 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9383 ori ta, ta, lo12(symbol) ; LO12S0
9384 jr ta ; */
9385
9386 /* Get the reloc for the address from which the register is
9387 being loaded. This reloc will tell us which function is
9388 actually being called. */
9389
9390 bfd_vma laddr;
9391 int seq_len; /* Original length of instruction sequence. */
9392 int insn16_on; /* 16-bit on/off. */
9393 uint32_t insn;
9394 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9395 int pic_ext_target = 0;
9396 bfd_signed_vma foff;
9397 uint16_t insn16;
9398 unsigned long reloc;
35c08157 9399
1c8f6a4d
KLC
9400 irelend = internal_relocs + sec->reloc_count;
9401 seq_len = GET_SEQ_LEN (irel->r_addend);
9402 laddr = irel->r_offset;
9403 *insn_len = seq_len;
9404 insn16_on = IS_16BIT_ON (irel->r_addend);
9405
9406 hi_irelfn =
9407 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9408 R_NDS32_HI20_RELA, laddr);
9409 lo_irelfn =
9410 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9411 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9412 if (hi_irelfn == irelend || lo_irelfn == irelend)
9413 {
9414 (*_bfd_error_handler)
9415 ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
9416 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9417 return FALSE;
9418 }
35c08157 9419
1c8f6a4d
KLC
9420 /* Get the value of the symbol referred to by the reloc. */
9421 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9422 &pic_ext_target);
35c08157 9423
1c8f6a4d
KLC
9424 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9425 || foff < -CONSERVATIVE_24BIT_S1)
9426 return FALSE;
35c08157 9427
1c8f6a4d
KLC
9428 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9429 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9430 {
9431 /* j8 label */
9432 /* 16-bit on, but not optimized for speed. */
9433 reloc = R_NDS32_9_PCREL_RELA;
9434 insn16 = INSN_J8;
9435 bfd_putb16 (insn16, contents + irel->r_offset);
9436 *insn_len = 2;
9437 irel->r_info =
9438 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9439 }
9440 else
9441 {
9442 /* j label */
9443 reloc = R_NDS32_25_PCREL_RELA;
9444 insn = INSN_J;
9445 bfd_putb32 (insn, contents + irel->r_offset);
9446 *insn_len = 4;
9447 irel->r_info =
9448 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9449 irel->r_addend = 0;
9450 }
35c08157 9451
1c8f6a4d
KLC
9452 hi_irelfn->r_info =
9453 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9454 lo_irelfn->r_info =
9455 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9456
1c8f6a4d
KLC
9457 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9458 {
9459 insn16 = NDS32_NOP16;
9460 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9461 lo_irelfn->r_info =
9462 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9463 R_NDS32_INSN16);
9464 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9465 *insn_len += 2;
9466 }
9467 return TRUE;
9468}
9469
9470/* Revert condition branch. This function does not check if the input
9471 instruction is condition branch or not. */
9472
9473static void
9474nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9475 uint16_t *re_insn16, uint32_t *re_insn)
9476{
9477 uint32_t comp_insn = 0;
9478 uint16_t comp_insn16 = 0;
9479
9480 if (insn)
9481 {
9482 if (N32_OP6 (insn) == N32_OP6_BR1)
9483 {
9484 /* beqs label. */
9485 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9486 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9487 {
1c8f6a4d
KLC
9488 /* Insn can be contracted to 16-bit implied r5. */
9489 comp_insn16 =
9490 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9491 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9492 }
1c8f6a4d
KLC
9493 }
9494 else if (N32_OP6 (insn) == N32_OP6_BR3)
9495 {
9496 /* bnec $ta, imm11, label. */
9497 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9498 }
9499 else
9500 {
9501 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9502 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9503 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9504 {
1c8f6a4d 9505 if (N32_IS_RT3 (insn))
35c08157 9506 {
1c8f6a4d
KLC
9507 /* Insn can be contracted to 16-bit. */
9508 comp_insn16 =
9509 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9510 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9511 }
9512 else if (N32_RT5 (insn) == REG_R15)
9513 {
9514 /* Insn can be contracted to 16-bit. */
9515 comp_insn16 =
9516 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9517 }
35c08157
KLC
9518 }
9519 }
1c8f6a4d
KLC
9520 }
9521 else
9522 {
9523 switch ((insn16 & 0xf000) >> 12)
35c08157 9524 {
1c8f6a4d
KLC
9525 case 0xc:
9526 /* beqz38 or bnez38 */
9527 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9528 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9529 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9530 break;
35c08157 9531
1c8f6a4d
KLC
9532 case 0xd:
9533 /* beqs38 or bnes38 */
9534 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9535 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9536 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9537 | (REG_R5 << 15);
9538 break;
35c08157 9539
1c8f6a4d
KLC
9540 case 0xe:
9541 /* beqzS8 or bnezS8 */
9542 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9543 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9544 comp_insn |= REG_R15 << 20;
9545 break;
35c08157 9546
1c8f6a4d
KLC
9547 default:
9548 break;
9549 }
9550 }
9551 if (comp_insn && re_insn)
9552 *re_insn = comp_insn;
9553 if (comp_insn16 && re_insn16)
9554 *re_insn16 = comp_insn16;
9555}
35c08157 9556
1c8f6a4d 9557/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9558
1c8f6a4d
KLC
9559static bfd_boolean
9560nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9561 Elf_Internal_Rela *internal_relocs, int *insn_len,
9562 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9563 Elf_Internal_Shdr *symtab_hdr)
9564{
9565 /* There are 3 variations for LONGJUMP2
9566 case 2-4; 1st insn convertible, 16-bit on,
9567 optimize off or optimize for space
9568 bnes38 rt, ra, $1 ; LONGJUMP2
9569 j label ; 25_PCREL
9570 $1:
9571
9572 case 4-4; 1st insn not convertible
9573 bne rt, ra, $1 ; LONGJUMP2
9574 j label ; 25_PCREL
9575 $1:
9576
9577 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9578 bne rt, ra, $1 ; LONGJUMP2
9579 j label ; 25_PCREL
9580 $1: */
9581
9582 /* Get the reloc for the address from which the register is
9583 being loaded. This reloc will tell us which function is
9584 actually being called. */
9585
9586 bfd_vma laddr;
9587 int seq_len; /* Original length of instruction sequence. */
9588 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9589 int pic_ext_target = 0, first_size;
9590 unsigned int i;
9591 bfd_signed_vma foff;
9592 uint32_t insn, re_insn = 0;
9593 uint16_t insn16, re_insn16 = 0;
9594 unsigned long reloc, cond_reloc;
35c08157 9595
1c8f6a4d
KLC
9596 enum elf_nds32_reloc_type checked_types[] =
9597 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9598
1c8f6a4d
KLC
9599 irelend = internal_relocs + sec->reloc_count;
9600 seq_len = GET_SEQ_LEN (irel->r_addend);
9601 laddr = irel->r_offset;
9602 *insn_len = seq_len;
9603 first_size = (seq_len == 6) ? 2 : 4;
9604
9605 i2_irelfn =
9606 find_relocs_at_address_addr (irel, internal_relocs,
9607 irelend, R_NDS32_25_PCREL_RELA,
9608 laddr + first_size);
9609
9610 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9611 {
9612 cond_irelfn =
9613 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9614 checked_types[i], laddr);
9615 if (cond_irelfn != irelend)
9616 break;
9617 }
35c08157 9618
1c8f6a4d
KLC
9619 if (i2_irelfn == irelend || cond_irelfn == irelend)
9620 {
9621 (*_bfd_error_handler)
9622 ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
9623 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9624 return FALSE;
9625 }
35c08157 9626
1c8f6a4d
KLC
9627 /* Get the value of the symbol referred to by the reloc. */
9628 foff =
9629 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9630 &pic_ext_target);
9631 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9632 || foff >= CONSERVATIVE_16BIT_S1)
9633 return FALSE;
35c08157 9634
1c8f6a4d
KLC
9635 /* Get the all corresponding instructions. */
9636 if (first_size == 4)
9637 {
9638 insn = bfd_getb32 (contents + laddr);
9639 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9640 }
9641 else
9642 {
9643 insn16 = bfd_getb16 (contents + laddr);
9644 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9645 }
35c08157 9646
1c8f6a4d
KLC
9647 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9648 && foff < ACCURATE_8BIT_S1 - first_size)
9649 {
9650 if (first_size == 4)
9651 {
9652 /* Don't convert it to 16-bit now, keep this as relaxable for
9653 ``label reloc; INSN16''. */
35c08157 9654
1c8f6a4d
KLC
9655 /* Save comp_insn32 to buffer. */
9656 bfd_putb32 (re_insn, contents + irel->r_offset);
9657 *insn_len = 4;
9658 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9659 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9660 cond_reloc = R_NDS32_INSN16;
9661 }
9662 else
9663 {
9664 bfd_putb16 (re_insn16, contents + irel->r_offset);
9665 *insn_len = 2;
9666 reloc = R_NDS32_9_PCREL_RELA;
9667 cond_reloc = R_NDS32_NONE;
9668 }
9669 }
9670 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9671 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9672 && foff < ACCURATE_14BIT_S1 - first_size))
9673 {
9674 /* beqs label ; 15_PCREL */
9675 bfd_putb32 (re_insn, contents + irel->r_offset);
9676 *insn_len = 4;
9677 reloc = R_NDS32_15_PCREL_RELA;
9678 cond_reloc = R_NDS32_NONE;
9679 }
9680 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9681 && foff >= -CONSERVATIVE_16BIT_S1
9682 && foff < CONSERVATIVE_16BIT_S1)
9683 {
9684 /* beqz label ; 17_PCREL */
9685 bfd_putb32 (re_insn, contents + irel->r_offset);
9686 *insn_len = 4;
9687 reloc = R_NDS32_17_PCREL_RELA;
9688 cond_reloc = R_NDS32_NONE;
9689 }
9690 else
9691 return FALSE;
35c08157 9692
1c8f6a4d
KLC
9693 /* Set all relocations. */
9694 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9695 irel->r_addend = i2_irelfn->r_addend;
35c08157 9696
1c8f6a4d
KLC
9697 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9698 cond_reloc);
9699 cond_irelfn->r_addend = 0;
35c08157 9700
1c8f6a4d
KLC
9701 if ((seq_len ^ *insn_len ) & 0x2)
9702 {
9703 insn16 = NDS32_NOP16;
9704 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9705 i2_irelfn->r_offset = 4;
9706 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9707 R_NDS32_INSN16);
9708 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9709 *insn_len += 2;
9710 }
9711 else
9712 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9713 R_NDS32_NONE);
9714 return TRUE;
9715}
35c08157 9716
1c8f6a4d 9717/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9718
1c8f6a4d
KLC
9719static bfd_boolean
9720nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9721 Elf_Internal_Rela *internal_relocs, int *insn_len,
9722 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9723 Elf_Internal_Shdr *symtab_hdr)
9724{
9725 /* There are 5 variations for LONGJUMP3
9726 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9727 optimize off or optimize for space
9728 bnes38 rt, ra, $1 ; LONGJUMP3
9729 sethi ta, hi20(symbol) ; HI20
9730 ori ta, ta, lo12(symbol) ; LO12S0
9731 jr5 ta ;
9732 $1: ;
9733
9734 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
9735 bnes38 rt, ra, $1 ; LONGJUMP3
9736 sethi ta, hi20(symbol) ; HI20
9737 ori ta, ta, lo12(symbol) ; LO12S0
9738 jr5 ta ;
9739 $1: ; LABEL
9740
9741 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9742 optimize off or optimize for space
9743 bne rt, ra, $1 ; LONGJUMP3
9744 sethi ta, hi20(symbol) ; HI20
9745 ori ta, ta, lo12(symbol) ; LO12S0
9746 jr5 ta ;
9747 $1: ;
9748
9749 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9750 16-bit off if no INSN16
9751 bne rt, ra, $1 ; LONGJUMP3
9752 sethi ta, hi20(symbol) ; HI20
9753 ori ta, ta, lo12(symbol) ; LO12S0
9754 jr ta ;
9755 $1: ;
9756
9757 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9758 16-bit off if no INSN16
9759 bne rt, ra, $1 ; LONGJUMP3
9760 sethi ta, hi20(symbol) ; HI20
9761 ori ta, ta, lo12(symbol) ; LO12S0
9762 jr ta ;
9763 $1: ; LABEL */
9764
9765 /* Get the reloc for the address from which the register is
9766 being loaded. This reloc will tell us which function is
9767 actually being called. */
9768 enum elf_nds32_reloc_type checked_types[] =
9769 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9770
9771 int reloc_off = 0, cond_removed = 0, convertible;
9772 bfd_vma laddr;
9773 int seq_len; /* Original length of instruction sequence. */
9774 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9775 int pic_ext_target = 0, first_size;
9776 unsigned int i;
9777 bfd_signed_vma foff;
9778 uint32_t insn, re_insn = 0;
9779 uint16_t insn16, re_insn16 = 0;
9780 unsigned long reloc, cond_reloc;
35c08157 9781
1c8f6a4d
KLC
9782 irelend = internal_relocs + sec->reloc_count;
9783 seq_len = GET_SEQ_LEN (irel->r_addend);
9784 laddr = irel->r_offset;
9785 *insn_len = seq_len;
35c08157 9786
1c8f6a4d 9787 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9788
1c8f6a4d
KLC
9789 if (convertible)
9790 first_size = 2;
9791 else
9792 first_size = 4;
9793
9794 /* Get all needed relocations. */
9795 hi_irelfn =
9796 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9797 R_NDS32_HI20_RELA, laddr + first_size);
9798 lo_irelfn =
9799 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9800 R_NDS32_LO12S0_ORI_RELA,
9801 laddr + first_size + 4);
9802
9803 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9804 {
9805 cond_irelfn =
9806 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9807 checked_types[i], laddr);
9808 if (cond_irelfn != irelend)
9809 break;
9810 }
35c08157 9811
1c8f6a4d
KLC
9812 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9813 {
9814 (*_bfd_error_handler)
9815 ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
9816 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9817 return FALSE;
9818 }
35c08157 9819
1c8f6a4d
KLC
9820 /* Get the value of the symbol referred to by the reloc. */
9821 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9822 &pic_ext_target);
35c08157 9823
1c8f6a4d
KLC
9824 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9825 || foff >= CONSERVATIVE_24BIT_S1)
9826 return FALSE;
35c08157 9827
1c8f6a4d
KLC
9828 /* Get the all corresponding instructions. */
9829 if (first_size == 4)
9830 {
9831 insn = bfd_getb32 (contents + laddr);
9832 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9833 }
9834 else
9835 {
9836 insn16 = bfd_getb16 (contents + laddr);
9837 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9838 }
35c08157 9839
1c8f6a4d
KLC
9840 /* For simplicity of coding, we are going to modify the section
9841 contents, the section relocs, and the BFD symbol table. We
9842 must tell the rest of the code not to free up this
9843 information. It would be possible to instead create a table
9844 of changes which have to be made, as is done in coff-mips.c;
9845 that would be more work, but would require less memory when
9846 the linker is run. */
35c08157 9847
1c8f6a4d
KLC
9848 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9849 && foff < ACCURATE_8BIT_S1 - first_size)
9850 {
9851 if (!(seq_len & 0x2))
9852 {
9853 /* Don't convert it to 16-bit now, keep this as relaxable
9854 for ``label reloc; INSN1a''6. */
9855 /* Save comp_insn32 to buffer. */
9856 bfd_putb32 (re_insn, contents + irel->r_offset);
9857 *insn_len = 4;
9858 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9859 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9860 cond_reloc = R_NDS32_INSN16;
9861 }
9862 else
9863 {
9864 /* Not optimize for speed; convert sequence to 16-bit. */
9865 /* Save comp_insn16 to buffer. */
9866 bfd_putb16 (re_insn16, contents + irel->r_offset);
9867 *insn_len = 2;
9868 reloc = R_NDS32_9_PCREL_RELA;
9869 cond_reloc = R_NDS32_NONE;
9870 }
9871 cond_removed = 1;
9872 }
9873 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9874 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9875 && foff < ACCURATE_14BIT_S1 - first_size))
9876 {
9877 /* beqs label ; 15_PCREL */
9878 bfd_putb32 (re_insn, contents + irel->r_offset);
9879 *insn_len = 4;
9880 reloc = R_NDS32_15_PCREL_RELA;
9881 cond_reloc = R_NDS32_NONE;
9882 cond_removed = 1;
9883 }
9884 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9885 && foff >= -CONSERVATIVE_16BIT_S1
9886 && foff < CONSERVATIVE_16BIT_S1)
9887 {
9888 /* beqz label ; 17_PCREL */
9889 bfd_putb32 (re_insn, contents + irel->r_offset);
9890 *insn_len = 4;
9891 reloc = R_NDS32_17_PCREL_RELA;
9892 cond_reloc = R_NDS32_NONE;
9893 cond_removed = 1;
9894 }
9895 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9896 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9897 {
9898 /* Relax to one of the following 3 variations
9899
9900 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9901 for space
9902 bnes38 rt, $1 ; LONGJUMP2
9903 j label ; 25_PCREL
9904 $1
9905
9906 case 4-4; 1st insn not convertible, others don't care
9907 bne rt, ra, $1 ; LONGJUMP2
9908 j label ; 25_PCREL
9909 $1
9910
9911 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9912 bne rt, ra, $1 ; LONGJUMP2
9913 j label ; 25_PCREL
9914 $1 */
9915
9916 /* Offset for first instruction. */
9917
9918 /* Use j label as second instruction. */
9919 *insn_len = 4 + first_size;
9920 insn = INSN_J;
9921 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9922 reloc = R_NDS32_LONGJUMP2;
9923 cond_reloc = R_NDS32_25_PLTREL;
9924 }
9925 else
9926 return FALSE;
35c08157 9927
1c8f6a4d
KLC
9928 if (cond_removed == 1)
9929 {
9930 /* Set all relocations. */
9931 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9932 irel->r_addend = hi_irelfn->r_addend;
9933
9934 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9935 cond_reloc);
9936 cond_irelfn->r_addend = 0;
9937 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9938 R_NDS32_NONE);
9939 }
9940 else
9941 {
9942 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
9943 irel->r_addend = irel->r_addend;
9944 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9945 cond_reloc);
9946 }
35c08157 9947
1c8f6a4d
KLC
9948 if ((seq_len ^ *insn_len ) & 0x2)
9949 {
9950 insn16 = NDS32_NOP16;
9951 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9952 lo_irelfn->r_offset = *insn_len;
9953 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9954 R_NDS32_INSN16);
9955 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9956 *insn_len += 2;
9957 }
9958 else
9959 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9960 R_NDS32_NONE);
9961 return TRUE;
9962}
35c08157 9963
1c8f6a4d 9964/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9965
1c8f6a4d
KLC
9966static bfd_boolean
9967nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9968 Elf_Internal_Rela *internal_relocs, int *insn_len,
9969 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9970 Elf_Internal_Shdr *symtab_hdr)
9971{
9972 /* The pattern for LONGCALL4. Support for function cse.
9973 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9974 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9975 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9976
1c8f6a4d
KLC
9977 bfd_vma laddr;
9978 uint32_t insn;
9979 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9980 Elf_Internal_Rela *irelend;
9981 int pic_ext_target = 0;
9982 bfd_signed_vma foff;
35c08157 9983
1c8f6a4d
KLC
9984 irelend = internal_relocs + sec->reloc_count;
9985 laddr = irel->r_offset;
35c08157 9986
1c8f6a4d
KLC
9987 /* Get the reloc for the address from which the register is
9988 being loaded. This reloc will tell us which function is
9989 actually being called. */
9990 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9991 R_NDS32_HI20_RELA, laddr);
35c08157 9992
1c8f6a4d
KLC
9993 if (hi_irel == irelend)
9994 {
9995 (*_bfd_error_handler)
9996 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
9997 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
9998 return FALSE;
9999 }
35c08157 10000
1c8f6a4d
KLC
10001 /* Get the value of the symbol referred to by the reloc. */
10002 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10003 &pic_ext_target);
35c08157 10004
1c8f6a4d
KLC
10005 /* This condition only happened when symbol is undefined. */
10006 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10007 || foff >= CONSERVATIVE_24BIT_S1)
10008 return FALSE;
35c08157 10009
1c8f6a4d
KLC
10010 /* Relax to: jal symbol; 25_PCREL */
10011 /* For simplicity of coding, we are going to modify the section
10012 contents, the section relocs, and the BFD symbol table. We
10013 must tell the rest of the code not to free up this
10014 information. It would be possible to instead create a table
10015 of changes which have to be made, as is done in coff-mips.c;
10016 that would be more work, but would require less memory when
10017 the linker is run. */
35c08157 10018
1c8f6a4d
KLC
10019 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10020 R_NDS32_PTR_RESOLVED, irel->r_addend);
10021 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10022 R_NDS32_EMPTY, irel->r_addend);
35c08157 10023
1c8f6a4d
KLC
10024 if (ptr_irel == irelend || em_irel == irelend)
10025 {
10026 (*_bfd_error_handler)
10027 ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
10028 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10029 return FALSE;
10030 }
10031 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10032 insn = bfd_getb32 (contents + irel->r_addend);
10033 if (insn & 0x80000000)
10034 return FALSE;
35c08157 10035
1c8f6a4d
KLC
10036 /* Replace the long call with a jal. */
10037 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10038 R_NDS32_25_PCREL_RELA);
10039 ptr_irel->r_addend = 1;
35c08157 10040
1c8f6a4d
KLC
10041 /* We don't resolve this here but resolve it in relocate_section. */
10042 insn = INSN_JAL;
10043 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10044
1c8f6a4d
KLC
10045 irel->r_info =
10046 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10047
1c8f6a4d
KLC
10048 /* If there is function cse, HI20 can not remove now. */
10049 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10050 R_NDS32_LONGCALL4, laddr);
10051 if (call_irel == irelend)
10052 {
10053 *insn_len = 0;
10054 hi_irel->r_info =
10055 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10056 }
35c08157 10057
1c8f6a4d
KLC
10058 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10059 R_NDS32_INSN16, irel->r_addend);
10060 if (insn_irel != irelend)
10061 insn_irel->r_info =
10062 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10063
1c8f6a4d
KLC
10064 return TRUE;
10065}
35c08157 10066
1c8f6a4d 10067/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10068
1c8f6a4d
KLC
10069static bfd_boolean
10070nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10071 Elf_Internal_Rela *internal_relocs, int *insn_len,
10072 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10073 Elf_Internal_Shdr *symtab_hdr)
10074{
10075 /* The pattern for LONGCALL5.
10076 bltz rt, .L1 ; LONGCALL5/17_PCREL
10077 jal symbol ; 25_PCREL
10078 .L1: */
35c08157 10079
1c8f6a4d
KLC
10080 bfd_vma laddr;
10081 uint32_t insn;
10082 Elf_Internal_Rela *cond_irel, *irelend;
10083 int pic_ext_target = 0;
10084 bfd_signed_vma foff;
35c08157 10085
1c8f6a4d
KLC
10086 irelend = internal_relocs + sec->reloc_count;
10087 laddr = irel->r_offset;
10088 insn = bfd_getb32 (contents + laddr);
35c08157 10089
1c8f6a4d
KLC
10090 /* Get the reloc for the address from which the register is
10091 being loaded. This reloc will tell us which function is
10092 actually being called. */
10093 cond_irel =
10094 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10095 R_NDS32_25_PCREL_RELA, irel->r_addend);
10096 if (cond_irel == irelend)
10097 {
10098 (*_bfd_error_handler)
10099 ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
10100 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10101 return FALSE;
10102 }
35c08157 10103
1c8f6a4d
KLC
10104 /* Get the value of the symbol referred to by the reloc. */
10105 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10106 &pic_ext_target);
35c08157 10107
1c8f6a4d
KLC
10108 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10109 || foff >= CONSERVATIVE_16BIT_S1)
10110 return FALSE;
35c08157 10111
1c8f6a4d
KLC
10112 /* Relax to bgezal rt, label ; 17_PCREL
10113 or bltzal rt, label ; 17_PCREL */
35c08157 10114
1c8f6a4d
KLC
10115 /* Convert to complimentary conditional call. */
10116 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10117
1c8f6a4d
KLC
10118 /* For simplicity of coding, we are going to modify the section
10119 contents, the section relocs, and the BFD symbol table. We
10120 must tell the rest of the code not to free up this
10121 information. It would be possible to instead create a table
10122 of changes which have to be made, as is done in coff-mips.c;
10123 that would be more work, but would require less memory when
10124 the linker is run. */
35c08157 10125
1c8f6a4d
KLC
10126 /* Modify relocation and contents. */
10127 cond_irel->r_info =
10128 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10129
1c8f6a4d
KLC
10130 /* Replace the long call with a bgezal. */
10131 bfd_putb32 (insn, contents + cond_irel->r_offset);
10132 *insn_len = 0;
35c08157 10133
1c8f6a4d
KLC
10134 /* Clean unnessary relocations. */
10135 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10136
1c8f6a4d
KLC
10137 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10138 R_NDS32_17_PCREL_RELA, laddr);
10139 cond_irel->r_info =
10140 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10141
1c8f6a4d
KLC
10142 return TRUE;
10143}
35c08157 10144
1c8f6a4d 10145/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10146
1c8f6a4d
KLC
10147static bfd_boolean
10148nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10149 Elf_Internal_Rela *internal_relocs, int *insn_len,
10150 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10151 Elf_Internal_Shdr *symtab_hdr)
10152{
10153 /* The pattern for LONGCALL6.
10154 bltz rt, .L1 ; LONGCALL6/17_PCREL
10155 sethi ta, hi20(symbol) ; HI20/PTR
10156 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10157 jral ta ; PTR_RES/EMPTY/INSN16
10158 .L1 */
10159
10160 bfd_vma laddr;
10161 uint32_t insn;
10162 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
10163 int pic_ext_target = 0;
10164 bfd_signed_vma foff;
35c08157 10165
1c8f6a4d
KLC
10166 irelend = internal_relocs + sec->reloc_count;
10167 laddr = irel->r_offset;
35c08157 10168
1c8f6a4d
KLC
10169 /* Get the reloc for the address from which the register is
10170 being loaded. This reloc will tell us which function is
10171 actually being called. */
10172 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10173 R_NDS32_EMPTY, irel->r_addend);
35c08157 10174
1c8f6a4d
KLC
10175 if (em_irel == irelend)
10176 {
10177 (*_bfd_error_handler)
10178 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10179 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10180 return FALSE;
10181 }
35c08157 10182
1c8f6a4d
KLC
10183 /* Get the value of the symbol referred to by the reloc. */
10184 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10185 &pic_ext_target);
35c08157 10186
1c8f6a4d
KLC
10187 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10188 || foff >= CONSERVATIVE_24BIT_S1)
10189 return FALSE;
35c08157 10190
1c8f6a4d
KLC
10191 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10192 insn = bfd_getb32 (contents + irel->r_addend);
10193 if (insn & 0x80000000)
10194 return FALSE;
35c08157 10195
1c8f6a4d
KLC
10196 insn = bfd_getb32 (contents + laddr);
10197 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10198 {
10199 /* Relax to bgezal rt, label ; 17_PCREL
10200 or bltzal rt, label ; 17_PCREL */
35c08157 10201
1c8f6a4d
KLC
10202 /* Convert to complimentary conditional call. */
10203 *insn_len = 0;
10204 insn = CONVERT_CONDITION_CALL (insn);
10205 bfd_putb32 (insn, contents + em_irel->r_offset);
10206
10207 em_irel->r_info =
10208 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10209
10210 /* Set resolved relocation. */
10211 cond_irel =
10212 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10213 R_NDS32_PTR_RESOLVED, irel->r_addend);
10214 if (cond_irel == irelend)
35c08157 10215 {
1c8f6a4d
KLC
10216 (*_bfd_error_handler)
10217 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10218 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10219 return FALSE;
10220 }
10221 cond_irel->r_addend = 1;
35c08157 10222
1c8f6a4d 10223 /* Clear relocations. */
35c08157 10224
1c8f6a4d
KLC
10225 irel->r_info =
10226 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10227
1c8f6a4d
KLC
10228 cond_irel =
10229 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10230 R_NDS32_17_PCREL_RELA, laddr);
10231 if (cond_irel != irelend)
10232 cond_irel->r_info =
10233 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10234
1c8f6a4d
KLC
10235 cond_irel =
10236 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10237 R_NDS32_INSN16, irel->r_addend);
10238 if (cond_irel != irelend)
10239 cond_irel->r_info =
10240 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10241
1c8f6a4d
KLC
10242 }
10243 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10244 {
10245 /* Relax to the following instruction sequence
10246 bltz rt, .L1 ; LONGCALL2/17_PCREL
10247 jal symbol ; 25_PCREL/PTR_RES
10248 .L1 */
10249 *insn_len = 4;
10250 /* Convert instruction. */
10251 insn = INSN_JAL;
10252 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10253
1c8f6a4d
KLC
10254 /* Convert relocations. */
10255 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10256 R_NDS32_25_PCREL_RELA);
10257 irel->r_info =
10258 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10259
1c8f6a4d
KLC
10260 /* Set resolved relocation. */
10261 cond_irel =
10262 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10263 R_NDS32_PTR_RESOLVED, irel->r_addend);
10264 if (cond_irel == irelend)
10265 {
10266 (*_bfd_error_handler)
10267 ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
10268 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10269 return FALSE;
10270 }
10271 cond_irel->r_addend = 1;
35c08157 10272
1c8f6a4d
KLC
10273 cond_irel =
10274 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10275 R_NDS32_INSN16, irel->r_addend);
10276 if (cond_irel != irelend)
10277 cond_irel->r_info =
10278 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10279 }
10280 return TRUE;
10281}
35c08157 10282
1c8f6a4d 10283/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10284
1c8f6a4d
KLC
10285static bfd_boolean
10286nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10287 Elf_Internal_Rela *internal_relocs, int *insn_len,
10288 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10289 Elf_Internal_Shdr *symtab_hdr)
10290{
10291 /* The pattern for LONGJUMP4.
10292 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10293 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10294 jr ta ; PTR_RES/INSN16/EMPTY */
10295
10296 bfd_vma laddr;
10297 int seq_len; /* Original length of instruction sequence. */
10298 uint32_t insn;
10299 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10300 int pic_ext_target = 0;
10301 bfd_signed_vma foff;
35c08157 10302
1c8f6a4d
KLC
10303 irelend = internal_relocs + sec->reloc_count;
10304 seq_len = GET_SEQ_LEN (irel->r_addend);
10305 laddr = irel->r_offset;
10306 *insn_len = seq_len;
35c08157 10307
1c8f6a4d
KLC
10308 /* Get the reloc for the address from which the register is
10309 being loaded. This reloc will tell us which function is
10310 actually being called. */
35c08157 10311
1c8f6a4d
KLC
10312 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10313 R_NDS32_HI20_RELA, laddr);
35c08157 10314
1c8f6a4d
KLC
10315 if (hi_irel == irelend)
10316 {
10317 (*_bfd_error_handler)
10318 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10319 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10320 return FALSE;
10321 }
35c08157 10322
1c8f6a4d
KLC
10323 /* Get the value of the symbol referred to by the reloc. */
10324 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10325 &pic_ext_target);
35c08157 10326
1c8f6a4d
KLC
10327 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10328 || foff < -CONSERVATIVE_24BIT_S1)
10329 return FALSE;
35c08157 10330
1c8f6a4d
KLC
10331 /* Convert it to "j label", it may be converted to j8 in the final
10332 pass of relaxation. Therefore, we do not consider this currently. */
10333 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10334 R_NDS32_PTR_RESOLVED, irel->r_addend);
10335 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10336 R_NDS32_EMPTY, irel->r_addend);
35c08157 10337
1c8f6a4d
KLC
10338 if (ptr_irel == irelend || em_irel == irelend)
10339 {
10340 (*_bfd_error_handler)
10341 ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
10342 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10343 return FALSE;
10344 }
35c08157 10345
1c8f6a4d
KLC
10346 em_irel->r_info =
10347 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10348 ptr_irel->r_addend = 1;
35c08157 10349
1c8f6a4d
KLC
10350 /* Write instruction. */
10351 insn = INSN_J;
10352 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10353
1c8f6a4d
KLC
10354 /* Clear relocations. */
10355 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10356
1c8f6a4d
KLC
10357 /* If there is function cse, HI20 can not remove now. */
10358 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10359 R_NDS32_LONGJUMP4, laddr);
10360 if (call_irel == irelend)
10361 {
10362 *insn_len = 0;
10363 hi_irel->r_info =
10364 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10365 }
35c08157 10366
1c8f6a4d
KLC
10367 return TRUE;
10368}
35c08157 10369
1c8f6a4d 10370/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10371
1c8f6a4d
KLC
10372static bfd_boolean
10373nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10374 Elf_Internal_Rela *internal_relocs, int *insn_len,
10375 int *seq_len, bfd_byte *contents,
10376 Elf_Internal_Sym *isymbuf,
10377 Elf_Internal_Shdr *symtab_hdr)
10378{
10379 /* There are 2 variations for LONGJUMP5
10380 case 2-4; 1st insn convertible, 16-bit on.
10381 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10382 j label ; 25_PCREL/INSN16
10383 $1:
10384
10385 case 4-4; 1st insn not convertible
10386 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10387 j label ; 25_PCREL/INSN16
10388 .L1: */
10389
10390 bfd_vma laddr;
10391 Elf_Internal_Rela *cond_irel, *irelend;
10392 int pic_ext_target = 0;
10393 unsigned int i;
10394 bfd_signed_vma foff;
10395 uint32_t insn, re_insn = 0;
10396 uint16_t insn16, re_insn16 = 0;
10397 unsigned long reloc;
35c08157 10398
1c8f6a4d
KLC
10399 enum elf_nds32_reloc_type checked_types[] =
10400 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10401 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10402
1c8f6a4d
KLC
10403 irelend = internal_relocs + sec->reloc_count;
10404 laddr = irel->r_offset;
35c08157 10405
1c8f6a4d
KLC
10406 /* Get the reloc for the address from which the register is
10407 being loaded. This reloc will tell us which function is
10408 actually being called. */
35c08157 10409
1c8f6a4d
KLC
10410 cond_irel =
10411 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10412 R_NDS32_25_PCREL_RELA, irel->r_addend);
10413 if (cond_irel == irelend)
10414 {
10415 (*_bfd_error_handler)
10416 ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
10417 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10418 return FALSE;
10419 }
35c08157 10420
1c8f6a4d
KLC
10421 /* Get the value of the symbol referred to by the reloc. */
10422 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10423 &pic_ext_target);
35c08157 10424
1c8f6a4d
KLC
10425 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10426 || foff >= CONSERVATIVE_16BIT_S1)
10427 return FALSE;
35c08157 10428
1c8f6a4d
KLC
10429 /* Get the all corresponding instructions. */
10430 insn = bfd_getb32 (contents + laddr);
10431 /* Check instruction size. */
10432 if (insn & 0x80000000)
10433 {
10434 *seq_len = 0;
10435 insn16 = insn >> 16;
10436 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10437 }
10438 else
10439 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10440
1c8f6a4d
KLC
10441 if (N32_OP6 (re_insn) == N32_OP6_BR1
10442 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10443 {
10444 /* beqs label ; 15_PCREL. */
10445 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10446 reloc = R_NDS32_15_PCREL_RELA;
10447 }
10448 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10449 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10450 {
10451 /* beqz label ; 17_PCREL. */
10452 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10453 reloc = R_NDS32_17_PCREL_RELA;
10454 }
10455 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10456 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10457 {
10458 /* beqc label ; 9_PCREL. */
10459 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10460 reloc = R_NDS32_WORD_9_PCREL_RELA;
10461 }
10462 else
10463 return FALSE;
35c08157 10464
1c8f6a4d
KLC
10465 /* Set all relocations. */
10466 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10467
1c8f6a4d
KLC
10468 /* Clean relocations. */
10469 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10470 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10471 {
10472 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10473 checked_types[i], laddr);
10474 if (cond_irel != irelend)
10475 {
10476 if (*seq_len == 0
10477 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10478 {
1c8f6a4d
KLC
10479 /* If the branch instruction is 2 byte, it cannot remove
10480 directly. Only convert it to nop16 and remove it after
10481 checking alignment issue. */
10482 insn16 = NDS32_NOP16;
10483 bfd_putb16 (insn16, contents + laddr);
10484 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC
10485 }
10486 else
1c8f6a4d
KLC
10487 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10488 R_NDS32_NONE);
35c08157 10489 }
1c8f6a4d
KLC
10490 }
10491 *insn_len = 0;
35c08157 10492
1c8f6a4d
KLC
10493 return TRUE;
10494}
35c08157 10495
1c8f6a4d 10496/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10497
1c8f6a4d
KLC
10498static bfd_boolean
10499nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10500 Elf_Internal_Rela *internal_relocs, int *insn_len,
10501 int *seq_len, bfd_byte *contents,
10502 Elf_Internal_Sym *isymbuf,
10503 Elf_Internal_Shdr *symtab_hdr)
10504{
10505 /* There are 5 variations for LONGJUMP6
10506 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10507 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10508 sethi ta, hi20(symbol) ; HI20/PTR
10509 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10510 jr ta ; PTR_RES/INSN16/EMPTY
10511 .L1:
10512
10513 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10514 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10515 sethi ta, hi20(symbol) ; HI20/PTR
10516 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10517 jr ta ; PTR_RES/INSN16/EMPTY
10518 .L1: */
10519
10520 enum elf_nds32_reloc_type checked_types[] =
10521 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10522 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10523
10524 int reloc_off = 0, cond_removed = 0;
10525 bfd_vma laddr;
10526 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10527 int pic_ext_target = 0;
10528 unsigned int i;
10529 bfd_signed_vma foff;
10530 uint32_t insn, re_insn = 0;
10531 uint16_t insn16, re_insn16 = 0;
10532 unsigned long reloc;
35c08157 10533
1c8f6a4d
KLC
10534 irelend = internal_relocs + sec->reloc_count;
10535 laddr = irel->r_offset;
35c08157 10536
1c8f6a4d
KLC
10537 /* Get the reloc for the address from which the register is
10538 being loaded. This reloc will tell us which function is
10539 actually being called. */
10540 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10541 R_NDS32_EMPTY, irel->r_addend);
35c08157 10542
1c8f6a4d
KLC
10543 if (em_irel == irelend)
10544 {
10545 (*_bfd_error_handler)
10546 ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
10547 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10548 return FALSE;
10549 }
35c08157 10550
1c8f6a4d
KLC
10551 /* Get the value of the symbol referred to by the reloc. */
10552 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10553 &pic_ext_target);
35c08157 10554
1c8f6a4d
KLC
10555 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10556 || foff >= CONSERVATIVE_24BIT_S1)
10557 return FALSE;
35c08157 10558
1c8f6a4d
KLC
10559 insn = bfd_getb32 (contents + laddr);
10560 /* Check instruction size. */
10561 if (insn & 0x80000000)
10562 {
10563 *seq_len = 0;
10564 insn16 = insn >> 16;
10565 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10566 }
10567 else
10568 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10569
1c8f6a4d
KLC
10570 /* For simplicity of coding, we are going to modify the section
10571 contents, the section relocs, and the BFD symbol table. We
10572 must tell the rest of the code not to free up this
10573 information. It would be possible to instead create a table
10574 of changes which have to be made, as is done in coff-mips.c;
10575 that would be more work, but would require less memory when
10576 the linker is run. */
35c08157 10577
1c8f6a4d
KLC
10578 if (N32_OP6 (re_insn) == N32_OP6_BR1
10579 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10580 {
10581 /* beqs label ; 15_PCREL */
10582 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10583 reloc = R_NDS32_15_PCREL_RELA;
10584 cond_removed = 1;
10585 }
10586 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10587 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10588 {
10589 /* beqz label ; 17_PCREL */
10590 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10591 reloc = R_NDS32_17_PCREL_RELA;
10592 cond_removed = 1;
10593 }
10594 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10595 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10596 {
10597 /* Relax to one of the following 2 variations
35c08157 10598
1c8f6a4d
KLC
10599 case 2-4; 1st insn convertible, 16-bit on.
10600 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10601 j label ; 25_PCREL/INSN16
10602 $1:
35c08157 10603
1c8f6a4d
KLC
10604 case 4-4; 1st insn not convertible
10605 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10606 j label ; 25_PCREL/INSN16
10607 .L1: */
35c08157 10608
1c8f6a4d
KLC
10609 /* Use j label as second instruction. */
10610 insn = INSN_J;
10611 reloc = R_NDS32_25_PCREL_RELA;
10612 bfd_putb32 (insn, contents + em_irel->r_offset);
10613 }
10614 else
10615 return FALSE;
35c08157 10616
1c8f6a4d
KLC
10617 /* Set all relocations. */
10618 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10619
1c8f6a4d
KLC
10620 cond_irel =
10621 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10622 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10623 cond_irel->r_addend = 1;
35c08157 10624
1c8f6a4d
KLC
10625 /* Use INSN16 of first branch instruction to distinguish if keeping
10626 INSN16 of final instruction or not. */
10627 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10628 R_NDS32_INSN16, irel->r_offset);
10629 if (insn_irel == irelend)
10630 {
10631 /* Clean the final INSN16. */
10632 insn_irel =
10633 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10634 R_NDS32_INSN16, em_irel->r_offset);
10635 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10636 R_NDS32_NONE);
10637 }
10638
10639 if (cond_removed == 1)
10640 {
10641 *insn_len = 0;
10642
10643 /* Clear relocations. */
10644 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10645
1c8f6a4d
KLC
10646 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10647 {
10648 cond_irel =
10649 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10650 checked_types[i], laddr);
10651 if (cond_irel != irelend)
35c08157 10652 {
1c8f6a4d
KLC
10653 if (*seq_len == 0
10654 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10655 {
10656 /* If the branch instruction is 2 byte, it cannot remove
10657 directly. Only convert it to nop16 and remove it after
10658 checking alignment issue. */
10659 insn16 = NDS32_NOP16;
10660 bfd_putb16 (insn16, contents + laddr);
10661 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10662 }
10663 else
10664 cond_irel->r_info =
10665 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10666 }
35c08157 10667 }
1c8f6a4d
KLC
10668 }
10669 else
10670 {
10671 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10672 R_NDS32_LONGJUMP5);
10673 }
35c08157 10674
1c8f6a4d
KLC
10675 return TRUE;
10676}
35c08157 10677
1c8f6a4d 10678/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10679
1c8f6a4d
KLC
10680static bfd_boolean
10681nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10682 Elf_Internal_Rela *internal_relocs, int *insn_len,
10683 int *seq_len, bfd_byte *contents,
10684 Elf_Internal_Sym *isymbuf,
10685 Elf_Internal_Shdr *symtab_hdr)
10686{
10687 /* There are 2 variations for LONGJUMP5
10688 case 2-4; 1st insn convertible, 16-bit on.
10689 movi55 ta, imm11 ; LONGJUMP7/INSN16
10690 beq rt, ta, label ; 15_PCREL
10691
10692 case 4-4; 1st insn not convertible
10693 movi55 ta, imm11 ; LONGJUMP7/INSN16
10694 beq rt, ta, label ; 15_PCREL */
10695
10696 bfd_vma laddr;
10697 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10698 int pic_ext_target = 0;
10699 bfd_signed_vma foff;
10700 uint32_t insn, re_insn = 0;
10701 uint16_t insn16;
10702 uint32_t imm11;
35c08157 10703
1c8f6a4d
KLC
10704 irelend = internal_relocs + sec->reloc_count;
10705 laddr = irel->r_offset;
35c08157 10706
1c8f6a4d
KLC
10707 /* Get the reloc for the address from which the register is
10708 being loaded. This reloc will tell us which function is
10709 actually being called. */
35c08157 10710
1c8f6a4d
KLC
10711 cond_irel =
10712 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10713 R_NDS32_15_PCREL_RELA, irel->r_addend);
10714 if (cond_irel == irelend)
10715 {
10716 (*_bfd_error_handler)
10717 ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
10718 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10719 return FALSE;
10720 }
35c08157 10721
1c8f6a4d
KLC
10722 /* Get the value of the symbol referred to by the reloc. */
10723 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10724 &pic_ext_target);
35c08157 10725
1c8f6a4d
KLC
10726 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10727 || foff >= CONSERVATIVE_8BIT_S1)
10728 return FALSE;
35c08157 10729
1c8f6a4d
KLC
10730 /* Get the first instruction for its size. */
10731 insn = bfd_getb32 (contents + laddr);
10732 if (insn & 0x80000000)
10733 {
10734 *seq_len = 0;
10735 /* Get the immediate from movi55. */
10736 imm11 = N16_IMM5S (insn >> 16);
10737 }
10738 else
10739 {
10740 /* Get the immediate from movi. */
10741 imm11 = N32_IMM20S (insn);
35c08157
KLC
10742 }
10743
1c8f6a4d
KLC
10744 /* Get the branch instruction. */
10745 insn = bfd_getb32 (contents + irel->r_addend);
10746 /* Convert instruction to BR3. */
10747 if ((insn >> 14) & 0x1)
10748 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10749 else
10750 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10751
1c8f6a4d 10752 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10753
1c8f6a4d
KLC
10754 /* Set all relocations. */
10755 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10756 R_NDS32_WORD_9_PCREL_RELA);
10757
10758 /* Clean relocations. */
10759 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10760 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10761 R_NDS32_INSN16, irel->r_offset);
10762 if (insn_irel != irelend)
10763 {
10764 if (*seq_len == 0)
35c08157 10765 {
1c8f6a4d
KLC
10766 /* If the first insntruction is 16bit, convert it to nop16. */
10767 insn16 = NDS32_NOP16;
10768 bfd_putb16 (insn16, contents + laddr);
10769 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10770 }
1c8f6a4d
KLC
10771 else
10772 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10773 R_NDS32_NONE);
35c08157 10774 }
1c8f6a4d 10775 *insn_len = 0;
35c08157 10776
1c8f6a4d
KLC
10777 return TRUE;
10778}
35c08157 10779
1c8f6a4d 10780#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10781
1c8f6a4d 10782/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10783
1c8f6a4d
KLC
10784static bfd_boolean
10785nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10786 asection *sec, Elf_Internal_Rela *irel,
10787 Elf_Internal_Rela *internal_relocs, int *insn_len,
10788 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10789 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10790{
6cae483a
AM
10791 int eliminate_sethi = 0, range_type;
10792 unsigned int i;
1c8f6a4d
KLC
10793 bfd_vma local_sda, laddr;
10794 int seq_len; /* Original length of instruction sequence. */
10795 uint32_t insn;
10796 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10797 bfd_vma access_addr = 0;
10798 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10799 enum elf_nds32_reloc_type checked_types[] =
10800 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10801 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10802 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10803 R_NDS32_TLS_LE_HI20
10804 };
35c08157 10805
1c8f6a4d
KLC
10806 irelend = internal_relocs + sec->reloc_count;
10807 seq_len = GET_SEQ_LEN (irel->r_addend);
10808 laddr = irel->r_offset;
10809 *insn_len = seq_len;
35c08157 10810
1c8f6a4d 10811 /* Get the high part relocation. */
6cae483a 10812 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC
10813 {
10814 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10815 checked_types[i], laddr);
10816 if (hi_irelfn != irelend)
10817 break;
10818 }
35c08157 10819
1c8f6a4d
KLC
10820 if (hi_irelfn == irelend)
10821 {
10822 (*_bfd_error_handler)
10823 ("%B: warning: R_NDS32_LOADSTORE points to unrecognized"
10824 "reloc at 0x%lx.", abfd, (long) irel->r_offset);
10825 return FALSE;
10826 }
35c08157 10827
1c8f6a4d
KLC
10828 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10829 nds32_elf_final_sda_base (sec->output_section->owner,
10830 link_info, &local_sda, FALSE);
35c08157 10831
1c8f6a4d
KLC
10832 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10833 {
10834 case R_NDS32_HI20_RELA:
10835 insn = bfd_getb32 (contents + laddr);
10836 access_addr =
10837 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10838
10839 if (range_type == NDS32_LOADSTORE_IMM)
10840 {
10841 struct elf_link_hash_entry *h = NULL;
10842 int indx;
35c08157 10843
1c8f6a4d 10844 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10845 {
1c8f6a4d
KLC
10846 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10847 h = elf_sym_hashes (abfd)[indx];
35c08157 10848 }
35c08157 10849
1c8f6a4d
KLC
10850 if ((access_addr < CONSERVATIVE_20BIT)
10851 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10852 {
1c8f6a4d
KLC
10853 eliminate_sethi = 1;
10854 break;
35c08157 10855 }
1c8f6a4d
KLC
10856
10857 /* This is avoid to relax symbol address which is fixed
10858 relocations. Ex: _stack. */
10859 if (h && bfd_is_abs_section (h->root.u.def.section))
10860 return FALSE;
10861 }
10862
10863 if (!load_store_relax)
10864 return FALSE;
10865
10866 /* Case for set gp register. */
10867 if (N32_RT5 (insn) == REG_GP)
10868 break;
10869
10870 if (range_type == NDS32_LOADSTORE_FLOAT_S
10871 || range_type == NDS32_LOADSTORE_FLOAT_S)
10872 {
10873 range_l = sdata_range[0][0];
10874 range_h = sdata_range[0][1];
10875 }
10876 else
10877 {
10878 range_l = sdata_range[1][0];
10879 range_h = sdata_range[1][1];
10880 }
10881 break;
10882
10883 case R_NDS32_GOT_HI20:
10884 access_addr =
10885 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10886
10887 /* If this symbol is not in .got, the return value will be -1.
10888 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10889 a negative offset is allowed. */
10890 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10891 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10892 eliminate_sethi = 1;
10893 break;
10894
10895 case R_NDS32_PLT_GOTREL_HI20:
10896 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10897 hi_irelfn, symtab_hdr);
10898
10899 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10900 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10901 eliminate_sethi = 1;
10902 break;
10903
10904 case R_NDS32_GOTOFF_HI20:
10905 access_addr =
10906 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10907
10908 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10909 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10910 eliminate_sethi = 1;
10911 break;
10912
10913 case R_NDS32_GOTPC_HI20:
10914 /* The access_addr must consider r_addend of hi_irel. */
10915 access_addr = sec->output_section->vma + sec->output_offset
10916 + irel->r_offset + hi_irelfn->r_addend;
10917
10918 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10919 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10920 eliminate_sethi = 1;
10921 break;
10922
10923 case R_NDS32_TLS_LE_HI20:
10924 access_addr =
10925 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10926 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10927 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10928 if ((range_type == NDS32_LOADSTORE_IMM)
10929 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10930 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10931 eliminate_sethi = 1;
10932 break;
10933
10934 default:
10935 return FALSE;
10936 }
10937
10938 /* Delete sethi instruction. */
10939 if (eliminate_sethi == 1
10940 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10941 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10942 {
10943 hi_irelfn->r_info =
10944 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10945 irel->r_info =
10946 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10947 *insn_len = 0;
10948 }
10949 return TRUE;
10950}
10951
10952/* Relax LO12 relocation for nds32_elf_relax_section. */
10953
10954static void
10955nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10956 asection *sec, Elf_Internal_Rela *irel,
10957 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10958 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10959{
10960 uint32_t insn;
10961 bfd_vma local_sda, laddr;
10962 unsigned long reloc;
10963 bfd_vma access_addr;
10964 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10965 Elf_Internal_Rela *irelfn = NULL, *irelend;
10966 struct elf_link_hash_entry *h = NULL;
10967 int indx;
10968
10969 /* For SDA base relative relaxation. */
10970 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10971 &local_sda, FALSE);
10972
10973 irelend = internal_relocs + sec->reloc_count;
10974 laddr = irel->r_offset;
10975 insn = bfd_getb32 (contents + laddr);
10976
10977 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10978 return;
10979
10980 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10981
10982 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10983 {
10984 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10985 h = elf_sym_hashes (abfd)[indx];
10986 }
10987
10988 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10989 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10990 {
10991 reloc = R_NDS32_20_RELA;
10992 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10993 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10994 bfd_putb32 (insn, contents + laddr);
10995 }
10996 /* This is avoid to relax symbol address which is fixed
10997 relocations. Ex: _stack. */
10998 else if (N32_OP6 (insn) == N32_OP6_ORI
10999 && h && bfd_is_abs_section (h->root.u.def.section))
11000 return;
11001 else
11002 {
11003 range_l = sdata_range[1][0];
11004 range_h = sdata_range[1][1];
11005 switch (ELF32_R_TYPE (irel->r_info))
11006 {
11007 case R_NDS32_LO12S0_RELA:
11008 reloc = R_NDS32_SDA19S0_RELA;
11009 break;
11010 case R_NDS32_LO12S1_RELA:
11011 reloc = R_NDS32_SDA18S1_RELA;
11012 break;
11013 case R_NDS32_LO12S2_RELA:
11014 reloc = R_NDS32_SDA17S2_RELA;
11015 break;
11016 case R_NDS32_LO12S2_DP_RELA:
11017 range_l = sdata_range[0][0];
11018 range_h = sdata_range[0][1];
11019 reloc = R_NDS32_SDA12S2_DP_RELA;
11020 break;
11021 case R_NDS32_LO12S2_SP_RELA:
11022 range_l = sdata_range[0][0];
11023 range_h = sdata_range[0][1];
11024 reloc = R_NDS32_SDA12S2_SP_RELA;
11025 break;
11026 default:
11027 return;
11028 }
11029
11030 /* There are range_h and range_l because linker has to promise
11031 all sections move cross one page together. */
11032 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11033 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11034 {
11035 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11036 {
1c8f6a4d
KLC
11037 /* Maybe we should add R_NDS32_INSN16 reloc type here
11038 or manually do some optimization. sethi can't be
11039 eliminated when updating $gp so the relative ori
11040 needs to be preserved. */
11041 return;
35c08157 11042 }
1c8f6a4d
KLC
11043 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11044 &insn))
11045 return;
11046 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11047 bfd_putb32 (insn, contents + laddr);
11048
11049 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11050 R_NDS32_INSN16);
11051 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11052 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11053 irelfn->r_info =
11054 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11055
35c08157 11056 }
1c8f6a4d
KLC
11057 }
11058 return;
11059}
35c08157 11060
1c8f6a4d
KLC
11061/* Relax low part of PIC instruction pattern. */
11062
11063static void
11064nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
11065 asection *sec, Elf_Internal_Rela *irel,
11066 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11067 Elf_Internal_Shdr *symtab_hdr)
11068{
11069 uint32_t insn;
11070 bfd_vma local_sda, laddr;
11071 bfd_signed_vma foff;
11072 unsigned long reloc;
11073
11074 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11075 &local_sda, FALSE);
11076 laddr = irel->r_offset;
11077 insn = bfd_getb32 (contents + laddr);
11078
11079 if (N32_OP6 (insn) != N32_OP6_ORI)
11080 return;
11081
11082 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
11083 {
11084 foff = calculate_got_memory_address (abfd, link_info, irel,
11085 symtab_hdr) - local_sda;
11086 reloc = R_NDS32_GOT20;
11087 }
11088 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
11089 {
11090 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
11091 symtab_hdr) - local_sda;
11092 reloc = R_NDS32_PLT_GOTREL_LO20;
11093 }
11094 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
11095 {
11096 foff = calculate_memory_address (abfd, irel, isymbuf,
11097 symtab_hdr) - local_sda;
11098 reloc = R_NDS32_GOTOFF;
11099 }
11100 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
11101 {
11102 foff = local_sda - sec->output_section->vma + sec->output_offset
11103 + irel->r_offset + irel->r_addend;
11104 reloc = R_NDS32_GOTPC20;
11105 }
11106 else
11107 return;
11108
11109 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
11110 {
11111 /* Turn into MOVI. */
11112 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11113 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11114 bfd_putb32 (insn, contents + laddr);
11115 }
11116}
11117
11118/* Relax low part of LE TLS instruction pattern. */
11119
11120static void
11121nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
11122 Elf_Internal_Rela *irel,
11123 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11124 Elf_Internal_Shdr *symtab_hdr)
11125{
11126 uint32_t insn;
11127 bfd_vma laddr;
11128 bfd_signed_vma foff;
11129 unsigned long reloc;
11130
11131 laddr = irel->r_offset;
11132 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11133 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11134 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11135 insn = bfd_getb32 (contents + laddr);
11136
11137 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
11138 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
11139 {
11140 /* Pattern sethi-ori transform to movi. */
11141 reloc = R_NDS32_TLS_LE_20;
11142 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11143 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11144 bfd_putb32 (insn, contents + laddr);
11145 }
11146}
11147
11148/* Relax LE TLS calculate address instruction pattern. */
11149
11150static void
11151nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
11152 asection *sec, Elf_Internal_Rela *irel,
11153 Elf_Internal_Rela *internal_relocs,
11154 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11155 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11156{
11157 /* Local TLS non-pic
11158 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
11159 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
11160 add ra, ta, tp ; TLS_LE_ADD */
11161
11162 uint32_t insn;
11163 bfd_vma laddr;
11164 bfd_signed_vma foff;
11165 Elf_Internal_Rela *i1_irelfn, *irelend;
11166
11167 irelend = internal_relocs + sec->reloc_count;
11168 laddr = irel->r_offset;
11169 insn = bfd_getb32 (contents + laddr);
11170 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11171 R_NDS32_PTR_RESOLVED);
11172 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11173 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11174 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11175
11176 /* The range is +/-16k. */
11177 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11178 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11179 {
11180 /* Transform add to addi. */
11181 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
11182 irel->r_info =
11183 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11184
11185 bfd_putb32 (insn, contents + laddr);
11186 if (i1_irelfn != irelend)
11187 {
11188 i1_irelfn->r_addend |= 1;
11189 *again = TRUE;
11190 }
11191 }
11192}
11193
11194/* Relax LE TLS load store instruction pattern. */
11195
11196static void
11197nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
11198 asection *sec, Elf_Internal_Rela *irel,
11199 Elf_Internal_Rela *internal_relocs,
11200 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11201 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11202{
11203
11204 uint32_t insn;
11205 bfd_vma laddr;
11206 bfd_signed_vma foff;
11207 Elf_Internal_Rela *i1_irelfn, *irelend;
11208 int success = 0;
11209
11210 irelend = internal_relocs + sec->reloc_count;
11211 laddr = irel->r_offset;
11212 insn = bfd_getb32 (contents + laddr);
11213 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11214 R_NDS32_PTR_RESOLVED);
11215 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11216 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
11217 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
11218
11219 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
11220 {
11221 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11222 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11223 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11224 /* The range is +/-16k. */
11225 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
11226 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
11227 {
11228 insn =
11229 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11230 irel->r_info =
11231 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
11232 success = 1;
11233 break;
11234 }
11235 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11236 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11237 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11238 /* The range is +/-32k. */
11239 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
11240 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 11241 {
1c8f6a4d
KLC
11242 insn =
11243 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11244 irel->r_info =
11245 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
11246 success = 1;
11247 break;
11248 }
11249 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11250 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11251 /* The range is +/-64k. */
11252 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
11253 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
11254 {
11255 insn =
11256 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
11257 irel->r_info =
11258 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
11259 success = 1;
11260 break;
11261 }
11262 default:
11263 break;
11264 }
35c08157 11265
1c8f6a4d
KLC
11266 if (success)
11267 {
11268 bfd_putb32 (insn, contents + laddr);
11269 if (i1_irelfn != irelend)
11270 {
11271 i1_irelfn->r_addend |= 1;
11272 *again = TRUE;
11273 }
11274 }
11275}
35c08157 11276
1c8f6a4d 11277/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11278
1c8f6a4d
KLC
11279static bfd_boolean
11280nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11281 Elf_Internal_Rela *internal_relocs, int *insn_len,
11282 int *seq_len, bfd_byte *contents)
11283{
11284 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11285
1c8f6a4d 11286 irelend = internal_relocs + sec->reloc_count;
35c08157 11287
1c8f6a4d
KLC
11288 re_irel =
11289 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11290 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11291
1c8f6a4d
KLC
11292 if (re_irel == irelend)
11293 {
11294 (*_bfd_error_handler)
11295 ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
11296 abfd, (long) irel->r_offset);
11297 return FALSE;
11298 }
35c08157 11299
1c8f6a4d
KLC
11300 if (re_irel->r_addend != 1)
11301 return FALSE;
35c08157 11302
1c8f6a4d
KLC
11303 /* Pointed target is relaxed and no longer needs this void *,
11304 change the type to NONE. */
11305 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11306
1c8f6a4d
KLC
11307 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11308 not exist, it means only count 1 and remove it directly. */
11309 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11310 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11311 R_NDS32_PTR_COUNT);
11312 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11313 R_NDS32_PTR);
11314 if (count_irel != irelend)
11315 {
11316 if (--count_irel->r_addend > 0)
11317 return FALSE;
11318 }
11319
11320 if (ptr_irel != irelend)
11321 return FALSE;
11322
11323 /* If the PTR_COUNT is already 0, remove current instruction. */
11324 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11325 *insn_len = 0;
11326 return TRUE;
11327}
11328
11329/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11330
11331static void
11332nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11333 asection *sec, Elf_Internal_Rela *irel,
11334 Elf_Internal_Rela *internal_relocs,
11335 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11336 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11337{
11338 uint32_t insn;
11339 bfd_signed_vma foff;
11340 Elf_Internal_Rela *i1_irelfn, *irelend;
11341 bfd_vma local_sda, laddr;
11342
11343 irelend = internal_relocs + sec->reloc_count;
11344 laddr = irel->r_offset;
11345 insn = bfd_getb32 (contents + laddr);
11346
11347 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11348 we need additional space. It might be help if we could
11349 borrow some space from instructions to be eliminated
11350 such as sethi, ori, add. */
11351 if (insn & 0x80000000)
11352 return;
11353
11354 if (nds32_elf_check_dup_relocs
11355 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11356 return;
11357
11358 i1_irelfn =
11359 find_relocs_at_address (irel, internal_relocs, irelend,
11360 R_NDS32_PTR_RESOLVED);
11361
11362 /* FIXIT 090606
11363 The boundary should be reduced since the .plt section hasn't
11364 been created and the address of specific entry is still unknown
11365 Maybe the range between the function call and the begin of the
11366 .text section can be used to decide if the .plt is in the range
11367 of function call. */
11368
11369 if (N32_OP6 (insn) == N32_OP6_ALU1
11370 && N32_SUB5 (insn) == N32_ALU1_ADD)
11371 {
11372 /* Get the value of the symbol referred to by the reloc. */
11373 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11374 &local_sda, FALSE);
11375 foff = (bfd_signed_vma) (calculate_plt_memory_address
11376 (abfd, link_info, isymbuf, irel,
11377 symtab_hdr) - local_sda);
11378 /* This condition only happened when symbol is undefined. */
11379 if (foff == 0)
11380 return;
11381
11382 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11383 return;
11384 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11385 R_NDS32_PLT_GOTREL_LO19);
11386 /* addi.gp */
11387 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11388 }
11389 else if (N32_OP6 (insn) == N32_OP6_JREG
11390 && N32_SUB5 (insn) == N32_JREG_JRAL)
11391 {
11392 /* Get the value of the symbol referred to by the reloc. */
11393 foff =
11394 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11395 /* This condition only happened when symbol is undefined. */
11396 if (foff == 0)
11397 return;
11398 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11399 return;
11400 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11401 insn = INSN_JAL;
11402 }
11403 else
11404 return;
11405
11406 bfd_putb32 (insn, contents + laddr);
11407 if (i1_irelfn != irelend)
11408 {
11409 i1_irelfn->r_addend |= 1;
11410 *again = TRUE;
11411 }
11412}
11413
11414/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11415
11416static void
11417nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11418 asection *sec, Elf_Internal_Rela *irel,
11419 Elf_Internal_Rela *internal_relocs,
11420 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11421 bfd_boolean *again)
11422{
11423 uint32_t insn;
11424 bfd_signed_vma foff;
11425 Elf_Internal_Rela *i1_irelfn, *irelend;
11426 bfd_vma local_sda, laddr;
11427
11428 irelend = internal_relocs + sec->reloc_count;
11429 laddr = irel->r_offset;
11430 insn = bfd_getb32 (contents + laddr);
11431 if (insn & 0x80000000)
11432 return;
11433
11434 if (nds32_elf_check_dup_relocs
11435 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11436 return;
11437
11438 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11439 R_NDS32_PTR_RESOLVED);
11440
11441 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11442 &local_sda, FALSE);
11443 foff = calculate_got_memory_address (abfd, link_info, irel,
11444 symtab_hdr) - local_sda;
11445
11446 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11447 {
11448 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11449 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11450 irel->r_info =
11451 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11452 bfd_putb32 (insn, contents + laddr);
11453 if (i1_irelfn != irelend)
11454 {
11455 i1_irelfn->r_addend |= 1;
11456 *again = TRUE;
11457 }
11458 }
11459}
11460
11461/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11462
11463static void
11464nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11465 asection *sec, Elf_Internal_Rela *irel,
11466 Elf_Internal_Rela *internal_relocs,
11467 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11468 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11469{
11470 int opc_insn_gotoff;
11471 uint32_t insn;
11472 bfd_signed_vma foff;
11473 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11474 bfd_vma local_sda, laddr;
11475
11476 irelend = internal_relocs + sec->reloc_count;
11477 laddr = irel->r_offset;
11478 insn = bfd_getb32 (contents + laddr);
11479
11480 if (insn & 0x80000000)
11481 return;
11482
11483 if (nds32_elf_check_dup_relocs
11484 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11485 return;
11486
11487 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11488 R_NDS32_PTR_RESOLVED);
11489 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11490 &local_sda, FALSE);
11491 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11492 foff = foff - local_sda;
11493
11494 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11495 return;
11496
11497 /* Concatenate opcode and sub-opcode for switch case.
11498 It may be MEM or ALU1. */
11499 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11500 switch (opc_insn_gotoff)
11501 {
11502 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11503 /* 4-byte aligned. */
11504 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11505 irel->r_info =
11506 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11507 break;
11508 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11509 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11510 irel->r_info =
11511 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11512 break;
11513 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11514 /* 2-byte aligned. */
11515 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11516 irel->r_info =
11517 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11518 break;
11519 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
11520 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
11521 irel->r_info =
11522 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11523 break;
11524 case (N32_OP6_MEM << 8) | N32_MEM_SH:
11525 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
11526 irel->r_info =
11527 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11528 break;
11529 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11530 /* 1-byte aligned. */
11531 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11532 irel->r_info =
11533 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11534 break;
11535 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
11536 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
11537 irel->r_info =
11538 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11539 break;
11540 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11541 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11542 irel->r_info =
11543 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11544 break;
11545 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
11546 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
11547 irel->r_info =
11548 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11549 break;
11550 default:
11551 return;
11552 }
11553
11554 bfd_putb32 (insn, contents + laddr);
11555 if (i1_irelfn != irelend)
11556 {
11557 i1_irelfn->r_addend |= 1;
11558 *again = TRUE;
11559 }
11560 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11561 R_NDS32_INSN16)) != irelend)
11562 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11563
11564}
11565
11566static bfd_boolean
11567nds32_relax_adjust_label (bfd *abfd, asection *sec,
11568 Elf_Internal_Rela *internal_relocs,
11569 bfd_byte *contents,
11570 nds32_elf_blank_t **relax_blank_list,
11571 int optimize, int opt_size)
11572{
11573 /* This code block is used to adjust 4-byte alignment by relax a pair
11574 of instruction a time.
11575
11576 It recognizes three types of relocations.
11577 1. R_NDS32_LABEL - a aligment.
11578 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11579 3. is_16bit_NOP () - remove a 16-bit instruction. */
11580
11581 /* TODO: It seems currently implementation only support 4-byte aligment.
11582 We should handle any-aligment. */
11583
11584 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11585 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11586 Elf_Internal_Rela rel_temp;
11587 Elf_Internal_Rela *irelend;
11588 bfd_vma address;
11589 uint16_t insn16;
11590
11591 /* Checking for branch relaxation relies on the relocations to
11592 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11593 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11594 sizeof (Elf_Internal_Rela), compar_reloc);
11595
11596 irelend = internal_relocs + sec->reloc_count;
11597
11598 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11599 /* FIXME: Can we generate the right order in assembler?
11600 So we don't have to swapping them here. */
11601
11602 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11603 label_rel < irelend; label_rel++)
11604 {
11605 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11606 continue;
11607
11608 /* Find the first reloc has the same offset with label_rel. */
11609 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11610 insn_rel++;
11611
11612 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11613 insn_rel++)
11614 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11615 address. */
11616 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11617 break;
11618
11619 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11620 && insn_rel < label_rel)
11621 {
11622 /* Swap the two reloc if the R_NDS32_INSN16 is
11623 before R_NDS32_LABEL. */
11624 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11625 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11626 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11627 }
11628 }
11629
11630 label_rel = NULL;
11631 insn_rel = NULL;
11632 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11633 or higher, remove other R_NDS32_LABEL with lower alignment.
11634 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11635 then the R_NDS32_LABEL sequence is broke. */
11636 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11637 {
11638 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11639 {
11640 if (label_rel == NULL)
11641 {
11642 if (tmp_rel->r_addend < 2)
11643 label_rel = tmp_rel;
11644 continue;
11645 }
11646 else if (tmp_rel->r_addend > 1)
11647 {
11648 /* Remove all LABEL relocation from label_rel to tmp_rel
11649 including relocations with same offset as tmp_rel. */
11650 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11651 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11652 {
11653 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11654 && tmp2_rel->r_addend < 2)
11655 tmp2_rel->r_info =
11656 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11657 R_NDS32_NONE);
11658 }
11659 label_rel = NULL;
11660 }
11661 }
11662 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11663 {
11664 /* A new INSN16 which can be converted, so clear label_rel. */
11665 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11666 irelend, &insn16)
11667 || is_16bit_NOP (abfd, sec, tmp_rel))
11668 label_rel = NULL;
11669 }
11670 }
11671
11672 label_rel = NULL;
11673 insn_rel = NULL;
11674 /* Optimized for speed and nothing has not been relaxed.
11675 It's time to align labels.
11676 We may convert a 16-bit instruction right before a label to
11677 32-bit, in order to align the label if necessary
11678 all reloc entries has been sorted by r_offset. */
11679 for (irel = internal_relocs; irel < irelend; irel++)
11680 {
11681 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11682 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11683 continue;
11684
11685 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11686 {
11687 /* A new INSN16 found, resize the old one. */
11688 if (is_convert_32_to_16
11689 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11690 || is_16bit_NOP (abfd, sec, irel))
11691 {
11692 if (insn_rel)
11693 {
11694 /* Previous INSN16 reloc exists, reduce its
11695 size to 16-bit. */
11696 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11697 irelend, &insn16))
35c08157 11698 {
1c8f6a4d
KLC
11699 nds32_elf_write_16 (abfd, contents, insn_rel,
11700 internal_relocs, irelend, insn16);
11701
11702 if (!insert_nds32_elf_blank_recalc_total
11703 (relax_blank_list, insn_rel->r_offset + 2, 2))
11704 return FALSE;
11705 }
11706 else if (is_16bit_NOP (abfd, sec, insn_rel))
11707 {
11708 if (!insert_nds32_elf_blank_recalc_total
11709 (relax_blank_list, insn_rel->r_offset, 2))
11710 return FALSE;
11711 }
11712 insn_rel->r_info =
11713 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11714 }
11715 /* Save the new one for later use. */
11716 insn_rel = irel;
11717 }
11718 else
11719 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11720 R_NDS32_NONE);
11721 }
11722 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11723 {
11724 /* Search for label. */
11725 int force_relax = 0;
11726
11727 /* Label on 16-bit instruction or optimization
11728 needless, just reset this reloc. */
11729 insn16 = bfd_getb16 (contents + irel->r_offset);
11730 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11731 {
11732 irel->r_info =
11733 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11734 continue;
11735 }
11736
11737 address =
11738 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11739 irel->r_offset, 1);
11740
11741 if (!insn_rel)
11742 {
11743 /* Check if there is case which can not be aligned. */
11744 if (irel->r_addend == 2 && address & 0x2)
11745 return FALSE;
11746 continue;
11747 }
11748
11749 /* Try to align this label. */
11750
11751 if ((irel->r_addend & 0x1f) < 2)
11752 {
11753 /* Check if there is a INSN16 at the same address.
11754 Label_rel always seats before insn_rel after
11755 our sort. */
11756
11757 /* Search for INSN16 at LABEL location. If INSN16 is at
11758 same location and this LABEL alignment is lower than 2,
11759 the INSN16 can be converted to 2-byte. */
11760 for (tmp_rel = irel;
11761 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11762 tmp_rel++)
11763 {
11764 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11765 && (is_convert_32_to_16
11766 (abfd, sec, tmp_rel, internal_relocs,
11767 irelend, &insn16)
11768 || is_16bit_NOP (abfd, sec, tmp_rel)))
11769 {
11770 force_relax = 1;
11771 break;
11772 }
11773 }
11774 }
11775
11776 if (force_relax || irel->r_addend == 1 || address & 0x2)
11777 {
11778 /* Label not aligned. */
11779 /* Previous reloc exists, reduce its size to 16-bit. */
11780 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11781 internal_relocs, irelend, &insn16))
11782 {
11783 nds32_elf_write_16 (abfd, contents, insn_rel,
11784 internal_relocs, irelend, insn16);
11785
11786 if (!insert_nds32_elf_blank_recalc_total
11787 (relax_blank_list, insn_rel->r_offset + 2, 2))
11788 return FALSE;
11789 }
11790 else if (is_16bit_NOP (abfd, sec, insn_rel))
11791 {
11792 if (!insert_nds32_elf_blank_recalc_total
11793 (relax_blank_list, insn_rel->r_offset, 2))
11794 return FALSE;
11795 }
11796
11797 }
11798 /* INSN16 reloc is used. */
11799 insn_rel = NULL;
11800 }
11801 }
11802
11803 address =
11804 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11805 if (insn_rel && (address & 0x2 || opt_size))
11806 {
11807 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11808 irelend, &insn16))
11809 {
11810 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11811 irelend, insn16);
11812 if (!insert_nds32_elf_blank_recalc_total
11813 (relax_blank_list, insn_rel->r_offset + 2, 2))
11814 return FALSE;
11815 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11816 R_NDS32_NONE);
11817 }
11818 else if (is_16bit_NOP (abfd, sec, insn_rel))
11819 {
11820 if (!insert_nds32_elf_blank_recalc_total
11821 (relax_blank_list, insn_rel->r_offset, 2))
11822 return FALSE;
11823 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11824 R_NDS32_NONE);
11825 }
11826 }
11827 insn_rel = NULL;
11828 return TRUE;
11829}
11830
11831/* Pick relaxation round. */
11832
11833static int
11834nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
11835 struct elf_nds32_link_hash_table *table,
11836 struct bfd_link_info *link_info)
11837{
18393a2e
KLC
11838 static asection *final_sec, *first_sec = NULL;
11839 static bfd_boolean normal_again = FALSE;
1c8f6a4d
KLC
11840 static bfd_boolean set = FALSE;
11841 static bfd_boolean first = TRUE;
11842 int round_table[] = {
11843 NDS32_RELAX_NORMAL_ROUND,
11844 NDS32_RELAX_JUMP_IFC_ROUND,
11845 NDS32_RELAX_EX9_BUILD_ROUND,
11846 NDS32_RELAX_EX9_REPLACE_ROUND,
11847 };
11848 static int pass = 0;
11849 static int relax_round;
11850
18393a2e
KLC
11851 /* The new round. */
11852 if (init && first_sec == sec)
11853 {
11854 set = TRUE;
11855 normal_again = FALSE;
11856 }
11857
1c8f6a4d
KLC
11858 if (first)
11859 {
11860 /* Run an empty run to get the final section. */
11861 relax_round = NDS32_RELAX_EMPTY_ROUND;
11862
11863 /* It has to enter relax again because we can
11864 not make sure what the final turn is. */
11865 *again = TRUE;
18393a2e 11866
1c8f6a4d 11867 first = FALSE;
18393a2e 11868 first_sec = sec;
1c8f6a4d
KLC
11869 }
11870
18393a2e 11871 if (!set)
1c8f6a4d 11872 {
18393a2e 11873 /* Not reenter yet. */
1c8f6a4d
KLC
11874 final_sec = sec;
11875 return relax_round;
11876 }
11877
1c8f6a4d
KLC
11878 relax_round = round_table[pass];
11879
18393a2e
KLC
11880 if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
11881 normal_again = TRUE;
11882
1c8f6a4d
KLC
11883 if (!init && final_sec == sec)
11884 {
11885 switch (relax_round)
11886 {
11887 case NDS32_RELAX_NORMAL_ROUND:
18393a2e 11888 if (!normal_again)
1c8f6a4d
KLC
11889 {
11890 /* Normal relaxation done. */
11891 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11892 {
11893 pass++;
11894 *again = TRUE;
11895 }
11896 else if (table->target_optimize & NDS32_RELAX_EX9_ON)
11897 {
11898 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11899 *again = TRUE;
11900 }
11901 else if (table->ex9_import_file)
11902 {
11903 /* Import ex9 table. */
11904 if (table->update_ex9_table)
11905 pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
11906 else
11907 pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
11908 nds32_elf_ex9_import_table (link_info);
11909 *again = TRUE;
11910 }
11911 }
11912 break;
11913 case NDS32_RELAX_JUMP_IFC_ROUND:
11914 if (!nds32_elf_ifc_finish (link_info))
11915 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11916 if (table->target_optimize & NDS32_RELAX_EX9_ON)
11917 {
11918 pass++;
11919 *again = TRUE;
11920 }
11921 break;
11922 case NDS32_RELAX_EX9_BUILD_ROUND:
11923 nds32_elf_ex9_finish (link_info);
11924 pass++;
11925 *again = TRUE;
11926 break;
11927 case NDS32_RELAX_EX9_REPLACE_ROUND:
11928 if (table->target_optimize & NDS32_RELAX_JUMP_IFC_ON)
11929 {
11930 /* Do jump IFC optimization again. */
11931 if (!nds32_elf_ifc_finish (link_info))
11932 (*_bfd_error_handler) (_("error: Jump IFC Fail."));
11933 }
11934 break;
11935 default:
11936 break;
11937 }
11938 }
11939
11940 return relax_round;
11941}
11942
11943static bfd_boolean
11944nds32_elf_relax_section (bfd *abfd, asection *sec,
11945 struct bfd_link_info *link_info, bfd_boolean *again)
11946{
11947 nds32_elf_blank_t *relax_blank_list = NULL;
11948 Elf_Internal_Shdr *symtab_hdr;
11949 Elf_Internal_Rela *internal_relocs;
11950 Elf_Internal_Rela *irel;
11951 Elf_Internal_Rela *irelend;
11952 Elf_Internal_Sym *isymbuf = NULL;
11953 bfd_byte *contents = NULL;
11954 bfd_boolean result = TRUE;
11955 int optimize = 0;
11956 int opt_size = 0;
11957 uint32_t insn;
11958 uint16_t insn16;
11959
11960 /* Target dependnet option. */
11961 struct elf_nds32_link_hash_table *table;
11962 int load_store_relax;
11963 int relax_round;
11964
11965 relax_blank_list = NULL;
11966
11967 *again = FALSE;
11968
11969 /* Nothing to do for
11970 * relocatable link or
11971 * non-relocatable section or
11972 * non-code section or
11973 * empty content or
11974 * no reloc entry. */
0e1862bb 11975 if (bfd_link_relocatable (link_info)
1c8f6a4d
KLC
11976 || (sec->flags & SEC_RELOC) == 0
11977 || (sec->flags & SEC_EXCLUDE) == 1
11978 || (sec->flags & SEC_CODE) == 0
11979 || sec->size == 0)
11980 return TRUE;
11981
11982 /* 09.12.11 Workaround. */
11983 /* We have to adjust align for R_NDS32_LABEL if needed.
11984 The adjust approach only can fix 2-byte align once. */
11985 if (sec->alignment_power > 2)
11986 return TRUE;
11987
11988 /* The optimization type to do. */
11989
11990 table = nds32_elf_hash_table (link_info);
11991 relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
11992 switch (relax_round)
11993 {
11994 case NDS32_RELAX_JUMP_IFC_ROUND:
11995 /* Here is the entrance of ifc jump relaxation. */
11996 if (!nds32_elf_ifc_calc (link_info, abfd, sec))
11997 return FALSE;
11998 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
11999 return TRUE;
12000
12001 case NDS32_RELAX_EX9_BUILD_ROUND:
12002 /* Here is the entrance of ex9 relaxation. There are two pass of
12003 ex9 relaxation. The one is to traverse all instructions and build
12004 the hash table. The other one is to compare instructions and replace
12005 it by ex9.it. */
12006 if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
12007 return FALSE;
12008 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12009 return TRUE;
12010
12011 case NDS32_RELAX_EX9_REPLACE_ROUND:
12012 if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
12013 return FALSE;
12014 return TRUE;
12015
12016 case NDS32_RELAX_EMPTY_ROUND:
12017 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12018 return TRUE;
12019
12020 case NDS32_RELAX_NORMAL_ROUND:
12021 default:
12022 if (sec->reloc_count == 0)
12023 return TRUE;
12024 break;
12025 }
12026
12027 /* The begining of general relaxation. */
12028
12029 if (is_SDA_BASE_set == 0)
12030 {
12031 bfd_vma gp;
12032 is_SDA_BASE_set = 1;
12033 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
12034 &gp, FALSE);
12035 relax_range_measurement (abfd);
12036 }
12037
12038 if (is_ITB_BASE_set == 0)
12039 {
12040 /* Set the _ITB_BASE_. */
12041 if (!nds32_elf_ex9_itb_base (link_info))
12042 {
12043 (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
12044 bfd_set_error (bfd_error_bad_value);
12045 }
12046 }
12047
12048 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12049 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12050 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
12051 TRUE /* keep_memory */);
12052 if (internal_relocs == NULL)
12053 goto error_return;
12054
12055 irelend = internal_relocs + sec->reloc_count;
12056 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12057 irelend, R_NDS32_RELAX_ENTRY);
12058
12059 if (irel == irelend)
12060 return TRUE;
12061
12062 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12063 {
12064 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
18393a2e
KLC
12065 {
12066 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12067 return TRUE;
12068 }
1c8f6a4d
KLC
12069
12070 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12071 optimize = 1;
12072
12073 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12074 opt_size = 1;
12075 }
12076
12077 load_store_relax = table->load_store_relax;
12078
12079 /* Get symbol table and section content. */
0c4bd9d9 12080 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC
12081 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12082 goto error_return;
12083
12084 /* Do relax loop only when finalize is not done.
12085 Take care of relaxable relocs except INSN16. */
12086 for (irel = internal_relocs; irel < irelend; irel++)
12087 {
12088 int seq_len; /* Original length of instruction sequence. */
12089 int insn_len = 0; /* Final length of instruction sequence. */
12090 bfd_boolean removed;
12091
12092 insn = 0;
12093 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12094 && (irel->r_addend & 0x1f) >= 2)
12095 optimize = 1;
12096
12097 /* Relocation Types
12098 R_NDS32_LONGCALL1 53
12099 R_NDS32_LONGCALL2 54
12100 R_NDS32_LONGCALL3 55
12101 R_NDS32_LONGJUMP1 56
12102 R_NDS32_LONGJUMP2 57
12103 R_NDS32_LONGJUMP3 58
12104 R_NDS32_LOADSTORE 59 */
12105 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12106 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12107 seq_len = GET_SEQ_LEN (irel->r_addend);
12108
12109 /* Relocation Types
12110 R_NDS32_LONGCALL4 107
12111 R_NDS32_LONGCALL5 108
12112 R_NDS32_LONGCALL6 109
12113 R_NDS32_LONGJUMP4 110
12114 R_NDS32_LONGJUMP5 111
12115 R_NDS32_LONGJUMP6 112
12116 R_NDS32_LONGJUMP7 113 */
12117 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12118 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12119 seq_len = 4;
12120
12121 /* Relocation Types
12122 R_NDS32_LO12S0_RELA 30
12123 R_NDS32_LO12S1_RELA 29
12124 R_NDS32_LO12S2_RELA 28
12125 R_NDS32_LO12S2_SP_RELA 71
12126 R_NDS32_LO12S2_DP_RELA 70
12127 R_NDS32_GOT_LO12 46
12128 R_NDS32_GOTOFF_LO12 50
12129 R_NDS32_PLTREL_LO12 65
12130 R_NDS32_PLT_GOTREL_LO12 67
12131 R_NDS32_17IFC_PCREL_RELA 96
12132 R_NDS32_GOT_SUFF 193
12133 R_NDS32_GOTOFF_SUFF 194
12134 R_NDS32_PLT_GOT_SUFF 195
12135 R_NDS32_MULCALL_SUFF 196
12136 R_NDS32_PTR 197 */
12137 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12138 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12139 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12140 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12141 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12142 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12143 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12144 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12145 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12146 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12147 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12148 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12149 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12150 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
12151 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
12152 seq_len = 0;
12153 else
12154 continue;
12155
12156 insn_len = seq_len;
12157 removed = FALSE;
12158
12159 switch (ELF32_R_TYPE (irel->r_info))
12160 {
12161 case R_NDS32_LONGCALL1:
12162 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12163 &insn_len, contents, isymbuf,
12164 symtab_hdr);
12165 break;
12166 case R_NDS32_LONGCALL2:
12167 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12168 &insn_len, contents, isymbuf,
12169 symtab_hdr);
12170 break;
12171 case R_NDS32_LONGCALL3:
12172 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12173 &insn_len, contents, isymbuf,
12174 symtab_hdr);
12175 break;
12176 case R_NDS32_LONGJUMP1:
12177 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12178 &insn_len, contents, isymbuf,
12179 symtab_hdr);
12180 break;
12181 case R_NDS32_LONGJUMP2:
12182 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12183 &insn_len, contents, isymbuf,
12184 symtab_hdr);
12185 break;
12186 case R_NDS32_LONGJUMP3:
12187 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12188 &insn_len, contents, isymbuf,
12189 symtab_hdr);
12190 break;
12191 case R_NDS32_LONGCALL4:
12192 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12193 &insn_len, contents, isymbuf,
12194 symtab_hdr);
12195 break;
12196 case R_NDS32_LONGCALL5:
12197 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12198 &insn_len, contents, isymbuf,
12199 symtab_hdr);
12200 break;
12201 case R_NDS32_LONGCALL6:
12202 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12203 &insn_len, contents, isymbuf,
12204 symtab_hdr);
12205 break;
12206 case R_NDS32_LONGJUMP4:
12207 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12208 &insn_len, contents, isymbuf,
12209 symtab_hdr);
12210 break;
12211 case R_NDS32_LONGJUMP5:
12212 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12213 &insn_len, &seq_len, contents,
12214 isymbuf, symtab_hdr);
12215 break;
12216 case R_NDS32_LONGJUMP6:
12217 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12218 &insn_len, &seq_len, contents,
12219 isymbuf, symtab_hdr);
12220 break;
12221 case R_NDS32_LONGJUMP7:
12222 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12223 &insn_len, &seq_len, contents,
12224 isymbuf, symtab_hdr);
12225 break;
12226 case R_NDS32_LOADSTORE:
12227 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12228 internal_relocs, &insn_len,
12229 contents, isymbuf, symtab_hdr,
12230 load_store_relax);
12231 break;
12232 case R_NDS32_LO12S0_RELA:
12233 case R_NDS32_LO12S1_RELA:
12234 case R_NDS32_LO12S2_DP_RELA:
12235 case R_NDS32_LO12S2_SP_RELA:
12236 case R_NDS32_LO12S2_RELA:
12237 /* Relax for low part. */
12238 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
12239 contents, isymbuf, symtab_hdr);
12240
12241 /* It is impossible to delete blank, so just continue. */
12242 continue;
12243 case R_NDS32_GOT_LO12:
12244 case R_NDS32_GOTOFF_LO12:
12245 case R_NDS32_PLTREL_LO12:
12246 case R_NDS32_PLT_GOTREL_LO12:
12247 case R_NDS32_GOTPC_LO12:
12248 /* Relax for PIC gp-relative low part. */
12249 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
12250 isymbuf, symtab_hdr);
35c08157 12251
1c8f6a4d
KLC
12252 /* It is impossible to delete blank, so just continue. */
12253 continue;
12254 case R_NDS32_TLS_LE_LO12:
12255 /* Relax for LE TLS low part. */
12256 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
12257 isymbuf, symtab_hdr);
35c08157 12258
1c8f6a4d
KLC
12259 /* It is impossible to delete blank, so just continue. */
12260 continue;
12261 case R_NDS32_TLS_LE_ADD:
12262 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
12263 contents, isymbuf, symtab_hdr, again);
12264 /* It is impossible to delete blank, so just continue. */
12265 continue;
12266 case R_NDS32_TLS_LE_LS:
12267 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
12268 contents, isymbuf, symtab_hdr, again);
12269 continue;
12270 case R_NDS32_PTR:
12271 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12272 &insn_len, &seq_len, contents);
12273 break;
12274 case R_NDS32_PLT_GOT_SUFF:
12275 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
12276 internal_relocs, contents,
12277 isymbuf, symtab_hdr, again);
12278 /* It is impossible to delete blank, so just continue. */
12279 continue;
12280 case R_NDS32_GOT_SUFF:
12281 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
12282 internal_relocs, contents,
12283 symtab_hdr, again);
12284 /* It is impossible to delete blank, so just continue. */
12285 continue;
12286 case R_NDS32_GOTOFF_SUFF:
12287 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
12288 internal_relocs, contents,
12289 isymbuf, symtab_hdr, again);
12290 /* It is impossible to delete blank, so just continue. */
12291 continue;
12292 default:
12293 continue;
12294
12295 }
12296 if (removed && seq_len - insn_len > 0)
12297 {
12298 if (!insert_nds32_elf_blank
12299 (&relax_blank_list, irel->r_offset + insn_len,
12300 seq_len - insn_len))
12301 goto error_return;
12302 *again = TRUE;
35c08157 12303 }
1c8f6a4d
KLC
12304 }
12305
12306 calc_nds32_blank_total (relax_blank_list);
12307
12308 if (table->relax_fp_as_gp)
12309 {
12310 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12311 irelend, isymbuf))
12312 goto error_return;
35c08157 12313
1c8f6a4d 12314 if (*again == FALSE)
35c08157 12315 {
1c8f6a4d
KLC
12316 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12317 irelend))
12318 goto error_return;
35c08157
KLC
12319 }
12320 }
1c8f6a4d
KLC
12321
12322 nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
12323
12324 if (*again == FALSE)
12325 {
12326 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12327 &relax_blank_list, optimize, opt_size))
12328 goto error_return;
12329 }
12330
12331 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC
12332 If object file is assembled with flag '-Os',
12333 the we don't adjust jump-destination on 4-byte boundary. */
12334
12335 if (relax_blank_list)
12336 {
12337 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12338 relax_blank_list = NULL;
12339 }
12340
12341 if (*again == FALSE)
12342 {
12343 /* Closing the section, so we don't relax it anymore. */
12344 bfd_vma sec_size_align;
12345 Elf_Internal_Rela *tmp_rel;
12346
12347 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC
12348 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12349 & ((-1U) << sec->alignment_power);
35c08157
KLC
12350 if ((sec_size_align - sec->size) & 0x2)
12351 {
12352 insn16 = NDS32_NOP16;
12353 bfd_putb16 (insn16, contents + sec->size);
12354 sec->size += 2;
12355 }
12356
12357 while (sec_size_align != sec->size)
12358 {
12359 insn = NDS32_NOP32;
12360 bfd_putb32 (insn, contents + sec->size);
12361 sec->size += 4;
12362 }
12363
1c8f6a4d
KLC
12364 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12365 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
12366 if (tmp_rel != irelend)
12367 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12368
12369 clean_nds32_elf_blank ();
12370 }
12371
12372finish:
12373 if (internal_relocs != NULL
12374 && elf_section_data (sec)->relocs != internal_relocs)
12375 free (internal_relocs);
12376
12377 if (contents != NULL
12378 && elf_section_data (sec)->this_hdr.contents != contents)
12379 free (contents);
12380
12381 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
12382 free (isymbuf);
12383
12384 return result;
12385
12386error_return:
12387 result = FALSE;
12388 goto finish;
12389}
12390
12391static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12392{
12393 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12394 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12395 {NULL, 0, 0, 0, 0}
12396};
12397
12398static bfd_boolean
12399nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12400 struct bfd_link_info *info,
12401 void *finfo ATTRIBUTE_UNUSED,
12402 bfd_boolean (*func) (void *, const char *,
12403 Elf_Internal_Sym *,
12404 asection *,
12405 struct elf_link_hash_entry *)
12406 ATTRIBUTE_UNUSED)
12407{
12408 FILE *sym_ld_script = NULL;
12409 struct elf_nds32_link_hash_table *table;
12410
12411 table = nds32_elf_hash_table (info);
12412 sym_ld_script = table->sym_ld_script;
12413
12414 if (check_start_export_sym)
12415 fprintf (sym_ld_script, "}\n");
12416
12417 return TRUE;
12418}
12419
12420static enum elf_reloc_type_class
12421nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12422 const asection *rel_sec ATTRIBUTE_UNUSED,
12423 const Elf_Internal_Rela *rela)
12424{
12425 switch ((int) ELF32_R_TYPE (rela->r_info))
12426 {
12427 case R_NDS32_RELATIVE:
12428 return reloc_class_relative;
12429 case R_NDS32_JMP_SLOT:
12430 return reloc_class_plt;
12431 case R_NDS32_COPY:
12432 return reloc_class_copy;
12433 default:
12434 return reloc_class_normal;
12435 }
12436}
12437
12438/* Put target dependent option into info hash table. */
12439void
12440bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12441 int relax_fp_as_gp,
12442 int eliminate_gc_relocs,
12443 FILE * sym_ld_script, int load_store_relax,
12444 int target_optimize, int relax_status,
12445 int relax_round, FILE * ex9_export_file,
12446 FILE * ex9_import_file,
12447 int update_ex9_table, int ex9_limit,
12448 bfd_boolean ex9_loop_aware,
12449 bfd_boolean ifc_loop_aware)
12450{
12451 struct elf_nds32_link_hash_table *table;
12452
12453 table = nds32_elf_hash_table (link_info);
12454 if (table == NULL)
12455 return;
12456
12457 table->relax_fp_as_gp = relax_fp_as_gp;
12458 table->eliminate_gc_relocs = eliminate_gc_relocs;
12459 table->sym_ld_script = sym_ld_script;
12460 table ->load_store_relax = load_store_relax;
12461 table->target_optimize = target_optimize;
12462 table->relax_status = relax_status;
12463 table->relax_round = relax_round;
12464 table->ex9_export_file = ex9_export_file;
12465 table->ex9_import_file = ex9_import_file;
12466 table->update_ex9_table = update_ex9_table;
12467 table->ex9_limit = ex9_limit;
12468 table->ex9_loop_aware = ex9_loop_aware;
12469 table->ifc_loop_aware = ifc_loop_aware;
12470}
12471\f
12472/* These functions and data-structures are used for fp-as-gp
12473 optimization. */
12474
12475#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC
12476/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12477 the read-only section and read-write section. */
12478#define FAG_WINDOW (508 - 32)
35c08157
KLC
12479
12480/* An nds32_fag represent a gp-relative access.
12481 We find best fp-base by using a sliding window
12482 to find a base address which can cover most gp-access. */
12483struct nds32_fag
12484{
12485 struct nds32_fag *next; /* NULL-teminated linked list. */
12486 bfd_vma addr; /* The address of this fag. */
12487 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12488 It is used for applying FP7U2_FLAG. */
12489 int count; /* How many times this address is referred.
12490 There should be exactly `count' relocations
12491 in relas. */
12492 int relas_capcity; /* The buffer size of relas.
12493 We use an array instead of linked-list,
12494 and realloc is used to adjust buffer size. */
12495};
12496
12497static void
12498nds32_fag_init (struct nds32_fag *head)
12499{
12500 memset (head, 0, sizeof (struct nds32_fag));
12501}
12502
12503static void
12504nds32_fag_verify (struct nds32_fag *head)
12505{
12506 struct nds32_fag *iter;
12507 struct nds32_fag *prev;
12508
12509 prev = NULL;
12510 iter = head->next;
12511 while (iter)
12512 {
12513 if (prev && prev->addr >= iter->addr)
12514 puts ("Bug in fp-as-gp insertion.");
12515 prev = iter;
12516 iter = iter->next;
12517 }
12518}
12519
12520/* Insert a fag in ascending order.
12521 If a fag of the same address already exists,
12522 they are chained by relas array. */
12523
12524static void
12525nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12526 Elf_Internal_Rela * rel)
12527{
12528 struct nds32_fag *iter;
12529 struct nds32_fag *new_fag;
12530 const int INIT_RELAS_CAP = 4;
12531
12532 for (iter = head;
12533 iter->next && iter->next->addr <= addr;
12534 iter = iter->next)
12535 /* Find somewhere to insert. */ ;
12536
12537 /* `iter' will be equal to `head' if the list is empty. */
12538 if (iter != head && iter->addr == addr)
12539 {
12540 /* The address exists in the list.
12541 Insert `rel' into relocation list, relas. */
12542
12543 /* Check whether relas is big enough. */
12544 if (iter->count >= iter->relas_capcity)
12545 {
12546 iter->relas_capcity *= 2;
12547 iter->relas = bfd_realloc
12548 (iter->relas, iter->relas_capcity * sizeof (void *));
12549 }
12550 iter->relas[iter->count++] = rel;
12551 return;
12552 }
12553
12554 /* This is a new address. Create a fag node for it. */
12555 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12556 memset (new_fag, 0, sizeof (*new_fag));
12557 new_fag->addr = addr;
12558 new_fag->count = 1;
12559 new_fag->next = iter->next;
12560 new_fag->relas_capcity = INIT_RELAS_CAP;
12561 new_fag->relas = (Elf_Internal_Rela **)
12562 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12563 new_fag->relas[0] = rel;
12564 iter->next = new_fag;
12565
12566 nds32_fag_verify (head);
12567}
12568
12569static void
12570nds32_fag_free_list (struct nds32_fag *head)
12571{
12572 struct nds32_fag *iter;
12573
12574 iter = head->next;
12575 while (iter)
12576 {
12577 struct nds32_fag *tmp = iter;
12578 iter = iter->next;
12579 free (tmp->relas);
12580 tmp->relas = NULL;
12581 free (tmp);
12582 }
12583}
12584
35c08157
KLC
12585/* Find the best fp-base address.
12586 The relocation associated with that address is returned,
12587 so we can track the symbol instead of a fixed address.
12588
12589 When relaxation, the address of an datum may change,
12590 because a text section is shrinked, so the data section
1c8f6a4d 12591 moves forward. If the aligments of text and data section
35c08157
KLC
12592 are different, their distance may change too.
12593 Therefore, tracking a fixed address is not appriate. */
12594
12595static int
12596nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12597{
12598 struct nds32_fag *base; /* First fag in the window. */
12599 struct nds32_fag *last; /* First fag outside the window. */
12600 int accu = 0; /* Usage accumulation. */
12601 struct nds32_fag *best; /* Best fag. */
12602 int baccu = 0; /* Best accumulation. */
12603
12604 /* Use first fag for initial, and find the last fag in the window.
12605
12606 In each iteration, we could simply subtract previous fag
12607 and accumulate following fags which are inside the window,
12608 untill we each the end. */
12609
1c8f6a4d
KLC
12610 if (head->next == NULL)
12611 {
12612 *bestpp = NULL;
12613 return 0;
12614 }
35c08157
KLC
12615
12616 /* Initialize base. */
12617 base = head->next;
12618 best = base;
12619 for (last = base;
12620 last && last->addr < base->addr + FAG_WINDOW;
12621 last = last->next)
12622 accu += last->count;
12623
12624 baccu = accu;
12625
12626 /* Record the best base in each iteration. */
12627 while (base->next)
1c8f6a4d
KLC
12628 {
12629 accu -= base->count;
12630 base = base->next;
12631 /* Account fags in window. */
12632 for (/* Nothing. */;
12633 last && last->addr < base->addr + FAG_WINDOW;
12634 last = last->next)
12635 accu += last->count;
12636
12637 /* A better fp-base? */
12638 if (accu > baccu)
12639 {
12640 best = base;
12641 baccu = accu;
12642 }
12643 }
35c08157
KLC
12644
12645 if (bestpp)
12646 *bestpp = best;
12647 return baccu;
12648}
12649
12650/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12651 so we can convert it fo fp-relative access later.
12652 `best_fag' is the best fp-base. Only those inside the window
12653 of best_fag is applied the flag. */
12654
12655static bfd_boolean
12656nds32_fag_mark_relax (struct bfd_link_info *link_info,
12657 bfd *abfd, struct nds32_fag *best_fag,
12658 Elf_Internal_Rela *internal_relocs,
12659 Elf_Internal_Rela *irelend)
12660{
12661 struct nds32_fag *ifag;
12662 bfd_vma best_fpbase, gp;
12663 bfd *output_bfd;
12664
12665 output_bfd = abfd->sections->output_section->owner;
12666 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12667 best_fpbase = best_fag->addr;
12668
1c8f6a4d
KLC
12669 if (best_fpbase > gp + sdata_range[1][1]
12670 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC
12671 return FALSE;
12672
12673 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12674 so we know they can be converted to lwi37.fp. */
12675 for (ifag = best_fag;
12676 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12677 {
12678 int i;
12679
12680 for (i = 0; i < ifag->count; i++)
12681 {
12682 Elf_Internal_Rela *insn16_rel;
12683 Elf_Internal_Rela *fag_rel;
12684
12685 fag_rel = ifag->relas[i];
12686
12687 /* Only if this is within the WINDOWS, FP7U2_FLAG
12688 is applied. */
12689
12690 insn16_rel = find_relocs_at_address
12691 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12692
12693 if (insn16_rel != irelend)
12694 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12695 }
12696 }
12697 return TRUE;
12698}
12699
1c8f6a4d
KLC
12700/* Reset INSN16 to clean fp as gp. */
12701
12702static void
12703nds32_fag_unmark_relax (struct nds32_fag *fag,
12704 Elf_Internal_Rela *internal_relocs,
12705 Elf_Internal_Rela *irelend)
12706{
12707 struct nds32_fag *ifag;
12708 int i;
12709 Elf_Internal_Rela *insn16_rel;
12710 Elf_Internal_Rela *fag_rel;
12711
12712 for (ifag = fag; ifag; ifag = ifag->next)
12713 {
12714 for (i = 0; i < ifag->count; i++)
12715 {
12716 fag_rel = ifag->relas[i];
12717
12718 /* Restore the INSN16 relocation. */
12719 insn16_rel = find_relocs_at_address
12720 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12721
12722 if (insn16_rel != irelend)
12723 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12724 }
12725 }
12726}
12727
35c08157
KLC
12728/* This is the main function of fp-as-gp optimization.
12729 It should be called by relax_section. */
12730
12731static bfd_boolean
12732nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12733 bfd *abfd, asection *sec,
12734 Elf_Internal_Rela *internal_relocs,
12735 Elf_Internal_Rela *irelend,
12736 Elf_Internal_Sym *isymbuf)
12737{
12738 Elf_Internal_Rela *begin_rel = NULL;
12739 Elf_Internal_Rela *irel;
12740 struct nds32_fag fag_head;
12741 Elf_Internal_Shdr *symtab_hdr;
12742 bfd_byte *contents;
1c8f6a4d 12743 bfd_boolean ifc_inside = FALSE;
35c08157
KLC
12744
12745 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12746
12747 /* Per-function fp-base selection.
12748 1. Create a list for all the gp-relative access.
12749 2. Base on those gp-relative address,
12750 find a fp-base which can cover most access.
12751 3. Use the fp-base for fp-as-gp relaxation.
12752
12753 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12754 we should
12755 1. delete the `la $fp, _FP_BASE_' instruction and
12756 2. not convert lwi.gp to lwi37.fp.
12757
12758 To delete the _FP_BASE_ instruction, we simply apply
12759 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12760
12761 To suppress the conversion, we simply NOT to apply
12762 R_NDS32_INSN16_FP7U2_FLAG flag. */
12763
12764 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12765
0c4bd9d9 12766 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
12767 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12768 return FALSE;
12769
12770 /* Check whether it is worth for fp-as-gp optimization,
12771 i.e., at least 3 gp-load.
12772
12773 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12774 apply this optimization. */
12775
12776 for (irel = internal_relocs; irel < irelend; irel++)
12777 {
12778 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12779 One we enter the begin of the region, we track all the LW/ST
12780 instructions, so when we leave the region, we try to find
12781 the best fp-base address for those LW/ST instructions. */
12782
12783 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12784 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12785 {
12786 /* Begin of the region. */
12787 if (begin_rel)
12788 (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
12789
12790 begin_rel = irel;
12791 nds32_fag_init (&fag_head);
1c8f6a4d 12792 ifc_inside = FALSE;
35c08157
KLC
12793 }
12794 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12795 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12796 {
12797 int accu;
1c8f6a4d 12798 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC
12799 int dist;
12800
12801 /* End of the region.
12802 Check whether it is worth to do fp-as-gp. */
12803
12804 if (begin_rel == NULL)
12805 {
12806 (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
12807 continue;
12808 }
12809
12810 accu = nds32_fag_find_base (&fag_head, &best_fag);
12811
1c8f6a4d
KLC
12812 /* Clean FP7U2_FLAG because they may set ever. */
12813 tmp_fag = fag_head.next;
12814 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12815
35c08157
KLC
12816 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12817 if (accu < FAG_THRESHOLD
12818 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12819 internal_relocs, irelend))
12820 {
12821 /* Not worth to do fp-as-gp. */
12822 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12823 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12824 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12825 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12826 nds32_fag_free_list (&fag_head);
12827 begin_rel = NULL;
12828 continue;
12829 }
12830
12831 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12832 so we use it to record the distance to the reloction of best
12833 fp-base. */
12834 dist = best_fag->relas[0] - begin_rel;
12835 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12836 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12837 relocation. And get the base value when relocating. */
1c8f6a4d 12838 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC
12839 begin_rel->r_addend |= dist << 16;
12840
12841 nds32_fag_free_list (&fag_head);
12842 begin_rel = NULL;
12843 }
12844
1c8f6a4d 12845 if (begin_rel == NULL || ifc_inside)
35c08157
KLC
12846 /* Skip if we are not in the region of fp-as-gp. */
12847 continue;
12848
12849 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12850 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12851 {
12852 bfd_vma addr;
12853 uint32_t insn;
12854
12855 /* A gp-relative access is found. Insert it to the fag-list. */
12856
12857 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12858 insn = bfd_getb32 (contents + irel->r_offset);
12859 if (!N32_IS_RT3 (insn))
12860 continue;
12861
12862 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12863 nds32_fag_insert (&fag_head, addr, irel);
12864 }
12865 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12866 {
12867 begin_rel = NULL;
12868 }
1c8f6a4d
KLC
12869 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12870 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12871 {
12872 /* Suppress fp as gp when encounter ifc. */
12873 ifc_inside = TRUE;
12874 }
35c08157
KLC
12875 }
12876
12877 return TRUE;
12878}
12879
12880/* Remove unused `la $fp, _FD_BASE_' instruction. */
12881
12882static bfd_boolean
12883nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12884 Elf_Internal_Rela *internal_relocs,
12885 Elf_Internal_Rela *irelend)
12886{
12887 Elf_Internal_Rela *irel;
12888 Elf_Internal_Shdr *symtab_hdr;
12889 bfd_byte *contents = NULL;
12890 nds32_elf_blank_t *relax_blank_list = NULL;
12891 bfd_boolean result = TRUE;
12892 bfd_boolean unused_region = FALSE;
12893
12894 /*
12895 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12896 * R_NDS32_17IFC_PCREL_RELA
12897 * R_NDS32_10IFCU_PCREL_RELA
12898
12899 CASE??????????????
12900 */
12901
12902 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12903 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC
12904
12905 for (irel = internal_relocs; irel < irelend; irel++)
12906 {
12907 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12908 we marked to in previous pass.
12909 DO NOT scan relocations again, since we've alreadly decided it
12910 and set the flag. */
12911 const char *syname;
12912 int syndx;
12913 uint32_t insn;
12914
12915 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12916 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12917 unused_region = TRUE;
12918 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12919 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12920 unused_region = FALSE;
12921
12922 /* We're not in the region. */
12923 if (!unused_region)
12924 continue;
12925
12926 /* _FP_BASE_ must be a GLOBAL symbol. */
12927 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12928 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12929 continue;
12930
12931 /* The symbol name must be _FP_BASE_. */
12932 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12933 if (strcmp (syname, FP_BASE_NAME) != 0)
12934 continue;
12935
12936 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12937 {
12938 /* addi.gp $fp, -256 */
12939 insn = bfd_getb32 (contents + irel->r_offset);
12940 if (insn != INSN_ADDIGP_TO_FP)
12941 continue;
12942 }
12943 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12944 {
12945 /* addi $fp, $gp, -256 */
12946 insn = bfd_getb32 (contents + irel->r_offset);
12947 if (insn != INSN_ADDI_GP_TO_FP)
12948 continue;
12949 }
12950 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12951 {
12952 /* movi $fp, FP_BASE */
12953 insn = bfd_getb32 (contents + irel->r_offset);
12954 if (insn != INSN_MOVI_TO_FP)
12955 continue;
12956 }
12957 else
12958 continue;
12959
12960 /* We got here because a FP_BASE instruction is found. */
12961 if (!insert_nds32_elf_blank_recalc_total
12962 (&relax_blank_list, irel->r_offset, 4))
12963 goto error_return;
12964 }
12965
12966finish:
12967 if (relax_blank_list)
12968 {
12969 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12970 relax_blank_list = NULL;
12971 }
12972 return result;
12973
12974error_return:
12975 result = FALSE;
12976 goto finish;
12977}
1c8f6a4d
KLC
12978
12979/* This is a version of bfd_generic_get_relocated_section_contents.
12980 We need this variety because relaxation will modify the dwarf
12981 infomation. When there is undefined symbol reference error mesage,
12982 linker need to dump line number where the symbol be used. However
12983 the address is be relaxed, it can not get the original dwarf contents.
12984 The variety only modify function call for reading in the section. */
12985
12986static bfd_byte *
12987nds32_elf_get_relocated_section_contents (bfd *abfd,
12988 struct bfd_link_info *link_info,
12989 struct bfd_link_order *link_order,
12990 bfd_byte *data,
12991 bfd_boolean relocatable,
12992 asymbol **symbols)
12993{
12994 bfd *input_bfd = link_order->u.indirect.section->owner;
12995 asection *input_section = link_order->u.indirect.section;
12996 long reloc_size;
12997 arelent **reloc_vector;
12998 long reloc_count;
12999
13000 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
13001 if (reloc_size < 0)
13002 return NULL;
13003
13004 /* Read in the section. */
0c4bd9d9 13005 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC
13006 return NULL;
13007
13008 if (reloc_size == 0)
13009 return data;
13010
13011 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13012 if (reloc_vector == NULL)
13013 return NULL;
13014
13015 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13016 reloc_vector, symbols);
13017 if (reloc_count < 0)
13018 goto error_return;
13019
13020 if (reloc_count > 0)
13021 {
13022 arelent **parent;
13023 for (parent = reloc_vector; *parent != NULL; parent++)
13024 {
13025 char *error_message = NULL;
13026 asymbol *symbol;
13027 bfd_reloc_status_type r;
13028
13029 symbol = *(*parent)->sym_ptr_ptr;
13030 if (symbol->section && discarded_section (symbol->section))
13031 {
13032 bfd_byte *p;
13033 static reloc_howto_type none_howto
13034 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
13035 "unused", FALSE, 0, 0, FALSE);
13036
13037 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
13038 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
13039 p);
13040 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13041 (*parent)->addend = 0;
13042 (*parent)->howto = &none_howto;
13043 r = bfd_reloc_ok;
13044 }
13045 else
13046 r = bfd_perform_relocation (input_bfd, *parent, data,
13047 input_section,
13048 relocatable ? abfd : NULL,
13049 &error_message);
13050
13051 if (relocatable)
13052 {
13053 asection *os = input_section->output_section;
13054
13055 /* A partial link, so keep the relocs. */
13056 os->orelocation[os->reloc_count] = *parent;
13057 os->reloc_count++;
13058 }
13059
13060 if (r != bfd_reloc_ok)
13061 {
13062 switch (r)
13063 {
13064 case bfd_reloc_undefined:
13065 if (!((*link_info->callbacks->undefined_symbol)
13066 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13067 input_bfd, input_section, (*parent)->address, TRUE)))
13068 goto error_return;
13069 break;
13070 case bfd_reloc_dangerous:
13071 BFD_ASSERT (error_message != NULL);
13072 if (!((*link_info->callbacks->reloc_dangerous)
13073 (link_info, error_message, input_bfd, input_section,
13074 (*parent)->address)))
13075 goto error_return;
13076 break;
13077 case bfd_reloc_overflow:
13078 if (!((*link_info->callbacks->reloc_overflow)
13079 (link_info, NULL,
13080 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13081 (*parent)->howto->name, (*parent)->addend,
13082 input_bfd, input_section, (*parent)->address)))
13083 goto error_return;
13084 break;
13085 case bfd_reloc_outofrange:
13086 /* PR ld/13730:
13087 This error can result when processing some partially
13088 complete binaries. Do not abort, but issue an error
13089 message instead. */
13090 link_info->callbacks->einfo
13091 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
13092 abfd, input_section, * parent);
13093 goto error_return;
13094
13095 default:
13096 abort ();
13097 break;
13098 }
13099 }
13100 }
13101 }
13102
13103 free (reloc_vector);
13104 return data;
13105
13106error_return:
13107 free (reloc_vector);
13108 return NULL;
13109}
35c08157
KLC
13110\f
13111/* Link-time IFC relaxation.
13112 In this optimization, we chains jump instructions
13113 of the same destination with ifcall. */
13114
13115
13116/* List to save jal and j relocation. */
13117struct elf_nds32_ifc_symbol_entry
13118{
13119 asection *sec;
13120 struct elf_link_hash_entry *h;
13121 struct elf_nds32_ifc_irel_list *irel_head;
13122 unsigned long insn;
13123 int times;
13124 int enable; /* Apply ifc. */
13125 int ex9_enable; /* Apply ifc after ex9. */
13126 struct elf_nds32_ifc_symbol_entry *next;
13127};
13128
13129struct elf_nds32_ifc_irel_list
13130{
13131 Elf_Internal_Rela *irel;
13132 asection *sec;
13133 bfd_vma addr;
13134 /* If this is set, then it is the last instruction for
13135 ifc-chain, so it must be keep for the actual branching. */
13136 int keep;
13137 struct elf_nds32_ifc_irel_list *next;
13138};
13139
13140static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
13141
13142/* Insert symbol of jal and j for ifc. */
13143
13144static void
13145nds32_elf_ifc_insert_symbol (asection *sec,
13146 struct elf_link_hash_entry *h,
13147 Elf_Internal_Rela *irel,
13148 unsigned long insn)
13149{
13150 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13151
13152 /* Check there is target of existing entry the same as the new one. */
13153 while (ptr != NULL)
13154 {
13155 if (((h == NULL && ptr->sec == sec
13156 && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
13157 && ptr->irel_head->irel->r_addend == irel->r_addend)
13158 || h != NULL)
13159 && ptr->h == h
13160 && ptr->insn == insn)
13161 {
13162 /* The same target exist, so insert into list. */
13163 struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
13164
13165 while (irel_list->next != NULL)
13166 irel_list = irel_list->next;
13167 irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13168 irel_list = irel_list->next;
13169 irel_list->irel = irel;
13170 irel_list->keep = 1;
13171
13172 if (h == NULL)
13173 irel_list->sec = NULL;
13174 else
13175 irel_list->sec = sec;
13176 irel_list->next = NULL;
13177 return;
13178 }
13179 if (ptr->next == NULL)
13180 break;
13181 ptr = ptr->next;
13182 }
13183
13184 /* There is no same target entry, so build a new one. */
13185 if (ifc_symbol_head == NULL)
13186 {
13187 ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13188 ptr = ifc_symbol_head;
13189 }
13190 else
13191 {
13192 ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
13193 ptr = ptr->next;
13194 }
13195
13196 ptr->h = h;
13197 ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
13198 ptr->irel_head->irel = irel;
13199 ptr->insn = insn;
13200 ptr->irel_head->keep = 1;
13201
13202 if (h == NULL)
13203 {
13204 /* Local symbols. */
13205 ptr->sec = sec;
13206 ptr->irel_head->sec = NULL;
13207 }
13208 else
13209 {
13210 /* Global symbol. */
13211 ptr->sec = NULL;
13212 ptr->irel_head->sec = sec;
13213 }
13214
13215 ptr->irel_head->next = NULL;
13216 ptr->times = 0;
13217 ptr->enable = 0;
13218 ptr->ex9_enable = 0;
13219 ptr->next = NULL;
13220}
13221
13222/* Gather all jal and j instructions. */
13223
13224static bfd_boolean
13225nds32_elf_ifc_calc (struct bfd_link_info *info,
13226 bfd *abfd, asection *sec)
13227{
13228 Elf_Internal_Rela *internal_relocs;
13229 Elf_Internal_Rela *irelend;
13230 Elf_Internal_Rela *irel;
13231 Elf_Internal_Shdr *symtab_hdr;
13232 bfd_byte *contents = NULL;
1c8f6a4d 13233 uint32_t insn, insn_with_reg;
35c08157
KLC
13234 unsigned long r_symndx;
13235 struct elf_link_hash_entry *h;
13236 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
13237 struct elf_nds32_link_hash_table *table;
13238 bfd_boolean ifc_loop_aware;
13239
13240 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
13241 TRUE /* keep_memory */);
13242 irelend = internal_relocs + sec->reloc_count;
13243 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
13244
13245 /* Check if the object enable ifc. */
13246 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
13247 R_NDS32_RELAX_ENTRY);
13248
13249 if (irel == NULL
13250 || irel >= irelend
13251 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
13252 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
13253 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
13254 return TRUE;
13255
0c4bd9d9 13256 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
13257 return FALSE;
13258
13259 table = nds32_elf_hash_table (info);
13260 ifc_loop_aware = table->ifc_loop_aware;
13261 while (irel != NULL && irel < irelend)
13262 {
13263 /* Traverse all relocation and gather all of them to build the list. */
13264
13265 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN)
13266 {
13267 if (ifc_loop_aware == 1
13268 && (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0)
13269 {
13270 /* Check the region if loop or not. If it is true and
13271 ifc-loop-aware is true, ignore the region till region end. */
13272 while (irel != NULL
13273 && irel < irelend
13274 && (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
13275 || (irel->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG) != 0))
13276 irel++;
13277 }
13278 }
13279
13280 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
13281 {
13282 insn = bfd_getb32 (contents + irel->r_offset);
13283 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
13284 r_symndx = ELF32_R_SYM (irel->r_info);
13285 if (r_symndx < symtab_hdr->sh_info)
13286 {
13287 /* Local symbol. */
13288 nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
13289 }
13290 else
13291 {
13292 /* External symbol. */
13293 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13294 nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
13295 }
13296 }
13297 irel++;
13298 }
13299 return TRUE;
13300}
13301
13302/* Determine whether j and jal should be substituted. */
13303
13304static void
13305nds32_elf_ifc_filter (struct bfd_link_info *info)
13306{
13307 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13308 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13309 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13310 struct elf_nds32_link_hash_table *table;
13311 int target_optimize;
13312 bfd_vma address;
13313
13314 table = nds32_elf_hash_table (info);
13315 target_optimize = table->target_optimize;
13316 while (ptr)
13317 {
13318 irel_ptr = ptr->irel_head;
13319 if (ptr->h == NULL)
13320 {
13321 /* Local symbol. */
13322 irel_keeper = irel_ptr;
13323 while (irel_ptr && irel_ptr->next)
13324 {
13325 /* Check there is jump target can be used. */
13326 if ((irel_ptr->next->irel->r_offset
13327 - irel_keeper->irel->r_offset) > 1022)
13328 irel_keeper = irel_ptr->next;
13329 else
13330 {
13331 ptr->enable = 1;
13332 irel_ptr->keep = 0;
13333 }
13334 irel_ptr = irel_ptr->next;
13335 }
13336 }
13337 else
13338 {
1c8f6a4d
KLC
13339 /* Global symbol. */
13340 /* We have to get the absolute address and decide
13341 whether to keep it or not. */
35c08157
KLC
13342 while (irel_ptr)
13343 {
13344 address = (irel_ptr->irel->r_offset
13345 + irel_ptr->sec->output_section->vma
13346 + irel_ptr->sec->output_offset);
13347 irel_ptr->addr = address;
13348 irel_ptr = irel_ptr->next;
13349 }
13350
13351 irel_ptr = ptr->irel_head;
13352 while (irel_ptr)
13353 {
1c8f6a4d 13354 /* Sort by address. */
35c08157
KLC
13355 struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
13356 struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
13357 struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
13358 struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
13359
1c8f6a4d 13360 /* Get the smallest one. */
35c08157
KLC
13361 while (irel_temp->next)
13362 {
13363 if (irel_temp->next->addr < irel_dest->addr)
13364 {
13365 irel_dest_prev = irel_temp;
13366 irel_dest = irel_temp->next;
13367 }
13368 irel_temp = irel_temp->next;
13369 }
1c8f6a4d 13370
35c08157
KLC
13371 if (irel_dest != irel_ptr)
13372 {
13373 if (irel_ptr_prev)
13374 irel_ptr_prev->next = irel_dest;
13375 if (irel_dest_prev)
13376 irel_dest_prev->next = irel_ptr;
13377 irel_temp = irel_ptr->next;
13378 irel_ptr->next = irel_dest->next;
13379 irel_dest->next = irel_temp;
13380 }
13381 irel_ptr_prev = irel_ptr;
13382 irel_ptr = irel_ptr->next;
13383 }
13384
13385 irel_ptr = ptr->irel_head;
13386 irel_keeper = irel_ptr;
13387 while (irel_ptr && irel_ptr->next)
13388 {
13389 if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
13390 irel_keeper = irel_ptr->next;
13391 else
13392 {
13393 ptr->enable = 1;
13394 irel_ptr->keep = 0;
13395 }
13396 irel_ptr = irel_ptr->next;
13397 }
13398 }
13399
1c8f6a4d 13400 /* Ex9 enable. Reserve it for ex9. */
35c08157
KLC
13401 if ((target_optimize & NDS32_RELAX_EX9_ON)
13402 && ptr->irel_head != irel_keeper)
13403 ptr->enable = 0;
13404 ptr = ptr->next;
13405 }
13406}
13407
13408/* Determine whether j and jal should be substituted after ex9 done. */
13409
13410static void
13411nds32_elf_ifc_filter_after_ex9 (void)
13412{
13413 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13414 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13415
13416 while (ptr)
13417 {
13418 if (ptr->enable == 0)
13419 {
13420 /* Check whether ifc is applied or not. */
13421 irel_ptr = ptr->irel_head;
13422 ptr->ex9_enable = 1;
13423 while (irel_ptr)
13424 {
13425 if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
13426 {
13427 /* Ex9 already. */
13428 ptr->ex9_enable = 0;
13429 break;
13430 }
13431 irel_ptr = irel_ptr->next;
13432 }
13433 }
13434 ptr = ptr->next;
13435 }
13436}
13437
13438/* Wrapper to do ifc relaxation. */
13439
13440bfd_boolean
13441nds32_elf_ifc_finish (struct bfd_link_info *info)
13442{
13443 int relax_status;
13444 struct elf_nds32_link_hash_table *table;
13445
13446 table = nds32_elf_hash_table (info);
13447 relax_status = table->relax_status;
13448
13449 if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
13450 nds32_elf_ifc_filter (info);
13451 else
13452 nds32_elf_ifc_filter_after_ex9 ();
13453
13454 if (!nds32_elf_ifc_replace (info))
13455 return FALSE;
13456
13457 if (table)
13458 table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
13459 return TRUE;
13460}
13461
13462/* Traverse the result of ifc filter and replace it with ifcall9. */
13463
13464static bfd_boolean
13465nds32_elf_ifc_replace (struct bfd_link_info *info)
13466{
13467 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13468 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13469 nds32_elf_blank_t *relax_blank_list = NULL;
13470 bfd_byte *contents = NULL;
13471 Elf_Internal_Rela *internal_relocs;
13472 Elf_Internal_Rela *irel;
13473 Elf_Internal_Rela *irelend;
13474 unsigned short insn16 = INSN_IFCALL9;
13475 struct elf_nds32_link_hash_table *table;
13476 int relax_status;
13477
13478 table = nds32_elf_hash_table (info);
13479 relax_status = table->relax_status;
13480
13481 while (ptr)
13482 {
13483 /* Traverse the ifc gather list, and replace the
13484 filter entries by ifcall9. */
13485 if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE) && ptr->enable == 1)
1c8f6a4d
KLC
13486 || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
13487 && ptr->ex9_enable == 1))
35c08157
KLC
13488 {
13489 irel_ptr = ptr->irel_head;
13490 if (ptr->h == NULL)
13491 {
13492 /* Local symbol. */
13493 internal_relocs = _bfd_elf_link_read_relocs
13494 (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
13495 irelend = internal_relocs + ptr->sec->reloc_count;
13496
1c8f6a4d 13497 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
0c4bd9d9 13498 &contents, TRUE))
35c08157
KLC
13499 return FALSE;
13500
13501 while (irel_ptr)
13502 {
13503 if (irel_ptr->keep == 0 && irel_ptr->next)
13504 {
1c8f6a4d 13505 /* The one can be replaced. We have to check whether
35c08157
KLC
13506 there is any alignment point in the region. */
13507 irel = irel_ptr->irel;
1c8f6a4d
KLC
13508 while (((irel_ptr->next->keep == 0
13509 && irel < irel_ptr->next->irel)
35c08157
KLC
13510 || (irel_ptr->next->keep == 1 && irel < irelend))
13511 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13512 && (irel->r_addend & 0x1f) == 2))
13513 irel++;
13514 if (irel >= irelend
13515 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13516 && (irel->r_addend & 0x1f) == 2
1c8f6a4d
KLC
13517 && ((irel->r_offset - get_nds32_elf_blank_total
13518 (&relax_blank_list, irel->r_offset, 1))
13519 & 0x02) == 0))
35c08157
KLC
13520 {
13521 /* Replace by ifcall9. */
13522 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13523 if (!insert_nds32_elf_blank_recalc_total
13524 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13525 return FALSE;
13526 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13527 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13528 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13529 }
13530 }
13531 irel_ptr = irel_ptr->next;
13532 }
13533
13534 /* Delete the redundant code. */
13535 if (relax_blank_list)
13536 {
13537 nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
13538 relax_blank_list);
13539 relax_blank_list = NULL;
13540 }
13541 }
13542 else
13543 {
13544 /* Global symbol. */
13545 while (irel_ptr)
13546 {
13547 if (irel_ptr->keep == 0 && irel_ptr->next)
13548 {
13549 /* The one can be replaced, and we have to check
13550 whether there is any alignment point in the region. */
13551 internal_relocs = _bfd_elf_link_read_relocs
13552 (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
13553 TRUE /* keep_memory */);
13554 irelend = internal_relocs + irel_ptr->sec->reloc_count;
0c4bd9d9
KLC
13555 if (!nds32_get_section_contents (irel_ptr->sec->owner,
13556 irel_ptr->sec, &contents,
13557 TRUE))
35c08157
KLC
13558 return FALSE;
13559
13560 irel = irel_ptr->irel;
13561 while (((irel_ptr->sec == irel_ptr->next->sec
13562 && irel_ptr->next->keep == 0
13563 && irel < irel_ptr->next->irel)
13564 || ((irel_ptr->sec != irel_ptr->next->sec
13565 || irel_ptr->next->keep == 1)
13566 && irel < irelend))
13567 && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13568 && (irel->r_addend & 0x1f) == 2))
13569 irel++;
13570 if (irel >= irelend
13571 || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
13572 && (irel->r_addend & 0x1f) == 2
13573 && ((irel->r_offset
13574 - get_nds32_elf_blank_total (&relax_blank_list,
13575 irel->r_offset, 1)) & 0x02) == 0))
13576 {
13577 /* Replace by ifcall9. */
13578 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13579 if (!insert_nds32_elf_blank_recalc_total
13580 (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
13581 return FALSE;
13582
13583 /* Delete the redundant code, and clear the relocation. */
13584 nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
13585 irel_ptr->sec,
13586 relax_blank_list);
13587 irel_ptr->irel->r_info =
1c8f6a4d
KLC
13588 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13589 R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
13590 relax_blank_list = NULL;
13591 }
13592 }
13593
13594 irel_ptr = irel_ptr->next;
13595 }
13596 }
13597 }
13598 ptr = ptr->next;
13599 }
13600
13601 return TRUE;
13602}
13603
13604/* Relocate ifcall. */
13605
1c8f6a4d 13606static bfd_boolean
35c08157
KLC
13607nds32_elf_ifc_reloc (void)
13608{
13609 struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
13610 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
13611 struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
13612 bfd_vma relocation, address;
13613 unsigned short insn16;
35c08157 13614 bfd_byte *contents = NULL;
1c8f6a4d
KLC
13615 static bfd_boolean done = FALSE;
13616
13617 if (done)
13618 return TRUE;
13619
13620 done = TRUE;
35c08157
KLC
13621
13622 while (ptr)
13623 {
1c8f6a4d 13624 /* Check the entry is enable ifcall. */
35c08157
KLC
13625 if (ptr->enable == 1 || ptr->ex9_enable == 1)
13626 {
1c8f6a4d 13627 /* Get the reserve jump. */
35c08157
KLC
13628 irel_ptr = ptr->irel_head;
13629 while (irel_ptr)
13630 {
13631 if (irel_ptr->keep == 1)
13632 {
13633 irel_keeper = irel_ptr;
13634 break;
13635 }
13636 irel_ptr = irel_ptr->next;
13637 }
13638
13639 irel_ptr = ptr->irel_head;
13640 if (ptr->h == NULL)
13641 {
13642 /* Local symbol. */
0c4bd9d9
KLC
13643 if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
13644 &contents, TRUE))
35c08157
KLC
13645 return FALSE;
13646
13647 while (irel_ptr)
13648 {
13649 if (irel_ptr->keep == 0
1c8f6a4d 13650 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157
KLC
13651 {
13652 relocation = irel_keeper->irel->r_offset;
13653 relocation = relocation - irel_ptr->irel->r_offset;
13654 while (irel_keeper && relocation > 1022)
13655 {
13656 irel_keeper = irel_keeper->next;
13657 if (irel_keeper && irel_keeper->keep == 1)
13658 {
13659 relocation = irel_keeper->irel->r_offset;
13660 relocation = relocation - irel_ptr->irel->r_offset;
13661 }
13662 }
13663 if (relocation > 1022)
13664 {
13665 /* Double check. */
13666 irel_keeper = ptr->irel_head;
13667 while (irel_keeper)
13668 {
13669 if (irel_keeper->keep == 1)
13670 {
13671 relocation = irel_keeper->irel->r_offset;
13672 relocation = relocation - irel_ptr->irel->r_offset;
13673 }
13674 if (relocation <= 1022)
13675 break;
13676 irel_keeper = irel_keeper->next;
13677 }
13678 if (!irel_keeper)
13679 return FALSE;
13680 }
1c8f6a4d
KLC
13681 irel_ptr->irel->r_info =
13682 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13683 R_NDS32_NONE);
35c08157
KLC
13684 insn16 = INSN_IFCALL9 | (relocation >> 1);
13685 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13686 }
13687 irel_ptr = irel_ptr->next;
13688 }
13689 }
13690 else
13691 {
13692 /* Global symbol. */
13693 while (irel_ptr)
13694 {
13695 if (irel_ptr->keep == 0
1c8f6a4d 13696 && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
35c08157 13697 {
1c8f6a4d 13698 /* Get the distance between ifcall and jump. */
35c08157
KLC
13699 relocation = (irel_keeper->irel->r_offset
13700 + irel_keeper->sec->output_section->vma
13701 + irel_keeper->sec->output_offset);
13702 address = (irel_ptr->irel->r_offset
13703 + irel_ptr->sec->output_section->vma
13704 + irel_ptr->sec->output_offset);
13705 relocation = relocation - address;
1c8f6a4d
KLC
13706
13707 /* The distance is over ragne, find callee again. */
35c08157
KLC
13708 while (irel_keeper && relocation > 1022)
13709 {
13710 irel_keeper = irel_keeper->next;
13711 if (irel_keeper && irel_keeper->keep ==1)
13712 {
13713 relocation = (irel_keeper->irel->r_offset
13714 + irel_keeper->sec->output_section->vma
13715 + irel_keeper->sec->output_offset);
13716 relocation = relocation - address;
13717 }
13718 }
13719
13720 if (relocation > 1022)
13721 {
13722 /* Double check. */
13723 irel_keeper = ptr->irel_head;
13724 while (irel_keeper)
13725 {
13726 if (irel_keeper->keep == 1)
13727 {
13728
13729 relocation = (irel_keeper->irel->r_offset
13730 + irel_keeper->sec->output_section->vma
13731 + irel_keeper->sec->output_offset);
13732 relocation = relocation - address;
13733 }
13734 if (relocation <= 1022)
13735 break;
13736 irel_keeper = irel_keeper->next;
13737 }
13738 if (!irel_keeper)
13739 return FALSE;
13740 }
13741 if (!nds32_get_section_contents
0c4bd9d9 13742 (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
1c8f6a4d
KLC
13743 return FALSE;
13744 insn16 = INSN_IFCALL9 | (relocation >> 1);
13745 bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
13746 irel_ptr->irel->r_info =
13747 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
13748 R_NDS32_NONE);
35c08157
KLC
13749 }
13750 irel_ptr =irel_ptr->next;
13751 }
13752 }
13753 }
13754 ptr = ptr->next;
13755 }
13756
13757 return TRUE;
13758}
13759
13760/* End of IFC relaxation. */
13761\f
13762/* EX9 Instruction Table Relaxation. */
13763
13764/* Global hash list. */
13765struct elf_link_hash_entry_list
13766{
13767 struct elf_link_hash_entry *h;
13768 struct elf_link_hash_entry_list *next;
13769};
13770
13771/* Save different destination but same insn. */
13772struct elf_link_hash_entry_mul_list
13773{
13774 /* Global symbol times. */
13775 int times;
13776 /* Save relocation for each global symbol but useful?? */
13777 Elf_Internal_Rela *irel;
13778 /* For sethi, two sethi may have the same high-part but different low-parts. */
13779 Elf_Internal_Rela rel_backup;
13780 struct elf_link_hash_entry_list *h_list;
13781 struct elf_link_hash_entry_mul_list *next;
13782};
13783
13784/* Instruction hash table. */
13785struct elf_nds32_code_hash_entry
13786{
13787 struct bfd_hash_entry root;
13788 int times;
13789 /* For insn that can use relocation or constant ex: sethi. */
13790 int const_insn;
13791 asection *sec;
13792 struct elf_link_hash_entry_mul_list *m_list;
13793 /* Using r_addend. */
13794 Elf_Internal_Rela *irel;
13795 /* Using r_info. */
13796 Elf_Internal_Rela rel_backup;
13797};
13798
13799/* Instruction count list. */
13800struct elf_nds32_insn_times_entry
13801{
13802 const char *string;
13803 int times;
13804 int order;
13805 asection *sec;
13806 struct elf_link_hash_entry_mul_list *m_list;
13807 Elf_Internal_Rela *irel;
13808 Elf_Internal_Rela rel_backup;
13809 struct elf_nds32_insn_times_entry *next;
13810};
13811
13812/* J and JAL symbol list. */
13813struct elf_nds32_symbol_entry
13814{
13815 char *string;
13816 unsigned long insn;
13817 struct elf_nds32_symbol_entry *next;
13818};
13819
13820/* Relocation list. */
13821struct elf_nds32_irel_entry
13822{
13823 Elf_Internal_Rela *irel;
13824 struct elf_nds32_irel_entry *next;
13825};
13826
13827/* ex9.it insn need to be fixed. */
13828struct elf_nds32_ex9_refix
13829{
13830 Elf_Internal_Rela *irel;
13831 asection *sec;
13832 struct elf_link_hash_entry *h;
13833 int order;
13834 struct elf_nds32_ex9_refix *next;
13835};
13836
13837static struct bfd_hash_table ex9_code_table;
13838static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
13839static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
13840
13841/* EX9 hash function. */
13842
13843static struct bfd_hash_entry *
13844nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
13845 struct bfd_hash_table *table,
13846 const char *string)
13847{
13848 struct elf_nds32_code_hash_entry *ret;
13849
13850 /* Allocate the structure if it has not already been allocated by a
13851 subclass. */
13852 if (entry == NULL)
13853 {
13854 entry = (struct bfd_hash_entry *)
13855 bfd_hash_allocate (table, sizeof (*ret));
13856 if (entry == NULL)
13857 return entry;
13858 }
13859
13860 /* Call the allocation method of the superclass. */
13861 entry = bfd_hash_newfunc (entry, table, string);
13862 if (entry == NULL)
13863 return entry;
13864
13865 ret = (struct elf_nds32_code_hash_entry*) entry;
13866 ret->times = 0;
13867 ret->const_insn = 0;
13868 ret->m_list = NULL;
13869 ret->sec = NULL;
13870 ret->irel = NULL;
13871 return &ret->root;
13872}
13873
13874/* Insert ex9 entry
13875 this insert must be stable sorted by times. */
13876
13877static void
13878nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
13879{
13880 struct elf_nds32_insn_times_entry *temp;
13881 struct elf_nds32_insn_times_entry *temp2;
13882
13883 if (ex9_insn_head == NULL)
13884 {
13885 ex9_insn_head = ptr;
13886 ptr->next = NULL;
13887 }
13888 else
13889 {
13890 temp = ex9_insn_head;
13891 temp2 = ex9_insn_head;
13892 while (temp->next &&
13893 (temp->next->times >= ptr->times
13894 || temp->times == -1))
13895 {
13896 if (temp->times == -1)
13897 temp2 = temp;
13898 temp = temp->next;
13899 }
13900 if (ptr->times > temp->times && temp->times != -1)
13901 {
13902 ptr->next = temp;
13903 if (temp2->times == -1)
13904 temp2->next = ptr;
13905 else
13906 ex9_insn_head = ptr;
13907 }
13908 else if (temp->next == NULL)
13909 {
13910 temp->next = ptr;
13911 ptr->next = NULL;
13912 }
13913 else
13914 {
13915 ptr->next = temp->next;
13916 temp->next = ptr;
13917 }
13918 }
13919}
13920
13921/* Examine each insn times in hash table.
13922 Handle multi-link hash entry.
13923
13924 TODO: This function doesn't assign so much info since it is fake. */
13925
13926static int
13927nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
13928{
13929 struct elf_nds32_insn_times_entry *ptr;
13930 int times;
13931
13932 if (h->m_list == NULL)
13933 {
13934 /* Local symbol insn or insn without relocation. */
13935 if (h->times < 3)
13936 return TRUE;
13937
13938 ptr = (struct elf_nds32_insn_times_entry *)
13939 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13940 ptr->times = h->times;
13941 ptr->string = h->root.string;
13942 ptr->m_list = NULL;
13943 ptr->sec = h->sec;
13944 ptr->irel = h->irel;
13945 ptr->rel_backup = h->rel_backup;
13946 nds32_elf_ex9_insert_entry (ptr);
13947 }
13948 else
13949 {
13950 /* Global symbol insn. */
13951 /* Only sethi insn has multiple m_list. */
13952 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
13953
13954 times = 0;
13955 while (m_list)
13956 {
13957 times += m_list->times;
13958 m_list = m_list->next;
13959 }
13960 if (times >= 3)
13961 {
13962 m_list = h->m_list;
13963 ptr = (struct elf_nds32_insn_times_entry *)
13964 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13965 ptr->times = times; /* Use the total times. */
13966 ptr->string = h->root.string;
13967 ptr->m_list = m_list;
13968 ptr->sec = h->sec;
13969 ptr->irel = m_list->irel;
13970 ptr->rel_backup = m_list->rel_backup;
13971 nds32_elf_ex9_insert_entry (ptr);
13972 }
13973 if (h->const_insn == 1)
13974 {
13975 /* sethi with constant value. */
13976 if (h->times < 3)
13977 return TRUE;
13978
13979 ptr = (struct elf_nds32_insn_times_entry *)
13980 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
13981 ptr->times = h->times;
13982 ptr->string = h->root.string;
13983 ptr->m_list = NULL;
13984 ptr->sec = NULL;
13985 ptr->irel = NULL;
13986 ptr->rel_backup = h->rel_backup;
13987 nds32_elf_ex9_insert_entry (ptr);
13988 }
13989 }
13990 return TRUE;
13991}
13992
13993/* Count each insn times in hash table.
13994 Handle multi-link hash entry. */
13995
13996static int
13997nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
13998{
13999 int reservation, times;
14000 unsigned long relocation, min_relocation;
14001 struct elf_nds32_insn_times_entry *ptr;
14002
14003 if (h->m_list == NULL)
14004 {
14005 /* Local symbol insn or insn without relocation. */
14006 if (h->times < 3)
14007 return TRUE;
14008 ptr = (struct elf_nds32_insn_times_entry *)
14009 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14010 ptr->times = h->times;
14011 ptr->string = h->root.string;
14012 ptr->m_list = NULL;
14013 ptr->sec = h->sec;
14014 ptr->irel = h->irel;
14015 ptr->rel_backup = h->rel_backup;
14016 nds32_elf_ex9_insert_entry (ptr);
14017 }
14018 else
14019 {
14020 /* Global symbol insn. */
14021 /* Only sethi insn has multiple m_list. */
14022 struct elf_link_hash_entry_mul_list *m_list = h->m_list;
14023
14024 if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
14025 && m_list->next != NULL)
14026 {
14027 /* Sethi insn has different symbol or addend but has same hi20. */
14028 times = 0;
14029 reservation = 1;
14030 relocation = 0;
14031 min_relocation = 0xffffffff;
14032 while (m_list)
14033 {
14034 /* Get the minimum sethi address
14035 and calculate how many entry the sethi-list have to use. */
14036 if ((m_list->h_list->h->root.type == bfd_link_hash_defined
14037 || m_list->h_list->h->root.type == bfd_link_hash_defweak)
14038 && (m_list->h_list->h->root.u.def.section != NULL
14039 && m_list->h_list->h->root.u.def.section->output_section != NULL))
14040 {
14041 relocation = (m_list->h_list->h->root.u.def.value +
14042 m_list->h_list->h->root.u.def.section->output_section->vma +
14043 m_list->h_list->h->root.u.def.section->output_offset);
14044 relocation += m_list->irel->r_addend;
14045 }
14046 else
14047 relocation = 0;
14048 if (relocation < min_relocation)
14049 min_relocation = relocation;
14050 times += m_list->times;
14051 m_list = m_list->next;
14052 }
14053 if (min_relocation < ex9_relax_size)
14054 reservation = (min_relocation >> 12) + 1;
14055 else
14056 reservation = (min_relocation >> 12)
14057 - ((min_relocation - ex9_relax_size) >> 12) + 1;
14058 if (reservation < (times / 3))
14059 {
14060 /* Efficient enough to use ex9. */
14061 int i;
14062
14063 for (i = reservation ; i > 0; i--)
14064 {
14065 /* Allocate number of reservation ex9 entry. */
14066 ptr = (struct elf_nds32_insn_times_entry *)
14067 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14068 ptr->times = h->m_list->times / reservation;
14069 ptr->string = h->root.string;
14070 ptr->m_list = h->m_list;
14071 ptr->sec = h->sec;
14072 ptr->irel = h->m_list->irel;
14073 ptr->rel_backup = h->m_list->rel_backup;
14074 nds32_elf_ex9_insert_entry (ptr);
14075 }
14076 }
14077 }
14078 else
14079 {
14080 /* Normal global symbol that means no different address symbol
14081 using same ex9 entry. */
14082 if (m_list->times >= 3)
14083 {
14084 ptr = (struct elf_nds32_insn_times_entry *)
14085 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14086 ptr->times = m_list->times;
14087 ptr->string = h->root.string;
14088 ptr->m_list = h->m_list;
14089 ptr->sec = h->sec;
14090 ptr->irel = h->m_list->irel;
14091 ptr->rel_backup = h->m_list->rel_backup;
14092 nds32_elf_ex9_insert_entry (ptr);
14093 }
14094 }
14095
14096 if (h->const_insn == 1)
14097 {
14098 /* sethi with constant value. */
14099 if (h->times < 3)
14100 return TRUE;
14101
14102 ptr = (struct elf_nds32_insn_times_entry *)
14103 bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
14104 ptr->times = h->times;
14105 ptr->string = h->root.string;
14106 ptr->m_list = NULL;
14107 ptr->sec = NULL;
14108 ptr->irel = NULL;
14109 ptr->rel_backup = h->rel_backup;
14110 nds32_elf_ex9_insert_entry (ptr);
14111 }
14112 }
14113
14114 return TRUE;
14115}
14116
14117/* Hash table traverse function. */
14118
14119static void
14120nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
14121{
14122 unsigned int i;
14123
14124 ex9_code_table.frozen = 1;
14125 for (i = 0; i < ex9_code_table.size; i++)
14126 {
14127 struct bfd_hash_entry *p;
14128
14129 for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
14130 if (!func ((struct elf_nds32_code_hash_entry *) p))
14131 goto out;
14132 }
14133out:
14134 ex9_code_table.frozen = 0;
14135}
14136
14137
14138/* Give order number to insn list. */
14139
14140static void
14141nds32_elf_order_insn_times (struct bfd_link_info *info)
14142{
14143 struct elf_nds32_insn_times_entry *ex9_insn;
1c8f6a4d 14144 struct elf_nds32_insn_times_entry *temp = NULL;
35c08157 14145 struct elf_nds32_link_hash_table *table;
35c08157 14146 int ex9_limit;
1c8f6a4d
KLC
14147 int number = 0;
14148
14149 if (ex9_insn_head == NULL)
14150 return;
35c08157
KLC
14151
14152/* The max number of entries is 512. */
14153 ex9_insn = ex9_insn_head;
14154 table = nds32_elf_hash_table (info);
14155 ex9_limit = table->ex9_limit;
14156
35c08157
KLC
14157 ex9_insn = ex9_insn_head;
14158
1c8f6a4d 14159 while (ex9_insn != NULL && number < ex9_limit)
35c08157 14160 {
1c8f6a4d 14161 ex9_insn->order = number;
35c08157 14162 number++;
1c8f6a4d 14163 temp = ex9_insn;
35c08157
KLC
14164 ex9_insn = ex9_insn->next;
14165 }
14166
1c8f6a4d
KLC
14167 if (ex9_insn && temp)
14168 temp->next = NULL;
35c08157
KLC
14169
14170 while (ex9_insn != NULL)
14171 {
14172 /* Free useless entry. */
14173 temp = ex9_insn;
14174 ex9_insn = ex9_insn->next;
14175 free (temp);
14176 }
14177}
14178
14179/* Build .ex9.itable section. */
14180
14181static void
14182nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
14183{
14184 asection *table_sec;
14185 struct elf_nds32_insn_times_entry *ptr;
14186 bfd *it_abfd;
14187 int number = 0;
14188 bfd_byte *contents = NULL;
14189
14190 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 14191 it_abfd = it_abfd->link.next)
35c08157
KLC
14192 {
14193 /* Find the section .ex9.itable, and put all entries into it. */
14194 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
14195 if (table_sec != NULL)
14196 {
0c4bd9d9 14197 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157
KLC
14198 return;
14199
14200 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14201 number++;
14202
14203 table_sec->size = number * 4;
14204
14205 if (number == 0)
1c8f6a4d 14206 return;
35c08157
KLC
14207
14208 elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
14209 number = 0;
14210 for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
14211 {
14212 long val;
14213
14214 val = strtol (ptr->string, NULL, 16);
14215 bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
14216 number++;
14217 }
14218 break;
14219 }
14220 }
14221}
14222
14223/* Get insn with regs according to relocation type. */
14224
14225static void
14226nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
1c8f6a4d 14227 uint32_t insn, uint32_t *insn_with_reg)
35c08157
KLC
14228{
14229 reloc_howto_type *howto = NULL;
14230
14231 if (irel == NULL
14232 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14233 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14234 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14235 {
14236 *insn_with_reg = insn;
14237 return;
14238 }
14239
14240 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14241 *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
14242}
14243
14244/* Mask number of address bits according to relocation. */
14245
14246static unsigned long
14247nds32_elf_irel_mask (Elf_Internal_Rela *irel)
14248{
14249 reloc_howto_type *howto = NULL;
14250
14251 if (irel == NULL
14252 || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
14253 && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
14254 >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
14255 return 0;
14256
14257 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
14258 return howto->dst_mask;
14259}
14260
14261static void
14262nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
14263 struct elf_nds32_irel_entry *irel_ptr)
14264{
14265 if (*irel_list == NULL)
14266 {
14267 *irel_list = irel_ptr;
14268 irel_ptr->next = NULL;
14269 }
14270 else
14271 {
14272 irel_ptr->next = *irel_list;
14273 *irel_list = irel_ptr;
14274 }
14275}
14276
14277static void
14278nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
14279 struct elf_link_hash_entry *h, int order)
14280{
14281 struct elf_nds32_ex9_refix *ptr;
14282
14283 ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
14284 ptr->sec = sec;
14285 ptr->irel = irel;
14286 ptr->h = h;
14287 ptr->order = order;
14288 ptr->next = NULL;
14289
14290 if (ex9_refix_head == NULL)
14291 ex9_refix_head = ptr;
14292 else
14293 {
14294 struct elf_nds32_ex9_refix *temp = ex9_refix_head;
14295
14296 while (temp->next != NULL)
14297 temp = temp->next;
14298 temp->next = ptr;
14299 }
14300}
14301
14302enum
14303{
14304 DATA_EXIST = 1,
14305 CLEAN_PRE = 1 << 1,
14306 PUSH_PRE = 1 << 2
14307};
14308
14309/* Check relocation type if supporting for ex9. */
14310
14311static int
14312nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
14313 Elf_Internal_Rela **irel,
14314 Elf_Internal_Rela *irelend,
14315 nds32_elf_blank_t *relax_blank_list,
f4cb41f4 14316 asection *sec,bfd_vma *off,
35c08157
KLC
14317 bfd_byte *contents)
14318{
14319 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
14320 bfd_boolean nested_ex9, nested_loop;
14321 bfd_boolean ex9_loop_aware;
14322 /* We use the highest 1 byte of result to record
14323 how many bytes location counter has to move. */
14324 int result = 0;
14325 Elf_Internal_Rela *irel_save = NULL;
14326 struct elf_nds32_link_hash_table *table;
14327
14328 table = nds32_elf_hash_table (info);
14329 ex9_loop_aware = table->ex9_loop_aware;
14330
14331 while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
14332 {
14333 switch (ELF32_R_TYPE ((*irel)->r_info))
14334 {
14335 case R_NDS32_RELAX_REGION_BEGIN:
14336 /* Ignore code block. */
14337 nested_ex9 = FALSE;
14338 nested_loop = FALSE;
14339 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
14340 || (ex9_loop_aware
14341 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
14342 {
14343 /* Check the region if loop or not. If it is true and
14344 ex9-loop-aware is true, ignore the region till region end. */
14345 /* To save the status for in .no_relax ex9 region and
14346 loop region to conform the block can do ex9 relaxation. */
14347 nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
14348 nested_loop = (ex9_loop_aware
14349 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
14350 while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
14351 {
14352 (*irel)++;
14353 if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
14354 {
14355 /* There may be nested region. */
14356 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14357 nested_ex9 = TRUE;
14358 else if (ex9_loop_aware
14359 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14360 nested_loop = TRUE;
14361 }
14362 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
14363 {
14364 /* The end of region. */
14365 if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
14366 nested_ex9 = FALSE;
14367 else if (ex9_loop_aware
14368 && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
14369 nested_loop = FALSE;
14370 }
1c8f6a4d 14371 else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
35c08157
KLC
14372 && ((*irel)->r_addend & 0x1f) == 2)
14373 {
14374 /* Alignment exist in the region. */
14375 result |= CLEAN_PRE;
14376 if (((*irel)->r_offset -
14377 get_nds32_elf_blank_total (&relax_blank_list,
14378 (*irel)->r_offset, 0)) & 0x02)
14379 result |= PUSH_PRE;
14380 }
14381 }
14382 if ((*irel) >= irelend)
14383 *off = sec->size;
14384 else
14385 *off = (*irel)->r_offset;
14386
14387 /* The final instruction in the region, regard this one as data to ignore it. */
14388 result |= DATA_EXIST;
14389 return result;
14390 }
14391 break;
14392
14393 case R_NDS32_LABEL:
1c8f6a4d 14394 if (((*irel)->r_addend & 0x1f) == 2)
35c08157
KLC
14395 {
14396 /* Check this point is align and decide to do ex9 or not. */
14397 result |= CLEAN_PRE;
14398 if (((*irel)->r_offset -
14399 get_nds32_elf_blank_total (&relax_blank_list,
14400 (*irel)->r_offset, 0)) & 0x02)
14401 result |= PUSH_PRE;
14402 }
14403 break;
14404 case R_NDS32_32_RELA:
14405 /* Data. */
14406 result |= (4 << 24);
14407 result |= DATA_EXIST;
14408 break;
14409 case R_NDS32_16_RELA:
14410 /* Data. */
14411 result |= (2 << 24);
14412 result |= DATA_EXIST;
14413 break;
14414 case R_NDS32_DATA:
14415 /* Data. */
14416 /* The least code alignment is 2. If the data is only one byte,
14417 we have to shift one more byte. */
14418 if ((*irel)->r_addend == 1)
14419 result |= ((*irel)->r_addend << 25) ;
14420 else
14421 result |= ((*irel)->r_addend << 24) ;
14422
14423 result |= DATA_EXIST;
14424 break;
14425
14426 case R_NDS32_25_PCREL_RELA:
14427 case R_NDS32_SDA16S3_RELA:
14428 case R_NDS32_SDA15S3_RELA:
14429 case R_NDS32_SDA15S3:
14430 case R_NDS32_SDA17S2_RELA:
14431 case R_NDS32_SDA15S2_RELA:
14432 case R_NDS32_SDA12S2_SP_RELA:
14433 case R_NDS32_SDA12S2_DP_RELA:
14434 case R_NDS32_SDA15S2:
14435 case R_NDS32_SDA18S1_RELA:
14436 case R_NDS32_SDA15S1_RELA:
14437 case R_NDS32_SDA15S1:
14438 case R_NDS32_SDA19S0_RELA:
14439 case R_NDS32_SDA15S0_RELA:
14440 case R_NDS32_SDA15S0:
14441 case R_NDS32_HI20_RELA:
14442 case R_NDS32_LO12S0_ORI_RELA:
14443 case R_NDS32_LO12S0_RELA:
14444 case R_NDS32_LO12S1_RELA:
14445 case R_NDS32_LO12S2_RELA:
14446 /* These relocation is supported ex9 relaxation currently. */
14447 /* We have to save the relocation for using later, since we have
14448 to check there is any alignment in the same address. */
14449 irel_save = *irel;
14450 break;
14451 default:
14452 /* Not support relocations. */
14453 if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
1c8f6a4d
KLC
14454 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
14455 && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16)
35c08157
KLC
14456 {
14457 /* Note: To optimize aggressively, it maybe can ignore R_NDS32_INSN16 here.
14458 But we have to consider if there is any side-effect. */
14459 if (!(result & DATA_EXIST))
14460 {
14461 /* We have to confirm there is no data relocation in the
14462 same address. In general case, this won't happen. */
14463 /* We have to do ex9 conservative, for those relocation not
14464 considerd we ignore instruction. */
14465 result |= DATA_EXIST;
14466 if (*(contents + *off) & 0x80)
14467 result |= (2 << 24);
14468 else
14469 result |= (4 << 24);
14470 break;
14471 }
14472 }
14473 }
14474 if ((*irel) < irelend
14475 && ((*irel) + 1) < irelend
14476 && (*irel)->r_offset == ((*irel) + 1)->r_offset)
14477 /* There are relocations pointing to the same address, we have to
14478 check all of them. */
14479 (*irel)++;
14480 else
14481 {
14482 if (irel_save)
14483 *irel = irel_save;
14484 return result;
14485 }
14486 }
14487 return result;
14488}
14489
1c8f6a4d
KLC
14490/* Replace with ex9 instruction. */
14491
14492static bfd_boolean
14493nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
14494 nds32_elf_blank_t **relax_blank_list,
14495 struct elf_nds32_irel_entry *pre_irel_ptr,
14496 struct elf_nds32_irel_entry **irel_list)
14497{
14498 if (insn16 != 0)
14499 {
14500 /* Implement the ex9 relaxation. */
14501 bfd_putb16 (insn16, contents + pre_off);
14502 if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
14503 pre_off + 2, 2))
14504 return FALSE;
14505 if (pre_irel_ptr != NULL)
14506 nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
14507 }
14508 return TRUE;
14509}
14510
35c08157
KLC
14511/* Replace input file instruction which is in ex9 itable. */
14512
14513static bfd_boolean
14514nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
14515{
14516 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
14517 bfd_byte *contents = NULL;
1c8f6a4d
KLC
14518 bfd_vma off;
14519 uint16_t insn16, insn_ex9;
35c08157 14520 /* `pre_*' are used to track previous instruction that can use ex9.it. */
1c8f6a4d
KLC
14521 bfd_vma pre_off = -1;
14522 uint16_t pre_insn16 = 0;
35c08157
KLC
14523 struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
14524 Elf_Internal_Rela *internal_relocs;
14525 Elf_Internal_Rela *irel;
14526 Elf_Internal_Rela *irelend;
14527 Elf_Internal_Shdr *symtab_hdr;
14528 Elf_Internal_Sym *isym = NULL;
14529 nds32_elf_blank_t *relax_blank_list = NULL;
1c8f6a4d
KLC
14530 uint32_t insn = 0;
14531 uint32_t insn_with_reg = 0;
14532 uint32_t it_insn;
14533 uint32_t it_insn_with_reg;
35c08157
KLC
14534 unsigned long r_symndx;
14535 asection *isec;
14536 struct elf_nds32_irel_entry *irel_list = NULL;
14537 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
14538 int data_flag, do_replace, save_irel;
1c8f6a4d
KLC
14539 struct elf_link_hash_entry_list *h_list;
14540
35c08157
KLC
14541
14542 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 14543 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
14544 || !nds32_get_local_syms (abfd, sec, &isym))
14545 return FALSE;
1c8f6a4d
KLC
14546 internal_relocs =
14547 _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
35c08157
KLC
14548 irelend = internal_relocs + sec->reloc_count;
14549 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
14550
14551 off = 0;
14552
14553 /* Check if the object enable ex9. */
1c8f6a4d
KLC
14554 irel = find_relocs_at_address (internal_relocs, internal_relocs,
14555 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
14556
14557 /* Check this section trigger ex9 relaxation. */
14558 if (irel == NULL
14559 || irel >= irelend
14560 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
14561 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
14562 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
14563 return TRUE;
14564
14565 irel = internal_relocs;
14566
14567 /* Check alignment and fetch proper relocation. */
14568 while (off < sec->size)
14569 {
14570 struct elf_link_hash_entry *h = NULL;
14571 struct elf_nds32_irel_entry *irel_ptr = NULL;
14572
14573 /* Syn the instruction and the relocation. */
14574 while (irel != NULL && irel < irelend && irel->r_offset < off)
14575 irel++;
14576
14577 data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
14578 relax_blank_list, sec,
14579 &off, contents);
14580 if (data_flag & PUSH_PRE)
1c8f6a4d
KLC
14581 if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14582 &relax_blank_list, pre_irel_ptr,
14583 &irel_list))
14584 return FALSE;
35c08157
KLC
14585
14586 if (data_flag & CLEAN_PRE)
14587 {
14588 pre_off = 0;
14589 pre_insn16 = 0;
14590 pre_irel_ptr = NULL;
14591 }
14592 if (data_flag & DATA_EXIST)
14593 {
14594 /* We save the move offset in the highest byte. */
14595 off += (data_flag >> 24);
14596 continue;
14597 }
14598
14599 if (*(contents + off) & 0x80)
14600 {
14601 /* 2-byte instruction. */
14602 off += 2;
14603 continue;
14604 }
14605
14606 /* Load the instruction and its opcode with register for comparing. */
14607 ex9_insn = ex9_insn_head;
14608 insn = bfd_getb32 (contents + off);
14609 insn_with_reg = 0;
14610 while (ex9_insn)
14611 {
14612 it_insn = strtol (ex9_insn->string, NULL, 16);
14613 it_insn_with_reg = 0;
14614 do_replace = 0;
14615 save_irel = 0;
14616
14617 if (irel != NULL && irel < irelend && irel->r_offset == off)
14618 {
14619 /* Insn with relocation. */
14620 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
14621
14622 if (ex9_insn->irel != NULL)
1c8f6a4d
KLC
14623 nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
14624 &it_insn_with_reg);
35c08157
KLC
14625
14626 if (ex9_insn->irel != NULL
1c8f6a4d
KLC
14627 && (ELF32_R_TYPE (irel->r_info) ==
14628 ELF32_R_TYPE (ex9_insn->irel->r_info))
35c08157
KLC
14629 && (insn_with_reg == it_insn_with_reg))
14630 {
14631 /* Insn relocation and format is the same as table entry. */
14632
14633 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
14634 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
14635 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
14636 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
14637 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
14638 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
14639 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
14640 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
14641 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
14642 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
14643 && ELF32_R_TYPE (irel->r_info) <=
14644 R_NDS32_SDA12S2_SP_RELA)
14645 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
14646 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
14647 {
14648 r_symndx = ELF32_R_SYM (irel->r_info);
14649 if (r_symndx < symtab_hdr->sh_info)
14650 {
14651 /* Local symbol. */
14652 int shndx = isym[r_symndx].st_shndx;
14653
14654 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14655 if (ex9_insn->sec == isec
14656 && ex9_insn->irel->r_addend == irel->r_addend
14657 && ex9_insn->irel->r_info == irel->r_info)
14658 {
14659 do_replace = 1;
14660 save_irel = 1;
14661 }
14662 }
14663 else
14664 {
14665 /* External symbol. */
14666 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14667 if (ex9_insn->m_list)
14668 {
35c08157
KLC
14669 h_list = ex9_insn->m_list->h_list;
14670 while (h_list)
14671 {
14672 if (h == h_list->h
1c8f6a4d
KLC
14673 && (ex9_insn->m_list->irel->r_addend ==
14674 irel->r_addend))
35c08157
KLC
14675 {
14676 do_replace = 1;
14677 save_irel = 1;
14678 break;
14679 }
14680 h_list = h_list->next;
14681 }
14682 }
14683 }
14684 }
14685 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
14686 {
14687 r_symndx = ELF32_R_SYM (irel->r_info);
14688 if (r_symndx < symtab_hdr->sh_info)
14689 {
14690 /* Local symbols. Compare its base symbol and offset. */
14691 int shndx = isym[r_symndx].st_shndx;
14692
14693 isec = elf_elfsections (abfd)[shndx]->bfd_section;
14694 if (ex9_insn->sec == isec
14695 && ex9_insn->irel->r_addend == irel->r_addend
14696 && ex9_insn->irel->r_info == irel->r_info)
14697 {
14698 do_replace = 1;
14699 save_irel = 1;
14700 }
14701 }
14702 else
14703 {
14704 /* External symbol. */
14705 struct elf_link_hash_entry_mul_list *m_list;
14706
14707 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14708 m_list = ex9_insn->m_list;
14709
14710 while (m_list)
14711 {
1c8f6a4d 14712 h_list = m_list->h_list;
35c08157
KLC
14713
14714 while (h_list)
14715 {
14716 if (h == h_list->h
1c8f6a4d
KLC
14717 && (m_list->irel->r_addend
14718 == irel->r_addend))
35c08157
KLC
14719 {
14720 do_replace = 1;
14721 save_irel = 1;
14722 if (ex9_insn->next
14723 && ex9_insn->m_list
14724 && ex9_insn->m_list == ex9_insn->next->m_list)
14725 {
14726 /* sethi multiple entry must be fixed */
14727 nds32_elf_ex9_insert_fix (sec, irel,
14728 h, ex9_insn->order);
14729 }
14730 break;
14731 }
14732 h_list = h_list->next;
14733 }
14734 m_list = m_list->next;
14735 }
14736 }
14737 }
14738 }
14739
14740 /* Import table: Check the symbol hash table and the
14741 jump target. Only R_NDS32_25_PCREL_RELA now. */
14742 else if (ex9_insn->times == -1
14743 && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
14744 {
14745 nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
14746 if (insn_with_reg == it_insn_with_reg)
14747 {
14748 char code[10];
14749 bfd_vma relocation;
14750
14751 r_symndx = ELF32_R_SYM (irel->r_info);
14752 if (r_symndx >= symtab_hdr->sh_info)
14753 {
14754 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14755 if ((h->root.type == bfd_link_hash_defined
14756 || h->root.type == bfd_link_hash_defweak)
1c8f6a4d
KLC
14757 && h->root.u.def.section != NULL
14758 && h->root.u.def.section->output_section != NULL
35c08157 14759 && h->root.u.def.section->gc_mark == 1
1c8f6a4d 14760 && bfd_is_abs_section (h->root.u.def.section)
35c08157
KLC
14761 && h->root.u.def.value > sec->size)
14762 {
1c8f6a4d
KLC
14763 relocation = h->root.u.def.value +
14764 h->root.u.def.section->output_section->vma +
14765 h->root.u.def.section->output_offset;
35c08157 14766 relocation += irel->r_addend;
1c8f6a4d
KLC
14767 insn = insn_with_reg
14768 | ((relocation >> 1) & 0xffffff);
14769 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
14770 if (strcmp (code, ex9_insn->string) == 0)
14771 {
14772 do_replace = 1;
14773 save_irel = 1;
14774 }
14775 }
14776 }
14777 }
14778 }
14779 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
14780 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
14781 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
14782 {
14783 /* These relocations do not have to relocate contens, so it can
14784 be regard as instruction without relocation. */
14785 if (insn == it_insn && ex9_insn->irel == NULL)
14786 do_replace = 1;
14787 }
14788 }
14789 else
14790 {
14791 /* Instruction without relocation, we only
14792 have to compare their byte code. */
14793 if (insn == it_insn && ex9_insn->irel == NULL)
14794 do_replace = 1;
14795 }
14796
14797 /* Insntruction match so replacing the code here. */
14798 if (do_replace == 1)
14799 {
14800 /* There are two formats of ex9 instruction. */
14801 if (ex9_insn->order < 32)
14802 insn_ex9 = INSN_EX9_IT_2;
14803 else
14804 insn_ex9 = INSN_EX9_IT_1;
14805 insn16 = insn_ex9 | ex9_insn->order;
14806
1c8f6a4d
KLC
14807 /* Insert ex9 instruction. */
14808 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14809 &relax_blank_list, pre_irel_ptr,
14810 &irel_list);
35c08157
KLC
14811 pre_off = off;
14812 pre_insn16 = insn16;
14813
14814 if (save_irel)
14815 {
14816 /* For instuction with relocation do relax. */
14817 irel_ptr = (struct elf_nds32_irel_entry *)
14818 bfd_malloc (sizeof (struct elf_nds32_irel_entry));
14819 irel_ptr->irel = irel;
14820 irel_ptr->next = NULL;
14821 pre_irel_ptr = irel_ptr;
14822 }
14823 else
14824 pre_irel_ptr = NULL;
14825 break;
14826 }
14827 ex9_insn = ex9_insn->next;
14828 }
14829 off += 4;
14830 }
14831
1c8f6a4d
KLC
14832 /* Insert ex9 instruction. */
14833 nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
14834 &relax_blank_list, pre_irel_ptr,
14835 &irel_list);
35c08157
KLC
14836
14837 /* Delete the redundant code. */
14838 if (relax_blank_list)
14839 {
14840 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
14841 relax_blank_list = NULL;
14842 }
14843
14844 /* Clear the relocation that is replaced by ex9. */
14845 while (irel_list)
14846 {
14847 struct elf_nds32_irel_entry *irel_ptr;
14848
14849 irel_ptr = irel_list;
14850 irel_list = irel_ptr->next;
14851 irel_ptr->irel->r_info =
14852 ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
14853 free (irel_ptr);
14854 }
14855 return TRUE;
14856}
14857
14858/* Initialize ex9 hash table. */
14859
14860int
14861nds32_elf_ex9_init (void)
14862{
14863 if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
14864 sizeof (struct elf_nds32_code_hash_entry),
14865 1023))
14866 {
14867 (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
14868 return FALSE;
14869 }
14870 return TRUE;
14871}
14872
14873/* Predict how many bytes will be relaxed with ex9 and ifc. */
14874
14875static void
14876nds32_elf_ex9_total_relax (struct bfd_link_info *info)
14877{
14878 struct elf_nds32_insn_times_entry *ex9_insn;
14879 struct elf_nds32_insn_times_entry *temp;
14880 int target_optimize;
14881 struct elf_nds32_link_hash_table *table;
14882
14883 if (ex9_insn_head == NULL)
14884 return;
14885
14886 table = nds32_elf_hash_table (info);
14887 target_optimize = table->target_optimize;
14888 ex9_insn = ex9_insn_head;
14889 while (ex9_insn)
14890 {
14891 ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
14892 temp = ex9_insn;
14893 ex9_insn = ex9_insn->next;
14894 free (temp);
14895 }
14896 ex9_insn_head = NULL;
14897
14898 if ((target_optimize & NDS32_RELAX_JUMP_IFC_ON))
14899 {
14900 /* Examine ifc reduce size. */
14901 struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
14902 struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
14903 int size = 0;
14904
14905 while (ifc_ent)
14906 {
14907 if (ifc_ent->enable == 0)
14908 {
14909 /* Not ifc yet. */
14910 irel_ptr = ifc_ent->irel_head;
14911 while (irel_ptr)
14912 {
14913 size += 2;
14914 irel_ptr = irel_ptr->next;
14915 }
14916 }
14917 size -= 2;
14918 ifc_ent = ifc_ent->next;
14919 }
14920 ex9_relax_size += size;
14921 }
14922}
14923
14924/* Finish ex9 table. */
14925
14926void
14927nds32_elf_ex9_finish (struct bfd_link_info *link_info)
14928{
35c08157
KLC
14929 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
14930 nds32_elf_order_insn_times (link_info);
14931 nds32_elf_ex9_total_relax (link_info);
14932 /* Traverse the hash table and count its times. */
14933 nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
14934 nds32_elf_order_insn_times (link_info);
14935 nds32_elf_ex9_build_itable (link_info);
35c08157
KLC
14936}
14937
14938/* Relocate the entries in ex9 table. */
14939
14940static bfd_vma
14941nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
14942 struct bfd_link_info *link_info)
14943{
14944 Elf_Internal_Sym *isym = NULL;
14945 bfd_vma relocation = -1;
1c8f6a4d 14946 struct elf_link_hash_entry *h;
35c08157
KLC
14947
14948 if (ptr->m_list != NULL)
14949 {
14950 /* Global symbol. */
1c8f6a4d
KLC
14951 h = ptr->m_list->h_list->h;
14952 if ((h->root.type == bfd_link_hash_defined
14953 || h->root.type == bfd_link_hash_defweak)
14954 && h->root.u.def.section != NULL
14955 && h->root.u.def.section->output_section != NULL)
35c08157
KLC
14956 {
14957
1c8f6a4d
KLC
14958 relocation = h->root.u.def.value +
14959 h->root.u.def.section->output_section->vma +
14960 h->root.u.def.section->output_offset;
35c08157
KLC
14961 relocation += ptr->m_list->irel->r_addend;
14962 }
14963 else
14964 relocation = 0;
14965 }
14966 else if (ptr->sec !=NULL)
14967 {
14968 /* Local symbol. */
14969 Elf_Internal_Sym sym;
14970 asection *sec = NULL;
14971 asection isec;
14972 asection *isec_ptr = &isec;
14973 Elf_Internal_Rela irel_backup = *(ptr->irel);
14974 asection *sec_backup = ptr->sec;
14975 bfd *abfd = ptr->sec->owner;
14976
14977 if (!nds32_get_local_syms (abfd, sec, &isym))
14978 return FALSE;
14979 isym = isym + ELF32_R_SYM (ptr->irel->r_info);
14980
14981 sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
14982 if (sec != NULL)
14983 *isec_ptr = *sec;
14984 sym = *isym;
14985
14986 /* The purpose is same as elf_link_input_bfd. */
14987 if (isec_ptr != NULL
14988 && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
14989 && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
14990 {
14991 sym.st_value =
14992 _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
14993 elf_section_data (isec_ptr)->sec_info,
14994 isym->st_value);
14995 }
14996 relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
14997 &ptr->sec, ptr->irel);
14998 if (ptr->irel != NULL)
14999 relocation += ptr->irel->r_addend;
15000
15001 /* Restore origin value since there may be some insntructions that
15002 could not be replaced with ex9.it. */
15003 *(ptr->irel) = irel_backup;
15004 ptr->sec = sec_backup;
15005 }
15006
15007 return relocation;
15008}
15009
15010/* Import ex9 table and build list. */
15011
15012void
15013nds32_elf_ex9_import_table (struct bfd_link_info *info)
15014{
1c8f6a4d 15015 int num = 0;
35c08157
KLC
15016 bfd_byte *contents;
15017 unsigned long insn;
15018 FILE *ex9_import_file;
15019 int update_ex9_table;
15020 struct elf_nds32_link_hash_table *table;
15021
15022 table = nds32_elf_hash_table (info);
15023 ex9_import_file = table->ex9_import_file;
1c8f6a4d 15024 rewind (table->ex9_import_file);
35c08157
KLC
15025
15026 contents = bfd_malloc (sizeof (bfd_byte) * 4);
15027
35c08157 15028 /* Read instructions from the input file and build the list. */
1c8f6a4d 15029 while (!feof (ex9_import_file))
35c08157
KLC
15030 {
15031 char *code;
15032 struct elf_nds32_insn_times_entry *ptr;
15033 size_t nread;
15034
15035 nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
1c8f6a4d
KLC
15036 /* Ignore the final byte 0x0a. */
15037 if (nread < 1)
15038 break;
35c08157
KLC
15039 insn = bfd_getb32 (contents);
15040 code = bfd_malloc (sizeof (char) * 9);
15041 snprintf (code, 9, "%08lx", insn);
15042 ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
15043 ptr->string = code;
15044 ptr->order = num;
15045 ptr->times = -1;
15046 ptr->sec = NULL;
15047 ptr->m_list = NULL;
15048 ptr->rel_backup.r_offset = 0;
15049 ptr->rel_backup.r_info = 0;
15050 ptr->rel_backup.r_addend = 0;
15051 ptr->irel = NULL;
15052 ptr->next = NULL;
15053 nds32_elf_ex9_insert_entry (ptr);
35c08157
KLC
15054 num++;
15055 }
15056
15057 update_ex9_table = table->update_ex9_table;
15058 if (update_ex9_table == 1)
15059 {
15060 /* It has to consider of sethi need to use multiple page
15061 but it not be done yet. */
15062 nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
15063 nds32_elf_order_insn_times (info);
15064 }
15065}
15066
15067/* Export ex9 table. */
15068
15069static void
15070nds32_elf_ex9_export (struct bfd_link_info *info,
15071 bfd_byte *contents, int size)
15072{
15073 FILE *ex9_export_file;
15074 struct elf_nds32_link_hash_table *table;
15075
15076 table = nds32_elf_hash_table (info);
15077 ex9_export_file = table->ex9_export_file;
15078 fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
15079 fclose (ex9_export_file);
15080}
15081
15082/* Adjust relocations of J and JAL in ex9.itable.
15083 Export ex9 table. */
15084
1c8f6a4d 15085static void
35c08157
KLC
15086nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
15087{
15088 asection *table_sec = NULL;
15089 struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
15090 struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
15091 bfd *it_abfd;
1c8f6a4d 15092 uint32_t insn, insn_with_reg, source_insn;
35c08157
KLC
15093 bfd_byte *contents = NULL, *source_contents = NULL;
15094 int size = 0;
15095 bfd_vma gp;
15096 int shift, update_ex9_table, offset = 0;
15097 reloc_howto_type *howto = NULL;
15098 Elf_Internal_Rela rel_backup;
15099 unsigned short insn_ex9;
15100 struct elf_nds32_link_hash_table *table;
1c8f6a4d
KLC
15101 FILE *ex9_export_file;
15102 static bfd_boolean done = FALSE;
15103
15104 if (done)
15105 return;
15106
15107 done = TRUE;
35c08157
KLC
15108
15109 table = nds32_elf_hash_table (link_info);
15110 if (table)
15111 table->relax_status |= NDS32_RELAX_EX9_DONE;
15112
15113
15114 update_ex9_table = table->update_ex9_table;
15115 /* Generated ex9.itable exactly. */
15116 if (update_ex9_table == 0)
15117 {
15118 for (it_abfd = link_info->input_bfds; it_abfd != NULL;
c72f2fb2 15119 it_abfd = it_abfd->link.next)
35c08157
KLC
15120 {
15121 table_sec = bfd_get_section_by_name (it_abfd, ".ex9.itable");
15122 if (table_sec != NULL)
15123 break;
15124 }
15125
15126 if (table_sec != NULL)
15127 {
15128 bfd *output_bfd;
35c08157
KLC
15129
15130 output_bfd = table_sec->output_section->owner;
15131 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15132 if (table_sec->size == 0)
15133 return;
15134
0c4bd9d9 15135 if (!nds32_get_section_contents (it_abfd, table_sec, &contents, TRUE))
35c08157 15136 return;
35c08157
KLC
15137 }
15138 }
15139 else
15140 {
15141 /* Set gp. */
15142 bfd *output_bfd;
15143
15144 output_bfd = link_info->input_bfds->sections->output_section->owner;
15145 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15146 contents = bfd_malloc (sizeof (bfd_byte) * 2048);
15147 }
15148
15149 /* Relocate instruction. */
15150 while (ex9_insn)
15151 {
15152 bfd_vma relocation, min_relocation = 0xffffffff;
15153
15154 insn = strtol (ex9_insn->string, NULL, 16);
15155 insn_with_reg = 0;
15156 if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
15157 {
15158 if (ex9_insn->m_list)
15159 rel_backup = ex9_insn->m_list->rel_backup;
15160 else
15161 rel_backup = ex9_insn->rel_backup;
15162
15163 nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
15164 howto =
15165 bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
15166 (rel_backup.r_info));
15167 shift = howto->rightshift;
15168 if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
15169 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
15170 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
15171 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
15172 || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA)
15173 {
15174 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15175 insn =
15176 insn_with_reg | ((relocation >> shift) &
15177 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15178 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15179 }
15180 else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
15181 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
15182 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
15183 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
15184 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
15185 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
15186 || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
15187 && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
15188 {
15189 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15190 insn =
15191 insn_with_reg | (((relocation - gp) >> shift) &
15192 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15193 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15194 }
15195 else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
15196 {
15197 /* Sethi may be multiple entry for one insn. */
1c8f6a4d
KLC
15198 if (ex9_insn->next && ex9_insn->m_list
15199 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15200 {
15201 struct elf_link_hash_entry_mul_list *m_list;
15202 struct elf_nds32_ex9_refix *fix_ptr;
1c8f6a4d 15203 struct elf_link_hash_entry *h;
35c08157
KLC
15204
15205 temp_ptr = ex9_insn;
15206 temp_ptr2 = ex9_insn;
15207 m_list = ex9_insn->m_list;
15208 while (m_list)
15209 {
1c8f6a4d
KLC
15210 h = m_list->h_list->h;
15211 relocation = h->root.u.def.value +
15212 h->root.u.def.section->output_section->vma +
15213 h->root.u.def.section->output_offset;
35c08157
KLC
15214 relocation += m_list->irel->r_addend;
15215
15216 if (relocation < min_relocation)
15217 min_relocation = relocation;
15218 m_list = m_list->next;
15219 }
15220 relocation = min_relocation;
15221
15222 /* Put insntruction into ex9 table. */
15223 insn = insn_with_reg
15224 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15225 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15226 relocation = relocation + 0x1000; /* hi20 */
15227
1c8f6a4d
KLC
15228 while (ex9_insn->next && ex9_insn->m_list
15229 && ex9_insn->m_list == ex9_insn->next->m_list)
35c08157
KLC
15230 {
15231 /* Multiple sethi. */
15232 ex9_insn = ex9_insn->next;
15233 size += 4;
35c08157
KLC
15234 insn =
15235 insn_with_reg | ((relocation >> shift) &
15236 nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15237 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15238 relocation = relocation + 0x1000; /* hi20 */
15239 }
15240
15241 fix_ptr = ex9_refix_head;
15242 while (fix_ptr)
15243 {
15244 /* Fix ex9 insn. */
15245 /* temp_ptr2 points to the head of multiple sethi. */
15246 temp_ptr = temp_ptr2;
15247 while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
15248 {
15249 fix_ptr = fix_ptr->next;
15250 }
15251 if (fix_ptr->order != temp_ptr->order)
15252 break;
15253
15254 /* Set source insn. */
1c8f6a4d
KLC
15255 relocation =
15256 fix_ptr->h->root.u.def.value +
15257 fix_ptr->h->root.u.def.section->output_section->vma +
15258 fix_ptr->h->root.u.def.section->output_offset;
35c08157
KLC
15259 relocation += fix_ptr->irel->r_addend;
15260 /* sethi imm is imm20s. */
15261 source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
15262
15263 while (temp_ptr)
15264 {
35c08157
KLC
15265 /* Match entry and source code. */
15266 insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
15267 if (insn == source_insn)
15268 {
15269 /* Fix the ex9 insn. */
15270 if (temp_ptr->order != fix_ptr->order)
15271 {
15272 if (!nds32_get_section_contents
15273 (fix_ptr->sec->owner, fix_ptr->sec,
0c4bd9d9 15274 &source_contents, TRUE))
35c08157
KLC
15275 (*_bfd_error_handler)
15276 (_("Linker: error cannot fixed ex9 relocation \n"));
15277 if (temp_ptr->order < 32)
15278 insn_ex9 = INSN_EX9_IT_2;
15279 else
15280 insn_ex9 = INSN_EX9_IT_1;
15281 insn_ex9 = insn_ex9 | temp_ptr->order;
15282 bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
15283 }
15284 break;
15285 }
15286 else
15287 {
15288 if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
15289 (*_bfd_error_handler)
15290 (_("Linker: error cannot fixed ex9 relocation \n"));
15291 else
15292 temp_ptr = temp_ptr->next;
15293 }
15294 }
15295 fix_ptr = fix_ptr->next;
15296 }
15297 }
15298 else
15299 {
15300 relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
15301 insn = insn_with_reg
15302 | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
1c8f6a4d 15303 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
35c08157
KLC
15304 }
15305 }
15306 }
15307 else
15308 {
15309 /* Insn without relocation does not have to be fixed
15310 if need to update export table. */
15311 if (update_ex9_table == 1)
15312 bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
15313 }
15314 ex9_insn = ex9_insn->next;
15315 size += 4;
15316 }
15317
15318 ex9_export_file = table->ex9_export_file;
15319 if (ex9_export_file != NULL)
1c8f6a4d 15320 nds32_elf_ex9_export (link_info, contents, table_sec->size);
35c08157
KLC
15321 else if (update_ex9_table == 1)
15322 {
1c8f6a4d
KLC
15323 table->ex9_export_file = table->ex9_import_file;
15324 rewind (table->ex9_export_file);
15325 nds32_elf_ex9_export (link_info, contents, size);
35c08157
KLC
15326 }
15327}
15328
15329/* Generate ex9 hash table. */
15330
15331static bfd_boolean
f4cb41f4 15332nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
35c08157
KLC
15333 struct bfd_link_info *link_info)
15334{
15335 Elf_Internal_Rela *internal_relocs;
15336 Elf_Internal_Rela *irelend;
15337 Elf_Internal_Rela *irel;
15338 Elf_Internal_Rela *jrel;
15339 Elf_Internal_Rela rel_backup;
15340 Elf_Internal_Shdr *symtab_hdr;
15341 Elf_Internal_Sym *isym = NULL;
15342 asection *isec;
15343 struct elf_link_hash_entry **sym_hashes;
15344 bfd_byte *contents = NULL;
f4cb41f4 15345 bfd_vma off = 0;
35c08157 15346 unsigned long r_symndx;
1c8f6a4d 15347 uint32_t insn, insn_with_reg;
35c08157
KLC
15348 struct elf_link_hash_entry *h;
15349 int data_flag, shift, align;
15350 bfd_vma relocation;
15351 /* Suppress ex9 if `.no_relax ex9' or inner loop. */
15352 reloc_howto_type *howto = NULL;
15353
15354 sym_hashes = elf_sym_hashes (abfd);
15355 /* Load section instructions, relocations, and symbol table. */
0c4bd9d9 15356 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
15357 return FALSE;
15358
15359 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
15360 TRUE /* keep_memory */);
15361 irelend = internal_relocs + sec->reloc_count;
15362 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
15363 if (!nds32_get_local_syms (abfd, sec, &isym))
15364 return FALSE;
15365
15366 /* Check the object if enable ex9. */
15367 irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
15368 R_NDS32_RELAX_ENTRY);
15369
15370 /* Check this section trigger ex9 relaxation. */
15371 if (irel == NULL
15372 || irel >= irelend
15373 || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
15374 || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
15375 && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
15376 return TRUE;
15377
15378 irel = internal_relocs;
15379
15380 /* Push each insn into hash table. */
15381 while (off < sec->size)
15382 {
15383 char code[10];
15384 struct elf_nds32_code_hash_entry *entry;
15385
15386 while (irel != NULL && irel < irelend && irel->r_offset < off)
15387 irel++;
15388
1c8f6a4d
KLC
15389 data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
15390 NULL, sec, &off, contents);
35c08157
KLC
15391 if (data_flag & DATA_EXIST)
15392 {
15393 /* We save the move offset in the highest byte. */
15394 off += (data_flag >> 24);
15395 continue;
15396 }
15397
15398 if (*(contents + off) & 0x80)
15399 {
15400 off += 2;
15401 }
15402 else
15403 {
15404 h = NULL;
15405 isec = NULL;
15406 jrel = NULL;
15407 rel_backup.r_info = 0;
15408 rel_backup.r_offset = 0;
15409 rel_backup.r_addend = 0;
15410 /* Load the instruction and its opcode with register for comparing. */
15411 insn = bfd_getb32 (contents + off);
15412 insn_with_reg = 0;
15413 if (irel != NULL && irel < irelend && irel->r_offset == off)
15414 {
15415 nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
15416 howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
15417 shift = howto->rightshift;
15418 align = (1 << shift) - 1;
15419 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
15420 || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
15421 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
15422 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
15423 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
15424 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
15425 ||(ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15426 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15427 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15428 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15429 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15430 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15431 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15432 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15433 {
15434 r_symndx = ELF32_R_SYM (irel->r_info);
15435 jrel = irel;
15436 rel_backup = *irel;
15437 if (r_symndx < symtab_hdr->sh_info)
15438 {
15439 /* Local symbol. */
15440 int shndx = isym[r_symndx].st_shndx;
15441
15442 bfd_vma st_value = (isym + r_symndx)->st_value;
15443 isec = elf_elfsections (abfd)[shndx]->bfd_section;
15444 relocation = (isec->output_section->vma + isec->output_offset
15445 + st_value + irel->r_addend);
15446 }
15447 else
15448 {
15449 /* External symbol. */
15450 bfd_boolean warned ATTRIBUTE_UNUSED;
15451 bfd_boolean ignored ATTRIBUTE_UNUSED;
15452 bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
15453 asection *sym_sec;
15454
15455 /* Maybe there is a better way to get h and relocation */
15456 RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
15457 r_symndx, symtab_hdr, sym_hashes,
15458 h, sym_sec, relocation,
15459 unresolved_reloc, warned, ignored);
15460 relocation += irel->r_addend;
1c8f6a4d
KLC
15461 if ((h->root.type != bfd_link_hash_defined
15462 && h->root.type != bfd_link_hash_defweak)
15463 || strcmp (h->root.root.string, "_FP_BASE_") == 0)
35c08157
KLC
15464 {
15465 off += 4;
15466 continue;
15467 }
15468 }
15469
15470 /* Check for gp relative instruction alignment. */
15471 if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
15472 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
15473 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
15474 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
15475 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
15476 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
15477 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
15478 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
15479 {
15480 bfd_vma gp;
15481 bfd *output_bfd = sec->output_section->owner;
15482 bfd_reloc_status_type r;
15483
15484 /* If the symbol is in the abs section, the out_bfd will be null.
15485 This happens when the relocation has a symbol@GOTOFF. */
15486 r = nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
15487 if (r != bfd_reloc_ok)
15488 {
15489 off += 4;
15490 continue;
15491 }
15492
15493 relocation -= gp;
15494
15495 /* Make sure alignment is correct. */
15496 if (relocation & align)
15497 {
15498 /* Incorrect alignment. */
15499 (*_bfd_error_handler)
15500 (_("%s: warning: unaligned small data access. "
15501 "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
15502 bfd_get_filename (abfd), irel->r_offset,
15503 irel->r_info, irel->r_addend, relocation, align);
15504 off += 4;
15505 continue;
15506 }
15507 }
15508
15509 insn = insn_with_reg
15510 | ((relocation >> shift) & nds32_elf_irel_mask (irel));
15511 }
15512 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
1c8f6a4d
KLC
15513 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
15514 || ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
35c08157
KLC
15515 {
15516 /* These relocations do not have to relocate contens, so it can
15517 be regard as instruction without relocation. */
15518 }
15519 else
15520 {
15521 off += 4;
15522 continue;
15523 }
15524 }
15525
1c8f6a4d 15526 snprintf (code, sizeof (code), "%08x", insn);
35c08157
KLC
15527 /* Copy "code". */
15528 entry = (struct elf_nds32_code_hash_entry*)
15529 bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
15530 if (entry == NULL)
15531 {
15532 (*_bfd_error_handler)
15533 (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
15534 return FALSE;
15535 }
15536 if (h)
15537 {
15538 if (h->root.type == bfd_link_hash_undefined)
15539 return TRUE;
15540 /* Global symbol. */
15541 /* In order to do sethi with different symbol but same value. */
15542 if (entry->m_list == NULL)
15543 {
15544 struct elf_link_hash_entry_mul_list *m_list_new;
15545 struct elf_link_hash_entry_list *h_list_new;
15546
15547 m_list_new = (struct elf_link_hash_entry_mul_list *)
15548 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15549 h_list_new = (struct elf_link_hash_entry_list *)
15550 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15551 entry->m_list = m_list_new;
15552 m_list_new->h_list = h_list_new;
15553 m_list_new->rel_backup = rel_backup;
15554 m_list_new->times = 1;
15555 m_list_new->irel = jrel;
15556 m_list_new->next = NULL;
15557 h_list_new->h = h;
15558 h_list_new->next = NULL;
15559 }
15560 else
15561 {
15562 struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
15563 struct elf_link_hash_entry_list *h_list;
15564
15565 while (m_list)
15566 {
15567 /* Build the different symbols that point to the same address. */
15568 h_list = m_list->h_list;
15569 if (h_list->h->root.u.def.value == h->root.u.def.value
15570 && h_list->h->root.u.def.section->output_section->vma
15571 == h->root.u.def.section->output_section->vma
15572 && h_list->h->root.u.def.section->output_offset
15573 == h->root.u.def.section->output_offset
15574 && m_list->rel_backup.r_addend == rel_backup.r_addend)
15575 {
15576 m_list->times++;
15577 m_list->irel = jrel;
15578 while (h_list->h != h && h_list->next)
15579 h_list = h_list->next;
15580 if (h_list->h != h)
15581 {
15582 struct elf_link_hash_entry_list *h_list_new;
15583
15584 h_list_new = (struct elf_link_hash_entry_list *)
15585 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15586 h_list->next = h_list_new;
15587 h_list_new->h = h;
15588 h_list_new->next = NULL;
15589 }
15590 break;
15591 }
15592 /* The sethi case may have different address but the
15593 hi20 is the same. */
15594 else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
15595 && m_list->next == NULL)
15596 {
15597 struct elf_link_hash_entry_mul_list *m_list_new;
15598 struct elf_link_hash_entry_list *h_list_new;
15599
15600 m_list_new = (struct elf_link_hash_entry_mul_list *)
15601 bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
15602 h_list_new = (struct elf_link_hash_entry_list *)
15603 bfd_malloc (sizeof (struct elf_link_hash_entry_list));
15604 m_list->next = m_list_new;
15605 m_list_new->h_list = h_list_new;
15606 m_list_new->rel_backup = rel_backup;
15607 m_list_new->times = 1;
15608 m_list_new->irel = jrel;
15609 m_list_new->next = NULL;
15610 h_list_new->h = h;
15611 h_list_new->next = NULL;
15612 break;
15613 }
15614 m_list = m_list->next;
15615 }
15616 if (!m_list)
15617 {
15618 off += 4;
15619 continue;
15620 }
15621 }
15622 }
15623 else
15624 {
15625 /* Local symbol and insn without relocation*/
15626 entry->times++;
15627 entry->rel_backup = rel_backup;
15628 }
15629
15630 /* Use in sethi insn with constant and global symbol in same format. */
15631 if (!jrel)
15632 entry->const_insn = 1;
15633 else
15634 entry->irel = jrel;
15635 entry->sec = isec;
15636 off += 4;
15637 }
15638 }
15639 return TRUE;
15640}
15641
15642/* Set the _ITB_BASE, and point it to ex9 table. */
15643
15644bfd_boolean
15645nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
15646{
15647 bfd *abfd;
15648 asection *sec;
15649 bfd *output_bfd = NULL;
15650 struct bfd_link_hash_entry *bh = NULL;
35c08157
KLC
15651
15652 if (is_ITB_BASE_set == 1)
15653 return TRUE;
15654
15655 is_ITB_BASE_set = 1;
15656
1c8f6a4d
KLC
15657 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_", FALSE, FALSE, TRUE);
15658
15659 if (bh && (bh->type == bfd_link_hash_defined
15660 || bh->type == bfd_link_hash_defweak))
15661 return TRUE;
35c08157
KLC
15662
15663 for (abfd = link_info->input_bfds; abfd != NULL;
c72f2fb2 15664 abfd = abfd->link.next)
35c08157
KLC
15665 {
15666 sec = bfd_get_section_by_name (abfd, ".ex9.itable");
15667 if (sec != NULL)
15668 {
15669 output_bfd = sec->output_section->owner;
15670 break;
15671 }
15672 }
15673 if (output_bfd == NULL)
15674 {
15675 output_bfd = link_info->output_bfd;
15676 if (output_bfd->sections == NULL)
15677 return TRUE;
15678 else
15679 sec = bfd_abs_section_ptr;
15680 }
15681 bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
15682 FALSE, FALSE, TRUE);
15683 return (_bfd_generic_link_add_one_symbol
15684 (link_info, output_bfd, "_ITB_BASE_",
1c8f6a4d 15685 BSF_GLOBAL | BSF_WEAK, sec, 0,
35c08157
KLC
15686 (const char *) NULL, FALSE, get_elf_backend_data
15687 (output_bfd)->collect, &bh));
15688} /* End EX9.IT */
15689\f
15690
15691#define ELF_ARCH bfd_arch_nds32
15692#define ELF_MACHINE_CODE EM_NDS32
15693#define ELF_MAXPAGESIZE 0x1000
1c8f6a4d 15694#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 15695
6d00b590 15696#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 15697#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 15698#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC
15699#define TARGET_LITTLE_NAME "elf32-nds32le"
15700
15701#define elf_info_to_howto nds32_info_to_howto
15702#define elf_info_to_howto_rel nds32_info_to_howto_rel
15703
15704#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
15705#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
15706#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
15707#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
15708#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
15709
1c8f6a4d 15710#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC
15711#define elf_backend_action_discarded nds32_elf_action_discarded
15712#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
15713#define elf_backend_check_relocs nds32_elf_check_relocs
15714#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
15715#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
15716#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
15717#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
15718#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
15719#define elf_backend_relocate_section nds32_elf_relocate_section
15720#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
15721#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
15722#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
15723#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
15724#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
15725#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
15726#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
15727#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
15728#define elf_backend_object_p nds32_elf_object_p
15729#define elf_backend_final_write_processing nds32_elf_final_write_processing
15730#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d
KLC
15731#define bfd_elf32_bfd_get_relocated_section_contents \
15732 nds32_elf_get_relocated_section_contents
35c08157
KLC
15733
15734#define elf_backend_can_gc_sections 1
15735#define elf_backend_can_refcount 1
15736#define elf_backend_want_got_plt 1
15737#define elf_backend_plt_readonly 1
15738#define elf_backend_want_plt_sym 0
15739#define elf_backend_got_header_size 12
15740#define elf_backend_may_use_rel_p 1
15741#define elf_backend_default_use_rela_p 1
15742#define elf_backend_may_use_rela_p 1
15743
15744#include "elf32-target.h"
15745
15746#undef ELF_MAXPAGESIZE
15747#define ELF_MAXPAGESIZE 0x2000
15748
15749#undef TARGET_BIG_SYM
6d00b590 15750#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC
15751#undef TARGET_BIG_NAME
15752#define TARGET_BIG_NAME "elf32-nds32be-linux"
15753#undef TARGET_LITTLE_SYM
6d00b590 15754#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC
15755#undef TARGET_LITTLE_NAME
15756#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
15757#undef elf32_bed
15758#define elf32_bed elf32_nds32_lin_bed
15759
15760#include "elf32-target.h"