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[thirdparty/binutils-gdb.git] / bfd / elf32-nds32.c
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35c08157 1/* NDS32-specific support for 32-bit ELF.
fd67aa11 2 Copyright (C) 2012-2024 Free Software Foundation, Inc.
35c08157
KLC		 3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
35c08157
KLC		 21
22
23#include "sysdep.h"
24#include "bfd.h"
35c08157
KLC		 25#include "bfdlink.h"
26#include "libbfd.h"
27#include "elf-bfd.h"
28#include "libiberty.h"
35c08157
KLC		 29#include "elf/nds32.h"
30#include "opcode/nds32.h"
31#include "elf32-nds32.h"
32#include "opcode/cgen.h"
33#include "../opcodes/nds32-opc.h"
34
bb294208
AM		 35/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
36#define OCTETS_PER_BYTE(ABFD, SEC) 1
37
35c08157
KLC		 38/* Relocation HOWTO functions. */
39static bfd_reloc_status_type nds32_elf_ignore_reloc
40 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
41static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
42 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
43static bfd_reloc_status_type nds32_elf_hi20_reloc
44 (bfd *, arelent *, asymbol *, void *,
45 asection *, bfd *, char **);
46static bfd_reloc_status_type nds32_elf_lo12_reloc
47 (bfd *, arelent *, asymbol *, void *,
48 asection *, bfd *, char **);
49static bfd_reloc_status_type nds32_elf_generic_reloc
50 (bfd *, arelent *, asymbol *, void *,
51 asection *, bfd *, char **);
52static bfd_reloc_status_type nds32_elf_sda15_reloc
53 (bfd *, arelent *, asymbol *, void *,
54 asection *, bfd *, char **);
55
56/* Helper functions for HOWTO. */
57static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
58 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
59 asection *, bfd_vma, bfd_vma);
35c08157
KLC		 60
61/* Nds32 helper functions. */
35c08157 62static bfd_vma calculate_memory_address
fbaf61ad 63 (bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
0c4bd9d9 64static int nds32_get_section_contents (bfd *, asection *,
0a1b45a2 65 bfd_byte **, bool);
35c08157
KLC		 66static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
67 Elf_Internal_Sym **);
0a1b45a2 68static bool nds32_relax_fp_as_gp
35c08157
KLC		 69 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
70 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
71 Elf_Internal_Sym *isymbuf);
0a1b45a2 72static bool nds32_fag_remove_unused_fpbase
35c08157
KLC		 73 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
74 Elf_Internal_Rela *irelend);
75
76enum
77{
78 MACH_V1 = bfd_mach_n1h,
79 MACH_V2 = bfd_mach_n1h_v2,
80 MACH_V3 = bfd_mach_n1h_v3,
81 MACH_V3M = bfd_mach_n1h_v3m
82};
83
84#define MIN(a, b) ((a) > (b) ? (b) : (a))
85#define MAX(a, b) ((a) > (b) ? (a) : (b))
86
87/* The name of the dynamic interpreter. This is put in the .interp
88 section. */
89#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
90
fbaf61ad
NC		 91#define NDS32_GUARD_SEC_P(flags) ((flags) & SEC_ALLOC \
92 && (flags) & SEC_LOAD \
93 && (flags) & SEC_READONLY)
94
35c08157
KLC		 95/* The nop opcode we use. */
96#define NDS32_NOP32 0x40000009
97#define NDS32_NOP16 0x9200
98
99/* The size in bytes of an entry in the procedure linkage table. */
100#define PLT_ENTRY_SIZE 24
101#define PLT_HEADER_SIZE 24
102
103/* The first entry in a procedure linkage table are reserved,
104 and the initial contents are unimportant (we zero them out).
105 Subsequent entries look like this. */
07d6d2b8
AM		 106#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
107#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
108#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
109#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
110#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
35c08157
KLC		 111
112/* $ta is change to $r15 (from $r25). */
113#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
07d6d2b8
AM		 114#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
115#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
116#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
117#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
118#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
119
120#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
121#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
122#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
123#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
124#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
35c08157
KLC		 125
126#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
07d6d2b8
AM		 127#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
128#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
129#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
130#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
131#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 132
1c8f6a4d
KLC		 133/* These are macros used to get the relocation accurate value. */
134#define ACCURATE_8BIT_S1 (0x100)
135#define ACCURATE_U9BIT_S1 (0x400)
136#define ACCURATE_12BIT_S1 (0x2000)
137#define ACCURATE_14BIT_S1 (0x4000)
138#define ACCURATE_19BIT (0x40000)
139
140/* These are macros used to get the relocation conservative value. */
141#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
142#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
143#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
144#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
145/* These must be more conservative because the address may be in
146 different segment. */
147#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
148#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
149#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
150#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
151#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
152
35c08157
KLC		 153/* Size of small data/bss sections, used to calculate SDA_BASE. */
154static long got_size = 0;
155static int is_SDA_BASE_set = 0;
35c08157 156
35c08157
KLC		 157/* Convert ELF-VER in eflags to string for debugging purpose. */
158static const char *const nds32_elfver_strtab[] =
159{
160 "ELF-1.2",
161 "ELF-1.3",
162 "ELF-1.4",
163};
164
165/* The nds32 linker needs to keep track of the number of relocs that it
166 decides to copy in check_relocs for each symbol. This is so that
167 it can discard PC relative relocs if it doesn't need them when
168 linking with -Bsymbolic. We store the information in a field
169 extending the regular ELF linker hash table. */
170
171/* This structure keeps track of the number of PC relative relocs we
172 have copied for a given symbol. */
173
174struct elf_nds32_pcrel_relocs_copied
175{
176 /* Next section. */
177 struct elf_nds32_pcrel_relocs_copied *next;
178 /* A section in dynobj. */
179 asection *section;
180 /* Number of relocs copied in this section. */
181 bfd_size_type count;
182};
183
fbaf61ad
NC		 184enum elf_nds32_tls_type
185{
186 GOT_UNKNOWN = (0),
187 GOT_NORMAL = (1 << 0),
188 GOT_TLS_LE = (1 << 1),
189 GOT_TLS_IE = (1 << 2),
190 GOT_TLS_IEGP = (1 << 3),
191 GOT_TLS_LD = (1 << 4),
192 GOT_TLS_GD = (1 << 5),
193 GOT_TLS_DESC = (1 << 6),
194};
195
35c08157
KLC		 196/* Nds32 ELF linker hash entry. */
197
198struct elf_nds32_link_hash_entry
199{
200 struct elf_link_hash_entry root;
201
1c8f6a4d 202 /* For checking relocation type. */
fbaf61ad
NC		 203 enum elf_nds32_tls_type tls_type;
204
205 int offset_to_gp;
35c08157
KLC		 206};
207
208/* Get the nds32 ELF linker hash table from a link_info structure. */
209
210#define FP_BASE_NAME "_FP_BASE_"
211static int check_start_export_sym = 0;
35c08157 212
1c8f6a4d
KLC		 213/* The offset for executable tls relaxation. */
214#define TP_OFFSET 0x0
215
fbaf61ad
NC		 216typedef struct
217{
218 int min_id;
219 int max_id;
220 int count;
221 int bias;
222 int init;
223} elf32_nds32_relax_group_t;
224
1c8f6a4d
KLC		 225struct elf_nds32_obj_tdata
226{
227 struct elf_obj_tdata root;
228
229 /* tls_type for each local got entry. */
230 char *local_got_tls_type;
fbaf61ad
NC		 231
232 /* GOTPLT entries for TLS descriptors. */
233 bfd_vma *local_tlsdesc_gotent;
234
235 /* for R_NDS32_RELAX_GROUP handling. */
236 elf32_nds32_relax_group_t relax_group;
237
238 unsigned int hdr_size;
239 int* offset_to_gp;
1c8f6a4d
KLC		 240};
241
242#define elf_nds32_tdata(bfd) \
243 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
244
245#define elf32_nds32_local_got_tls_type(bfd) \
246 (elf_nds32_tdata (bfd)->local_got_tls_type)
247
fbaf61ad
NC		 248#define elf32_nds32_local_gp_offset(bfd) \
249 (elf_nds32_tdata (bfd)->offset_to_gp)
250
1c8f6a4d
KLC		 251#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
252
fbaf61ad
NC		 253#define elf32_nds32_relax_group_ptr(bfd) \
254 &(elf_nds32_tdata (bfd)->relax_group)
255
0a1b45a2 256static bool
1c8f6a4d
KLC		 257nds32_elf_mkobject (bfd *abfd)
258{
259 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
260 NDS32_ELF_DATA);
261}
262
35c08157 263/* Relocations used for relocation. */
fbaf61ad
NC		 264/* Define HOWTO2 (for relocation) and HOWTO3 (for relaxation) to
265 initialize array nds32_elf_howto_table in any order. The benefit
266 is that we can add any new relocations with any numbers and don't
267 need to fill the gap by lots of EMPTY_HOWTO. */
268#define HOWTO2(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
269 [C] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
270
35c08157
KLC		 271static reloc_howto_type nds32_elf_howto_table[] =
272{
273 /* This reloc does nothing. */
fbaf61ad
NC		 274 HOWTO2 (R_NDS32_NONE, /* type */
275 0, /* rightshift */
c94cb026 276 4, /* size */
fbaf61ad 277 32, /* bitsize */
0a1b45a2 278 false, /* pc_relative */
fbaf61ad
NC		 279 0, /* bitpos */
280 complain_overflow_bitfield,/* complain_on_overflow */
281 bfd_elf_generic_reloc, /* special_function */
282 "R_NDS32_NONE", /* name */
0a1b45a2 283 false, /* partial_inplace */
fbaf61ad
NC		 284 0, /* src_mask */
285 0, /* dst_mask */
0a1b45a2 286 false), /* pcrel_offset */
35c08157
KLC		 287
288 /* A 16 bit absolute relocation. */
fbaf61ad
NC		 289 HOWTO2 (R_NDS32_16, /* type */
290 0, /* rightshift */
c94cb026 291 2, /* size */
fbaf61ad 292 16, /* bitsize */
0a1b45a2 293 false, /* pc_relative */
fbaf61ad
NC		 294 0, /* bitpos */
295 complain_overflow_bitfield,/* complain_on_overflow */
296 nds32_elf_generic_reloc,/* special_function */
297 "R_NDS32_16", /* name */
0a1b45a2 298 false, /* partial_inplace */
fbaf61ad
NC		 299 0xffff, /* src_mask */
300 0xffff, /* dst_mask */
0a1b45a2 301 false), /* pcrel_offset */
35c08157
KLC		 302
303 /* A 32 bit absolute relocation. */
fbaf61ad
NC		 304 HOWTO2 (R_NDS32_32, /* type */
305 0, /* rightshift */
c94cb026 306 4, /* size */
fbaf61ad 307 32, /* bitsize */
0a1b45a2 308 false, /* pc_relative */
fbaf61ad
NC		 309 0, /* bitpos */
310 complain_overflow_bitfield,/* complain_on_overflow */
311 nds32_elf_generic_reloc,/* special_function */
312 "R_NDS32_32", /* name */
0a1b45a2 313 false, /* partial_inplace */
fbaf61ad
NC		 314 0xffffffff, /* src_mask */
315 0xffffffff, /* dst_mask */
0a1b45a2 316 false), /* pcrel_offset */
35c08157
KLC		 317
318 /* A 20 bit address. */
fbaf61ad
NC		 319 HOWTO2 (R_NDS32_20, /* type */
320 0, /* rightshift */
c94cb026 321 4, /* size */
fbaf61ad 322 20, /* bitsize */
0a1b45a2 323 false, /* pc_relative */
fbaf61ad
NC		 324 0, /* bitpos */
325 complain_overflow_unsigned,/* complain_on_overflow */
326 nds32_elf_generic_reloc,/* special_function */
327 "R_NDS32_20", /* name */
0a1b45a2 328 false, /* partial_inplace */
fbaf61ad
NC		 329 0xfffff, /* src_mask */
330 0xfffff, /* dst_mask */
0a1b45a2 331 false), /* pcrel_offset */
35c08157
KLC		 332
333 /* An PC Relative 9-bit relocation, shifted by 2.
334 This reloc is complicated because relocations are relative to pc & -4.
335 i.e. branches in the right insn slot use the address of the left insn
336 slot for pc. */
fbaf61ad 337 /* It's not clear whether this should have partial_inplace set or not.
35c08157
KLC		 338 Branch relaxing in the assembler can store the addend in the insn,
339 and if bfd_install_relocation gets called the addend may get added
340 again. */
fbaf61ad
NC		 341 HOWTO2 (R_NDS32_9_PCREL, /* type */
342 1, /* rightshift */
c94cb026 343 2, /* size */
fbaf61ad 344 8, /* bitsize */
0a1b45a2 345 true, /* pc_relative */
fbaf61ad
NC		 346 0, /* bitpos */
347 complain_overflow_signed,/* complain_on_overflow */
348 nds32_elf_9_pcrel_reloc,/* special_function */
349 "R_NDS32_9_PCREL", /* name */
0a1b45a2 350 false, /* partial_inplace */
fbaf61ad
NC		 351 0xff, /* src_mask */
352 0xff, /* dst_mask */
0a1b45a2 353 true), /* pcrel_offset */
35c08157
KLC		 354
355 /* A relative 15 bit relocation, right shifted by 1. */
fbaf61ad
NC		 356 HOWTO2 (R_NDS32_15_PCREL, /* type */
357 1, /* rightshift */
c94cb026 358 4, /* size */
fbaf61ad 359 14, /* bitsize */
0a1b45a2 360 true, /* pc_relative */
fbaf61ad
NC		 361 0, /* bitpos */
362 complain_overflow_signed,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_NDS32_15_PCREL", /* name */
0a1b45a2 365 false, /* partial_inplace */
fbaf61ad
NC		 366 0x3fff, /* src_mask */
367 0x3fff, /* dst_mask */
0a1b45a2 368 true), /* pcrel_offset */
35c08157
KLC		 369
370 /* A relative 17 bit relocation, right shifted by 1. */
fbaf61ad
NC		 371 HOWTO2 (R_NDS32_17_PCREL, /* type */
372 1, /* rightshift */
c94cb026 373 4, /* size */
fbaf61ad 374 16, /* bitsize */
0a1b45a2 375 true, /* pc_relative */
fbaf61ad
NC		 376 0, /* bitpos */
377 complain_overflow_signed,/* complain_on_overflow */
378 bfd_elf_generic_reloc, /* special_function */
379 "R_NDS32_17_PCREL", /* name */
0a1b45a2 380 false, /* partial_inplace */
fbaf61ad
NC		 381 0xffff, /* src_mask */
382 0xffff, /* dst_mask */
0a1b45a2 383 true), /* pcrel_offset */
35c08157
KLC		 384
385 /* A relative 25 bit relocation, right shifted by 1. */
fbaf61ad 386 /* It's not clear whether this should have partial_inplace set or not.
35c08157
KLC		 387 Branch relaxing in the assembler can store the addend in the insn,
388 and if bfd_install_relocation gets called the addend may get added
389 again. */
fbaf61ad
NC		 390 HOWTO2 (R_NDS32_25_PCREL, /* type */
391 1, /* rightshift */
c94cb026 392 4, /* size */
fbaf61ad 393 24, /* bitsize */
0a1b45a2 394 true, /* pc_relative */
fbaf61ad
NC		 395 0, /* bitpos */
396 complain_overflow_signed,/* complain_on_overflow */
397 bfd_elf_generic_reloc, /* special_function */
398 "R_NDS32_25_PCREL", /* name */
0a1b45a2 399 false, /* partial_inplace */
fbaf61ad
NC		 400 0xffffff, /* src_mask */
401 0xffffff, /* dst_mask */
0a1b45a2 402 true), /* pcrel_offset */
35c08157
KLC		 403
404 /* High 20 bits of address when lower 12 is or'd in. */
fbaf61ad
NC		 405 HOWTO2 (R_NDS32_HI20, /* type */
406 12, /* rightshift */
c94cb026 407 4, /* size */
fbaf61ad 408 20, /* bitsize */
0a1b45a2 409 false, /* pc_relative */
fbaf61ad
NC		 410 0, /* bitpos */
411 complain_overflow_dont,/* complain_on_overflow */
412 nds32_elf_hi20_reloc, /* special_function */
413 "R_NDS32_HI20", /* name */
0a1b45a2 414 false, /* partial_inplace */
fbaf61ad
NC		 415 0x000fffff, /* src_mask */
416 0x000fffff, /* dst_mask */
0a1b45a2 417 false), /* pcrel_offset */
35c08157
KLC		 418
419 /* Lower 12 bits of address. */
fbaf61ad
NC		 420 HOWTO2 (R_NDS32_LO12S3, /* type */
421 3, /* rightshift */
c94cb026 422 4, /* size */
fbaf61ad 423 9, /* bitsize */
0a1b45a2 424 false, /* pc_relative */
fbaf61ad
NC		 425 0, /* bitpos */
426 complain_overflow_dont,/* complain_on_overflow */
427 nds32_elf_lo12_reloc, /* special_function */
428 "R_NDS32_LO12S3", /* name */
0a1b45a2 429 false, /* partial_inplace */
fbaf61ad
NC		 430 0x000001ff, /* src_mask */
431 0x000001ff, /* dst_mask */
0a1b45a2 432 false), /* pcrel_offset */
35c08157
KLC		 433
434 /* Lower 12 bits of address. */
fbaf61ad
NC		 435 HOWTO2 (R_NDS32_LO12S2, /* type */
436 2, /* rightshift */
c94cb026 437 4, /* size */
fbaf61ad 438 10, /* bitsize */
0a1b45a2 439 false, /* pc_relative */
fbaf61ad
NC		 440 0, /* bitpos */
441 complain_overflow_dont,/* complain_on_overflow */
442 nds32_elf_lo12_reloc, /* special_function */
443 "R_NDS32_LO12S2", /* name */
0a1b45a2 444 false, /* partial_inplace */
fbaf61ad
NC		 445 0x000003ff, /* src_mask */
446 0x000003ff, /* dst_mask */
0a1b45a2 447 false), /* pcrel_offset */
35c08157
KLC		 448
449 /* Lower 12 bits of address. */
fbaf61ad
NC		 450 HOWTO2 (R_NDS32_LO12S1, /* type */
451 1, /* rightshift */
c94cb026 452 4, /* size */
fbaf61ad 453 11, /* bitsize */
0a1b45a2 454 false, /* pc_relative */
fbaf61ad
NC		 455 0, /* bitpos */
456 complain_overflow_dont,/* complain_on_overflow */
457 nds32_elf_lo12_reloc, /* special_function */
458 "R_NDS32_LO12S1", /* name */
0a1b45a2 459 false, /* partial_inplace */
fbaf61ad
NC		 460 0x000007ff, /* src_mask */
461 0x000007ff, /* dst_mask */
0a1b45a2 462 false), /* pcrel_offset */
35c08157
KLC		 463
464 /* Lower 12 bits of address. */
fbaf61ad
NC		 465 HOWTO2 (R_NDS32_LO12S0, /* type */
466 0, /* rightshift */
c94cb026 467 4, /* size */
fbaf61ad 468 12, /* bitsize */
0a1b45a2 469 false, /* pc_relative */
fbaf61ad
NC		 470 0, /* bitpos */
471 complain_overflow_dont,/* complain_on_overflow */
472 nds32_elf_lo12_reloc, /* special_function */
473 "R_NDS32_LO12S0", /* name */
0a1b45a2 474 false, /* partial_inplace */
fbaf61ad
NC		 475 0x00000fff, /* src_mask */
476 0x00000fff, /* dst_mask */
0a1b45a2 477 false), /* pcrel_offset */
35c08157
KLC		 478
479 /* Small data area 15 bits offset. */
fbaf61ad
NC		 480 HOWTO2 (R_NDS32_SDA15S3, /* type */
481 3, /* rightshift */
c94cb026 482 4, /* size */
fbaf61ad 483 15, /* bitsize */
0a1b45a2 484 false, /* pc_relative */
fbaf61ad
NC		 485 0, /* bitpos */
486 complain_overflow_signed,/* complain_on_overflow */
487 nds32_elf_sda15_reloc, /* special_function */
488 "R_NDS32_SDA15S3", /* name */
0a1b45a2 489 false, /* partial_inplace */
fbaf61ad
NC		 490 0x00007fff, /* src_mask */
491 0x00007fff, /* dst_mask */
0a1b45a2 492 false), /* pcrel_offset */
35c08157
KLC		 493
494 /* Small data area 15 bits offset. */
fbaf61ad
NC		 495 HOWTO2 (R_NDS32_SDA15S2, /* type */
496 2, /* rightshift */
c94cb026 497 4, /* size */
fbaf61ad 498 15, /* bitsize */
0a1b45a2 499 false, /* pc_relative */
fbaf61ad
NC		 500 0, /* bitpos */
501 complain_overflow_signed,/* complain_on_overflow */
502 nds32_elf_sda15_reloc, /* special_function */
503 "R_NDS32_SDA15S2", /* name */
0a1b45a2 504 false, /* partial_inplace */
fbaf61ad
NC		 505 0x00007fff, /* src_mask */
506 0x00007fff, /* dst_mask */
0a1b45a2 507 false), /* pcrel_offset */
35c08157
KLC		 508
509 /* Small data area 15 bits offset. */
fbaf61ad
NC		 510 HOWTO2 (R_NDS32_SDA15S1, /* type */
511 1, /* rightshift */
c94cb026 512 4, /* size */
fbaf61ad 513 15, /* bitsize */
0a1b45a2 514 false, /* pc_relative */
fbaf61ad
NC		 515 0, /* bitpos */
516 complain_overflow_signed,/* complain_on_overflow */
517 nds32_elf_sda15_reloc, /* special_function */
518 "R_NDS32_SDA15S1", /* name */
0a1b45a2 519 false, /* partial_inplace */
fbaf61ad
NC		 520 0x00007fff, /* src_mask */
521 0x00007fff, /* dst_mask */
0a1b45a2 522 false), /* pcrel_offset */
35c08157
KLC		 523
524 /* Small data area 15 bits offset. */
fbaf61ad
NC		 525 HOWTO2 (R_NDS32_SDA15S0, /* type */
526 0, /* rightshift */
c94cb026 527 4, /* size */
fbaf61ad 528 15, /* bitsize */
0a1b45a2 529 false, /* pc_relative */
fbaf61ad
NC		 530 0, /* bitpos */
531 complain_overflow_signed,/* complain_on_overflow */
532 nds32_elf_sda15_reloc, /* special_function */
533 "R_NDS32_SDA15S0", /* name */
0a1b45a2 534 false, /* partial_inplace */
fbaf61ad
NC		 535 0x00007fff, /* src_mask */
536 0x00007fff, /* dst_mask */
0a1b45a2 537 false), /* pcrel_offset */
fbaf61ad
NC		 538
539 /* GNU extension to record C++ vtable hierarchy */
540 HOWTO2 (R_NDS32_GNU_VTINHERIT,/* type */
541 0, /* rightshift */
c94cb026 542 4, /* size */
fbaf61ad 543 0, /* bitsize */
0a1b45a2 544 false, /* pc_relative */
fbaf61ad
NC		 545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 NULL, /* special_function */
548 "R_NDS32_GNU_VTINHERIT",/* name */
0a1b45a2 549 false, /* partial_inplace */
fbaf61ad
NC		 550 0, /* src_mask */
551 0, /* dst_mask */
0a1b45a2 552 false), /* pcrel_offset */
fbaf61ad
NC		 553
554 /* GNU extension to record C++ vtable member usage */
555 HOWTO2 (R_NDS32_GNU_VTENTRY, /* type */
556 0, /* rightshift */
c94cb026 557 4, /* size */
fbaf61ad 558 0, /* bitsize */
0a1b45a2 559 false, /* pc_relative */
fbaf61ad
NC		 560 0, /* bitpos */
561 complain_overflow_dont,/* complain_on_overflow */
562 _bfd_elf_rel_vtable_reloc_fn,/* special_function */
563 "R_NDS32_GNU_VTENTRY", /* name */
0a1b45a2 564 false, /* partial_inplace */
fbaf61ad
NC		 565 0, /* src_mask */
566 0, /* dst_mask */
0a1b45a2 567 false), /* pcrel_offset */
35c08157
KLC		 568
569 /* A 16 bit absolute relocation. */
fbaf61ad
NC		 570 HOWTO2 (R_NDS32_16_RELA, /* type */
571 0, /* rightshift */
c94cb026 572 2, /* size */
fbaf61ad 573 16, /* bitsize */
0a1b45a2 574 false, /* pc_relative */
fbaf61ad
NC		 575 0, /* bitpos */
576 complain_overflow_bitfield,/* complain_on_overflow */
577 bfd_elf_generic_reloc, /* special_function */
578 "R_NDS32_16_RELA", /* name */
0a1b45a2 579 false, /* partial_inplace */
fbaf61ad
NC		 580 0xffff, /* src_mask */
581 0xffff, /* dst_mask */
0a1b45a2 582 false), /* pcrel_offset */
35c08157
KLC		 583
584 /* A 32 bit absolute relocation. */
fbaf61ad
NC		 585 HOWTO2 (R_NDS32_32_RELA, /* type */
586 0, /* rightshift */
c94cb026 587 4, /* size */
fbaf61ad 588 32, /* bitsize */
0a1b45a2 589 false, /* pc_relative */
fbaf61ad
NC		 590 0, /* bitpos */
591 complain_overflow_bitfield,/* complain_on_overflow */
592 bfd_elf_generic_reloc, /* special_function */
593 "R_NDS32_32_RELA", /* name */
0a1b45a2 594 false, /* partial_inplace */
fbaf61ad
NC		 595 0xffffffff, /* src_mask */
596 0xffffffff, /* dst_mask */
0a1b45a2 597 false), /* pcrel_offset */
35c08157
KLC		 598
599 /* A 20 bit address. */
fbaf61ad
NC		 600 HOWTO2 (R_NDS32_20_RELA, /* type */
601 0, /* rightshift */
c94cb026 602 4, /* size */
fbaf61ad 603 20, /* bitsize */
0a1b45a2 604 false, /* pc_relative */
fbaf61ad
NC		 605 0, /* bitpos */
606 complain_overflow_signed,/* complain_on_overflow */
607 bfd_elf_generic_reloc, /* special_function */
608 "R_NDS32_20_RELA", /* name */
0a1b45a2 609 false, /* partial_inplace */
fbaf61ad
NC		 610 0xfffff, /* src_mask */
611 0xfffff, /* dst_mask */
0a1b45a2 612 false), /* pcrel_offset */
fbaf61ad
NC		 613
614 HOWTO2 (R_NDS32_9_PCREL_RELA, /* type */
615 1, /* rightshift */
c94cb026 616 2, /* size */
fbaf61ad 617 8, /* bitsize */
0a1b45a2 618 true, /* pc_relative */
fbaf61ad
NC		 619 0, /* bitpos */
620 complain_overflow_signed,/* complain_on_overflow */
621 bfd_elf_generic_reloc, /* special_function */
622 "R_NDS32_9_PCREL_RELA",/* name */
0a1b45a2 623 false, /* partial_inplace */
fbaf61ad
NC		 624 0xff, /* src_mask */
625 0xff, /* dst_mask */
0a1b45a2 626 true), /* pcrel_offset */
35c08157
KLC		 627
628 /* A relative 15 bit relocation, right shifted by 1. */
fbaf61ad
NC		 629 HOWTO2 (R_NDS32_15_PCREL_RELA,/* type */
630 1, /* rightshift */
c94cb026 631 4, /* size */
fbaf61ad 632 14, /* bitsize */
0a1b45a2 633 true, /* pc_relative */
fbaf61ad
NC		 634 0, /* bitpos */
635 complain_overflow_signed,/* complain_on_overflow */
636 bfd_elf_generic_reloc, /* special_function */
637 "R_NDS32_15_PCREL_RELA",/* name */
0a1b45a2 638 false, /* partial_inplace */
fbaf61ad
NC		 639 0x3fff, /* src_mask */
640 0x3fff, /* dst_mask */
0a1b45a2 641 true), /* pcrel_offset */
35c08157
KLC		 642
643 /* A relative 17 bit relocation, right shifted by 1. */
fbaf61ad
NC		 644 HOWTO2 (R_NDS32_17_PCREL_RELA,/* type */
645 1, /* rightshift */
c94cb026 646 4, /* size */
fbaf61ad 647 16, /* bitsize */
0a1b45a2 648 true, /* pc_relative */
fbaf61ad
NC		 649 0, /* bitpos */
650 complain_overflow_signed,/* complain_on_overflow */
651 bfd_elf_generic_reloc, /* special_function */
652 "R_NDS32_17_PCREL_RELA",/* name */
0a1b45a2 653 false, /* partial_inplace */
fbaf61ad
NC		 654 0xffff, /* src_mask */
655 0xffff, /* dst_mask */
0a1b45a2 656 true), /* pcrel_offset */
35c08157
KLC		 657
658 /* A relative 25 bit relocation, right shifted by 2. */
fbaf61ad
NC		 659 HOWTO2 (R_NDS32_25_PCREL_RELA,/* type */
660 1, /* rightshift */
c94cb026 661 4, /* size */
fbaf61ad 662 24, /* bitsize */
0a1b45a2 663 true, /* pc_relative */
fbaf61ad
NC		 664 0, /* bitpos */
665 complain_overflow_signed,/* complain_on_overflow */
666 bfd_elf_generic_reloc, /* special_function */
667 "R_NDS32_25_PCREL_RELA",/* name */
0a1b45a2 668 false, /* partial_inplace */
fbaf61ad
NC		 669 0xffffff, /* src_mask */
670 0xffffff, /* dst_mask */
0a1b45a2 671 true), /* pcrel_offset */
35c08157
KLC		 672
673 /* High 20 bits of address when lower 16 is or'd in. */
fbaf61ad
NC		 674 HOWTO2 (R_NDS32_HI20_RELA, /* type */
675 12, /* rightshift */
c94cb026 676 4, /* size */
fbaf61ad 677 20, /* bitsize */
0a1b45a2 678 false, /* pc_relative */
fbaf61ad
NC		 679 0, /* bitpos */
680 complain_overflow_dont,/* complain_on_overflow */
681 bfd_elf_generic_reloc, /* special_function */
682 "R_NDS32_HI20_RELA", /* name */
0a1b45a2 683 false, /* partial_inplace */
fbaf61ad
NC		 684 0x000fffff, /* src_mask */
685 0x000fffff, /* dst_mask */
0a1b45a2 686 false), /* pcrel_offset */
35c08157
KLC		 687
688 /* Lower 12 bits of address. */
fbaf61ad
NC		 689 HOWTO2 (R_NDS32_LO12S3_RELA, /* type */
690 3, /* rightshift */
c94cb026 691 4, /* size */
fbaf61ad 692 9, /* bitsize */
0a1b45a2 693 false, /* pc_relative */
fbaf61ad
NC		 694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_NDS32_LO12S3_RELA", /* name */
0a1b45a2 698 false, /* partial_inplace */
fbaf61ad
NC		 699 0x000001ff, /* src_mask */
700 0x000001ff, /* dst_mask */
0a1b45a2 701 false), /* pcrel_offset */
35c08157
KLC		 702
703 /* Lower 12 bits of address. */
fbaf61ad
NC		 704 HOWTO2 (R_NDS32_LO12S2_RELA, /* type */
705 2, /* rightshift */
c94cb026 706 4, /* size */
fbaf61ad 707 10, /* bitsize */
0a1b45a2 708 false, /* pc_relative */
fbaf61ad
NC		 709 0, /* bitpos */
710 complain_overflow_dont,/* complain_on_overflow */
711 bfd_elf_generic_reloc, /* special_function */
712 "R_NDS32_LO12S2_RELA", /* name */
0a1b45a2 713 false, /* partial_inplace */
fbaf61ad
NC		 714 0x000003ff, /* src_mask */
715 0x000003ff, /* dst_mask */
0a1b45a2 716 false), /* pcrel_offset */
35c08157
KLC		 717
718 /* Lower 12 bits of address. */
fbaf61ad
NC		 719 HOWTO2 (R_NDS32_LO12S1_RELA, /* type */
720 1, /* rightshift */
c94cb026 721 4, /* size */
fbaf61ad 722 11, /* bitsize */
0a1b45a2 723 false, /* pc_relative */
fbaf61ad
NC		 724 0, /* bitpos */
725 complain_overflow_dont,/* complain_on_overflow */
726 bfd_elf_generic_reloc, /* special_function */
727 "R_NDS32_LO12S1_RELA", /* name */
0a1b45a2 728 false, /* partial_inplace */
fbaf61ad
NC		 729 0x000007ff, /* src_mask */
730 0x000007ff, /* dst_mask */
0a1b45a2 731 false), /* pcrel_offset */
35c08157
KLC		 732
733 /* Lower 12 bits of address. */
fbaf61ad
NC		 734 HOWTO2 (R_NDS32_LO12S0_RELA, /* type */
735 0, /* rightshift */
c94cb026 736 4, /* size */
fbaf61ad 737 12, /* bitsize */
0a1b45a2 738 false, /* pc_relative */
fbaf61ad
NC		 739 0, /* bitpos */
740 complain_overflow_dont,/* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_NDS32_LO12S0_RELA", /* name */
0a1b45a2 743 false, /* partial_inplace */
fbaf61ad
NC		 744 0x00000fff, /* src_mask */
745 0x00000fff, /* dst_mask */
0a1b45a2 746 false), /* pcrel_offset */
35c08157
KLC		 747
748 /* Small data area 15 bits offset. */
fbaf61ad
NC		 749 HOWTO2 (R_NDS32_SDA15S3_RELA, /* type */
750 3, /* rightshift */
c94cb026 751 4, /* size */
fbaf61ad 752 15, /* bitsize */
0a1b45a2 753 false, /* pc_relative */
fbaf61ad
NC		 754 0, /* bitpos */
755 complain_overflow_signed,/* complain_on_overflow */
756 bfd_elf_generic_reloc, /* special_function */
757 "R_NDS32_SDA15S3_RELA",/* name */
0a1b45a2 758 false, /* partial_inplace */
fbaf61ad
NC		 759 0x00007fff, /* src_mask */
760 0x00007fff, /* dst_mask */
0a1b45a2 761 false), /* pcrel_offset */
35c08157
KLC		 762
763 /* Small data area 15 bits offset. */
fbaf61ad
NC		 764 HOWTO2 (R_NDS32_SDA15S2_RELA, /* type */
765 2, /* rightshift */
c94cb026 766 4, /* size */
fbaf61ad 767 15, /* bitsize */
0a1b45a2 768 false, /* pc_relative */
fbaf61ad
NC		 769 0, /* bitpos */
770 complain_overflow_signed,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_NDS32_SDA15S2_RELA",/* name */
0a1b45a2 773 false, /* partial_inplace */
fbaf61ad
NC		 774 0x00007fff, /* src_mask */
775 0x00007fff, /* dst_mask */
0a1b45a2 776 false), /* pcrel_offset */
fbaf61ad
NC		 777
778 HOWTO2 (R_NDS32_SDA15S1_RELA, /* type */
779 1, /* rightshift */
c94cb026 780 4, /* size */
fbaf61ad 781 15, /* bitsize */
0a1b45a2 782 false, /* pc_relative */
fbaf61ad
NC		 783 0, /* bitpos */
784 complain_overflow_signed,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_NDS32_SDA15S1_RELA",/* name */
0a1b45a2 787 false, /* partial_inplace */
fbaf61ad
NC		 788 0x00007fff, /* src_mask */
789 0x00007fff, /* dst_mask */
0a1b45a2 790 false), /* pcrel_offset */
fbaf61ad
NC		 791
792 HOWTO2 (R_NDS32_SDA15S0_RELA, /* type */
793 0, /* rightshift */
c94cb026 794 4, /* size */
fbaf61ad 795 15, /* bitsize */
0a1b45a2 796 false, /* pc_relative */
fbaf61ad
NC		 797 0, /* bitpos */
798 complain_overflow_signed,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_NDS32_SDA15S0_RELA",/* name */
0a1b45a2 801 false, /* partial_inplace */
fbaf61ad
NC		 802 0x00007fff, /* src_mask */
803 0x00007fff, /* dst_mask */
0a1b45a2 804 false), /* pcrel_offset */
fbaf61ad
NC		 805
806 /* GNU extension to record C++ vtable hierarchy */
807 HOWTO2 (R_NDS32_RELA_GNU_VTINHERIT,/* type */
808 0, /* rightshift */
c94cb026 809 4, /* size */
fbaf61ad 810 0, /* bitsize */
0a1b45a2 811 false, /* pc_relative */
fbaf61ad
NC		 812 0, /* bitpos */
813 complain_overflow_dont,/* complain_on_overflow */
814 NULL, /* special_function */
815 "R_NDS32_RELA_GNU_VTINHERIT",/* name */
0a1b45a2 816 false, /* partial_inplace */
fbaf61ad
NC		 817 0, /* src_mask */
818 0, /* dst_mask */
0a1b45a2 819 false), /* pcrel_offset */
fbaf61ad
NC		 820
821 /* GNU extension to record C++ vtable member usage */
822 HOWTO2 (R_NDS32_RELA_GNU_VTENTRY,/* type */
823 0, /* rightshift */
c94cb026 824 4, /* size */
fbaf61ad 825 0, /* bitsize */
0a1b45a2 826 false, /* pc_relative */
fbaf61ad
NC		 827 0, /* bitpos */
828 complain_overflow_dont,/* complain_on_overflow */
829 _bfd_elf_rel_vtable_reloc_fn,/* special_function */
830 "R_NDS32_RELA_GNU_VTENTRY",/* name */
0a1b45a2 831 false, /* partial_inplace */
fbaf61ad
NC		 832 0, /* src_mask */
833 0, /* dst_mask */
0a1b45a2 834 false), /* pcrel_offset */
35c08157
KLC		 835
836 /* Like R_NDS32_20, but referring to the GOT table entry for
837 the symbol. */
fbaf61ad
NC		 838 HOWTO2 (R_NDS32_GOT20, /* type */
839 0, /* rightshift */
c94cb026 840 4, /* size */
fbaf61ad 841 20, /* bitsize */
0a1b45a2 842 false, /* pc_relative */
fbaf61ad
NC		 843 0, /* bitpos */
844 complain_overflow_signed,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_NDS32_GOT20", /* name */
0a1b45a2 847 false, /* partial_inplace */
fbaf61ad
NC		 848 0xfffff, /* src_mask */
849 0xfffff, /* dst_mask */
0a1b45a2 850 false), /* pcrel_offset */
35c08157
KLC		 851
852 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
853 entry for the symbol. */
fbaf61ad
NC		 854 HOWTO2 (R_NDS32_25_PLTREL, /* type */
855 1, /* rightshift */
c94cb026 856 4, /* size */
fbaf61ad 857 24, /* bitsize */
0a1b45a2 858 true, /* pc_relative */
fbaf61ad
NC		 859 0, /* bitpos */
860 complain_overflow_signed,/* complain_on_overflow */
861 bfd_elf_generic_reloc, /* special_function */
862 "R_NDS32_25_PLTREL", /* name */
0a1b45a2 863 false, /* partial_inplace */
fbaf61ad
NC		 864 0xffffff, /* src_mask */
865 0xffffff, /* dst_mask */
0a1b45a2 866 true), /* pcrel_offset */
35c08157
KLC		 867
868 /* This is used only by the dynamic linker. The symbol should exist
869 both in the object being run and in some shared library. The
870 dynamic linker copies the data addressed by the symbol from the
871 shared library into the object, because the object being
872 run has to have the data at some particular address. */
fbaf61ad
NC		 873 HOWTO2 (R_NDS32_COPY, /* type */
874 0, /* rightshift */
c94cb026 875 4, /* size */
fbaf61ad 876 32, /* bitsize */
0a1b45a2 877 false, /* pc_relative */
fbaf61ad
NC		 878 0, /* bitpos */
879 complain_overflow_bitfield,/* complain_on_overflow */
880 bfd_elf_generic_reloc, /* special_function */
881 "R_NDS32_COPY", /* name */
0a1b45a2 882 false, /* partial_inplace */
fbaf61ad
NC		 883 0xffffffff, /* src_mask */
884 0xffffffff, /* dst_mask */
0a1b45a2 885 false), /* pcrel_offset */
35c08157
KLC		 886
887 /* Like R_NDS32_20, but used when setting global offset table
888 entries. */
fbaf61ad
NC		 889 HOWTO2 (R_NDS32_GLOB_DAT, /* type */
890 0, /* rightshift */
c94cb026 891 4, /* size */
fbaf61ad 892 32, /* bitsize */
0a1b45a2 893 false, /* pc_relative */
fbaf61ad
NC		 894 0, /* bitpos */
895 complain_overflow_bitfield,/* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
897 "R_NDS32_GLOB_DAT", /* name */
0a1b45a2 898 false, /* partial_inplace */
fbaf61ad
NC		 899 0xffffffff, /* src_mask */
900 0xffffffff, /* dst_mask */
0a1b45a2 901 false), /* pcrel_offset */
35c08157
KLC		 902
903 /* Marks a procedure linkage table entry for a symbol. */
fbaf61ad
NC		 904 HOWTO2 (R_NDS32_JMP_SLOT, /* type */
905 0, /* rightshift */
c94cb026 906 4, /* size */
fbaf61ad 907 32, /* bitsize */
0a1b45a2 908 false, /* pc_relative */
fbaf61ad
NC		 909 0, /* bitpos */
910 complain_overflow_bitfield,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_NDS32_JMP_SLOT", /* name */
0a1b45a2 913 false, /* partial_inplace */
fbaf61ad
NC		 914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
0a1b45a2 916 false), /* pcrel_offset */
35c08157
KLC		 917
918 /* Used only by the dynamic linker. When the object is run, this
919 longword is set to the load address of the object, plus the
920 addend. */
fbaf61ad
NC		 921 HOWTO2 (R_NDS32_RELATIVE, /* type */
922 0, /* rightshift */
c94cb026 923 4, /* size */
fbaf61ad 924 32, /* bitsize */
0a1b45a2 925 false, /* pc_relative */
fbaf61ad
NC		 926 0, /* bitpos */
927 complain_overflow_bitfield,/* complain_on_overflow */
928 bfd_elf_generic_reloc, /* special_function */
929 "R_NDS32_RELATIVE", /* name */
0a1b45a2 930 false, /* partial_inplace */
fbaf61ad
NC		 931 0xffffffff, /* src_mask */
932 0xffffffff, /* dst_mask */
0a1b45a2 933 false), /* pcrel_offset */
fbaf61ad
NC		 934
935 HOWTO2 (R_NDS32_GOTOFF, /* type */
936 0, /* rightshift */
c94cb026 937 4, /* size */
fbaf61ad 938 20, /* bitsize */
0a1b45a2 939 false, /* pc_relative */
fbaf61ad
NC		 940 0, /* bitpos */
941 complain_overflow_signed,/* complain_on_overflow */
942 bfd_elf_generic_reloc, /* special_function */
943 "R_NDS32_GOTOFF", /* name */
0a1b45a2 944 false, /* partial_inplace */
fbaf61ad
NC		 945 0xfffff, /* src_mask */
946 0xfffff, /* dst_mask */
0a1b45a2 947 false), /* pcrel_offset */
35c08157
KLC		 948
949 /* An PC Relative 20-bit relocation used when setting PIC offset
950 table register. */
fbaf61ad
NC		 951 HOWTO2 (R_NDS32_GOTPC20, /* type */
952 0, /* rightshift */
c94cb026 953 4, /* size */
fbaf61ad 954 20, /* bitsize */
0a1b45a2 955 true, /* pc_relative */
fbaf61ad
NC		 956 0, /* bitpos */
957 complain_overflow_signed,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_NDS32_GOTPC20", /* name */
0a1b45a2 960 false, /* partial_inplace */
fbaf61ad
NC		 961 0xfffff, /* src_mask */
962 0xfffff, /* dst_mask */
0a1b45a2 963 true), /* pcrel_offset */
35c08157
KLC		 964
965 /* Like R_NDS32_HI20, but referring to the GOT table entry for
966 the symbol. */
fbaf61ad
NC		 967 HOWTO2 (R_NDS32_GOT_HI20, /* type */
968 12, /* rightshift */
c94cb026 969 4, /* size */
fbaf61ad 970 20, /* bitsize */
0a1b45a2 971 false, /* pc_relative */
fbaf61ad
NC		 972 0, /* bitpos */
973 complain_overflow_dont,/* complain_on_overflow */
974 bfd_elf_generic_reloc, /* special_function */
975 "R_NDS32_GOT_HI20", /* name */
0a1b45a2 976 false, /* partial_inplace */
fbaf61ad
NC		 977 0x000fffff, /* src_mask */
978 0x000fffff, /* dst_mask */
0a1b45a2 979 false), /* pcrel_offset */
c94cb026 980
fbaf61ad
NC		 981 HOWTO2 (R_NDS32_GOT_LO12, /* type */
982 0, /* rightshift */
c94cb026 983 4, /* size */
fbaf61ad 984 12, /* bitsize */
0a1b45a2 985 false, /* pc_relative */
fbaf61ad
NC		 986 0, /* bitpos */
987 complain_overflow_dont,/* complain_on_overflow */
988 bfd_elf_generic_reloc, /* special_function */
989 "R_NDS32_GOT_LO12", /* name */
0a1b45a2 990 false, /* partial_inplace */
fbaf61ad
NC		 991 0x00000fff, /* src_mask */
992 0x00000fff, /* dst_mask */
0a1b45a2 993 false), /* pcrel_offset */
35c08157
KLC		 994
995 /* An PC Relative relocation used when setting PIC offset table register.
996 Like R_NDS32_HI20, but referring to the GOT table entry for
997 the symbol. */
fbaf61ad
NC		 998 HOWTO2 (R_NDS32_GOTPC_HI20, /* type */
999 12, /* rightshift */
c94cb026 1000 4, /* size */
fbaf61ad 1001 20, /* bitsize */
0a1b45a2 1002 false, /* pc_relative */
fbaf61ad
NC		 1003 0, /* bitpos */
1004 complain_overflow_dont,/* complain_on_overflow */
1005 bfd_elf_generic_reloc, /* special_function */
1006 "R_NDS32_GOTPC_HI20", /* name */
0a1b45a2 1007 false, /* partial_inplace */
fbaf61ad
NC		 1008 0x000fffff, /* src_mask */
1009 0x000fffff, /* dst_mask */
0a1b45a2 1010 true), /* pcrel_offset */
c94cb026 1011
fbaf61ad
NC		 1012 HOWTO2 (R_NDS32_GOTPC_LO12, /* type */
1013 0, /* rightshift */
c94cb026 1014 4, /* size */
fbaf61ad 1015 12, /* bitsize */
0a1b45a2 1016 false, /* pc_relative */
fbaf61ad
NC		 1017 0, /* bitpos */
1018 complain_overflow_dont,/* complain_on_overflow */
1019 bfd_elf_generic_reloc, /* special_function */
1020 "R_NDS32_GOTPC_LO12", /* name */
0a1b45a2 1021 false, /* partial_inplace */
fbaf61ad
NC		 1022 0x00000fff, /* src_mask */
1023 0x00000fff, /* dst_mask */
0a1b45a2 1024 true), /* pcrel_offset */
fbaf61ad
NC		 1025
1026 HOWTO2 (R_NDS32_GOTOFF_HI20, /* type */
1027 12, /* rightshift */
c94cb026 1028 4, /* size */
fbaf61ad 1029 20, /* bitsize */
0a1b45a2 1030 false, /* pc_relative */
fbaf61ad
NC		 1031 0, /* bitpos */
1032 complain_overflow_dont,/* complain_on_overflow */
1033 bfd_elf_generic_reloc, /* special_function */
1034 "R_NDS32_GOTOFF_HI20", /* name */
0a1b45a2 1035 false, /* partial_inplace */
fbaf61ad
NC		 1036 0x000fffff, /* src_mask */
1037 0x000fffff, /* dst_mask */
0a1b45a2 1038 false), /* pcrel_offset */
c94cb026 1039
fbaf61ad
NC		 1040 HOWTO2 (R_NDS32_GOTOFF_LO12, /* type */
1041 0, /* rightshift */
c94cb026 1042 4, /* size */
fbaf61ad 1043 12, /* bitsize */
0a1b45a2 1044 false, /* pc_relative */
fbaf61ad
NC		 1045 0, /* bitpos */
1046 complain_overflow_dont,/* complain_on_overflow */
1047 bfd_elf_generic_reloc, /* special_function */
1048 "R_NDS32_GOTOFF_LO12", /* name */
0a1b45a2 1049 false, /* partial_inplace */
fbaf61ad
NC		 1050 0x00000fff, /* src_mask */
1051 0x00000fff, /* dst_mask */
0a1b45a2 1052 false), /* pcrel_offset */
35c08157
KLC		 1053
1054 /* Alignment hint for relaxable instruction. This is used with
1055 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1056 in order to make next label aligned on word boundary. */
fbaf61ad
NC		 1057 HOWTO2 (R_NDS32_INSN16, /* type */
1058 0, /* rightshift */
c94cb026 1059 4, /* size */
fbaf61ad 1060 32, /* bitsize */
0a1b45a2 1061 false, /* pc_relative */
fbaf61ad
NC		 1062 0, /* bitpos */
1063 complain_overflow_dont,/* complain_on_overflow */
1064 nds32_elf_ignore_reloc,/* special_function */
1065 "R_NDS32_INSN16", /* name */
0a1b45a2 1066 false, /* partial_inplace */
fbaf61ad
NC		 1067 0x00000fff, /* src_mask */
1068 0x00000fff, /* dst_mask */
0a1b45a2 1069 false), /* pcrel_offset */
35c08157
KLC		 1070
1071 /* Alignment hint for label. */
fbaf61ad
NC		 1072 HOWTO2 (R_NDS32_LABEL, /* type */
1073 0, /* rightshift */
c94cb026 1074 4, /* size */
fbaf61ad 1075 32, /* bitsize */
0a1b45a2 1076 false, /* pc_relative */
fbaf61ad
NC		 1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 nds32_elf_ignore_reloc,/* special_function */
1080 "R_NDS32_LABEL", /* name */
0a1b45a2 1081 false, /* partial_inplace */
fbaf61ad
NC		 1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
0a1b45a2 1084 false), /* pcrel_offset */
35c08157
KLC		 1085
1086 /* Relax hint for unconditional call sequence */
fbaf61ad
NC		 1087 HOWTO2 (R_NDS32_LONGCALL1, /* type */
1088 0, /* rightshift */
c94cb026 1089 4, /* size */
fbaf61ad 1090 32, /* bitsize */
0a1b45a2 1091 false, /* pc_relative */
fbaf61ad
NC		 1092 0, /* bitpos */
1093 complain_overflow_dont,/* complain_on_overflow */
1094 nds32_elf_ignore_reloc,/* special_function */
1095 "R_NDS32_LONGCALL1", /* name */
0a1b45a2 1096 false, /* partial_inplace */
fbaf61ad
NC		 1097 0xffffffff, /* src_mask */
1098 0xffffffff, /* dst_mask */
0a1b45a2 1099 false), /* pcrel_offset */
35c08157
KLC		 1100
1101 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1102 HOWTO2 (R_NDS32_LONGCALL2, /* type */
1103 0, /* rightshift */
c94cb026 1104 4, /* size */
fbaf61ad 1105 32, /* bitsize */
0a1b45a2 1106 false, /* pc_relative */
fbaf61ad
NC		 1107 0, /* bitpos */
1108 complain_overflow_dont,/* complain_on_overflow */
1109 nds32_elf_ignore_reloc,/* special_function */
1110 "R_NDS32_LONGCALL2", /* name */
0a1b45a2 1111 false, /* partial_inplace */
fbaf61ad
NC		 1112 0xffffffff, /* src_mask */
1113 0xffffffff, /* dst_mask */
0a1b45a2 1114 false), /* pcrel_offset */
35c08157
KLC		 1115
1116 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1117 HOWTO2 (R_NDS32_LONGCALL3, /* type */
1118 0, /* rightshift */
c94cb026 1119 4, /* size */
fbaf61ad 1120 32, /* bitsize */
0a1b45a2 1121 false, /* pc_relative */
fbaf61ad
NC		 1122 0, /* bitpos */
1123 complain_overflow_dont,/* complain_on_overflow */
1124 nds32_elf_ignore_reloc,/* special_function */
1125 "R_NDS32_LONGCALL3", /* name */
0a1b45a2 1126 false, /* partial_inplace */
fbaf61ad
NC		 1127 0xffffffff, /* src_mask */
1128 0xffffffff, /* dst_mask */
0a1b45a2 1129 false), /* pcrel_offset */
35c08157
KLC		 1130
1131 /* Relax hint for unconditional branch sequence. */
fbaf61ad
NC		 1132 HOWTO2 (R_NDS32_LONGJUMP1, /* type */
1133 0, /* rightshift */
c94cb026 1134 4, /* size */
fbaf61ad 1135 32, /* bitsize */
0a1b45a2 1136 false, /* pc_relative */
fbaf61ad
NC		 1137 0, /* bitpos */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 nds32_elf_ignore_reloc,/* special_function */
1140 "R_NDS32_LONGJUMP1", /* name */
0a1b45a2 1141 false, /* partial_inplace */
fbaf61ad
NC		 1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
0a1b45a2 1144 false), /* pcrel_offset */
35c08157
KLC		 1145
1146 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1147 HOWTO2 (R_NDS32_LONGJUMP2, /* type */
1148 0, /* rightshift */
c94cb026 1149 4, /* size */
fbaf61ad 1150 32, /* bitsize */
0a1b45a2 1151 false, /* pc_relative */
fbaf61ad
NC		 1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 nds32_elf_ignore_reloc,/* special_function */
1155 "R_NDS32_LONGJUMP2", /* name */
0a1b45a2 1156 false, /* partial_inplace */
fbaf61ad
NC		 1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
0a1b45a2 1159 false), /* pcrel_offset */
35c08157
KLC		 1160
1161 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1162 HOWTO2 (R_NDS32_LONGJUMP3, /* type */
1163 0, /* rightshift */
c94cb026 1164 4, /* size */
fbaf61ad 1165 32, /* bitsize */
0a1b45a2 1166 false, /* pc_relative */
fbaf61ad
NC		 1167 0, /* bitpos */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 nds32_elf_ignore_reloc,/* special_function */
1170 "R_NDS32_LONGJUMP3", /* name */
0a1b45a2 1171 false, /* partial_inplace */
fbaf61ad
NC		 1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
0a1b45a2 1174 false), /* pcrel_offset */
35c08157
KLC		 1175
1176 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1177 HOWTO2 (R_NDS32_LOADSTORE, /* type */
1178 0, /* rightshift */
c94cb026 1179 4, /* size */
fbaf61ad 1180 32, /* bitsize */
0a1b45a2 1181 false, /* pc_relative */
fbaf61ad
NC		 1182 0, /* bitpos */
1183 complain_overflow_dont,/* complain_on_overflow */
1184 nds32_elf_ignore_reloc,/* special_function */
1185 "R_NDS32_LOADSTORE", /* name */
0a1b45a2 1186 false, /* partial_inplace */
fbaf61ad
NC		 1187 0xffffffff, /* src_mask */
1188 0xffffffff, /* dst_mask */
0a1b45a2 1189 false), /* pcrel_offset */
35c08157
KLC		 1190
1191 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1192 HOWTO2 (R_NDS32_9_FIXED_RELA, /* type */
1193 0, /* rightshift */
c94cb026 1194 2, /* size */
fbaf61ad 1195 16, /* bitsize */
0a1b45a2 1196 false, /* pc_relative */
fbaf61ad
NC		 1197 0, /* bitpos */
1198 complain_overflow_dont,/* complain_on_overflow */
1199 nds32_elf_ignore_reloc,/* special_function */
1200 "R_NDS32_9_FIXED_RELA",/* name */
0a1b45a2 1201 false, /* partial_inplace */
fbaf61ad
NC		 1202 0x000000ff, /* src_mask */
1203 0x000000ff, /* dst_mask */
0a1b45a2 1204 false), /* pcrel_offset */
35c08157
KLC		 1205
1206 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1207 HOWTO2 (R_NDS32_15_FIXED_RELA,/* type */
1208 0, /* rightshift */
c94cb026 1209 4, /* size */
fbaf61ad 1210 32, /* bitsize */
0a1b45a2 1211 false, /* pc_relative */
fbaf61ad
NC		 1212 0, /* bitpos */
1213 complain_overflow_dont,/* complain_on_overflow */
1214 nds32_elf_ignore_reloc,/* special_function */
1215 "R_NDS32_15_FIXED_RELA",/* name */
0a1b45a2 1216 false, /* partial_inplace */
fbaf61ad
NC		 1217 0x00003fff, /* src_mask */
1218 0x00003fff, /* dst_mask */
0a1b45a2 1219 false), /* pcrel_offset */
35c08157
KLC		 1220
1221 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1222 HOWTO2 (R_NDS32_17_FIXED_RELA,/* type */
1223 0, /* rightshift */
c94cb026 1224 4, /* size */
fbaf61ad 1225 32, /* bitsize */
0a1b45a2 1226 false, /* pc_relative */
fbaf61ad
NC		 1227 0, /* bitpos */
1228 complain_overflow_dont,/* complain_on_overflow */
1229 nds32_elf_ignore_reloc,/* special_function */
1230 "R_NDS32_17_FIXED_RELA",/* name */
0a1b45a2 1231 false, /* partial_inplace */
fbaf61ad
NC		 1232 0x0000ffff, /* src_mask */
1233 0x0000ffff, /* dst_mask */
0a1b45a2 1234 false), /* pcrel_offset */
35c08157
KLC		 1235
1236 /* Relax hint for load/store sequence. */
fbaf61ad
NC		 1237 HOWTO2 (R_NDS32_25_FIXED_RELA,/* type */
1238 0, /* rightshift */
c94cb026 1239 4, /* size */
fbaf61ad 1240 32, /* bitsize */
0a1b45a2 1241 false, /* pc_relative */
fbaf61ad
NC		 1242 0, /* bitpos */
1243 complain_overflow_dont,/* complain_on_overflow */
1244 nds32_elf_ignore_reloc,/* special_function */
1245 "R_NDS32_25_FIXED_RELA",/* name */
0a1b45a2 1246 false, /* partial_inplace */
fbaf61ad
NC		 1247 0x00ffffff, /* src_mask */
1248 0x00ffffff, /* dst_mask */
0a1b45a2 1249 false), /* pcrel_offset */
35c08157
KLC		 1250
1251 /* High 20 bits of PLT symbol offset relative to PC. */
fbaf61ad
NC		 1252 HOWTO2 (R_NDS32_PLTREL_HI20, /* type */
1253 12, /* rightshift */
c94cb026 1254 4, /* size */
fbaf61ad 1255 20, /* bitsize */
0a1b45a2 1256 false, /* pc_relative */
fbaf61ad
NC		 1257 0, /* bitpos */
1258 complain_overflow_dont,/* complain_on_overflow */
1259 bfd_elf_generic_reloc, /* special_function */
1260 "R_NDS32_PLTREL_HI20", /* name */
0a1b45a2 1261 false, /* partial_inplace */
fbaf61ad
NC		 1262 0x000fffff, /* src_mask */
1263 0x000fffff, /* dst_mask */
0a1b45a2 1264 false), /* pcrel_offset */
35c08157
KLC		 1265
1266 /* Low 12 bits of PLT symbol offset relative to PC. */
fbaf61ad
NC		 1267 HOWTO2 (R_NDS32_PLTREL_LO12, /* type */
1268 0, /* rightshift */
c94cb026 1269 4, /* size */
fbaf61ad 1270 12, /* bitsize */
0a1b45a2 1271 false, /* pc_relative */
fbaf61ad
NC		 1272 0, /* bitpos */
1273 complain_overflow_dont,/* complain_on_overflow */
1274 bfd_elf_generic_reloc, /* special_function */
1275 "R_NDS32_PLTREL_LO12", /* name */
0a1b45a2 1276 false, /* partial_inplace */
fbaf61ad
NC		 1277 0x00000fff, /* src_mask */
1278 0x00000fff, /* dst_mask */
0a1b45a2 1279 false), /* pcrel_offset */
35c08157
KLC		 1280
1281 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1282 HOWTO2 (R_NDS32_PLT_GOTREL_HI20, /* type */
1283 12, /* rightshift */
c94cb026 1284 4, /* size */
fbaf61ad 1285 20, /* bitsize */
0a1b45a2 1286 false, /* pc_relative */
fbaf61ad
NC		 1287 0, /* bitpos */
1288 complain_overflow_dont,/* complain_on_overflow */
1289 bfd_elf_generic_reloc, /* special_function */
1290 "R_NDS32_PLT_GOTREL_HI20",/* name */
0a1b45a2 1291 false, /* partial_inplace */
fbaf61ad
NC		 1292 0x000fffff, /* src_mask */
1293 0x000fffff, /* dst_mask */
0a1b45a2 1294 false), /* pcrel_offset */
35c08157
KLC		 1295
1296 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1297 HOWTO2 (R_NDS32_PLT_GOTREL_LO12,/* type */
1298 0, /* rightshift */
c94cb026 1299 4, /* size */
fbaf61ad 1300 12, /* bitsize */
0a1b45a2 1301 false, /* pc_relative */
fbaf61ad
NC		 1302 0, /* bitpos */
1303 complain_overflow_dont,/* complain_on_overflow */
1304 bfd_elf_generic_reloc, /* special_function */
1305 "R_NDS32_PLT_GOTREL_LO12",/* name */
0a1b45a2 1306 false, /* partial_inplace */
fbaf61ad
NC		 1307 0x00000fff, /* src_mask */
1308 0x00000fff, /* dst_mask */
0a1b45a2 1309 false), /* pcrel_offset */
35c08157
KLC		 1310
1311 /* Small data area 12 bits offset. */
fbaf61ad
NC		 1312 HOWTO2 (R_NDS32_SDA12S2_DP_RELA,/* type */
1313 2, /* rightshift */
c94cb026 1314 4, /* size */
fbaf61ad 1315 12, /* bitsize */
0a1b45a2 1316 false, /* pc_relative */
fbaf61ad
NC		 1317 0, /* bitpos */
1318 complain_overflow_signed,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_NDS32_SDA12S2_DP_RELA",/* name */
0a1b45a2 1321 false, /* partial_inplace */
fbaf61ad
NC		 1322 0x00000fff, /* src_mask */
1323 0x00000fff, /* dst_mask */
0a1b45a2 1324 false), /* pcrel_offset */
35c08157
KLC		 1325
1326 /* Small data area 12 bits offset. */
fbaf61ad
NC		 1327 HOWTO2 (R_NDS32_SDA12S2_SP_RELA,/* type */
1328 2, /* rightshift */
c94cb026 1329 4, /* size */
fbaf61ad 1330 12, /* bitsize */
0a1b45a2 1331 false, /* pc_relative */
fbaf61ad
NC		 1332 0, /* bitpos */
1333 complain_overflow_signed,/* complain_on_overflow */
1334 bfd_elf_generic_reloc, /* special_function */
1335 "R_NDS32_SDA12S2_SP_RELA",/* name */
0a1b45a2 1336 false, /* partial_inplace */
fbaf61ad
NC		 1337 0x00000fff, /* src_mask */
1338 0x00000fff, /* dst_mask */
0a1b45a2 1339 false), /* pcrel_offset */
35c08157
KLC		 1340 /* Lower 12 bits of address. */
1341
fbaf61ad
NC		 1342 HOWTO2 (R_NDS32_LO12S2_DP_RELA, /* type */
1343 2, /* rightshift */
c94cb026 1344 4, /* size */
fbaf61ad 1345 10, /* bitsize */
0a1b45a2 1346 false, /* pc_relative */
fbaf61ad
NC		 1347 0, /* bitpos */
1348 complain_overflow_dont,/* complain_on_overflow */
1349 bfd_elf_generic_reloc, /* special_function */
1350 "R_NDS32_LO12S2_DP_RELA",/* name */
0a1b45a2 1351 false, /* partial_inplace */
fbaf61ad
NC		 1352 0x000003ff, /* src_mask */
1353 0x000003ff, /* dst_mask */
0a1b45a2 1354 false), /* pcrel_offset */
35c08157
KLC		 1355
1356 /* Lower 12 bits of address. */
fbaf61ad
NC		 1357 HOWTO2 (R_NDS32_LO12S2_SP_RELA,/* type */
1358 2, /* rightshift */
c94cb026 1359 4, /* size */
fbaf61ad 1360 10, /* bitsize */
0a1b45a2 1361 false, /* pc_relative */
fbaf61ad
NC		 1362 0, /* bitpos */
1363 complain_overflow_dont,/* complain_on_overflow */
1364 bfd_elf_generic_reloc, /* special_function */
1365 "R_NDS32_LO12S2_SP_RELA",/* name */
0a1b45a2 1366 false, /* partial_inplace */
fbaf61ad
NC		 1367 0x000003ff, /* src_mask */
1368 0x000003ff, /* dst_mask */
0a1b45a2 1369 false), /* pcrel_offset */
c94cb026 1370
35c08157 1371 /* Lower 12 bits of address. Special identity for or case. */
fbaf61ad
NC		 1372 HOWTO2 (R_NDS32_LO12S0_ORI_RELA,/* type */
1373 0, /* rightshift */
c94cb026 1374 4, /* size */
fbaf61ad 1375 12, /* bitsize */
0a1b45a2 1376 false, /* pc_relative */
fbaf61ad
NC		 1377 0, /* bitpos */
1378 complain_overflow_dont,/* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_NDS32_LO12S0_ORI_RELA",/* name */
0a1b45a2 1381 false, /* partial_inplace */
fbaf61ad
NC		 1382 0x00000fff, /* src_mask */
1383 0x00000fff, /* dst_mask */
0a1b45a2 1384 false), /* pcrel_offset */
c94cb026 1385
35c08157 1386 /* Small data area 19 bits offset. */
fbaf61ad
NC		 1387 HOWTO2 (R_NDS32_SDA16S3_RELA, /* type */
1388 3, /* rightshift */
c94cb026 1389 4, /* size */
fbaf61ad 1390 16, /* bitsize */
0a1b45a2 1391 false, /* pc_relative */
fbaf61ad
NC		 1392 0, /* bitpos */
1393 complain_overflow_signed,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_NDS32_SDA16S3_RELA",/* name */
0a1b45a2 1396 false, /* partial_inplace */
fbaf61ad
NC		 1397 0x0000ffff, /* src_mask */
1398 0x0000ffff, /* dst_mask */
0a1b45a2 1399 false), /* pcrel_offset */
35c08157
KLC		 1400
1401 /* Small data area 15 bits offset. */
fbaf61ad
NC		 1402 HOWTO2 (R_NDS32_SDA17S2_RELA, /* type */
1403 2, /* rightshift */
c94cb026 1404 4, /* size */
fbaf61ad 1405 17, /* bitsize */
0a1b45a2 1406 false, /* pc_relative */
fbaf61ad
NC		 1407 0, /* bitpos */
1408 complain_overflow_signed,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_NDS32_SDA17S2_RELA",/* name */
0a1b45a2 1411 false, /* partial_inplace */
fbaf61ad
NC		 1412 0x0001ffff, /* src_mask */
1413 0x0001ffff, /* dst_mask */
0a1b45a2 1414 false), /* pcrel_offset */
fbaf61ad
NC		 1415
1416 HOWTO2 (R_NDS32_SDA18S1_RELA, /* type */
1417 1, /* rightshift */
c94cb026 1418 4, /* size */
fbaf61ad 1419 18, /* bitsize */
0a1b45a2 1420 false, /* pc_relative */
fbaf61ad
NC		 1421 0, /* bitpos */
1422 complain_overflow_signed,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_NDS32_SDA18S1_RELA",/* name */
0a1b45a2 1425 false, /* partial_inplace */
fbaf61ad
NC		 1426 0x0003ffff, /* src_mask */
1427 0x0003ffff, /* dst_mask */
0a1b45a2 1428 false), /* pcrel_offset */
fbaf61ad
NC		 1429
1430 HOWTO2 (R_NDS32_SDA19S0_RELA, /* type */
1431 0, /* rightshift */
c94cb026 1432 4, /* size */
fbaf61ad 1433 19, /* bitsize */
0a1b45a2 1434 false, /* pc_relative */
fbaf61ad
NC		 1435 0, /* bitpos */
1436 complain_overflow_signed,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_NDS32_SDA19S0_RELA",/* name */
0a1b45a2 1439 false, /* partial_inplace */
fbaf61ad
NC		 1440 0x0007ffff, /* src_mask */
1441 0x0007ffff, /* dst_mask */
0a1b45a2 1442 false), /* pcrel_offset */
fbaf61ad
NC		 1443 HOWTO2 (R_NDS32_DWARF2_OP1_RELA,/* type */
1444 0, /* rightshift */
c94cb026 1445 1, /* size */
fbaf61ad 1446 8, /* bitsize */
0a1b45a2 1447 false, /* pc_relative */
fbaf61ad
NC		 1448 0, /* bitpos */
1449 complain_overflow_dont,/* complain_on_overflow */
1450 nds32_elf_ignore_reloc,/* special_function */
1451 "R_NDS32_DWARF2_OP1_RELA",/* name */
0a1b45a2 1452 false, /* partial_inplace */
fbaf61ad
NC		 1453 0xff, /* src_mask */
1454 0xff, /* dst_mask */
0a1b45a2 1455 false), /* pcrel_offset */
c94cb026 1456
fbaf61ad
NC		 1457 HOWTO2 (R_NDS32_DWARF2_OP2_RELA,/* type */
1458 0, /* rightshift */
c94cb026 1459 2, /* size */
fbaf61ad 1460 16, /* bitsize */
0a1b45a2 1461 false, /* pc_relative */
fbaf61ad
NC		 1462 0, /* bitpos */
1463 complain_overflow_dont,/* complain_on_overflow */
1464 nds32_elf_ignore_reloc,/* special_function */
1465 "R_NDS32_DWARF2_OP2_RELA",/* name */
0a1b45a2 1466 false, /* partial_inplace */
fbaf61ad
NC		 1467 0xffff, /* src_mask */
1468 0xffff, /* dst_mask */
0a1b45a2 1469 false), /* pcrel_offset */
c94cb026 1470
fbaf61ad
NC		 1471 HOWTO2 (R_NDS32_DWARF2_LEB_RELA,/* type */
1472 0, /* rightshift */
c94cb026 1473 4, /* size */
fbaf61ad 1474 32, /* bitsize */
0a1b45a2 1475 false, /* pc_relative */
fbaf61ad
NC		 1476 0, /* bitpos */
1477 complain_overflow_dont,/* complain_on_overflow */
1478 nds32_elf_ignore_reloc,/* special_function */
1479 "R_NDS32_DWARF2_LEB_RELA",/* name */
0a1b45a2 1480 false, /* partial_inplace */
fbaf61ad
NC		 1481 0xffffffff, /* src_mask */
1482 0xffffffff, /* dst_mask */
0a1b45a2 1483 false), /* pcrel_offset */
c94cb026 1484
fbaf61ad
NC		 1485 HOWTO2 (R_NDS32_UPDATE_TA_RELA,/* type */
1486 0, /* rightshift */
c94cb026 1487 2, /* size */
fbaf61ad 1488 16, /* bitsize */
0a1b45a2 1489 false, /* pc_relative */
fbaf61ad
NC		 1490 0, /* bitpos */
1491 complain_overflow_dont,/* complain_on_overflow */
1492 nds32_elf_ignore_reloc,/* special_function */
1493 "R_NDS32_UPDATE_TA_RELA",/* name */
0a1b45a2 1494 false, /* partial_inplace */
fbaf61ad
NC		 1495 0xffff, /* src_mask */
1496 0xffff, /* dst_mask */
0a1b45a2 1497 false), /* pcrel_offset */
c94cb026 1498
35c08157
KLC		 1499 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1500 entry for the symbol. */
fbaf61ad
NC		 1501 HOWTO2 (R_NDS32_9_PLTREL, /* type */
1502 1, /* rightshift */
c94cb026 1503 2, /* size */
fbaf61ad 1504 8, /* bitsize */
0a1b45a2 1505 true, /* pc_relative */
fbaf61ad
NC		 1506 0, /* bitpos */
1507 complain_overflow_signed,/* complain_on_overflow */
1508 bfd_elf_generic_reloc, /* special_function */
1509 "R_NDS32_9_PLTREL", /* name */
0a1b45a2 1510 false, /* partial_inplace */
fbaf61ad
NC		 1511 0xff, /* src_mask */
1512 0xff, /* dst_mask */
0a1b45a2 1513 true), /* pcrel_offset */
c94cb026 1514
35c08157 1515 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1516 HOWTO2 (R_NDS32_PLT_GOTREL_LO20,/* type */
1517 0, /* rightshift */
c94cb026 1518 4, /* size */
fbaf61ad 1519 20, /* bitsize */
0a1b45a2 1520 false, /* pc_relative */
fbaf61ad
NC		 1521 0, /* bitpos */
1522 complain_overflow_dont,/* complain_on_overflow */
1523 bfd_elf_generic_reloc, /* special_function */
1524 "R_NDS32_PLT_GOTREL_LO20",/* name */
0a1b45a2 1525 false, /* partial_inplace */
fbaf61ad
NC		 1526 0x000fffff, /* src_mask */
1527 0x000fffff, /* dst_mask */
0a1b45a2 1528 false), /* pcrel_offset */
c94cb026 1529
fbaf61ad
NC		 1530 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1531 HOWTO2 (R_NDS32_PLT_GOTREL_LO15,/* type */
1532 0, /* rightshift */
c94cb026 1533 4, /* size */
fbaf61ad 1534 15, /* bitsize */
0a1b45a2 1535 false, /* pc_relative */
fbaf61ad
NC		 1536 0, /* bitpos */
1537 complain_overflow_dont,/* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_NDS32_PLT_GOTREL_LO15",/* name */
0a1b45a2 1540 false, /* partial_inplace */
fbaf61ad
NC		 1541 0x00007fff, /* src_mask */
1542 0x00007fff, /* dst_mask */
0a1b45a2 1543 false), /* pcrel_offset */
c94cb026 1544
35c08157 1545 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
fbaf61ad
NC		 1546 HOWTO2 (R_NDS32_PLT_GOTREL_LO19,/* type */
1547 0, /* rightshift */
c94cb026 1548 4, /* size */
fbaf61ad 1549 19, /* bitsize */
0a1b45a2 1550 false, /* pc_relative */
fbaf61ad
NC		 1551 0, /* bitpos */
1552 complain_overflow_dont,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_NDS32_PLT_GOTREL_LO19",/* name */
0a1b45a2 1555 false, /* partial_inplace */
fbaf61ad
NC		 1556 0x0007ffff, /* src_mask */
1557 0x0007ffff, /* dst_mask */
0a1b45a2 1558 false), /* pcrel_offset */
c94cb026 1559
fbaf61ad
NC		 1560 HOWTO2 (R_NDS32_GOT_LO15, /* type */
1561 0, /* rightshift */
c94cb026 1562 4, /* size */
fbaf61ad 1563 15, /* bitsize */
0a1b45a2 1564 false, /* pc_relative */
fbaf61ad
NC		 1565 0, /* bitpos */
1566 complain_overflow_dont,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_NDS32_GOT_LO15", /* name */
0a1b45a2 1569 false, /* partial_inplace */
fbaf61ad
NC		 1570 0x00007fff, /* src_mask */
1571 0x00007fff, /* dst_mask */
0a1b45a2 1572 false), /* pcrel_offset */
c94cb026 1573
fbaf61ad
NC		 1574 HOWTO2 (R_NDS32_GOT_LO19, /* type */
1575 0, /* rightshift */
c94cb026 1576 4, /* size */
fbaf61ad 1577 19, /* bitsize */
0a1b45a2 1578 false, /* pc_relative */
fbaf61ad
NC		 1579 0, /* bitpos */
1580 complain_overflow_dont,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_NDS32_GOT_LO19", /* name */
0a1b45a2 1583 false, /* partial_inplace */
fbaf61ad
NC		 1584 0x0007ffff, /* src_mask */
1585 0x0007ffff, /* dst_mask */
0a1b45a2 1586 false), /* pcrel_offset */
c94cb026 1587
fbaf61ad
NC		 1588 HOWTO2 (R_NDS32_GOTOFF_LO15, /* type */
1589 0, /* rightshift */
c94cb026 1590 4, /* size */
fbaf61ad 1591 15, /* bitsize */
0a1b45a2 1592 false, /* pc_relative */
fbaf61ad
NC		 1593 0, /* bitpos */
1594 complain_overflow_dont,/* complain_on_overflow */
1595 bfd_elf_generic_reloc, /* special_function */
1596 "R_NDS32_GOTOFF_LO15", /* name */
0a1b45a2 1597 false, /* partial_inplace */
fbaf61ad
NC		 1598 0x00007fff, /* src_mask */
1599 0x00007fff, /* dst_mask */
0a1b45a2 1600 false), /* pcrel_offset */
c94cb026 1601
fbaf61ad
NC		 1602 HOWTO2 (R_NDS32_GOTOFF_LO19, /* type */
1603 0, /* rightshift */
c94cb026 1604 4, /* size */
fbaf61ad 1605 19, /* bitsize */
0a1b45a2 1606 false, /* pc_relative */
fbaf61ad
NC		 1607 0, /* bitpos */
1608 complain_overflow_dont,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_NDS32_GOTOFF_LO19", /* name */
0a1b45a2 1611 false, /* partial_inplace */
fbaf61ad
NC		 1612 0x0007ffff, /* src_mask */
1613 0x0007ffff, /* dst_mask */
0a1b45a2 1614 false), /* pcrel_offset */
c94cb026 1615
35c08157 1616 /* GOT 15 bits offset. */
fbaf61ad
NC		 1617 HOWTO2 (R_NDS32_GOT15S2_RELA, /* type */
1618 2, /* rightshift */
c94cb026 1619 4, /* size */
fbaf61ad 1620 15, /* bitsize */
0a1b45a2 1621 false, /* pc_relative */
fbaf61ad
NC		 1622 0, /* bitpos */
1623 complain_overflow_signed,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_NDS32_GOT15S2_RELA",/* name */
0a1b45a2 1626 false, /* partial_inplace */
fbaf61ad
NC		 1627 0x00007fff, /* src_mask */
1628 0x00007fff, /* dst_mask */
0a1b45a2 1629 false), /* pcrel_offset */
c94cb026 1630
35c08157 1631 /* GOT 17 bits offset. */
fbaf61ad
NC		 1632 HOWTO2 (R_NDS32_GOT17S2_RELA, /* type */
1633 2, /* rightshift */
c94cb026 1634 4, /* size */
fbaf61ad 1635 17, /* bitsize */
0a1b45a2 1636 false, /* pc_relative */
fbaf61ad
NC		 1637 0, /* bitpos */
1638 complain_overflow_signed,/* complain_on_overflow */
1639 bfd_elf_generic_reloc, /* special_function */
1640 "R_NDS32_GOT17S2_RELA",/* name */
0a1b45a2 1641 false, /* partial_inplace */
fbaf61ad
NC		 1642 0x0001ffff, /* src_mask */
1643 0x0001ffff, /* dst_mask */
0a1b45a2 1644 false), /* pcrel_offset */
c94cb026 1645
35c08157 1646 /* A 5 bit address. */
fbaf61ad
NC		 1647 HOWTO2 (R_NDS32_5_RELA, /* type */
1648 0, /* rightshift */
c94cb026 1649 2, /* size */
fbaf61ad 1650 5, /* bitsize */
0a1b45a2 1651 false, /* pc_relative */
fbaf61ad
NC		 1652 0, /* bitpos */
1653 complain_overflow_signed,/* complain_on_overflow */
1654 bfd_elf_generic_reloc, /* special_function */
1655 "R_NDS32_5_RELA", /* name */
0a1b45a2 1656 false, /* partial_inplace */
fbaf61ad
NC		 1657 0x1f, /* src_mask */
1658 0x1f, /* dst_mask */
0a1b45a2 1659 false), /* pcrel_offset */
c94cb026 1660
fbaf61ad
NC		 1661 HOWTO2 (R_NDS32_10_UPCREL_RELA,/* type */
1662 1, /* rightshift */
c94cb026 1663 2, /* size */
fbaf61ad 1664 9, /* bitsize */
0a1b45a2 1665 true, /* pc_relative */
fbaf61ad
NC		 1666 0, /* bitpos */
1667 complain_overflow_unsigned,/* complain_on_overflow */
1668 bfd_elf_generic_reloc, /* special_function */
1669 "R_NDS32_10_UPCREL_RELA",/* name */
0a1b45a2 1670 false, /* partial_inplace */
fbaf61ad
NC		 1671 0x1ff, /* src_mask */
1672 0x1ff, /* dst_mask */
0a1b45a2 1673 true), /* pcrel_offset */
c94cb026 1674
fbaf61ad
NC		 1675 HOWTO2 (R_NDS32_SDA_FP7U2_RELA,/* type */
1676 2, /* rightshift */
c94cb026 1677 2, /* size */
fbaf61ad 1678 7, /* bitsize */
0a1b45a2 1679 false, /* pc_relative */
fbaf61ad
NC		 1680 0, /* bitpos */
1681 complain_overflow_unsigned,/* complain_on_overflow */
1682 bfd_elf_generic_reloc, /* special_function */
1683 "R_NDS32_SDA_FP7U2_RELA",/* name */
0a1b45a2 1684 false, /* partial_inplace */
fbaf61ad
NC		 1685 0x0000007f, /* src_mask */
1686 0x0000007f, /* dst_mask */
0a1b45a2 1687 false), /* pcrel_offset */
c94cb026 1688
fbaf61ad
NC		 1689 HOWTO2 (R_NDS32_WORD_9_PCREL_RELA,/* type */
1690 1, /* rightshift */
c94cb026 1691 4, /* size */
fbaf61ad 1692 8, /* bitsize */
0a1b45a2 1693 true, /* pc_relative */
fbaf61ad
NC		 1694 0, /* bitpos */
1695 complain_overflow_signed,/* complain_on_overflow */
1696 bfd_elf_generic_reloc, /* special_function */
1697 "R_NDS32_WORD_9_PCREL_RELA",/* name */
0a1b45a2 1698 false, /* partial_inplace */
fbaf61ad
NC		 1699 0xff, /* src_mask */
1700 0xff, /* dst_mask */
0a1b45a2 1701 true), /* pcrel_offset */
c94cb026 1702
fbaf61ad
NC		 1703 HOWTO2 (R_NDS32_25_ABS_RELA, /* type */
1704 1, /* rightshift */
c94cb026 1705 4, /* size */
fbaf61ad 1706 24, /* bitsize */
0a1b45a2 1707 false, /* pc_relative */
fbaf61ad
NC		 1708 0, /* bitpos */
1709 complain_overflow_dont,/* complain_on_overflow */
1710 bfd_elf_generic_reloc, /* special_function */
1711 "R_NDS32_25_ABS_RELA", /* name */
0a1b45a2 1712 false, /* partial_inplace */
fbaf61ad
NC		 1713 0xffffff, /* src_mask */
1714 0xffffff, /* dst_mask */
0a1b45a2 1715 false), /* pcrel_offset */
35c08157
KLC		 1716
1717 /* A relative 17 bit relocation for ifc, right shifted by 1. */
fbaf61ad
NC		 1718 HOWTO2 (R_NDS32_17IFC_PCREL_RELA,/* type */
1719 1, /* rightshift */
c94cb026 1720 4, /* size */
fbaf61ad 1721 16, /* bitsize */
0a1b45a2 1722 true, /* pc_relative */
fbaf61ad
NC		 1723 0, /* bitpos */
1724 complain_overflow_signed,/* complain_on_overflow */
1725 bfd_elf_generic_reloc, /* special_function */
1726 "R_NDS32_17IFC_PCREL_RELA",/* name */
0a1b45a2 1727 false, /* partial_inplace */
fbaf61ad
NC		 1728 0xffff, /* src_mask */
1729 0xffff, /* dst_mask */
0a1b45a2 1730 true), /* pcrel_offset */
35c08157
KLC		 1731
1732 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
fbaf61ad
NC		 1733 HOWTO2 (R_NDS32_10IFCU_PCREL_RELA,/* type */
1734 1, /* rightshift */
c94cb026 1735 2, /* size */
fbaf61ad 1736 9, /* bitsize */
0a1b45a2 1737 true, /* pc_relative */
fbaf61ad
NC		 1738 0, /* bitpos */
1739 complain_overflow_unsigned,/* complain_on_overflow */
1740 bfd_elf_generic_reloc, /* special_function */
1741 "R_NDS32_10IFCU_PCREL_RELA",/* name */
0a1b45a2 1742 false, /* partial_inplace */
fbaf61ad
NC		 1743 0x1ff, /* src_mask */
1744 0x1ff, /* dst_mask */
0a1b45a2 1745 true), /* pcrel_offset */
fbaf61ad
NC		 1746
1747 /* Like R_NDS32_HI20, but referring to the TLS LE entry for the symbol. */
1748 HOWTO2 (R_NDS32_TLS_LE_HI20, /* type */
1749 12, /* rightshift */
c94cb026 1750 4, /* size */
fbaf61ad 1751 20, /* bitsize */
0a1b45a2 1752 false, /* pc_relative */
fbaf61ad
NC		 1753 0, /* bitpos */
1754 complain_overflow_dont,/* complain_on_overflow */
1755 bfd_elf_generic_reloc, /* special_function */
1756 "R_NDS32_TLS_LE_HI20", /* name */
0a1b45a2 1757 false, /* partial_inplace */
fbaf61ad
NC		 1758 0x000fffff, /* src_mask */
1759 0x000fffff, /* dst_mask */
0a1b45a2 1760 false), /* pcrel_offset */
fbaf61ad
NC		 1761
1762 HOWTO2 (R_NDS32_TLS_LE_LO12, /* type */
1763 0, /* rightshift */
c94cb026 1764 4, /* size */
fbaf61ad 1765 12, /* bitsize */
0a1b45a2 1766 false, /* pc_relative */
fbaf61ad
NC		 1767 0, /* bitpos */
1768 complain_overflow_dont,/* complain_on_overflow */
1769 bfd_elf_generic_reloc, /* special_function */
1770 "R_NDS32_TLS_LE_LO12", /* name */
0a1b45a2 1771 false, /* partial_inplace */
fbaf61ad
NC		 1772 0x00000fff, /* src_mask */
1773 0x00000fff, /* dst_mask */
0a1b45a2 1774 false), /* pcrel_offset */
fbaf61ad
NC		 1775
1776 /* Like R_NDS32_HI20, but referring to the TLS IE entry for the symbol. */
1777 HOWTO2 (R_NDS32_TLS_IE_HI20, /* type */
1778 12, /* rightshift */
c94cb026 1779 4, /* size */
fbaf61ad 1780 20, /* bitsize */
0a1b45a2 1781 false, /* pc_relative */
fbaf61ad
NC		 1782 0, /* bitpos */
1783 complain_overflow_dont,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_NDS32_TLS_IE_HI20", /* name */
0a1b45a2 1786 false, /* partial_inplace */
fbaf61ad
NC		 1787 0x000fffff, /* src_mask */
1788 0x000fffff, /* dst_mask */
0a1b45a2 1789 false), /* pcrel_offset */
fbaf61ad
NC		 1790
1791 HOWTO2 (R_NDS32_TLS_IE_LO12S2,/* type */
1792 2, /* rightshift */
c94cb026 1793 4, /* size */
fbaf61ad 1794 10, /* bitsize */
0a1b45a2 1795 false, /* pc_relative */
fbaf61ad
NC		 1796 0, /* bitpos */
1797 complain_overflow_dont,/* complain_on_overflow */
1798 bfd_elf_generic_reloc, /* special_function */
1799 "R_NDS32_TLS_IE_LO12S2",/* name */
0a1b45a2 1800 false, /* partial_inplace */
fbaf61ad
NC		 1801 0x000003ff, /* src_mask */
1802 0x000003ff, /* dst_mask */
0a1b45a2 1803 false), /* pcrel_offset */
fbaf61ad
NC		 1804
1805 /* TLS LE TP offset relocation */
1806 HOWTO2 (R_NDS32_TLS_TPOFF, /* type */
1807 0, /* rightshift */
c94cb026 1808 4, /* size */
fbaf61ad 1809 32, /* bitsize */
0a1b45a2 1810 false, /* pc_relative */
fbaf61ad
NC		 1811 0, /* bitpos */
1812 complain_overflow_bitfield,/* complain_on_overflow */
1813 bfd_elf_generic_reloc, /* special_function */
1814 "R_NDS32_TLS_TPOFF", /* name */
0a1b45a2 1815 false, /* partial_inplace */
fbaf61ad
NC		 1816 0xffffffff, /* src_mask */
1817 0xffffffff, /* dst_mask */
0a1b45a2 1818 false), /* pcrel_offset */
fbaf61ad 1819
1c8f6a4d 1820 /* A 20 bit address. */
fbaf61ad
NC		 1821 HOWTO2 (R_NDS32_TLS_LE_20, /* type */
1822 0, /* rightshift */
c94cb026 1823 4, /* size */
fbaf61ad 1824 20, /* bitsize */
0a1b45a2 1825 false, /* pc_relative */
fbaf61ad
NC		 1826 0, /* bitpos */
1827 complain_overflow_signed,/* complain_on_overflow */
1828 bfd_elf_generic_reloc, /* special_function */
1829 "R_NDS32_TLS_LE_20", /* name */
0a1b45a2 1830 false, /* partial_inplace */
fbaf61ad
NC		 1831 0xfffff, /* src_mask */
1832 0xfffff, /* dst_mask */
0a1b45a2 1833 false), /* pcrel_offset */
fbaf61ad
NC		 1834
1835 HOWTO2 (R_NDS32_TLS_LE_15S0, /* type */
1836 0, /* rightshift */
c94cb026 1837 4, /* size */
fbaf61ad 1838 15, /* bitsize */
0a1b45a2 1839 false, /* pc_relative */
fbaf61ad
NC		 1840 0, /* bitpos */
1841 complain_overflow_signed,/* complain_on_overflow */
1842 bfd_elf_generic_reloc, /* special_function */
1843 "R_NDS32_TLS_LE_15S0", /* name */
0a1b45a2 1844 false, /* partial_inplace */
fbaf61ad
NC		 1845 0x7fff, /* src_mask */
1846 0x7fff, /* dst_mask */
0a1b45a2 1847 false), /* pcrel_offset */
c94cb026 1848
fbaf61ad
NC		 1849 HOWTO2 (R_NDS32_TLS_LE_15S1, /* type */
1850 1, /* rightshift */
c94cb026 1851 4, /* size */
fbaf61ad 1852 15, /* bitsize */
0a1b45a2 1853 false, /* pc_relative */
fbaf61ad
NC		 1854 0, /* bitpos */
1855 complain_overflow_signed,/* complain_on_overflow */
1856 bfd_elf_generic_reloc, /* special_function */
1857 "R_NDS32_TLS_LE_15S1", /* name */
0a1b45a2 1858 false, /* partial_inplace */
fbaf61ad
NC		 1859 0x7fff, /* src_mask */
1860 0x7fff, /* dst_mask */
0a1b45a2 1861 false), /* pcrel_offset */
c94cb026 1862
fbaf61ad
NC		 1863 HOWTO2 (R_NDS32_TLS_LE_15S2, /* type */
1864 2, /* rightshift */
c94cb026 1865 4, /* size */
fbaf61ad 1866 15, /* bitsize */
0a1b45a2 1867 false, /* pc_relative */
fbaf61ad
NC		 1868 0, /* bitpos */
1869 complain_overflow_signed,/* complain_on_overflow */
1870 bfd_elf_generic_reloc, /* special_function */
1871 "R_NDS32_TLS_LE_15S2", /* name */
0a1b45a2 1872 false, /* partial_inplace */
fbaf61ad
NC		 1873 0x7fff, /* src_mask */
1874 0x7fff, /* dst_mask */
0a1b45a2 1875 false), /* pcrel_offset */
1c8f6a4d
KLC		 1876
1877 /* Relax hint for unconditional call sequence */
fbaf61ad
NC		 1878 HOWTO2 (R_NDS32_LONGCALL4, /* type */
1879 0, /* rightshift */
c94cb026 1880 4, /* size */
fbaf61ad 1881 32, /* bitsize */
0a1b45a2 1882 false, /* pc_relative */
fbaf61ad
NC		 1883 0, /* bitpos */
1884 complain_overflow_dont,/* complain_on_overflow */
1885 nds32_elf_ignore_reloc,/* special_function */
1886 "R_NDS32_LONGCALL4", /* name */
0a1b45a2 1887 false, /* partial_inplace */
fbaf61ad
NC		 1888 0xffffffff, /* src_mask */
1889 0xffffffff, /* dst_mask */
0a1b45a2 1890 false), /* pcrel_offset */
1c8f6a4d
KLC		 1891
1892 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1893 HOWTO2 (R_NDS32_LONGCALL5, /* type */
1894 0, /* rightshift */
c94cb026 1895 4, /* size */
fbaf61ad 1896 32, /* bitsize */
0a1b45a2 1897 false, /* pc_relative */
fbaf61ad
NC		 1898 0, /* bitpos */
1899 complain_overflow_dont,/* complain_on_overflow */
1900 nds32_elf_ignore_reloc,/* special_function */
1901 "R_NDS32_LONGCALL5", /* name */
0a1b45a2 1902 false, /* partial_inplace */
fbaf61ad
NC		 1903 0xffffffff, /* src_mask */
1904 0xffffffff, /* dst_mask */
0a1b45a2 1905 false), /* pcrel_offset */
1c8f6a4d
KLC		 1906
1907 /* Relax hint for conditional call sequence. */
fbaf61ad
NC		 1908 HOWTO2 (R_NDS32_LONGCALL6, /* type */
1909 0, /* rightshift */
c94cb026 1910 4, /* size */
fbaf61ad 1911 32, /* bitsize */
0a1b45a2 1912 false, /* pc_relative */
fbaf61ad
NC		 1913 0, /* bitpos */
1914 complain_overflow_dont,/* complain_on_overflow */
1915 nds32_elf_ignore_reloc,/* special_function */
1916 "R_NDS32_LONGCALL6", /* name */
0a1b45a2 1917 false, /* partial_inplace */
fbaf61ad
NC		 1918 0xffffffff, /* src_mask */
1919 0xffffffff, /* dst_mask */
0a1b45a2 1920 false), /* pcrel_offset */
1c8f6a4d
KLC		 1921
1922 /* Relax hint for unconditional branch sequence. */
fbaf61ad
NC		 1923 HOWTO2 (R_NDS32_LONGJUMP4, /* type */
1924 0, /* rightshift */
c94cb026 1925 4, /* size */
fbaf61ad 1926 32, /* bitsize */
0a1b45a2 1927 false, /* pc_relative */
fbaf61ad
NC		 1928 0, /* bitpos */
1929 complain_overflow_dont,/* complain_on_overflow */
1930 nds32_elf_ignore_reloc,/* special_function */
1931 "R_NDS32_LONGJUMP4", /* name */
0a1b45a2 1932 false, /* partial_inplace */
fbaf61ad
NC		 1933 0xffffffff, /* src_mask */
1934 0xffffffff, /* dst_mask */
0a1b45a2 1935 false), /* pcrel_offset */
1c8f6a4d
KLC		 1936
1937 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1938 HOWTO2 (R_NDS32_LONGJUMP5, /* type */
1939 0, /* rightshift */
c94cb026 1940 4, /* size */
fbaf61ad 1941 32, /* bitsize */
0a1b45a2 1942 false, /* pc_relative */
fbaf61ad
NC		 1943 0, /* bitpos */
1944 complain_overflow_dont,/* complain_on_overflow */
1945 nds32_elf_ignore_reloc,/* special_function */
1946 "R_NDS32_LONGJUMP5", /* name */
0a1b45a2 1947 false, /* partial_inplace */
fbaf61ad
NC		 1948 0xffffffff, /* src_mask */
1949 0xffffffff, /* dst_mask */
0a1b45a2 1950 false), /* pcrel_offset */
1c8f6a4d
KLC		 1951
1952 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1953 HOWTO2 (R_NDS32_LONGJUMP6, /* type */
1954 0, /* rightshift */
c94cb026 1955 4, /* size */
fbaf61ad 1956 32, /* bitsize */
0a1b45a2 1957 false, /* pc_relative */
fbaf61ad
NC		 1958 0, /* bitpos */
1959 complain_overflow_dont,/* complain_on_overflow */
1960 nds32_elf_ignore_reloc,/* special_function */
1961 "R_NDS32_LONGJUMP6", /* name */
0a1b45a2 1962 false, /* partial_inplace */
fbaf61ad
NC		 1963 0xffffffff, /* src_mask */
1964 0xffffffff, /* dst_mask */
0a1b45a2 1965 false), /* pcrel_offset */
1c8f6a4d
KLC		 1966
1967 /* Relax hint for conditional branch sequence. */
fbaf61ad
NC		 1968 HOWTO2 (R_NDS32_LONGJUMP7, /* type */
1969 0, /* rightshift */
c94cb026 1970 4, /* size */
fbaf61ad 1971 32, /* bitsize */
0a1b45a2 1972 false, /* pc_relative */
fbaf61ad
NC		 1973 0, /* bitpos */
1974 complain_overflow_dont,/* complain_on_overflow */
1975 nds32_elf_ignore_reloc,/* special_function */
1976 "R_NDS32_LONGJUMP7", /* name */
0a1b45a2 1977 false, /* partial_inplace */
fbaf61ad
NC		 1978 0xffffffff, /* src_mask */
1979 0xffffffff, /* dst_mask */
0a1b45a2 1980 false), /* pcrel_offset */
fbaf61ad 1981
a379e758
AM		 1982 EMPTY_HOWTO (114),
1983
fbaf61ad
NC		 1984 HOWTO2 (R_NDS32_TLS_IE_LO12, /* type */
1985 0, /* rightshift */
c94cb026 1986 4, /* size */
fbaf61ad 1987 12, /* bitsize */
0a1b45a2 1988 false, /* pc_relative */
fbaf61ad
NC		 1989 0, /* bitpos */
1990 complain_overflow_dont,/* complain_on_overflow */
1991 bfd_elf_generic_reloc, /* special_function */
1992 "R_NDS32_TLS_IE_LO12", /* name */
0a1b45a2 1993 false, /* partial_inplace */
fbaf61ad
NC		 1994 0x00000fff, /* src_mask */
1995 0x00000fff, /* dst_mask */
0a1b45a2 1996 false), /* pcrel_offset */
fbaf61ad
NC		 1997
1998 /* Like R_NDS32_HI20, but referring to the TLS IE (PIE)
1999 entry for the symbol. */
2000 HOWTO2 (R_NDS32_TLS_IEGP_HI20,/* type */
2001 12, /* rightshift */
c94cb026 2002 4, /* size */
fbaf61ad 2003 20, /* bitsize */
0a1b45a2 2004 false, /* pc_relative */
fbaf61ad
NC		 2005 0, /* bitpos */
2006 complain_overflow_dont,/* complain_on_overflow */
2007 bfd_elf_generic_reloc, /* special_function */
2008 "R_NDS32_TLS_IEGP_HI20",/* name */
0a1b45a2 2009 false, /* partial_inplace */
fbaf61ad
NC		 2010 0x000fffff, /* src_mask */
2011 0x000fffff, /* dst_mask */
0a1b45a2 2012 false), /* pcrel_offset */
fbaf61ad
NC		 2013
2014 HOWTO2 (R_NDS32_TLS_IEGP_LO12,/* type */
2015 0, /* rightshift */
c94cb026 2016 4, /* size */
fbaf61ad 2017 12, /* bitsize */
0a1b45a2 2018 false, /* pc_relative */
fbaf61ad
NC		 2019 0, /* bitpos */
2020 complain_overflow_dont,/* complain_on_overflow */
2021 bfd_elf_generic_reloc, /* special_function */
2022 "R_NDS32_TLS_IEGP_LO12",/* name */
0a1b45a2 2023 false, /* partial_inplace */
fbaf61ad
NC		 2024 0x00000fff, /* src_mask */
2025 0x00000fff, /* dst_mask */
0a1b45a2 2026 false), /* pcrel_offset */
fbaf61ad
NC		 2027
2028 HOWTO2 (R_NDS32_TLS_IEGP_LO12S2,/* type */
2029 2, /* rightshift */
c94cb026 2030 4, /* size */
fbaf61ad 2031 10, /* bitsize */
0a1b45a2 2032 false, /* pc_relative */
fbaf61ad
NC		 2033 0, /* bitpos */
2034 complain_overflow_dont,/* complain_on_overflow */
2035 bfd_elf_generic_reloc, /* special_function */
2036 "R_NDS32_TLS_IEGP_LO12S2",/* name */
0a1b45a2 2037 false, /* partial_inplace */
fbaf61ad
NC		 2038 0x000003ff, /* src_mask */
2039 0x000003ff, /* dst_mask */
0a1b45a2 2040 false), /* pcrel_offset */
fbaf61ad
NC		 2041
2042 /* TLS description relocation */
2043 HOWTO2 (R_NDS32_TLS_DESC, /* type */
2044 12, /* rightshift */
c94cb026 2045 4, /* size */
fbaf61ad 2046 20, /* bitsize */
0a1b45a2 2047 false, /* pc_relative */
fbaf61ad
NC		 2048 0, /* bitpos */
2049 complain_overflow_dont,/* complain_on_overflow */
2050 nds32_elf_hi20_reloc, /* special_function */
2051 "R_NDS32_TLS_DESC_HI20",/* name */
0a1b45a2 2052 false, /* partial_inplace */
fbaf61ad
NC		 2053 0x000fffff, /* src_mask */
2054 0x000fffff, /* dst_mask */
0a1b45a2 2055 false), /* pcrel_offset */
fbaf61ad
NC		 2056
2057 /* TLS GD/LD description offset high part. */
2058 HOWTO2 (R_NDS32_TLS_DESC_HI20,/* type */
2059 12, /* rightshift */
c94cb026 2060 4, /* size */
fbaf61ad 2061 20, /* bitsize */
0a1b45a2 2062 false, /* pc_relative */
fbaf61ad
NC		 2063 0, /* bitpos */
2064 complain_overflow_dont,/* complain_on_overflow */
2065 nds32_elf_hi20_reloc, /* special_function */
2066 "R_NDS32_TLS_DESC_HI20",/* name */
0a1b45a2 2067 false, /* partial_inplace */
fbaf61ad
NC		 2068 0x000fffff, /* src_mask */
2069 0x000fffff, /* dst_mask */
0a1b45a2 2070 false), /* pcrel_offset */
fbaf61ad
NC		 2071
2072 /* TLS GD/LD description offset low part. */
2073 HOWTO2 (R_NDS32_TLS_DESC_LO12,/* type */
2074 0, /* rightshift */
c94cb026 2075 4, /* size */
fbaf61ad 2076 12, /* bitsize */
0a1b45a2 2077 false, /* pc_relative */
fbaf61ad
NC		 2078 0, /* bitpos */
2079 complain_overflow_dont,/* complain_on_overflow */
2080 nds32_elf_lo12_reloc, /* special_function */
2081 "R_NDS32_TLS_DESC_LO12",/* name */
0a1b45a2 2082 false, /* partial_inplace */
fbaf61ad
NC		 2083 0x00000fff, /* src_mask */
2084 0x00000fff, /* dst_mask */
0a1b45a2 2085 false), /* pcrel_offset */
fbaf61ad
NC		 2086
2087 /* TLS GD/LD description offset set (movi). */
2088 HOWTO2 (R_NDS32_TLS_DESC_20, /* type */
2089 0, /* rightshift */
c94cb026 2090 4, /* size */
fbaf61ad 2091 20, /* bitsize */
0a1b45a2 2092 false, /* pc_relative */
fbaf61ad
NC		 2093 0, /* bitpos */
2094 complain_overflow_signed,/* complain_on_overflow */
2095 bfd_elf_generic_reloc, /* special_function */
2096 "R_NDS32_TLS_DESC_20", /* name */
0a1b45a2 2097 false, /* partial_inplace */
fbaf61ad
NC		 2098 0x000fffff, /* src_mask */
2099 0x000fffff, /* dst_mask */
0a1b45a2 2100 false), /* pcrel_offset */
fbaf61ad
NC		 2101
2102 /* TLS GD/LD description offset set (lwi.gp). */
2103 HOWTO2 (R_NDS32_TLS_DESC_SDA17S2,/* type */
2104 2, /* rightshift */
c94cb026 2105 4, /* size */
fbaf61ad 2106 17, /* bitsize */
0a1b45a2 2107 false, /* pc_relative */
fbaf61ad
NC		 2108 0, /* bitpos */
2109 complain_overflow_signed,/* complain_on_overflow */
2110 bfd_elf_generic_reloc, /* special_function */
2111 "R_NDS32_TLS_DESC_SDA17S2",/* name */
0a1b45a2 2112 false, /* partial_inplace */
fbaf61ad
NC		 2113 0x0001ffff, /* src_mask */
2114 0x0001ffff, /* dst_mask */
0a1b45a2 2115 false), /* pcrel_offset */
35c08157
KLC		 2116};
2117
2118/* Relocations used for relaxation. */
fbaf61ad
NC		 2119#define HOWTO3(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
2120 [C-R_NDS32_RELAX_ENTRY] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
2121
2122static reloc_howto_type nds32_elf_relax_howto_table[] = {
2123 HOWTO3 (R_NDS32_RELAX_ENTRY, /* type */
2124 0, /* rightshift */
c94cb026 2125 4, /* size */
fbaf61ad 2126 32, /* bitsize */
0a1b45a2 2127 false, /* pc_relative */
fbaf61ad
NC		 2128 0, /* bitpos */
2129 complain_overflow_dont,/* complain_on_overflow */
2130 nds32_elf_ignore_reloc,/* special_function */
2131 "R_NDS32_RELAX_ENTRY", /* name */
0a1b45a2 2132 false, /* partial_inplace */
fbaf61ad
NC		 2133 0xffffffff, /* src_mask */
2134 0xffffffff, /* dst_mask */
0a1b45a2 2135 false), /* pcrel_offset */
c94cb026 2136
fbaf61ad
NC		 2137 HOWTO3 (R_NDS32_GOT_SUFF, /* type */
2138 0, /* rightshift */
c94cb026 2139 4, /* size */
fbaf61ad 2140 32, /* bitsize */
0a1b45a2 2141 false, /* pc_relative */
fbaf61ad
NC		 2142 0, /* bitpos */
2143 complain_overflow_dont,/* complain_on_overflow */
2144 nds32_elf_ignore_reloc,/* special_function */
2145 "R_NDS32_GOT_SUFF", /* name */
0a1b45a2 2146 false, /* partial_inplace */
fbaf61ad
NC		 2147 0xffffffff, /* src_mask */
2148 0xffffffff, /* dst_mask */
0a1b45a2 2149 false), /* pcrel_offset */
c94cb026 2150
fbaf61ad
NC		 2151 HOWTO3 (R_NDS32_GOTOFF_SUFF, /* type */
2152 0, /* rightshift */
c94cb026 2153 4, /* size */
fbaf61ad 2154 32, /* bitsize */
0a1b45a2 2155 false, /* pc_relative */
fbaf61ad
NC		 2156 0, /* bitpos */
2157 complain_overflow_bitfield,/* complain_on_overflow */
2158 nds32_elf_ignore_reloc,/* special_function */
2159 "R_NDS32_GOTOFF_SUFF", /* name */
0a1b45a2 2160 false, /* partial_inplace */
fbaf61ad
NC		 2161 0xffffffff, /* src_mask */
2162 0xffffffff, /* dst_mask */
0a1b45a2 2163 false), /* pcrel_offset */
c94cb026 2164
fbaf61ad
NC		 2165 HOWTO3 (R_NDS32_PLT_GOT_SUFF, /* type */
2166 0, /* rightshift */
c94cb026 2167 4, /* size */
fbaf61ad 2168 32, /* bitsize */
0a1b45a2 2169 false, /* pc_relative */
fbaf61ad
NC		 2170 0, /* bitpos */
2171 complain_overflow_dont,/* complain_on_overflow */
2172 nds32_elf_ignore_reloc,/* special_function */
2173 "R_NDS32_PLT_GOT_SUFF",/* name */
0a1b45a2 2174 false, /* partial_inplace */
fbaf61ad
NC		 2175 0xffffffff, /* src_mask */
2176 0xffffffff, /* dst_mask */
0a1b45a2 2177 false), /* pcrel_offset */
c94cb026 2178
fbaf61ad
NC		 2179 HOWTO3 (R_NDS32_MULCALL_SUFF, /* type */
2180 0, /* rightshift */
c94cb026 2181 4, /* size */
fbaf61ad 2182 32, /* bitsize */
0a1b45a2 2183 false, /* pc_relative */
fbaf61ad
NC		 2184 0, /* bitpos */
2185 complain_overflow_dont,/* complain_on_overflow */
2186 nds32_elf_ignore_reloc,/* special_function */
2187 "R_NDS32_MULCALL_SUFF",/* name */
0a1b45a2 2188 false, /* partial_inplace */
fbaf61ad
NC		 2189 0xffffffff, /* src_mask */
2190 0xffffffff, /* dst_mask */
0a1b45a2 2191 false), /* pcrel_offset */
c94cb026 2192
fbaf61ad
NC		 2193 HOWTO3 (R_NDS32_PTR, /* type */
2194 0, /* rightshift */
c94cb026 2195 4, /* size */
fbaf61ad 2196 32, /* bitsize */
0a1b45a2 2197 false, /* pc_relative */
fbaf61ad
NC		 2198 0, /* bitpos */
2199 complain_overflow_dont,/* complain_on_overflow */
2200 nds32_elf_ignore_reloc,/* special_function */
2201 "R_NDS32_PTR", /* name */
0a1b45a2 2202 false, /* partial_inplace */
fbaf61ad
NC		 2203 0xffffffff, /* src_mask */
2204 0xffffffff, /* dst_mask */
0a1b45a2 2205 false), /* pcrel_offset */
c94cb026 2206
fbaf61ad
NC		 2207 HOWTO3 (R_NDS32_PTR_COUNT, /* type */
2208 0, /* rightshift */
c94cb026 2209 4, /* size */
fbaf61ad 2210 32, /* bitsize */
0a1b45a2 2211 false, /* pc_relative */
fbaf61ad
NC		 2212 0, /* bitpos */
2213 complain_overflow_dont,/* complain_on_overflow */
2214 nds32_elf_ignore_reloc,/* special_function */
2215 "R_NDS32_PTR_COUNT", /* name */
0a1b45a2 2216 false, /* partial_inplace */
fbaf61ad
NC		 2217 0xffffffff, /* src_mask */
2218 0xffffffff, /* dst_mask */
0a1b45a2 2219 false), /* pcrel_offset */
c94cb026 2220
fbaf61ad
NC		 2221 HOWTO3 (R_NDS32_PTR_RESOLVED, /* type */
2222 0, /* rightshift */
c94cb026 2223 4, /* size */
fbaf61ad 2224 32, /* bitsize */
0a1b45a2 2225 false, /* pc_relative */
fbaf61ad
NC		 2226 0, /* bitpos */
2227 complain_overflow_dont,/* complain_on_overflow */
2228 nds32_elf_ignore_reloc,/* special_function */
2229 "R_NDS32_PTR_RESOLVED",/* name */
0a1b45a2 2230 false, /* partial_inplace */
fbaf61ad
NC		 2231 0xffffffff, /* src_mask */
2232 0xffffffff, /* dst_mask */
0a1b45a2 2233 false), /* pcrel_offset */
c94cb026 2234
fbaf61ad
NC		 2235 HOWTO3 (R_NDS32_PLTBLOCK, /* type */
2236 0, /* rightshift */
c94cb026 2237 4, /* size */
fbaf61ad 2238 32, /* bitsize */
0a1b45a2 2239 false, /* pc_relative */
fbaf61ad
NC		 2240 0, /* bitpos */
2241 complain_overflow_dont,/* complain_on_overflow */
2242 nds32_elf_ignore_reloc,/* special_function */
2243 "R_NDS32_PLTBLOCK", /* name */
0a1b45a2 2244 false, /* partial_inplace */
fbaf61ad
NC		 2245 0xffffffff, /* src_mask */
2246 0xffffffff, /* dst_mask */
0a1b45a2 2247 false), /* pcrel_offset */
c94cb026 2248
fbaf61ad
NC		 2249 HOWTO3 (R_NDS32_RELAX_REGION_BEGIN,/* type */
2250 0, /* rightshift */
c94cb026 2251 4, /* size */
fbaf61ad 2252 32, /* bitsize */
0a1b45a2 2253 false, /* pc_relative */
fbaf61ad
NC		 2254 0, /* bitpos */
2255 complain_overflow_dont,/* complain_on_overflow */
2256 nds32_elf_ignore_reloc,/* special_function */
2257 "R_NDS32_RELAX_REGION_BEGIN",/* name */
0a1b45a2 2258 false, /* partial_inplace */
fbaf61ad
NC		 2259 0xffffffff, /* src_mask */
2260 0xffffffff, /* dst_mask */
0a1b45a2 2261 false), /* pcrel_offset */
c94cb026 2262
fbaf61ad
NC		 2263 HOWTO3 (R_NDS32_RELAX_REGION_END,/* type */
2264 0, /* rightshift */
c94cb026 2265 4, /* size */
fbaf61ad 2266 32, /* bitsize */
0a1b45a2 2267 false, /* pc_relative */
fbaf61ad
NC		 2268 0, /* bitpos */
2269 complain_overflow_dont,/* complain_on_overflow */
2270 nds32_elf_ignore_reloc,/* special_function */
2271 "R_NDS32_RELAX_REGION_END",/* name */
0a1b45a2 2272 false, /* partial_inplace */
fbaf61ad
NC		 2273 0xffffffff, /* src_mask */
2274 0xffffffff, /* dst_mask */
0a1b45a2 2275 false), /* pcrel_offset */
c94cb026 2276
fbaf61ad
NC		 2277 HOWTO3 (R_NDS32_MINUEND, /* type */
2278 0, /* rightshift */
c94cb026 2279 4, /* size */
fbaf61ad 2280 32, /* bitsize */
0a1b45a2 2281 false, /* pc_relative */
fbaf61ad
NC		 2282 0, /* bitpos */
2283 complain_overflow_dont,/* complain_on_overflow */
2284 nds32_elf_ignore_reloc,/* special_function */
2285 "R_NDS32_MINUEND", /* name */
0a1b45a2 2286 false, /* partial_inplace */
fbaf61ad
NC		 2287 0xffffffff, /* src_mask */
2288 0xffffffff, /* dst_mask */
0a1b45a2 2289 false), /* pcrel_offset */
c94cb026 2290
fbaf61ad
NC		 2291 HOWTO3 (R_NDS32_SUBTRAHEND, /* type */
2292 0, /* rightshift */
c94cb026 2293 4, /* size */
fbaf61ad 2294 32, /* bitsize */
0a1b45a2 2295 false, /* pc_relative */
fbaf61ad
NC		 2296 0, /* bitpos */
2297 complain_overflow_dont,/* complain_on_overflow */
2298 nds32_elf_ignore_reloc,/* special_function */
2299 "R_NDS32_SUBTRAHEND", /* name */
0a1b45a2 2300 false, /* partial_inplace */
fbaf61ad
NC		 2301 0xffffffff, /* src_mask */
2302 0xffffffff, /* dst_mask */
0a1b45a2 2303 false), /* pcrel_offset */
c94cb026 2304
fbaf61ad
NC		 2305 HOWTO3 (R_NDS32_DIFF8, /* type */
2306 0, /* rightshift */
c94cb026 2307 1, /* size */
fbaf61ad 2308 8, /* bitsize */
0a1b45a2 2309 false, /* pc_relative */
fbaf61ad
NC		 2310 0, /* bitpos */
2311 complain_overflow_dont,/* complain_on_overflow */
2312 nds32_elf_ignore_reloc,/* special_function */
2313 "R_NDS32_DIFF8", /* name */
0a1b45a2 2314 false, /* partial_inplace */
fbaf61ad
NC		 2315 0x000000ff, /* src_mask */
2316 0x000000ff, /* dst_mask */
0a1b45a2 2317 false), /* pcrel_offset */
c94cb026 2318
fbaf61ad
NC		 2319 HOWTO3 (R_NDS32_DIFF16, /* type */
2320 0, /* rightshift */
c94cb026 2321 2, /* size */
fbaf61ad 2322 16, /* bitsize */
0a1b45a2 2323 false, /* pc_relative */
fbaf61ad
NC		 2324 0, /* bitpos */
2325 complain_overflow_dont,/* complain_on_overflow */
2326 nds32_elf_ignore_reloc,/* special_function */
2327 "R_NDS32_DIFF16", /* name */
0a1b45a2 2328 false, /* partial_inplace */
fbaf61ad
NC		 2329 0x0000ffff, /* src_mask */
2330 0x0000ffff, /* dst_mask */
0a1b45a2 2331 false), /* pcrel_offset */
c94cb026 2332
fbaf61ad
NC		 2333 HOWTO3 (R_NDS32_DIFF32, /* type */
2334 0, /* rightshift */
c94cb026 2335 4, /* size */
fbaf61ad 2336 32, /* bitsize */
0a1b45a2 2337 false, /* pc_relative */
fbaf61ad
NC		 2338 0, /* bitpos */
2339 complain_overflow_dont,/* complain_on_overflow */
2340 nds32_elf_ignore_reloc,/* special_function */
2341 "R_NDS32_DIFF32", /* name */
0a1b45a2 2342 false, /* partial_inplace */
fbaf61ad
NC		 2343 0xffffffff, /* src_mask */
2344 0xffffffff, /* dst_mask */
0a1b45a2 2345 false), /* pcrel_offset */
c94cb026 2346
fbaf61ad
NC		 2347 HOWTO3 (R_NDS32_DIFF_ULEB128, /* type */
2348 0, /* rightshift */
c94cb026 2349 1, /* size */
fbaf61ad 2350 0, /* bitsize */
0a1b45a2 2351 false, /* pc_relative */
fbaf61ad
NC		 2352 0, /* bitpos */
2353 complain_overflow_dont,/* complain_on_overflow */
2354 nds32_elf_ignore_reloc,/* special_function */
2355 "R_NDS32_DIFF_ULEB128",/* name */
0a1b45a2 2356 false, /* partial_inplace */
fbaf61ad
NC		 2357 0xffffffff, /* src_mask */
2358 0xffffffff, /* dst_mask */
0a1b45a2 2359 false), /* pcrel_offset */
c94cb026 2360
fbaf61ad
NC		 2361 HOWTO3 (R_NDS32_DATA, /* type */
2362 0, /* rightshift */
c94cb026 2363 4, /* size */
fbaf61ad 2364 32, /* bitsize */
0a1b45a2 2365 false, /* pc_relative */
fbaf61ad
NC		 2366 0, /* bitpos */
2367 complain_overflow_dont,/* complain_on_overflow */
2368 nds32_elf_ignore_reloc,/* special_function */
2369 "R_NDS32_DATA", /* name */
0a1b45a2 2370 false, /* partial_inplace */
fbaf61ad
NC		 2371 0xffffffff, /* src_mask */
2372 0xffffffff, /* dst_mask */
0a1b45a2 2373 false), /* pcrel_offset */
c94cb026 2374
fbaf61ad
NC		 2375 HOWTO3 (R_NDS32_TRAN, /* type */
2376 0, /* rightshift */
c94cb026 2377 4, /* size */
fbaf61ad 2378 32, /* bitsize */
0a1b45a2 2379 false, /* pc_relative */
fbaf61ad
NC		 2380 0, /* bitpos */
2381 complain_overflow_dont,/* complain_on_overflow */
2382 nds32_elf_ignore_reloc,/* special_function */
2383 "R_NDS32_TRAN", /* name */
0a1b45a2 2384 false, /* partial_inplace */
fbaf61ad
NC		 2385 0xffffffff, /* src_mask */
2386 0xffffffff, /* dst_mask */
0a1b45a2 2387 false), /* pcrel_offset */
c94cb026 2388
fbaf61ad
NC		 2389 HOWTO3 (R_NDS32_TLS_LE_ADD, /* type */
2390 0, /* rightshift */
c94cb026 2391 4, /* size */
fbaf61ad 2392 32, /* bitsize */
0a1b45a2 2393 false, /* pc_relative */
fbaf61ad
NC		 2394 0, /* bitpos */
2395 complain_overflow_dont,/* complain_on_overflow */
2396 nds32_elf_ignore_reloc,/* special_function */
2397 "R_NDS32_TLS_LE_ADD", /* name */
0a1b45a2 2398 false, /* partial_inplace */
fbaf61ad
NC		 2399 0xffffffff, /* src_mask */
2400 0xffffffff, /* dst_mask */
0a1b45a2 2401 false), /* pcrel_offset */
c94cb026 2402
fbaf61ad
NC		 2403 HOWTO3 (R_NDS32_TLS_LE_LS, /* type */
2404 0, /* rightshift */
c94cb026 2405 4, /* size */
fbaf61ad 2406 32, /* bitsize */
0a1b45a2 2407 false, /* pc_relative */
fbaf61ad
NC		 2408 0, /* bitpos */
2409 complain_overflow_dont,/* complain_on_overflow */
2410 nds32_elf_ignore_reloc,/* special_function */
2411 "R_NDS32_TLS_LE_LS", /* name */
0a1b45a2 2412 false, /* partial_inplace */
fbaf61ad
NC		 2413 0xffffffff, /* src_mask */
2414 0xffffffff, /* dst_mask */
0a1b45a2 2415 false), /* pcrel_offset */
c94cb026 2416
fbaf61ad
NC		 2417 HOWTO3 (R_NDS32_EMPTY, /* type */
2418 0, /* rightshift */
c94cb026 2419 4, /* size */
fbaf61ad 2420 32, /* bitsize */
0a1b45a2 2421 false, /* pc_relative */
fbaf61ad
NC		 2422 0, /* bitpos */
2423 complain_overflow_dont,/* complain_on_overflow */
2424 nds32_elf_ignore_reloc,/* special_function */
2425 "R_NDS32_EMPTY", /* name */
0a1b45a2 2426 false, /* partial_inplace */
fbaf61ad
NC		 2427 0xffffffff, /* src_mask */
2428 0xffffffff, /* dst_mask */
0a1b45a2 2429 false), /* pcrel_offset */
c94cb026 2430
fbaf61ad
NC		 2431 /* TLS GD/LD description address base addition. */
2432 HOWTO3 (R_NDS32_TLS_DESC_ADD, /* type */
2433 0, /* rightshift */
c94cb026 2434 4, /* size */
fbaf61ad 2435 32, /* bitsize */
0a1b45a2 2436 false, /* pc_relative */
fbaf61ad
NC		 2437 0, /* bitpos */
2438 complain_overflow_dont,/* complain_on_overflow */
2439 nds32_elf_ignore_reloc,/* special_function */
2440 "R_NDS32_TLS_DESC_ADD",/* name */
0a1b45a2 2441 false, /* partial_inplace */
fbaf61ad
NC		 2442 0xffffffff, /* src_mask */
2443 0xffffffff, /* dst_mask */
0a1b45a2 2444 false), /* pcrel_offset */
c94cb026 2445
fbaf61ad
NC		 2446 /* TLS GD/LD description function load. */
2447 HOWTO3 (R_NDS32_TLS_DESC_FUNC,/* type */
2448 0, /* rightshift */
c94cb026 2449 4, /* size */
fbaf61ad 2450 32, /* bitsize */
0a1b45a2 2451 false, /* pc_relative */
fbaf61ad
NC		 2452 0, /* bitpos */
2453 complain_overflow_dont,/* complain_on_overflow */
2454 nds32_elf_ignore_reloc,/* special_function */
2455 "R_NDS32_TLS_DESC_FUNC",/* name */
0a1b45a2 2456 false, /* partial_inplace */
fbaf61ad
NC		 2457 0xffffffff, /* src_mask */
2458 0xffffffff, /* dst_mask */
0a1b45a2 2459 false), /* pcrel_offset */
c94cb026 2460
fbaf61ad
NC		 2461 /* TLS DESC resolve function call. */
2462 HOWTO3 (R_NDS32_TLS_DESC_CALL,/* type */
2463 0, /* rightshift */
c94cb026 2464 4, /* size */
fbaf61ad 2465 32, /* bitsize */
0a1b45a2 2466 false, /* pc_relative */
fbaf61ad
NC		 2467 0, /* bitpos */
2468 complain_overflow_dont,/* complain_on_overflow */
2469 nds32_elf_ignore_reloc,/* special_function */
2470 "R_NDS32_TLS_DESC_CALL",/* name */
0a1b45a2 2471 false, /* partial_inplace */
fbaf61ad
NC		 2472 0xffffffff, /* src_mask */
2473 0xffffffff, /* dst_mask */
0a1b45a2 2474 false), /* pcrel_offset */
c94cb026 2475
fbaf61ad
NC		 2476 /* TLS DESC variable access. */
2477 HOWTO3 (R_NDS32_TLS_DESC_MEM, /* type */
2478 0, /* rightshift */
c94cb026 2479 4, /* size */
fbaf61ad 2480 32, /* bitsize */
0a1b45a2 2481 false, /* pc_relative */
fbaf61ad
NC		 2482 0, /* bitpos */
2483 complain_overflow_dont,/* complain_on_overflow */
2484 nds32_elf_ignore_reloc,/* special_function */
2485 "R_NDS32_TLS_DESC_MEM",/* name */
0a1b45a2 2486 false, /* partial_inplace */
fbaf61ad
NC		 2487 0xffffffff, /* src_mask */
2488 0xffffffff, /* dst_mask */
0a1b45a2 2489 false), /* pcrel_offset */
c94cb026 2490
fbaf61ad
NC		 2491 /* TLS GD/LD description mark (@tlsdec). */
2492 HOWTO3 (R_NDS32_RELAX_REMOVE, /* type */
2493 0, /* rightshift */
c94cb026 2494 4, /* size */
fbaf61ad 2495 32, /* bitsize */
0a1b45a2 2496 false, /* pc_relative */
fbaf61ad
NC		 2497 0, /* bitpos */
2498 complain_overflow_dont,/* complain_on_overflow */
2499 nds32_elf_ignore_reloc,/* special_function */
2500 "R_NDS32_REMOVE", /* name */
0a1b45a2 2501 false, /* partial_inplace */
fbaf61ad
NC		 2502 0xffffffff, /* src_mask */
2503 0xffffffff, /* dst_mask */
0a1b45a2 2504 false), /* pcrel_offset */
c94cb026 2505
fbaf61ad
NC		 2506 /* TLS GD/LD description mark (@tlsdec). */
2507 HOWTO3 (R_NDS32_RELAX_GROUP, /* type */
2508 0, /* rightshift */
c94cb026 2509 4, /* size */
fbaf61ad 2510 32, /* bitsize */
0a1b45a2 2511 false, /* pc_relative */
fbaf61ad
NC		 2512 0, /* bitpos */
2513 complain_overflow_dont,/* complain_on_overflow */
2514 nds32_elf_ignore_reloc,/* special_function */
2515 "R_NDS32_GROUP", /* name */
0a1b45a2 2516 false, /* partial_inplace */
fbaf61ad
NC		 2517 0xffffffff, /* src_mask */
2518 0xffffffff, /* dst_mask */
0a1b45a2 2519 false), /* pcrel_offset */
c94cb026 2520
fbaf61ad
NC		 2521 HOWTO3 (R_NDS32_TLS_IEGP_LW, /* type */
2522 0, /* rightshift */
c94cb026 2523 4, /* size */
fbaf61ad 2524 32, /* bitsize */
0a1b45a2 2525 false, /* pc_relative */
fbaf61ad
NC		 2526 0, /* bitpos */
2527 complain_overflow_dont,/* complain_on_overflow */
2528 nds32_elf_ignore_reloc,/* special_function */
2529 "R_NDS32_TLS_IEGP_LW", /* name */
0a1b45a2 2530 false, /* partial_inplace */
fbaf61ad
NC		 2531 0xffffffff, /* src_mask */
2532 0xffffffff, /* dst_mask */
0a1b45a2 2533 false), /* pcrel_offset */
c94cb026 2534
fbaf61ad
NC		 2535 /* LA and FLSI relaxation. */
2536 HOWTO3 (R_NDS32_LSI, /* type */
2537 0, /* rightshift */
c94cb026 2538 4, /* size */
fbaf61ad 2539 32, /* bitsize */
0a1b45a2 2540 false, /* pc_relative */
fbaf61ad
NC		 2541 0, /* bitpos */
2542 complain_overflow_dont,/* complain_on_overflow */
2543 nds32_elf_ignore_reloc,/* special_function */
2544 "R_NDS32_LSI", /* name */
0a1b45a2 2545 false, /* partial_inplace */
fbaf61ad
NC		 2546 0xffffffff, /* src_mask */
2547 0xffffffff, /* dst_mask */
0a1b45a2 2548 false),
35c08157
KLC		 2549};
2550
fbaf61ad
NC		 2551static unsigned long dl_tlsdesc_lazy_trampoline[] =
2552{
2553 0x46200000, /* sethi $r2,#0x0 */
2554 0x58210000, /* ori $r2,$r2,#0x0 */
2555 0x40217400, /* add $r2,$r2,$gp */
2556 0x04210000, /* lwi $r2,[$r2+#0x0] */
2557 0x46300000, /* sethi $r3,#0x0 */
2558 0x58318000, /* ori $r3,$r3,#0x0 */
2559 0x4031f400, /* add $r3,$r3,$gp */
2560 0x4a000800, /* jr $r2 */
2561};
2562
2563static void
2564nds32_put_trampoline (void *contents, const unsigned long *template,
2565 unsigned count)
2566{
2567 unsigned ix;
2568
2569 for (ix = 0; ix != count; ix++)
2570 {
2571 unsigned long insn = template[ix];
2572 bfd_putb32 (insn, (char *) contents + ix * 4);
2573 }
2574}
2575
35c08157
KLC		 2576/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2577 This prototype is the same as qsort (). */
2578
443aa5f0 2579static void
35c08157
KLC		 2580nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2581 int (*compar) (const void *lhs, const void *rhs))
2582{
2583 char *ptr = (char *) base;
1c8f6a4d 2584 int i, j;
9a733151
AM		 2585 char tmp[sizeof (Elf_Internal_Rela)];
2586
2587 BFD_ASSERT (size <= sizeof (tmp));
35c08157
KLC		 2588
2589 /* If i is less than j, i is inserted before j.
2590
2591 |---- j ----- i --------------|
2592 \ / \ /
2593 sorted unsorted
2594 */
2595
1c8f6a4d 2596 for (i = 1; i < (int) nmemb; i++)
35c08157 2597 {
1c8f6a4d
KLC		 2598 for (j = (i - 1); j >= 0; j--)
2599 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC		 2600 break;
2601
1c8f6a4d
KLC		 2602 j++;
2603
35c08157 2604 if (i == j)
1c8f6a4d 2605 continue; /* i is in order. */
35c08157
KLC		 2606
2607 memcpy (tmp, ptr + i * size, size);
2608 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2609 memcpy (ptr + j * size, tmp, size);
2610 }
2611}
2612
2613/* Sort relocation by r_offset.
2614
2615 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2616 algorithm. Relocations at the same r_offset must keep their order.
2617 For example, RELAX_ENTRY must be the very first relocation entry.
2618
2619 Currently, this function implements insertion-sort.
2620
2621 FIXME: If we already sort them in assembler, why bother sort them
2622 here again? */
2623
2624static int
2625compar_reloc (const void *lhs, const void *rhs)
2626{
2627 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2628 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2629
2630 if (l->r_offset > r->r_offset)
2631 return 1;
2632 else if (l->r_offset == r->r_offset)
2633 return 0;
2634 else
2635 return -1;
2636}
2637
2638/* Functions listed below are only used for old relocs.
fbaf61ad
NC		 2639 nds32_elf_9_pcrel_reloc
2640 nds32_elf_do_9_pcrel_reloc
2641 nds32_elf_hi20_reloc
2642 nds32_elf_relocate_hi20
2643 nds32_elf_lo12_reloc
2644 nds32_elf_sda15_reloc
2645 nds32_elf_generic_reloc. */
35c08157
KLC		 2646
2647/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2648
2649static bfd_reloc_status_type
fbaf61ad
NC		 2650nds32_elf_9_pcrel_reloc (bfd * abfd,
2651 arelent * reloc_entry,
2652 asymbol * symbol,
2653 void * data,
2654 asection * input_section,
2655 bfd * output_bfd,
2656 char ** error_message ATTRIBUTE_UNUSED)
35c08157
KLC		 2657{
2658 /* This part is from bfd_elf_generic_reloc. */
2659 if (output_bfd != (bfd *) NULL
2660 && (symbol->flags & BSF_SECTION_SYM) == 0
2661 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2662 {
2663 reloc_entry->address += input_section->output_offset;
2664 return bfd_reloc_ok;
2665 }
2666
2667 if (output_bfd != NULL)
2668 {
2669 /* FIXME: See bfd_perform_relocation. Is this right? */
2670 return bfd_reloc_continue;
2671 }
2672
2673 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2674 input_section,
2675 data, reloc_entry->address,
2676 symbol->section,
2677 (symbol->value
2678 + symbol->section->output_section->vma
2679 + symbol->section->output_offset),
2680 reloc_entry->addend);
2681}
2682
2683/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2684#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2685
2686static bfd_reloc_status_type
fbaf61ad
NC		 2687nds32_elf_do_9_pcrel_reloc (bfd * abfd,
2688 reloc_howto_type * howto,
2689 asection * input_section,
2690 bfd_byte * data,
2691 bfd_vma offset,
2692 asection * symbol_section ATTRIBUTE_UNUSED,
2693 bfd_vma symbol_value,
2694 bfd_vma addend)
35c08157
KLC		 2695{
2696 bfd_signed_vma relocation;
2697 unsigned short x;
2698 bfd_reloc_status_type status;
2699
2700 /* Sanity check the address (offset in section). */
2701 if (offset > bfd_get_section_limit (abfd, input_section))
2702 return bfd_reloc_outofrange;
2703
2704 relocation = symbol_value + addend;
2705 /* Make it pc relative. */
2706 relocation -= (input_section->output_section->vma
2707 + input_section->output_offset);
2708 /* These jumps mask off the lower two bits of the current address
2709 before doing pcrel calculations. */
2710 relocation -= (offset & -(bfd_vma) 2);
2711
1c8f6a4d 2712 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC		 2713 status = bfd_reloc_overflow;
2714 else
2715 status = bfd_reloc_ok;
2716
2717 x = bfd_getb16 (data + offset);
2718
2719 relocation >>= howto->rightshift;
2720 relocation <<= howto->bitpos;
2721 x = (x & ~howto->dst_mask)
2722 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2723
2724 bfd_putb16 ((bfd_vma) x, data + offset);
2725
2726 return status;
2727}
2728
2729/* Handle the R_NDS32_HI20_[SU]LO relocs.
2730 HI20_SLO is for the add3 and load/store with displacement instructions.
2731 HI20 is for the or3 instruction.
2732 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2733 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2734 we must add one to the high 16 bytes (which will get subtracted off when
2735 the low 16 bits are added).
2736 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2737 because there is a carry from the LO12 to the HI20. Here we just save
2738 the information we need; we do the actual relocation when we see the LO12.
2739 This code is copied from the elf32-mips.c. We also support an arbitrary
2740 number of HI20 relocs to be associated with a single LO12 reloc. The
2741 assembler sorts the relocs to ensure each HI20 immediately precedes its
2742 LO12. However if there are multiple copies, the assembler may not find
2743 the real LO12 so it picks the first one it finds. */
2744
2745struct nds32_hi20
2746{
2747 struct nds32_hi20 *next;
2748 bfd_byte *addr;
2749 bfd_vma addend;
2750};
2751
2752static struct nds32_hi20 *nds32_hi20_list;
2753
2754static bfd_reloc_status_type
fbaf61ad
NC		 2755nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED,
2756 arelent *reloc_entry,
2757 asymbol *symbol,
2758 void *data,
2759 asection *input_section,
2760 bfd *output_bfd,
2761 char **error_message ATTRIBUTE_UNUSED)
35c08157
KLC		 2762{
2763 bfd_reloc_status_type ret;
2764 bfd_vma relocation;
2765 struct nds32_hi20 *n;
2766
2767 /* This part is from bfd_elf_generic_reloc.
2768 If we're relocating, and this an external symbol, we don't want
2769 to change anything. */
2770 if (output_bfd != (bfd *) NULL
2771 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2772 {
2773 reloc_entry->address += input_section->output_offset;
2774 return bfd_reloc_ok;
2775 }
2776
2777 /* Sanity check the address (offset in section). */
2778 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2779 return bfd_reloc_outofrange;
2780
2781 ret = bfd_reloc_ok;
2782 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2783 ret = bfd_reloc_undefined;
2784
2785 if (bfd_is_com_section (symbol->section))
2786 relocation = 0;
2787 else
2788 relocation = symbol->value;
2789
2790 relocation += symbol->section->output_section->vma;
2791 relocation += symbol->section->output_offset;
2792 relocation += reloc_entry->addend;
2793
2794 /* Save the information, and let LO12 do the actual relocation. */
2795 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2796 if (n == NULL)
2797 return bfd_reloc_outofrange;
2798
2799 n->addr = (bfd_byte *) data + reloc_entry->address;
2800 n->addend = relocation;
2801 n->next = nds32_hi20_list;
2802 nds32_hi20_list = n;
2803
2804 if (output_bfd != (bfd *) NULL)
2805 reloc_entry->address += input_section->output_offset;
2806
2807 return ret;
2808}
2809
2810/* Handle an NDS32 ELF HI20 reloc. */
2811
2812static void
2813nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
fbaf61ad
NC		 2814 int type ATTRIBUTE_UNUSED,
2815 Elf_Internal_Rela *relhi,
2816 Elf_Internal_Rela *rello,
2817 bfd_byte *contents,
35c08157
KLC		 2818 bfd_vma addend)
2819{
2820 unsigned long insn;
2821 bfd_vma addlo;
2822
2823 insn = bfd_getb32 (contents + relhi->r_offset);
2824
2825 addlo = bfd_getb32 (contents + rello->r_offset);
2826 addlo &= 0xfff;
2827
2828 addend += ((insn & 0xfffff) << 20) + addlo;
2829
2830 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2831 bfd_putb32 (insn, contents + relhi->r_offset);
2832}
2833
2834/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2835 inplace relocation; this function exists in order to do the
2836 R_NDS32_HI20_[SU]LO relocation described above. */
2837
2838static bfd_reloc_status_type
2839nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2840 void *data, asection *input_section, bfd *output_bfd,
2841 char **error_message)
2842{
2843 /* This part is from bfd_elf_generic_reloc.
2844 If we're relocating, and this an external symbol, we don't want
2845 to change anything. */
2846 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2847 && reloc_entry->addend == 0)
2848 {
2849 reloc_entry->address += input_section->output_offset;
2850 return bfd_reloc_ok;
2851 }
2852
2853 if (nds32_hi20_list != NULL)
2854 {
2855 struct nds32_hi20 *l;
2856
2857 l = nds32_hi20_list;
2858 while (l != NULL)
2859 {
2860 unsigned long insn;
2861 unsigned long val;
2862 unsigned long vallo;
2863 struct nds32_hi20 *next;
2864
2865 /* Do the HI20 relocation. Note that we actually don't need
2866 to know anything about the LO12 itself, except where to
2867 find the low 12 bits of the addend needed by the LO12. */
2868 insn = bfd_getb32 (l->addr);
2869 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2870 vallo &= 0xfff;
2871 switch (reloc_entry->howto->type)
2872 {
2873 case R_NDS32_LO12S3:
2874 vallo <<= 3;
2875 break;
2876
2877 case R_NDS32_LO12S2:
2878 vallo <<= 2;
2879 break;
2880
2881 case R_NDS32_LO12S1:
2882 vallo <<= 1;
2883 break;
2884
2885 case R_NDS32_LO12S0:
2886 vallo <<= 0;
2887 break;
2888 }
2889
2890 val = ((insn & 0xfffff) << 12) + vallo;
2891 val += l->addend;
2892
2893 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2894 bfd_putb32 ((bfd_vma) insn, l->addr);
2895
2896 next = l->next;
2897 free (l);
2898 l = next;
2899 }
2900
2901 nds32_hi20_list = NULL;
2902 }
2903
2904 /* Now do the LO12 reloc in the usual way.
2905 ??? It would be nice to call bfd_elf_generic_reloc here,
2906 but we have partial_inplace set. bfd_elf_generic_reloc will
2907 pass the handling back to bfd_install_relocation which will install
2908 a section relative addend which is wrong. */
2909 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2910 input_section, output_bfd, error_message);
2911}
2912
2913/* Do generic partial_inplace relocation.
2914 This is a local replacement for bfd_elf_generic_reloc. */
2915
2916static bfd_reloc_status_type
2917nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2918 asymbol *symbol, void *data, asection *input_section,
2919 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2920{
2921 bfd_reloc_status_type ret;
2922 bfd_vma relocation;
2923 bfd_byte *inplace_address;
2924
2925 /* This part is from bfd_elf_generic_reloc.
2926 If we're relocating, and this an external symbol, we don't want
2927 to change anything. */
2928 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2929 && reloc_entry->addend == 0)
2930 {
2931 reloc_entry->address += input_section->output_offset;
2932 return bfd_reloc_ok;
2933 }
2934
2935 /* Now do the reloc in the usual way.
2936 ??? It would be nice to call bfd_elf_generic_reloc here,
2937 but we have partial_inplace set. bfd_elf_generic_reloc will
2938 pass the handling back to bfd_install_relocation which will install
2939 a section relative addend which is wrong. */
2940
2941 /* Sanity check the address (offset in section). */
2942 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2943 return bfd_reloc_outofrange;
2944
2945 ret = bfd_reloc_ok;
2946 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2947 ret = bfd_reloc_undefined;
2948
2949 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2950 relocation = 0;
2951 else
2952 relocation = symbol->value;
2953
2954 /* Only do this for a final link. */
2955 if (output_bfd == (bfd *) NULL)
2956 {
2957 relocation += symbol->section->output_section->vma;
2958 relocation += symbol->section->output_offset;
2959 }
2960
2961 relocation += reloc_entry->addend;
2962 switch (reloc_entry->howto->type)
2963 {
2964 case R_NDS32_LO12S3:
2965 relocation >>= 3;
2966 break;
2967
2968 case R_NDS32_LO12S2:
2969 relocation >>= 2;
2970 break;
2971
2972 case R_NDS32_LO12S1:
2973 relocation >>= 1;
2974 break;
2975
2976 case R_NDS32_LO12S0:
2977 default:
2978 relocation >>= 0;
2979 break;
2980 }
2981
2982 inplace_address = (bfd_byte *) data + reloc_entry->address;
2983
2984#define DOIT(x) \
2985 x = ((x & ~reloc_entry->howto->dst_mask) | \
2986 (((x & reloc_entry->howto->src_mask) + relocation) & \
2987 reloc_entry->howto->dst_mask))
2988
57698478 2989 switch (bfd_get_reloc_size (reloc_entry->howto))
35c08157 2990 {
57698478 2991 case 2:
35c08157
KLC		 2992 {
2993 short x = bfd_getb16 (inplace_address);
2994
2995 DOIT (x);
2996 bfd_putb16 ((bfd_vma) x, inplace_address);
2997 }
2998 break;
57698478 2999 case 4:
35c08157
KLC		 3000 {
3001 unsigned long x = bfd_getb32 (inplace_address);
3002
3003 DOIT (x);
3004 bfd_putb32 ((bfd_vma) x, inplace_address);
3005 }
3006 break;
3007 default:
3008 BFD_ASSERT (0);
3009 }
3010
3011 if (output_bfd != (bfd *) NULL)
3012 reloc_entry->address += input_section->output_offset;
3013
3014 return ret;
3015}
3016
3017/* Handle the R_NDS32_SDA15 reloc.
3018 This reloc is used to compute the address of objects in the small data area
3019 and to perform loads and stores from that area.
3020 The lower 15 bits are sign extended and added to the register specified
3021 in the instruction, which is assumed to point to _SDA_BASE_.
3022
3023 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
3024 the access size, this must be taken care of. */
3025
3026static bfd_reloc_status_type
3027nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
3028 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
3029 asection *input_section, bfd *output_bfd,
3030 char **error_message ATTRIBUTE_UNUSED)
3031{
3032 /* This part is from bfd_elf_generic_reloc. */
3033 if (output_bfd != (bfd *) NULL
3034 && (symbol->flags & BSF_SECTION_SYM) == 0
3035 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
3036 {
3037 reloc_entry->address += input_section->output_offset;
3038 return bfd_reloc_ok;
3039 }
3040
3041 if (output_bfd != NULL)
3042 {
3043 /* FIXME: See bfd_perform_relocation. Is this right? */
3044 return bfd_reloc_continue;
3045 }
3046
3047 /* FIXME: not sure what to do here yet. But then again, the linker
3048 may never call us. */
3049 abort ();
3050}
3051
3052/* nds32_elf_ignore_reloc is the special function for
3053 relocation types which don't need to be relocated
3054 like relaxation relocation types.
3055 This function simply return bfd_reloc_ok when it is
3056 invoked. */
3057
3058static bfd_reloc_status_type
3059nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
3060 asymbol *symbol ATTRIBUTE_UNUSED,
3061 void *data ATTRIBUTE_UNUSED, asection *input_section,
3062 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
3063{
3064 if (output_bfd != NULL)
3065 reloc_entry->address += input_section->output_offset;
3066
3067 return bfd_reloc_ok;
3068}
3069\f
3070
3071/* Map BFD reloc types to NDS32 ELF reloc types. */
3072
3073struct nds32_reloc_map_entry
3074{
3075 bfd_reloc_code_real_type bfd_reloc_val;
3076 unsigned char elf_reloc_val;
3077};
3078
3079static const struct nds32_reloc_map_entry nds32_reloc_map[] =
3080{
3081 {BFD_RELOC_NONE, R_NDS32_NONE},
3082 {BFD_RELOC_16, R_NDS32_16_RELA},
3083 {BFD_RELOC_32, R_NDS32_32_RELA},
fbaf61ad
NC		 3084 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
3085 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
3086
35c08157 3087 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
35c08157
KLC		 3088 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
3089 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
3090 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
3091 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
3092 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
35c08157
KLC		 3093 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
3094 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
3095 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
3096 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
3097 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
3098 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
3099 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
3100 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
3101 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
3102 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
fbaf61ad
NC		 3103 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
3104 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
3105 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
3106 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
35c08157
KLC		 3107 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
3108 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
3109 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
3110 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
3111 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
3112 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
3113 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
3114 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
fbaf61ad
NC		 3115 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
3116 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
35c08157
KLC		 3117 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
3118 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
3119 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
35c08157
KLC		 3120 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
3121 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
35c08157
KLC		 3122 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
3123 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
3124 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
3125 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
3126 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
3127 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
3128 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
3129 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
3130 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
3131 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
3132 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
3133 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
3134 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
fbaf61ad
NC		 3135 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
3136 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
3137 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
3138 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
3139 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
3140 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
3141 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC		 3142 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
3143 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
3144 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
3145 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
35c08157
KLC		 3146 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
3147 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
3148 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
3149 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
35c08157
KLC		 3150 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
3151 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
3152 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
3153 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
fbaf61ad
NC		 3154 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
3155 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
3156 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
3157 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
3158 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
3159 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
3160 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
35c08157
KLC		 3161 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
3162 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
fbaf61ad
NC		 3163 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
3164 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
3165 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
3166 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
3167 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
3168 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
3169 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
3170 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
35c08157
KLC		 3171 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
3172 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
35c08157 3173 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
35c08157
KLC		 3174 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
3175 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
3176 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
3177 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
3178 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
35c08157
KLC		 3179 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
3180 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
3181 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
3182 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
fbaf61ad 3183 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC		 3184 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
3185 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
3186 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
3187 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
3188 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
fbaf61ad
NC		 3189 /* Not sure. */
3190 {BFD_RELOC_NDS32_TPOFF, R_NDS32_TLS_TPOFF},
3191 /* Missing: BFD_RELOC_NDS32_GOTTPOFF. */
1c8f6a4d
KLC		 3192 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
3193 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
1c8f6a4d
KLC		 3194 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
3195 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
3196 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
3197 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
fbaf61ad
NC		 3198 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
3199 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
3200 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
3201 {BFD_RELOC_NDS32_TLS_IE_LO12, R_NDS32_TLS_IE_LO12},
3202 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
3203 {BFD_RELOC_NDS32_TLS_IEGP_HI20, R_NDS32_TLS_IEGP_HI20},
3204 {BFD_RELOC_NDS32_TLS_IEGP_LO12, R_NDS32_TLS_IEGP_LO12},
3205 {BFD_RELOC_NDS32_TLS_IEGP_LO12S2, R_NDS32_TLS_IEGP_LO12S2},
3206 {BFD_RELOC_NDS32_TLS_IEGP_LW, R_NDS32_TLS_IEGP_LW},
3207 {BFD_RELOC_NDS32_TLS_DESC, R_NDS32_TLS_DESC},
3208 {BFD_RELOC_NDS32_TLS_DESC_HI20, R_NDS32_TLS_DESC_HI20},
3209 {BFD_RELOC_NDS32_TLS_DESC_LO12, R_NDS32_TLS_DESC_LO12},
3210 {BFD_RELOC_NDS32_TLS_DESC_20, R_NDS32_TLS_DESC_20},
3211 {BFD_RELOC_NDS32_TLS_DESC_SDA17S2, R_NDS32_TLS_DESC_SDA17S2},
3212 {BFD_RELOC_NDS32_TLS_DESC_ADD, R_NDS32_TLS_DESC_ADD},
3213 {BFD_RELOC_NDS32_TLS_DESC_FUNC, R_NDS32_TLS_DESC_FUNC},
3214 {BFD_RELOC_NDS32_TLS_DESC_CALL, R_NDS32_TLS_DESC_CALL},
3215 {BFD_RELOC_NDS32_TLS_DESC_MEM, R_NDS32_TLS_DESC_MEM},
3216 {BFD_RELOC_NDS32_REMOVE, R_NDS32_RELAX_REMOVE},
3217 {BFD_RELOC_NDS32_GROUP, R_NDS32_RELAX_GROUP},
3218 {BFD_RELOC_NDS32_LSI, R_NDS32_LSI},
35c08157
KLC		 3219};
3220
3221/* Patch tag. */
3222
3223static reloc_howto_type *
3224bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
3225 const char *r_name)
3226{
3227 unsigned int i;
3228
3229 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
3230 if (nds32_elf_howto_table[i].name != NULL
3231 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
3232 return &nds32_elf_howto_table[i];
3233
3234 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
3235 if (nds32_elf_relax_howto_table[i].name != NULL
3236 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
3237 return &nds32_elf_relax_howto_table[i];
3238
3239 return NULL;
3240}
3241
3242static reloc_howto_type *
a379e758 3243bfd_elf32_bfd_reloc_type_table_lookup (unsigned int code)
35c08157
KLC		 3244{
3245 if (code < R_NDS32_RELAX_ENTRY)
3246 {
a379e758
AM		 3247 if (code < ARRAY_SIZE (nds32_elf_howto_table))
3248 return &nds32_elf_howto_table[code];
35c08157
KLC		 3249 }
3250 else
3251 {
a379e758
AM		 3252 if (code - R_NDS32_RELAX_ENTRY < ARRAY_SIZE (nds32_elf_relax_howto_table))
3253 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
35c08157 3254 }
a379e758 3255 return NULL;
35c08157
KLC		 3256}
3257
3258static reloc_howto_type *
3259bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
3260 bfd_reloc_code_real_type code)
3261{
3262 unsigned int i;
3263
3264 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
3265 {
3266 if (nds32_reloc_map[i].bfd_reloc_val == code)
3267 return bfd_elf32_bfd_reloc_type_table_lookup
fbaf61ad 3268 (nds32_reloc_map[i].elf_reloc_val);
35c08157
KLC		 3269 }
3270
3271 return NULL;
3272}
3273
3274/* Set the howto pointer for an NDS32 ELF reloc. */
3275
0a1b45a2 3276static bool
f3185997 3277nds32_info_to_howto_rel (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 3278 Elf_Internal_Rela *dst)
3279{
a379e758 3280 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
35c08157 3281
a379e758
AM		 3282 cache_ptr->howto = NULL;
3283 if (r_type <= R_NDS32_GNU_VTENTRY)
3284 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
3285 if (cache_ptr->howto == NULL || cache_ptr->howto->name == NULL)
5860e3f8 3286 {
695344c0 3287 /* xgettext:c-format */
0aa13fee
AM		 3288 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
3289 abfd, r_type);
f3185997 3290 bfd_set_error (bfd_error_bad_value);
0a1b45a2 3291 return false;
5860e3f8 3292 }
0a1b45a2 3293 return true;
35c08157
KLC		 3294}
3295
0a1b45a2 3296static bool
a379e758 3297nds32_info_to_howto (bfd *abfd, arelent *cache_ptr,
35c08157
KLC		 3298 Elf_Internal_Rela *dst)
3299{
f3185997
NC		 3300 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
3301
a379e758
AM		 3302 cache_ptr->howto = NULL;
3303 if (r_type == R_NDS32_NONE
3304 || r_type > R_NDS32_GNU_VTENTRY)
3305 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
3306 if (cache_ptr->howto == NULL || cache_ptr->howto->name == NULL)
f3185997 3307 {
a379e758
AM		 3308 /* xgettext:c-format */
3309 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
3310 abfd, r_type);
3311 bfd_set_error (bfd_error_bad_value);
3312 return false;
f3185997 3313 }
a379e758 3314 return true;
35c08157
KLC		 3315}
3316
3317/* Support for core dump NOTE sections.
3318 Reference to include/linux/elfcore.h in Linux. */
3319
0a1b45a2 3320static bool
35c08157
KLC		 3321nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
3322{
3323 int offset;
3324 size_t size;
3325
3326 switch (note->descsz)
3327 {
3328 case 0x114:
fbaf61ad 3329 /* Linux/NDS32 32-bit, ABI1. */
35c08157
KLC		 3330
3331 /* pr_cursig */
3332 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3333
3334 /* pr_pid */
3335 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3336
3337 /* pr_reg */
3338 offset = 72;
3339 size = 200;
3340 break;
3341
3342 case 0xfc:
fbaf61ad 3343 /* Linux/NDS32 32-bit. */
35c08157
KLC		 3344
3345 /* pr_cursig */
3346 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
3347
3348 /* pr_pid */
3349 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
3350
3351 /* pr_reg */
3352 offset = 72;
3353 size = 176;
3354 break;
3355
3356 default:
0a1b45a2 3357 return false;
35c08157
KLC		 3358 }
3359
3360 /* Make a ".reg" section. */
3361 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
3362 size, note->descpos + offset);
3363}
3364
0a1b45a2 3365static bool
35c08157
KLC		 3366nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
3367{
3368 switch (note->descsz)
3369 {
3370 case 124:
fbaf61ad 3371 /* Linux/NDS32. */
35c08157
KLC		 3372
3373 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
3374 elf_tdata (abfd)->core->program =
3375 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
3376 elf_tdata (abfd)->core->command =
3377 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 3378 break;
35c08157
KLC		 3379
3380 default:
0a1b45a2 3381 return false;
35c08157
KLC		 3382 }
3383
3384 /* Note that for some reason, a spurious space is tacked
3385 onto the end of the args in some (at least one anyway)
3386 implementations, so strip it off if it exists. */
3387 {
3388 char *command = elf_tdata (abfd)->core->command;
3389 int n = strlen (command);
3390
3391 if (0 < n && command[n - 1] == ' ')
3392 command[n - 1] = '\0';
3393 }
3394
0a1b45a2 3395 return true;
35c08157
KLC		 3396}
3397
3398/* Hook called by the linker routine which adds symbols from an object
3399 file. We must handle the special NDS32 section numbers here.
3400 We also keep watching for whether we need to create the sdata special
3401 linker sections. */
3402
0a1b45a2 3403static bool
35c08157
KLC		 3404nds32_elf_add_symbol_hook (bfd *abfd,
3405 struct bfd_link_info *info ATTRIBUTE_UNUSED,
3406 Elf_Internal_Sym *sym,
3407 const char **namep ATTRIBUTE_UNUSED,
3408 flagword *flagsp ATTRIBUTE_UNUSED,
3409 asection **secp, bfd_vma *valp)
3410{
3411 switch (sym->st_shndx)
3412 {
3413 case SHN_COMMON:
3414 /* Common symbols less than the GP size are automatically
3415 treated as SHN_MIPS_SCOMMON symbols. */
3416 if (sym->st_size > elf_gp_size (abfd)
3417 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3418 break;
3419
10885e24 3420 /* st_value is the alignment constraint.
35c08157
KLC		 3421 That might be its actual size if it is an array or structure. */
3422 switch (sym->st_value)
3423 {
3424 case 1:
3425 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3426 break;
3427 case 2:
3428 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3429 break;
3430 case 4:
3431 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3432 break;
3433 case 8:
3434 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3435 break;
3436 default:
0a1b45a2 3437 return true;
35c08157
KLC		 3438 }
3439
10885e24 3440 (*secp)->flags |= SEC_IS_COMMON | SEC_SMALL_DATA;
35c08157
KLC		 3441 *valp = sym->st_size;
3442 break;
3443 }
3444
0a1b45a2 3445 return true;
35c08157
KLC		 3446}
3447
35c08157
KLC		 3448/* This function can figure out the best location for a base register to access
3449 data relative to this base register
3450 INPUT:
3451 sda_d0: size of first DOUBLE WORD data section
3452 sda_w0: size of first WORD data section
3453 sda_h0: size of first HALF WORD data section
3454 sda_b : size of BYTE data section
3455 sda_hi: size of second HALF WORD data section
3456 sda_w1: size of second WORD data section
3457 sda_d1: size of second DOUBLE WORD data section
3458 OUTPUT:
3459 offset (always positive) from the beginning of sda_d0 if OK
3460 a negative error value if fail
3461 NOTE:
3462 these 7 sections have to be located back to back if exist
3463 a pass in 0 value for non-existing section */
3464
3465/* Due to the interpretation of simm15 field of load/store depending on
3466 data accessing size, the organization of base register relative data shall
3467 like the following figure
3468 -------------------------------------------
3469 | DOUBLE WORD sized data (range +/- 128K)
3470 -------------------------------------------
3471 | WORD sized data (range +/- 64K)
3472 -------------------------------------------
3473 | HALF WORD sized data (range +/- 32K)
3474 -------------------------------------------
3475 | BYTE sized data (range +/- 16K)
3476 -------------------------------------------
3477 | HALF WORD sized data (range +/- 32K)
3478 -------------------------------------------
3479 | WORD sized data (range +/- 64K)
3480 -------------------------------------------
3481 | DOUBLE WORD sized data (range +/- 128K)
3482 -------------------------------------------
3483 Its base register shall be set to access these data freely. */
3484
3485/* We have to figure out the SDA_BASE value, so that we can adjust the
3486 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3487 BFD. If we can't find it, we're stuck. We cache it in the ELF
3488 target data. We don't need to adjust the symbol value for an
3489 external symbol if we are producing relocatable output. */
3490
3491static asection *sda_rela_sec = NULL;
3492
1c8f6a4d 3493#define SDA_SECTION_NUM 10
35c08157
KLC		 3494
3495static bfd_reloc_status_type
0a1b45a2
AM		 3496nds32_elf_final_sda_base (bfd *output_bfd,
3497 struct bfd_link_info *info,
3498 bfd_vma *psb,
3499 bool add_symbol)
35c08157
KLC		 3500{
3501 int relax_fp_as_gp;
3502 struct elf_nds32_link_hash_table *table;
3503 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3504 long unsigned int total = 0;
fbaf61ad
NC		 3505 asection *first = NULL, *final = NULL, *temp;
3506 bfd_vma sda_base = 0;
35c08157 3507
0a1b45a2 3508 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true);
fbaf61ad
NC		 3509 if (!h || (h->type != bfd_link_hash_defined
3510 && h->type != bfd_link_hash_defweak))
35c08157 3511 {
35c08157
KLC		 3512 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3513 4 byte-aligned. Therefore, it has to set the first section ".data"
3514 4 byte-aligned. */
3515 static const char sec_name[SDA_SECTION_NUM][10] =
3516 {
3517 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3518 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC		 3519 };
3520 size_t i = 0;
3521
3522 if (output_bfd->sections == NULL)
3523 {
3524 *psb = elf_gp (output_bfd);
3525 return bfd_reloc_ok;
3526 }
3527
3528 /* Get the first and final section. */
fbaf61ad 3529 while (i < ARRAY_SIZE (sec_name))
35c08157
KLC		 3530 {
3531 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3532 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3533 first = temp;
3534 if (temp && (temp->size != 0 || temp->rawsize != 0))
3535 final = temp;
1c8f6a4d
KLC		 3536
3537 /* Summarize the sections in order to check if joining .bss. */
3538 if (temp && temp->size != 0)
3539 total += temp->size;
3540 else if (temp && temp->rawsize != 0)
3541 total += temp->rawsize;
3542
35c08157
KLC		 3543 i++;
3544 }
3545
1c8f6a4d
KLC		 3546 /* Check .bss size. */
3547 temp = bfd_get_section_by_name (output_bfd, ".bss");
3548 if (temp)
3549 {
3550 if (temp->size != 0)
3551 total += temp->size;
3552 else if (temp->rawsize != 0)
3553 total += temp->rawsize;
3554
3555 if (total < 0x80000)
3556 {
3557 if (!first && (temp->size != 0 || temp->rawsize != 0))
3558 first = temp;
3559 if ((temp->size != 0 || temp->rawsize != 0))
3560 final = temp;
3561 }
3562 }
3563
35c08157
KLC		 3564 if (first && final)
3565 {
3566 /* The middle of data region. */
1c8f6a4d 3567 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC		 3568
3569 /* Find the section sda_base located. */
3570 i = 0;
fbaf61ad 3571 while (i < ARRAY_SIZE (sec_name))
35c08157
KLC		 3572 {
3573 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3574 if (final && (final->size != 0 || final->rawsize != 0)
3575 && sda_base >= final->vma)
3576 {
3577 first = final;
3578 i++;
3579 }
3580 else
3581 break;
3582 }
3583 }
3584 else
3585 {
fbaf61ad
NC		 3586 /* If there is not any default data section in output bfd, try to find
3587 the first data section. If no data section be found, just simplily
3588 choose the first output section. */
3589 temp = output_bfd->sections;
3590 while (temp)
3591 {
3592 if (temp->flags & SEC_ALLOC
3593 && (((temp->flags & SEC_DATA)
3594 && ((temp->flags & SEC_READONLY) == 0))
3595 || (temp->flags & SEC_LOAD) == 0)
3596 && (temp->size != 0 || temp->rawsize != 0))
3597 {
3598 if (!first)
3599 first = temp;
3600 final = temp;
3601 }
3602 temp = temp->next;
3603 }
3604
3605 /* There is no data or bss section. */
3606 if (!first || (first->size == 0 && first->rawsize == 0))
3607 {
3608 first = output_bfd->sections;
3609 while (first && first->size == 0 && first->rawsize == 0)
3610 first = first->next;
3611 }
3612
3613 /* There is no concrete section. */
35c08157
KLC		 3614 if (!first)
3615 {
3616 *psb = elf_gp (output_bfd);
3617 return bfd_reloc_ok;
3618 }
fbaf61ad
NC		 3619
3620 if (final && (final->vma + final->rawsize - first->vma) <= 0x4000)
3621 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
3622 else
3623 sda_base = first->vma + 0x2000;
35c08157
KLC		 3624 }
3625
3626 sda_base -= first->vma;
3627 sda_base = sda_base & (~7);
3628
3629 if (!_bfd_generic_link_add_one_symbol
fbaf61ad 3630 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
0a1b45a2 3631 (bfd_vma) sda_base, (const char *) NULL, false,
fbaf61ad 3632 get_elf_backend_data (output_bfd)->collect, &h))
0a1b45a2 3633 return false;
35c08157
KLC		 3634
3635 sda_rela_sec = first;
fbaf61ad 3636 }
35c08157 3637
fbaf61ad
NC		 3638 /* Set _FP_BASE_ to _SDA_BASE_. */
3639 table = nds32_elf_hash_table (info);
3640 relax_fp_as_gp = table->relax_fp_as_gp;
0a1b45a2 3641 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME, false, false, false);
fbaf61ad
NC		 3642 /* _SDA_BASE_ is difined in linker script. */
3643 if (!first)
3644 {
3645 first = h->u.def.section;
3646 sda_base = h->u.def.value;
3647 }
3648
3649 if (relax_fp_as_gp && h2
3650 && (h2->type == bfd_link_hash_undefweak
3651 || h2->type == bfd_link_hash_undefined))
3652 {
3653 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3654 And set FP equal to SDA_BASE to do relaxation for
3655 la $fp, _FP_BASE_. */
3656 if (!_bfd_generic_link_add_one_symbol
3657 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3658 first, sda_base, (const char *) NULL,
0a1b45a2
AM		 3659 false, get_elf_backend_data (output_bfd)->collect, &h2))
3660 return false;
35c08157
KLC		 3661 }
3662
535b785f 3663 if (add_symbol)
35c08157
KLC		 3664 {
3665 if (h)
3666 {
3667 /* Now set gp. */
3668 elf_gp (output_bfd) = (h->u.def.value
3669 + h->u.def.section->output_section->vma
3670 + h->u.def.section->output_offset);
3671 }
3672 else
3673 {
38f14ab8 3674 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC		 3675 return bfd_reloc_dangerous;
3676 }
3677 }
3678
fbaf61ad
NC		 3679 *psb = h->u.def.value
3680 + h->u.def.section->output_section->vma
3681 + h->u.def.section->output_offset;
35c08157
KLC		 3682 return bfd_reloc_ok;
3683}
3684\f
3685
3686/* Return size of a PLT entry. */
3687#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3688
35c08157
KLC		 3689/* Create an entry in an nds32 ELF linker hash table. */
3690
3691static struct bfd_hash_entry *
3692nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3693 struct bfd_hash_table *table,
3694 const char *string)
3695{
3696 struct elf_nds32_link_hash_entry *ret;
3697
3698 ret = (struct elf_nds32_link_hash_entry *) entry;
3699
3700 /* Allocate the structure if it has not already been allocated by a
3701 subclass. */
3702 if (ret == NULL)
3703 ret = (struct elf_nds32_link_hash_entry *)
3704 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3705
3706 if (ret == NULL)
3707 return (struct bfd_hash_entry *) ret;
3708
3709 /* Call the allocation method of the superclass. */
3710 ret = (struct elf_nds32_link_hash_entry *)
3711 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3712
3713 if (ret != NULL)
3714 {
3715 struct elf_nds32_link_hash_entry *eh;
3716
3717 eh = (struct elf_nds32_link_hash_entry *) ret;
1c8f6a4d 3718 eh->tls_type = GOT_UNKNOWN;
fbaf61ad 3719 eh->offset_to_gp = 0;
35c08157
KLC		 3720 }
3721
3722 return (struct bfd_hash_entry *) ret;
3723}
3724
3725/* Create an nds32 ELF linker hash table. */
3726
3727static struct bfd_link_hash_table *
3728nds32_elf_link_hash_table_create (bfd *abfd)
3729{
3730 struct elf_nds32_link_hash_table *ret;
3731
986f0783 3732 size_t amt = sizeof (struct elf_nds32_link_hash_table);
35c08157
KLC		 3733
3734 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3735 if (ret == NULL)
3736 return NULL;
3737
fbaf61ad 3738 /* Patch tag. */
35c08157
KLC		 3739 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3740 nds32_elf_link_hash_newfunc,
3741 sizeof (struct elf_nds32_link_hash_entry),
3742 NDS32_ELF_DATA))
3743 {
3744 free (ret);
3745 return NULL;
3746 }
3747
fbaf61ad
NC		 3748 ret->sym_ld_script = NULL;
3749
35c08157
KLC		 3750 return &ret->root.root;
3751}
3752
fbaf61ad
NC		 3753/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
3754 shortcuts to them in our hash table. */
3755
0a1b45a2 3756static bool
fbaf61ad
NC		 3757create_got_section (bfd *dynobj, struct bfd_link_info *info)
3758{
3759 struct elf_link_hash_table *ehtab;
3760
3761 if (!_bfd_elf_create_got_section (dynobj, info))
0a1b45a2 3762 return false;
fbaf61ad
NC		 3763
3764 ehtab = elf_hash_table (info);
3765 ehtab->sgot = bfd_get_section_by_name (dynobj, ".got");
3766 ehtab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
3767 if (!ehtab->sgot || !ehtab->sgotplt)
3768 abort ();
3769
3770 /* _bfd_elf_create_got_section will create it for us. */
3771 ehtab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
3772 if (ehtab->srelgot == NULL
fd361982 3773 || !bfd_set_section_flags (ehtab->srelgot,
fbaf61ad
NC		 3774 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3775 | SEC_IN_MEMORY | SEC_LINKER_CREATED
3776 | SEC_READONLY))
fd361982 3777 || !bfd_set_section_alignment (ehtab->srelgot, 2))
0a1b45a2 3778 return false;
fbaf61ad 3779
0a1b45a2 3780 return true;
fbaf61ad
NC		 3781}
3782
35c08157
KLC		 3783/* Create dynamic sections when linking against a dynamic object. */
3784
0a1b45a2 3785static bool
35c08157
KLC		 3786nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3787{
fbaf61ad 3788 struct elf_link_hash_table *ehtab;
35c08157
KLC		 3789 struct elf_nds32_link_hash_table *htab;
3790 flagword flags, pltflags;
3791 register asection *s;
3792 const struct elf_backend_data *bed;
3793 int ptralign = 2; /* 32-bit */
fbaf61ad
NC		 3794 const char *secname;
3795 char *relname;
3796 flagword secflags;
3797 asection *sec;
35c08157
KLC		 3798
3799 bed = get_elf_backend_data (abfd);
fbaf61ad 3800 ehtab = elf_hash_table (info);
35c08157
KLC		 3801 htab = nds32_elf_hash_table (info);
3802
3803 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3804 .rel[a].bss sections. */
3805
3806 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3807 | SEC_LINKER_CREATED);
3808
3809 pltflags = flags;
3810 pltflags |= SEC_CODE;
3811 if (bed->plt_not_loaded)
3812 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3813 if (bed->plt_readonly)
3814 pltflags |= SEC_READONLY;
3815
3816 s = bfd_make_section (abfd, ".plt");
fbaf61ad 3817 ehtab->splt = s;
35c08157 3818 if (s == NULL
fd361982
AM		 3819 || !bfd_set_section_flags (s, pltflags)
3820 || !bfd_set_section_alignment (s, bed->plt_alignment))
0a1b45a2 3821 return false;
35c08157
KLC		 3822
3823 if (bed->want_plt_sym)
3824 {
3825 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3826 .plt section. */
3827 struct bfd_link_hash_entry *bh = NULL;
3828 struct elf_link_hash_entry *h;
3829
3830 if (!(_bfd_generic_link_add_one_symbol
3831 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
0a1b45a2 3832 (bfd_vma) 0, (const char *) NULL, false,
35c08157 3833 get_elf_backend_data (abfd)->collect, &bh)))
0a1b45a2 3834 return false;
35c08157
KLC		 3835
3836 h = (struct elf_link_hash_entry *) bh;
3837 h->def_regular = 1;
3838 h->type = STT_OBJECT;
3839
0e1862bb 3840 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 3841 return false;
35c08157
KLC		 3842 }
3843
3844 s = bfd_make_section (abfd,
3845 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
fbaf61ad 3846 ehtab->srelplt = s;
35c08157 3847 if (s == NULL
fd361982
AM		 3848 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3849 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3850 return false;
35c08157 3851
fbaf61ad 3852 if (ehtab->sgot == NULL && !create_got_section (abfd, info))
0a1b45a2 3853 return false;
35c08157 3854
fbaf61ad
NC		 3855 for (sec = abfd->sections; sec; sec = sec->next)
3856 {
fd361982 3857 secflags = bfd_section_flags (sec);
fbaf61ad
NC		 3858 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3859 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3860 continue;
fd361982 3861 secname = bfd_section_name (sec);
fbaf61ad
NC		 3862 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3863 strcpy (relname, ".rela");
3864 strcat (relname, secname);
3865 if (bfd_get_section_by_name (abfd, secname))
3866 continue;
3867 s = bfd_make_section (abfd, relname);
3868 if (s == NULL
fd361982
AM		 3869 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3870 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3871 return false;
fbaf61ad 3872 }
35c08157
KLC		 3873
3874 if (bed->want_dynbss)
3875 {
3876 /* The .dynbss section is a place to put symbols which are defined
3877 by dynamic objects, are referenced by regular objects, and are
3878 not functions. We must allocate space for them in the process
3879 image and use a R_*_COPY reloc to tell the dynamic linker to
3880 initialize them at run time. The linker script puts the .dynbss
3881 section into the .bss section of the final image. */
3882 s = bfd_make_section (abfd, ".dynbss");
f1dfbfdb 3883 htab->root.sdynbss = s;
35c08157 3884 if (s == NULL
fd361982 3885 || !bfd_set_section_flags (s, SEC_ALLOC | SEC_LINKER_CREATED))
0a1b45a2 3886 return false;
35c08157
KLC		 3887 /* The .rel[a].bss section holds copy relocs. This section is not
3888 normally needed. We need to create it here, though, so that the
3889 linker will map it to an output section. We can't just create it
3890 only if we need it, because we will not know whether we need it
3891 until we have seen all the input files, and the first time the
3892 main linker code calls BFD after examining all the input files
3893 (size_dynamic_sections) the input sections have already been
3894 mapped to the output sections. If the section turns out not to
3895 be needed, we can discard it later. We will never need this
3896 section when generating a shared object, since they do not use
3897 copy relocs. */
0e1862bb 3898 if (!bfd_link_pic (info))
35c08157
KLC		 3899 {
3900 s = bfd_make_section (abfd, (bed->default_use_rela_p
3901 ? ".rela.bss" : ".rel.bss"));
f1dfbfdb 3902 htab->root.srelbss = s;
35c08157 3903 if (s == NULL
fd361982
AM		 3904 || !bfd_set_section_flags (s, flags | SEC_READONLY)
3905 || !bfd_set_section_alignment (s, ptralign))
0a1b45a2 3906 return false;
35c08157
KLC		 3907 }
3908 }
3909
0a1b45a2 3910 return true;
35c08157
KLC		 3911}
3912
3913/* Copy the extra info we tack onto an elf_link_hash_entry. */
3914static void
3915nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3916 struct elf_link_hash_entry *dir,
3917 struct elf_link_hash_entry *ind)
3918{
3919 struct elf_nds32_link_hash_entry *edir, *eind;
3920
3921 edir = (struct elf_nds32_link_hash_entry *) dir;
3922 eind = (struct elf_nds32_link_hash_entry *) ind;
3923
fbaf61ad
NC		 3924 if (ind->root.type == bfd_link_hash_indirect)
3925 {
3926 if (dir->got.refcount <= 0)
3927 {
3928 edir->tls_type = eind->tls_type;
3929 eind->tls_type = GOT_UNKNOWN;
3930 }
3931 }
3932
35c08157
KLC		 3933 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3934}
3935\f
35c08157
KLC		 3936/* Adjust a symbol defined by a dynamic object and referenced by a
3937 regular object. The current definition is in some section of the
3938 dynamic object, but we're not including those sections. We have to
3939 change the definition to something the rest of the link can
3940 understand. */
3941
0a1b45a2 3942static bool
35c08157
KLC		 3943nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3944 struct elf_link_hash_entry *h)
3945{
3946 struct elf_nds32_link_hash_table *htab;
35c08157
KLC		 3947 bfd *dynobj;
3948 asection *s;
3949 unsigned int power_of_two;
3950
3951 dynobj = elf_hash_table (info)->dynobj;
3952
3953 /* Make sure we know what is going on here. */
3954 BFD_ASSERT (dynobj != NULL
3955 && (h->needs_plt
60d67dc8 3956 || h->is_weakalias
35c08157
KLC		 3957 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3958
3959
3960 /* If this is a function, put it in the procedure linkage table. We
3961 will fill in the contents of the procedure linkage table later,
3962 when we know the address of the .got section. */
3963 if (h->type == STT_FUNC || h->needs_plt)
3964 {
0e1862bb 3965 if (!bfd_link_pic (info)
35c08157
KLC		 3966 && !h->def_dynamic
3967 && !h->ref_dynamic
3968 && h->root.type != bfd_link_hash_undefweak
3969 && h->root.type != bfd_link_hash_undefined)
3970 {
3971 /* This case can occur if we saw a PLT reloc in an input
3972 file, but the symbol was never referred to by a dynamic
3973 object. In such a case, we don't actually need to build
3974 a procedure linkage table, and we can just do a PCREL
3975 reloc instead. */
3976 h->plt.offset = (bfd_vma) - 1;
3977 h->needs_plt = 0;
3978 }
3979
0a1b45a2 3980 return true;
35c08157
KLC		 3981 }
3982 else
3983 h->plt.offset = (bfd_vma) - 1;
3984
3985 /* If this is a weak symbol, and there is a real definition, the
3986 processor independent code will have arranged for us to see the
3987 real definition first, and we can just use the same value. */
60d67dc8 3988 if (h->is_weakalias)
35c08157 3989 {
60d67dc8
AM		 3990 struct elf_link_hash_entry *def = weakdef (h);
3991 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3992 h->root.u.def.section = def->root.u.def.section;
3993 h->root.u.def.value = def->root.u.def.value;
0a1b45a2 3994 return true;
35c08157
KLC		 3995 }
3996
3997 /* This is a reference to a symbol defined by a dynamic object which
3998 is not a function. */
3999
4000 /* If we are creating a shared library, we must presume that the
4001 only references to the symbol are via the global offset table.
4002 For such cases we need not do anything here; the relocations will
4003 be handled correctly by relocate_section. */
0e1862bb 4004 if (bfd_link_pic (info))
0a1b45a2 4005 return true;
35c08157
KLC		 4006
4007 /* If there are no references to this symbol that do not use the
4008 GOT, we don't need to generate a copy reloc. */
4009 if (!h->non_got_ref)
0a1b45a2 4010 return true;
35c08157
KLC		 4011
4012 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 4013 if (0 && info->nocopyreloc)
35c08157
KLC		 4014 {
4015 h->non_got_ref = 0;
0a1b45a2 4016 return true;
35c08157
KLC		 4017 }
4018
3bf083ed
AM		 4019 /* If we don't find any dynamic relocs in read-only sections, then
4020 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
5dbc8b37 4021 if (!_bfd_elf_readonly_dynrelocs (h))
35c08157
KLC		 4022 {
4023 h->non_got_ref = 0;
0a1b45a2 4024 return true;
35c08157
KLC		 4025 }
4026
4027 /* We must allocate the symbol in our .dynbss section, which will
4028 become part of the .bss section of the executable. There will be
4029 an entry for this symbol in the .dynsym section. The dynamic
4030 object will contain position independent code, so all references
4031 from the dynamic object to this symbol will go through the global
4032 offset table. The dynamic linker will use the .dynsym entry to
4033 determine the address it must put in the global offset table, so
4034 both the dynamic object and the regular object will refer to the
4035 same memory location for the variable. */
4036
4037 htab = nds32_elf_hash_table (info);
f1dfbfdb 4038 s = htab->root.sdynbss;
35c08157
KLC		 4039 BFD_ASSERT (s != NULL);
4040
4041 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
4042 to copy the initial value out of the dynamic object and into the
4043 runtime process image. We need to remember the offset into the
4044 .rela.bss section we are going to use. */
4045 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
4046 {
4047 asection *srel;
4048
f1dfbfdb 4049 srel = htab->root.srelbss;
35c08157
KLC		 4050 BFD_ASSERT (srel != NULL);
4051 srel->size += sizeof (Elf32_External_Rela);
4052 h->needs_copy = 1;
4053 }
4054
4055 /* We need to figure out the alignment required for this symbol. I
4056 have no idea how ELF linkers handle this. */
4057 power_of_two = bfd_log2 (h->size);
4058 if (power_of_two > 3)
4059 power_of_two = 3;
4060
4061 /* Apply the required alignment. */
4062 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
fd361982 4063 if (power_of_two > bfd_section_alignment (s))
35c08157 4064 {
fd361982 4065 if (!bfd_set_section_alignment (s, power_of_two))
0a1b45a2 4066 return false;
35c08157
KLC		 4067 }
4068
4069 /* Define the symbol as being at this point in the section. */
4070 h->root.u.def.section = s;
4071 h->root.u.def.value = s->size;
4072
4073 /* Increment the section size to make room for the symbol. */
4074 s->size += h->size;
4075
0a1b45a2 4076 return true;
35c08157
KLC		 4077}
4078
4079/* Allocate space in .plt, .got and associated reloc sections for
4080 dynamic relocs. */
4081
0a1b45a2 4082static bool
35c08157
KLC		 4083allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
4084{
4085 struct bfd_link_info *info;
fbaf61ad 4086 struct elf_link_hash_table *ehtab;
35c08157 4087 struct elf_nds32_link_hash_table *htab;
3bf083ed 4088 struct elf_dyn_relocs *p;
35c08157
KLC		 4089
4090 if (h->root.type == bfd_link_hash_indirect)
0a1b45a2 4091 return true;
35c08157 4092
fbaf61ad
NC		 4093 /* When warning symbols are created, they **replace** the "real"
4094 entry in the hash table, thus we never get to see the real
4095 symbol in a hash traversal. So look at it now. */
35c08157 4096 if (h->root.type == bfd_link_hash_warning)
35c08157
KLC		 4097 h = (struct elf_link_hash_entry *) h->root.u.i.link;
4098
4099 info = (struct bfd_link_info *) inf;
fbaf61ad 4100 ehtab = elf_hash_table (info);
35c08157 4101 htab = nds32_elf_hash_table (info);
fbaf61ad 4102 if (htab == NULL)
0a1b45a2 4103 return false;
35c08157 4104
fbaf61ad
NC		 4105 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
4106 && h->plt.refcount > 0
4107 && !(bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 4108 {
4109 /* Make sure this symbol is output as a dynamic symbol.
4110 Undefined weak syms won't yet be marked as dynamic. */
4111 if (h->dynindx == -1 && !h->forced_local)
4112 {
4113 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4114 return false;
35c08157
KLC		 4115 }
4116
0e1862bb 4117 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 4118 {
fbaf61ad 4119 asection *s = ehtab->splt;
35c08157
KLC		 4120
4121 /* If this is the first .plt entry, make room for the special
4122 first entry. */
4123 if (s->size == 0)
4124 s->size += PLT_ENTRY_SIZE;
4125
4126 h->plt.offset = s->size;
4127
4128 /* If this symbol is not defined in a regular file, and we are
4129 not generating a shared library, then set the symbol to this
4130 location in the .plt. This is required to make function
4131 pointers compare as equal between the normal executable and
4132 the shared library. */
0e1862bb 4133 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC		 4134 {
4135 h->root.u.def.section = s;
4136 h->root.u.def.value = h->plt.offset;
4137 }
4138
4139 /* Make room for this entry. */
4140 s->size += PLT_ENTRY_SIZE;
4141
4142 /* We also need to make an entry in the .got.plt section, which
4143 will be placed in the .got section by the linker script. */
fbaf61ad 4144 ehtab->sgotplt->size += 4;
35c08157
KLC		 4145
4146 /* We also need to make an entry in the .rel.plt section. */
fbaf61ad
NC		 4147 ehtab->srelplt->size += sizeof (Elf32_External_Rela);
4148 if (htab->tls_desc_trampoline)
4149 htab->next_tls_desc_index++;
35c08157
KLC		 4150 }
4151 else
4152 {
4153 h->plt.offset = (bfd_vma) - 1;
4154 h->needs_plt = 0;
4155 }
4156 }
4157 else
4158 {
4159 h->plt.offset = (bfd_vma) - 1;
4160 h->needs_plt = 0;
4161 }
4162
4163 if (h->got.refcount > 0)
4164 {
fbaf61ad 4165 asection *sgot;
0a1b45a2 4166 bool dyn;
1c8f6a4d 4167 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC		 4168
4169 /* Make sure this symbol is output as a dynamic symbol.
4170 Undefined weak syms won't yet be marked as dynamic. */
4171 if (h->dynindx == -1 && !h->forced_local)
4172 {
4173 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4174 return false;
35c08157
KLC		 4175 }
4176
fbaf61ad
NC		 4177 sgot = elf_hash_table (info)->sgot;
4178 h->got.offset = sgot->size;
1c8f6a4d
KLC		 4179
4180 if (tls_type == GOT_UNKNOWN)
4181 abort ();
fbaf61ad
NC		 4182
4183 /* Non-TLS symbols, and TLS_IE need one GOT slot. */
4184 if (tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
4185 sgot->size += 4;
4186 else
4187 {
4188 /* TLS_DESC, TLS_GD, and TLS_LD need 2 consecutive GOT slots. */
4189 if (tls_type & GOT_TLS_DESC)
4190 sgot->size += 8;
4191 }
1c8f6a4d 4192
35c08157 4193 dyn = htab->root.dynamic_sections_created;
fbaf61ad 4194
0e1862bb 4195 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
fbaf61ad
NC		 4196 {
4197 if (tls_type == GOT_TLS_DESC && htab->tls_desc_trampoline)
4198 {
4199 /* TLS_DESC with trampoline needs a relocation slot
4200 within .rela.plt. */
4201 htab->num_tls_desc++;
4202 ehtab->srelplt->size += sizeof (Elf32_External_Rela);
4203 htab->tls_trampoline = -1;
4204 }
4205 else
4206 {
4207 /* other relocations, including TLS_DESC without trampoline, need
4208 a relocation slot within .rela.got. */
4209 ehtab->srelgot->size += sizeof (Elf32_External_Rela);
4210 }
4211 }
35c08157
KLC		 4212 }
4213 else
fbaf61ad 4214 h->got.offset = (bfd_vma)-1;
35c08157 4215
190eb1dd 4216 if (h->dyn_relocs == NULL)
0a1b45a2 4217 return true;
35c08157
KLC		 4218
4219 /* In the shared -Bsymbolic case, discard space allocated for
4220 dynamic pc-relative relocs against symbols which turn out to be
4221 defined in regular objects. For the normal shared case, discard
4222 space for pc-relative relocs that have become local due to symbol
4223 visibility changes. */
4224
0e1862bb 4225 if (bfd_link_pic (info))
35c08157
KLC		 4226 {
4227 if (h->def_regular && (h->forced_local || info->symbolic))
4228 {
3bf083ed 4229 struct elf_dyn_relocs **pp;
35c08157 4230
190eb1dd 4231 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
35c08157
KLC		 4232 {
4233 p->count -= p->pc_count;
4234 p->pc_count = 0;
4235 if (p->count == 0)
4236 *pp = p->next;
4237 else
4238 pp = &p->next;
4239 }
4240 }
4241 }
4242 else
4243 {
4244 /* For the non-shared case, discard space for relocs against
4245 symbols which turn out to need copy relocs or are not dynamic. */
4246
4247 if (!h->non_got_ref
4248 && ((h->def_dynamic
4249 && !h->def_regular)
4250 || (htab->root.dynamic_sections_created
4251 && (h->root.type == bfd_link_hash_undefweak
4252 || h->root.type == bfd_link_hash_undefined))))
4253 {
4254 /* Make sure this symbol is output as a dynamic symbol.
4255 Undefined weak syms won't yet be marked as dynamic. */
4256 if (h->dynindx == -1 && !h->forced_local)
4257 {
4258 if (!bfd_elf_link_record_dynamic_symbol (info, h))
0a1b45a2 4259 return false;
35c08157
KLC		 4260 }
4261
4262 /* If that succeeded, we know we'll be keeping all the
4263 relocs. */
4264 if (h->dynindx != -1)
4265 goto keep;
4266 }
4267
190eb1dd 4268 h->dyn_relocs = NULL;
35c08157 4269
dc1e8a47 4270 keep:;
35c08157
KLC		 4271 }
4272
4273 /* Finally, allocate space. */
190eb1dd 4274 for (p = h->dyn_relocs; p != NULL; p = p->next)
35c08157
KLC		 4275 {
4276 asection *sreloc = elf_section_data (p->sec)->sreloc;
4277 sreloc->size += p->count * sizeof (Elf32_External_Rela);
4278 }
4279
0a1b45a2 4280 return true;
35c08157
KLC		 4281}
4282
fbaf61ad
NC		 4283/* Add relocation REL to the end of relocation section SRELOC. */
4284
4285static void
4286elf32_nds32_add_dynreloc (bfd *output_bfd,
4287 struct bfd_link_info *info ATTRIBUTE_UNUSED,
4288 asection *sreloc, Elf_Internal_Rela *rel)
4289{
4290 bfd_byte *loc;
4291 if (sreloc == NULL)
4292 abort ();
4293
4294 loc = sreloc->contents;
4295 loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rela);
4296 if (sreloc->reloc_count * sizeof (Elf32_External_Rela) > sreloc->size)
4297 abort ();
4298
4299 bfd_elf32_swap_reloca_out (output_bfd, rel, loc);
4300}
4301
35c08157
KLC		 4302/* Set the sizes of the dynamic sections. */
4303
0a1b45a2 4304static bool
35c08157
KLC		 4305nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
4306 struct bfd_link_info *info)
4307{
4308 struct elf_nds32_link_hash_table *htab;
4309 bfd *dynobj;
4310 asection *s;
0a1b45a2 4311 bool relocs;
35c08157
KLC		 4312 bfd *ibfd;
4313
4314 htab = nds32_elf_hash_table (info);
fbaf61ad 4315 if (htab == NULL)
0a1b45a2 4316 return false;
fbaf61ad
NC		 4317
4318 dynobj = elf_hash_table (info)->dynobj;
35c08157
KLC		 4319 BFD_ASSERT (dynobj != NULL);
4320
fbaf61ad 4321 if (elf_hash_table (info)->dynamic_sections_created)
35c08157
KLC		 4322 {
4323 /* Set the contents of the .interp section to the interpreter. */
f5233a16 4324 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC		 4325 {
4326 s = bfd_get_section_by_name (dynobj, ".interp");
4327 BFD_ASSERT (s != NULL);
4328 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
4329 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
4330 }
4331 }
4332
4333 /* Set up .got offsets for local syms, and space for local dynamic
4334 relocs. */
c72f2fb2 4335 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC		 4336 {
4337 bfd_signed_vma *local_got;
4338 bfd_signed_vma *end_local_got;
4339 bfd_size_type locsymcount;
4340 Elf_Internal_Shdr *symtab_hdr;
fbaf61ad
NC		 4341 asection *sgot;
4342 char *local_tls_type;
4343 unsigned long symndx;
4344 bfd_vma *local_tlsdesc_gotent;
35c08157
KLC		 4345
4346 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
4347 continue;
4348
4349 for (s = ibfd->sections; s != NULL; s = s->next)
4350 {
3bf083ed 4351 struct elf_dyn_relocs *p;
35c08157 4352
3bf083ed 4353 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC		 4354 elf_section_data (s)->local_dynrel);
4355 p != NULL; p = p->next)
4356 {
4357 if (!bfd_is_abs_section (p->sec)
4358 && bfd_is_abs_section (p->sec->output_section))
4359 {
4360 /* Input section has been discarded, either because
4361 it is a copy of a linkonce section or due to
4362 linker script /DISCARD/, so we'll be discarding
4363 the relocs too. */
4364 }
4365 else if (p->count != 0)
4366 {
fbaf61ad
NC		 4367 asection *sreloc = elf_section_data (p->sec)->sreloc;
4368 sreloc->size += p->count * sizeof (Elf32_External_Rela);
35c08157
KLC		 4369 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
4370 info->flags |= DF_TEXTREL;
4371 }
4372 }
4373 }
4374
4375 local_got = elf_local_got_refcounts (ibfd);
4376 if (!local_got)
4377 continue;
4378
4379 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
4380 locsymcount = symtab_hdr->sh_info;
4381 end_local_got = local_got + locsymcount;
fbaf61ad
NC		 4382 sgot = elf_hash_table (info)->sgot;
4383 local_tls_type = elf32_nds32_local_got_tls_type (ibfd);
4384 local_tlsdesc_gotent = elf32_nds32_local_tlsdesc_gotent (ibfd);
4385 for (symndx = 0; local_got < end_local_got;
4386 ++local_got, ++local_tls_type, ++local_tlsdesc_gotent, ++symndx)
35c08157
KLC		 4387 {
4388 if (*local_got > 0)
4389 {
fbaf61ad
NC		 4390 int num_of_got_entry_needed = 0;
4391 *local_got = sgot->size;
4392 *local_tlsdesc_gotent = sgot->size;
4393
4394 /* TLS_NORMAL, and TLS_IE need one slot in .got. */
4395 if (*local_tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
4396 num_of_got_entry_needed = 1;
4397 /* TLS_GD, TLS_LD, and TLS_DESC need an 8-byte structure in the GOT. */
4398 else if (*local_tls_type & GOT_TLS_DESC)
4399 num_of_got_entry_needed = 2;
4400
4401 sgot->size += (num_of_got_entry_needed << 2);
4402
4403 /* non-relax-able TLS_DESCs need a slot in .rela.plt.
4404 others need a slot in .rela.got. */
4405 if (*local_tls_type == GOT_TLS_DESC)
4406 {
4407 if (bfd_link_pic (info))
4408 {
4409 if (htab->tls_desc_trampoline)
4410 {
4411 htab->num_tls_desc++;
4412 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
4413 htab->tls_trampoline = -1;
4414 }
4415 else
4416 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
4417 }
4418 else
4419 {
4420 /* TLS_DESC -> TLS_LE */
4421 }
4422 }
4423 else
4424 {
4425 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
4426 }
35c08157
KLC		 4427 }
4428 else
fbaf61ad
NC		 4429 {
4430 *local_got = (bfd_vma) -1;
4431 *local_tlsdesc_gotent = (bfd_vma) -1;
4432 }
35c08157
KLC		 4433 }
4434 }
4435
4436 /* Allocate global sym .plt and .got entries, and space for global
4437 sym dynamic relocs. */
4438 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
4439
fbaf61ad
NC		 4440 /* For every jump slot reserved in the sgotplt, reloc_count is
4441 incremented. However, when we reserve space for TLS descriptors,
4442 it's not incremented, so in order to compute the space reserved
4443 for them, it suffices to multiply the reloc count by the jump
4444 slot size. */
4445 if (htab->tls_desc_trampoline && htab->root.srelplt)
4446 htab->sgotplt_jump_table_size = elf32_nds32_compute_jump_table_size (htab);
4447
4448 if (htab->tls_trampoline)
4449 {
4450 htab->tls_trampoline = htab->root.splt->size;
4451
4452 /* If we're not using lazy TLS relocations, don't generate the
4453 PLT and GOT entries they require. */
9bcc30e4
L		 4454 if ((info->flags & DF_BIND_NOW))
4455 htab->root.tlsdesc_plt = 0;
4456 else
fbaf61ad 4457 {
9bcc30e4 4458 htab->root.tlsdesc_got = htab->root.sgot->size;
fbaf61ad
NC		 4459 htab->root.sgot->size += 4;
4460
9bcc30e4 4461 htab->root.tlsdesc_plt = htab->root.splt->size;
fbaf61ad
NC		 4462 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
4463 }
4464 }
4465
35c08157
KLC		 4466 /* We now have determined the sizes of the various dynamic sections.
4467 Allocate memory for them. */
fbaf61ad
NC		 4468 /* The check_relocs and adjust_dynamic_symbol entry points have
4469 determined the sizes of the various dynamic sections. Allocate
4470 memory for them. */
0a1b45a2 4471 relocs = false;
35c08157
KLC		 4472 for (s = dynobj->sections; s != NULL; s = s->next)
4473 {
4474 if ((s->flags & SEC_LINKER_CREATED) == 0)
4475 continue;
4476
ce558b89 4477 if (s == htab->root.splt)
35c08157
KLC		 4478 {
4479 /* Strip this section if we don't need it; see the
4480 comment below. */
3084d7a2 4481 ;
35c08157 4482 }
fbaf61ad 4483 else if (s == elf_hash_table (info)->sgot)
35c08157
KLC		 4484 {
4485 got_size += s->size;
4486 }
fbaf61ad 4487 else if (s == elf_hash_table (info)->sgotplt)
35c08157
KLC		 4488 {
4489 got_size += s->size;
4490 }
3f3328b8 4491 else if (startswith (bfd_section_name (s), ".rela"))
35c08157 4492 {
fbaf61ad 4493 if (s->size != 0 && s != elf_hash_table (info)->srelplt)
0a1b45a2 4494 relocs = true;
35c08157
KLC		 4495
4496 /* We use the reloc_count field as a counter if we need
4497 to copy relocs into the output file. */
4498 s->reloc_count = 0;
4499 }
4500 else
4501 {
4502 /* It's not one of our sections, so don't allocate space. */
4503 continue;
4504 }
4505
4506 if (s->size == 0)
4507 {
4508 /* If we don't need this section, strip it from the
4509 output file. This is mostly to handle .rela.bss and
4510 .rela.plt. We must create both sections in
4511 create_dynamic_sections, because they must be created
4512 before the linker maps input sections to output
4513 sections. The linker does that before
4514 adjust_dynamic_symbol is called, and it is that
4515 function which decides whether anything needs to go
4516 into these sections. */
4517 s->flags |= SEC_EXCLUDE;
4518 continue;
4519 }
4520
4521 /* Allocate memory for the section contents. We use bfd_zalloc
4522 here in case unused entries are not reclaimed before the
4523 section's contents are written out. This should not happen,
4524 but this way if it does, we get a R_NDS32_NONE reloc instead
4525 of garbage. */
4526 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4527 if (s->contents == NULL)
0a1b45a2 4528 return false;
35c08157
KLC		 4529 }
4530
3084d7a2 4531 return _bfd_elf_add_dynamic_tags (output_bfd, info, relocs);
35c08157
KLC		 4532}
4533
4534static bfd_reloc_status_type
4535nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4536 bfd_vma relocation, bfd_byte *location)
4537{
4538 int size;
4539 bfd_vma x = 0;
4540 bfd_reloc_status_type flag;
4541 unsigned int rightshift = howto->rightshift;
4542 unsigned int bitpos = howto->bitpos;
4543
fde0214a 4544 if (howto->negate)
35c08157
KLC		 4545 relocation = -relocation;
4546
4547 /* Get the value we are going to relocate. */
4548 size = bfd_get_reloc_size (howto);
4549 switch (size)
4550 {
4551 default:
35c08157
KLC		 4552 abort ();
4553 break;
6346d5ca
AM		 4554 case 0:
4555 return bfd_reloc_ok;
35c08157
KLC		 4556 case 2:
4557 x = bfd_getb16 (location);
4558 break;
4559 case 4:
4560 x = bfd_getb32 (location);
4561 break;
4562 }
4563
4564 /* Check for overflow. FIXME: We may drop bits during the addition
4565 which we don't check for. We must either check at every single
4566 operation, which would be tedious, or we must do the computations
4567 in a type larger than bfd_vma, which would be inefficient. */
4568 flag = bfd_reloc_ok;
4569 if (howto->complain_on_overflow != complain_overflow_dont)
4570 {
4571 bfd_vma addrmask, fieldmask, signmask, ss;
4572 bfd_vma a, b, sum;
4573
4574 /* Get the values to be added together. For signed and unsigned
4575 relocations, we assume that all values should be truncated to
4576 the size of an address. For bitfields, all the bits matter.
4577 See also bfd_check_overflow. */
4578 fieldmask = N_ONES (howto->bitsize);
4579 signmask = ~fieldmask;
4580 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4581 a = (relocation & addrmask) >> rightshift;
4582 b = (x & howto->src_mask & addrmask) >> bitpos;
4583
4584 switch (howto->complain_on_overflow)
4585 {
4586 case complain_overflow_signed:
4587 /* If any sign bits are set, all sign bits must be set.
4588 That is, A must be a valid negative address after
4589 shifting. */
4590 signmask = ~(fieldmask >> 1);
4591 /* Fall through. */
4592
4593 case complain_overflow_bitfield:
4594 /* Much like the signed check, but for a field one bit
4595 wider. We allow a bitfield to represent numbers in the
4596 range -2**n to 2**n-1, where n is the number of bits in the
4597 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4598 can't overflow, which is exactly what we want. */
4599 ss = a & signmask;
4600 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4601 flag = bfd_reloc_overflow;
4602
4603 /* We only need this next bit of code if the sign bit of B
4604 is below the sign bit of A. This would only happen if
4605 SRC_MASK had fewer bits than BITSIZE. Note that if
4606 SRC_MASK has more bits than BITSIZE, we can get into
4607 trouble; we would need to verify that B is in range, as
4608 we do for A above. */
4609 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4610 ss >>= bitpos;
4611
4612 /* Set all the bits above the sign bit. */
4613 b = (b ^ ss) - ss;
4614
4615 /* Now we can do the addition. */
4616 sum = a + b;
4617
4618 /* See if the result has the correct sign. Bits above the
4619 sign bit are junk now; ignore them. If the sum is
4620 positive, make sure we did not have all negative inputs;
4621 if the sum is negative, make sure we did not have all
4622 positive inputs. The test below looks only at the sign
4623 bits, and it really just
4624 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4625
4626 We mask with addrmask here to explicitly allow an address
4627 wrap-around. The Linux kernel relies on it, and it is
4628 the only way to write assembler code which can run when
4629 loaded at a location 0x80000000 away from the location at
4630 which it is linked. */
4631 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4632 flag = bfd_reloc_overflow;
4633
4634 break;
4635
4636 case complain_overflow_unsigned:
4637 /* Checking for an unsigned overflow is relatively easy:
4638 trim the addresses and add, and trim the result as well.
4639 Overflow is normally indicated when the result does not
4640 fit in the field. However, we also need to consider the
4641 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4642 input is 0x80000000, and bfd_vma is only 32 bits; then we
4643 will get sum == 0, but there is an overflow, since the
4644 inputs did not fit in the field. Instead of doing a
4645 separate test, we can check for this by or-ing in the
4646 operands when testing for the sum overflowing its final
4647 field. */
4648 sum = (a + b) & addrmask;
4649 if ((a | b | sum) & signmask)
4650 flag = bfd_reloc_overflow;
4651 break;
4652
4653 default:
4654 abort ();
4655 }
4656 }
4657
4658 /* Put RELOCATION in the right bits. */
4659 relocation >>= (bfd_vma) rightshift;
4660 relocation <<= (bfd_vma) bitpos;
4661
4662 /* Add RELOCATION to the right bits of X. */
4663 /* FIXME : 090616
4664 Because the relaxation may generate duplicate relocation at one address,
4665 an addition to immediate in the instruction may cause the relocation added
4666 several times.
4667 This bug should be fixed in assembler, but a check is also needed here. */
4668 if (howto->partial_inplace)
4669 x = ((x & ~howto->dst_mask)
4670 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4671 else
4672 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4673
4674
4675 /* Put the relocated value back in the object file. */
4676 switch (size)
4677 {
4678 default:
4679 case 0:
4680 case 1:
4681 case 8:
4682 abort ();
4683 break;
4684 case 2:
4685 bfd_putb16 (x, location);
4686 break;
4687 case 4:
4688 bfd_putb32 (x, location);
4689 break;
4690 }
4691
4692 return flag;
4693}
4694
4695static bfd_reloc_status_type
4696nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4697 asection *input_section, bfd_byte *contents,
4698 bfd_vma address, bfd_vma value, bfd_vma addend)
4699{
4700 bfd_vma relocation;
4701
4702 /* Sanity check the address. */
4703 if (address > bfd_get_section_limit (input_bfd, input_section))
4704 return bfd_reloc_outofrange;
4705
4706 /* This function assumes that we are dealing with a basic relocation
4707 against a symbol. We want to compute the value of the symbol to
4708 relocate to. This is just VALUE, the value of the symbol, plus
4709 ADDEND, any addend associated with the reloc. */
4710 relocation = value + addend;
4711
4712 /* If the relocation is PC relative, we want to set RELOCATION to
4713 the distance between the symbol (currently in RELOCATION) and the
c2bf1eec 4714 location we are relocating. If pcrel_offset is FALSE we do not
35c08157
KLC		 4715 need to subtract out the offset of the location within the
4716 section (which is just ADDRESS). */
4717 if (howto->pc_relative)
4718 {
4719 relocation -= (input_section->output_section->vma
4720 + input_section->output_offset);
4721 if (howto->pcrel_offset)
4722 relocation -= address;
4723 }
4724
4725 return nds32_relocate_contents (howto, input_bfd, relocation,
4726 contents + address);
4727}
4728
37bb890f 4729static int
35c08157
KLC		 4730nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4731 const char *name,
4732 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4733 asection *input_sec,
4734 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4735{
4736 const char *source;
4737 FILE *sym_ld_script = NULL;
4738 struct elf_nds32_link_hash_table *table;
4739
4740 table = nds32_elf_hash_table (info);
4741 sym_ld_script = table->sym_ld_script;
4742 if (!sym_ld_script)
0a1b45a2 4743 return true;
35c08157
KLC		 4744
4745 if (!h || !name || *name == '\0')
0a1b45a2 4746 return true;
35c08157
KLC		 4747
4748 if (input_sec->flags & SEC_EXCLUDE)
0a1b45a2 4749 return true;
35c08157
KLC		 4750
4751 if (!check_start_export_sym)
4752 {
4753 fprintf (sym_ld_script, "SECTIONS\n{\n");
4754 check_start_export_sym = 1;
4755 }
4756
4757 if (h->root.type == bfd_link_hash_defined
4758 || h->root.type == bfd_link_hash_defweak)
4759 {
4760 if (!h->root.u.def.section->output_section)
0a1b45a2 4761 return true;
35c08157
KLC		 4762
4763 if (bfd_is_const_section (input_sec))
4764 source = input_sec->name;
4765 else
765cf5f6 4766 source = bfd_get_filename (input_sec->owner);
35c08157
KLC		 4767
4768 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4769 h->root.root.string,
4770 (long) (h->root.u.def.value
4771 + h->root.u.def.section->output_section->vma
4772 + h->root.u.def.section->output_offset), source);
4773 }
4774
0a1b45a2 4775 return true;
35c08157
KLC		 4776}
4777
4778/* Relocate an NDS32/D ELF section.
4779 There is some attempt to make this function usable for many architectures,
4780 both for RELA and REL type relocs, if only to serve as a learning tool.
4781
4782 The RELOCATE_SECTION function is called by the new ELF backend linker
4783 to handle the relocations for a section.
4784
4785 The relocs are always passed as Rela structures; if the section
4786 actually uses Rel structures, the r_addend field will always be
4787 zero.
4788
4789 This function is responsible for adjust the section contents as
4790 necessary, and (if using Rela relocs and generating a
4791 relocatable output file) adjusting the reloc addend as
4792 necessary.
4793
4794 This function does not have to worry about setting the reloc
4795 address or the reloc symbol index.
4796
4797 LOCAL_SYMS is a pointer to the swapped in local symbols.
4798
4799 LOCAL_SECTIONS is an array giving the section in the input file
4800 corresponding to the st_shndx field of each local symbol.
4801
4802 The global hash table entry for the global symbols can be found
4803 via elf_sym_hashes (input_bfd).
4804
4805 When generating relocatable output, this function must handle
4806 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4807 going to be the section symbol corresponding to the output
4808 section, which means that the addend must be adjusted
4809 accordingly. */
4810
fbaf61ad
NC		 4811/* Return the base VMA address which should be subtracted from real addresses
4812 when resolving @dtpoff relocation.
4813 This is PT_TLS segment p_vaddr. */
4814
4815/* Return the relocation value for @tpoff relocation
4816 if STT_TLS virtual address is ADDRESS. */
4817
4818/* Return the relocation value for @gottpoff relocation
4819 if STT_TLS virtual address is ADDRESS. */
4820
1c8f6a4d 4821static bfd_vma
fbaf61ad 4822gottpoff (struct bfd_link_info *info, bfd_vma address)
1c8f6a4d 4823{
fbaf61ad
NC		 4824 bfd_vma tp_base;
4825 bfd_vma tp_offset;
4826
1c8f6a4d
KLC		 4827 /* If tls_sec is NULL, we should have signalled an error already. */
4828 if (elf_hash_table (info)->tls_sec == NULL)
4829 return 0;
fbaf61ad
NC		 4830
4831 tp_base = elf_hash_table (info)->tls_sec->vma;
4832 tp_offset = address - tp_base;
4833
4834 return tp_offset;
1c8f6a4d
KLC		 4835}
4836
0a1b45a2 4837static bool
fbaf61ad
NC		 4838patch_tls_desc_to_ie (bfd_byte *contents, Elf_Internal_Rela *rel, bfd *ibfd)
4839{
4840 /* TLS_GD/TLS_LD model #1
4841 46 00 00 00 sethi $r0,#0x0
4842 58 00 00 00 ori $r0,$r0,#0x0
4843 40 00 74 00 add $r0,$r0,$gp
4844 04 10 00 00 lwi $r1,[$r0+#0x0]
4845 4b e0 04 01 jral $lp,$r1 */
4846
4847 /* TLS_GD/TLS_LD model #2
4848 46 00 00 00 sethi $r0,#0x0
4849 58 00 00 00 ori $r0,$r0,#0x0
4850 38 10 74 02 lw $r1,[$r0+($gp<<#0x0)]
4851 40 00 74 00 add $r0,$r0,$gp
4852 4b e0 04 01 jral $lp,$r1 */
4853
4854 /* TLS_IE model (non-PIC)
4855 46 00 00 00 sethi $r0,#0x0
4856 04 00 00 00 lwi $r0,[$r0+#0x0]
4857 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
4858
4859 /* TLS_IE model (PIC)
4860 46 00 00 00 sethi $r0,#0x0
4861 58 00 00 00 ori $r0,$r0,#0x0
4862 38 00 74 02 lw $r0,[$r0+($gp<<#0x0)]
4863 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
4864
4865 /* TLS_GD_TO_IE model
4866 46 00 00 00 sethi $r0,#0x0
4867 58 00 00 00 ori $r0,$r0,#0x0
4868 40 00 74 00 add $r0,$rM,$gp
4869 04 00 00 01 lwi $r0,[$r0+#0x4]
4870 40 00 64 00 add $r0,$r0,$r25 */
4871
0a1b45a2 4872 bool rz = false;
fbaf61ad
NC		 4873
4874 typedef struct
4875 {
4876 uint32_t opcode;
4877 uint32_t mask;
4878 } pat_t;
4879
4880 uint32_t patch[3] =
4881 {
4882 0x40007400, /* add $r0,$rM,$gp */
4883 0x04000001, /* lwi $r0,[$r0+#0x4] */
4884 0x40006400, /* add $r0,$r0,$r25 */
4885 };
4886
4887 pat_t mode0[3] =
4888 {
4889 { 0x40000000, 0xfe0003ff },
4890 { 0x04000000, 0xfe000000 },
4891 { 0x4be00001, 0xffff83ff },
4892 };
4893
4894 pat_t mode1[3] =
4895 {
4896 { 0x38007402, 0xfe007fff },
4897 { 0x40007400, 0xfe007fff },
4898 { 0x4be00001, 0xffff83ff },
4899 };
4900
4901 unsigned char *p = contents + rel->r_offset;
4902
4903 uint32_t insn;
4904 uint32_t regidx = 0;
4905 insn = bfd_getb32 (p);
4906 if (INSN_SETHI == (0xfe0fffffu & insn))
4907 {
4908 regidx = 0x1f & (insn >> 20);
4909 p += 4;
4910 }
4911
4912 insn = bfd_getb32 (p);
4913 if (INSN_ORI == (0xfe007fffu & insn))
4914 {
4915 regidx = 0x1f & (insn >> 20);
4916 p += 4;
4917 }
4918
4919 if (patch[2] == bfd_getb32 (p + 8)) /* Character instruction. */
4920 {
4921 /* already patched? */
4922 if ((patch[0] == (0xfff07fffu & bfd_getb32 (p + 0))) &&
4923 (patch[1] == bfd_getb32 (p + 4)))
0a1b45a2 4924 rz = true;
fbaf61ad
NC		 4925 }
4926 else if (mode0[0].opcode == (mode0[0].mask & bfd_getb32 (p + 0)))
4927 {
4928 if ((mode0[1].opcode == (mode0[1].mask & bfd_getb32 (p + 4))) &&
4929 (mode0[2].opcode == (mode0[2].mask & bfd_getb32 (p + 8))))
4930 {
4931 bfd_putb32 (patch[0] | (regidx << 15), p + 0);
4932 bfd_putb32 (patch[1], p + 4);
4933 bfd_putb32 (patch[2], p + 8);
0a1b45a2 4934 rz = true;
fbaf61ad
NC		 4935 }
4936 }
4937 else if (mode1[0].opcode == (mode1[0].mask & bfd_getb32 (p + 0)))
4938 {
4939 if ((mode1[1].opcode == (mode1[1].mask & bfd_getb32 (p + 4))) &&
4940 (mode1[2].opcode == (mode1[2].mask & bfd_getb32 (p + 8))))
4941 {
4942 bfd_putb32 (patch[0] | (regidx << 15), p + 0);
4943 bfd_putb32 (patch[1], p + 4);
4944 bfd_putb32 (patch[2], p + 8);
0a1b45a2 4945 rz = true;
fbaf61ad
NC		 4946 }
4947 }
4948
4949 if (!rz)
4950 {
765cf5f6 4951 printf ("%s: %s @ 0x%08x\n", __func__, bfd_get_filename (ibfd),
fbaf61ad
NC		 4952 (int) rel->r_offset);
4953 BFD_ASSERT(0); /* Unsupported pattern. */
4954 }
4955
4956 return rz;
4957}
4958
4959static enum elf_nds32_tls_type
4960get_tls_type (enum elf_nds32_reloc_type r_type, struct elf_link_hash_entry *h);
4961
4962static unsigned int
4963ones32 (register unsigned int x)
4964{
4965 /* 32-bit recursive reduction using SWAR...
4966 but first step is mapping 2-bit values
4967 into sum of 2 1-bit values in sneaky way. */
4968 x -= ((x >> 1) & 0x55555555);
4969 x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
4970 x = (((x >> 4) + x) & 0x0f0f0f0f);
4971 x += (x >> 8);
4972 x += (x >> 16);
4973 return (x & 0x0000003f);
4974}
4975
a767a1c4 4976#if !HAVE_FLS
fbaf61ad
NC		 4977static unsigned int
4978fls (register unsigned int x)
4979{
4980 return ffs (x & (-x));
4981}
a767a1c4 4982#endif /* !HAVE_FLS */
fbaf61ad
NC		 4983
4984#define nds32_elf_local_tlsdesc_gotent(bfd) \
4985 (elf_nds32_tdata (bfd)->local_tlsdesc_gotent)
4986
0f684201 4987static int
fbaf61ad
NC		 4988nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
4989 struct bfd_link_info * info,
4990 bfd * input_bfd,
4991 asection * input_section,
4992 bfd_byte * contents,
4993 Elf_Internal_Rela * relocs,
4994 Elf_Internal_Sym * local_syms,
4995 asection ** local_sections)
4996{
4997 Elf_Internal_Shdr *symtab_hdr;
4998 struct elf_link_hash_entry **sym_hashes;
4999 Elf_Internal_Rela *rel, *relend;
0a1b45a2 5000 bool ret = true; /* Assume success. */
fbaf61ad
NC		 5001 int align = 0;
5002 bfd_reloc_status_type r;
5003 const char *errmsg = NULL;
5004 bfd_vma gp;
5005 struct elf_link_hash_table *ehtab;
5006 struct elf_nds32_link_hash_table *htab;
5007 bfd *dynobj;
5008 bfd_vma *local_got_offsets;
5009 asection *sgot, *splt, *sreloc;
5010 bfd_vma high_address;
5011 struct elf_nds32_link_hash_table *table;
5012 int eliminate_gc_relocs;
35c08157
KLC		 5013 bfd_vma fpbase_addr;
5014
5015 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5016 sym_hashes = elf_sym_hashes (input_bfd);
fbaf61ad 5017 ehtab = elf_hash_table (info);
35c08157
KLC		 5018 htab = nds32_elf_hash_table (info);
5019 high_address = bfd_get_section_limit (input_bfd, input_section);
5020
5021 dynobj = htab->root.dynobj;
5022 local_got_offsets = elf_local_got_offsets (input_bfd);
5023
fbaf61ad
NC		 5024 sgot = ehtab->sgot;
5025 splt = ehtab->splt;
35c08157
KLC		 5026 sreloc = NULL;
5027
5028 rel = relocs;
5029 relend = relocs + input_section->reloc_count;
5030
5031 table = nds32_elf_hash_table (info);
5032 eliminate_gc_relocs = table->eliminate_gc_relocs;
fbaf61ad 5033
35c08157 5034 /* By this time, we can adjust the value of _SDA_BASE_. */
fbaf61ad 5035 /* Explain _SDA_BASE_ */
0e1862bb 5036 if ((!bfd_link_relocatable (info)))
35c08157
KLC		 5037 {
5038 is_SDA_BASE_set = 1;
0a1b45a2 5039 r = nds32_elf_final_sda_base (output_bfd, info, &gp, true);
35c08157 5040 if (r != bfd_reloc_ok)
0a1b45a2 5041 return false;
35c08157
KLC		 5042 }
5043
fbaf61ad
NC		 5044 /* Do TLS model conversion once at first. */
5045 nds32_elf_unify_tls_model (input_bfd, input_section, contents, info);
5046
35c08157
KLC		 5047 /* Use gp as fp to prevent truncated fit. Because in relaxation time
5048 the fp value is set as gp, and it has be reverted for instruction
5049 setting fp. */
5050 fpbase_addr = elf_gp (output_bfd);
5051
fbaf61ad 5052 /* Deal with (dynamic) relocations. */
35c08157
KLC		 5053 for (rel = relocs; rel < relend; rel++)
5054 {
5055 enum elf_nds32_reloc_type r_type;
5056 reloc_howto_type *howto = NULL;
5057 unsigned long r_symndx;
5058 struct elf_link_hash_entry *h = NULL;
5059 Elf_Internal_Sym *sym = NULL;
5060 asection *sec;
5061 bfd_vma relocation;
fbaf61ad
NC		 5062 bfd_vma relocation_sym = 0xdeadbeef;
5063 Elf_Internal_Rela *lorel;
5064 bfd_vma off;
35c08157
KLC		 5065
5066 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
5067 ensure it's zero (we use REL relocs, not RELA). Therefore this
5068 should be assigning zero to `addend', but for clarity we use
5069 `r_addend'. */
5070
5071 bfd_vma addend = rel->r_addend;
5072 bfd_vma offset = rel->r_offset;
5073
5074 r_type = ELF32_R_TYPE (rel->r_info);
5075 if (r_type >= R_NDS32_max)
5076 {
695344c0 5077 /* xgettext:c-format */
0aa13fee 5078 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 5079 input_bfd, r_type);
35c08157 5080 bfd_set_error (bfd_error_bad_value);
0a1b45a2 5081 ret = false;
35c08157
KLC		 5082 continue;
5083 }
5084
5085 if (r_type == R_NDS32_GNU_VTENTRY
5086 || r_type == R_NDS32_GNU_VTINHERIT
5087 || r_type == R_NDS32_NONE
5088 || r_type == R_NDS32_RELA_GNU_VTENTRY
5089 || r_type == R_NDS32_RELA_GNU_VTINHERIT
5090 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
5091 || r_type == R_NDS32_DATA
fbaf61ad 5092 || r_type == R_NDS32_TRAN)
35c08157
KLC		 5093 continue;
5094
0c4bd9d9
KLC		 5095 /* If we enter the fp-as-gp region. Resolve the address
5096 of best fp-base. */
35c08157
KLC		 5097 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
5098 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
5099 {
5100 int dist;
5101
5102 /* Distance to relocation of best fp-base is encoded in R_SYM. */
5103 dist = rel->r_addend >> 16;
5104 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
5105 local_syms, symtab_hdr);
5106 }
5107 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
5108 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
5109 {
5110 fpbase_addr = elf_gp (output_bfd);
5111 }
5112
fbaf61ad
NC		 5113 /* Skip the relocations used for relaxation. */
5114 /* We have to update LONGCALL and LONGJUMP
5115 relocations when generating the relocatable files. */
5116 if (!bfd_link_relocatable (info)
5117 && (r_type >= R_NDS32_RELAX_ENTRY
5118 || (r_type >= R_NDS32_LONGCALL4
5119 && r_type <= R_NDS32_LONGJUMP7)))
35c08157
KLC		 5120 continue;
5121
5122 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
5123 r_symndx = ELF32_R_SYM (rel->r_info);
5124
5125 /* This is a final link. */
5126 sym = NULL;
5127 sec = NULL;
5128 h = NULL;
5129
5130 if (r_symndx < symtab_hdr->sh_info)
5131 {
5132 /* Local symbol. */
5133 sym = local_syms + r_symndx;
5134 sec = local_sections[r_symndx];
5135
5136 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5137 addend = rel->r_addend;
fbaf61ad
NC		 5138
5139 /* keep symbol location for static TLS_IE GOT entry */
5140 relocation_sym = relocation;
5141 if (bfd_link_relocatable (info))
5142 {
5143 /* This is a relocatable link. We don't have to change
5144 anything, unless the reloc is against a section symbol,
5145 in which case we have to adjust according to where the
5146 section symbol winds up in the output section. */
5147 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
5148 rel->r_addend += sec->output_offset + sym->st_value;
5149
5150 continue;
5151 }
35c08157
KLC		 5152 }
5153 else
5154 {
5155 /* External symbol. */
fbaf61ad
NC		 5156 if (bfd_link_relocatable (info))
5157 continue;
0a1b45a2 5158 bool warned, ignored, unresolved_reloc;
35c08157
KLC		 5159 int symndx = r_symndx - symtab_hdr->sh_info;
5160
5161 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
5162 r_symndx, symtab_hdr, sym_hashes, h, sec,
5163 relocation, unresolved_reloc, warned,
5164 ignored);
5165
fbaf61ad
NC		 5166 /* keep symbol location for static TLS_IE GOT entry */
5167 relocation_sym = relocation;
5168
35c08157
KLC		 5169 /* la $fp, _FP_BASE_ is per-function (region).
5170 Handle it specially. */
5171 switch ((int) r_type)
5172 {
fbaf61ad
NC		 5173 case R_NDS32_HI20_RELA:
5174 case R_NDS32_LO12S0_RELA:
5175 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
5176 FP_BASE_NAME) == 0)
5177 {
5178 if (!bfd_link_pie (info))
5179 {
5180 _bfd_error_handler
5181 ("%pB: warning: _FP_BASE_ setting insns relaxation failed.",
5182 input_bfd);
5183 }
5184 relocation = fpbase_addr;
5185 }
5186 break;
35c08157
KLC		 5187 case R_NDS32_SDA19S0_RELA:
5188 case R_NDS32_SDA15S0_RELA:
5189 case R_NDS32_20_RELA:
5190 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
5191 FP_BASE_NAME) == 0)
5192 {
5193 relocation = fpbase_addr;
5194 break;
5195 }
5196 }
35c08157
KLC		 5197 }
5198
5199 /* Sanity check the address. */
5200 if (offset > high_address)
5201 {
5202 r = bfd_reloc_outofrange;
5203 goto check_reloc;
5204 }
5205
fbaf61ad 5206 if (r_type >= R_NDS32_RELAX_ENTRY)
35c08157
KLC		 5207 continue;
5208
5209 switch ((int) r_type)
5210 {
5211 case R_NDS32_GOTOFF:
5212 /* Relocation is relative to the start of the global offset
5213 table (for ld24 rx, #uimm24), e.g. access at label+addend
5214
5215 ld24 rx. #label@GOTOFF + addend
5216 sub rx, r12. */
5217 case R_NDS32_GOTOFF_HI20:
5218 case R_NDS32_GOTOFF_LO12:
5219 case R_NDS32_GOTOFF_LO15:
5220 case R_NDS32_GOTOFF_LO19:
5221 BFD_ASSERT (sgot != NULL);
5222
5223 relocation -= elf_gp (output_bfd);
5224 break;
5225
5226 case R_NDS32_9_PLTREL:
5227 case R_NDS32_25_PLTREL:
5228 /* Relocation is to the entry for this symbol in the
5229 procedure linkage table. */
5230
5231 /* The native assembler will generate a 25_PLTREL reloc
5232 for a local symbol if you assemble a call from one
5233 section to another when using -K pic. */
5234 if (h == NULL)
5235 break;
5236
5237 if (h->forced_local)
5238 break;
5239
5240 /* We didn't make a PLT entry for this symbol. This
5241 happens when statically linking PIC code, or when
5242 using -Bsymbolic. */
5243 if (h->plt.offset == (bfd_vma) - 1)
5244 break;
5245
5246 relocation = (splt->output_section->vma
5247 + splt->output_offset + h->plt.offset);
5248 break;
5249
5250 case R_NDS32_PLT_GOTREL_HI20:
5251 case R_NDS32_PLT_GOTREL_LO12:
5252 case R_NDS32_PLT_GOTREL_LO15:
5253 case R_NDS32_PLT_GOTREL_LO19:
5254 case R_NDS32_PLT_GOTREL_LO20:
fbaf61ad
NC		 5255 if (h == NULL
5256 || h->forced_local
5257 || h->plt.offset == (bfd_vma) -1
5258 || (bfd_link_pie (info) && h->def_regular))
35c08157 5259 {
fbaf61ad
NC		 5260 /* Maybe we should find better checking to optimize
5261 PIE PLT relocations. */
35c08157
KLC		 5262 /* We didn't make a PLT entry for this symbol. This
5263 happens when statically linking PIC code, or when
5264 using -Bsymbolic. */
fbaf61ad
NC		 5265 if (h)
5266 h->plt.offset = (bfd_vma) -1; /* Cancel PLT trampoline. */
35c08157
KLC		 5267 relocation -= elf_gp (output_bfd);
5268 break;
5269 }
5270
5271 relocation = (splt->output_section->vma
5272 + splt->output_offset + h->plt.offset);
5273
5274 relocation -= elf_gp (output_bfd);
5275 break;
5276
5277 case R_NDS32_PLTREL_HI20:
5278 case R_NDS32_PLTREL_LO12:
5279
5280 /* Relocation is to the entry for this symbol in the
5281 procedure linkage table. */
5282
5283 /* The native assembler will generate a 25_PLTREL reloc
5284 for a local symbol if you assemble a call from one
5285 section to another when using -K pic. */
5286 if (h == NULL)
5287 break;
5288
5289 if (h->forced_local)
5290 break;
5291
5292 if (h->plt.offset == (bfd_vma) - 1)
5293 /* We didn't make a PLT entry for this symbol. This
5294 happens when statically linking PIC code, or when
5295 using -Bsymbolic. */
5296 break;
5297
5298 if (splt == NULL)
5299 break;
5300
5301 relocation = (splt->output_section->vma
5302 + splt->output_offset
5303 + h->plt.offset + 4)
5304 - (input_section->output_section->vma
5305 + input_section->output_offset
5306 + rel->r_offset);
5307
5308 break;
5309
5310 case R_NDS32_GOTPC20:
5311 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
5312 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
5313 relocation = elf_gp (output_bfd);
5314 break;
5315
5316 case R_NDS32_GOTPC_HI20:
5317 case R_NDS32_GOTPC_LO12:
fbaf61ad
NC		 5318 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
5319 bl .+4
5320 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
5321 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
5322 or
5323 bl .+4
5324 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
5325 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) */
5326 relocation = elf_gp (output_bfd);
5327 relocation -= (input_section->output_section->vma
5328 + input_section->output_offset + rel->r_offset);
5329 break;
35c08157
KLC		 5330
5331 case R_NDS32_GOT20:
5332 /* Fall through. */
5333 case R_NDS32_GOT_HI20:
5334 case R_NDS32_GOT_LO12:
5335 case R_NDS32_GOT_LO15:
5336 case R_NDS32_GOT_LO19:
5337 /* Relocation is to the entry for this symbol in the global
5338 offset table. */
5339 BFD_ASSERT (sgot != NULL);
5340
5341 if (h != NULL)
5342 {
fbaf61ad 5343 /* External symbol */
0a1b45a2 5344 bool dyn;
35c08157
KLC		 5345
5346 off = h->got.offset;
5347 BFD_ASSERT (off != (bfd_vma) - 1);
5348 dyn = htab->root.dynamic_sections_created;
0e1862bb
L		 5349 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
5350 bfd_link_pic (info),
5351 h)
5352 || (bfd_link_pic (info)
35c08157
KLC		 5353 && (info->symbolic
5354 || h->dynindx == -1
5355 || h->forced_local) && h->def_regular))
5356 {
5357 /* This is actually a static link, or it is a
5358 -Bsymbolic link and the symbol is defined
5359 locally, or the symbol was forced to be local
5360 because of a version file. We must initialize
5361 this entry in the global offset table. Since the
5362 offset must always be a multiple of 4, we use the
5363 least significant bit to record whether we have
5364 initialized it already.
5365
5366 When doing a dynamic link, we create a .rela.got
5367 relocation entry to initialize the value. This
5368 is done in the finish_dynamic_symbol routine. */
fbaf61ad 5369 if ((off & 1) != 0) /* clear LSB */
35c08157
KLC		 5370 off &= ~1;
5371 else
5372 {
5373 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5374 h->got.offset |= 1;
5375 }
5376 }
5377 relocation = sgot->output_section->vma + sgot->output_offset + off
5378 - elf_gp (output_bfd);
5379 }
5380 else
5381 {
fbaf61ad 5382 /* Local symbol */
35c08157
KLC		 5383 bfd_byte *loc;
5384
5385 BFD_ASSERT (local_got_offsets != NULL
5386 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5387
5388 off = local_got_offsets[r_symndx];
5389
5390 /* The offset must always be a multiple of 4. We use
5391 the least significant bit to record whether we have
5392 already processed this entry. */
fbaf61ad 5393 if ((off & 1) != 0) /* clear LSB */
35c08157
KLC		 5394 off &= ~1;
5395 else
5396 {
5397 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5398
0e1862bb 5399 if (bfd_link_pic (info))
35c08157
KLC		 5400 {
5401 asection *srelgot;
5402 Elf_Internal_Rela outrel;
5403
5404 /* We need to generate a R_NDS32_RELATIVE reloc
5405 for the dynamic linker. */
fbaf61ad 5406 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
35c08157
KLC		 5407 BFD_ASSERT (srelgot != NULL);
5408
5409 outrel.r_offset = (elf_gp (output_bfd)
5410 + sgot->output_offset + off);
5411 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5412 outrel.r_addend = relocation;
5413 loc = srelgot->contents;
5414 loc +=
5415 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5416 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5417 ++srelgot->reloc_count;
5418 }
5419 local_got_offsets[r_symndx] |= 1;
5420 }
5421 relocation = sgot->output_section->vma + sgot->output_offset + off
5422 - elf_gp (output_bfd);
5423 }
5424
5425 break;
5426
5427 case R_NDS32_16_RELA:
5428 case R_NDS32_20_RELA:
5429 case R_NDS32_5_RELA:
5430 case R_NDS32_32_RELA:
5431 case R_NDS32_9_PCREL_RELA:
5432 case R_NDS32_WORD_9_PCREL_RELA:
5433 case R_NDS32_10_UPCREL_RELA:
5434 case R_NDS32_15_PCREL_RELA:
5435 case R_NDS32_17_PCREL_RELA:
5436 case R_NDS32_25_PCREL_RELA:
5437 case R_NDS32_HI20_RELA:
5438 case R_NDS32_LO12S3_RELA:
5439 case R_NDS32_LO12S2_RELA:
5440 case R_NDS32_LO12S2_DP_RELA:
5441 case R_NDS32_LO12S2_SP_RELA:
5442 case R_NDS32_LO12S1_RELA:
5443 case R_NDS32_LO12S0_RELA:
5444 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 5445 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC		 5446 && (input_section->flags & SEC_ALLOC) != 0
5447 && (eliminate_gc_relocs == 0
5448 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
5449 && ((r_type != R_NDS32_9_PCREL_RELA
5450 && r_type != R_NDS32_WORD_9_PCREL_RELA
5451 && r_type != R_NDS32_10_UPCREL_RELA
5452 && r_type != R_NDS32_15_PCREL_RELA
5453 && r_type != R_NDS32_17_PCREL_RELA
5454 && r_type != R_NDS32_25_PCREL_RELA
5455 && !(r_type == R_NDS32_32_RELA
5456 && strcmp (input_section->name, ".eh_frame") == 0))
5457 || (h != NULL && h->dynindx != -1
5458 && (!info->symbolic || !h->def_regular))))
5459 {
5460 Elf_Internal_Rela outrel;
0a1b45a2 5461 bool skip, relocate;
35c08157
KLC		 5462 bfd_byte *loc;
5463
5464 /* When generating a shared object, these relocations
5465 are copied into the output file to be resolved at run
5466 time. */
5467
5468 if (sreloc == NULL)
5469 {
5470 const char *name;
5471
5472 name = bfd_elf_string_from_elf_section
5473 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
5474 elf_section_data (input_section)->rela.hdr->sh_name);
5475 if (name == NULL)
0a1b45a2 5476 return false;
35c08157 5477
3f3328b8 5478 BFD_ASSERT (startswith (name, ".rela")
fd361982 5479 && strcmp (bfd_section_name (input_section),
35c08157
KLC		 5480 name + 5) == 0);
5481
5482 sreloc = bfd_get_section_by_name (dynobj, name);
5483 BFD_ASSERT (sreloc != NULL);
5484 }
5485
0a1b45a2
AM		 5486 skip = false;
5487 relocate = false;
35c08157
KLC		 5488
5489 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
5490 info,
5491 input_section,
5492 rel->r_offset);
5493 if (outrel.r_offset == (bfd_vma) - 1)
0a1b45a2 5494 skip = true;
35c08157 5495 else if (outrel.r_offset == (bfd_vma) - 2)
0a1b45a2 5496 skip = true, relocate = true;
35c08157
KLC		 5497 outrel.r_offset += (input_section->output_section->vma
5498 + input_section->output_offset);
5499
5500 if (skip)
5501 memset (&outrel, 0, sizeof outrel);
5502 else if (r_type == R_NDS32_17_PCREL_RELA
5503 || r_type == R_NDS32_15_PCREL_RELA
5504 || r_type == R_NDS32_25_PCREL_RELA)
5505 {
5506 BFD_ASSERT (h != NULL && h->dynindx != -1);
5507 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
5508 outrel.r_addend = rel->r_addend;
5509 }
5510 else
5511 {
5512 /* h->dynindx may be -1 if this symbol was marked to
5513 become local. */
5514 if (h == NULL
5515 || ((info->symbolic || h->dynindx == -1)
fbaf61ad
NC		 5516 && h->def_regular)
5517 || (bfd_link_pie (info) && h->def_regular))
35c08157 5518 {
0a1b45a2 5519 relocate = true;
35c08157
KLC		 5520 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5521 outrel.r_addend = relocation + rel->r_addend;
fbaf61ad
NC		 5522
5523 if (h)
5524 {
5525 h->plt.offset = (bfd_vma) -1; /* cancel PLT trampoline. */
5526
5527 BFD_ASSERT (sgot != NULL);
5528 /* If we did not allocate got entry for the symbol,
5529 we can not fill the nonexistent got entry. */
5530 if (h->got.offset != (bfd_vma) -1
5531 && (h->got.offset & 1) == 0)
5532 {
5533 bfd_put_32 (output_bfd, outrel.r_addend,
5534 sgot->contents + h->got.offset);
5535 }
5536 }
35c08157
KLC		 5537 }
5538 else
5539 {
fbaf61ad
NC		 5540 if (h->dynindx == -1)
5541 {
5542 _bfd_error_handler
acef8081 5543 (_("%pB: relocation %s against `%s' can not be used when "
fbaf61ad
NC		 5544 "making a shared object; recompile with -fPIC"),
5545 input_bfd, nds32_elf_howto_table[r_type].name, h->root.root.string);
5546 bfd_set_error (bfd_error_bad_value);
0a1b45a2 5547 return false;
fbaf61ad
NC		 5548 }
5549
35c08157
KLC		 5550 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
5551 outrel.r_addend = rel->r_addend;
5552 }
5553 }
5554
5555 loc = sreloc->contents;
5556 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
5557 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5558 ++sreloc->reloc_count;
5559
5560 /* If this reloc is against an external symbol, we do
5561 not want to fiddle with the addend. Otherwise, we
5562 need to include the symbol value so that it becomes
5563 an addend for the dynamic reloc. */
5564 if (!relocate)
5565 continue;
5566 }
5567 break;
5568
5569 case R_NDS32_25_ABS_RELA:
0e1862bb 5570 if (bfd_link_pic (info))
35c08157 5571 {
4eca0228 5572 _bfd_error_handler
38f14ab8
AM		 5573 (_("%pB: warning: %s unsupported in shared mode"),
5574 input_bfd, "R_NDS32_25_ABS_RELA");
0a1b45a2 5575 return false;
35c08157
KLC		 5576 }
5577 break;
5578
5579 case R_NDS32_9_PCREL:
5580 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
5581 contents, offset,
5582 sec, relocation, addend);
5583 goto check_reloc;
5584
5585 case R_NDS32_HI20:
fbaf61ad
NC		 5586 /* We allow an arbitrary number of HI20 relocs before the
5587 LO12 reloc. This permits gcc to emit the HI and LO relocs
5588 itself. */
5589 for (lorel = rel + 1;
5590 (lorel < relend
5591 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
5592 continue;
5593 if (lorel < relend
5594 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
5595 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
5596 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
5597 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
35c08157 5598 {
fbaf61ad
NC		 5599 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
5600 contents, relocation + addend);
5601 r = bfd_reloc_ok;
35c08157 5602 }
fbaf61ad
NC		 5603 else
5604 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5605 contents, offset, relocation,
5606 addend);
35c08157
KLC		 5607 goto check_reloc;
5608
5609 case R_NDS32_GOT17S2_RELA:
5610 case R_NDS32_GOT15S2_RELA:
fbaf61ad
NC		 5611 BFD_ASSERT (sgot != NULL);
5612
5613 if (h != NULL)
35c08157 5614 {
0a1b45a2 5615 bool dyn;
35c08157 5616
fbaf61ad
NC		 5617 off = h->got.offset;
5618 BFD_ASSERT (off != (bfd_vma) - 1);
35c08157 5619
fbaf61ad
NC		 5620 dyn = htab->root.dynamic_sections_created;
5621 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
5622 (dyn, bfd_link_pic (info), h)
5623 || (bfd_link_pic (info)
5624 && (info->symbolic
5625 || h->dynindx == -1
5626 || h->forced_local)
5627 && h->def_regular))
35c08157 5628 {
fbaf61ad
NC		 5629 /* This is actually a static link, or it is a
5630 -Bsymbolic link and the symbol is defined
5631 locally, or the symbol was forced to be local
5632 because of a version file. We must initialize
5633 this entry in the global offset table. Since the
5634 offset must always be a multiple of 4, we use the
5635 least significant bit to record whether we have
5636 initialized it already.
5637
5638 When doing a dynamic link, we create a .rela.got
5639 relocation entry to initialize the value. This
5640 is done in the finish_dynamic_symbol routine. */
5641 if ((off & 1) != 0)
5642 off &= ~1;
5643 else
35c08157 5644 {
fbaf61ad
NC		 5645 bfd_put_32 (output_bfd, relocation,
5646 sgot->contents + off);
5647 h->got.offset |= 1;
35c08157
KLC		 5648 }
5649 }
fbaf61ad
NC		 5650 }
5651 else
5652 {
5653 bfd_byte *loc;
35c08157 5654
fbaf61ad
NC		 5655 BFD_ASSERT (local_got_offsets != NULL
5656 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
35c08157 5657
fbaf61ad 5658 off = local_got_offsets[r_symndx];
35c08157 5659
fbaf61ad
NC		 5660 /* The offset must always be a multiple of 4. We use
5661 the least significant bit to record whether we have
5662 already processed this entry. */
5663 if ((off & 1) != 0)
5664 off &= ~1;
5665 else
5666 {
5667 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
5668
5669 if (bfd_link_pic (info))
35c08157 5670 {
fbaf61ad
NC		 5671 asection *srelgot;
5672 Elf_Internal_Rela outrel;
35c08157 5673
fbaf61ad
NC		 5674 /* We need to generate a R_NDS32_RELATIVE reloc
5675 for the dynamic linker. */
5676 srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
5677 BFD_ASSERT (srelgot != NULL);
5678
5679 outrel.r_offset = (elf_gp (output_bfd)
5680 + sgot->output_offset + off);
5681 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5682 outrel.r_addend = relocation;
5683 loc = srelgot->contents;
5684 loc +=
5685 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5686 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5687 ++srelgot->reloc_count;
35c08157 5688 }
fbaf61ad 5689 local_got_offsets[r_symndx] |= 1;
35c08157 5690 }
35c08157 5691 }
fbaf61ad
NC		 5692 relocation = sgot->output_section->vma + sgot->output_offset + off
5693 - elf_gp (output_bfd);
5694
35c08157
KLC		 5695 if (relocation & align)
5696 {
5697 /* Incorrect alignment. */
4eca0228 5698 _bfd_error_handler
38f14ab8 5699 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
0a1b45a2 5700 ret = false;
35c08157
KLC		 5701 r = bfd_reloc_dangerous;
5702 goto check_reloc;
5703 }
5704 break;
5705
5706 case R_NDS32_SDA16S3_RELA:
5707 case R_NDS32_SDA15S3_RELA:
5708 case R_NDS32_SDA15S3:
5709 align = 0x7;
5710 goto handle_sda;
5711
5712 case R_NDS32_SDA17S2_RELA:
5713 case R_NDS32_SDA15S2_RELA:
5714 case R_NDS32_SDA12S2_SP_RELA:
5715 case R_NDS32_SDA12S2_DP_RELA:
5716 case R_NDS32_SDA15S2:
5717 case R_NDS32_SDA_FP7U2_RELA:
5718 align = 0x3;
5719 goto handle_sda;
5720
5721 case R_NDS32_SDA18S1_RELA:
5722 case R_NDS32_SDA15S1_RELA:
5723 case R_NDS32_SDA15S1:
5724 align = 0x1;
5725 goto handle_sda;
5726
5727 case R_NDS32_SDA19S0_RELA:
5728 case R_NDS32_SDA15S0_RELA:
5729 case R_NDS32_SDA15S0:
fbaf61ad 5730 align = 0x0;
dc1e8a47 5731 handle_sda:
fbaf61ad 5732 BFD_ASSERT (sec != NULL);
35c08157 5733
fbaf61ad
NC		 5734 /* If the symbol is in the abs section, the out_bfd will be null.
5735 This happens when the relocation has a symbol@GOTOFF. */
0a1b45a2 5736 r = nds32_elf_final_sda_base (output_bfd, info, &gp, false);
fbaf61ad
NC		 5737 if (r != bfd_reloc_ok)
5738 {
5739 _bfd_error_handler
5740 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
0a1b45a2 5741 ret = false;
fbaf61ad
NC		 5742 goto check_reloc;
5743 }
35c08157 5744
fbaf61ad
NC		 5745 /* At this point `relocation' contains the object's
5746 address. */
5747 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5748 {
5749 relocation -= fpbase_addr;
5750 }
5751 else
5752 relocation -= gp;
5753 /* Now it contains the offset from _SDA_BASE_. */
35c08157 5754
fbaf61ad 5755 /* Make sure alignment is correct. */
35c08157 5756
fbaf61ad
NC		 5757 if (relocation & align)
5758 {
5759 /* Incorrect alignment. */
5760 _bfd_error_handler
5761 /* xgettext:c-format */
5762 (_("%pB(%pA): warning: unaligned small data access"
5763 " of type %d"),
5764 input_bfd, input_section, r_type);
0a1b45a2 5765 ret = false;
fbaf61ad 5766 goto check_reloc;
35c08157 5767 }
35c08157 5768 break;
fbaf61ad 5769
35c08157
KLC		 5770 case R_NDS32_17IFC_PCREL_RELA:
5771 case R_NDS32_10IFCU_PCREL_RELA:
fbaf61ad 5772 /* Do nothing. */
35c08157
KLC		 5773 break;
5774
1c8f6a4d
KLC		 5775 case R_NDS32_TLS_LE_HI20:
5776 case R_NDS32_TLS_LE_LO12:
5777 case R_NDS32_TLS_LE_20:
5778 case R_NDS32_TLS_LE_15S0:
5779 case R_NDS32_TLS_LE_15S1:
5780 case R_NDS32_TLS_LE_15S2:
fbaf61ad
NC		 5781 /* We do not have garbage collection for got entries.
5782 Therefore, IE to LE may have one empty entry, and DESC to
5783 LE may have two. */
1c8f6a4d
KLC		 5784 if (elf_hash_table (info)->tls_sec != NULL)
5785 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5786 break;
fbaf61ad 5787
1c8f6a4d
KLC		 5788 case R_NDS32_TLS_IE_HI20:
5789 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 5790 case R_NDS32_TLS_DESC_HI20:
5791 case R_NDS32_TLS_DESC_LO12:
5792 case R_NDS32_TLS_IE_LO12:
5793 case R_NDS32_TLS_IEGP_HI20:
5794 case R_NDS32_TLS_IEGP_LO12:
5795 case R_NDS32_TLS_IEGP_LO12S2:
1c8f6a4d
KLC		 5796 {
5797 /* Relocation is to the entry for this symbol in the global
5798 offset table. */
fbaf61ad 5799 enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
1c8f6a4d
KLC		 5800 asection *srelgot;
5801 Elf_Internal_Rela outrel;
1c8f6a4d
KLC		 5802 bfd_byte *loc;
5803 int indx = 0;
5804
fbaf61ad
NC		 5805 eff_tls_type = org_tls_type = get_tls_type (r_type, h);
5806
1c8f6a4d
KLC		 5807 BFD_ASSERT (sgot != NULL);
5808 if (h != NULL)
5809 {
0a1b45a2 5810 bool dyn;
1c8f6a4d
KLC		 5811
5812 off = h->got.offset;
fbaf61ad 5813 BFD_ASSERT (off != (bfd_vma) -1);
1c8f6a4d
KLC		 5814 dyn = htab->root.dynamic_sections_created;
5815 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L		 5816 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5817 && (!bfd_link_pic (info)
1c8f6a4d
KLC		 5818 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5819 indx = h->dynindx;
5820 }
5821 else
5822 {
1c8f6a4d
KLC		 5823 BFD_ASSERT (local_got_offsets != NULL
5824 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
1c8f6a4d 5825 off = local_got_offsets[r_symndx];
1c8f6a4d
KLC		 5826 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5827 }
fbaf61ad 5828
1c8f6a4d
KLC		 5829 relocation = sgot->output_section->vma + sgot->output_offset + off;
5830
fbaf61ad
NC		 5831 if (1 < ones32 (tls_type))
5832 {
5833 eff_tls_type = 1 << (fls (tls_type) - 1);
5834 /* TLS model shall be handled in nds32_elf_unify_tls_model (). */
5835
5836 /* TLS model X -> LE is not implement yet!
5837 workaround here! */
5838 if (eff_tls_type == GOT_TLS_LE)
5839 {
5840 eff_tls_type = 1 << (fls (tls_type ^ eff_tls_type) - 1);
5841 }
5842 }
1c8f6a4d
KLC		 5843
5844 /* The offset must always be a multiple of 4. We use
5845 the least significant bit to record whether we have
5846 already processed this entry. */
0a1b45a2 5847 bool need_relocs = false;
fbaf61ad
NC		 5848 srelgot = ehtab->srelgot;
5849 if ((bfd_link_pic (info) || indx != 0)
5850 && (h == NULL || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5851 || h->root.type != bfd_link_hash_undefweak))
5852 {
0a1b45a2 5853 need_relocs = true;
fbaf61ad
NC		 5854 BFD_ASSERT (srelgot != NULL);
5855 }
5856
5857 if (off & 1)
5858 {
5859 off &= ~1;
5860 relocation &= ~1;
5861
5862 if (eff_tls_type & GOT_TLS_DESC)
5863 {
5864 relocation -= elf_gp (output_bfd);
5865 if ((R_NDS32_TLS_DESC_HI20 == r_type) && (!need_relocs))
5866 {
5867 /* TLS model shall be converted. */
5868 BFD_ASSERT(0);
5869 }
5870 }
5871 else if (eff_tls_type & GOT_TLS_IEGP)
5872 {
5873 relocation -= elf_gp (output_bfd);
5874 }
5875 }
1c8f6a4d
KLC		 5876 else
5877 {
fbaf61ad 5878 if ((eff_tls_type & GOT_TLS_LE) && (tls_type ^ eff_tls_type))
1c8f6a4d 5879 {
fbaf61ad
NC		 5880 /* TLS model workaround shall be applied. */
5881 BFD_ASSERT(0);
1c8f6a4d 5882 }
fbaf61ad 5883 else if (eff_tls_type & (GOT_TLS_IE | GOT_TLS_IEGP))
1c8f6a4d 5884 {
fbaf61ad
NC		 5885 if (eff_tls_type & GOT_TLS_IEGP)
5886 relocation -= elf_gp(output_bfd);
5887
1c8f6a4d
KLC		 5888 if (need_relocs)
5889 {
fbaf61ad
NC		 5890 if (indx == 0)
5891 outrel.r_addend = gottpoff (info, relocation_sym);
1c8f6a4d
KLC		 5892 else
5893 outrel.r_addend = 0;
5894 outrel.r_offset = (sgot->output_section->vma
fbaf61ad
NC		 5895 + sgot->output_offset + off);
5896 outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_TPOFF);
5897
5898 elf32_nds32_add_dynreloc (output_bfd, info, srelgot,
5899 &outrel);
1c8f6a4d
KLC		 5900 }
5901 else
fbaf61ad
NC		 5902 {
5903 bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
5904 sgot->contents + off);
5905 }
1c8f6a4d 5906 }
fbaf61ad
NC		 5907 else if (eff_tls_type & GOT_TLS_DESC)
5908 {
5909 relocation -= elf_gp (output_bfd);
5910 if (need_relocs)
5911 {
5912 if (indx == 0)
5913 outrel.r_addend = gottpoff (info, relocation_sym);
5914 else
5915 outrel.r_addend = 0;
5916 outrel.r_offset = (sgot->output_section->vma
5917 + sgot->output_offset + off);
5918 outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_DESC);
5919
5920 if (htab->tls_desc_trampoline)
5921 {
5922 asection *srelplt;
5923 srelplt = ehtab->srelplt;
5924 loc = srelplt->contents;
5925 loc += htab->next_tls_desc_index++ * sizeof (Elf32_External_Rela);
5926 BFD_ASSERT (loc + sizeof (Elf32_External_Rela)
5927 <= srelplt->contents + srelplt->size);
5928
5929 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5930 }
5931 else
5932 {
5933 loc = srelgot->contents;
5934 loc += srelgot->reloc_count * sizeof (Elf32_External_Rela);
5935 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5936 ++srelgot->reloc_count;
5937 }
5938 }
5939 else
5940 {
5941 /* feed me! */
5942 bfd_put_32 (output_bfd, 0xdeadbeef,
5943 sgot->contents + off);
5944 bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
5945 sgot->contents + off + 4);
5946 patch_tls_desc_to_ie (contents, rel, input_bfd);
5947 BFD_ASSERT(0);
5948 }
5949 }
5950 else
5951 {
5952 /* TLS model workaround shall be applied. */
5953 BFD_ASSERT(0);
5954 }
5955
5956 if (h != NULL)
5957 h->got.offset |= 1;
5958 else
5959 local_got_offsets[r_symndx] |= 1;
5960 }
5961 }
5962 break;
5963 /* DON'T fall through. */
5964
5965 default:
5966 /* OLD_NDS32_RELOC. */
5967
5968 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5969 contents, offset, relocation, addend);
5970 goto check_reloc;
5971 }
5972
5973 switch ((int) r_type)
5974 {
35c08157
KLC		 5975 case R_NDS32_20_RELA:
5976 case R_NDS32_5_RELA:
5977 case R_NDS32_9_PCREL_RELA:
5978 case R_NDS32_WORD_9_PCREL_RELA:
5979 case R_NDS32_10_UPCREL_RELA:
5980 case R_NDS32_15_PCREL_RELA:
5981 case R_NDS32_17_PCREL_RELA:
5982 case R_NDS32_25_PCREL_RELA:
5983 case R_NDS32_25_ABS_RELA:
5984 case R_NDS32_HI20_RELA:
5985 case R_NDS32_LO12S3_RELA:
5986 case R_NDS32_LO12S2_RELA:
5987 case R_NDS32_LO12S2_DP_RELA:
5988 case R_NDS32_LO12S2_SP_RELA:
5989 case R_NDS32_LO12S1_RELA:
5990 case R_NDS32_LO12S0_RELA:
5991 case R_NDS32_LO12S0_ORI_RELA:
5992 case R_NDS32_SDA16S3_RELA:
5993 case R_NDS32_SDA17S2_RELA:
5994 case R_NDS32_SDA18S1_RELA:
5995 case R_NDS32_SDA19S0_RELA:
5996 case R_NDS32_SDA15S3_RELA:
5997 case R_NDS32_SDA15S2_RELA:
5998 case R_NDS32_SDA12S2_DP_RELA:
5999 case R_NDS32_SDA12S2_SP_RELA:
6000 case R_NDS32_SDA15S1_RELA:
6001 case R_NDS32_SDA15S0_RELA:
6002 case R_NDS32_SDA_FP7U2_RELA:
6003 case R_NDS32_9_PLTREL:
6004 case R_NDS32_25_PLTREL:
6005 case R_NDS32_GOT20:
6006 case R_NDS32_GOT_HI20:
6007 case R_NDS32_GOT_LO12:
6008 case R_NDS32_GOT_LO15:
6009 case R_NDS32_GOT_LO19:
6010 case R_NDS32_GOT15S2_RELA:
6011 case R_NDS32_GOT17S2_RELA:
6012 case R_NDS32_GOTPC20:
6013 case R_NDS32_GOTPC_HI20:
6014 case R_NDS32_GOTPC_LO12:
6015 case R_NDS32_GOTOFF:
6016 case R_NDS32_GOTOFF_HI20:
6017 case R_NDS32_GOTOFF_LO12:
6018 case R_NDS32_GOTOFF_LO15:
6019 case R_NDS32_GOTOFF_LO19:
6020 case R_NDS32_PLTREL_HI20:
6021 case R_NDS32_PLTREL_LO12:
6022 case R_NDS32_PLT_GOTREL_HI20:
6023 case R_NDS32_PLT_GOTREL_LO12:
6024 case R_NDS32_PLT_GOTREL_LO15:
6025 case R_NDS32_PLT_GOTREL_LO19:
6026 case R_NDS32_PLT_GOTREL_LO20:
6027 case R_NDS32_17IFC_PCREL_RELA:
6028 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC		 6029 case R_NDS32_TLS_LE_HI20:
6030 case R_NDS32_TLS_LE_LO12:
6031 case R_NDS32_TLS_IE_HI20:
6032 case R_NDS32_TLS_IE_LO12S2:
6033 case R_NDS32_TLS_LE_20:
6034 case R_NDS32_TLS_LE_15S0:
6035 case R_NDS32_TLS_LE_15S1:
6036 case R_NDS32_TLS_LE_15S2:
fbaf61ad
NC		 6037 case R_NDS32_TLS_DESC_HI20:
6038 case R_NDS32_TLS_DESC_LO12:
6039 case R_NDS32_TLS_IE_LO12:
6040 case R_NDS32_TLS_IEGP_HI20:
6041 case R_NDS32_TLS_IEGP_LO12:
6042 case R_NDS32_TLS_IEGP_LO12S2:
35c08157 6043 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 6044 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC		 6045 r = nds32_elf_final_link_relocate (howto, input_bfd,
6046 input_section, contents,
6047 rel->r_offset, relocation,
6048 rel->r_addend);
6049 break;
6050
6051 default:
6052 /* All other relocs can use default handler. */
6053 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
6054 contents, rel->r_offset,
6055 relocation, rel->r_addend);
6056 break;
6057 }
6058
dc1e8a47 6059 check_reloc:
35c08157
KLC		 6060
6061 if (r != bfd_reloc_ok)
6062 {
6063 /* FIXME: This should be generic enough to go in a utility. */
6064 const char *name;
6065
6066 if (h != NULL)
6067 name = h->root.root.string;
6068 else
6069 {
6070 name = bfd_elf_string_from_elf_section
6071 (input_bfd, symtab_hdr->sh_link, sym->st_name);
6072 if (name == NULL || *name == '\0')
fd361982 6073 name = bfd_section_name (sec);
35c08157
KLC		 6074 }
6075
6076 if (errmsg != NULL)
6077 goto common_error;
6078
6079 switch (r)
6080 {
6081 case bfd_reloc_overflow:
1a72702b
AM		 6082 (*info->callbacks->reloc_overflow)
6083 (info, (h ? &h->root : NULL), name, howto->name,
6084 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC		 6085 break;
6086
6087 case bfd_reloc_undefined:
1a72702b 6088 (*info->callbacks->undefined_symbol)
0a1b45a2 6089 (info, name, input_bfd, input_section, offset, true);
35c08157
KLC		 6090 break;
6091
6092 case bfd_reloc_outofrange:
6093 errmsg = _("internal error: out of range error");
6094 goto common_error;
6095
6096 case bfd_reloc_notsupported:
6097 errmsg = _("internal error: unsupported relocation error");
6098 goto common_error;
6099
6100 case bfd_reloc_dangerous:
6101 errmsg = _("internal error: dangerous error");
6102 goto common_error;
6103
6104 default:
6105 errmsg = _("internal error: unknown error");
6106 /* Fall through. */
6107
dc1e8a47 6108 common_error:
1a72702b
AM		 6109 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
6110 input_section, offset);
35c08157
KLC		 6111 break;
6112 }
6113 }
6114 }
6115
fbaf61ad
NC		 6116 /* Resotre header size to avoid overflow load. */
6117 if (elf_nds32_tdata (input_bfd)->hdr_size != 0)
6118 symtab_hdr->sh_size = elf_nds32_tdata (input_bfd)->hdr_size;
6119
35c08157
KLC		 6120 return ret;
6121}
6122
6123/* Finish up dynamic symbol handling. We set the contents of various
6124 dynamic sections here. */
6125
0a1b45a2 6126static bool
35c08157
KLC		 6127nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
6128 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
6129{
fbaf61ad
NC		 6130 struct elf_link_hash_table *ehtab;
6131 struct elf_nds32_link_hash_entry *hent;
35c08157
KLC		 6132 bfd_byte *loc;
6133
fbaf61ad
NC		 6134 ehtab = elf_hash_table (info);
6135 hent = (struct elf_nds32_link_hash_entry *) h;
35c08157
KLC		 6136
6137 if (h->plt.offset != (bfd_vma) - 1)
6138 {
6139 asection *splt;
6140 asection *sgot;
6141 asection *srela;
6142
6143 bfd_vma plt_index;
6144 bfd_vma got_offset;
6145 bfd_vma local_plt_offset;
6146 Elf_Internal_Rela rela;
6147
6148 /* This symbol has an entry in the procedure linkage table. Set
6149 it up. */
6150
6151 BFD_ASSERT (h->dynindx != -1);
6152
fbaf61ad
NC		 6153 splt = ehtab->splt;
6154 sgot = ehtab->sgotplt;
6155 srela = ehtab->srelplt;
35c08157
KLC		 6156 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
6157
6158 /* Get the index in the procedure linkage table which
6159 corresponds to this symbol. This is the index of this symbol
6160 in all the symbols for which we are making plt entries. The
6161 first entry in the procedure linkage table is reserved. */
6162 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
6163
6164 /* Get the offset into the .got table of the entry that
6165 corresponds to this function. Each .got entry is 4 bytes.
6166 The first three are reserved. */
6167 got_offset = (plt_index + 3) * 4;
6168
6169 /* Fill in the entry in the procedure linkage table. */
0e1862bb 6170 if (!bfd_link_pic (info))
35c08157
KLC		 6171 {
6172 unsigned long insn;
6173
6174 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
6175 + sgot->output_offset + got_offset) >> 12)
6176 & 0xfffff);
6177 bfd_putb32 (insn, splt->contents + h->plt.offset);
6178
6179 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
6180 + sgot->output_offset + got_offset) & 0x0fff)
6181 >> 2);
6182 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
6183
6184 insn = PLT_ENTRY_WORD2;
6185 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
6186
6187 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
6188 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
6189
6190 insn = PLT_ENTRY_WORD4
6191 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
6192 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
6193 local_plt_offset = 12;
6194 }
6195 else
6196 {
6197 /* sda_base must be set at this time. */
6198 unsigned long insn;
6199 long offset;
6200
35c08157
KLC		 6201 offset = sgot->output_section->vma + sgot->output_offset + got_offset
6202 - elf_gp (output_bfd);
6203 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
6204 bfd_putb32 (insn, splt->contents + h->plt.offset);
6205
6206 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
6207 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
6208
6209 insn = PLT_PIC_ENTRY_WORD2;
6210 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
6211
6212 insn = PLT_PIC_ENTRY_WORD3;
6213 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
6214
6215 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
6216 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
6217
6218 insn = PLT_PIC_ENTRY_WORD5
6219 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
6220 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
6221
6222 local_plt_offset = 16;
6223 }
6224
6225 /* Fill in the entry in the global offset table,
6226 so it will fall through to the next instruction for the first time. */
6227 bfd_put_32 (output_bfd,
6228 (splt->output_section->vma + splt->output_offset
6229 + h->plt.offset + local_plt_offset),
6230 sgot->contents + got_offset);
6231
6232 /* Fill in the entry in the .rela.plt section. */
6233 rela.r_offset = (sgot->output_section->vma
6234 + sgot->output_offset + got_offset);
6235 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
6236 rela.r_addend = 0;
6237 loc = srela->contents;
6238 loc += plt_index * sizeof (Elf32_External_Rela);
6239 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
6240
6241 if (!h->def_regular)
6242 {
6243 /* Mark the symbol as undefined, rather than as defined in
6244 the .plt section. Leave the value alone. */
6245 sym->st_shndx = SHN_UNDEF;
6246 if (!h->ref_regular_nonweak)
6247 sym->st_value = 0;
6248 }
6249 }
6250
fbaf61ad
NC		 6251 if (h->got.offset != (bfd_vma) - 1
6252 && hent->tls_type == GOT_NORMAL)
35c08157
KLC		 6253 {
6254 asection *sgot;
fbaf61ad 6255 asection *srelagot;
35c08157
KLC		 6256 Elf_Internal_Rela rela;
6257
6258 /* This symbol has an entry in the global offset table.
6259 Set it up. */
6260
fbaf61ad
NC		 6261 sgot = ehtab->sgot;
6262 srelagot = ehtab->srelgot;
6263 BFD_ASSERT (sgot != NULL && srelagot != NULL);
35c08157
KLC		 6264
6265 rela.r_offset = (sgot->output_section->vma
6266 + sgot->output_offset + (h->got.offset & ~1));
6267
6268 /* If this is a -Bsymbolic link, and the symbol is defined
6269 locally, we just want to emit a RELATIVE reloc. Likewise if
6270 the symbol was forced to be local because of a version file.
6271 The entry in the global offset table will already have been
6272 initialized in the relocate_section function. */
fbaf61ad
NC		 6273 if ((bfd_link_pic (info)
6274 && (info->symbolic || h->dynindx == -1 || h->forced_local)
6275 && h->def_regular)
6276 || (bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 6277 {
6278 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
6279 rela.r_addend = (h->root.u.def.value
6280 + h->root.u.def.section->output_section->vma
6281 + h->root.u.def.section->output_offset);
fbaf61ad
NC		 6282
6283 if ((h->got.offset & 1) == 0)
6284 {
6285 bfd_put_32 (output_bfd, rela.r_addend,
6286 sgot->contents + h->got.offset);
6287 }
35c08157
KLC		 6288 }
6289 else
6290 {
6291 BFD_ASSERT ((h->got.offset & 1) == 0);
6292 bfd_put_32 (output_bfd, (bfd_vma) 0,
6293 sgot->contents + h->got.offset);
6294 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
6295 rela.r_addend = 0;
6296 }
6297
fbaf61ad
NC		 6298 loc = srelagot->contents;
6299 loc += srelagot->reloc_count * sizeof (Elf32_External_Rela);
35c08157 6300 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
fbaf61ad
NC		 6301 ++srelagot->reloc_count;
6302 BFD_ASSERT (loc < (srelagot->contents + srelagot->size));
35c08157
KLC		 6303 }
6304
6305 if (h->needs_copy)
6306 {
6307 asection *s;
6308 Elf_Internal_Rela rela;
6309
6310 /* This symbols needs a copy reloc. Set it up. */
6311
6312 BFD_ASSERT (h->dynindx != -1
6313 && (h->root.type == bfd_link_hash_defined
6314 || h->root.type == bfd_link_hash_defweak));
6315
6316 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
6317 BFD_ASSERT (s != NULL);
6318
6319 rela.r_offset = (h->root.u.def.value
6320 + h->root.u.def.section->output_section->vma
6321 + h->root.u.def.section->output_offset);
6322 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
6323 rela.r_addend = 0;
6324 loc = s->contents;
6325 loc += s->reloc_count * sizeof (Elf32_External_Rela);
6326 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
6327 ++s->reloc_count;
6328 }
6329
6330 /* Mark some specially defined symbols as absolute. */
6331 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
6332 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
6333 sym->st_shndx = SHN_ABS;
6334
0a1b45a2 6335 return true;
35c08157
KLC		 6336}
6337
6338
6339/* Finish up the dynamic sections. */
6340
0a1b45a2 6341static bool
35c08157
KLC		 6342nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
6343{
35c08157
KLC		 6344 bfd *dynobj;
6345 asection *sdyn;
fbaf61ad
NC		 6346 asection *sgotplt;
6347 struct elf_link_hash_table *ehtab;
6348 struct elf_nds32_link_hash_table *htab;
35c08157 6349
fbaf61ad 6350 ehtab = elf_hash_table (info);
35c08157 6351 htab = nds32_elf_hash_table (info);
fbaf61ad 6352 if (htab == NULL)
0a1b45a2 6353 return false;
fbaf61ad
NC		 6354
6355 dynobj = elf_hash_table (info)->dynobj;
35c08157 6356
fbaf61ad
NC		 6357 sgotplt = ehtab->sgotplt;
6358 /* A broken linker script might have discarded the dynamic sections.
6359 Catch this here so that we do not seg-fault later on. */
6360 if (sgotplt != NULL && bfd_is_abs_section (sgotplt->output_section))
0a1b45a2 6361 return false;
35c08157
KLC		 6362 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
6363
fbaf61ad 6364 if (elf_hash_table (info)->dynamic_sections_created)
35c08157
KLC		 6365 {
6366 asection *splt;
6367 Elf32_External_Dyn *dyncon, *dynconend;
6368
fbaf61ad 6369 BFD_ASSERT (sgotplt != NULL && sdyn != NULL);
35c08157
KLC		 6370
6371 dyncon = (Elf32_External_Dyn *) sdyn->contents;
6372 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
6373
6374 for (; dyncon < dynconend; dyncon++)
6375 {
6376 Elf_Internal_Dyn dyn;
6377 asection *s;
6378
6379 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
6380
6381 switch (dyn.d_tag)
6382 {
6383 default:
6384 break;
6385
6386 case DT_PLTGOT:
fbaf61ad 6387 /* name = ".got"; */
fb9b7fbf 6388 s = ehtab->sgot;
35c08157
KLC		 6389 goto get_vma;
6390 case DT_JMPREL:
fb9b7fbf 6391 s = ehtab->srelplt;
dc1e8a47 6392 get_vma:
fbaf61ad 6393 BFD_ASSERT (s != NULL);
fb9b7fbf 6394 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC		 6395 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6396 break;
6397
6398 case DT_PLTRELSZ:
fb9b7fbf 6399 s = ehtab->srelplt;
fbaf61ad 6400 BFD_ASSERT (s != NULL);
35c08157
KLC		 6401 dyn.d_un.d_val = s->size;
6402 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6403 break;
fbaf61ad
NC		 6404
6405 case DT_RELASZ:
6406 /* My reading of the SVR4 ABI indicates that the
6407 procedure linkage table relocs (DT_JMPREL) should be
6408 included in the overall relocs (DT_RELA). This is
6409 what Solaris does. However, UnixWare can not handle
6410 that case. Therefore, we override the DT_RELASZ entry
6411 here to make it not include the JMPREL relocs. Since
6412 the linker script arranges for .rela.plt to follow all
6413 other relocation sections, we don't have to worry
6414 about changing the DT_RELA entry. */
6415 if (ehtab->srelplt != NULL)
6416 {
fb9b7fbf 6417 s = ehtab->srelplt;
fbaf61ad
NC		 6418 dyn.d_un.d_val -= s->size;
6419 }
6420 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6421 break;
6422
6423 case DT_TLSDESC_PLT:
6424 s = htab->root.splt;
6425 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
9bcc30e4 6426 + htab->root.tlsdesc_plt);
fbaf61ad
NC		 6427 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6428 break;
6429
6430 case DT_TLSDESC_GOT:
6431 s = htab->root.sgot;
6432 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
9bcc30e4 6433 + htab->root.tlsdesc_got);
fbaf61ad
NC		 6434 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
6435 break;
35c08157
KLC		 6436 }
6437 }
6438
6439 /* Fill in the first entry in the procedure linkage table. */
fbaf61ad 6440 splt = ehtab->splt;
35c08157
KLC		 6441 if (splt && splt->size > 0)
6442 {
0e1862bb 6443 if (bfd_link_pic (info))
35c08157
KLC		 6444 {
6445 unsigned long insn;
6446 long offset;
6447
fbaf61ad
NC		 6448 offset = sgotplt->output_section->vma + sgotplt->output_offset + 4
6449 - elf_gp (output_bfd);
35c08157
KLC		 6450 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
6451 bfd_putb32 (insn, splt->contents);
6452
35c08157
KLC		 6453 /* here has a typo? */
6454 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
6455 bfd_putb32 (insn, splt->contents + 4);
6456
6457 insn = PLT0_PIC_ENTRY_WORD2;
6458 bfd_putb32 (insn, splt->contents + 8);
6459
6460 insn = PLT0_PIC_ENTRY_WORD3;
6461 bfd_putb32 (insn, splt->contents + 12);
6462
6463 insn = PLT0_PIC_ENTRY_WORD4;
6464 bfd_putb32 (insn, splt->contents + 16);
6465
6466 insn = PLT0_PIC_ENTRY_WORD5;
6467 bfd_putb32 (insn, splt->contents + 20);
6468 }
6469 else
6470 {
6471 unsigned long insn;
6472 unsigned long addr;
6473
6474 /* addr = .got + 4 */
fbaf61ad 6475 addr = sgotplt->output_section->vma + sgotplt->output_offset + 4;
35c08157
KLC		 6476 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
6477 bfd_putb32 (insn, splt->contents);
6478
6479 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
6480 bfd_putb32 (insn, splt->contents + 4);
6481
6482 insn = PLT0_ENTRY_WORD2;
6483 bfd_putb32 (insn, splt->contents + 8);
6484
6485 insn = PLT0_ENTRY_WORD3;
6486 bfd_putb32 (insn, splt->contents + 12);
6487
6488 insn = PLT0_ENTRY_WORD4;
6489 bfd_putb32 (insn, splt->contents + 16);
6490 }
6491
6492 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
6493 PLT_ENTRY_SIZE;
6494 }
fbaf61ad 6495
9bcc30e4 6496 if (htab->root.tlsdesc_plt)
fbaf61ad
NC		 6497 {
6498 /* Calculate addresses. */
6499 asection *sgot = sgot = ehtab->sgot;
6500 bfd_vma pltgot = sgotplt->output_section->vma
6501 + sgotplt->output_offset;
6502 bfd_vma tlsdesc_got = sgot->output_section->vma + sgot->output_offset
9bcc30e4 6503 + htab->root.tlsdesc_got;
fbaf61ad
NC		 6504
6505 /* Get GP offset. */
6506 pltgot -= elf_gp (output_bfd) - 4; /* PLTGOT[1] */
6507 tlsdesc_got -= elf_gp (output_bfd);
6508
6509 /* Do relocation. */
6510 dl_tlsdesc_lazy_trampoline[0] += ((1 << 20) - 1) & (tlsdesc_got >> 12);
6511 dl_tlsdesc_lazy_trampoline[1] += 0xfff & tlsdesc_got;
6512 dl_tlsdesc_lazy_trampoline[4] += ((1 << 20) - 1) & (pltgot >> 12);
6513 dl_tlsdesc_lazy_trampoline[5] += 0xfff & pltgot;
6514
6515 /* Insert .plt. */
9bcc30e4 6516 nds32_put_trampoline (splt->contents + htab->root.tlsdesc_plt,
fbaf61ad
NC		 6517 dl_tlsdesc_lazy_trampoline,
6518 ARRAY_SIZE (dl_tlsdesc_lazy_trampoline));
6519 }
35c08157
KLC		 6520 }
6521
6522 /* Fill in the first three entries in the global offset table. */
fbaf61ad 6523 if (sgotplt && sgotplt->size > 0)
35c08157
KLC		 6524 {
6525 if (sdyn == NULL)
fbaf61ad 6526 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents);
35c08157
KLC		 6527 else
6528 bfd_put_32 (output_bfd,
6529 sdyn->output_section->vma + sdyn->output_offset,
fbaf61ad
NC		 6530 sgotplt->contents);
6531 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 4);
6532 bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 8);
35c08157 6533
fbaf61ad 6534 elf_section_data (sgotplt->output_section)->this_hdr.sh_entsize = 4;
35c08157
KLC		 6535 }
6536
0a1b45a2 6537 return true;
35c08157
KLC		 6538}
6539\f
6540
6541/* Set the right machine number. */
6542
0a1b45a2 6543static bool
35c08157
KLC		 6544nds32_elf_object_p (bfd *abfd)
6545{
6546 static unsigned int cur_arch = 0;
6547
6548 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
6549 {
6550 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
6551 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
6552 }
6553
6554 switch (cur_arch)
6555 {
6556 default:
6557 case E_N1_ARCH:
6558 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
6559 break;
6560 case E_N1H_ARCH:
6561 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
6562 break;
6563 case E_NDS_ARCH_STAR_V2_0:
6564 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
6565 break;
6566 case E_NDS_ARCH_STAR_V3_0:
6567 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
6568 break;
6569 case E_NDS_ARCH_STAR_V3_M:
6570 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
6571 break;
6572 }
6573
0a1b45a2 6574 return true;
35c08157
KLC		 6575}
6576
6577/* Store the machine number in the flags field. */
6578
0a1b45a2 6579static bool
cc364be6 6580nds32_elf_final_write_processing (bfd *abfd)
35c08157
KLC		 6581{
6582 unsigned long val;
6583 static unsigned int cur_mach = 0;
6584
6585 if (bfd_mach_n1 != bfd_get_mach (abfd))
6586 {
6587 cur_mach = bfd_get_mach (abfd);
6588 }
6589
6590 switch (cur_mach)
6591 {
6592 case bfd_mach_n1:
6593 /* Only happen when object is empty, since the case is abandon. */
6594 val = E_N1_ARCH;
6595 val |= E_NDS_ABI_AABI;
6596 val |= E_NDS32_ELF_VER_1_4;
6597 break;
6598 case bfd_mach_n1h:
6599 val = E_N1H_ARCH;
6600 break;
6601 case bfd_mach_n1h_v2:
6602 val = E_NDS_ARCH_STAR_V2_0;
6603 break;
6604 case bfd_mach_n1h_v3:
6605 val = E_NDS_ARCH_STAR_V3_0;
6606 break;
6607 case bfd_mach_n1h_v3m:
6608 val = E_NDS_ARCH_STAR_V3_M;
6609 break;
6610 default:
6611 val = 0;
6612 break;
6613 }
6614
6615 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
6616 elf_elfheader (abfd)->e_flags |= val;
cc364be6 6617 return _bfd_elf_final_write_processing (abfd);
35c08157
KLC		 6618}
6619
6620/* Function to keep NDS32 specific file flags. */
6621
0a1b45a2 6622static bool
35c08157
KLC		 6623nds32_elf_set_private_flags (bfd *abfd, flagword flags)
6624{
6625 BFD_ASSERT (!elf_flags_init (abfd)
6626 || elf_elfheader (abfd)->e_flags == flags);
6627
6628 elf_elfheader (abfd)->e_flags = flags;
0a1b45a2
AM		 6629 elf_flags_init (abfd) = true;
6630 return true;
35c08157
KLC		 6631}
6632
6633static unsigned int
6634convert_e_flags (unsigned int e_flags, unsigned int arch)
6635{
6636 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
6637 {
6638 /* From 0.9 to 1.0. */
6639 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
6640
6641 /* Invert E_NDS32_HAS_NO_MAC_INST. */
6642 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
6643 if (arch == E_NDS_ARCH_STAR_V1_0)
6644 {
6645 /* Done. */
6646 return e_flags;
6647 }
6648 }
6649
6650 /* From 1.0 to 2.0. */
6651 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
6652
6653 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
6654 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
6655
6656 /* Invert E_NDS32_HAS_NO_MAC_INST. */
6657 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
6658 return e_flags;
6659}
6660
0a1b45a2 6661static bool
35c08157
KLC		 6662nds32_check_vec_size (bfd *ibfd)
6663{
6664 static unsigned int nds32_vec_size = 0;
6665
6666 asection *sec_t = NULL;
6667 bfd_byte *contents = NULL;
6668
6669 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
6670
6671 if (sec_t && sec_t->size >= 4)
6672 {
6673 /* Get vec_size in file. */
6674 unsigned int flag_t;
6675
0a1b45a2 6676 nds32_get_section_contents (ibfd, sec_t, &contents, true);
35c08157
KLC		 6677 flag_t = bfd_get_32 (ibfd, contents);
6678
6679 /* The value could only be 4 or 16. */
6680
6681 if (!nds32_vec_size)
6682 /* Set if not set yet. */
6683 nds32_vec_size = (flag_t & 0x3);
6684 else if (nds32_vec_size != (flag_t & 0x3))
6685 {
4eca0228 6686 _bfd_error_handler
695344c0 6687 /* xgettext:c-format */
871b3ab2 6688 (_("%pB: ISR vector size mismatch"
4eca0228
AM		 6689 " with previous modules, previous %u-byte, current %u-byte"),
6690 ibfd,
6691 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
6692 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
0a1b45a2 6693 return false;
35c08157
KLC		 6694 }
6695 else
6696 /* Only keep the first vec_size section. */
6697 sec_t->flags |= SEC_EXCLUDE;
6698 }
6699
0a1b45a2 6700 return true;
35c08157
KLC		 6701}
6702
6703/* Merge backend specific data from an object file to the output
6704 object file when linking. */
6705
0a1b45a2 6706static bool
50e03d47 6707nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 6708{
50e03d47 6709 bfd *obfd = info->output_bfd;
35c08157
KLC		 6710 flagword out_flags;
6711 flagword in_flags;
6712 flagword out_16regs;
6713 flagword in_no_mac;
6714 flagword out_no_mac;
6715 flagword in_16regs;
6716 flagword out_version;
6717 flagword in_version;
6718 flagword out_fpu_config;
6719 flagword in_fpu_config;
6720
6b728d32
AM		 6721 /* FIXME: What should be checked when linking shared libraries? */
6722 if ((ibfd->flags & DYNAMIC) != 0)
0a1b45a2 6723 return true;
6b728d32 6724
35c08157
KLC		 6725 /* TODO: Revise to use object-attributes instead. */
6726 if (!nds32_check_vec_size (ibfd))
0a1b45a2 6727 return false;
35c08157
KLC		 6728
6729 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6730 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
0a1b45a2 6731 return true;
35c08157
KLC		 6732
6733 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
6734 {
4eca0228 6735 _bfd_error_handler
38f14ab8 6736 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC		 6737
6738 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6739 return false;
35c08157
KLC		 6740 }
6741
fbaf61ad
NC		 6742 /* -B option in objcopy cannot work as expected. e_flags = 0 shall be
6743 treat as generic one without checking and merging. */
6744 if (elf_elfheader (ibfd)->e_flags)
35c08157 6745 {
fbaf61ad
NC		 6746 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
6747 if (in_version == E_NDS32_ELF_VER_1_2)
35c08157 6748 {
fbaf61ad
NC		 6749 _bfd_error_handler
6750 (_("%pB: warning: older version of object file encountered, "
6751 "please recompile with current tool chain"), ibfd);
35c08157 6752 }
35c08157 6753
fbaf61ad
NC		 6754 /* We may need to merge V1 and V2 arch object files to V2. */
6755 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6756 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
35c08157 6757 {
fbaf61ad
NC		 6758 /* Need to convert version. */
6759 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6760 == E_NDS_ARCH_STAR_RESERVED)
6761 {
6762 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
6763 }
6764 else if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6765 == E_NDS_ARCH_STAR_V3_M
6766 && (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
6767 == E_NDS_ARCH_STAR_V3_0)
6768 {
6769 elf_elfheader (ibfd)->e_flags =
6770 (elf_elfheader (ibfd)->e_flags & (~EF_NDS_ARCH))
6771 | E_NDS_ARCH_STAR_V3_0;
6772 }
6773 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
6774 == E_NDS_ARCH_STAR_V0_9
6775 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
6776 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
6777 {
6778 elf_elfheader (obfd)->e_flags =
6779 convert_e_flags (elf_elfheader (obfd)->e_flags,
6780 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
6781 }
6782 else
6783 {
6784 elf_elfheader (ibfd)->e_flags =
6785 convert_e_flags (elf_elfheader (ibfd)->e_flags,
6786 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
6787 }
35c08157
KLC		 6788 }
6789
fbaf61ad
NC		 6790 /* Extract some flags. */
6791 in_flags = elf_elfheader (ibfd)->e_flags
6792 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6793 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6794
6795 /* The following flags need special treatment. */
6796 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6797 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6798 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
6799
6800 /* Extract some flags. */
6801 out_flags = elf_elfheader (obfd)->e_flags
6802 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
6803 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
6804
6805 /* The following flags need special treatment. */
6806 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
6807 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
6808 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
6809 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
6810 if (!elf_flags_init (obfd))
6811 {
6812 /* If the input is the default architecture then do not
6813 bother setting the flags for the output architecture,
6814 instead allow future merges to do this. If no future
6815 merges ever set these flags then they will retain their
6816 unitialised values, which surprise surprise, correspond
6817 to the default values. */
6818 if (bfd_get_arch_info (ibfd)->the_default)
0a1b45a2 6819 return true;
fbaf61ad 6820
0a1b45a2 6821 elf_flags_init (obfd) = true;
fbaf61ad 6822 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
35c08157 6823
fbaf61ad
NC		 6824 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6825 && bfd_get_arch_info (obfd)->the_default)
6826 {
6827 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
6828 bfd_get_mach (ibfd));
6829 }
35c08157 6830
0a1b45a2 6831 return true;
fbaf61ad 6832 }
35c08157 6833
fbaf61ad
NC		 6834 /* Check flag compatibility. */
6835 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
35c08157 6836 {
4eca0228 6837 _bfd_error_handler
fbaf61ad 6838 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157 6839 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6840 return false;
35c08157 6841 }
35c08157 6842
fbaf61ad
NC		 6843 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
6844 {
6845 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
6846 {
6847 _bfd_error_handler
6848 (_("%pB: error: instruction set mismatch with previous modules"),
6849 ibfd);
6850
6851 bfd_set_error (bfd_error_bad_value);
0a1b45a2 6852 return false;
fbaf61ad
NC		 6853 }
6854 }
6855
6856 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
6857 and perf ext1 and DIV are mergerd to perf ext1. */
6858 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
6859 {
6860 elf_elfheader (obfd)->e_flags =
6861 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6862 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6863 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6864 ? E_NDS32_HAS_EXT_INST : 0)
6865 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
6866 ? E_NDS32_HAS_EXT_INST : 0)
6867 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6868 | ((in_version > out_version) ? out_version : in_version);
6869 }
6870 else
6871 {
6872 if (in_version != out_version)
6873 _bfd_error_handler
6874 /* xgettext:c-format */
6875 (_("%pB: warning: incompatible elf-versions %s and %s"),
6876 ibfd, nds32_elfver_strtab[out_version],
6877 nds32_elfver_strtab[in_version]);
35c08157 6878
fbaf61ad
NC		 6879 elf_elfheader (obfd)->e_flags = in_flags | out_flags
6880 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
6881 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
6882 | (in_version > out_version ? out_version : in_version);
6883 }
35c08157
KLC		 6884 }
6885
0a1b45a2 6886 return true;
35c08157
KLC		 6887}
6888
6889/* Display the flags field. */
6890
0a1b45a2 6891static bool
35c08157
KLC		 6892nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6893{
6894 FILE *file = (FILE *) ptr;
6895
6896 BFD_ASSERT (abfd != NULL && ptr != NULL);
6897
6898 _bfd_elf_print_private_bfd_data (abfd, ptr);
6899
6900 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6901
6902 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6903 {
6904 default:
6905 case E_N1_ARCH:
6906 fprintf (file, _(": n1 instructions"));
6907 break;
6908 case E_N1H_ARCH:
6909 fprintf (file, _(": n1h instructions"));
6910 break;
6911 }
6912
6913 fputc ('\n', file);
6914
0a1b45a2 6915 return true;
35c08157
KLC		 6916}
6917
6918static unsigned int
6919nds32_elf_action_discarded (asection *sec)
6920{
6921
3f3328b8 6922 if (startswith (sec->name, ".gcc_except_table"))
35c08157
KLC		 6923 return 0;
6924
6925 return _bfd_elf_default_action_discarded (sec);
6926}
6927
6928static asection *
6929nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6930 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6931 Elf_Internal_Sym *sym)
6932{
6933 if (h != NULL)
6934 switch (ELF32_R_TYPE (rel->r_info))
6935 {
6936 case R_NDS32_GNU_VTINHERIT:
6937 case R_NDS32_GNU_VTENTRY:
6938 case R_NDS32_RELA_GNU_VTINHERIT:
6939 case R_NDS32_RELA_GNU_VTENTRY:
6940 return NULL;
6941 }
6942
6943 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6944}
6945
fbaf61ad
NC		 6946static enum elf_nds32_tls_type
6947get_tls_type (enum elf_nds32_reloc_type r_type,
6948 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
6949{
6950 enum elf_nds32_tls_type tls_type;
6951
6952 switch (r_type)
6953 {
6954 case R_NDS32_TLS_LE_HI20:
6955 case R_NDS32_TLS_LE_LO12:
6956 tls_type = GOT_TLS_LE;
6957 break;
6958 case R_NDS32_TLS_IE_HI20:
6959 case R_NDS32_TLS_IE_LO12S2:
6960 case R_NDS32_TLS_IE_LO12:
6961 tls_type = GOT_TLS_IE;
6962 break;
6963 case R_NDS32_TLS_IEGP_HI20:
6964 case R_NDS32_TLS_IEGP_LO12:
6965 case R_NDS32_TLS_IEGP_LO12S2:
6966 tls_type = GOT_TLS_IEGP;
6967 break;
6968 case R_NDS32_TLS_DESC_HI20:
6969 case R_NDS32_TLS_DESC_LO12:
6970 case R_NDS32_TLS_DESC_ADD:
6971 case R_NDS32_TLS_DESC_FUNC:
6972 case R_NDS32_TLS_DESC_CALL:
6973 tls_type = GOT_TLS_DESC;
6974 break;
6975 default:
6976 tls_type = GOT_NORMAL;
6977 break;
6978 }
6979
6980 return tls_type;
6981}
6982
6983/* Ensure that we have allocated bookkeeping structures for ABFD's local
6984 symbols. */
6985
0a1b45a2 6986static bool
fbaf61ad
NC		 6987elf32_nds32_allocate_local_sym_info (bfd *abfd)
6988{
6989 if (elf_local_got_refcounts (abfd) == NULL)
6990 {
6991 bfd_size_type num_syms;
6992 bfd_size_type size;
6993 char *data;
6994
6995 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
6996 /* This space is for got_refcounts, got_tls_type, tlsdesc_gotent, and
6997 gp_offset. The details can refer to struct elf_nds32_obj_tdata. */
6998 size = num_syms * (sizeof (bfd_signed_vma) + sizeof (char)
6999 + sizeof (bfd_vma) + sizeof (int)
0a1b45a2 7000 + sizeof (bool) + sizeof (bfd_vma));
fbaf61ad
NC		 7001 data = bfd_zalloc (abfd, size);
7002 if (data == NULL)
0a1b45a2 7003 return false;
fbaf61ad
NC		 7004
7005 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
7006 data += num_syms * sizeof (bfd_signed_vma);
7007
7008 elf32_nds32_local_got_tls_type (abfd) = (char *) data;
7009 data += num_syms * sizeof (char);
7010
7011 elf32_nds32_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
7012 data += num_syms * sizeof (bfd_vma);
7013
7014 elf32_nds32_local_gp_offset (abfd) = (int *) data;
7015 data += num_syms * sizeof (int);
7016 }
7017
0a1b45a2 7018 return true;
fbaf61ad
NC		 7019}
7020
35c08157
KLC		 7021/* Look through the relocs for a section during the first phase.
7022 Since we don't do .gots or .plts, we just need to consider the
7023 virtual table relocs for gc. */
7024
0a1b45a2 7025static bool
35c08157
KLC		 7026nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
7027 asection *sec, const Elf_Internal_Rela *relocs)
7028{
7029 Elf_Internal_Shdr *symtab_hdr;
9bc8e54b 7030 struct elf_link_hash_entry **sym_hashes;
35c08157
KLC		 7031 const Elf_Internal_Rela *rel;
7032 const Elf_Internal_Rela *rel_end;
fbaf61ad 7033 struct elf_link_hash_table *ehtab;
35c08157
KLC		 7034 struct elf_nds32_link_hash_table *htab;
7035 bfd *dynobj;
7036 asection *sreloc = NULL;
7037
fbaf61ad 7038 /* No need for relocation if relocatable already. */
0e1862bb 7039 if (bfd_link_relocatable (info))
fbaf61ad
NC		 7040 {
7041 elf32_nds32_check_relax_group (abfd, sec);
0a1b45a2 7042 return true;
fbaf61ad 7043 }
35c08157
KLC		 7044
7045 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7046 sym_hashes = elf_sym_hashes (abfd);
35c08157 7047
fbaf61ad 7048 ehtab = elf_hash_table (info);
35c08157
KLC		 7049 htab = nds32_elf_hash_table (info);
7050 dynobj = htab->root.dynobj;
7051
7052 rel_end = relocs + sec->reloc_count;
7053 for (rel = relocs; rel < rel_end; rel++)
7054 {
7055 enum elf_nds32_reloc_type r_type;
7056 struct elf_link_hash_entry *h;
7057 unsigned long r_symndx;
fbaf61ad 7058 enum elf_nds32_tls_type tls_type, old_tls_type;
35c08157
KLC		 7059
7060 r_symndx = ELF32_R_SYM (rel->r_info);
7061 r_type = ELF32_R_TYPE (rel->r_info);
7062 if (r_symndx < symtab_hdr->sh_info)
7063 h = NULL;
7064 else
7065 {
7066 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7067 while (h->root.type == bfd_link_hash_indirect
7068 || h->root.type == bfd_link_hash_warning)
7069 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7070 }
7071
fbaf61ad
NC		 7072 /* Create .got section if necessary.
7073 Some relocs require a global offset table. We create
7074 got section here, since these relocation need a got section
7075 and if it is not created yet. */
7076 if (ehtab->sgot == NULL)
35c08157
KLC		 7077 {
7078 switch (r_type)
7079 {
7080 case R_NDS32_GOT_HI20:
7081 case R_NDS32_GOT_LO12:
7082 case R_NDS32_GOT_LO15:
7083 case R_NDS32_GOT_LO19:
7084 case R_NDS32_GOT17S2_RELA:
7085 case R_NDS32_GOT15S2_RELA:
7086 case R_NDS32_GOTOFF:
7087 case R_NDS32_GOTOFF_HI20:
7088 case R_NDS32_GOTOFF_LO12:
7089 case R_NDS32_GOTOFF_LO15:
7090 case R_NDS32_GOTOFF_LO19:
7091 case R_NDS32_GOTPC20:
7092 case R_NDS32_GOTPC_HI20:
7093 case R_NDS32_GOTPC_LO12:
7094 case R_NDS32_GOT20:
1c8f6a4d 7095 case R_NDS32_TLS_IE_HI20:
fbaf61ad 7096 case R_NDS32_TLS_IE_LO12:
1c8f6a4d 7097 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 7098 case R_NDS32_TLS_IEGP_HI20:
7099 case R_NDS32_TLS_IEGP_LO12:
7100 case R_NDS32_TLS_IEGP_LO12S2:
7101 case R_NDS32_TLS_DESC_HI20:
7102 case R_NDS32_TLS_DESC_LO12:
35c08157
KLC		 7103 if (dynobj == NULL)
7104 htab->root.dynobj = dynobj = abfd;
fbaf61ad 7105 if (!create_got_section (dynobj, info))
0a1b45a2 7106 return false;
35c08157
KLC		 7107 break;
7108
7109 default:
7110 break;
7111 }
7112 }
7113
fbaf61ad 7114 /* Check relocation type. */
35c08157
KLC		 7115 switch ((int) r_type)
7116 {
7117 case R_NDS32_GOT_HI20:
7118 case R_NDS32_GOT_LO12:
7119 case R_NDS32_GOT_LO15:
7120 case R_NDS32_GOT_LO19:
7121 case R_NDS32_GOT20:
fbaf61ad
NC		 7122 case R_NDS32_TLS_LE_HI20:
7123 case R_NDS32_TLS_LE_LO12:
1c8f6a4d 7124 case R_NDS32_TLS_IE_HI20:
fbaf61ad 7125 case R_NDS32_TLS_IE_LO12:
1c8f6a4d 7126 case R_NDS32_TLS_IE_LO12S2:
fbaf61ad
NC		 7127 case R_NDS32_TLS_IEGP_HI20:
7128 case R_NDS32_TLS_IEGP_LO12:
7129 case R_NDS32_TLS_IEGP_LO12S2:
7130 case R_NDS32_TLS_DESC_HI20:
7131 case R_NDS32_TLS_DESC_LO12:
7132 tls_type = get_tls_type (r_type, h);
7133 if (h)
1c8f6a4d 7134 {
fbaf61ad
NC		 7135 if (tls_type != GOT_TLS_LE)
7136 h->got.refcount += 1;
1c8f6a4d 7137 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
1c8f6a4d 7138 }
35c08157
KLC		 7139 else
7140 {
fbaf61ad
NC		 7141 /* This is a global offset table entry for a local symbol. */
7142 if (!elf32_nds32_allocate_local_sym_info (abfd))
0a1b45a2 7143 return false;
35c08157 7144
fbaf61ad
NC		 7145 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
7146 if (tls_type != GOT_TLS_LE)
7147 elf_local_got_refcounts (abfd)[r_symndx] += 1;
1c8f6a4d 7148 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 7149 }
35c08157 7150
fbaf61ad 7151 /* We would already have issued an error message if there
1c8f6a4d
KLC		 7152 is a TLS/non-TLS mismatch, based on the symbol
7153 type. So just combine any TLS types needed. */
7154 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7155 && tls_type != GOT_NORMAL)
7156 tls_type |= old_tls_type;
7157
fbaf61ad
NC		 7158 /* DESC to IE/IEGP if link to executable. */
7159 if ((tls_type & (GOT_TLS_DESC | GOT_TLS_IEGP))
7160 && (bfd_link_executable (info)))
7161 tls_type |= (bfd_link_pie (info) ? GOT_TLS_IEGP : GOT_TLS_IE);
7162
1c8f6a4d
KLC		 7163 if (old_tls_type != tls_type)
7164 {
7165 if (h != NULL)
7166 elf32_nds32_hash_entry (h)->tls_type = tls_type;
7167 else
7168 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
7169 }
7170 break;
7171 case R_NDS32_9_PLTREL:
35c08157
KLC		 7172 case R_NDS32_25_PLTREL:
7173 case R_NDS32_PLTREL_HI20:
7174 case R_NDS32_PLTREL_LO12:
7175 case R_NDS32_PLT_GOTREL_HI20:
7176 case R_NDS32_PLT_GOTREL_LO12:
7177 case R_NDS32_PLT_GOTREL_LO15:
7178 case R_NDS32_PLT_GOTREL_LO19:
7179 case R_NDS32_PLT_GOTREL_LO20:
7180
7181 /* This symbol requires a procedure linkage table entry. We
7182 actually build the entry in adjust_dynamic_symbol,
7183 because this might be a case of linking PIC code without
7184 linking in any dynamic objects, in which case we don't
7185 need to generate a procedure linkage table after all. */
7186
7187 /* If this is a local symbol, we resolve it directly without
7188 creating a procedure linkage table entry. */
7189 if (h == NULL)
7190 continue;
7191
fbaf61ad
NC		 7192 if (h->forced_local
7193 || (bfd_link_pie (info) && h->def_regular))
35c08157
KLC		 7194 break;
7195
1c8f6a4d 7196 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC		 7197 h->needs_plt = 1;
7198 h->plt.refcount += 1;
7199 break;
7200
7201 case R_NDS32_16_RELA:
7202 case R_NDS32_20_RELA:
7203 case R_NDS32_5_RELA:
7204 case R_NDS32_32_RELA:
7205 case R_NDS32_HI20_RELA:
7206 case R_NDS32_LO12S3_RELA:
7207 case R_NDS32_LO12S2_RELA:
7208 case R_NDS32_LO12S2_DP_RELA:
7209 case R_NDS32_LO12S2_SP_RELA:
7210 case R_NDS32_LO12S1_RELA:
7211 case R_NDS32_LO12S0_RELA:
7212 case R_NDS32_LO12S0_ORI_RELA:
7213 case R_NDS32_SDA16S3_RELA:
7214 case R_NDS32_SDA17S2_RELA:
7215 case R_NDS32_SDA18S1_RELA:
7216 case R_NDS32_SDA19S0_RELA:
7217 case R_NDS32_SDA15S3_RELA:
7218 case R_NDS32_SDA15S2_RELA:
7219 case R_NDS32_SDA12S2_DP_RELA:
7220 case R_NDS32_SDA12S2_SP_RELA:
7221 case R_NDS32_SDA15S1_RELA:
7222 case R_NDS32_SDA15S0_RELA:
7223 case R_NDS32_SDA_FP7U2_RELA:
7224 case R_NDS32_15_PCREL_RELA:
7225 case R_NDS32_17_PCREL_RELA:
7226 case R_NDS32_25_PCREL_RELA:
7227
0e1862bb 7228 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC		 7229 {
7230 h->non_got_ref = 1;
7231 h->plt.refcount += 1;
7232 }
7233
7234 /* If we are creating a shared library, and this is a reloc against
7235 a global symbol, or a non PC relative reloc against a local
7236 symbol, then we need to copy the reloc into the shared library.
7237 However, if we are linking with -Bsymbolic, we do not need to
7238 copy a reloc against a global symbol which is defined in an
7239 object we are including in the link (i.e., DEF_REGULAR is set).
7240 At this point we have not seen all the input files, so it is
7241 possible that DEF_REGULAR is not set now but will be set later
7242 (it is never cleared). We account for that possibility below by
7243 storing information in the dyn_relocs field of the hash table
7244 entry. A similar situation occurs when creating shared libraries
7245 and symbol visibility changes render the symbol local.
7246
7247 If on the other hand, we are creating an executable, we may need
7248 to keep relocations for symbols satisfied by a dynamic library
7249 if we manage to avoid copy relocs for the symbol. */
0e1862bb 7250 if ((bfd_link_pic (info)
35c08157
KLC		 7251 && (sec->flags & SEC_ALLOC) != 0
7252 && ((r_type != R_NDS32_25_PCREL_RELA
7253 && r_type != R_NDS32_15_PCREL_RELA
7254 && r_type != R_NDS32_17_PCREL_RELA
7255 && !(r_type == R_NDS32_32_RELA
7256 && strcmp (sec->name, ".eh_frame") == 0))
7257 || (h != NULL
7258 && (!info->symbolic
7259 || h->root.type == bfd_link_hash_defweak
7260 || !h->def_regular))))
0e1862bb 7261 || (!bfd_link_pic (info)
35c08157
KLC		 7262 && (sec->flags & SEC_ALLOC) != 0
7263 && h != NULL
7264 && (h->root.type == bfd_link_hash_defweak
7265 || !h->def_regular)))
7266 {
3bf083ed
AM		 7267 struct elf_dyn_relocs *p;
7268 struct elf_dyn_relocs **head;
35c08157
KLC		 7269
7270 if (dynobj == NULL)
7271 htab->root.dynobj = dynobj = abfd;
7272
7273 /* When creating a shared object, we must copy these
7274 relocs into the output file. We create a reloc
7275 section in dynobj and make room for the reloc. */
7276 if (sreloc == NULL)
7277 {
7278 const char *name;
7279
7280 name = bfd_elf_string_from_elf_section
7281 (abfd, elf_elfheader (abfd)->e_shstrndx,
7282 elf_section_data (sec)->rela.hdr->sh_name);
7283 if (name == NULL)
0a1b45a2 7284 return false;
35c08157 7285
3f3328b8 7286 BFD_ASSERT (startswith (name, ".rela")
fd361982 7287 && strcmp (bfd_section_name (sec),
35c08157
KLC		 7288 name + 5) == 0);
7289
7290 sreloc = bfd_get_section_by_name (dynobj, name);
7291 if (sreloc == NULL)
7292 {
7293 flagword flags;
7294
7295 sreloc = bfd_make_section (dynobj, name);
7296 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7297 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
7298 if ((sec->flags & SEC_ALLOC) != 0)
7299 flags |= SEC_ALLOC | SEC_LOAD;
7300 if (sreloc == NULL
fd361982
AM		 7301 || !bfd_set_section_flags (sreloc, flags)
7302 || !bfd_set_section_alignment (sreloc, 2))
0a1b45a2 7303 return false;
35c08157
KLC		 7304
7305 elf_section_type (sreloc) = SHT_RELA;
7306 }
7307 elf_section_data (sec)->sreloc = sreloc;
7308 }
7309
7310 /* If this is a global symbol, we count the number of
7311 relocations we need for this symbol. */
7312 if (h != NULL)
190eb1dd 7313 head = &h->dyn_relocs;
35c08157
KLC		 7314 else
7315 {
7316 asection *s;
61034b0b 7317 void *vpp;
35c08157
KLC		 7318
7319 Elf_Internal_Sym *isym;
f1dfbfdb
L		 7320 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
7321 abfd, r_symndx);
35c08157 7322 if (isym == NULL)
0a1b45a2 7323 return false;
35c08157
KLC		 7324
7325 /* Track dynamic relocs needed for local syms too. */
7326 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
7327 if (s == NULL)
0a1b45a2 7328 return false;
35c08157 7329
61034b0b 7330 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 7331 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC		 7332 }
7333
7334 p = *head;
7335 if (p == NULL || p->sec != sec)
7336 {
986f0783 7337 size_t amt = sizeof (*p);
3bf083ed 7338 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157 7339 if (p == NULL)
0a1b45a2 7340 return false;
35c08157
KLC		 7341 p->next = *head;
7342 *head = p;
7343 p->sec = sec;
7344 p->count = 0;
7345 p->pc_count = 0;
7346 }
7347
7348 p->count += 1;
fbaf61ad
NC		 7349
7350 /* Since eh_frame is readonly, R_NDS32_32_RELA
7351 reloc for eh_frame will cause shared library has
7352 TEXTREL entry in the dynamic section. This lead glibc
7353 testsuites to failure (bug-13092) and cause kernel fail
7354 (bug-11819). I think the best solution is to replace
7355 absolute reloc with pc relative reloc in the eh_frame.
7356 To do that, we need to support the following issues:
7357
7358 === For GCC ===
7359 * gcc/config/nds32/nds32.h: Define
7360 ASM_PREFERRED_EH_DATA_FORMAT to encode DW_EH_PE_pcrel
7361 and DW_EH_PE_sdata4 into DWARF exception header when
7362 option have '-fpic'.
7363
7364 === For binutils ===
7365 * bfd/: Define new reloc R_NDS32_32_PCREL_RELA.
7366 * gas/config/tc-nds32.h: Define DIFF_EXPR_OK. This
7367 may break our nds DIFF mechanism, therefore, we
7368 must disable all linker relaxations to ensure
7369 correctness.
7370 * gas/config/tc-nds32.c (nds32_apply_fix): Replace
7371 R_NDS32_32_RELA with R_NDS32_32_PCREL_RELA, and
7372 do the necessary modification.
7373
7374 Unfortunately, it still have some problems for nds32
7375 to support pc relative reloc in the eh_frame. So I use
7376 another solution to fix this issue.
7377
7378 However, I find that ld always emit TEXTREL marker for
7379 R_NDS32_NONE relocs in rel.dyn. These none relocs are
7380 correspond to R_NDS32_32_RELA for .eh_frame section.
7381 It means that we always reserve redundant entries of rel.dyn
7382 for these relocs which actually do nothing in dynamic linker.
7383
7384 Therefore, we regard these relocs as pc relative relocs
7385 here and increase the pc_count. */
35c08157
KLC		 7386 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
7387 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
fbaf61ad
NC		 7388 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
7389 || (r_type == R_NDS32_32_RELA
7390 && strcmp (sec->name, ".eh_frame") == 0))
35c08157
KLC		 7391 p->pc_count += 1;
7392 }
7393 break;
7394
7395 /* This relocation describes the C++ object vtable hierarchy.
7396 Reconstruct it for later use during GC. */
7397 case R_NDS32_RELA_GNU_VTINHERIT:
7398 case R_NDS32_GNU_VTINHERIT:
7399 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
0a1b45a2 7400 return false;
35c08157
KLC		 7401 break;
7402
7403 /* This relocation describes which C++ vtable entries are actually
7404 used. Record for later use during GC. */
7405 case R_NDS32_GNU_VTENTRY:
7406 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
0a1b45a2 7407 return false;
35c08157
KLC		 7408 break;
7409 case R_NDS32_RELA_GNU_VTENTRY:
7410 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
0a1b45a2 7411 return false;
35c08157
KLC		 7412 break;
7413 }
7414 }
7415
0a1b45a2 7416 return true;
35c08157
KLC		 7417}
7418
7419/* Write VAL in uleb128 format to P, returning a pointer to the
7420 following byte.
7421 This code is copied from elf-attr.c. */
7422
7423static bfd_byte *
7424write_uleb128 (bfd_byte *p, unsigned int val)
7425{
7426 bfd_byte c;
7427 do
7428 {
7429 c = val & 0x7f;
7430 val >>= 7;
7431 if (val)
7432 c |= 0x80;
7433 *(p++) = c;
7434 }
7435 while (val);
7436 return p;
7437}
7438
7439static bfd_signed_vma
7440calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
fbaf61ad 7441 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
35c08157
KLC		 7442{
7443 bfd_signed_vma foff;
7444 bfd_vma symval, addend;
7445 asection *sym_sec;
7446
7447 /* Get the value of the symbol referred to by the reloc. */
7448 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7449 {
7450 Elf_Internal_Sym *isym;
7451
7452 /* A local symbol. */
7453 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7454
7455 if (isym->st_shndx == SHN_UNDEF)
7456 sym_sec = bfd_und_section_ptr;
7457 else if (isym->st_shndx == SHN_ABS)
7458 sym_sec = bfd_abs_section_ptr;
7459 else if (isym->st_shndx == SHN_COMMON)
7460 sym_sec = bfd_com_section_ptr;
7461 else
7462 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7463 symval = isym->st_value + sym_sec->output_section->vma
7464 + sym_sec->output_offset;
7465 }
7466 else
7467 {
7468 unsigned long indx;
7469 struct elf_link_hash_entry *h;
35c08157
KLC		 7470
7471 /* An external symbol. */
7472 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7473 h = elf_sym_hashes (abfd)[indx];
7474 BFD_ASSERT (h != NULL);
7475
7476 if (h->root.type != bfd_link_hash_defined
7477 && h->root.type != bfd_link_hash_defweak)
7478 /* This appears to be a reference to an undefined
7479 symbol. Just ignore it--it will be caught by the
7480 regular reloc processing. */
7481 return 0;
35c08157
KLC		 7482
7483 if (h->root.u.def.section->flags & SEC_MERGE)
7484 {
7485 sym_sec = h->root.u.def.section;
7486 symval = _bfd_merged_section_offset (abfd, &sym_sec,
7487 elf_section_data (sym_sec)->sec_info,
7488 h->root.u.def.value);
7489 symval = symval + sym_sec->output_section->vma
7490 + sym_sec->output_offset;
7491 }
7492 else
7493 symval = (h->root.u.def.value
7494 + h->root.u.def.section->output_section->vma
7495 + h->root.u.def.section->output_offset);
7496 }
7497
7498 addend = irel->r_addend;
7499
7500 foff = (symval + addend
7501 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
7502 return foff;
7503}
35c08157 7504\f
fbaf61ad 7505
35c08157
KLC		 7506/* Convert a 32-bit instruction to 16-bit one.
7507 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
7508 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
7509 type of INSN16. Return 1 if successful. */
7510
7511static int
7512nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7513 int *pinsn_type)
7514{
7515 uint16_t insn16 = 0;
6cae483a 7516 int insn_type = 0;
35c08157
KLC		 7517 unsigned long mach = bfd_get_mach (abfd);
7518
7519 if (N32_SH5 (insn) != 0)
7520 return 0;
7521
7522 switch (N32_SUB5 (insn))
7523 {
7524 case N32_ALU1_ADD_SLLI:
7525 case N32_ALU1_ADD_SRLI:
7526 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
7527 {
7528 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
7529 N32_RB5 (insn));
7530 insn_type = NDS32_INSN_ADD333;
7531 }
7532 else if (N32_IS_RT4 (insn))
7533 {
7534 if (N32_RT5 (insn) == N32_RA5 (insn))
7535 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
7536 else if (N32_RT5 (insn) == N32_RB5 (insn))
7537 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
7538 insn_type = NDS32_INSN_ADD45;
7539 }
7540 break;
7541
7542 case N32_ALU1_SUB_SLLI:
7543 case N32_ALU1_SUB_SRLI:
7544 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
7545 {
7546 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
7547 N32_RB5 (insn));
7548 insn_type = NDS32_INSN_SUB333;
7549 }
7550 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7551 {
7552 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
7553 insn_type = NDS32_INSN_SUB45;
7554 }
7555 break;
7556
7557 case N32_ALU1_AND_SLLI:
7558 case N32_ALU1_AND_SRLI:
7559 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
7560 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7561 && N32_IS_RB3 (insn))
7562 {
7563 if (N32_RT5 (insn) == N32_RA5 (insn))
7564 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
7565 else if (N32_RT5 (insn) == N32_RB5 (insn))
7566 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
7567 if (insn16)
7568 insn_type = NDS32_INSN_AND33;
7569 }
7570 break;
7571
7572 case N32_ALU1_XOR_SLLI:
7573 case N32_ALU1_XOR_SRLI:
7574 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
7575 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7576 && N32_IS_RB3 (insn))
7577 {
7578 if (N32_RT5 (insn) == N32_RA5 (insn))
7579 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
7580 else if (N32_RT5 (insn) == N32_RB5 (insn))
7581 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
7582 if (insn16)
7583 insn_type = NDS32_INSN_XOR33;
7584 }
7585 break;
7586
7587 case N32_ALU1_OR_SLLI:
7588 case N32_ALU1_OR_SRLI:
7589 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
7590 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7591 && N32_IS_RB3 (insn))
7592 {
7593 if (N32_RT5 (insn) == N32_RA5 (insn))
7594 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
7595 else if (N32_RT5 (insn) == N32_RB5 (insn))
7596 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
7597 if (insn16)
7598 insn_type = NDS32_INSN_OR33;
7599 }
7600 break;
7601 case N32_ALU1_NOR:
7602 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
7603 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
7604 && N32_RA5 (insn) == N32_RB5 (insn))
7605 {
7606 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
7607 insn_type = NDS32_INSN_NOT33;
7608 }
7609 break;
7610 case N32_ALU1_SRAI:
7611 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7612 {
7613 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
7614 insn_type = NDS32_INSN_SRAI45;
7615 }
7616 break;
7617
7618 case N32_ALU1_SRLI:
7619 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
7620 {
7621 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
7622 insn_type = NDS32_INSN_SRLI45;
7623 }
7624 break;
7625
7626 case N32_ALU1_SLLI:
7627 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
7628 {
7629 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
7630 N32_UB5 (insn));
7631 insn_type = NDS32_INSN_SLLI333;
7632 }
7633 break;
7634
7635 case N32_ALU1_ZEH:
7636 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7637 {
7638 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
7639 insn_type = NDS32_INSN_ZEH33;
7640 }
7641 break;
7642
7643 case N32_ALU1_SEB:
7644 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7645 {
7646 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
7647 insn_type = NDS32_INSN_SEB33;
7648 }
7649 break;
7650
7651 case N32_ALU1_SEH:
7652 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7653 {
7654 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
7655 insn_type = NDS32_INSN_SEH33;
7656 }
7657 break;
7658
7659 case N32_ALU1_SLT:
7660 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7661 {
7662 /* Implicit r15. */
7663 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
7664 insn_type = NDS32_INSN_SLT45;
7665 }
7666 break;
7667
7668 case N32_ALU1_SLTS:
7669 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
7670 {
7671 /* Implicit r15. */
7672 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
7673 insn_type = NDS32_INSN_SLTS45;
7674 }
7675 break;
7676 }
7677
7678 if ((insn16 & 0x8000) == 0)
7679 return 0;
7680
7681 if (pinsn16)
7682 *pinsn16 = insn16;
7683 if (pinsn_type)
7684 *pinsn_type = insn_type;
7685 return 1;
7686}
7687
7688static int
7689nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7690 int *pinsn_type)
7691{
7692 uint16_t insn16 = 0;
7693 int insn_type;
7694 unsigned long mach = bfd_get_mach (abfd);
7695
7696 /* TODO: bset, bclr, btgl, btst. */
7697 if (__GF (insn, 6, 4) != 0)
7698 return 0;
7699
7700 switch (N32_IMMU (insn, 6))
7701 {
7702 case N32_ALU2_MUL:
7703 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7704 && N32_IS_RB3 (insn))
7705 {
7706 if (N32_RT5 (insn) == N32_RA5 (insn))
7707 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
7708 else if (N32_RT5 (insn) == N32_RB5 (insn))
7709 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
7710 if (insn16)
7711 insn_type = NDS32_INSN_MUL33;
7712 }
7713 }
7714
7715 if ((insn16 & 0x8000) == 0)
7716 return 0;
7717
7718 if (pinsn16)
7719 *pinsn16 = insn16;
7720 if (pinsn_type)
7721 *pinsn_type = insn_type;
7722 return 1;
7723}
7724
7725int
7726nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
7727 int *pinsn_type)
7728{
7729 int op6;
7730 uint16_t insn16 = 0;
1624c9ca 7731 int insn_type = 0;
35c08157
KLC		 7732 unsigned long mach = bfd_get_mach (abfd);
7733
7734 /* Decode 32-bit instruction. */
7735 if (insn & 0x80000000)
7736 {
7737 /* Not 32-bit insn. */
7738 return 0;
7739 }
7740
7741 op6 = N32_OP6 (insn);
7742
7743 /* Convert it to 16-bit instruction. */
7744 switch (op6)
7745 {
7746 case N32_OP6_MOVI:
7747 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
7748 {
7749 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
7750 insn_type = NDS32_INSN_MOVI55;
7751 }
7752 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
7753 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
7754 {
7755 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
7756 N32_IMM20S (insn) - 16);
7757 insn_type = NDS32_INSN_MOVPI45;
7758 }
7759 break;
7760
7761 case N32_OP6_ADDI:
7762 if (N32_IMM15S (insn) == 0)
7763 {
7764 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
7765 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7766 if (mach <= MACH_V2
7767 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7768 {
7769 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7770 insn_type = NDS32_INSN_MOV55;
7771 }
7772 }
7773 else if (N32_IMM15S (insn) > 0)
7774 {
7775 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
7776 {
7777 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
7778 N32_IMM15S (insn));
7779 insn_type = NDS32_INSN_ADDI333;
7780 }
7781 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7782 && N32_IMM15S (insn) < 32)
7783 {
7784 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
7785 insn_type = NDS32_INSN_ADDI45;
7786 }
7787 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7788 && N32_RT5 (insn) == N32_RA5 (insn)
7789 && N32_IMM15S (insn) < 512)
7790 {
7791 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7792 insn_type = NDS32_INSN_ADDI10_SP;
7793 }
7794 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7795 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
7796 && (N32_IMM15S (insn) % 4 == 0))
7797 {
7798 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
7799 N32_IMM15S (insn) >> 2);
7800 insn_type = NDS32_INSN_ADDRI36_SP;
7801 }
7802 }
7803 else
7804 {
7805 /* Less than 0. */
7806 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
7807 {
7808 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
7809 0 - N32_IMM15S (insn));
7810 insn_type = NDS32_INSN_SUBI333;
7811 }
7812 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
7813 && N32_IMM15S (insn) > -32)
7814 {
1c8f6a4d
KLC		 7815 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
7816 0 - N32_IMM15S (insn));
35c08157
KLC		 7817 insn_type = NDS32_INSN_SUBI45;
7818 }
7819 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
7820 && N32_RT5 (insn) == N32_RA5 (insn)
7821 && N32_IMM15S (insn) >= -512)
7822 {
7823 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
7824 insn_type = NDS32_INSN_ADDI10_SP;
7825 }
7826 }
7827 break;
7828
7829 case N32_OP6_ORI:
7830 if (N32_IMM15S (insn) == 0)
7831 {
7832 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
7833 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
7834 if (mach <= MACH_V2
7835 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
7836 {
7837 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
7838 insn_type = NDS32_INSN_MOV55;
7839 }
7840 }
7841 break;
7842
7843 case N32_OP6_SUBRI:
7844 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
7845 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
7846 {
7847 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
7848 insn_type = NDS32_INSN_NEG33;
7849 }
7850 break;
7851
7852 case N32_OP6_ANDI:
7853 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
7854 {
7855 if (N32_IMM15U (insn) == 1)
7856 {
7857 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
7858 insn_type = NDS32_INSN_XLSB33;
7859 }
7860 else if (N32_IMM15U (insn) == 0x7ff)
7861 {
7862 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
7863 insn_type = NDS32_INSN_X11B33;
7864 }
7865 else if (N32_IMM15U (insn) == 0xff)
7866 {
7867 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
7868 insn_type = NDS32_INSN_ZEB33;
7869 }
7870 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
7871 && N32_IMM15U (insn) < 256)
7872 {
7873 int imm15u = N32_IMM15U (insn);
7874
7875 if (__builtin_popcount (imm15u) == 1)
7876 {
7877 /* BMSKI33 */
7878 int imm3u = __builtin_ctz (imm15u);
7879
7880 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
7881 insn_type = NDS32_INSN_BMSKI33;
7882 }
7883 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
7884 {
7885 /* FEXTI33 */
7886 int imm3u = __builtin_ctz (imm15u + 1) - 1;
7887
7888 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
7889 insn_type = NDS32_INSN_FEXTI33;
7890 }
7891 }
7892 }
7893 break;
7894
7895 case N32_OP6_SLTI:
7896 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7897 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7898 {
7899 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
7900 insn_type = NDS32_INSN_SLTI45;
7901 }
7902 break;
7903
7904 case N32_OP6_SLTSI:
7905 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
7906 && IS_WITHIN_U (N32_IMM15S (insn), 5))
7907 {
7908 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
7909 insn_type = NDS32_INSN_SLTSI45;
7910 }
7911 break;
7912
7913 case N32_OP6_LWI:
7914 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7915 {
7916 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
7917 insn_type = NDS32_INSN_LWI450;
7918 }
7919 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7920 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7921 {
7922 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7923 N32_IMM15S (insn));
7924 insn_type = NDS32_INSN_LWI333;
7925 }
7926 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7927 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7928 {
7929 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7930 insn_type = NDS32_INSN_LWI37;
7931 }
7932 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7933 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7934 {
7935 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7936 insn_type = NDS32_INSN_LWI37_SP;
7937 }
7938 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7939 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7940 {
1c8f6a4d
KLC		 7941 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7942 N32_IMM15S (insn) + 32);
35c08157
KLC		 7943 insn_type = NDS32_INSN_LWI45_FE;
7944 }
7945 break;
7946
7947 case N32_OP6_SWI:
7948 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7949 {
7950 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7951 insn_type = NDS32_INSN_SWI450;
7952 }
7953 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7954 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7955 {
1c8f6a4d
KLC		 7956 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7957 N32_IMM15S (insn));
35c08157
KLC		 7958 insn_type = NDS32_INSN_SWI333;
7959 }
7960 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7961 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7962 {
7963 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7964 insn_type = NDS32_INSN_SWI37;
7965 }
7966 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7967 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7968 {
7969 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7970 insn_type = NDS32_INSN_SWI37_SP;
7971 }
7972 break;
7973
7974 case N32_OP6_LWI_BI:
7975 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7976 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7977 {
7978 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7979 N32_IMM15S (insn));
7980 insn_type = NDS32_INSN_LWI333_BI;
7981 }
7982 break;
7983
7984 case N32_OP6_SWI_BI:
7985 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7986 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7987 {
7988 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7989 N32_IMM15S (insn));
7990 insn_type = NDS32_INSN_SWI333_BI;
7991 }
7992 break;
7993
7994 case N32_OP6_LHI:
7995 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7996 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7997 {
7998 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7999 N32_IMM15S (insn));
8000 insn_type = NDS32_INSN_LHI333;
8001 }
8002 break;
8003
8004 case N32_OP6_SHI:
8005 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
8006 && IS_WITHIN_U (N32_IMM15S (insn), 3))
8007 {
8008 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
8009 N32_IMM15S (insn));
8010 insn_type = NDS32_INSN_SHI333;
8011 }
8012 break;
8013
8014 case N32_OP6_LBI:
8015 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
8016 && IS_WITHIN_U (N32_IMM15S (insn), 3))
8017 {
8018 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
8019 N32_IMM15S (insn));
8020 insn_type = NDS32_INSN_LBI333;
8021 }
8022 break;
8023
8024 case N32_OP6_SBI:
8025 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
8026 && IS_WITHIN_U (N32_IMM15S (insn), 3))
8027 {
8028 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
8029 N32_IMM15S (insn));
8030 insn_type = NDS32_INSN_SBI333;
8031 }
8032 break;
8033
8034 case N32_OP6_ALU1:
8035 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
8036
8037 case N32_OP6_ALU2:
8038 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
8039
8040 case N32_OP6_BR1:
8041 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
8042 goto done;
8043
4ec521f2 8044 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC		 8045 {
8046 /* N32_BR1_BEQ */
8047 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
8048 && N32_RT5 (insn) != REG_R5)
8049 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
8050 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
8051 && N32_RA5 (insn) != REG_R5)
8052 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
8053 insn_type = NDS32_INSN_BEQS38;
8054 break;
8055 }
8056 else
8057 {
8058 /* N32_BR1_BNE */
8059 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
8060 && N32_RT5 (insn) != REG_R5)
8061 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
8062 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
8063 && N32_RA5 (insn) != REG_R5)
8064 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
8065 insn_type = NDS32_INSN_BNES38;
8066 break;
8067 }
8068 break;
8069
8070 case N32_OP6_BR2:
8071 switch (N32_BR2_SUB (insn))
8072 {
8073 case N32_BR2_BEQZ:
8074 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
8075 {
8076 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
8077 insn_type = NDS32_INSN_BEQZ38;
8078 }
1c8f6a4d
KLC		 8079 else if (N32_RT5 (insn) == REG_R15
8080 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 8081 {
8082 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
8083 insn_type = NDS32_INSN_BEQZS8;
8084 }
8085 break;
8086
8087 case N32_BR2_BNEZ:
8088 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
8089 {
8090 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
8091 insn_type = NDS32_INSN_BNEZ38;
8092 }
1c8f6a4d
KLC		 8093 else if (N32_RT5 (insn) == REG_R15
8094 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC		 8095 {
8096 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
8097 insn_type = NDS32_INSN_BNEZS8;
8098 }
8099 break;
8100
fbaf61ad
NC		 8101 case N32_BR2_SOP0:
8102 if (__GF (insn, 20, 5) == 0 && IS_WITHIN_U (N32_IMM16S (insn), 9))
35c08157
KLC		 8103 {
8104 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
8105 insn_type = NDS32_INSN_IFCALL9;
8106 }
8107 break;
8108 }
8109 break;
8110
8111 case N32_OP6_JI:
4ec521f2 8112 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC		 8113 {
8114 /* N32_JI_J */
8115 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
8116 {
8117 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
8118 insn_type = NDS32_INSN_J8;
8119 }
8120 }
8121 break;
8122
8123 case N32_OP6_JREG:
8124 if (__GF (insn, 8, 2) != 0)
8125 goto done;
8126
8127 switch (N32_IMMU (insn, 5))
8128 {
8129 case N32_JREG_JR:
8130 if (N32_JREG_HINT (insn) == 0)
8131 {
8132 /* jr */
8133 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
8134 insn_type = NDS32_INSN_JR5;
8135 }
8136 else if (N32_JREG_HINT (insn) == 1)
8137 {
8138 /* ret */
8139 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
8140 insn_type = NDS32_INSN_RET5;
8141 }
8142 else if (N32_JREG_HINT (insn) == 3)
8143 {
8144 /* ifret = mov55 $sp, $sp */
8145 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
8146 insn_type = NDS32_INSN_IFRET;
8147 }
8148 break;
8149
8150 case N32_JREG_JRAL:
8151 /* It's convertible when return rt5 is $lp and address
8152 translation is kept. */
8153 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
8154 {
8155 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
8156 insn_type = NDS32_INSN_JRAL5;
8157 }
8158 break;
8159 }
8160 break;
8161
8162 case N32_OP6_MISC:
8163 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
8164 {
8165 /* For v3, swid above 31 are used for ex9.it. */
8166 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
8167 insn_type = NDS32_INSN_BREAK16;
8168 }
8169 break;
8170
8171 default:
8172 /* This instruction has no 16-bit variant. */
8173 goto done;
8174 }
8175
dc1e8a47 8176 done:
35c08157
KLC		 8177 /* Bit-15 of insn16 should be set for a valid instruction. */
8178 if ((insn16 & 0x8000) == 0)
8179 return 0;
8180
8181 if (pinsn16)
8182 *pinsn16 = insn16;
8183 if (pinsn_type)
8184 *pinsn_type = insn_type;
8185 return 1;
8186}
8187
8188static int
8189special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
8190 Elf_Internal_Rela *reloc)
8191{
8192 uint16_t insn16 = 0;
8193
8194 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
8195 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
8196 return 0;
8197
8198 if (!N32_IS_RT3 (insn))
8199 return 0;
8200
8201 switch (N32_OP6 (insn))
8202 {
8203 case N32_OP6_LWI:
8204 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
8205 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
8206 break;
8207 case N32_OP6_SWI:
8208 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
8209 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
8210 break;
8211 case N32_OP6_HWGP:
8212 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
8213 break;
8214
8215 if (__GF (insn, 17, 3) == 6)
8216 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
8217 else if (__GF (insn, 17, 3) == 7)
8218 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
8219 break;
8220 }
8221
8222 if ((insn16 & 0x8000) == 0)
8223 return 0;
8224
8225 *pinsn16 = insn16;
8226 return 1;
8227}
8228
8229/* Convert a 16-bit instruction to 32-bit one.
8230 INSN16 it the input and PINSN it the point to output.
8231 Return non-zero on successful. Otherwise 0 is returned. */
8232
8233int
8234nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
8235{
8236 uint32_t insn = 0xffffffff;
8237 unsigned long mach = bfd_get_mach (abfd);
8238
8239 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
8240
8241 switch (__GF (insn16, 9, 6))
8242 {
8243 case 0x4: /* add45 */
1c8f6a4d
KLC		 8244 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
8245 N16_RA5 (insn16));
35c08157
KLC		 8246 goto done;
8247 case 0x5: /* sub45 */
1c8f6a4d
KLC		 8248 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
8249 N16_RA5 (insn16));
35c08157
KLC		 8250 goto done;
8251 case 0x6: /* addi45 */
1c8f6a4d
KLC		 8252 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
8253 N16_IMM5U (insn16));
35c08157
KLC		 8254 goto done;
8255 case 0x7: /* subi45 */
1c8f6a4d
KLC		 8256 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
8257 -N16_IMM5U (insn16));
35c08157
KLC		 8258 goto done;
8259 case 0x8: /* srai45 */
1c8f6a4d
KLC		 8260 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
8261 N16_IMM5U (insn16));
35c08157
KLC		 8262 goto done;
8263 case 0x9: /* srli45 */
1c8f6a4d
KLC		 8264 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
8265 N16_IMM5U (insn16));
35c08157 8266 goto done;
35c08157 8267 case 0xa: /* slli333 */
1c8f6a4d
KLC		 8268 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
8269 N16_IMM3U (insn16));
35c08157
KLC		 8270 goto done;
8271 case 0xc: /* add333 */
1c8f6a4d
KLC		 8272 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
8273 N16_RB3 (insn16));
35c08157
KLC		 8274 goto done;
8275 case 0xd: /* sub333 */
1c8f6a4d
KLC		 8276 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
8277 N16_RB3 (insn16));
35c08157
KLC		 8278 goto done;
8279 case 0xe: /* addi333 */
1c8f6a4d
KLC		 8280 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
8281 N16_IMM3U (insn16));
35c08157
KLC		 8282 goto done;
8283 case 0xf: /* subi333 */
1c8f6a4d
KLC		 8284 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
8285 -N16_IMM3U (insn16));
35c08157 8286 goto done;
35c08157 8287 case 0x10: /* lwi333 */
1c8f6a4d
KLC		 8288 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
8289 N16_IMM3U (insn16));
35c08157
KLC		 8290 goto done;
8291 case 0x12: /* lhi333 */
1c8f6a4d
KLC		 8292 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
8293 N16_IMM3U (insn16));
35c08157
KLC		 8294 goto done;
8295 case 0x13: /* lbi333 */
1c8f6a4d
KLC		 8296 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
8297 N16_IMM3U (insn16));
35c08157
KLC		 8298 goto done;
8299 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC		 8300 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
8301 N16_IMM3U (insn16));
35c08157
KLC		 8302 goto done;
8303 case 0x14: /* swi333 */
1c8f6a4d
KLC		 8304 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
8305 N16_IMM3U (insn16));
35c08157
KLC		 8306 goto done;
8307 case 0x16: /* shi333 */
1c8f6a4d
KLC		 8308 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
8309 N16_IMM3U (insn16));
35c08157
KLC		 8310 goto done;
8311 case 0x17: /* sbi333 */
1c8f6a4d
KLC		 8312 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
8313 N16_IMM3U (insn16));
35c08157
KLC		 8314 goto done;
8315 case 0x15: /* swi333.bi */
1c8f6a4d
KLC		 8316 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
8317 N16_IMM3U (insn16));
35c08157 8318 goto done;
35c08157 8319 case 0x18: /* addri36.sp */
1c8f6a4d
KLC		 8320 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
8321 N16_IMM6U (insn16) << 2);
35c08157 8322 goto done;
35c08157 8323 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC		 8324 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
8325 (N16_IMM5U (insn16) - 32));
35c08157
KLC		 8326 goto done;
8327 case 0x1a: /* lwi450 */
8328 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
8329 goto done;
8330 case 0x1b: /* swi450 */
8331 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
8332 goto done;
8333
1c8f6a4d 8334 /* These are r15 implied instructions. */
35c08157
KLC		 8335 case 0x30: /* slts45 */
8336 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
8337 goto done;
8338 case 0x31: /* slt45 */
8339 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
8340 goto done;
8341 case 0x32: /* sltsi45 */
8342 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
8343 goto done;
8344 case 0x33: /* slti45 */
8345 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
8346 goto done;
8347 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 8348 if (insn16 & N32_BIT (8))
35c08157
KLC		 8349 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
8350 else
8351 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
8352 goto done;
8353
8354 case 0x35: /* break16, ex9.it */
8355 /* Only consider range of v3 break16. */
8356 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
8357 goto done;
8358
8359 case 0x3c: /* ifcall9 */
fbaf61ad 8360 insn = N32_BR2 (SOP0, 0, N16_IMM9U (insn16));
35c08157
KLC		 8361 goto done;
8362 case 0x3d: /* movpi45 */
8363 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
8364 goto done;
8365
8366 case 0x3f: /* MISC33 */
1c8f6a4d 8367 switch (insn16 & 0x7)
35c08157
KLC		 8368 {
8369 case 2: /* neg33 */
8370 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8371 break;
8372 case 3: /* not33 */
1c8f6a4d
KLC		 8373 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
8374 N16_RA3 (insn16));
35c08157
KLC		 8375 break;
8376 case 4: /* mul33 */
1c8f6a4d
KLC		 8377 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
8378 N16_RA3 (insn16));
35c08157
KLC		 8379 break;
8380 case 5: /* xor33 */
1c8f6a4d
KLC		 8381 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
8382 N16_RA3 (insn16));
35c08157
KLC		 8383 break;
8384 case 6: /* and33 */
1c8f6a4d
KLC		 8385 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
8386 N16_RA3 (insn16));
35c08157
KLC		 8387 break;
8388 case 7: /* or33 */
1c8f6a4d
KLC		 8389 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
8390 N16_RA3 (insn16));
35c08157
KLC		 8391 break;
8392 }
8393 goto done;
8394
1c8f6a4d 8395 case 0xb:
35c08157
KLC		 8396 switch (insn16 & 0x7)
8397 {
8398 case 0: /* zeb33 */
8399 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
8400 break;
8401 case 1: /* zeh33 */
8402 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8403 break;
8404 case 2: /* seb33 */
8405 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8406 break;
8407 case 3: /* seh33 */
8408 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
8409 break;
8410 case 4: /* xlsb33 */
8411 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
8412 break;
8413 case 5: /* x11b33 */
8414 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
8415 break;
8416 case 6: /* bmski33 */
8417 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 8418 1 << __GF (insn16, 3, 3));
35c08157
KLC		 8419 break;
8420 case 7: /* fexti33 */
8421 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 8422 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC		 8423 break;
8424 }
8425 goto done;
8426 }
8427
8428 switch (__GF (insn16, 10, 5))
8429 {
8430 case 0x0: /* mov55 or ifret16 */
8431 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
8432 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 8433 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 8434 else
1c8f6a4d 8435 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC		 8436 goto done;
8437 case 0x1: /* movi55 */
8438 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
8439 goto done;
8440 case 0x1b: /* addi10s (V2) */
8441 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
8442 goto done;
8443 }
8444
8445 switch (__GF (insn16, 11, 4))
8446 {
8447 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 8448 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC		 8449 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
8450 else /* lwi37.fp */
8451 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
8452 goto done;
8453 case 0x8: /* beqz38 */
8454 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
8455 goto done;
8456 case 0x9: /* bnez38 */
8457 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
8458 goto done;
8459 case 0xa: /* beqs38/j8, implied r5 */
8460 if (N16_RT38 (insn16) == 5)
8461 insn = N32_JI (J, N16_IMM8S (insn16));
8462 else
8463 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
8464 goto done;
fbaf61ad 8465 case 0xb: /* bnes38 and others. */
35c08157
KLC		 8466 if (N16_RT38 (insn16) == 5)
8467 {
8468 switch (__GF (insn16, 5, 3))
8469 {
8470 case 0: /* jr5 */
8471 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
8472 break;
8473 case 4: /* ret5 */
8474 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
8475 break;
8476 case 1: /* jral5 */
8477 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
8478 break;
8479 case 2: /* ex9.it imm5 */
8480 /* ex9.it had no 32-bit variantl. */
8481 break;
8482 case 5: /* add5.pc */
8483 /* add5.pc had no 32-bit variantl. */
8484 break;
8485 }
8486 }
8487 else /* bnes38 */
8488 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
8489 goto done;
8490 case 0xe: /* lwi37/swi37 */
8491 if (insn16 & (1 << 7)) /* swi37.sp */
8492 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
8493 else /* lwi37.sp */
8494 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
8495 goto done;
8496 }
8497
dc1e8a47 8498 done:
35c08157
KLC		 8499 if (insn & 0x80000000)
8500 return 0;
8501
8502 if (pinsn)
8503 *pinsn = insn;
8504 return 1;
8505}
8506\f
fbaf61ad 8507
0a1b45a2 8508static bool
35c08157
KLC		 8509is_sda_access_insn (unsigned long insn)
8510{
8511 switch (N32_OP6 (insn))
8512 {
8513 case N32_OP6_LWI:
8514 case N32_OP6_LHI:
8515 case N32_OP6_LHSI:
8516 case N32_OP6_LBI:
8517 case N32_OP6_LBSI:
8518 case N32_OP6_SWI:
8519 case N32_OP6_SHI:
8520 case N32_OP6_SBI:
8521 case N32_OP6_LWC:
8522 case N32_OP6_LDC:
8523 case N32_OP6_SWC:
8524 case N32_OP6_SDC:
0a1b45a2 8525 return true;
35c08157
KLC		 8526 default:
8527 ;
8528 }
0a1b45a2 8529 return false;
35c08157
KLC		 8530}
8531
8532static unsigned long
8533turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
8534{
8535 uint32_t oinsn = 0;
8536
8537 switch (type)
8538 {
8539 case R_NDS32_GOT_LO12:
8540 case R_NDS32_GOTOFF_LO12:
8541 case R_NDS32_PLTREL_LO12:
8542 case R_NDS32_PLT_GOTREL_LO12:
8543 case R_NDS32_LO12S0_RELA:
8544 switch (N32_OP6 (insn))
8545 {
8546 case N32_OP6_LBI:
8547 /* lbi.gp */
8548 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
8549 break;
8550 case N32_OP6_LBSI:
8551 /* lbsi.gp */
4ec521f2 8552 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8553 break;
8554 case N32_OP6_SBI:
8555 /* sbi.gp */
8556 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
8557 break;
8558 case N32_OP6_ORI:
8559 /* addi.gp */
4ec521f2 8560 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8561 break;
8562 }
8563 break;
8564
8565 case R_NDS32_LO12S1_RELA:
8566 switch (N32_OP6 (insn))
8567 {
8568 case N32_OP6_LHI:
8569 /* lhi.gp */
8570 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
8571 break;
8572 case N32_OP6_LHSI:
8573 /* lhsi.gp */
4ec521f2 8574 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC		 8575 break;
8576 case N32_OP6_SHI:
8577 /* shi.gp */
4ec521f2 8578 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC		 8579 break;
8580 }
8581 break;
8582
8583 case R_NDS32_LO12S2_RELA:
8584 switch (N32_OP6 (insn))
8585 {
8586 case N32_OP6_LWI:
8587 /* lwi.gp */
8588 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
8589 break;
8590 case N32_OP6_SWI:
8591 /* swi.gp */
8592 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
8593 break;
8594 }
8595 break;
8596
8597 case R_NDS32_LO12S2_DP_RELA:
8598 case R_NDS32_LO12S2_SP_RELA:
8599 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
8600 break;
8601 }
8602
8603 if (oinsn)
8604 *pinsn = oinsn;
8605
8606 return oinsn != 0;
8607}
8608
8609/* Linker hasn't found the correct merge section for non-section symbol
8610 in relax time, this work is left to the function elf_link_input_bfd().
8611 So for non-section symbol, _bfd_merged_section_offset is also needed
8612 to find the correct symbol address. */
8613
8614static bfd_vma
8615nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
8616 asection **psec, Elf_Internal_Rela *rel)
8617{
8618 asection *sec = *psec;
8619 bfd_vma relocation;
8620
8621 relocation = (sec->output_section->vma
8622 + sec->output_offset + sym->st_value);
8623 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
8624 {
8625 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
8626 rel->r_addend =
8627 _bfd_merged_section_offset (abfd, psec,
8628 elf_section_data (sec)->sec_info,
8629 sym->st_value + rel->r_addend);
8630 else
8631 rel->r_addend =
8632 _bfd_merged_section_offset (abfd, psec,
8633 elf_section_data (sec)->sec_info,
8634 sym->st_value) + rel->r_addend;
8635
8636 if (sec != *psec)
8637 {
8638 /* If we have changed the section, and our original section is
8639 marked with SEC_EXCLUDE, it means that the original
8640 SEC_MERGE section has been completely subsumed in some
8641 other SEC_MERGE section. In this case, we need to leave
8642 some info around for --emit-relocs. */
8643 if ((sec->flags & SEC_EXCLUDE) != 0)
8644 sec->kept_section = *psec;
8645 sec = *psec;
8646 }
8647 rel->r_addend -= relocation;
8648 rel->r_addend += sec->output_section->vma + sec->output_offset;
8649 }
8650 return relocation;
8651}
8652
8653static bfd_vma
8654calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
8655 Elf_Internal_Sym *isymbuf,
8656 Elf_Internal_Shdr *symtab_hdr)
8657{
8658 bfd_signed_vma foff;
8659 bfd_vma symval, addend;
8660 Elf_Internal_Rela irel_fn;
8661 Elf_Internal_Sym *isym;
8662 asection *sym_sec;
8663
8664 /* Get the value of the symbol referred to by the reloc. */
8665 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
8666 {
8667 /* A local symbol. */
8668 isym = isymbuf + ELF32_R_SYM (irel->r_info);
8669
8670 if (isym->st_shndx == SHN_UNDEF)
8671 sym_sec = bfd_und_section_ptr;
8672 else if (isym->st_shndx == SHN_ABS)
8673 sym_sec = bfd_abs_section_ptr;
8674 else if (isym->st_shndx == SHN_COMMON)
8675 sym_sec = bfd_com_section_ptr;
8676 else
8677 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8678 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
8679 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
8680 addend = irel_fn.r_addend;
8681 }
8682 else
8683 {
8684 unsigned long indx;
8685 struct elf_link_hash_entry *h;
8686
8687 /* An external symbol. */
8688 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
8689 h = elf_sym_hashes (abfd)[indx];
8690 BFD_ASSERT (h != NULL);
8691
8692 while (h->root.type == bfd_link_hash_indirect
8693 || h->root.type == bfd_link_hash_warning)
8694 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8695
8696 if (h->root.type != bfd_link_hash_defined
8697 && h->root.type != bfd_link_hash_defweak)
8698 /* This appears to be a reference to an undefined
8699 symbol. Just ignore it--it will be caught by the
8700 regular reloc processing. */
8701 return 0;
8702
8703 if (h->root.u.def.section->flags & SEC_MERGE)
8704 {
8705 sym_sec = h->root.u.def.section;
8706 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
8707 (sym_sec)->sec_info, h->root.u.def.value);
8708 symval = symval + sym_sec->output_section->vma
8709 + sym_sec->output_offset;
8710 }
8711 else
8712 symval = (h->root.u.def.value
8713 + h->root.u.def.section->output_section->vma
8714 + h->root.u.def.section->output_offset);
8715 addend = irel->r_addend;
8716 }
8717
8718 foff = symval + addend;
8719
8720 return foff;
8721}
8722
35c08157
KLC		 8723static int
8724is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
8725 asection *sec, Elf_Internal_Rela *rel)
8726{
8727 bfd_byte *contents;
8728 unsigned short insn16;
8729
8730 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
0a1b45a2 8731 return false;
35c08157
KLC		 8732 contents = elf_section_data (sec)->this_hdr.contents;
8733 insn16 = bfd_getb16 (contents + rel->r_offset);
8734 if (insn16 == NDS32_NOP16)
0a1b45a2
AM		 8735 return true;
8736 return false;
35c08157
KLC		 8737}
8738
8739/* It checks whether the instruction could be converted to
8740 16-bit form and returns the converted one.
8741
8742 `internal_relocs' is supposed to be sorted. */
8743
8744static int
8745is_convert_32_to_16 (bfd *abfd, asection *sec,
8746 Elf_Internal_Rela *reloc,
8747 Elf_Internal_Rela *internal_relocs,
8748 Elf_Internal_Rela *irelend,
8749 uint16_t *insn16)
8750{
8751#define NORMAL_32_TO_16 (1 << 0)
8752#define SPECIAL_32_TO_16 (1 << 1)
8753 bfd_byte *contents = NULL;
8754 bfd_signed_vma off;
8755 bfd_vma mem_addr;
8756 uint32_t insn = 0;
8757 Elf_Internal_Rela *pc_rel;
35c08157
KLC		 8758 Elf_Internal_Shdr *symtab_hdr;
8759 Elf_Internal_Sym *isymbuf = NULL;
8760 int convert_type;
8761 bfd_vma offset;
8762
8763 if (reloc->r_offset + 4 > sec->size)
0a1b45a2 8764 return false;
35c08157
KLC		 8765
8766 offset = reloc->r_offset;
8767
0a1b45a2
AM		 8768 if (!nds32_get_section_contents (abfd, sec, &contents, true))
8769 return false;
35c08157
KLC		 8770 insn = bfd_getb32 (contents + offset);
8771
8772 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
8773 convert_type = NORMAL_32_TO_16;
8774 else if (special_convert_32_to_16 (insn, insn16, reloc))
8775 convert_type = SPECIAL_32_TO_16;
8776 else
0a1b45a2 8777 return false;
35c08157
KLC		 8778
8779 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8780 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
0a1b45a2 8781 return false;
35c08157
KLC		 8782
8783 /* Find the first relocation of the same relocation-type,
8784 so we iteratie them forward. */
8785 pc_rel = reloc;
1c8f6a4d 8786 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC		 8787 pc_rel--;
8788
8789 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8790 {
8791 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8792 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8793 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
8794 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8795 {
fbaf61ad 8796 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
1c8f6a4d
KLC		 8797 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
8798 || off == 0)
0a1b45a2 8799 return false;
35c08157
KLC		 8800 break;
8801 }
8802 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8803 {
8804 /* movi => movi55 */
1c8f6a4d
KLC		 8805 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
8806 symtab_hdr);
8807 /* mem_addr is unsigned, but the value should
8808 be between [-16, 15]. */
35c08157 8809 if ((mem_addr + 0x10) >> 5)
0a1b45a2 8810 return false;
35c08157
KLC		 8811 break;
8812 }
1c8f6a4d
KLC		 8813 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
8814 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
8815 {
8816 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
8817 because it can be relaxed to addi for TLS_LE_ADD. */
0a1b45a2 8818 return false;
1c8f6a4d 8819 }
35c08157
KLC		 8820 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8821 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8822 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
8823 && convert_type == SPECIAL_32_TO_16)
8824 {
8825 /* fp-as-gp
8826 We've selected a best fp-base for this access, so we can
8827 always resolve it anyway. Do nothing. */
8828 break;
8829 }
8830 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
8831 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
8832 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
8833 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
8834 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
8835 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
8836 {
1c8f6a4d
KLC		 8837 /* Prevent unresolved addi instruction translate
8838 to addi45 or addi333. */
0a1b45a2 8839 return false;
35c08157 8840 }
1c8f6a4d
KLC		 8841 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8842 {
fbaf61ad 8843 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
1c8f6a4d 8844 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
0a1b45a2 8845 return false;
1c8f6a4d
KLC		 8846 break;
8847 }
35c08157
KLC		 8848 }
8849
0a1b45a2 8850 return true;
35c08157
KLC		 8851}
8852
8853static void
8854nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
8855 Elf_Internal_Rela *reloc,
8856 Elf_Internal_Rela *internal_relocs,
8857 Elf_Internal_Rela *irelend,
8858 unsigned short insn16)
8859{
8860 Elf_Internal_Rela *pc_rel;
8861 bfd_vma offset;
8862
8863 offset = reloc->r_offset;
8864 bfd_putb16 (insn16, contents + offset);
8865 /* Find the first relocation of the same relocation-type,
8866 so we iteratie them forward. */
8867 pc_rel = reloc;
8868 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
8869 pc_rel--;
8870
8871 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
8872 {
8873 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
8874 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
8875 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
8876 {
8877 pc_rel->r_info =
8878 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
8879 }
8880 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8881 pc_rel->r_info =
8882 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8883 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8884 pc_rel->r_info =
8885 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8886 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8887 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8888 pc_rel->r_info =
8889 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC		 8890 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8891 pc_rel->r_info =
8892 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC		 8893 }
8894}
8895
8896/* Find a relocation of type specified by `reloc_type'
8897 of the same r_offset with reloc.
8898 If not found, return irelend.
8899
8900 Assuming relocations are sorted by r_offset,
8901 we find the relocation from `reloc' backward untill relocs,
8902 or find it from `reloc' forward untill irelend. */
8903
8904static Elf_Internal_Rela *
8905find_relocs_at_address (Elf_Internal_Rela *reloc,
8906 Elf_Internal_Rela *relocs,
8907 Elf_Internal_Rela *irelend,
8908 enum elf_nds32_reloc_type reloc_type)
8909{
8910 Elf_Internal_Rela *rel_t;
8911
8912 /* Find backward. */
8913 for (rel_t = reloc;
8914 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8915 rel_t--)
8916 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8917 return rel_t;
8918
1c8f6a4d 8919 /* We didn't find it backward. Try find it forward. */
35c08157
KLC		 8920 for (rel_t = reloc;
8921 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8922 rel_t++)
8923 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8924 return rel_t;
8925
8926 return irelend;
8927}
8928
8929/* Find a relocation of specified type and offset.
8930 `reloc' is just a refence point to find a relocation at specified offset.
8931 If not found, return irelend.
8932
8933 Assuming relocations are sorted by r_offset,
8934 we find the relocation from `reloc' backward untill relocs,
8935 or find it from `reloc' forward untill irelend. */
8936
8937static Elf_Internal_Rela *
8938find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8939 Elf_Internal_Rela *relocs,
8940 Elf_Internal_Rela *irelend,
6cae483a 8941 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC		 8942 bfd_vma offset_p)
8943{
8944 Elf_Internal_Rela *rel_t = NULL;
8945
8946 /* First, we try to find a relocation of offset `offset_p',
8947 and then we use find_relocs_at_address to find specific type. */
8948
8949 if (reloc->r_offset > offset_p)
8950 {
8951 /* Find backward. */
8952 for (rel_t = reloc;
8953 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8954 /* Do nothing. */;
8955 }
8956 else if (reloc->r_offset < offset_p)
8957 {
8958 /* Find forward. */
8959 for (rel_t = reloc;
8960 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8961 /* Do nothing. */;
8962 }
8963 else
8964 rel_t = reloc;
8965
8966 /* Not found? */
8967 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8968 return irelend;
8969
8970 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8971}
8972
fbaf61ad
NC		 8973typedef struct nds32_elf_blank nds32_elf_blank_t;
8974struct nds32_elf_blank
35c08157 8975{
fbaf61ad
NC		 8976 /* Where the blank begins. */
8977 bfd_vma offset;
8978 /* The size of the blank. */
8979 bfd_vma size;
8980 /* The accumulative size before this blank. */
8981 bfd_vma total_size;
8982 nds32_elf_blank_t *next;
8983 nds32_elf_blank_t *prev;
8984};
35c08157
KLC		 8985
8986static nds32_elf_blank_t *blank_free_list = NULL;
8987
8988static nds32_elf_blank_t *
8989create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8990{
8991 nds32_elf_blank_t *blank_t;
8992
8993 if (blank_free_list)
8994 {
8995 blank_t = blank_free_list;
8996 blank_free_list = blank_free_list->next;
8997 }
8998 else
8999 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
9000
9001 if (blank_t == NULL)
9002 return NULL;
9003
9004 blank_t->offset = offset_p;
9005 blank_t->size = size_p;
9006 blank_t->total_size = 0;
9007 blank_t->next = NULL;
9008 blank_t->prev = NULL;
9009
9010 return blank_t;
9011}
9012
9013static void
9014remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
9015{
9016 if (blank_free_list)
9017 {
9018 blank_free_list->prev = blank_p;
9019 blank_p->next = blank_free_list;
9020 }
9021 else
9022 blank_p->next = NULL;
9023
9024 blank_p->prev = NULL;
9025 blank_free_list = blank_p;
9026}
9027
9028static void
9029clean_nds32_elf_blank (void)
9030{
9031 nds32_elf_blank_t *blank_t;
9032
9033 while (blank_free_list)
9034 {
9035 blank_t = blank_free_list;
9036 blank_free_list = blank_free_list->next;
9037 free (blank_t);
9038 }
9039}
9040
9041static nds32_elf_blank_t *
9042search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
9043{
9044 nds32_elf_blank_t *blank_t;
9045
9046 if (!blank_p)
9047 return NULL;
9048 blank_t = blank_p;
9049
9050 while (blank_t && addr < blank_t->offset)
9051 blank_t = blank_t->prev;
9052 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
9053 blank_t = blank_t->next;
9054
9055 return blank_t;
9056}
9057
9058static bfd_vma
9059get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
9060 int overwrite)
9061{
9062 nds32_elf_blank_t *blank_t;
9063
9064 blank_t = search_nds32_elf_blank (*blank_p, addr);
9065 if (!blank_t)
9066 return 0;
9067
9068 if (overwrite)
9069 *blank_p = blank_t;
9070
9071 if (addr < blank_t->offset + blank_t->size)
9072 return blank_t->total_size + (addr - blank_t->offset);
9073 else
9074 return blank_t->total_size + blank_t->size;
9075}
9076
0a1b45a2 9077static bool
35c08157
KLC		 9078insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
9079{
9080 nds32_elf_blank_t *blank_t, *blank_t2;
9081
9082 if (!*blank_p)
9083 {
9084 *blank_p = create_nds32_elf_blank (addr, len);
63b4cc53 9085 return *blank_p != NULL;
35c08157
KLC		 9086 }
9087
9088 blank_t = search_nds32_elf_blank (*blank_p, addr);
9089
9090 if (blank_t == NULL)
9091 {
9092 blank_t = create_nds32_elf_blank (addr, len);
9093 if (!blank_t)
0a1b45a2 9094 return false;
35c08157
KLC		 9095 while ((*blank_p)->prev != NULL)
9096 *blank_p = (*blank_p)->prev;
9097 blank_t->next = *blank_p;
9098 (*blank_p)->prev = blank_t;
9099 (*blank_p) = blank_t;
0a1b45a2 9100 return true;
35c08157
KLC		 9101 }
9102
9103 if (addr < blank_t->offset + blank_t->size)
9104 {
fbaf61ad
NC		 9105 /* Extend the origin blank. */
9106 if (addr + len > blank_t->offset + blank_t->size)
9107 blank_t->size = addr + len - blank_t->offset;
35c08157
KLC		 9108 }
9109 else
9110 {
9111 blank_t2 = create_nds32_elf_blank (addr, len);
9112 if (!blank_t2)
0a1b45a2 9113 return false;
35c08157
KLC		 9114 if (blank_t->next)
9115 {
9116 blank_t->next->prev = blank_t2;
9117 blank_t2->next = blank_t->next;
9118 }
9119 blank_t2->prev = blank_t;
9120 blank_t->next = blank_t2;
9121 *blank_p = blank_t2;
9122 }
9123
0a1b45a2 9124 return true;
35c08157
KLC		 9125}
9126
0a1b45a2 9127static bool
35c08157
KLC		 9128insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
9129 bfd_vma len)
9130{
9131 nds32_elf_blank_t *blank_t;
9132
9133 if (!insert_nds32_elf_blank (blank_p, addr, len))
0a1b45a2 9134 return false;
35c08157
KLC		 9135
9136 blank_t = *blank_p;
9137
9138 if (!blank_t->prev)
9139 {
9140 blank_t->total_size = 0;
9141 blank_t = blank_t->next;
9142 }
9143
9144 while (blank_t)
9145 {
9146 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
9147 blank_t = blank_t->next;
9148 }
9149
0a1b45a2 9150 return true;
35c08157
KLC		 9151}
9152
9153static void
9154calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
9155{
9156 nds32_elf_blank_t *blank_t;
9157 bfd_vma total_size = 0;
9158
9159 if (!blank_p)
9160 return;
9161
9162 blank_t = blank_p;
9163 while (blank_t->prev)
9164 blank_t = blank_t->prev;
9165 while (blank_t)
9166 {
9167 blank_t->total_size = total_size;
9168 total_size += blank_t->size;
9169 blank_t = blank_t->next;
9170 }
9171}
9172
0a1b45a2 9173static bool
35c08157
KLC		 9174nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
9175 nds32_elf_blank_t *blank_p)
9176{
9177 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 9178 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC		 9179 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
9180 unsigned int sec_shndx; /* The section the be relaxed. */
9181 bfd_byte *contents; /* Contents data of iterating section. */
9182 Elf_Internal_Rela *internal_relocs;
9183 Elf_Internal_Rela *irel;
9184 Elf_Internal_Rela *irelend;
9185 struct elf_link_hash_entry **sym_hashes;
9186 struct elf_link_hash_entry **end_hashes;
9187 unsigned int symcount;
9188 asection *sect;
9189 nds32_elf_blank_t *blank_t;
9190 nds32_elf_blank_t *blank_t2;
9191 nds32_elf_blank_t *blank_head;
9192
9193 blank_head = blank_t = blank_p;
9194 while (blank_head->prev != NULL)
9195 blank_head = blank_head->prev;
9196 while (blank_t->next != NULL)
9197 blank_t = blank_t->next;
9198
9199 if (blank_t->offset + blank_t->size <= sec->size)
9200 {
9201 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
9202 blank_t->next->prev = blank_t;
9203 }
9204 if (blank_head->offset > 0)
9205 {
9206 blank_head->prev = create_nds32_elf_blank (0, 0);
9207 blank_head->prev->next = blank_head;
9208 blank_head = blank_head->prev;
9209 }
9210
9211 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
9212
9213 /* The deletion must stop at the next ALIGN reloc for an alignment
9214 power larger than the number of bytes we are deleting. */
9215
9216 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
9217 if (!nds32_get_local_syms (abfd, sec, &isym))
0a1b45a2 9218 return false;
35c08157
KLC		 9219
9220 if (isym == NULL)
9221 {
9222 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
9223 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
9224 symtab_hdr->contents = (bfd_byte *) isym;
9225 }
9226
9227 if (isym == NULL || symtab_hdr->sh_info == 0)
0a1b45a2 9228 return false;
35c08157
KLC		 9229
9230 blank_t = blank_head;
9231 calc_nds32_blank_total (blank_head);
9232
9233 for (sect = abfd->sections; sect != NULL; sect = sect->next)
9234 {
9235 /* Adjust all the relocs. */
9236
9237 /* Relocations MUST be kept in memory, because relaxation adjust them. */
9238 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
0a1b45a2 9239 true /* keep_memory */);
35c08157
KLC		 9240 irelend = internal_relocs + sect->reloc_count;
9241
9242 blank_t = blank_head;
9243 blank_t2 = blank_head;
9244
9245 if (!(sect->flags & SEC_RELOC))
9246 continue;
9247
1781a9d0 9248 contents = NULL;
0a1b45a2 9249 nds32_get_section_contents (abfd, sect, &contents, true);
35c08157
KLC		 9250
9251 for (irel = internal_relocs; irel < irelend; irel++)
9252 {
9253 bfd_vma raddr;
9254
9255 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
9256 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
9257 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
9258 {
9259 unsigned long val = 0;
1c8f6a4d
KLC		 9260 unsigned long mask;
9261 long before, between;
6cae483a 9262 long offset = 0;
35c08157
KLC		 9263
9264 switch (ELF32_R_TYPE (irel->r_info))
9265 {
9266 case R_NDS32_DIFF8:
1c8f6a4d 9267 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC		 9268 break;
9269 case R_NDS32_DIFF16:
1c8f6a4d 9270 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC		 9271 break;
9272 case R_NDS32_DIFF32:
9273 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC		 9274 /* Get the signed bit and mask for the high part. The
9275 gcc will alarm when right shift 32-bit since the
9276 type size of long may be 32-bit. */
9277 mask = 0 - (val >> 31);
9278 if (mask)
9279 offset = (val | (mask - 0xffffffff));
9280 else
9281 offset = val;
35c08157
KLC		 9282 break;
9283 default:
9284 BFD_ASSERT (0);
9285 }
9286
9287 /* DIFF value
9288 0 |encoded in location|
9289 |------------|-------------------|---------
9290 sym+off(addend)
9291 -- before ---| *****************
9292 --------------------- between ---|
9293
1c8f6a4d
KLC		 9294 We only care how much data are relax between DIFF,
9295 marked as ***. */
35c08157
KLC		 9296
9297 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 9298 between = get_nds32_elf_blank_total (&blank_t,
9299 irel->r_addend + offset, 0);
35c08157
KLC		 9300 if (between == before)
9301 goto done_adjust_diff;
9302
9303 switch (ELF32_R_TYPE (irel->r_info))
9304 {
9305 case R_NDS32_DIFF8:
1c8f6a4d
KLC		 9306 bfd_put_8 (abfd, offset - (between - before),
9307 contents + irel->r_offset);
35c08157
KLC		 9308 break;
9309 case R_NDS32_DIFF16:
1c8f6a4d
KLC		 9310 bfd_put_16 (abfd, offset - (between - before),
9311 contents + irel->r_offset);
35c08157
KLC		 9312 break;
9313 case R_NDS32_DIFF32:
1c8f6a4d
KLC		 9314 bfd_put_32 (abfd, offset - (between - before),
9315 contents + irel->r_offset);
35c08157
KLC		 9316 break;
9317 }
9318 }
9319 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
9320 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
9321 {
9322 bfd_vma val = 0;
9323 unsigned int len = 0;
9324 unsigned long before, between;
9325 bfd_byte *endp, *p;
9326
4265548c
PA		 9327 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
9328 &len);
35c08157
KLC		 9329
9330 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC		 9331 between = get_nds32_elf_blank_total (&blank_t,
9332 irel->r_addend + val, 0);
35c08157
KLC		 9333 if (between == before)
9334 goto done_adjust_diff;
9335
9336 p = contents + irel->r_offset;
9337 endp = p + len -1;
9338 memset (p, 0x80, len);
9339 *(endp) = 0;
9340 p = write_uleb128 (p, val - (between - before)) - 1;
9341 if (p < endp)
9342 *p |= 0x80;
9343 }
dc1e8a47 9344 done_adjust_diff:
35c08157
KLC		 9345
9346 if (sec == sect)
9347 {
9348 raddr = irel->r_offset;
1c8f6a4d
KLC		 9349 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
9350 irel->r_offset, 1);
35c08157
KLC		 9351
9352 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
9353 continue;
9354 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC		 9355 && (blank_t2->offset > raddr
9356 || blank_t2->next->offset <= raddr))
4eca0228 9357 _bfd_error_handler
38f14ab8
AM		 9358 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
9359 abfd);
35c08157
KLC		 9360
9361 /* Mark reloc in deleted portion as NONE.
9362 For some relocs like R_NDS32_LABEL that doesn't modify the
9363 content in the section. R_NDS32_LABEL doesn't belong to the
9364 instruction in the section, so we should preserve it. */
9365 if (raddr >= blank_t2->offset
9366 && raddr < blank_t2->offset + blank_t2->size
9367 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
9368 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
9369 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
9370 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
9371 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
9372 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
9373 {
9374 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
9375 R_NDS32_NONE);
9376 continue;
9377 }
9378 }
9379
9380 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
9381 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
9382 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
9383 continue;
9384
9385 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
9386 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
9387 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
9388 {
9389 if (irel->r_addend <= sec->size)
9390 irel->r_addend -=
9391 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
9392 }
9393 }
9394 }
9395
9396 /* Adjust the local symbols defined in this section. */
9397 blank_t = blank_head;
9398 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
9399 {
9400 if (isym->st_shndx == sec_shndx)
9401 {
9402 if (isym->st_value <= sec->size)
9403 {
9404 bfd_vma ahead;
9405 bfd_vma orig_addr = isym->st_value;
9406
9407 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
9408 isym->st_value -= ahead;
9409
9410 /* Adjust function size. */
1c8f6a4d
KLC		 9411 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
9412 && isym->st_size > 0)
9413 isym->st_size -=
9414 get_nds32_elf_blank_total
9415 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC		 9416 }
9417 }
9418 }
9419
9420 /* Now adjust the global symbols defined in this section. */
9421 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
9422 - symtab_hdr->sh_info);
9423 sym_hashes = elf_sym_hashes (abfd);
9424 end_hashes = sym_hashes + symcount;
9425 blank_t = blank_head;
9426 for (; sym_hashes < end_hashes; sym_hashes++)
9427 {
9428 struct elf_link_hash_entry *sym_hash = *sym_hashes;
9429
9430 if ((sym_hash->root.type == bfd_link_hash_defined
9431 || sym_hash->root.type == bfd_link_hash_defweak)
9432 && sym_hash->root.u.def.section == sec)
9433 {
9434 if (sym_hash->root.u.def.value <= sec->size)
9435 {
9436 bfd_vma ahead;
9437 bfd_vma orig_addr = sym_hash->root.u.def.value;
9438
9439 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
9440 sym_hash->root.u.def.value -= ahead;
9441
9442 /* Adjust function size. */
9443 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC		 9444 sym_hash->size -=
9445 get_nds32_elf_blank_total
9446 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC		 9447
9448 }
9449 }
9450 }
9451
9452 contents = elf_section_data (sec)->this_hdr.contents;
9453 blank_t = blank_head;
9454 while (blank_t->next)
9455 {
9456 /* Actually delete the bytes. */
9457
9458 /* If current blank is the last blank overlap with current section,
9459 go to finish process. */
9460 if (sec->size <= (blank_t->next->offset))
9461 break;
9462
9463 memmove (contents + blank_t->offset - blank_t->total_size,
9464 contents + blank_t->offset + blank_t->size,
9465 blank_t->next->offset - (blank_t->offset + blank_t->size));
9466
9467 blank_t = blank_t->next;
9468 }
9469
9470 if (sec->size > (blank_t->offset + blank_t->size))
9471 {
9472 /* There are remaining code between blank and section boundary.
9473 Move the remaining code to appropriate location. */
9474 memmove (contents + blank_t->offset - blank_t->total_size,
9475 contents + blank_t->offset + blank_t->size,
9476 sec->size - (blank_t->offset + blank_t->size));
9477 sec->size -= blank_t->total_size + blank_t->size;
9478 }
9479 else
9480 /* This blank is not entirely included in the section,
9481 reduce the section size by only part of the blank size. */
9482 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
9483
9484 while (blank_head)
9485 {
9486 blank_t = blank_head;
9487 blank_head = blank_head->next;
9488 remove_nds32_elf_blank (blank_t);
9489 }
9490
0a1b45a2 9491 return true;
35c08157
KLC		 9492}
9493
9494/* Get the contents of a section. */
9495
9496static int
0c4bd9d9 9497nds32_get_section_contents (bfd *abfd, asection *sec,
0a1b45a2 9498 bfd_byte **contents_p, bool cache)
35c08157
KLC		 9499{
9500 /* Get the section contents. */
9501 if (elf_section_data (sec)->this_hdr.contents != NULL)
9502 *contents_p = elf_section_data (sec)->this_hdr.contents;
9503 else
9504 {
1781a9d0 9505 if (!bfd_get_full_section_contents (abfd, sec, contents_p))
0a1b45a2 9506 return false;
0c4bd9d9
KLC		 9507 if (cache)
9508 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC		 9509 }
9510
0a1b45a2 9511 return true;
35c08157
KLC		 9512}
9513
9514/* Get the contents of the internal symbol of abfd. */
9515
9516static int
9517nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
9518 Elf_Internal_Sym **isymbuf_p)
9519{
9520 Elf_Internal_Shdr *symtab_hdr;
9521 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
9522
9523 /* Read this BFD's local symbols if we haven't done so already. */
9524 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
9525 {
9526 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
9527 if (*isymbuf_p == NULL)
9528 {
9529 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
9530 symtab_hdr->sh_info, 0,
9531 NULL, NULL, NULL);
9532 if (*isymbuf_p == NULL)
0a1b45a2 9533 return false;
35c08157
KLC		 9534 }
9535 }
9536 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
9537
0a1b45a2 9538 return true;
35c08157
KLC		 9539}
9540
9541/* Range of small data. */
1c8f6a4d
KLC		 9542static bfd_vma sdata_range[2][2];
9543static bfd_vma const sdata_init_range[2] =
9544{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC		 9545
9546static int
9547nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
9548 bfd_byte *contents, bfd_vma addr)
9549{
9550 unsigned long insn = bfd_getb32 (contents + addr);
9551
9552 if (insn & 0x80000000)
9553 return 2;
9554
9555 return 4;
9556}
9557
9558/* Set the gp relax range. We have to measure the safe range
9559 to do gp relaxation. */
9560
9561static void
c410035d 9562relax_range_measurement (bfd *abfd, struct bfd_link_info *link_info)
35c08157
KLC		 9563{
9564 asection *sec_f, *sec_b;
9565 /* For upper bound. */
c410035d 9566 bfd_vma maxpgsz;
35c08157 9567 bfd_vma align;
35c08157
KLC		 9568 static int decide_relax_range = 0;
9569 int i;
fbaf61ad 9570 int range_number = ARRAY_SIZE (sdata_init_range);
35c08157
KLC		 9571
9572 if (decide_relax_range)
9573 return;
9574 decide_relax_range = 1;
9575
9576 if (sda_rela_sec == NULL)
9577 {
9578 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 9579 for (i = 0; i < range_number; i++)
35c08157
KLC		 9580 {
9581 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
9582 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
9583 }
9584 return;
9585 }
9586
9587 /* Get the biggest alignment power after the gp located section. */
9588 sec_f = sda_rela_sec->output_section;
9589 sec_b = sec_f->next;
9590 align = 0;
9591 while (sec_b != NULL)
9592 {
9593 if ((unsigned)(1 << sec_b->alignment_power) > align)
9594 align = (1 << sec_b->alignment_power);
9595 sec_b = sec_b->next;
9596 }
9597
c410035d
AM		 9598 if (link_info != NULL)
9599 maxpgsz = link_info->maxpagesize;
9600 else
9601 maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
35c08157
KLC		 9602 /* I guess we can not determine the section before
9603 gp located section, so we assume the align is max page size. */
1c8f6a4d 9604 for (i = 0; i < range_number; i++)
35c08157 9605 {
1c8f6a4d 9606 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 9607 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 9608 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC		 9609 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
9610 }
9611}
9612
9613/* These are macros used to check flags encoded in r_addend.
9614 They are only used by nds32_elf_relax_section (). */
9615#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
9616#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
9617#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
9618#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
9619
695344c0
NC		 9620static const char * unrecognized_reloc_msg =
9621 /* xgettext:c-format */
2dcf00ce 9622 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 9623
1c8f6a4d
KLC		 9624/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
9625
0a1b45a2 9626static bool
1c8f6a4d
KLC		 9627nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9628 Elf_Internal_Rela *internal_relocs, int *insn_len,
9629 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9630 Elf_Internal_Shdr *symtab_hdr)
9631{
9632 /* There are 3 variations for LONGCALL1
9633 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 9634 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9635 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9636 jral5 ta ;
1c8f6a4d
KLC		 9637
9638 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 9639 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9640 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9641 jral ta ;
1c8f6a4d
KLC		 9642
9643 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 9644 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 9645 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9646 jral ta ;
1c8f6a4d
KLC		 9647 Check code for -mlong-calls output. */
9648
9649 /* Get the reloc for the address from which the register is
9650 being loaded. This reloc will tell us which function is
9651 actually being called. */
9652
9653 bfd_vma laddr;
9654 int seq_len; /* Original length of instruction sequence. */
35c08157 9655 uint32_t insn;
1c8f6a4d 9656 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
1c8f6a4d 9657 bfd_signed_vma foff;
35c08157 9658 uint16_t insn16;
35c08157 9659
1c8f6a4d
KLC		 9660 irelend = internal_relocs + sec->reloc_count;
9661 seq_len = GET_SEQ_LEN (irel->r_addend);
9662 laddr = irel->r_offset;
9663 *insn_len = seq_len;
35c08157 9664
1c8f6a4d
KLC		 9665 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9666 R_NDS32_HI20_RELA, laddr);
9667 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9668 R_NDS32_LO12S0_ORI_RELA,
9669 laddr + 4);
35c08157 9670
1c8f6a4d 9671 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 9672 {
695344c0 9673 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 9674 (uint64_t) irel->r_offset);
0a1b45a2 9675 return false;
35c08157
KLC		 9676 }
9677
1c8f6a4d 9678 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9679 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9680
1c8f6a4d 9681 /* This condition only happened when symbol is undefined. */
fbaf61ad
NC		 9682 if (foff == 0
9683 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 9684 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 9685 return false;
35c08157 9686
fbaf61ad 9687 /* Relax to: jal symbol; 25_PCREL. */
1c8f6a4d
KLC		 9688 /* For simplicity of coding, we are going to modify the section
9689 contents, the section relocs, and the BFD symbol table. We
9690 must tell the rest of the code not to free up this
9691 information. It would be possible to instead create a table
9692 of changes which have to be made, as is done in coff-mips.c;
9693 that would be more work, but would require less memory when
9694 the linker is run. */
9695
9696 /* Replace the long call with a jal. */
9697 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9698 R_NDS32_25_PCREL_RELA);
9699 irel->r_addend = hi_irelfn->r_addend;
9700
9701 /* We don't resolve this here but resolve it in relocate_section. */
9702 insn = INSN_JAL;
9703 bfd_putb32 (insn, contents + irel->r_offset);
9704
9705 hi_irelfn->r_info =
9706 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9707 lo_irelfn->r_info =
9708 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9709 *insn_len = 4;
9710
9711 if (seq_len & 0x2)
9712 {
9713 insn16 = NDS32_NOP16;
9714 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9715 lo_irelfn->r_info =
9716 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9717 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9718 *insn_len += 2;
9719 }
0a1b45a2 9720 return true;
1c8f6a4d 9721}
35c08157 9722
1c8f6a4d
KLC		 9723#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
9724/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 9725
0a1b45a2 9726static bool
1c8f6a4d
KLC		 9727nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9728 Elf_Internal_Rela *internal_relocs, int *insn_len,
9729 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9730 Elf_Internal_Shdr *symtab_hdr)
9731{
9732 /* bltz rt, .L1 ; LONGCALL2
9733 jal symbol ; 25_PCREL
9734 .L1: */
35c08157 9735
1c8f6a4d
KLC		 9736 /* Get the reloc for the address from which the register is
9737 being loaded. This reloc will tell us which function is
9738 actually being called. */
35c08157 9739
1c8f6a4d
KLC		 9740 bfd_vma laddr;
9741 uint32_t insn;
9742 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
1c8f6a4d 9743 bfd_signed_vma foff;
35c08157 9744
1c8f6a4d
KLC		 9745 irelend = internal_relocs + sec->reloc_count;
9746 laddr = irel->r_offset;
9747 i1_irelfn =
9748 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9749 R_NDS32_25_PCREL_RELA, laddr + 4);
9750
9751 if (i1_irelfn == irelend)
35c08157 9752 {
695344c0 9753 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 9754 (uint64_t) irel->r_offset);
0a1b45a2 9755 return false;
35c08157
KLC		 9756 }
9757
1c8f6a4d 9758 insn = bfd_getb32 (contents + laddr);
35c08157 9759
1c8f6a4d 9760 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9761 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr);
35c08157 9762
fbaf61ad
NC		 9763 if (foff == 0
9764 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 9765 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 9766 return false;
35c08157 9767
1c8f6a4d
KLC		 9768 /* Relax to bgezal rt, label ; 17_PCREL
9769 or bltzal rt, label ; 17_PCREL */
9770
9771 /* Convert to complimentary conditional call. */
9772 insn = CONVERT_CONDITION_CALL (insn);
9773
9774 /* For simplicity of coding, we are going to modify the section
9775 contents, the section relocs, and the BFD symbol table. We
9776 must tell the rest of the code not to free up this
9777 information. It would be possible to instead create a table
9778 of changes which have to be made, as is done in coff-mips.c;
9779 that would be more work, but would require less memory when
9780 the linker is run. */
9781
9782 /* Clean unnessary relocations. */
9783 i1_irelfn->r_info =
9784 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
9785 cond_irelfn =
9786 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9787 R_NDS32_17_PCREL_RELA, laddr);
9788 if (cond_irelfn != irelend)
9789 cond_irelfn->r_info =
9790 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
9791
9792 /* Replace the long call with a bgezal. */
9793 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
9794 R_NDS32_17_PCREL_RELA);
9795 irel->r_addend = i1_irelfn->r_addend;
9796
9797 bfd_putb32 (insn, contents + irel->r_offset);
9798
9799 *insn_len = 4;
0a1b45a2 9800 return true;
1c8f6a4d 9801}
35c08157 9802
1c8f6a4d
KLC		 9803/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
9804
0a1b45a2 9805static bool
1c8f6a4d
KLC		 9806nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9807 Elf_Internal_Rela *internal_relocs, int *insn_len,
9808 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9809 Elf_Internal_Shdr *symtab_hdr)
9810{
9811 /* There are 3 variations for LONGCALL3
9812 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM		 9813 bltz rt, $1 ; LONGCALL3
9814 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9815 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9816 jral5 ta ;
1c8f6a4d
KLC		 9817 $1
9818
9819 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9820 bltz rt, $1 ; LONGCALL3
9821 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9822 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9823 jral ta ;
1c8f6a4d
KLC		 9824 $1
9825
9826 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9827 bltz rt, $1 ; LONGCALL3
9828 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9829 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 9830 jral ta ;
1c8f6a4d
KLC		 9831 $1 */
9832
9833 /* Get the reloc for the address from which the register is
9834 being loaded. This reloc will tell us which function is
9835 actually being called. */
9836
9837 bfd_vma laddr;
9838 int seq_len; /* Original length of instruction sequence. */
9839 uint32_t insn;
9840 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
1c8f6a4d
KLC		 9841 bfd_signed_vma foff;
9842 uint16_t insn16;
9843
9844 irelend = internal_relocs + sec->reloc_count;
9845 seq_len = GET_SEQ_LEN (irel->r_addend);
9846 laddr = irel->r_offset;
9847 *insn_len = seq_len;
9848
9849 hi_irelfn =
9850 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9851 R_NDS32_HI20_RELA, laddr + 4);
9852 lo_irelfn =
9853 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9854 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9855
9856 if (hi_irelfn == irelend || lo_irelfn == irelend)
9857 {
695344c0 9858 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9859 (uint64_t) irel->r_offset);
0a1b45a2 9860 return false;
35c08157
KLC		 9861 }
9862
1c8f6a4d 9863 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9864 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9865
fbaf61ad
NC		 9866 if (foff == 0
9867 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 9868 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 9869 return false;
35c08157 9870
1c8f6a4d
KLC		 9871 insn = bfd_getb32 (contents + laddr);
9872 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9873 {
1c8f6a4d
KLC		 9874 /* Relax to bgezal rt, label ; 17_PCREL
9875 or bltzal rt, label ; 17_PCREL */
35c08157 9876
1c8f6a4d
KLC		 9877 /* Convert to complimentary conditional call. */
9878 insn = CONVERT_CONDITION_CALL (insn);
9879 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9880
1c8f6a4d
KLC		 9881 *insn_len = 4;
9882 irel->r_info =
9883 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9884 hi_irelfn->r_info =
9885 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9886 lo_irelfn->r_info =
9887 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9888
9889 cond_irelfn =
9890 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9891 R_NDS32_17_PCREL_RELA, laddr);
9892 if (cond_irelfn != irelend)
35c08157 9893 {
1c8f6a4d
KLC		 9894 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9895 R_NDS32_17_PCREL_RELA);
9896 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9897 }
1c8f6a4d
KLC		 9898
9899 if (seq_len & 0x2)
35c08157 9900 {
1c8f6a4d
KLC		 9901 insn16 = NDS32_NOP16;
9902 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9903 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9904 R_NDS32_INSN16);
9905 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9906 insn_len += 2;
35c08157 9907 }
1c8f6a4d
KLC		 9908 }
9909 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9910 {
9911 /* Relax to the following instruction sequence
9912 bltz rt, $1 ; LONGCALL2
9913 jal symbol ; 25_PCREL
9914 $1 */
9915 *insn_len = 8;
9916 insn = INSN_JAL;
9917 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9918
1c8f6a4d
KLC		 9919 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9920 R_NDS32_25_PCREL_RELA);
9921 irel->r_info =
9922 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9923
9924 lo_irelfn->r_info =
9925 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9926
1c8f6a4d 9927 if (seq_len & 0x2)
35c08157 9928 {
1c8f6a4d
KLC		 9929 insn16 = NDS32_NOP16;
9930 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9931 lo_irelfn->r_info =
9932 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9933 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9934 insn_len += 2;
9935 }
9936 }
0a1b45a2 9937 return true;
1c8f6a4d 9938}
35c08157 9939
1c8f6a4d 9940/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9941
0a1b45a2 9942static bool
1c8f6a4d
KLC		 9943nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9944 Elf_Internal_Rela *internal_relocs, int *insn_len,
9945 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9946 Elf_Internal_Shdr *symtab_hdr)
9947{
9948 /* There are 3 variations for LONGJUMP1
9949 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM		 9950 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9951 ori ta, ta, lo12(symbol) ; LO12S0
9952 jr5 ta ;
1c8f6a4d
KLC		 9953
9954 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM		 9955 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9956 ori ta, ta, lo12(symbol) ; LO12S0
9957 jr ta ;
1c8f6a4d
KLC		 9958
9959 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM		 9960 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9961 ori ta, ta, lo12(symbol) ; LO12S0
9962 jr ta ; */
1c8f6a4d
KLC		 9963
9964 /* Get the reloc for the address from which the register is
9965 being loaded. This reloc will tell us which function is
9966 actually being called. */
9967
9968 bfd_vma laddr;
9969 int seq_len; /* Original length of instruction sequence. */
9970 int insn16_on; /* 16-bit on/off. */
9971 uint32_t insn;
9972 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
1c8f6a4d
KLC		 9973 bfd_signed_vma foff;
9974 uint16_t insn16;
9975 unsigned long reloc;
35c08157 9976
1c8f6a4d
KLC		 9977 irelend = internal_relocs + sec->reloc_count;
9978 seq_len = GET_SEQ_LEN (irel->r_addend);
9979 laddr = irel->r_offset;
9980 *insn_len = seq_len;
9981 insn16_on = IS_16BIT_ON (irel->r_addend);
9982
9983 hi_irelfn =
9984 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9985 R_NDS32_HI20_RELA, laddr);
9986 lo_irelfn =
9987 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9988 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9989 if (hi_irelfn == irelend || lo_irelfn == irelend)
9990 {
695344c0 9991 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9992 (uint64_t) irel->r_offset);
0a1b45a2 9993 return false;
1c8f6a4d 9994 }
35c08157 9995
1c8f6a4d 9996 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 9997 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 9998
fbaf61ad
NC		 9999 if (foff == 0
10000 || foff >= CONSERVATIVE_24BIT_S1
1c8f6a4d 10001 || foff < -CONSERVATIVE_24BIT_S1)
0a1b45a2 10002 return false;
35c08157 10003
fbaf61ad
NC		 10004 if (insn16_on
10005 && foff >= -ACCURATE_8BIT_S1
10006 && foff < ACCURATE_8BIT_S1
10007 && (seq_len & 0x2))
1c8f6a4d
KLC		 10008 {
10009 /* j8 label */
10010 /* 16-bit on, but not optimized for speed. */
10011 reloc = R_NDS32_9_PCREL_RELA;
10012 insn16 = INSN_J8;
10013 bfd_putb16 (insn16, contents + irel->r_offset);
10014 *insn_len = 2;
10015 irel->r_info =
10016 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10017 }
10018 else
10019 {
10020 /* j label */
10021 reloc = R_NDS32_25_PCREL_RELA;
10022 insn = INSN_J;
10023 bfd_putb32 (insn, contents + irel->r_offset);
10024 *insn_len = 4;
10025 irel->r_info =
10026 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
10027 irel->r_addend = 0;
10028 }
35c08157 10029
1c8f6a4d
KLC		 10030 hi_irelfn->r_info =
10031 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
10032 lo_irelfn->r_info =
10033 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 10034
1c8f6a4d
KLC		 10035 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
10036 {
10037 insn16 = NDS32_NOP16;
10038 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
10039 lo_irelfn->r_info =
10040 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10041 R_NDS32_INSN16);
10042 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10043 *insn_len += 2;
10044 }
0a1b45a2 10045 return true;
1c8f6a4d
KLC		 10046}
10047
10048/* Revert condition branch. This function does not check if the input
10049 instruction is condition branch or not. */
10050
10051static void
10052nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
10053 uint16_t *re_insn16, uint32_t *re_insn)
10054{
10055 uint32_t comp_insn = 0;
10056 uint16_t comp_insn16 = 0;
10057
10058 if (insn)
10059 {
10060 if (N32_OP6 (insn) == N32_OP6_BR1)
10061 {
10062 /* beqs label. */
10063 comp_insn = (insn ^ 0x4000) & 0xffffc000;
10064 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 10065 {
1c8f6a4d
KLC		 10066 /* Insn can be contracted to 16-bit implied r5. */
10067 comp_insn16 =
10068 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
10069 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 10070 }
1c8f6a4d
KLC		 10071 }
10072 else if (N32_OP6 (insn) == N32_OP6_BR3)
10073 {
10074 /* bnec $ta, imm11, label. */
10075 comp_insn = (insn ^ 0x80000) & 0xffffff00;
10076 }
10077 else
10078 {
10079 comp_insn = (insn ^ 0x10000) & 0xffffc000;
10080 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
10081 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 10082 {
1c8f6a4d 10083 if (N32_IS_RT3 (insn))
35c08157 10084 {
1c8f6a4d
KLC		 10085 /* Insn can be contracted to 16-bit. */
10086 comp_insn16 =
10087 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
10088 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
10089 }
10090 else if (N32_RT5 (insn) == REG_R15)
10091 {
10092 /* Insn can be contracted to 16-bit. */
10093 comp_insn16 =
10094 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 10095 }
35c08157
KLC		 10096 }
10097 }
1c8f6a4d
KLC		 10098 }
10099 else
10100 {
10101 switch ((insn16 & 0xf000) >> 12)
35c08157 10102 {
1c8f6a4d
KLC		 10103 case 0xc:
10104 /* beqz38 or bnez38 */
10105 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
10106 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
10107 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
10108 break;
35c08157 10109
1c8f6a4d
KLC		 10110 case 0xd:
10111 /* beqs38 or bnes38 */
10112 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
10113 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
10114 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
10115 | (REG_R5 << 15);
10116 break;
35c08157 10117
1c8f6a4d
KLC		 10118 case 0xe:
10119 /* beqzS8 or bnezS8 */
10120 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
10121 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
10122 comp_insn |= REG_R15 << 20;
10123 break;
35c08157 10124
1c8f6a4d
KLC		 10125 default:
10126 break;
10127 }
10128 }
10129 if (comp_insn && re_insn)
10130 *re_insn = comp_insn;
10131 if (comp_insn16 && re_insn16)
10132 *re_insn16 = comp_insn16;
10133}
35c08157 10134
1c8f6a4d 10135/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 10136
0a1b45a2 10137static bool
1c8f6a4d
KLC		 10138nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10139 Elf_Internal_Rela *internal_relocs, int *insn_len,
10140 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10141 Elf_Internal_Shdr *symtab_hdr)
10142{
10143 /* There are 3 variations for LONGJUMP2
10144 case 2-4; 1st insn convertible, 16-bit on,
10145 optimize off or optimize for space
10146 bnes38 rt, ra, $1 ; LONGJUMP2
10147 j label ; 25_PCREL
10148 $1:
10149
10150 case 4-4; 1st insn not convertible
10151 bne rt, ra, $1 ; LONGJUMP2
10152 j label ; 25_PCREL
10153 $1:
10154
10155 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
10156 bne rt, ra, $1 ; LONGJUMP2
10157 j label ; 25_PCREL
10158 $1: */
10159
10160 /* Get the reloc for the address from which the register is
10161 being loaded. This reloc will tell us which function is
10162 actually being called. */
10163
10164 bfd_vma laddr;
10165 int seq_len; /* Original length of instruction sequence. */
10166 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
fbaf61ad 10167 int first_size;
1c8f6a4d
KLC		 10168 unsigned int i;
10169 bfd_signed_vma foff;
10170 uint32_t insn, re_insn = 0;
10171 uint16_t insn16, re_insn16 = 0;
10172 unsigned long reloc, cond_reloc;
35c08157 10173
1c8f6a4d
KLC		 10174 enum elf_nds32_reloc_type checked_types[] =
10175 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 10176
1c8f6a4d
KLC		 10177 irelend = internal_relocs + sec->reloc_count;
10178 seq_len = GET_SEQ_LEN (irel->r_addend);
10179 laddr = irel->r_offset;
10180 *insn_len = seq_len;
10181 first_size = (seq_len == 6) ? 2 : 4;
10182
10183 i2_irelfn =
10184 find_relocs_at_address_addr (irel, internal_relocs,
10185 irelend, R_NDS32_25_PCREL_RELA,
10186 laddr + first_size);
10187
fbaf61ad 10188 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10189 {
10190 cond_irelfn =
10191 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10192 checked_types[i], laddr);
10193 if (cond_irelfn != irelend)
10194 break;
10195 }
35c08157 10196
1c8f6a4d
KLC		 10197 if (i2_irelfn == irelend || cond_irelfn == irelend)
10198 {
695344c0 10199 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 10200 (uint64_t) irel->r_offset);
0a1b45a2 10201 return false;
1c8f6a4d 10202 }
35c08157 10203
1c8f6a4d 10204 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad
NC		 10205 foff = calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr);
10206 if (foff == 0
10207 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10208 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10209 return false;
35c08157 10210
1c8f6a4d
KLC		 10211 /* Get the all corresponding instructions. */
10212 if (first_size == 4)
10213 {
10214 insn = bfd_getb32 (contents + laddr);
10215 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10216 }
10217 else
10218 {
10219 insn16 = bfd_getb16 (contents + laddr);
10220 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10221 }
35c08157 10222
1c8f6a4d
KLC		 10223 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
10224 && foff < ACCURATE_8BIT_S1 - first_size)
10225 {
10226 if (first_size == 4)
10227 {
10228 /* Don't convert it to 16-bit now, keep this as relaxable for
10229 ``label reloc; INSN16''. */
35c08157 10230
1c8f6a4d
KLC		 10231 /* Save comp_insn32 to buffer. */
10232 bfd_putb32 (re_insn, contents + irel->r_offset);
10233 *insn_len = 4;
10234 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
10235 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
10236 cond_reloc = R_NDS32_INSN16;
10237 }
10238 else
10239 {
10240 bfd_putb16 (re_insn16, contents + irel->r_offset);
10241 *insn_len = 2;
10242 reloc = R_NDS32_9_PCREL_RELA;
10243 cond_reloc = R_NDS32_NONE;
10244 }
10245 }
10246 else if (N32_OP6 (re_insn) == N32_OP6_BR1
10247 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
10248 && foff < ACCURATE_14BIT_S1 - first_size))
10249 {
10250 /* beqs label ; 15_PCREL */
10251 bfd_putb32 (re_insn, contents + irel->r_offset);
10252 *insn_len = 4;
10253 reloc = R_NDS32_15_PCREL_RELA;
10254 cond_reloc = R_NDS32_NONE;
10255 }
10256 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10257 && foff >= -CONSERVATIVE_16BIT_S1
10258 && foff < CONSERVATIVE_16BIT_S1)
10259 {
10260 /* beqz label ; 17_PCREL */
10261 bfd_putb32 (re_insn, contents + irel->r_offset);
10262 *insn_len = 4;
10263 reloc = R_NDS32_17_PCREL_RELA;
10264 cond_reloc = R_NDS32_NONE;
10265 }
10266 else
0a1b45a2 10267 return false;
35c08157 10268
1c8f6a4d
KLC		 10269 /* Set all relocations. */
10270 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
10271 irel->r_addend = i2_irelfn->r_addend;
35c08157 10272
1c8f6a4d
KLC		 10273 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
10274 cond_reloc);
10275 cond_irelfn->r_addend = 0;
35c08157 10276
1c8f6a4d
KLC		 10277 if ((seq_len ^ *insn_len ) & 0x2)
10278 {
10279 insn16 = NDS32_NOP16;
10280 bfd_putb16 (insn16, contents + irel->r_offset + 4);
10281 i2_irelfn->r_offset = 4;
10282 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10283 R_NDS32_INSN16);
10284 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10285 *insn_len += 2;
10286 }
10287 else
10288 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
10289 R_NDS32_NONE);
0a1b45a2 10290 return true;
1c8f6a4d 10291}
35c08157 10292
1c8f6a4d 10293/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 10294
0a1b45a2 10295static bool
1c8f6a4d
KLC		 10296nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10297 Elf_Internal_Rela *internal_relocs, int *insn_len,
10298 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10299 Elf_Internal_Shdr *symtab_hdr)
10300{
10301 /* There are 5 variations for LONGJUMP3
10302 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
10303 optimize off or optimize for space
07d6d2b8
AM		 10304 bnes38 rt, ra, $1 ; LONGJUMP3
10305 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10306 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10307 jr5 ta ;
10308 $1: ;
1c8f6a4d
KLC		 10309
10310 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM		 10311 bnes38 rt, ra, $1 ; LONGJUMP3
10312 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10313 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10314 jr5 ta ;
10315 $1: ; LABEL
1c8f6a4d
KLC		 10316
10317 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
10318 optimize off or optimize for space
07d6d2b8
AM		 10319 bne rt, ra, $1 ; LONGJUMP3
10320 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10321 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10322 jr5 ta ;
10323 $1: ;
1c8f6a4d
KLC		 10324
10325 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
10326 16-bit off if no INSN16
07d6d2b8
AM		 10327 bne rt, ra, $1 ; LONGJUMP3
10328 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10329 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10330 jr ta ;
10331 $1: ;
1c8f6a4d
KLC		 10332
10333 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
10334 16-bit off if no INSN16
07d6d2b8
AM		 10335 bne rt, ra, $1 ; LONGJUMP3
10336 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 10337 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM		 10338 jr ta ;
10339 $1: ; LABEL */
1c8f6a4d
KLC		 10340
10341 /* Get the reloc for the address from which the register is
10342 being loaded. This reloc will tell us which function is
10343 actually being called. */
10344 enum elf_nds32_reloc_type checked_types[] =
10345 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
10346
10347 int reloc_off = 0, cond_removed = 0, convertible;
10348 bfd_vma laddr;
10349 int seq_len; /* Original length of instruction sequence. */
10350 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
fbaf61ad 10351 int first_size;
1c8f6a4d
KLC		 10352 unsigned int i;
10353 bfd_signed_vma foff;
10354 uint32_t insn, re_insn = 0;
10355 uint16_t insn16, re_insn16 = 0;
10356 unsigned long reloc, cond_reloc;
35c08157 10357
1c8f6a4d
KLC		 10358 irelend = internal_relocs + sec->reloc_count;
10359 seq_len = GET_SEQ_LEN (irel->r_addend);
10360 laddr = irel->r_offset;
10361 *insn_len = seq_len;
35c08157 10362
1c8f6a4d 10363 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 10364
1c8f6a4d
KLC		 10365 if (convertible)
10366 first_size = 2;
10367 else
10368 first_size = 4;
10369
10370 /* Get all needed relocations. */
10371 hi_irelfn =
10372 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10373 R_NDS32_HI20_RELA, laddr + first_size);
10374 lo_irelfn =
10375 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10376 R_NDS32_LO12S0_ORI_RELA,
10377 laddr + first_size + 4);
10378
fbaf61ad 10379 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 10380 {
10381 cond_irelfn =
10382 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10383 checked_types[i], laddr);
10384 if (cond_irelfn != irelend)
10385 break;
10386 }
35c08157 10387
fbaf61ad
NC		 10388 if (hi_irelfn == irelend
10389 || lo_irelfn == irelend
10390 || cond_irelfn == irelend)
1c8f6a4d 10391 {
695344c0 10392 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 10393 (uint64_t) irel->r_offset);
0a1b45a2 10394 return false;
1c8f6a4d 10395 }
35c08157 10396
1c8f6a4d 10397 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10398 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
35c08157 10399
fbaf61ad
NC		 10400 if (foff == 0
10401 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10402 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10403 return false;
35c08157 10404
1c8f6a4d
KLC		 10405 /* Get the all corresponding instructions. */
10406 if (first_size == 4)
10407 {
10408 insn = bfd_getb32 (contents + laddr);
10409 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
10410 }
10411 else
10412 {
10413 insn16 = bfd_getb16 (contents + laddr);
10414 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10415 }
35c08157 10416
1c8f6a4d
KLC		 10417 /* For simplicity of coding, we are going to modify the section
10418 contents, the section relocs, and the BFD symbol table. We
10419 must tell the rest of the code not to free up this
10420 information. It would be possible to instead create a table
10421 of changes which have to be made, as is done in coff-mips.c;
10422 that would be more work, but would require less memory when
10423 the linker is run. */
35c08157 10424
fbaf61ad
NC		 10425 if (re_insn16
10426 && foff >= -ACCURATE_8BIT_S1 - first_size
1c8f6a4d
KLC		 10427 && foff < ACCURATE_8BIT_S1 - first_size)
10428 {
10429 if (!(seq_len & 0x2))
10430 {
10431 /* Don't convert it to 16-bit now, keep this as relaxable
10432 for ``label reloc; INSN1a''6. */
10433 /* Save comp_insn32 to buffer. */
10434 bfd_putb32 (re_insn, contents + irel->r_offset);
10435 *insn_len = 4;
10436 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
10437 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
10438 cond_reloc = R_NDS32_INSN16;
10439 }
10440 else
10441 {
10442 /* Not optimize for speed; convert sequence to 16-bit. */
10443 /* Save comp_insn16 to buffer. */
10444 bfd_putb16 (re_insn16, contents + irel->r_offset);
10445 *insn_len = 2;
10446 reloc = R_NDS32_9_PCREL_RELA;
10447 cond_reloc = R_NDS32_NONE;
10448 }
10449 cond_removed = 1;
10450 }
10451 else if (N32_OP6 (re_insn) == N32_OP6_BR1
10452 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
10453 && foff < ACCURATE_14BIT_S1 - first_size))
10454 {
10455 /* beqs label ; 15_PCREL */
10456 bfd_putb32 (re_insn, contents + irel->r_offset);
10457 *insn_len = 4;
10458 reloc = R_NDS32_15_PCREL_RELA;
10459 cond_reloc = R_NDS32_NONE;
10460 cond_removed = 1;
10461 }
10462 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10463 && foff >= -CONSERVATIVE_16BIT_S1
10464 && foff < CONSERVATIVE_16BIT_S1)
10465 {
10466 /* beqz label ; 17_PCREL */
10467 bfd_putb32 (re_insn, contents + irel->r_offset);
10468 *insn_len = 4;
10469 reloc = R_NDS32_17_PCREL_RELA;
10470 cond_reloc = R_NDS32_NONE;
10471 cond_removed = 1;
10472 }
10473 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10474 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10475 {
10476 /* Relax to one of the following 3 variations
10477
10478 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
10479 for space
10480 bnes38 rt, $1 ; LONGJUMP2
10481 j label ; 25_PCREL
10482 $1
10483
10484 case 4-4; 1st insn not convertible, others don't care
10485 bne rt, ra, $1 ; LONGJUMP2
10486 j label ; 25_PCREL
10487 $1
10488
10489 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
10490 bne rt, ra, $1 ; LONGJUMP2
10491 j label ; 25_PCREL
10492 $1 */
10493
10494 /* Offset for first instruction. */
10495
10496 /* Use j label as second instruction. */
10497 *insn_len = 4 + first_size;
10498 insn = INSN_J;
10499 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
10500 reloc = R_NDS32_LONGJUMP2;
10501 cond_reloc = R_NDS32_25_PLTREL;
10502 }
10503 else
0a1b45a2 10504 return false;
35c08157 10505
1c8f6a4d
KLC		 10506 if (cond_removed == 1)
10507 {
10508 /* Set all relocations. */
10509 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
10510 irel->r_addend = hi_irelfn->r_addend;
10511
10512 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
10513 cond_reloc);
10514 cond_irelfn->r_addend = 0;
10515 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10516 R_NDS32_NONE);
10517 }
10518 else
10519 {
10520 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
fbaf61ad 10521 irel->r_addend = irel->r_addend;
1c8f6a4d
KLC		 10522 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
10523 cond_reloc);
10524 }
35c08157 10525
1c8f6a4d
KLC		 10526 if ((seq_len ^ *insn_len ) & 0x2)
10527 {
10528 insn16 = NDS32_NOP16;
10529 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
10530 lo_irelfn->r_offset = *insn_len;
10531 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10532 R_NDS32_INSN16);
10533 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10534 *insn_len += 2;
10535 }
10536 else
10537 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
10538 R_NDS32_NONE);
0a1b45a2 10539 return true;
1c8f6a4d 10540}
35c08157 10541
1c8f6a4d 10542/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 10543
0a1b45a2 10544static bool
1c8f6a4d
KLC		 10545nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10546 Elf_Internal_Rela *internal_relocs, int *insn_len,
10547 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10548 Elf_Internal_Shdr *symtab_hdr)
10549{
10550 /* The pattern for LONGCALL4. Support for function cse.
10551 sethi ta, hi20(symbol) ; LONGCALL4/HI20
10552 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10553 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 10554
1c8f6a4d
KLC		 10555 bfd_vma laddr;
10556 uint32_t insn;
10557 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
10558 Elf_Internal_Rela *irelend;
1c8f6a4d 10559 bfd_signed_vma foff;
35c08157 10560
1c8f6a4d
KLC		 10561 irelend = internal_relocs + sec->reloc_count;
10562 laddr = irel->r_offset;
35c08157 10563
1c8f6a4d
KLC		 10564 /* Get the reloc for the address from which the register is
10565 being loaded. This reloc will tell us which function is
10566 actually being called. */
10567 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10568 R_NDS32_HI20_RELA, laddr);
35c08157 10569
1c8f6a4d
KLC		 10570 if (hi_irel == irelend)
10571 {
695344c0 10572 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 10573 (uint64_t) irel->r_offset);
0a1b45a2 10574 return false;
1c8f6a4d 10575 }
35c08157 10576
1c8f6a4d 10577 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10578 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
35c08157 10579
1c8f6a4d 10580 /* This condition only happened when symbol is undefined. */
fbaf61ad
NC		 10581 if (foff == 0
10582 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10583 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10584 return false;
35c08157 10585
fbaf61ad 10586 /* Relax to: jal symbol; 25_PCREL. */
1c8f6a4d
KLC		 10587 /* For simplicity of coding, we are going to modify the section
10588 contents, the section relocs, and the BFD symbol table. We
10589 must tell the rest of the code not to free up this
10590 information. It would be possible to instead create a table
10591 of changes which have to be made, as is done in coff-mips.c;
10592 that would be more work, but would require less memory when
10593 the linker is run. */
35c08157 10594
1c8f6a4d
KLC		 10595 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10596 R_NDS32_PTR_RESOLVED, irel->r_addend);
10597 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10598 R_NDS32_EMPTY, irel->r_addend);
35c08157 10599
1c8f6a4d
KLC		 10600 if (ptr_irel == irelend || em_irel == irelend)
10601 {
695344c0 10602 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 10603 (uint64_t) irel->r_offset);
0a1b45a2 10604 return false;
1c8f6a4d
KLC		 10605 }
10606 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10607 insn = bfd_getb32 (contents + irel->r_addend);
10608 if (insn & 0x80000000)
0a1b45a2 10609 return false;
35c08157 10610
1c8f6a4d
KLC		 10611 /* Replace the long call with a jal. */
10612 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10613 R_NDS32_25_PCREL_RELA);
10614 ptr_irel->r_addend = 1;
35c08157 10615
1c8f6a4d
KLC		 10616 /* We don't resolve this here but resolve it in relocate_section. */
10617 insn = INSN_JAL;
10618 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10619
1c8f6a4d
KLC		 10620 irel->r_info =
10621 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10622
1c8f6a4d
KLC		 10623 /* If there is function cse, HI20 can not remove now. */
10624 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10625 R_NDS32_LONGCALL4, laddr);
10626 if (call_irel == irelend)
10627 {
10628 *insn_len = 0;
10629 hi_irel->r_info =
10630 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10631 }
35c08157 10632
1c8f6a4d
KLC		 10633 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10634 R_NDS32_INSN16, irel->r_addend);
10635 if (insn_irel != irelend)
10636 insn_irel->r_info =
10637 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10638
0a1b45a2 10639 return true;
1c8f6a4d 10640}
35c08157 10641
1c8f6a4d 10642/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 10643
0a1b45a2 10644static bool
1c8f6a4d
KLC		 10645nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10646 Elf_Internal_Rela *internal_relocs, int *insn_len,
10647 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10648 Elf_Internal_Shdr *symtab_hdr)
10649{
10650 /* The pattern for LONGCALL5.
10651 bltz rt, .L1 ; LONGCALL5/17_PCREL
10652 jal symbol ; 25_PCREL
10653 .L1: */
35c08157 10654
1c8f6a4d
KLC		 10655 bfd_vma laddr;
10656 uint32_t insn;
10657 Elf_Internal_Rela *cond_irel, *irelend;
1c8f6a4d 10658 bfd_signed_vma foff;
35c08157 10659
1c8f6a4d
KLC		 10660 irelend = internal_relocs + sec->reloc_count;
10661 laddr = irel->r_offset;
10662 insn = bfd_getb32 (contents + laddr);
35c08157 10663
1c8f6a4d
KLC		 10664 /* Get the reloc for the address from which the register is
10665 being loaded. This reloc will tell us which function is
10666 actually being called. */
10667 cond_irel =
10668 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10669 R_NDS32_25_PCREL_RELA, irel->r_addend);
10670 if (cond_irel == irelend)
10671 {
695344c0 10672 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 10673 (uint64_t) irel->r_offset);
0a1b45a2 10674 return false;
1c8f6a4d 10675 }
35c08157 10676
1c8f6a4d 10677 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10678 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 10679
fbaf61ad
NC		 10680 if (foff == 0
10681 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10682 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10683 return false;
35c08157 10684
1c8f6a4d 10685 /* Relax to bgezal rt, label ; 17_PCREL
fbaf61ad 10686 or bltzal rt, label ; 17_PCREL. */
35c08157 10687
1c8f6a4d
KLC		 10688 /* Convert to complimentary conditional call. */
10689 insn = CONVERT_CONDITION_CALL (insn);
35c08157 10690
1c8f6a4d
KLC		 10691 /* For simplicity of coding, we are going to modify the section
10692 contents, the section relocs, and the BFD symbol table. We
10693 must tell the rest of the code not to free up this
10694 information. It would be possible to instead create a table
10695 of changes which have to be made, as is done in coff-mips.c;
10696 that would be more work, but would require less memory when
10697 the linker is run. */
35c08157 10698
1c8f6a4d
KLC		 10699 /* Modify relocation and contents. */
10700 cond_irel->r_info =
10701 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 10702
1c8f6a4d
KLC		 10703 /* Replace the long call with a bgezal. */
10704 bfd_putb32 (insn, contents + cond_irel->r_offset);
10705 *insn_len = 0;
35c08157 10706
1c8f6a4d
KLC		 10707 /* Clean unnessary relocations. */
10708 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10709
1c8f6a4d
KLC		 10710 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10711 R_NDS32_17_PCREL_RELA, laddr);
10712 cond_irel->r_info =
10713 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10714
0a1b45a2 10715 return true;
1c8f6a4d 10716}
35c08157 10717
1c8f6a4d 10718/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 10719
0a1b45a2 10720static bool
1c8f6a4d
KLC		 10721nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10722 Elf_Internal_Rela *internal_relocs, int *insn_len,
10723 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10724 Elf_Internal_Shdr *symtab_hdr)
10725{
10726 /* The pattern for LONGCALL6.
10727 bltz rt, .L1 ; LONGCALL6/17_PCREL
10728 sethi ta, hi20(symbol) ; HI20/PTR
10729 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10730 jral ta ; PTR_RES/EMPTY/INSN16
10731 .L1 */
10732
10733 bfd_vma laddr;
10734 uint32_t insn;
10735 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
1c8f6a4d 10736 bfd_signed_vma foff;
35c08157 10737
1c8f6a4d
KLC		 10738 irelend = internal_relocs + sec->reloc_count;
10739 laddr = irel->r_offset;
35c08157 10740
1c8f6a4d
KLC		 10741 /* Get the reloc for the address from which the register is
10742 being loaded. This reloc will tell us which function is
10743 actually being called. */
10744 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10745 R_NDS32_EMPTY, irel->r_addend);
35c08157 10746
1c8f6a4d
KLC		 10747 if (em_irel == irelend)
10748 {
695344c0 10749 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 10750 (uint64_t) irel->r_offset);
0a1b45a2 10751 return false;
1c8f6a4d 10752 }
35c08157 10753
1c8f6a4d 10754 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10755 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
35c08157 10756
fbaf61ad
NC		 10757 if (foff == 0
10758 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 10759 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 10760 return false;
35c08157 10761
1c8f6a4d
KLC		 10762 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
10763 insn = bfd_getb32 (contents + irel->r_addend);
10764 if (insn & 0x80000000)
0a1b45a2 10765 return false;
35c08157 10766
1c8f6a4d
KLC		 10767 insn = bfd_getb32 (contents + laddr);
10768 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10769 {
10770 /* Relax to bgezal rt, label ; 17_PCREL
fbaf61ad 10771 or bltzal rt, label ; 17_PCREL. */
35c08157 10772
1c8f6a4d
KLC		 10773 /* Convert to complimentary conditional call. */
10774 *insn_len = 0;
10775 insn = CONVERT_CONDITION_CALL (insn);
10776 bfd_putb32 (insn, contents + em_irel->r_offset);
10777
10778 em_irel->r_info =
10779 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
10780
10781 /* Set resolved relocation. */
10782 cond_irel =
10783 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10784 R_NDS32_PTR_RESOLVED, irel->r_addend);
10785 if (cond_irel == irelend)
35c08157 10786 {
695344c0 10787 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10788 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
0a1b45a2 10789 return false;
1c8f6a4d
KLC		 10790 }
10791 cond_irel->r_addend = 1;
35c08157 10792
1c8f6a4d 10793 /* Clear relocations. */
35c08157 10794
1c8f6a4d
KLC		 10795 irel->r_info =
10796 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10797
1c8f6a4d
KLC		 10798 cond_irel =
10799 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10800 R_NDS32_17_PCREL_RELA, laddr);
10801 if (cond_irel != irelend)
10802 cond_irel->r_info =
10803 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10804
1c8f6a4d
KLC		 10805 cond_irel =
10806 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10807 R_NDS32_INSN16, irel->r_addend);
10808 if (cond_irel != irelend)
10809 cond_irel->r_info =
10810 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10811
1c8f6a4d
KLC		 10812 }
10813 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
10814 {
10815 /* Relax to the following instruction sequence
10816 bltz rt, .L1 ; LONGCALL2/17_PCREL
10817 jal symbol ; 25_PCREL/PTR_RES
10818 .L1 */
10819 *insn_len = 4;
10820 /* Convert instruction. */
10821 insn = INSN_JAL;
10822 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10823
1c8f6a4d
KLC		 10824 /* Convert relocations. */
10825 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
10826 R_NDS32_25_PCREL_RELA);
10827 irel->r_info =
10828 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 10829
1c8f6a4d
KLC		 10830 /* Set resolved relocation. */
10831 cond_irel =
10832 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10833 R_NDS32_PTR_RESOLVED, irel->r_addend);
10834 if (cond_irel == irelend)
10835 {
695344c0 10836 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 10837 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
0a1b45a2 10838 return false;
1c8f6a4d
KLC		 10839 }
10840 cond_irel->r_addend = 1;
35c08157 10841
1c8f6a4d
KLC		 10842 cond_irel =
10843 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10844 R_NDS32_INSN16, irel->r_addend);
10845 if (cond_irel != irelend)
10846 cond_irel->r_info =
10847 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
10848 }
0a1b45a2 10849 return true;
1c8f6a4d 10850}
35c08157 10851
1c8f6a4d 10852/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10853
0a1b45a2 10854static bool
1c8f6a4d
KLC		 10855nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10856 Elf_Internal_Rela *internal_relocs, int *insn_len,
10857 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10858 Elf_Internal_Shdr *symtab_hdr)
10859{
10860 /* The pattern for LONGJUMP4.
10861 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10862 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10863 jr ta ; PTR_RES/INSN16/EMPTY */
10864
10865 bfd_vma laddr;
10866 int seq_len; /* Original length of instruction sequence. */
10867 uint32_t insn;
10868 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
1c8f6a4d 10869 bfd_signed_vma foff;
35c08157 10870
1c8f6a4d
KLC		 10871 irelend = internal_relocs + sec->reloc_count;
10872 seq_len = GET_SEQ_LEN (irel->r_addend);
10873 laddr = irel->r_offset;
10874 *insn_len = seq_len;
35c08157 10875
1c8f6a4d
KLC		 10876 /* Get the reloc for the address from which the register is
10877 being loaded. This reloc will tell us which function is
10878 actually being called. */
35c08157 10879
1c8f6a4d
KLC		 10880 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10881 R_NDS32_HI20_RELA, laddr);
35c08157 10882
1c8f6a4d
KLC		 10883 if (hi_irel == irelend)
10884 {
695344c0 10885 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10886 (uint64_t) irel->r_offset);
0a1b45a2 10887 return false;
1c8f6a4d 10888 }
35c08157 10889
1c8f6a4d 10890 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10891 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
35c08157 10892
fbaf61ad
NC		 10893 if (foff == 0
10894 || foff >= CONSERVATIVE_24BIT_S1
1c8f6a4d 10895 || foff < -CONSERVATIVE_24BIT_S1)
0a1b45a2 10896 return false;
35c08157 10897
1c8f6a4d
KLC		 10898 /* Convert it to "j label", it may be converted to j8 in the final
10899 pass of relaxation. Therefore, we do not consider this currently. */
10900 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10901 R_NDS32_PTR_RESOLVED, irel->r_addend);
10902 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10903 R_NDS32_EMPTY, irel->r_addend);
35c08157 10904
1c8f6a4d
KLC		 10905 if (ptr_irel == irelend || em_irel == irelend)
10906 {
695344c0 10907 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10908 (uint64_t) irel->r_offset);
0a1b45a2 10909 return false;
1c8f6a4d 10910 }
35c08157 10911
1c8f6a4d
KLC		 10912 em_irel->r_info =
10913 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10914 ptr_irel->r_addend = 1;
35c08157 10915
1c8f6a4d
KLC		 10916 /* Write instruction. */
10917 insn = INSN_J;
10918 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10919
1c8f6a4d
KLC		 10920 /* Clear relocations. */
10921 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10922
1c8f6a4d
KLC		 10923 /* If there is function cse, HI20 can not remove now. */
10924 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10925 R_NDS32_LONGJUMP4, laddr);
10926 if (call_irel == irelend)
10927 {
10928 *insn_len = 0;
10929 hi_irel->r_info =
10930 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10931 }
35c08157 10932
0a1b45a2 10933 return true;
1c8f6a4d 10934}
35c08157 10935
1c8f6a4d 10936/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10937
0a1b45a2 10938static bool
1c8f6a4d
KLC		 10939nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10940 Elf_Internal_Rela *internal_relocs, int *insn_len,
10941 int *seq_len, bfd_byte *contents,
10942 Elf_Internal_Sym *isymbuf,
10943 Elf_Internal_Shdr *symtab_hdr)
10944{
10945 /* There are 2 variations for LONGJUMP5
10946 case 2-4; 1st insn convertible, 16-bit on.
10947 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10948 j label ; 25_PCREL/INSN16
10949 $1:
10950
10951 case 4-4; 1st insn not convertible
10952 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10953 j label ; 25_PCREL/INSN16
10954 .L1: */
10955
10956 bfd_vma laddr;
10957 Elf_Internal_Rela *cond_irel, *irelend;
1c8f6a4d
KLC		 10958 unsigned int i;
10959 bfd_signed_vma foff;
10960 uint32_t insn, re_insn = 0;
10961 uint16_t insn16, re_insn16 = 0;
10962 unsigned long reloc;
35c08157 10963
1c8f6a4d
KLC		 10964 enum elf_nds32_reloc_type checked_types[] =
10965 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10966 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10967
1c8f6a4d
KLC		 10968 irelend = internal_relocs + sec->reloc_count;
10969 laddr = irel->r_offset;
35c08157 10970
1c8f6a4d
KLC		 10971 /* Get the reloc for the address from which the register is
10972 being loaded. This reloc will tell us which function is
10973 actually being called. */
35c08157 10974
1c8f6a4d
KLC		 10975 cond_irel =
10976 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10977 R_NDS32_25_PCREL_RELA, irel->r_addend);
10978 if (cond_irel == irelend)
10979 {
695344c0 10980 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10981 (uint64_t) irel->r_offset);
0a1b45a2 10982 return false;
1c8f6a4d 10983 }
35c08157 10984
1c8f6a4d 10985 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 10986 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 10987
fbaf61ad
NC		 10988 if (foff == 0
10989 || foff < -CONSERVATIVE_16BIT_S1
1c8f6a4d 10990 || foff >= CONSERVATIVE_16BIT_S1)
0a1b45a2 10991 return false;
35c08157 10992
1c8f6a4d
KLC		 10993 /* Get the all corresponding instructions. */
10994 insn = bfd_getb32 (contents + laddr);
10995 /* Check instruction size. */
10996 if (insn & 0x80000000)
10997 {
10998 *seq_len = 0;
10999 insn16 = insn >> 16;
11000 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
11001 }
11002 else
11003 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 11004
1c8f6a4d
KLC		 11005 if (N32_OP6 (re_insn) == N32_OP6_BR1
11006 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
11007 {
11008 /* beqs label ; 15_PCREL. */
11009 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
11010 reloc = R_NDS32_15_PCREL_RELA;
11011 }
11012 else if (N32_OP6 (re_insn) == N32_OP6_BR2
11013 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
11014 {
11015 /* beqz label ; 17_PCREL. */
11016 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
11017 reloc = R_NDS32_17_PCREL_RELA;
11018 }
11019 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
11020 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
11021 {
11022 /* beqc label ; 9_PCREL. */
11023 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
11024 reloc = R_NDS32_WORD_9_PCREL_RELA;
11025 }
11026 else
0a1b45a2 11027 return false;
35c08157 11028
1c8f6a4d
KLC		 11029 /* Set all relocations. */
11030 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 11031
1c8f6a4d
KLC		 11032 /* Clean relocations. */
11033 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
fbaf61ad 11034 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11035 {
11036 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11037 checked_types[i], laddr);
11038 if (cond_irel != irelend)
11039 {
11040 if (*seq_len == 0
11041 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 11042 {
1c8f6a4d
KLC		 11043 /* If the branch instruction is 2 byte, it cannot remove
11044 directly. Only convert it to nop16 and remove it after
11045 checking alignment issue. */
11046 insn16 = NDS32_NOP16;
11047 bfd_putb16 (insn16, contents + laddr);
11048 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC		 11049 }
11050 else
1c8f6a4d
KLC		 11051 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11052 R_NDS32_NONE);
35c08157 11053 }
1c8f6a4d
KLC		 11054 }
11055 *insn_len = 0;
35c08157 11056
0a1b45a2 11057 return true;
1c8f6a4d 11058}
35c08157 11059
1c8f6a4d 11060/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 11061
0a1b45a2 11062static bool
1c8f6a4d
KLC		 11063nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11064 Elf_Internal_Rela *internal_relocs, int *insn_len,
11065 int *seq_len, bfd_byte *contents,
11066 Elf_Internal_Sym *isymbuf,
11067 Elf_Internal_Shdr *symtab_hdr)
11068{
11069 /* There are 5 variations for LONGJUMP6
11070 case : 2-4-4-4; 1st insn convertible, 16-bit on.
11071 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
11072 sethi ta, hi20(symbol) ; HI20/PTR
11073 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
11074 jr ta ; PTR_RES/INSN16/EMPTY
11075 .L1:
11076
11077 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
11078 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
11079 sethi ta, hi20(symbol) ; HI20/PTR
11080 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
11081 jr ta ; PTR_RES/INSN16/EMPTY
11082 .L1: */
11083
11084 enum elf_nds32_reloc_type checked_types[] =
11085 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
11086 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
11087
11088 int reloc_off = 0, cond_removed = 0;
11089 bfd_vma laddr;
11090 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
1c8f6a4d
KLC		 11091 unsigned int i;
11092 bfd_signed_vma foff;
11093 uint32_t insn, re_insn = 0;
11094 uint16_t insn16, re_insn16 = 0;
11095 unsigned long reloc;
35c08157 11096
1c8f6a4d
KLC		 11097 irelend = internal_relocs + sec->reloc_count;
11098 laddr = irel->r_offset;
35c08157 11099
1c8f6a4d
KLC		 11100 /* Get the reloc for the address from which the register is
11101 being loaded. This reloc will tell us which function is
11102 actually being called. */
11103 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11104 R_NDS32_EMPTY, irel->r_addend);
35c08157 11105
1c8f6a4d
KLC		 11106 if (em_irel == irelend)
11107 {
695344c0 11108 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 11109 (uint64_t) irel->r_offset);
0a1b45a2 11110 return false;
1c8f6a4d 11111 }
35c08157 11112
1c8f6a4d 11113 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 11114 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
35c08157 11115
fbaf61ad
NC		 11116 if (foff == 0
11117 || foff < -CONSERVATIVE_24BIT_S1
1c8f6a4d 11118 || foff >= CONSERVATIVE_24BIT_S1)
0a1b45a2 11119 return false;
35c08157 11120
1c8f6a4d
KLC		 11121 insn = bfd_getb32 (contents + laddr);
11122 /* Check instruction size. */
11123 if (insn & 0x80000000)
11124 {
11125 *seq_len = 0;
11126 insn16 = insn >> 16;
11127 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
11128 }
11129 else
11130 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 11131
1c8f6a4d
KLC		 11132 /* For simplicity of coding, we are going to modify the section
11133 contents, the section relocs, and the BFD symbol table. We
11134 must tell the rest of the code not to free up this
11135 information. It would be possible to instead create a table
11136 of changes which have to be made, as is done in coff-mips.c;
11137 that would be more work, but would require less memory when
11138 the linker is run. */
35c08157 11139
1c8f6a4d
KLC		 11140 if (N32_OP6 (re_insn) == N32_OP6_BR1
11141 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
11142 {
fbaf61ad 11143 /* beqs label ; 15_PCREL. */
1c8f6a4d
KLC		 11144 bfd_putb32 (re_insn, contents + em_irel->r_offset);
11145 reloc = R_NDS32_15_PCREL_RELA;
11146 cond_removed = 1;
11147 }
11148 else if (N32_OP6 (re_insn) == N32_OP6_BR2
11149 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
11150 {
fbaf61ad 11151 /* beqz label ; 17_PCREL. */
1c8f6a4d
KLC		 11152 bfd_putb32 (re_insn, contents + em_irel->r_offset);
11153 reloc = R_NDS32_17_PCREL_RELA;
11154 cond_removed = 1;
11155 }
11156 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
11157 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
11158 {
11159 /* Relax to one of the following 2 variations
35c08157 11160
1c8f6a4d
KLC		 11161 case 2-4; 1st insn convertible, 16-bit on.
11162 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
11163 j label ; 25_PCREL/INSN16
11164 $1:
35c08157 11165
1c8f6a4d
KLC		 11166 case 4-4; 1st insn not convertible
11167 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
11168 j label ; 25_PCREL/INSN16
11169 .L1: */
35c08157 11170
1c8f6a4d
KLC		 11171 /* Use j label as second instruction. */
11172 insn = INSN_J;
11173 reloc = R_NDS32_25_PCREL_RELA;
11174 bfd_putb32 (insn, contents + em_irel->r_offset);
11175 }
11176 else
0a1b45a2 11177 return false;
35c08157 11178
1c8f6a4d
KLC		 11179 /* Set all relocations. */
11180 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 11181
1c8f6a4d
KLC		 11182 cond_irel =
11183 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11184 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
11185 cond_irel->r_addend = 1;
35c08157 11186
1c8f6a4d
KLC		 11187 /* Use INSN16 of first branch instruction to distinguish if keeping
11188 INSN16 of final instruction or not. */
11189 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11190 R_NDS32_INSN16, irel->r_offset);
11191 if (insn_irel == irelend)
11192 {
11193 /* Clean the final INSN16. */
11194 insn_irel =
11195 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11196 R_NDS32_INSN16, em_irel->r_offset);
11197 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11198 R_NDS32_NONE);
11199 }
11200
11201 if (cond_removed == 1)
11202 {
11203 *insn_len = 0;
11204
11205 /* Clear relocations. */
11206 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11207
fbaf61ad 11208 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11209 {
11210 cond_irel =
11211 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11212 checked_types[i], laddr);
11213 if (cond_irel != irelend)
35c08157 11214 {
1c8f6a4d
KLC		 11215 if (*seq_len == 0
11216 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
11217 {
11218 /* If the branch instruction is 2 byte, it cannot remove
11219 directly. Only convert it to nop16 and remove it after
11220 checking alignment issue. */
11221 insn16 = NDS32_NOP16;
11222 bfd_putb16 (insn16, contents + laddr);
11223 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
11224 }
11225 else
11226 cond_irel->r_info =
11227 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 11228 }
35c08157 11229 }
1c8f6a4d
KLC		 11230 }
11231 else
11232 {
11233 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11234 R_NDS32_LONGJUMP5);
11235 }
35c08157 11236
0a1b45a2 11237 return true;
1c8f6a4d 11238}
35c08157 11239
1c8f6a4d 11240/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 11241
0a1b45a2 11242static bool
1c8f6a4d
KLC		 11243nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11244 Elf_Internal_Rela *internal_relocs, int *insn_len,
11245 int *seq_len, bfd_byte *contents,
11246 Elf_Internal_Sym *isymbuf,
11247 Elf_Internal_Shdr *symtab_hdr)
11248{
11249 /* There are 2 variations for LONGJUMP5
11250 case 2-4; 1st insn convertible, 16-bit on.
11251 movi55 ta, imm11 ; LONGJUMP7/INSN16
11252 beq rt, ta, label ; 15_PCREL
11253
11254 case 4-4; 1st insn not convertible
11255 movi55 ta, imm11 ; LONGJUMP7/INSN16
11256 beq rt, ta, label ; 15_PCREL */
11257
11258 bfd_vma laddr;
11259 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
1c8f6a4d
KLC		 11260 bfd_signed_vma foff;
11261 uint32_t insn, re_insn = 0;
11262 uint16_t insn16;
11263 uint32_t imm11;
35c08157 11264
1c8f6a4d
KLC		 11265 irelend = internal_relocs + sec->reloc_count;
11266 laddr = irel->r_offset;
35c08157 11267
1c8f6a4d
KLC		 11268 /* Get the reloc for the address from which the register is
11269 being loaded. This reloc will tell us which function is
11270 actually being called. */
35c08157 11271
1c8f6a4d
KLC		 11272 cond_irel =
11273 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11274 R_NDS32_15_PCREL_RELA, irel->r_addend);
11275 if (cond_irel == irelend)
11276 {
695344c0 11277 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 11278 (uint64_t) irel->r_offset);
0a1b45a2 11279 return false;
1c8f6a4d 11280 }
35c08157 11281
1c8f6a4d 11282 /* Get the value of the symbol referred to by the reloc. */
fbaf61ad 11283 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
35c08157 11284
fbaf61ad
NC		 11285 if (foff == 0
11286 || foff < -CONSERVATIVE_8BIT_S1
1c8f6a4d 11287 || foff >= CONSERVATIVE_8BIT_S1)
0a1b45a2 11288 return false;
35c08157 11289
1c8f6a4d
KLC		 11290 /* Get the first instruction for its size. */
11291 insn = bfd_getb32 (contents + laddr);
11292 if (insn & 0x80000000)
11293 {
11294 *seq_len = 0;
11295 /* Get the immediate from movi55. */
11296 imm11 = N16_IMM5S (insn >> 16);
11297 }
11298 else
11299 {
11300 /* Get the immediate from movi. */
11301 imm11 = N32_IMM20S (insn);
35c08157
KLC		 11302 }
11303
1c8f6a4d
KLC		 11304 /* Get the branch instruction. */
11305 insn = bfd_getb32 (contents + irel->r_addend);
11306 /* Convert instruction to BR3. */
11307 if ((insn >> 14) & 0x1)
11308 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
11309 else
11310 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 11311
1c8f6a4d 11312 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 11313
1c8f6a4d
KLC		 11314 /* Set all relocations. */
11315 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11316 R_NDS32_WORD_9_PCREL_RELA);
11317
11318 /* Clean relocations. */
11319 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11320 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11321 R_NDS32_INSN16, irel->r_offset);
11322 if (insn_irel != irelend)
11323 {
11324 if (*seq_len == 0)
35c08157 11325 {
1c8f6a4d
KLC		 11326 /* If the first insntruction is 16bit, convert it to nop16. */
11327 insn16 = NDS32_NOP16;
11328 bfd_putb16 (insn16, contents + laddr);
11329 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 11330 }
1c8f6a4d
KLC		 11331 else
11332 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
11333 R_NDS32_NONE);
35c08157 11334 }
1c8f6a4d 11335 *insn_len = 0;
35c08157 11336
0a1b45a2 11337 return true;
1c8f6a4d 11338}
35c08157 11339
fbaf61ad
NC		 11340/* We figure out and reassign the best gp value in nds32_elf_final_sda_base
11341 for each relax round. But the gp may changed dramatically and then cause
11342 the truncated to fit errors for the the converted gp instructions.
11343 Therefore, we must reserve the minimum but safe enough size to prevent it. */
11344
0a1b45a2 11345static bool
fbaf61ad 11346nds32_elf_relax_guard (bfd_vma *access_addr, bfd_vma local_sda, asection *sec,
0a1b45a2
AM		 11347 Elf_Internal_Rela *irel, bool *again,
11348 bool init,
fbaf61ad
NC		 11349 struct elf_nds32_link_hash_table *table,
11350 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
11351
11352{
11353 int offset_to_gp;
0a1b45a2 11354 static bool sec_pass = false;
fbaf61ad
NC		 11355 static asection *first_sec = NULL, *sym_sec;
11356 /* Record the number of instructions which may be removed. */
11357 static int count = 0, record_count;
11358 Elf_Internal_Sym *isym;
11359 struct elf_link_hash_entry *h = NULL;
11360 int indx;
11361 unsigned long r_symndx;
11362 bfd *abfd = sec->owner;
11363 static bfd_vma record_sda = 0;
11364 int sda_offset = 0;
11365
11366 /* Force doing relaxation when hyper-relax is high. */
11367 if (table->hyper_relax == 2)
0a1b45a2 11368 return true;
fbaf61ad
NC		 11369
11370 /* Do not relax the load/store patterns for the first
11371 relax round. */
11372 if (init)
11373 {
11374 if (!first_sec)
11375 first_sec = sec;
11376 else if (first_sec == sec)
11377 {
11378 record_count = count;
11379 count = 0;
0a1b45a2 11380 sec_pass = true;
fbaf61ad
NC		 11381 }
11382
11383 if (!sec_pass)
0a1b45a2 11384 *again = true;
fbaf61ad 11385
0a1b45a2 11386 return true;
fbaf61ad
NC		 11387 }
11388
11389 /* Generally, _SDA_BASE_ is fixed or smaller. But the large
11390 DATA_SEGMENT_ALIGN size in the linker script may make it
11391 get even bigger. */
11392 if (record_sda == 0)
11393 record_sda = local_sda;
11394 else if (local_sda > record_sda)
11395 sda_offset = local_sda - record_sda;
11396
11397 /* Assume the instruction will be removed in the best case. */
11398 count++;
11399
11400 /* We record the offset to gp for each symbol, and then check
11401 if it is changed dramatically after relaxing.
11402 (global symbol): elf32_nds32_hash_entry (h)->offset_to_gp
11403 (local symbol) : elf32_nds32_local_gp_offset (abfd)[r_symndx]. */
11404 r_symndx = ELF32_R_SYM (irel->r_info);
11405 if (r_symndx >= symtab_hdr->sh_info)
11406 {
11407 /* Global symbols. */
11408 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11409 h = elf_sym_hashes (abfd)[indx];
11410 sym_sec = h->root.u.def.section;
11411 if (NDS32_GUARD_SEC_P (sym_sec->flags)
11412 || bfd_is_abs_section (sym_sec))
11413 {
11414 /* Forbid doing relaxation when hyper-relax is low. */
11415 if (table->hyper_relax == 0)
0a1b45a2 11416 return false;
fbaf61ad
NC		 11417
11418 offset_to_gp = *access_addr - local_sda;
11419 if (elf32_nds32_hash_entry (h)->offset_to_gp == 0)
11420 elf32_nds32_hash_entry (h)->offset_to_gp = offset_to_gp;
11421 else if (abs (elf32_nds32_hash_entry (h)->offset_to_gp)
11422 < abs (offset_to_gp) - sda_offset)
11423 {
11424 /* This may cause the error, so we reserve the
11425 safe enough size for relaxing. */
11426 if (*access_addr >= local_sda)
11427 *access_addr += (record_count * 4);
11428 else
11429 *access_addr -= (record_count * 4);
11430 }
11431 return sec_pass;
11432 }
11433 }
11434 else
11435 {
11436 /* Local symbols. */
11437 if (!elf32_nds32_allocate_local_sym_info (abfd))
0a1b45a2 11438 return false;
fbaf61ad
NC		 11439 isym = isymbuf + r_symndx;
11440
11441 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
11442 if (NDS32_GUARD_SEC_P (sym_sec->flags))
11443 {
11444 /* Forbid doing relaxation when hyper-relax is low. */
11445 if (table->hyper_relax == 0)
0a1b45a2 11446 return false;
fbaf61ad
NC		 11447
11448 offset_to_gp = *access_addr - local_sda;
11449 if (elf32_nds32_local_gp_offset (abfd)[r_symndx] == 0)
11450 elf32_nds32_local_gp_offset (abfd)[r_symndx] = offset_to_gp;
11451 else if (abs (elf32_nds32_local_gp_offset (abfd)[r_symndx])
11452 < abs (offset_to_gp) - sda_offset)
11453 {
11454 /* This may cause the error, so we reserve the
11455 safe enough size for relaxing. */
11456 if (*access_addr >= local_sda)
11457 *access_addr += (record_count * 4);
11458 else
11459 *access_addr -= (record_count * 4);
11460 }
11461 return sec_pass;
11462 }
11463 }
11464
0a1b45a2 11465 return true;
fbaf61ad
NC		 11466}
11467
1c8f6a4d 11468#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 11469
1c8f6a4d 11470/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 11471
0a1b45a2 11472static bool
1c8f6a4d
KLC		 11473nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
11474 asection *sec, Elf_Internal_Rela *irel,
11475 Elf_Internal_Rela *internal_relocs, int *insn_len,
11476 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
fbaf61ad
NC		 11477 Elf_Internal_Shdr *symtab_hdr, int load_store_relax,
11478 struct elf_nds32_link_hash_table *table)
1c8f6a4d 11479{
6cae483a
AM		 11480 int eliminate_sethi = 0, range_type;
11481 unsigned int i;
1c8f6a4d
KLC		 11482 bfd_vma local_sda, laddr;
11483 int seq_len; /* Original length of instruction sequence. */
11484 uint32_t insn;
11485 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
11486 bfd_vma access_addr = 0;
11487 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
fbaf61ad
NC		 11488 struct elf_link_hash_entry *h = NULL;
11489 int indx;
1c8f6a4d
KLC		 11490 enum elf_nds32_reloc_type checked_types[] =
11491 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
11492 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
11493 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
11494 R_NDS32_TLS_LE_HI20
11495 };
35c08157 11496
1c8f6a4d
KLC		 11497 irelend = internal_relocs + sec->reloc_count;
11498 seq_len = GET_SEQ_LEN (irel->r_addend);
11499 laddr = irel->r_offset;
11500 *insn_len = seq_len;
35c08157 11501
1c8f6a4d 11502 /* Get the high part relocation. */
6cae483a 11503 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC		 11504 {
11505 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
11506 checked_types[i], laddr);
11507 if (hi_irelfn != irelend)
11508 break;
11509 }
35c08157 11510
1c8f6a4d
KLC		 11511 if (hi_irelfn == irelend)
11512 {
fbaf61ad
NC		 11513 /* Not R_NDS32_HI20_RELA. */
11514 if (i != 0)
11515 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
11516 (uint64_t) irel->r_offset);
0a1b45a2 11517 return false;
1c8f6a4d 11518 }
35c08157 11519
1c8f6a4d
KLC		 11520 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
11521 nds32_elf_final_sda_base (sec->output_section->owner,
0a1b45a2 11522 link_info, &local_sda, false);
35c08157 11523
1c8f6a4d
KLC		 11524 switch (ELF32_R_TYPE (hi_irelfn->r_info))
11525 {
11526 case R_NDS32_HI20_RELA:
11527 insn = bfd_getb32 (contents + laddr);
11528 access_addr =
11529 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
11530
fbaf61ad 11531 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
1c8f6a4d 11532 {
fbaf61ad
NC		 11533 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
11534 h = elf_sym_hashes (abfd)[indx];
11535 }
35c08157 11536
fbaf61ad
NC		 11537 /* Try movi. */
11538 if (range_type == NDS32_LOADSTORE_IMM
11539 && access_addr < CONSERVATIVE_20BIT
11540 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
11541 {
11542 eliminate_sethi = 1;
11543 break;
11544 }
1c8f6a4d 11545
fbaf61ad
NC		 11546 if (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0)
11547 {
11548 eliminate_sethi = 1;
11549 break;
1c8f6a4d 11550 }
fbaf61ad 11551 else if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, hi_irelfn,
0a1b45a2
AM		 11552 NULL, false, table, isymbuf, symtab_hdr))
11553 return false;
1c8f6a4d
KLC		 11554
11555 if (!load_store_relax)
0a1b45a2 11556 return false;
1c8f6a4d
KLC		 11557
11558 /* Case for set gp register. */
11559 if (N32_RT5 (insn) == REG_GP)
0a1b45a2 11560 return false;
1c8f6a4d
KLC		 11561
11562 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 11563 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC		 11564 {
11565 range_l = sdata_range[0][0];
11566 range_h = sdata_range[0][1];
11567 }
11568 else
11569 {
11570 range_l = sdata_range[1][0];
11571 range_h = sdata_range[1][1];
11572 }
11573 break;
11574
1c8f6a4d 11575 default:
0a1b45a2 11576 return false;
1c8f6a4d
KLC		 11577 }
11578
11579 /* Delete sethi instruction. */
11580 if (eliminate_sethi == 1
11581 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
11582 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
11583 {
11584 hi_irelfn->r_info =
11585 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
11586 irel->r_info =
11587 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11588 *insn_len = 0;
0a1b45a2 11589 return true;
1c8f6a4d 11590 }
fbaf61ad 11591
0a1b45a2 11592 return false;
1c8f6a4d
KLC		 11593}
11594
11595/* Relax LO12 relocation for nds32_elf_relax_section. */
11596
11597static void
11598nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
11599 asection *sec, Elf_Internal_Rela *irel,
11600 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
fbaf61ad
NC		 11601 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
11602 struct elf_nds32_link_hash_table *table)
1c8f6a4d
KLC		 11603{
11604 uint32_t insn;
11605 bfd_vma local_sda, laddr;
11606 unsigned long reloc;
11607 bfd_vma access_addr;
11608 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
11609 Elf_Internal_Rela *irelfn = NULL, *irelend;
11610 struct elf_link_hash_entry *h = NULL;
11611 int indx;
11612
11613 /* For SDA base relative relaxation. */
11614 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 11615 &local_sda, false);
1c8f6a4d
KLC		 11616
11617 irelend = internal_relocs + sec->reloc_count;
11618 laddr = irel->r_offset;
11619 insn = bfd_getb32 (contents + laddr);
11620
11621 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
11622 return;
11623
11624 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11625
11626 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
11627 {
11628 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
11629 h = elf_sym_hashes (abfd)[indx];
11630 }
11631
fbaf61ad 11632 /* Try movi. */
1c8f6a4d
KLC		 11633 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
11634 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
11635 {
11636 reloc = R_NDS32_20_RELA;
11637 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11638 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
11639 bfd_putb32 (insn, contents + laddr);
11640 }
1c8f6a4d
KLC		 11641 else
11642 {
fbaf61ad
NC		 11643 if (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0)
11644 {
11645 /* Fall through. */
11646 }
11647 else if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, irel, NULL,
0a1b45a2 11648 false, table, isymbuf, symtab_hdr))
fbaf61ad
NC		 11649 return;
11650
1c8f6a4d
KLC		 11651 range_l = sdata_range[1][0];
11652 range_h = sdata_range[1][1];
11653 switch (ELF32_R_TYPE (irel->r_info))
11654 {
11655 case R_NDS32_LO12S0_RELA:
11656 reloc = R_NDS32_SDA19S0_RELA;
11657 break;
11658 case R_NDS32_LO12S1_RELA:
11659 reloc = R_NDS32_SDA18S1_RELA;
11660 break;
11661 case R_NDS32_LO12S2_RELA:
11662 reloc = R_NDS32_SDA17S2_RELA;
11663 break;
11664 case R_NDS32_LO12S2_DP_RELA:
11665 range_l = sdata_range[0][0];
11666 range_h = sdata_range[0][1];
11667 reloc = R_NDS32_SDA12S2_DP_RELA;
11668 break;
11669 case R_NDS32_LO12S2_SP_RELA:
11670 range_l = sdata_range[0][0];
11671 range_h = sdata_range[0][1];
11672 reloc = R_NDS32_SDA12S2_SP_RELA;
11673 break;
11674 default:
11675 return;
11676 }
11677
11678 /* There are range_h and range_l because linker has to promise
11679 all sections move cross one page together. */
11680 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
fbaf61ad
NC		 11681 || (local_sda > access_addr && (local_sda - access_addr) <= range_l)
11682 || (h && strcmp (h->root.root.string, FP_BASE_NAME) == 0))
1c8f6a4d
KLC		 11683 {
11684 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 11685 {
1c8f6a4d
KLC		 11686 /* Maybe we should add R_NDS32_INSN16 reloc type here
11687 or manually do some optimization. sethi can't be
11688 eliminated when updating $gp so the relative ori
11689 needs to be preserved. */
11690 return;
35c08157 11691 }
1c8f6a4d
KLC		 11692 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
11693 &insn))
11694 return;
11695 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11696 bfd_putb32 (insn, contents + laddr);
11697
11698 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11699 R_NDS32_INSN16);
11700 /* SDA17 must keep INSN16 for converting fp_as_gp. */
11701 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
11702 irelfn->r_info =
11703 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
11704
35c08157 11705 }
1c8f6a4d
KLC		 11706 }
11707 return;
11708}
35c08157 11709
1c8f6a4d 11710/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 11711
0a1b45a2 11712static bool
1c8f6a4d
KLC		 11713nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
11714 Elf_Internal_Rela *internal_relocs, int *insn_len,
11715 int *seq_len, bfd_byte *contents)
11716{
11717 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 11718
1c8f6a4d 11719 irelend = internal_relocs + sec->reloc_count;
35c08157 11720
1c8f6a4d
KLC		 11721 re_irel =
11722 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11723 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11724
1c8f6a4d
KLC		 11725 if (re_irel == irelend)
11726 {
695344c0 11727 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11728 (uint64_t) irel->r_offset);
0a1b45a2 11729 return false;
1c8f6a4d 11730 }
35c08157 11731
1c8f6a4d 11732 if (re_irel->r_addend != 1)
0a1b45a2 11733 return false;
35c08157 11734
1c8f6a4d
KLC		 11735 /* Pointed target is relaxed and no longer needs this void *,
11736 change the type to NONE. */
11737 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11738
1c8f6a4d
KLC		 11739 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11740 not exist, it means only count 1 and remove it directly. */
11741 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11742 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11743 R_NDS32_PTR_COUNT);
11744 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11745 R_NDS32_PTR);
11746 if (count_irel != irelend)
11747 {
11748 if (--count_irel->r_addend > 0)
0a1b45a2 11749 return false;
1c8f6a4d
KLC		 11750 }
11751
11752 if (ptr_irel != irelend)
0a1b45a2 11753 return false;
1c8f6a4d
KLC		 11754
11755 /* If the PTR_COUNT is already 0, remove current instruction. */
11756 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11757 *insn_len = 0;
0a1b45a2 11758 return true;
1c8f6a4d
KLC		 11759}
11760
fbaf61ad 11761/* Relax LWC relocation for nds32_elf_relax_section. */
1c8f6a4d
KLC		 11762
11763static void
fbaf61ad
NC		 11764nds32_elf_relax_flsi (struct bfd_link_info *link_info, bfd *abfd,
11765 asection *sec, Elf_Internal_Rela *irel,
11766 Elf_Internal_Rela *internal_relocs,
11767 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
0a1b45a2 11768 Elf_Internal_Shdr *symtab_hdr, bool *again)
1c8f6a4d 11769{
fbaf61ad
NC		 11770 /* Pattern:
11771 sethi ra, hi20(symbol) ; HI20/LOADSTORE
11772 ori ra, ra, lo12(symbol) ; LO12S0/PTR/PTR/.../INSN16
11773 flsi fsa, [ra + offset1] ; LSI/PTR_RESOLVED/INSN16
11774 flsi fsb, [ra + offset2] ; LSI/PTR_RESOLVED/INSN16
11775 ... */
11776
1c8f6a4d 11777 uint32_t insn;
1c8f6a4d 11778 bfd_vma local_sda, laddr;
fbaf61ad
NC		 11779 unsigned long reloc;
11780 bfd_vma access_addr, flsi_offset;
11781 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
11782 Elf_Internal_Rela *irelend, *re_irel;
11783 unsigned int opcode;
1c8f6a4d
KLC		 11784
11785 irelend = internal_relocs + sec->reloc_count;
11786 laddr = irel->r_offset;
11787 insn = bfd_getb32 (contents + laddr);
11788
fbaf61ad 11789 if ((insn & 0x80000000) || !is_sda_access_insn (insn))
1c8f6a4d
KLC		 11790 return;
11791
fbaf61ad
NC		 11792 /* Can not do relaxation for bi format. */
11793 if ((insn & 0x1000))
1c8f6a4d
KLC		 11794 return;
11795
fbaf61ad
NC		 11796 /* Only deal with flsi, fssi, fldi, fsdi, so far. */
11797 opcode = N32_OP6 (insn);
11798 if ((opcode == N32_OP6_LWC) || (opcode == N32_OP6_SWC))
11799 reloc = R_NDS32_SDA12S2_SP_RELA;
11800 else if ((opcode == N32_OP6_LDC) || (opcode == N32_OP6_SDC))
11801 reloc = R_NDS32_SDA12S2_DP_RELA;
1c8f6a4d
KLC		 11802 else
11803 return;
11804
fbaf61ad
NC		 11805 re_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11806 R_NDS32_PTR_RESOLVED);
11807 if (re_irel == irelend)
1c8f6a4d 11808 {
fbaf61ad
NC		 11809 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LSI",
11810 (uint64_t) irel->r_offset);
11811 return;
1c8f6a4d 11812 }
1c8f6a4d 11813
fbaf61ad 11814 /* For SDA base relative relaxation. */
1c8f6a4d 11815 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 11816 &local_sda, false);
fbaf61ad
NC		 11817 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11818 flsi_offset = (insn & 0xfff) << 2;
11819 access_addr += flsi_offset;
11820 range_l = sdata_range[0][0];
11821 range_h = sdata_range[0][1];
1c8f6a4d 11822
fbaf61ad
NC		 11823 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
11824 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
1c8f6a4d 11825 {
fbaf61ad
NC		 11826 /* Turn flsi instruction into sda access format. */
11827 insn = (insn & 0x7ff07000) | (REG_GP << 15);
1c8f6a4d 11828
fbaf61ad
NC		 11829 /* Add relocation type to flsi. */
11830 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
11831 irel->r_addend += flsi_offset;
11832 bfd_putb32 (insn, contents + re_irel->r_offset);
1c8f6a4d 11833
fbaf61ad 11834 re_irel->r_addend |= 1;
0a1b45a2 11835 *again = true;
1c8f6a4d 11836 }
1c8f6a4d
KLC		 11837}
11838
0a1b45a2 11839static bool
1c8f6a4d
KLC		 11840nds32_relax_adjust_label (bfd *abfd, asection *sec,
11841 Elf_Internal_Rela *internal_relocs,
11842 bfd_byte *contents,
11843 nds32_elf_blank_t **relax_blank_list,
11844 int optimize, int opt_size)
11845{
11846 /* This code block is used to adjust 4-byte alignment by relax a pair
11847 of instruction a time.
11848
11849 It recognizes three types of relocations.
de194d85 11850 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC		 11851 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11852 3. is_16bit_NOP () - remove a 16-bit instruction. */
11853
de194d85
YC		 11854 /* TODO: It seems currently implementation only support 4-byte alignment.
11855 We should handle any-alignment. */
1c8f6a4d
KLC		 11856
11857 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11858 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11859 Elf_Internal_Rela rel_temp;
11860 Elf_Internal_Rela *irelend;
11861 bfd_vma address;
11862 uint16_t insn16;
11863
11864 /* Checking for branch relaxation relies on the relocations to
11865 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11866 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11867 sizeof (Elf_Internal_Rela), compar_reloc);
11868
11869 irelend = internal_relocs + sec->reloc_count;
11870
11871 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11872 /* FIXME: Can we generate the right order in assembler?
11873 So we don't have to swapping them here. */
11874
11875 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11876 label_rel < irelend; label_rel++)
11877 {
11878 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11879 continue;
11880
11881 /* Find the first reloc has the same offset with label_rel. */
11882 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11883 insn_rel++;
11884
11885 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11886 insn_rel++)
11887 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11888 address. */
11889 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11890 break;
11891
11892 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11893 && insn_rel < label_rel)
11894 {
11895 /* Swap the two reloc if the R_NDS32_INSN16 is
11896 before R_NDS32_LABEL. */
11897 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11898 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11899 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11900 }
11901 }
11902
11903 label_rel = NULL;
11904 insn_rel = NULL;
11905 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11906 or higher, remove other R_NDS32_LABEL with lower alignment.
11907 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11908 then the R_NDS32_LABEL sequence is broke. */
11909 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11910 {
11911 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11912 {
11913 if (label_rel == NULL)
11914 {
11915 if (tmp_rel->r_addend < 2)
11916 label_rel = tmp_rel;
11917 continue;
11918 }
11919 else if (tmp_rel->r_addend > 1)
11920 {
11921 /* Remove all LABEL relocation from label_rel to tmp_rel
11922 including relocations with same offset as tmp_rel. */
fbaf61ad 11923 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel; tmp2_rel++)
1c8f6a4d 11924 {
fbaf61ad
NC		 11925 if (tmp2_rel->r_offset == tmp_rel->r_offset)
11926 break;
11927
1c8f6a4d
KLC		 11928 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11929 && tmp2_rel->r_addend < 2)
11930 tmp2_rel->r_info =
11931 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11932 R_NDS32_NONE);
11933 }
11934 label_rel = NULL;
11935 }
11936 }
11937 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11938 {
11939 /* A new INSN16 which can be converted, so clear label_rel. */
11940 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11941 irelend, &insn16)
11942 || is_16bit_NOP (abfd, sec, tmp_rel))
11943 label_rel = NULL;
11944 }
11945 }
11946
11947 label_rel = NULL;
11948 insn_rel = NULL;
11949 /* Optimized for speed and nothing has not been relaxed.
11950 It's time to align labels.
11951 We may convert a 16-bit instruction right before a label to
11952 32-bit, in order to align the label if necessary
11953 all reloc entries has been sorted by r_offset. */
fbaf61ad
NC		 11954 for (irel = internal_relocs;
11955 irel < irelend && irel->r_offset < sec->size; irel++)
1c8f6a4d
KLC		 11956 {
11957 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11958 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11959 continue;
11960
11961 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11962 {
11963 /* A new INSN16 found, resize the old one. */
11964 if (is_convert_32_to_16
11965 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11966 || is_16bit_NOP (abfd, sec, irel))
11967 {
11968 if (insn_rel)
11969 {
11970 /* Previous INSN16 reloc exists, reduce its
11971 size to 16-bit. */
11972 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11973 irelend, &insn16))
35c08157 11974 {
1c8f6a4d
KLC		 11975 nds32_elf_write_16 (abfd, contents, insn_rel,
11976 internal_relocs, irelend, insn16);
11977
11978 if (!insert_nds32_elf_blank_recalc_total
11979 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 11980 return false;
1c8f6a4d
KLC		 11981 }
11982 else if (is_16bit_NOP (abfd, sec, insn_rel))
11983 {
11984 if (!insert_nds32_elf_blank_recalc_total
11985 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 11986 return false;
1c8f6a4d
KLC		 11987 }
11988 insn_rel->r_info =
11989 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11990 }
11991 /* Save the new one for later use. */
11992 insn_rel = irel;
11993 }
11994 else
11995 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11996 R_NDS32_NONE);
11997 }
11998 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11999 {
12000 /* Search for label. */
12001 int force_relax = 0;
12002
12003 /* Label on 16-bit instruction or optimization
12004 needless, just reset this reloc. */
12005 insn16 = bfd_getb16 (contents + irel->r_offset);
12006 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
12007 {
12008 irel->r_info =
12009 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
12010 continue;
12011 }
12012
12013 address =
12014 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
12015 irel->r_offset, 1);
12016
12017 if (!insn_rel)
12018 {
12019 /* Check if there is case which can not be aligned. */
12020 if (irel->r_addend == 2 && address & 0x2)
0a1b45a2 12021 return false;
1c8f6a4d
KLC		 12022 continue;
12023 }
12024
12025 /* Try to align this label. */
12026
12027 if ((irel->r_addend & 0x1f) < 2)
12028 {
12029 /* Check if there is a INSN16 at the same address.
12030 Label_rel always seats before insn_rel after
12031 our sort. */
12032
12033 /* Search for INSN16 at LABEL location. If INSN16 is at
12034 same location and this LABEL alignment is lower than 2,
12035 the INSN16 can be converted to 2-byte. */
12036 for (tmp_rel = irel;
12037 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
12038 tmp_rel++)
12039 {
12040 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
12041 && (is_convert_32_to_16
12042 (abfd, sec, tmp_rel, internal_relocs,
12043 irelend, &insn16)
12044 || is_16bit_NOP (abfd, sec, tmp_rel)))
12045 {
12046 force_relax = 1;
12047 break;
12048 }
12049 }
12050 }
12051
12052 if (force_relax || irel->r_addend == 1 || address & 0x2)
12053 {
12054 /* Label not aligned. */
12055 /* Previous reloc exists, reduce its size to 16-bit. */
12056 if (is_convert_32_to_16 (abfd, sec, insn_rel,
12057 internal_relocs, irelend, &insn16))
12058 {
12059 nds32_elf_write_16 (abfd, contents, insn_rel,
12060 internal_relocs, irelend, insn16);
12061
12062 if (!insert_nds32_elf_blank_recalc_total
12063 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 12064 return false;
1c8f6a4d
KLC		 12065 }
12066 else if (is_16bit_NOP (abfd, sec, insn_rel))
12067 {
12068 if (!insert_nds32_elf_blank_recalc_total
12069 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 12070 return false;
1c8f6a4d
KLC		 12071 }
12072
12073 }
12074 /* INSN16 reloc is used. */
12075 insn_rel = NULL;
12076 }
12077 }
12078
12079 address =
12080 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
12081 if (insn_rel && (address & 0x2 || opt_size))
12082 {
12083 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
12084 irelend, &insn16))
12085 {
12086 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
12087 irelend, insn16);
12088 if (!insert_nds32_elf_blank_recalc_total
12089 (relax_blank_list, insn_rel->r_offset + 2, 2))
0a1b45a2 12090 return false;
1c8f6a4d
KLC		 12091 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
12092 R_NDS32_NONE);
12093 }
12094 else if (is_16bit_NOP (abfd, sec, insn_rel))
12095 {
12096 if (!insert_nds32_elf_blank_recalc_total
12097 (relax_blank_list, insn_rel->r_offset, 2))
0a1b45a2 12098 return false;
1c8f6a4d
KLC		 12099 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
12100 R_NDS32_NONE);
12101 }
12102 }
12103 insn_rel = NULL;
0a1b45a2 12104 return true;
1c8f6a4d
KLC		 12105}
12106
0a1b45a2 12107static bool
1c8f6a4d 12108nds32_elf_relax_section (bfd *abfd, asection *sec,
0a1b45a2 12109 struct bfd_link_info *link_info, bool *again)
1c8f6a4d
KLC		 12110{
12111 nds32_elf_blank_t *relax_blank_list = NULL;
12112 Elf_Internal_Shdr *symtab_hdr;
12113 Elf_Internal_Rela *internal_relocs;
12114 Elf_Internal_Rela *irel;
12115 Elf_Internal_Rela *irelend;
12116 Elf_Internal_Sym *isymbuf = NULL;
12117 bfd_byte *contents = NULL;
0a1b45a2 12118 bool result = true;
1c8f6a4d
KLC		 12119 int optimize = 0;
12120 int opt_size = 0;
12121 uint32_t insn;
12122 uint16_t insn16;
12123
12124 /* Target dependnet option. */
12125 struct elf_nds32_link_hash_table *table;
12126 int load_store_relax;
1c8f6a4d
KLC		 12127
12128 relax_blank_list = NULL;
12129
0a1b45a2 12130 *again = false;
1c8f6a4d
KLC		 12131
12132 /* Nothing to do for
12133 * relocatable link or
12134 * non-relocatable section or
12135 * non-code section or
12136 * empty content or
12137 * no reloc entry. */
0e1862bb 12138 if (bfd_link_relocatable (link_info)
1c8f6a4d 12139 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 12140 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d 12141 || (sec->flags & SEC_CODE) == 0
fbaf61ad
NC		 12142 || sec->size == 0
12143 || sec->reloc_count == 0)
0a1b45a2 12144 return true;
1c8f6a4d
KLC		 12145
12146 /* 09.12.11 Workaround. */
12147 /* We have to adjust align for R_NDS32_LABEL if needed.
12148 The adjust approach only can fix 2-byte align once. */
12149 if (sec->alignment_power > 2)
0a1b45a2 12150 return true;
1c8f6a4d 12151
fbaf61ad
NC		 12152 /* Do TLS model conversion once at first. */
12153 nds32_elf_unify_tls_model (abfd, sec, contents, link_info);
12154
1c8f6a4d
KLC		 12155 /* The optimization type to do. */
12156
12157 table = nds32_elf_hash_table (link_info);
1c8f6a4d 12158
fbaf61ad
NC		 12159 /* Save the first section for abs symbol relaxation.
12160 This is used for checking gp relaxation in the
12161 nds32_elf_relax_loadstore and nds32_elf_relax_lo12. */
0a1b45a2 12162 nds32_elf_relax_guard (NULL, 0, sec, NULL, again, true,
fbaf61ad
NC		 12163 table, NULL, NULL);
12164
1c8f6a4d
KLC		 12165 /* The begining of general relaxation. */
12166
12167 if (is_SDA_BASE_set == 0)
12168 {
12169 bfd_vma gp;
12170 is_SDA_BASE_set = 1;
12171 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
0a1b45a2 12172 &gp, false);
c410035d 12173 relax_range_measurement (abfd, link_info);
1c8f6a4d
KLC		 12174 }
12175
1c8f6a4d
KLC		 12176 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12177 /* Relocations MUST be kept in memory, because relaxation adjust them. */
12178 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
0a1b45a2 12179 true /* keep_memory */);
1c8f6a4d
KLC		 12180 if (internal_relocs == NULL)
12181 goto error_return;
12182
12183 irelend = internal_relocs + sec->reloc_count;
12184 irel = find_relocs_at_address (internal_relocs, internal_relocs,
12185 irelend, R_NDS32_RELAX_ENTRY);
12186
12187 if (irel == irelend)
0a1b45a2 12188 return true;
1c8f6a4d
KLC		 12189
12190 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
12191 {
12192 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
0a1b45a2 12193 return true;
1c8f6a4d
KLC		 12194
12195 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
12196 optimize = 1;
12197
12198 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
12199 opt_size = 1;
12200 }
12201
12202 load_store_relax = table->load_store_relax;
12203
12204 /* Get symbol table and section content. */
1781a9d0 12205 contents = NULL;
0a1b45a2 12206 if (!nds32_get_section_contents (abfd, sec, &contents, true)
1c8f6a4d
KLC		 12207 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12208 goto error_return;
12209
12210 /* Do relax loop only when finalize is not done.
12211 Take care of relaxable relocs except INSN16. */
12212 for (irel = internal_relocs; irel < irelend; irel++)
12213 {
12214 int seq_len; /* Original length of instruction sequence. */
12215 int insn_len = 0; /* Final length of instruction sequence. */
0a1b45a2 12216 bool removed;
1c8f6a4d
KLC		 12217
12218 insn = 0;
12219 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
12220 && (irel->r_addend & 0x1f) >= 2)
12221 optimize = 1;
12222
12223 /* Relocation Types
12224 R_NDS32_LONGCALL1 53
12225 R_NDS32_LONGCALL2 54
12226 R_NDS32_LONGCALL3 55
12227 R_NDS32_LONGJUMP1 56
12228 R_NDS32_LONGJUMP2 57
12229 R_NDS32_LONGJUMP3 58
12230 R_NDS32_LOADSTORE 59 */
12231 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
12232 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
12233 seq_len = GET_SEQ_LEN (irel->r_addend);
12234
12235 /* Relocation Types
12236 R_NDS32_LONGCALL4 107
12237 R_NDS32_LONGCALL5 108
12238 R_NDS32_LONGCALL6 109
12239 R_NDS32_LONGJUMP4 110
12240 R_NDS32_LONGJUMP5 111
12241 R_NDS32_LONGJUMP6 112
12242 R_NDS32_LONGJUMP7 113 */
12243 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
12244 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
12245 seq_len = 4;
12246
12247 /* Relocation Types
12248 R_NDS32_LO12S0_RELA 30
12249 R_NDS32_LO12S1_RELA 29
12250 R_NDS32_LO12S2_RELA 28
12251 R_NDS32_LO12S2_SP_RELA 71
12252 R_NDS32_LO12S2_DP_RELA 70
12253 R_NDS32_GOT_LO12 46
12254 R_NDS32_GOTOFF_LO12 50
12255 R_NDS32_PLTREL_LO12 65
12256 R_NDS32_PLT_GOTREL_LO12 67
12257 R_NDS32_17IFC_PCREL_RELA 96
12258 R_NDS32_GOT_SUFF 193
12259 R_NDS32_GOTOFF_SUFF 194
12260 R_NDS32_PLT_GOT_SUFF 195
12261 R_NDS32_MULCALL_SUFF 196
12262 R_NDS32_PTR 197 */
12263 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
12264 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
12265 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
12266 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
12267 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
12268 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
12269 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
12270 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
12271 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
12272 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
12273 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
12274 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12275 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
12276 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
fbaf61ad
NC		 12277 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS
12278 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LSI)
1c8f6a4d
KLC		 12279 seq_len = 0;
12280 else
12281 continue;
12282
12283 insn_len = seq_len;
0a1b45a2 12284 removed = false;
1c8f6a4d
KLC		 12285
12286 switch (ELF32_R_TYPE (irel->r_info))
12287 {
12288 case R_NDS32_LONGCALL1:
12289 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
12290 &insn_len, contents, isymbuf,
12291 symtab_hdr);
12292 break;
12293 case R_NDS32_LONGCALL2:
12294 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
12295 &insn_len, contents, isymbuf,
12296 symtab_hdr);
12297 break;
12298 case R_NDS32_LONGCALL3:
12299 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
12300 &insn_len, contents, isymbuf,
12301 symtab_hdr);
12302 break;
12303 case R_NDS32_LONGJUMP1:
12304 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
12305 &insn_len, contents, isymbuf,
12306 symtab_hdr);
12307 break;
12308 case R_NDS32_LONGJUMP2:
12309 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
12310 &insn_len, contents, isymbuf,
12311 symtab_hdr);
12312 break;
12313 case R_NDS32_LONGJUMP3:
12314 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
12315 &insn_len, contents, isymbuf,
12316 symtab_hdr);
12317 break;
12318 case R_NDS32_LONGCALL4:
12319 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
12320 &insn_len, contents, isymbuf,
12321 symtab_hdr);
12322 break;
12323 case R_NDS32_LONGCALL5:
12324 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
12325 &insn_len, contents, isymbuf,
12326 symtab_hdr);
12327 break;
12328 case R_NDS32_LONGCALL6:
12329 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
12330 &insn_len, contents, isymbuf,
12331 symtab_hdr);
12332 break;
12333 case R_NDS32_LONGJUMP4:
12334 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
12335 &insn_len, contents, isymbuf,
12336 symtab_hdr);
12337 break;
12338 case R_NDS32_LONGJUMP5:
12339 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
12340 &insn_len, &seq_len, contents,
12341 isymbuf, symtab_hdr);
12342 break;
12343 case R_NDS32_LONGJUMP6:
12344 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
12345 &insn_len, &seq_len, contents,
12346 isymbuf, symtab_hdr);
12347 break;
12348 case R_NDS32_LONGJUMP7:
12349 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
12350 &insn_len, &seq_len, contents,
12351 isymbuf, symtab_hdr);
12352 break;
12353 case R_NDS32_LOADSTORE:
12354 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
12355 internal_relocs, &insn_len,
12356 contents, isymbuf, symtab_hdr,
fbaf61ad 12357 load_store_relax, table);
1c8f6a4d
KLC		 12358 break;
12359 case R_NDS32_LO12S0_RELA:
12360 case R_NDS32_LO12S1_RELA:
fbaf61ad 12361 case R_NDS32_LO12S2_RELA:
1c8f6a4d
KLC		 12362 case R_NDS32_LO12S2_DP_RELA:
12363 case R_NDS32_LO12S2_SP_RELA:
1c8f6a4d
KLC		 12364 /* Relax for low part. */
12365 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
fbaf61ad 12366 contents, isymbuf, symtab_hdr, table);
1c8f6a4d
KLC		 12367
12368 /* It is impossible to delete blank, so just continue. */
12369 continue;
fbaf61ad
NC		 12370 case R_NDS32_PTR:
12371 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
12372 &insn_len, &seq_len, contents);
12373 break;
12374 case R_NDS32_LSI:
12375 nds32_elf_relax_flsi (link_info, abfd, sec, irel, internal_relocs,
12376 contents, isymbuf, symtab_hdr, again);
12377 continue;
1c8f6a4d
KLC		 12378 case R_NDS32_GOT_LO12:
12379 case R_NDS32_GOTOFF_LO12:
12380 case R_NDS32_PLTREL_LO12:
12381 case R_NDS32_PLT_GOTREL_LO12:
12382 case R_NDS32_GOTPC_LO12:
1c8f6a4d 12383 case R_NDS32_TLS_LE_LO12:
1c8f6a4d 12384 case R_NDS32_TLS_LE_ADD:
1c8f6a4d 12385 case R_NDS32_TLS_LE_LS:
1c8f6a4d 12386 case R_NDS32_PLT_GOT_SUFF:
1c8f6a4d 12387 case R_NDS32_GOT_SUFF:
1c8f6a4d 12388 case R_NDS32_GOTOFF_SUFF:
1c8f6a4d
KLC		 12389 continue;
12390 default:
12391 continue;
1c8f6a4d 12392 }
fbaf61ad 12393
1c8f6a4d
KLC		 12394 if (removed && seq_len - insn_len > 0)
12395 {
12396 if (!insert_nds32_elf_blank
12397 (&relax_blank_list, irel->r_offset + insn_len,
12398 seq_len - insn_len))
12399 goto error_return;
0a1b45a2 12400 *again = true;
35c08157 12401 }
1c8f6a4d
KLC		 12402 }
12403
12404 calc_nds32_blank_total (relax_blank_list);
12405
12406 if (table->relax_fp_as_gp)
12407 {
12408 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
12409 irelend, isymbuf))
12410 goto error_return;
35c08157 12411
535b785f 12412 if (!*again)
35c08157 12413 {
1c8f6a4d
KLC		 12414 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
12415 irelend))
12416 goto error_return;
35c08157
KLC		 12417 }
12418 }
1c8f6a4d 12419
535b785f 12420 if (!*again)
1c8f6a4d
KLC		 12421 {
12422 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
12423 &relax_blank_list, optimize, opt_size))
12424 goto error_return;
12425 }
12426
12427 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC		 12428 If object file is assembled with flag '-Os',
12429 the we don't adjust jump-destination on 4-byte boundary. */
12430
12431 if (relax_blank_list)
12432 {
12433 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12434 relax_blank_list = NULL;
12435 }
12436
535b785f 12437 if (!*again)
35c08157
KLC		 12438 {
12439 /* Closing the section, so we don't relax it anymore. */
12440 bfd_vma sec_size_align;
12441 Elf_Internal_Rela *tmp_rel;
12442
12443 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC		 12444 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
12445 & ((-1U) << sec->alignment_power);
35c08157
KLC		 12446 if ((sec_size_align - sec->size) & 0x2)
12447 {
12448 insn16 = NDS32_NOP16;
12449 bfd_putb16 (insn16, contents + sec->size);
12450 sec->size += 2;
12451 }
12452
12453 while (sec_size_align != sec->size)
12454 {
12455 insn = NDS32_NOP32;
12456 bfd_putb32 (insn, contents + sec->size);
12457 sec->size += 4;
12458 }
12459
1c8f6a4d
KLC		 12460 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
12461 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC		 12462 if (tmp_rel != irelend)
12463 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
12464
12465 clean_nds32_elf_blank ();
12466 }
12467
dc1e8a47 12468 finish:
c9594989 12469 if (elf_section_data (sec)->relocs != internal_relocs)
35c08157
KLC		 12470 free (internal_relocs);
12471
c9594989 12472 if (elf_section_data (sec)->this_hdr.contents != contents)
35c08157
KLC		 12473 free (contents);
12474
c9594989 12475 if (symtab_hdr->contents != (bfd_byte *) isymbuf)
35c08157
KLC		 12476 free (isymbuf);
12477
12478 return result;
12479
dc1e8a47 12480 error_return:
0a1b45a2 12481 result = false;
35c08157
KLC		 12482 goto finish;
12483}
12484
12485static struct bfd_elf_special_section const nds32_elf_special_sections[] =
12486{
12487 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
12488 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
12489 {NULL, 0, 0, 0, 0}
12490};
12491
0a1b45a2 12492static bool
bf577467
AM		 12493nds32_elf_section_flags (const Elf_Internal_Shdr *hdr)
12494{
12495 const char *name = hdr->bfd_section->name;
12496
3f3328b8
ML		 12497 if (startswith (name, ".sbss")
12498 || startswith (name, ".sdata"))
bf577467
AM		 12499 hdr->bfd_section->flags |= SEC_SMALL_DATA;
12500
0a1b45a2 12501 return true;
bf577467
AM		 12502}
12503
0a1b45a2 12504static bool
35c08157
KLC		 12505nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
12506 struct bfd_link_info *info,
12507 void *finfo ATTRIBUTE_UNUSED,
37bb890f
AM		 12508 int (*func) (void *, const char *,
12509 Elf_Internal_Sym *,
12510 asection *,
12511 struct elf_link_hash_entry *)
35c08157
KLC		 12512 ATTRIBUTE_UNUSED)
12513{
12514 FILE *sym_ld_script = NULL;
12515 struct elf_nds32_link_hash_table *table;
12516
12517 table = nds32_elf_hash_table (info);
12518 sym_ld_script = table->sym_ld_script;
12519
12520 if (check_start_export_sym)
12521 fprintf (sym_ld_script, "}\n");
12522
0a1b45a2 12523 return true;
35c08157
KLC		 12524}
12525
12526static enum elf_reloc_type_class
12527nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
12528 const asection *rel_sec ATTRIBUTE_UNUSED,
12529 const Elf_Internal_Rela *rela)
12530{
12531 switch ((int) ELF32_R_TYPE (rela->r_info))
12532 {
12533 case R_NDS32_RELATIVE:
12534 return reloc_class_relative;
12535 case R_NDS32_JMP_SLOT:
12536 return reloc_class_plt;
12537 case R_NDS32_COPY:
12538 return reloc_class_copy;
12539 default:
12540 return reloc_class_normal;
12541 }
12542}
12543
12544/* Put target dependent option into info hash table. */
12545void
12546bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
12547 int relax_fp_as_gp,
12548 int eliminate_gc_relocs,
fbaf61ad
NC		 12549 FILE * sym_ld_script,
12550 int hyper_relax,
12551 int tls_desc_trampoline,
12552 int load_store_relax)
35c08157
KLC		 12553{
12554 struct elf_nds32_link_hash_table *table;
12555
12556 table = nds32_elf_hash_table (link_info);
12557 if (table == NULL)
12558 return;
12559
12560 table->relax_fp_as_gp = relax_fp_as_gp;
12561 table->eliminate_gc_relocs = eliminate_gc_relocs;
12562 table->sym_ld_script = sym_ld_script;
fbaf61ad
NC		 12563 table->hyper_relax = hyper_relax;
12564 table->tls_desc_trampoline = tls_desc_trampoline;
35c08157 12565 table ->load_store_relax = load_store_relax;
35c08157
KLC		 12566}
12567\f
fbaf61ad 12568
35c08157
KLC		 12569/* These functions and data-structures are used for fp-as-gp
12570 optimization. */
12571
12572#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC		 12573/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12574 the read-only section and read-write section. */
12575#define FAG_WINDOW (508 - 32)
35c08157
KLC		 12576
12577/* An nds32_fag represent a gp-relative access.
12578 We find best fp-base by using a sliding window
12579 to find a base address which can cover most gp-access. */
12580struct nds32_fag
12581{
12582 struct nds32_fag *next; /* NULL-teminated linked list. */
12583 bfd_vma addr; /* The address of this fag. */
12584 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12585 It is used for applying FP7U2_FLAG. */
12586 int count; /* How many times this address is referred.
12587 There should be exactly `count' relocations
12588 in relas. */
12589 int relas_capcity; /* The buffer size of relas.
12590 We use an array instead of linked-list,
12591 and realloc is used to adjust buffer size. */
12592};
12593
12594static void
12595nds32_fag_init (struct nds32_fag *head)
12596{
12597 memset (head, 0, sizeof (struct nds32_fag));
12598}
12599
12600static void
12601nds32_fag_verify (struct nds32_fag *head)
12602{
12603 struct nds32_fag *iter;
12604 struct nds32_fag *prev;
12605
12606 prev = NULL;
12607 iter = head->next;
12608 while (iter)
12609 {
12610 if (prev && prev->addr >= iter->addr)
12611 puts ("Bug in fp-as-gp insertion.");
12612 prev = iter;
12613 iter = iter->next;
12614 }
12615}
12616
12617/* Insert a fag in ascending order.
12618 If a fag of the same address already exists,
12619 they are chained by relas array. */
12620
12621static void
12622nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12623 Elf_Internal_Rela * rel)
12624{
12625 struct nds32_fag *iter;
12626 struct nds32_fag *new_fag;
12627 const int INIT_RELAS_CAP = 4;
12628
12629 for (iter = head;
12630 iter->next && iter->next->addr <= addr;
12631 iter = iter->next)
12632 /* Find somewhere to insert. */ ;
12633
12634 /* `iter' will be equal to `head' if the list is empty. */
12635 if (iter != head && iter->addr == addr)
12636 {
12637 /* The address exists in the list.
12638 Insert `rel' into relocation list, relas. */
12639
12640 /* Check whether relas is big enough. */
12641 if (iter->count >= iter->relas_capcity)
12642 {
12643 iter->relas_capcity *= 2;
12644 iter->relas = bfd_realloc
12645 (iter->relas, iter->relas_capcity * sizeof (void *));
12646 }
12647 iter->relas[iter->count++] = rel;
12648 return;
12649 }
12650
12651 /* This is a new address. Create a fag node for it. */
12652 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12653 memset (new_fag, 0, sizeof (*new_fag));
12654 new_fag->addr = addr;
12655 new_fag->count = 1;
12656 new_fag->next = iter->next;
12657 new_fag->relas_capcity = INIT_RELAS_CAP;
12658 new_fag->relas = (Elf_Internal_Rela **)
12659 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12660 new_fag->relas[0] = rel;
12661 iter->next = new_fag;
12662
12663 nds32_fag_verify (head);
12664}
12665
12666static void
12667nds32_fag_free_list (struct nds32_fag *head)
12668{
12669 struct nds32_fag *iter;
12670
12671 iter = head->next;
12672 while (iter)
12673 {
12674 struct nds32_fag *tmp = iter;
12675 iter = iter->next;
12676 free (tmp->relas);
12677 tmp->relas = NULL;
12678 free (tmp);
12679 }
12680}
12681
35c08157
KLC		 12682/* Find the best fp-base address.
12683 The relocation associated with that address is returned,
12684 so we can track the symbol instead of a fixed address.
12685
12686 When relaxation, the address of an datum may change,
12687 because a text section is shrinked, so the data section
1c8f6a4d 12688 moves forward. If the aligments of text and data section
35c08157
KLC		 12689 are different, their distance may change too.
12690 Therefore, tracking a fixed address is not appriate. */
12691
12692static int
12693nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12694{
12695 struct nds32_fag *base; /* First fag in the window. */
12696 struct nds32_fag *last; /* First fag outside the window. */
12697 int accu = 0; /* Usage accumulation. */
12698 struct nds32_fag *best; /* Best fag. */
12699 int baccu = 0; /* Best accumulation. */
12700
12701 /* Use first fag for initial, and find the last fag in the window.
12702
12703 In each iteration, we could simply subtract previous fag
12704 and accumulate following fags which are inside the window,
12705 untill we each the end. */
12706
1c8f6a4d
KLC		 12707 if (head->next == NULL)
12708 {
12709 *bestpp = NULL;
12710 return 0;
12711 }
35c08157
KLC		 12712
12713 /* Initialize base. */
12714 base = head->next;
12715 best = base;
12716 for (last = base;
12717 last && last->addr < base->addr + FAG_WINDOW;
12718 last = last->next)
12719 accu += last->count;
12720
12721 baccu = accu;
12722
12723 /* Record the best base in each iteration. */
12724 while (base->next)
1c8f6a4d
KLC		 12725 {
12726 accu -= base->count;
12727 base = base->next;
12728 /* Account fags in window. */
12729 for (/* Nothing. */;
12730 last && last->addr < base->addr + FAG_WINDOW;
12731 last = last->next)
12732 accu += last->count;
12733
12734 /* A better fp-base? */
12735 if (accu > baccu)
12736 {
12737 best = base;
12738 baccu = accu;
12739 }
12740 }
35c08157
KLC		 12741
12742 if (bestpp)
12743 *bestpp = best;
12744 return baccu;
12745}
12746
12747/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12748 so we can convert it fo fp-relative access later.
12749 `best_fag' is the best fp-base. Only those inside the window
12750 of best_fag is applied the flag. */
12751
0a1b45a2 12752static bool
35c08157 12753nds32_fag_mark_relax (struct bfd_link_info *link_info,
fbaf61ad 12754 asection *sec, struct nds32_fag *best_fag,
35c08157
KLC		 12755 Elf_Internal_Rela *internal_relocs,
12756 Elf_Internal_Rela *irelend)
12757{
12758 struct nds32_fag *ifag;
12759 bfd_vma best_fpbase, gp;
12760 bfd *output_bfd;
12761
fbaf61ad 12762 output_bfd = sec->output_section->owner;
0a1b45a2 12763 nds32_elf_final_sda_base (output_bfd, link_info, &gp, false);
35c08157
KLC		 12764 best_fpbase = best_fag->addr;
12765
1c8f6a4d
KLC		 12766 if (best_fpbase > gp + sdata_range[1][1]
12767 || best_fpbase < gp - sdata_range[1][0])
0a1b45a2 12768 return false;
35c08157
KLC		 12769
12770 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12771 so we know they can be converted to lwi37.fp. */
12772 for (ifag = best_fag;
12773 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12774 {
12775 int i;
12776
12777 for (i = 0; i < ifag->count; i++)
12778 {
12779 Elf_Internal_Rela *insn16_rel;
12780 Elf_Internal_Rela *fag_rel;
12781
12782 fag_rel = ifag->relas[i];
12783
12784 /* Only if this is within the WINDOWS, FP7U2_FLAG
12785 is applied. */
12786
12787 insn16_rel = find_relocs_at_address
12788 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12789
12790 if (insn16_rel != irelend)
12791 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12792 }
12793 }
0a1b45a2 12794 return true;
35c08157
KLC		 12795}
12796
1c8f6a4d
KLC		 12797/* Reset INSN16 to clean fp as gp. */
12798
12799static void
12800nds32_fag_unmark_relax (struct nds32_fag *fag,
12801 Elf_Internal_Rela *internal_relocs,
12802 Elf_Internal_Rela *irelend)
12803{
12804 struct nds32_fag *ifag;
12805 int i;
12806 Elf_Internal_Rela *insn16_rel;
12807 Elf_Internal_Rela *fag_rel;
12808
12809 for (ifag = fag; ifag; ifag = ifag->next)
12810 {
12811 for (i = 0; i < ifag->count; i++)
12812 {
12813 fag_rel = ifag->relas[i];
12814
12815 /* Restore the INSN16 relocation. */
12816 insn16_rel = find_relocs_at_address
12817 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12818
12819 if (insn16_rel != irelend)
12820 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12821 }
12822 }
12823}
12824
35c08157
KLC		 12825/* This is the main function of fp-as-gp optimization.
12826 It should be called by relax_section. */
12827
0a1b45a2 12828static bool
35c08157
KLC		 12829nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12830 bfd *abfd, asection *sec,
12831 Elf_Internal_Rela *internal_relocs,
12832 Elf_Internal_Rela *irelend,
12833 Elf_Internal_Sym *isymbuf)
12834{
12835 Elf_Internal_Rela *begin_rel = NULL;
12836 Elf_Internal_Rela *irel;
12837 struct nds32_fag fag_head;
12838 Elf_Internal_Shdr *symtab_hdr;
12839 bfd_byte *contents;
0a1b45a2 12840 bool ifc_inside = false;
35c08157
KLC		 12841
12842 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12843
12844 /* Per-function fp-base selection.
12845 1. Create a list for all the gp-relative access.
12846 2. Base on those gp-relative address,
12847 find a fp-base which can cover most access.
12848 3. Use the fp-base for fp-as-gp relaxation.
12849
12850 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12851 we should
12852 1. delete the `la $fp, _FP_BASE_' instruction and
12853 2. not convert lwi.gp to lwi37.fp.
12854
12855 To delete the _FP_BASE_ instruction, we simply apply
12856 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12857
12858 To suppress the conversion, we simply NOT to apply
12859 R_NDS32_INSN16_FP7U2_FLAG flag. */
12860
12861 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12862
1781a9d0 12863 contents = NULL;
0a1b45a2 12864 if (!nds32_get_section_contents (abfd, sec, &contents, true)
35c08157 12865 || !nds32_get_local_syms (abfd, sec, &isymbuf))
0a1b45a2 12866 return false;
35c08157
KLC		 12867
12868 /* Check whether it is worth for fp-as-gp optimization,
12869 i.e., at least 3 gp-load.
12870
12871 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12872 apply this optimization. */
12873
12874 for (irel = internal_relocs; irel < irelend; irel++)
12875 {
12876 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12877 One we enter the begin of the region, we track all the LW/ST
12878 instructions, so when we leave the region, we try to find
12879 the best fp-base address for those LW/ST instructions. */
12880
12881 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12882 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12883 {
12884 /* Begin of the region. */
12885 if (begin_rel)
695344c0 12886 /* xgettext:c-format */
38f14ab8 12887 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC		 12888
12889 begin_rel = irel;
12890 nds32_fag_init (&fag_head);
0a1b45a2 12891 ifc_inside = false;
35c08157
KLC		 12892 }
12893 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12894 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12895 {
12896 int accu;
1c8f6a4d 12897 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC		 12898 int dist;
12899
12900 /* End of the region.
12901 Check whether it is worth to do fp-as-gp. */
12902
12903 if (begin_rel == NULL)
12904 {
695344c0 12905 /* xgettext:c-format */
38f14ab8
AM		 12906 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12907 abfd, sec);
35c08157
KLC		 12908 continue;
12909 }
12910
12911 accu = nds32_fag_find_base (&fag_head, &best_fag);
12912
1c8f6a4d
KLC		 12913 /* Clean FP7U2_FLAG because they may set ever. */
12914 tmp_fag = fag_head.next;
12915 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12916
35c08157
KLC		 12917 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12918 if (accu < FAG_THRESHOLD
fbaf61ad 12919 || !nds32_fag_mark_relax (link_info, sec, best_fag,
35c08157
KLC		 12920 internal_relocs, irelend))
12921 {
12922 /* Not worth to do fp-as-gp. */
12923 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12924 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12925 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12926 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12927 nds32_fag_free_list (&fag_head);
12928 begin_rel = NULL;
12929 continue;
12930 }
12931
12932 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12933 so we use it to record the distance to the reloction of best
12934 fp-base. */
12935 dist = best_fag->relas[0] - begin_rel;
12936 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12937 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12938 relocation. And get the base value when relocating. */
1c8f6a4d 12939 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC		 12940 begin_rel->r_addend |= dist << 16;
12941
12942 nds32_fag_free_list (&fag_head);
12943 begin_rel = NULL;
12944 }
12945
1c8f6a4d 12946 if (begin_rel == NULL || ifc_inside)
35c08157
KLC		 12947 /* Skip if we are not in the region of fp-as-gp. */
12948 continue;
12949
12950 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12951 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12952 {
12953 bfd_vma addr;
12954 uint32_t insn;
12955
12956 /* A gp-relative access is found. Insert it to the fag-list. */
12957
12958 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12959 insn = bfd_getb32 (contents + irel->r_offset);
12960 if (!N32_IS_RT3 (insn))
12961 continue;
12962
12963 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12964 nds32_fag_insert (&fag_head, addr, irel);
12965 }
12966 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12967 {
12968 begin_rel = NULL;
12969 }
1c8f6a4d
KLC		 12970 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12971 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12972 {
12973 /* Suppress fp as gp when encounter ifc. */
0a1b45a2 12974 ifc_inside = true;
1c8f6a4d 12975 }
35c08157
KLC		 12976 }
12977
0a1b45a2 12978 return true;
35c08157
KLC		 12979}
12980
12981/* Remove unused `la $fp, _FD_BASE_' instruction. */
12982
0a1b45a2 12983static bool
35c08157
KLC		 12984nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12985 Elf_Internal_Rela *internal_relocs,
12986 Elf_Internal_Rela *irelend)
12987{
12988 Elf_Internal_Rela *irel;
12989 Elf_Internal_Shdr *symtab_hdr;
12990 bfd_byte *contents = NULL;
12991 nds32_elf_blank_t *relax_blank_list = NULL;
0a1b45a2
AM		 12992 bool result = true;
12993 bool unused_region = false;
35c08157
KLC		 12994
12995 /*
fbaf61ad
NC		 12996 NOTE: Disable fp-as-gp if we encounter ifcall relocations:
12997 R_NDS32_17IFC_PCREL_RELA
12998 R_NDS32_10IFCU_PCREL_RELA. */
35c08157
KLC		 12999
13000 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0a1b45a2 13001 nds32_get_section_contents (abfd, sec, &contents, true);
35c08157
KLC		 13002
13003 for (irel = internal_relocs; irel < irelend; irel++)
13004 {
13005 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
13006 we marked to in previous pass.
13007 DO NOT scan relocations again, since we've alreadly decided it
13008 and set the flag. */
13009 const char *syname;
13010 int syndx;
13011 uint32_t insn;
13012
13013 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
13014 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
0a1b45a2 13015 unused_region = true;
35c08157
KLC		 13016 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
13017 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
0a1b45a2 13018 unused_region = false;
35c08157
KLC		 13019
13020 /* We're not in the region. */
13021 if (!unused_region)
13022 continue;
13023
13024 /* _FP_BASE_ must be a GLOBAL symbol. */
13025 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
13026 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
13027 continue;
13028
13029 /* The symbol name must be _FP_BASE_. */
13030 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
13031 if (strcmp (syname, FP_BASE_NAME) != 0)
13032 continue;
13033
13034 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
13035 {
13036 /* addi.gp $fp, -256 */
13037 insn = bfd_getb32 (contents + irel->r_offset);
13038 if (insn != INSN_ADDIGP_TO_FP)
13039 continue;
13040 }
13041 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
13042 {
13043 /* addi $fp, $gp, -256 */
13044 insn = bfd_getb32 (contents + irel->r_offset);
13045 if (insn != INSN_ADDI_GP_TO_FP)
13046 continue;
13047 }
13048 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
13049 {
13050 /* movi $fp, FP_BASE */
13051 insn = bfd_getb32 (contents + irel->r_offset);
13052 if (insn != INSN_MOVI_TO_FP)
13053 continue;
13054 }
13055 else
13056 continue;
13057
13058 /* We got here because a FP_BASE instruction is found. */
13059 if (!insert_nds32_elf_blank_recalc_total
13060 (&relax_blank_list, irel->r_offset, 4))
13061 goto error_return;
13062 }
13063
dc1e8a47 13064 finish:
35c08157
KLC		 13065 if (relax_blank_list)
13066 {
13067 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
13068 relax_blank_list = NULL;
13069 }
13070 return result;
13071
dc1e8a47 13072 error_return:
0a1b45a2 13073 result = false;
35c08157
KLC		 13074 goto finish;
13075}
1c8f6a4d
KLC		 13076
13077/* This is a version of bfd_generic_get_relocated_section_contents.
13078 We need this variety because relaxation will modify the dwarf
13079 infomation. When there is undefined symbol reference error mesage,
13080 linker need to dump line number where the symbol be used. However
13081 the address is be relaxed, it can not get the original dwarf contents.
13082 The variety only modify function call for reading in the section. */
13083
13084static bfd_byte *
13085nds32_elf_get_relocated_section_contents (bfd *abfd,
13086 struct bfd_link_info *link_info,
13087 struct bfd_link_order *link_order,
13088 bfd_byte *data,
0a1b45a2 13089 bool relocatable,
1c8f6a4d
KLC		 13090 asymbol **symbols)
13091{
13092 bfd *input_bfd = link_order->u.indirect.section->owner;
13093 asection *input_section = link_order->u.indirect.section;
13094 long reloc_size;
13095 arelent **reloc_vector;
13096 long reloc_count;
13097
13098 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
13099 if (reloc_size < 0)
13100 return NULL;
13101
13102 /* Read in the section. */
56ba7527 13103 bfd_byte *orig_data = data;
0a1b45a2 13104 if (!nds32_get_section_contents (input_bfd, input_section, &data, false))
1c8f6a4d
KLC		 13105 return NULL;
13106
13107 if (reloc_size == 0)
13108 return data;
13109
13110 reloc_vector = (arelent **) bfd_malloc (reloc_size);
13111 if (reloc_vector == NULL)
56ba7527 13112 goto error_return;
1c8f6a4d
KLC		 13113
13114 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
13115 reloc_vector, symbols);
13116 if (reloc_count < 0)
13117 goto error_return;
13118
13119 if (reloc_count > 0)
13120 {
13121 arelent **parent;
13122 for (parent = reloc_vector; *parent != NULL; parent++)
13123 {
13124 char *error_message = NULL;
13125 asymbol *symbol;
13126 bfd_reloc_status_type r;
13127
13128 symbol = *(*parent)->sym_ptr_ptr;
13129 if (symbol->section && discarded_section (symbol->section))
13130 {
0930cb30 13131 bfd_vma off;
1c8f6a4d 13132 static reloc_howto_type none_howto
c94cb026 13133 = HOWTO (0, 0, 0, 0, false, 0, complain_overflow_dont, NULL,
0a1b45a2 13134 "unused", false, 0, 0, false);
1c8f6a4d 13135
bb294208
AM		 13136 off = (*parent)->address * OCTETS_PER_BYTE (input_bfd,
13137 input_section);
0930cb30
AM		 13138 _bfd_clear_contents ((*parent)->howto, input_bfd,
13139 input_section, data, off);
1c8f6a4d
KLC		 13140 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
13141 (*parent)->addend = 0;
13142 (*parent)->howto = &none_howto;
13143 r = bfd_reloc_ok;
13144 }
13145 else
13146 r = bfd_perform_relocation (input_bfd, *parent, data,
13147 input_section,
13148 relocatable ? abfd : NULL,
13149 &error_message);
13150
13151 if (relocatable)
13152 {
13153 asection *os = input_section->output_section;
13154
13155 /* A partial link, so keep the relocs. */
13156 os->orelocation[os->reloc_count] = *parent;
13157 os->reloc_count++;
13158 }
13159
13160 if (r != bfd_reloc_ok)
13161 {
13162 switch (r)
13163 {
13164 case bfd_reloc_undefined:
1a72702b
AM		 13165 (*link_info->callbacks->undefined_symbol)
13166 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
0a1b45a2 13167 input_bfd, input_section, (*parent)->address, true);
1c8f6a4d
KLC		 13168 break;
13169 case bfd_reloc_dangerous:
13170 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 13171 (*link_info->callbacks->reloc_dangerous)
13172 (link_info, error_message,
13173 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13174 break;
13175 case bfd_reloc_overflow:
1a72702b
AM		 13176 (*link_info->callbacks->reloc_overflow)
13177 (link_info, NULL,
13178 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
13179 (*parent)->howto->name, (*parent)->addend,
13180 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC		 13181 break;
13182 case bfd_reloc_outofrange:
13183 /* PR ld/13730:
13184 This error can result when processing some partially
13185 complete binaries. Do not abort, but issue an error
13186 message instead. */
13187 link_info->callbacks->einfo
695344c0 13188 /* xgettext:c-format */
c1c8c1ef 13189 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC		 13190 abfd, input_section, * parent);
13191 goto error_return;
13192
13193 default:
13194 abort ();
13195 break;
13196 }
13197 }
13198 }
13199 }
13200
13201 free (reloc_vector);
13202 return data;
13203
dc1e8a47 13204 error_return:
1c8f6a4d 13205 free (reloc_vector);
56ba7527
AM		 13206 if (orig_data == NULL)
13207 free (data);
1c8f6a4d
KLC		 13208 return NULL;
13209}
fbaf61ad
NC		 13210
13211/* Check target symbol. */
13212
0a1b45a2 13213static bool
fbaf61ad
NC		 13214nds32_elf_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED, asymbol *sym)
13215{
13216 if (!sym || !sym->name || sym->name[0] != '$')
0a1b45a2
AM		 13217 return false;
13218 return true;
fbaf61ad
NC		 13219}
13220
13221/* nds32 find maybe function sym. Ignore target special symbol
13222 first, and then go the general function. */
13223
13224static bfd_size_type
13225nds32_elf_maybe_function_sym (const asymbol *sym, asection *sec,
13226 bfd_vma *code_off)
13227{
13228 if (nds32_elf_is_target_special_symbol (NULL, (asymbol *) sym))
13229 return 0;
13230
13231 return _bfd_elf_maybe_function_sym (sym, sec, code_off);
13232}
35c08157 13233\f
35c08157 13234
fbaf61ad
NC		 13235/* Do TLS model conversion. */
13236
13237typedef struct relax_group_list_t
13238{
13239 Elf_Internal_Rela *relo;
13240 struct relax_group_list_t *next;
13241 struct relax_group_list_t *next_sibling;
13242 int id;
13243} relax_group_list_t;
13244
13245int
13246list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem);
13247
13248int
13249list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem);
13250
13251void
13252dump_chain (relax_group_list_t *pHead);
13253
13254int
13255list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem)
13256{
13257 relax_group_list_t *pNext = pHead;
13258
13259 /* Find place. */
13260 while (pNext->next)
13261 {
13262 if (pNext->next->id > (int) pElem->r_addend)
13263 break;
13264
13265 pNext = pNext->next;
13266 }
13267
13268 /* Insert node. */
13269 relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
13270 if (!pNew)
0a1b45a2 13271 return false;
fbaf61ad
NC		 13272
13273 relax_group_list_t *tmp = pNext->next;
13274 pNext->next = pNew;
13275
13276 pNew->id = pElem->r_addend;
13277 pNew->relo = pElem;
13278 pNew->next = tmp;
13279 pNew->next_sibling = NULL;
13280
0a1b45a2 13281 return true;
fbaf61ad
NC		 13282}
13283
13284int
13285list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem)
13286{
13287 relax_group_list_t *pNext = pNode;
13288
13289 /* Find place. */
13290 while (pNext->next_sibling)
13291 {
13292 pNext = pNext->next_sibling;
13293 }
13294
13295 /* Insert node. */
13296 relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
13297 if (!pNew)
0a1b45a2 13298 return false;
fbaf61ad
NC		 13299
13300 relax_group_list_t *tmp = pNext->next_sibling;
13301 pNext->next_sibling = pNew;
13302
13303 pNew->id = -1;
13304 pNew->relo = pElem;
13305 pNew->next = NULL;
13306 pNew->next_sibling = tmp;
13307
0a1b45a2 13308 return true;
fbaf61ad
NC		 13309}
13310
13311void
13312dump_chain (relax_group_list_t *pHead)
13313{
13314 relax_group_list_t *pNext = pHead->next;
13315 while (pNext)
13316 {
13317 printf("group %d @ 0x%08x", pNext->id, (unsigned)pNext->relo->r_offset);
13318 relax_group_list_t *pNextSib = pNext->next_sibling;
13319 while (pNextSib)
13320 {
13321 printf(", %d", (unsigned) ELF32_R_TYPE (pNextSib->relo->r_info));
13322 pNextSib = pNextSib->next_sibling;
13323 }
13324 pNext = pNext->next;
13325 printf("\n");
13326 }
13327}
13328
13329/* Check R_NDS32_RELAX_GROUP of each section.
13330 There might be multiple sections in one object file. */
13331
13332int
13333elf32_nds32_check_relax_group (bfd *abfd, asection *asec)
13334{
13335 elf32_nds32_relax_group_t *relax_group_ptr =
13336 elf32_nds32_relax_group_ptr (abfd);
13337
13338 int min_id = relax_group_ptr->min_id;
13339 int max_id = relax_group_ptr->max_id;
13340
13341 Elf_Internal_Rela *rel;
13342 Elf_Internal_Rela *relend;
13343 Elf_Internal_Rela *relocs;
13344 enum elf_nds32_reloc_type rtype;
13345
13346 do
13347 {
13348 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13349 relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
0a1b45a2 13350 true /* keep_memory */);
fbaf61ad
NC		 13351 if (relocs == NULL)
13352 break;
13353
13354 /* Check R_NDS32_RELAX_GROUP. */
13355 relend = relocs + asec->reloc_count;
13356 for (rel = relocs; rel < relend; rel++)
13357 {
13358 int id;
13359 rtype = ELF32_R_TYPE (rel->r_info);
13360 if (rtype != R_NDS32_RELAX_GROUP)
13361 continue;
13362
13363 id = rel->r_addend;
13364 if (id < min_id)
13365 min_id = id;
13366 else if (id > max_id)
13367 max_id = id;
13368 }
13369 }
0a1b45a2 13370 while (false);
fbaf61ad 13371
c9594989 13372 if (elf_section_data (asec)->relocs != relocs)
fbaf61ad
NC		 13373 free (relocs);
13374
13375 if ((min_id != relax_group_ptr->min_id)
13376 || (max_id != relax_group_ptr->max_id))
13377 {
13378 relax_group_ptr->count = max_id - min_id + 1;
13379 BFD_ASSERT(min_id <= relax_group_ptr->min_id);
13380 relax_group_ptr->min_id = min_id;
13381 BFD_ASSERT(max_id >= relax_group_ptr->max_id);
13382 relax_group_ptr->max_id = max_id;
13383 }
13384
13385 return relax_group_ptr->count;
13386}
13387
13388/* Reorder RELAX_GROUP ID when command line option '-r' is applied. */
3fafa2e2 13389static struct section_id_list_t *relax_group_section_id_list = NULL;
fbaf61ad
NC		 13390
13391struct section_id_list_t *
13392elf32_nds32_lookup_section_id (int id, struct section_id_list_t **lst_ptr)
13393{
13394 struct section_id_list_t *result = NULL;
13395 struct section_id_list_t *lst = *lst_ptr;
13396
13397 if (NULL == lst)
13398 {
13399 result = (struct section_id_list_t *) calloc
13400 (1, sizeof (struct section_id_list_t));
13401 BFD_ASSERT (result); /* Feed me. */
13402 result->id = id;
13403 *lst_ptr = result;
13404 }
13405 else
13406 {
13407 struct section_id_list_t *cur = lst;
13408 struct section_id_list_t *prv = NULL;
13409 struct section_id_list_t *sec = NULL;
13410
13411 while (cur)
13412 {
13413 if (cur->id < id)
13414 {
13415 prv = cur;
13416 cur = cur->next;
13417 continue;
13418 }
13419
13420 if (cur->id > id)
13421 {
13422 cur = NULL; /* To insert after prv. */
13423 sec = cur; /* In case prv == NULL. */
13424 }
13425
13426 break;
13427 }
13428
13429 if (NULL == cur)
13430 {
13431 /* Insert after prv. */
13432 result = (struct section_id_list_t *) calloc
13433 (1, sizeof (struct section_id_list_t));
13434 BFD_ASSERT (result); /* Feed me. */
13435 result->id = id;
13436 if (NULL != prv)
13437 {
13438 result->next = prv->next;
13439 prv->next = result;
13440 }
13441 else
13442 {
13443 *lst_ptr = result;
13444 result->next = sec;
13445 }
13446 }
13447 }
13448
13449 return result;
13450}
13451
13452int
13453elf32_nds32_unify_relax_group (bfd *abfd, asection *asec)
13454{
13455 static int next_relax_group_bias = 0;
13456
13457 elf32_nds32_relax_group_t *relax_group_ptr =
13458 elf32_nds32_relax_group_ptr (abfd);
13459
0a1b45a2 13460 bool result = true;
fbaf61ad
NC		 13461 Elf_Internal_Rela *rel;
13462 Elf_Internal_Rela *relend;
13463 Elf_Internal_Rela *relocs = NULL;
13464 enum elf_nds32_reloc_type rtype;
13465 struct section_id_list_t *node = NULL;
fbaf61ad
NC		 13466
13467 do
13468 {
13469 if (0 == relax_group_ptr->count)
13470 break;
13471
13472 /* Check if this section has been handled. */
13473 node = elf32_nds32_lookup_section_id (asec->id, &relax_group_section_id_list);
13474 if (NULL == node)
13475 break; /* Hit, the section id has handled. */
13476
13477 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13478 relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
0a1b45a2 13479 true /* keep_memory */);
fbaf61ad
NC		 13480 if (relocs == NULL)
13481 {
13482 BFD_ASSERT (0); /* feed me */
13483 break;
13484 }
13485
13486 /* Allocate group id bias for this bfd! */
13487 if (0 == relax_group_ptr->init)
13488 {
13489 relax_group_ptr->bias = next_relax_group_bias;
13490 next_relax_group_bias += relax_group_ptr->count;
13491 relax_group_ptr->init = 1;
13492 }
13493
13494 /* Reorder relax group groups. */
13495 relend = relocs + asec->reloc_count;
13496 for (rel = relocs; rel < relend; rel++)
13497 {
13498 rtype = ELF32_R_TYPE(rel->r_info);
13499 if (rtype != R_NDS32_RELAX_GROUP)
13500 continue;
13501
13502 /* Change it. */
13503 rel->r_addend += relax_group_ptr->bias;
fbaf61ad
NC		 13504 }
13505 }
0a1b45a2 13506 while (false);
fbaf61ad 13507
c9594989 13508 if (elf_section_data (asec)->relocs != relocs)
fbaf61ad
NC		 13509 free (relocs);
13510
13511 return result;
13512}
13513
13514int
13515nds32_elf_unify_tls_model (bfd *inbfd, asection *insec, bfd_byte *incontents,
13516 struct bfd_link_info *lnkinfo)
13517{
0a1b45a2 13518 bool result = true;
fbaf61ad
NC		 13519 Elf_Internal_Rela *irel;
13520 Elf_Internal_Rela *irelend;
13521 Elf_Internal_Rela *internal_relocs;
13522 unsigned long r_symndx;
13523 enum elf_nds32_reloc_type r_type;
13524
13525 Elf_Internal_Sym *local_syms = NULL;
13526 bfd_byte *contents = NULL;
13527
13528 relax_group_list_t chain = { .id = -1, .next = NULL, .next_sibling = NULL };
13529
13530 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (inbfd)->symtab_hdr;
9bc8e54b 13531 struct elf_link_hash_entry **sym_hashes;
fbaf61ad 13532 sym_hashes = elf_sym_hashes (inbfd);
fbaf61ad
NC		 13533
13534 /* Reorder RELAX_GROUP when command line option '-r' is applied. */
13535 if (bfd_link_relocatable (lnkinfo))
13536 {
13537 elf32_nds32_unify_relax_group (inbfd, insec);
13538 return result;
13539 }
13540
13541 /* Relocations MUST be kept in memory, because relaxation adjust them. */
13542 internal_relocs = _bfd_elf_link_read_relocs (inbfd, insec, NULL, NULL,
0a1b45a2 13543 true /* keep_memory */);
fbaf61ad
NC		 13544 if (internal_relocs == NULL)
13545 goto error_return;
13546
13547 irelend = internal_relocs + insec->reloc_count;
13548 irel = find_relocs_at_address (internal_relocs, internal_relocs,
13549 irelend, R_NDS32_RELAX_ENTRY);
13550 if (irel == irelend)
13551 goto finish;
13552
13553 /* Chain/remove groups. */
13554 for (irel = internal_relocs; irel < irelend; irel++)
13555 {
13556 r_symndx = ELF32_R_SYM (irel->r_info);
13557 r_type = ELF32_R_TYPE (irel->r_info);
13558 if (r_type != R_NDS32_RELAX_GROUP)
13559 continue;
13560
13561 /* Remove it. */
13562 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_NONE);
13563 /* Chain it now. */
13564 if (!list_insert (&chain, irel))
13565 goto error_return;
13566 }
13567
13568 /* Collect group relocations. */
13569 /* Presume relocations are sorted. */
13570 relax_group_list_t *pNext = chain.next;
13571 while (pNext)
13572 {
13573 for (irel = internal_relocs; irel < irelend; irel++)
13574 {
13575 if (irel->r_offset == pNext->relo->r_offset)
13576 {
13577 /* Ignore Non-TLS relocation types. */
13578 r_type = ELF32_R_TYPE (irel->r_info);
13579 if ((R_NDS32_TLS_LE_HI20 > r_type)
13580 || (R_NDS32_RELAX_ENTRY == r_type))
13581 continue;
13582
13583 if (!list_insert_sibling (pNext, irel))
13584 goto error_return;
13585 }
13586 else if (irel->r_offset > pNext->relo->r_offset)
13587 {
13588 pNext = pNext->next;
13589 if (!pNext)
13590 break;
13591
13592 bfd_vma current_offset = pNext->relo->r_offset;
13593 if (irel->r_offset > current_offset)
13594 irel = internal_relocs; /* restart from head */
13595 else
13596 --irel; /* Check current irel again. */
13597 continue;
13598 }
13599 else
13600 {
13601 /* This shouldn't be reached. */
13602 }
13603 }
13604 if (pNext)
13605 pNext = pNext->next;
13606 }
13607
13608#ifdef DUBUG_VERBOSE
13609 dump_chain(&chain);
13610#endif
13611
13612 /* Get symbol table and section content. */
13613 if (incontents)
13614 contents = incontents;
0a1b45a2 13615 else if (!nds32_get_section_contents (inbfd, insec, &contents, true)
fbaf61ad
NC		 13616 || !nds32_get_local_syms (inbfd, insec, &local_syms))
13617 goto error_return;
13618
13619 char *local_got_tls_type = elf32_nds32_local_got_tls_type (inbfd);
13620
13621 /* Convert TLS model each group if necessary. */
13622 pNext = chain.next;
13623
13624 int cur_grp_id = -1;
13625 int sethi_rt = -1;
13626 int add_rt = -1;
13627 enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
13628
13629 tls_type = org_tls_type = eff_tls_type = 0;
13630
13631 while (pNext)
13632 {
13633 relax_group_list_t *pNextSig = pNext->next_sibling;
13634 while (pNextSig)
13635 {
13636 struct elf_link_hash_entry *h = NULL;
13637
13638 irel = pNextSig->relo;
13639 r_symndx = ELF32_R_SYM(irel->r_info);
13640 r_type = ELF32_R_TYPE(irel->r_info);
13641
13642 if (pNext->id != cur_grp_id)
13643 {
13644 cur_grp_id = pNext->id;
13645 org_tls_type = get_tls_type (r_type, NULL);
13646 if (r_symndx >= symtab_hdr->sh_info)
13647 {
13648 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13649 while (h->root.type == bfd_link_hash_indirect
13650 || h->root.type == bfd_link_hash_warning)
13651 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13652 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
13653 }
13654 else
13655 {
13656 tls_type = local_got_tls_type
13657 ? local_got_tls_type[r_symndx]
13658 : GOT_NORMAL;
13659 }
13660
13661 eff_tls_type = 1 << (fls (tls_type) - 1);
13662 sethi_rt = N32_RT5(bfd_getb32 (contents + irel->r_offset));
13663 }
13664
13665 if (eff_tls_type != org_tls_type)
13666 {
13667 switch (org_tls_type)
13668 {
13669 /* DESC to IEGP/IE/LE. */
13670 case GOT_TLS_DESC:
13671 switch (eff_tls_type)
13672 {
13673 case GOT_TLS_IE:
13674 switch (r_type)
13675 {
13676 case R_NDS32_TLS_DESC_HI20:
13677 irel->r_info = ELF32_R_INFO(r_symndx,
13678 R_NDS32_TLS_IE_HI20);
13679 break;
13680 case R_NDS32_TLS_DESC_LO12:
13681 irel->r_info = ELF32_R_INFO(r_symndx,
13682 R_NDS32_TLS_IE_LO12);
13683 break;
13684 case R_NDS32_TLS_DESC_ADD:
13685 {
13686 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13687 add_rt = N32_RT5 (insn);
13688 insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
13689 bfd_putb32 (insn, contents + irel->r_offset);
13690
13691 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13692 }
13693 break;
13694 case R_NDS32_TLS_DESC_FUNC:
13695 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13696 irel->r_info = ELF32_R_INFO(r_symndx,
13697 R_NDS32_RELAX_REMOVE);
13698 break;
13699 case R_NDS32_TLS_DESC_CALL:
13700 {
13701 uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
13702 REG_TP);
13703 bfd_putb32 (insn, contents + irel->r_offset);
13704
13705 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13706 }
13707 break;
13708 case R_NDS32_LOADSTORE:
13709 case R_NDS32_PTR:
13710 case R_NDS32_PTR_RESOLVED:
13711 case R_NDS32_NONE:
13712 case R_NDS32_LABEL:
13713 break;
13714 default:
13715 BFD_ASSERT(0);
13716 break;
13717 }
13718 break;
13719 case GOT_TLS_IEGP:
13720 switch (r_type)
13721 {
13722 case R_NDS32_TLS_DESC_HI20:
13723 irel->r_info = ELF32_R_INFO(r_symndx,
13724 R_NDS32_TLS_IEGP_HI20);
13725 break;
13726 case R_NDS32_TLS_DESC_LO12:
13727 irel->r_info = ELF32_R_INFO(r_symndx,
13728 R_NDS32_TLS_IEGP_LO12);
13729 break;
13730 case R_NDS32_TLS_DESC_ADD:
13731 {
13732 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13733 add_rt = N32_RT5 (insn);
13734 insn = N32_MEM(LW, add_rt, sethi_rt, REG_GP, 0);
13735 bfd_putb32 (insn, contents + irel->r_offset);
13736
13737 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13738 }
13739 break;
13740 case R_NDS32_TLS_DESC_FUNC:
13741 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13742 irel->r_info = ELF32_R_INFO(r_symndx,
13743 R_NDS32_RELAX_REMOVE);
13744 break;
13745 case R_NDS32_TLS_DESC_CALL:
13746 {
13747 uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
13748 REG_TP);
13749 bfd_putb32 (insn, contents + irel->r_offset);
13750
13751 irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
13752 }
13753 break;
13754 case R_NDS32_LOADSTORE:
13755 case R_NDS32_PTR:
13756 case R_NDS32_PTR_RESOLVED:
13757 case R_NDS32_NONE:
13758 case R_NDS32_LABEL:
13759 break;
13760 default:
13761 BFD_ASSERT(0);
13762 break;
13763 }
13764 break;
13765 case GOT_TLS_LE:
13766 switch (r_type)
13767 {
13768 case R_NDS32_TLS_DESC_HI20:
13769 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13770 break;
13771 case R_NDS32_TLS_DESC_LO12:
13772 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13773 break;
13774 case R_NDS32_TLS_DESC_ADD:
13775 {
13776 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13777
13778 add_rt = N32_RT5 (insn);
13779 insn = N32_ALU1 (ADD, REG_R0, sethi_rt, REG_TP);
13780 bfd_putb32 (insn, contents + irel->r_offset);
13781
13782 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_ADD);
13783 }
13784 break;
13785 case R_NDS32_TLS_DESC_FUNC:
13786 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13787 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13788 break;
13789 case R_NDS32_TLS_DESC_CALL:
13790 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13791 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13792 break;
13793 case R_NDS32_LOADSTORE:
13794 case R_NDS32_PTR:
13795 case R_NDS32_PTR_RESOLVED:
13796 case R_NDS32_NONE:
13797 case R_NDS32_LABEL:
13798 break;
13799 default:
13800 BFD_ASSERT(0);
13801 break;
13802 }
13803 break;
13804 default:
13805 break;
13806 }
13807 break;
13808 /* IEGP to IE/LE. */
13809 case GOT_TLS_IEGP:
13810 switch (eff_tls_type)
13811 {
13812 case GOT_TLS_IE:
13813 switch (r_type)
13814 {
13815 case R_NDS32_TLS_IEGP_HI20:
13816 irel->r_info = ELF32_R_INFO(r_symndx,
13817 R_NDS32_TLS_IE_HI20);
13818 break;
13819 case R_NDS32_TLS_IEGP_LO12:
13820 irel->r_info = ELF32_R_INFO(r_symndx,
13821 R_NDS32_TLS_IE_LO12);
13822 break;
13823 case R_NDS32_PTR_RESOLVED:
13824 {
13825 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13826
13827 add_rt = N32_RT5 (insn);
13828 insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
13829 bfd_putb32 (insn, contents + irel->r_offset);
13830 }
13831 break;
13832 case R_NDS32_TLS_IEGP_LW:
13833 break;
13834 case R_NDS32_LOADSTORE:
13835 case R_NDS32_PTR:
13836 case R_NDS32_NONE:
13837 case R_NDS32_LABEL:
13838 break;
13839 default:
13840 BFD_ASSERT(0);
13841 break;
13842 }
13843 break;
13844 case GOT_TLS_LE:
13845 switch (r_type)
13846 {
13847 case R_NDS32_TLS_IEGP_HI20:
13848 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13849 break;
13850 case R_NDS32_TLS_IEGP_LO12:
13851 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13852 break;
13853 case R_NDS32_TLS_IEGP_LW:
13854 bfd_putb32 (INSN_NOP, contents + irel->r_offset);
13855 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_RELAX_REMOVE);
13856 break;
13857 case R_NDS32_LOADSTORE:
13858 case R_NDS32_PTR:
13859 case R_NDS32_NONE:
13860 case R_NDS32_LABEL:
13861 case R_NDS32_PTR_RESOLVED:
13862 break;
13863 default:
13864 BFD_ASSERT(0);
13865 break;
13866 }
13867 break;
13868 default:
13869 break;
13870 }
13871 break;
13872 /* IE to LE. */
13873 case GOT_TLS_IE:
13874 switch (eff_tls_type)
13875 {
13876 case GOT_TLS_LE:
13877 switch (r_type)
13878 {
13879 case R_NDS32_TLS_IE_HI20:
13880 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_HI20);
13881 break;
13882 case R_NDS32_TLS_IE_LO12S2:
13883 {
13884 uint32_t insn = bfd_getb32 (contents + irel->r_offset);
13885
13886 add_rt = N32_RT5 (insn);
13887 insn = N32_TYPE2 (ORI, add_rt, sethi_rt, 0);
13888 bfd_putb32 (insn, contents + irel->r_offset);
13889
13890 irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_LE_LO12);
13891 }
13892 break;
13893 case R_NDS32_LOADSTORE:
13894 case R_NDS32_PTR:
13895 case R_NDS32_NONE:
13896 case R_NDS32_LABEL:
13897 break;
13898 default:
13899 BFD_ASSERT(0);
13900 break;
13901 }
13902 break;
13903 default:
13904 break;
13905 }
13906 break;
13907 default:
13908 break;
13909 }
13910 }
13911 pNextSig = pNextSig->next_sibling;
13912 }
13913
13914#if 1
13915 pNext = pNext->next;
13916#else
13917 while (pNext)
13918 {
13919 if (pNext->id != cur_grp_id)
13920 break;
13921 pNext = pNext->next;
13922 }
13923#endif
13924 }
13925
dc1e8a47 13926 finish:
fbaf61ad
NC		 13927 if (incontents)
13928 contents = NULL;
13929
c9594989 13930 if (elf_section_data (insec)->relocs != internal_relocs)
fbaf61ad
NC		 13931 free (internal_relocs);
13932
c9594989 13933 if (elf_section_data (insec)->this_hdr.contents != contents)
fbaf61ad
NC		 13934 free (contents);
13935
c9594989 13936 if (symtab_hdr->contents != (bfd_byte *) local_syms)
fbaf61ad
NC		 13937 free (local_syms);
13938
13939 if (chain.next)
13940 {
13941 pNext = chain.next;
13942 relax_group_list_t *pDel;
13943 while (pNext)
13944 {
13945 pDel = pNext;
13946 pNext = pNext->next;
13947 free (pDel);
13948 }
13949 }
13950
13951 return result;
13952
dc1e8a47 13953 error_return:
0a1b45a2 13954 result = false;
fbaf61ad
NC		 13955 goto finish;
13956}
13957
13958/* End TLS model conversion. */
13959
35c08157
KLC		 13960#define ELF_ARCH bfd_arch_nds32
13961#define ELF_MACHINE_CODE EM_NDS32
13962#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 13963#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 13964
6d00b590 13965#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 13966#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 13967#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC		 13968#define TARGET_LITTLE_NAME "elf32-nds32le"
13969
13970#define elf_info_to_howto nds32_info_to_howto
13971#define elf_info_to_howto_rel nds32_info_to_howto_rel
13972
13973#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
13974#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
13975#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
13976#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
13977#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
13978
07d6d2b8 13979#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC		 13980#define elf_backend_action_discarded nds32_elf_action_discarded
13981#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
13982#define elf_backend_check_relocs nds32_elf_check_relocs
13983#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
13984#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
13985#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
13986#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
13987#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
13988#define elf_backend_relocate_section nds32_elf_relocate_section
13989#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC		 13990#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
13991#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
13992#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
13993#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
13994#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
13995#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
13996#define elf_backend_object_p nds32_elf_object_p
13997#define elf_backend_final_write_processing nds32_elf_final_write_processing
13998#define elf_backend_special_sections nds32_elf_special_sections
bf577467 13999#define elf_backend_section_flags nds32_elf_section_flags
1c8f6a4d 14000#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 14001 nds32_elf_get_relocated_section_contents
fbaf61ad
NC		 14002#define bfd_elf32_bfd_is_target_special_symbol nds32_elf_is_target_special_symbol
14003#define elf_backend_maybe_function_sym nds32_elf_maybe_function_sym
35c08157
KLC		 14004
14005#define elf_backend_can_gc_sections 1
14006#define elf_backend_can_refcount 1
14007#define elf_backend_want_got_plt 1
14008#define elf_backend_plt_readonly 1
14009#define elf_backend_want_plt_sym 0
14010#define elf_backend_got_header_size 12
14011#define elf_backend_may_use_rel_p 1
14012#define elf_backend_default_use_rela_p 1
14013#define elf_backend_may_use_rela_p 1
fbaf61ad 14014#define elf_backend_dtrel_excludes_plt 0
35c08157
KLC		 14015
14016#include "elf32-target.h"
14017
14018#undef ELF_MAXPAGESIZE
14019#define ELF_MAXPAGESIZE 0x2000
14020
fbaf61ad 14021#undef TARGET_BIG_SYM
6d00b590 14022#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
fbaf61ad 14023#undef TARGET_BIG_NAME
35c08157 14024#define TARGET_BIG_NAME "elf32-nds32be-linux"
fbaf61ad 14025#undef TARGET_LITTLE_SYM
6d00b590 14026#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
fbaf61ad 14027#undef TARGET_LITTLE_NAME
35c08157 14028#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
fbaf61ad 14029#undef elf32_bed
35c08157
KLC		 14030#define elf32_bed elf32_nds32_lin_bed
14031
14032#include "elf32-target.h"
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