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config/tc-aarch64.c: Avoid trying to parse a vector mov as immediate.
[thirdparty/binutils-gdb.git] / bfd / elf32-rl78.c
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99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
4046d87a 2 Copyright (C) 2011-2013 Free Software Foundation, Inc.
99c513f6
DD		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
22#include "bfd_stdint.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rl78.h"
26#include "libiberty.h"
27
28#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30#define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34/* Note that the relocations around 0x7f are internal to this file;
35 feel free to move them as needed to avoid conflicts with published
36 relocation numbers. */
37
38static reloc_howto_type rl78_elf_howto_table [] =
39{
40 RL78REL (NONE, 0, 0, 0, dont, FALSE),
41 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
43 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
46 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
59
60 EMPTY_HOWTO (0x13),
61 EMPTY_HOWTO (0x14),
62 EMPTY_HOWTO (0x15),
63 EMPTY_HOWTO (0x16),
64 EMPTY_HOWTO (0x17),
65 EMPTY_HOWTO (0x18),
66 EMPTY_HOWTO (0x19),
67 EMPTY_HOWTO (0x1a),
68 EMPTY_HOWTO (0x1b),
69 EMPTY_HOWTO (0x1c),
70 EMPTY_HOWTO (0x1d),
71 EMPTY_HOWTO (0x1e),
72 EMPTY_HOWTO (0x1f),
73
74 EMPTY_HOWTO (0x20),
75 EMPTY_HOWTO (0x21),
76 EMPTY_HOWTO (0x22),
77 EMPTY_HOWTO (0x23),
78 EMPTY_HOWTO (0x24),
79 EMPTY_HOWTO (0x25),
80 EMPTY_HOWTO (0x26),
81 EMPTY_HOWTO (0x27),
82 EMPTY_HOWTO (0x28),
83 EMPTY_HOWTO (0x29),
84 EMPTY_HOWTO (0x2a),
85 EMPTY_HOWTO (0x2b),
86 EMPTY_HOWTO (0x2c),
9cea966c 87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 88
89 EMPTY_HOWTO (0x2e),
90 EMPTY_HOWTO (0x2f),
91 EMPTY_HOWTO (0x30),
92 EMPTY_HOWTO (0x31),
93 EMPTY_HOWTO (0x32),
94 EMPTY_HOWTO (0x33),
95 EMPTY_HOWTO (0x34),
96 EMPTY_HOWTO (0x35),
97 EMPTY_HOWTO (0x36),
98 EMPTY_HOWTO (0x37),
99 EMPTY_HOWTO (0x38),
100 EMPTY_HOWTO (0x39),
101 EMPTY_HOWTO (0x3a),
102 EMPTY_HOWTO (0x3b),
103 EMPTY_HOWTO (0x3c),
104 EMPTY_HOWTO (0x3d),
105 EMPTY_HOWTO (0x3e),
106 EMPTY_HOWTO (0x3f),
107 EMPTY_HOWTO (0x40),
108
109 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
111 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
114 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
126
127#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
128
129 EMPTY_HOWTO (0x52),
130 EMPTY_HOWTO (0x53),
131 EMPTY_HOWTO (0x54),
132 EMPTY_HOWTO (0x55),
133 EMPTY_HOWTO (0x56),
134 EMPTY_HOWTO (0x57),
135 EMPTY_HOWTO (0x58),
136 EMPTY_HOWTO (0x59),
137 EMPTY_HOWTO (0x5a),
138 EMPTY_HOWTO (0x5b),
139 EMPTY_HOWTO (0x5c),
140 EMPTY_HOWTO (0x5d),
141 EMPTY_HOWTO (0x5e),
142 EMPTY_HOWTO (0x5f),
143 EMPTY_HOWTO (0x60),
144 EMPTY_HOWTO (0x61),
145 EMPTY_HOWTO (0x62),
146 EMPTY_HOWTO (0x63),
147 EMPTY_HOWTO (0x64),
148 EMPTY_HOWTO (0x65),
149 EMPTY_HOWTO (0x66),
150 EMPTY_HOWTO (0x67),
151 EMPTY_HOWTO (0x68),
152 EMPTY_HOWTO (0x69),
153 EMPTY_HOWTO (0x6a),
154 EMPTY_HOWTO (0x6b),
155 EMPTY_HOWTO (0x6c),
156 EMPTY_HOWTO (0x6d),
157 EMPTY_HOWTO (0x6e),
158 EMPTY_HOWTO (0x6f),
159 EMPTY_HOWTO (0x70),
160 EMPTY_HOWTO (0x71),
161 EMPTY_HOWTO (0x72),
162 EMPTY_HOWTO (0x73),
163 EMPTY_HOWTO (0x74),
164 EMPTY_HOWTO (0x75),
165 EMPTY_HOWTO (0x76),
166 EMPTY_HOWTO (0x77),
167
168 EMPTY_HOWTO (0x78),
169 EMPTY_HOWTO (0x79),
170 EMPTY_HOWTO (0x7a),
171 EMPTY_HOWTO (0x7b),
172 EMPTY_HOWTO (0x7c),
173 EMPTY_HOWTO (0x7d),
174 EMPTY_HOWTO (0x7e),
175 EMPTY_HOWTO (0x7f),
176
177 RL78REL (SYM, 2, 32, 0, dont, FALSE),
178 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
179 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
180 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
181 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
183 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
186 EMPTY_HOWTO (0x89),
187 EMPTY_HOWTO (0x8a),
188 EMPTY_HOWTO (0x8b),
189 EMPTY_HOWTO (0x8c),
190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
191 EMPTY_HOWTO (0x8e),
192 EMPTY_HOWTO (0x8f),
193 RL78REL (OPand, 2, 32, 0, dont, FALSE),
194 RL78REL (OPor, 2, 32, 0, dont, FALSE),
195 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
197 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
200};
201\f
202/* Map BFD reloc types to RL78 ELF reloc types. */
203
204struct rl78_reloc_map
205{
206 bfd_reloc_code_real_type bfd_reloc_val;
207 unsigned int rl78_reloc_val;
208};
209
210static const struct rl78_reloc_map rl78_reloc_map [] =
211{
212 { BFD_RELOC_NONE, R_RL78_NONE },
213 { BFD_RELOC_8, R_RL78_DIR8S },
214 { BFD_RELOC_16, R_RL78_DIR16S },
215 { BFD_RELOC_24, R_RL78_DIR24S },
216 { BFD_RELOC_32, R_RL78_DIR32 },
217 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
218 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
219 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
220 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
221 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
222 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
223 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
224 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
225 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
226 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
227 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
228 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
229 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
230 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
231 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
232 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
233 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
234 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
235 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 236 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
237 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 238};
239
240static reloc_howto_type *
241rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
242 bfd_reloc_code_real_type code)
243{
244 unsigned int i;
245
246 if (code == BFD_RELOC_RL78_32_OP)
247 return rl78_elf_howto_table + R_RL78_DIR32;
248
249 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
250 if (rl78_reloc_map [i].bfd_reloc_val == code)
251 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
252
253 return NULL;
254}
255
256static reloc_howto_type *
257rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
258{
259 unsigned int i;
260
261 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
262 if (rl78_elf_howto_table[i].name != NULL
263 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
264 return rl78_elf_howto_table + i;
265
266 return NULL;
267}
268
269/* Set the howto pointer for an RL78 ELF reloc. */
270
271static void
272rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
273 arelent * cache_ptr,
274 Elf_Internal_Rela * dst)
275{
276 unsigned int r_type;
277
278 r_type = ELF32_R_TYPE (dst->r_info);
279 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
280 cache_ptr->howto = rl78_elf_howto_table + r_type;
281}
282\f
283static bfd_vma
284get_symbol_value (const char * name,
285 bfd_reloc_status_type * status,
286 struct bfd_link_info * info,
287 bfd * input_bfd,
288 asection * input_section,
289 int offset)
290{
291 bfd_vma value = 0;
292 struct bfd_link_hash_entry * h;
293
294 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
295
296 if (h == NULL
297 || (h->type != bfd_link_hash_defined
298 && h->type != bfd_link_hash_defweak))
299 * status = info->callbacks->undefined_symbol
300 (info, name, input_bfd, input_section, offset, TRUE);
301 else
302 value = (h->u.def.value
303 + h->u.def.section->output_section->vma
304 + h->u.def.section->output_offset);
305
306 return value;
307}
308
309static bfd_vma
310get_romstart (bfd_reloc_status_type * status,
311 struct bfd_link_info * info,
312 bfd * abfd,
313 asection * sec,
314 int offset)
315{
316 static bfd_boolean cached = FALSE;
317 static bfd_vma cached_value = 0;
318
319 if (!cached)
320 {
321 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
322 cached = TRUE;
323 }
324 return cached_value;
325}
326
327static bfd_vma
328get_ramstart (bfd_reloc_status_type * status,
329 struct bfd_link_info * info,
330 bfd * abfd,
331 asection * sec,
332 int offset)
333{
334 static bfd_boolean cached = FALSE;
335 static bfd_vma cached_value = 0;
336
337 if (!cached)
338 {
339 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
340 cached = TRUE;
341 }
342 return cached_value;
343}
344
345#define NUM_STACK_ENTRIES 16
346static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
347static unsigned int rl78_stack_top;
348
349#define RL78_STACK_PUSH(val) \
350 do \
351 { \
352 if (rl78_stack_top < NUM_STACK_ENTRIES) \
353 rl78_stack [rl78_stack_top ++] = (val); \
354 else \
355 r = bfd_reloc_dangerous; \
356 } \
357 while (0)
358
359#define RL78_STACK_POP(dest) \
360 do \
361 { \
362 if (rl78_stack_top > 0) \
363 (dest) = rl78_stack [-- rl78_stack_top]; \
364 else \
365 (dest) = 0, r = bfd_reloc_dangerous; \
366 } \
367 while (0)
368
369/* Relocate an RL78 ELF section.
370 There is some attempt to make this function usable for many architectures,
371 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
372 if only to serve as a learning tool.
373
374 The RELOCATE_SECTION function is called by the new ELF backend linker
375 to handle the relocations for a section.
376
377 The relocs are always passed as Rela structures; if the section
378 actually uses Rel structures, the r_addend field will always be
379 zero.
380
381 This function is responsible for adjusting the section contents as
382 necessary, and (if using Rela relocs and generating a relocatable
383 output file) adjusting the reloc addend as necessary.
384
385 This function does not have to worry about setting the reloc
386 address or the reloc symbol index.
387
388 LOCAL_SYMS is a pointer to the swapped in local symbols.
389
390 LOCAL_SECTIONS is an array giving the section in the input file
391 corresponding to the st_shndx field of each local symbol.
392
393 The global hash table entry for the global symbols can be found
394 via elf_sym_hashes (input_bfd).
395
396 When generating relocatable output, this function must handle
397 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
398 going to be the section symbol corresponding to the output
399 section, which means that the addend must be adjusted
400 accordingly. */
401
402static bfd_boolean
403rl78_elf_relocate_section
404 (bfd * output_bfd,
405 struct bfd_link_info * info,
406 bfd * input_bfd,
407 asection * input_section,
408 bfd_byte * contents,
409 Elf_Internal_Rela * relocs,
410 Elf_Internal_Sym * local_syms,
411 asection ** local_sections)
412{
413 Elf_Internal_Shdr * symtab_hdr;
414 struct elf_link_hash_entry ** sym_hashes;
415 Elf_Internal_Rela * rel;
416 Elf_Internal_Rela * relend;
417 bfd *dynobj;
418 asection *splt;
419
420 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
421 sym_hashes = elf_sym_hashes (input_bfd);
422 relend = relocs + input_section->reloc_count;
423
424 dynobj = elf_hash_table (info)->dynobj;
425 splt = NULL;
426 if (dynobj != NULL)
3d4d4302 427 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 428
429 for (rel = relocs; rel < relend; rel ++)
430 {
431 reloc_howto_type * howto;
432 unsigned long r_symndx;
433 Elf_Internal_Sym * sym;
434 asection * sec;
435 struct elf_link_hash_entry * h;
436 bfd_vma relocation;
437 bfd_reloc_status_type r;
438 const char * name = NULL;
439 bfd_boolean unresolved_reloc = TRUE;
440 int r_type;
441
442 r_type = ELF32_R_TYPE (rel->r_info);
443 r_symndx = ELF32_R_SYM (rel->r_info);
444
445 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
446 h = NULL;
447 sym = NULL;
448 sec = NULL;
449 relocation = 0;
450
451 if (r_symndx < symtab_hdr->sh_info)
452 {
453 sym = local_syms + r_symndx;
454 sec = local_sections [r_symndx];
455 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
456
457 name = bfd_elf_string_from_elf_section
458 (input_bfd, symtab_hdr->sh_link, sym->st_name);
459 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
460 }
461 else
462 {
463 bfd_boolean warned;
464
465 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
466 r_symndx, symtab_hdr, sym_hashes, h,
467 sec, relocation, unresolved_reloc,
468 warned);
469
470 name = h->root.root.string;
471 }
472
dbaa2011 473 if (sec != NULL && discarded_section (sec))
99c513f6 474 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 475 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 476
477 if (info->relocatable)
478 {
479 /* This is a relocatable link. We don't have to change
480 anything, unless the reloc is against a section symbol,
481 in which case we have to adjust according to where the
482 section symbol winds up in the output section. */
483 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
484 rel->r_addend += sec->output_offset;
485 continue;
486 }
487
488 switch (ELF32_R_TYPE (rel->r_info))
489 {
490 case R_RL78_DIR16S:
491 {
492 bfd_vma *plt_offset;
493
494 if (h != NULL)
495 plt_offset = &h->plt.offset;
496 else
497 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
498
9cea966c 499 if (! valid_16bit_address (relocation))
99c513f6 500 {
99c513f6
DD		 501 /* If this is the first time we've processed this symbol,
502 fill in the plt entry with the correct symbol address. */
503 if ((*plt_offset & 1) == 0)
504 {
505 unsigned int x;
506
507 x = 0x000000ec; /* br !!abs24 */
508 x |= (relocation << 8) & 0xffffff00;
509 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
510 *plt_offset |= 1;
511 }
512
513 relocation = (splt->output_section->vma
514 + splt->output_offset
515 + (*plt_offset & -2));
516 if (name)
517 {
518 char *newname = bfd_malloc (strlen(name)+5);
519 strcpy (newname, name);
520 strcat(newname, ".plt");
521 _bfd_generic_link_add_one_symbol (info,
522 input_bfd,
523 newname,
524 BSF_FUNCTION | BSF_WEAK,
525 splt,
526 (*plt_offset & -2),
527 0,
528 1,
529 0,
530 0);
531 }
532 }
533 }
534 break;
535 }
536
537 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
538 /* If the symbol is undefined and weak
539 then the relocation resolves to zero. */
540 relocation = 0;
541 else
542 {
543 if (howto->pc_relative)
544 {
545 relocation -= (input_section->output_section->vma
546 + input_section->output_offset
547 + rel->r_offset);
548 relocation -= bfd_get_reloc_size (howto);
549 }
550
551 relocation += rel->r_addend;
552 }
553
554 r = bfd_reloc_ok;
555
556#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
557#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
558#define OP(i) (contents[rel->r_offset + (i)])
559
560 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
561 switch (r_type)
562 {
563 case R_RL78_NONE:
564 break;
565
9cea966c
DD		 566 case R_RL78_RH_RELAX:
567 break;
568
99c513f6
DD		 569 case R_RL78_DIR8S_PCREL:
570 RANGE (-128, 127);
571 OP (0) = relocation;
572 break;
573
574 case R_RL78_DIR8S:
575 RANGE (-128, 255);
576 OP (0) = relocation;
577 break;
578
579 case R_RL78_DIR8U:
580 RANGE (0, 255);
581 OP (0) = relocation;
582 break;
583
584 case R_RL78_DIR16S_PCREL:
585 RANGE (-32768, 32767);
586 OP (0) = relocation;
587 OP (1) = relocation >> 8;
588 break;
589
590 case R_RL78_DIR16S:
591 if ((relocation & 0xf0000) == 0xf0000)
592 relocation &= 0xffff;
593 RANGE (-32768, 65535);
594 OP (0) = relocation;
595 OP (1) = relocation >> 8;
596 break;
597
598 case R_RL78_DIR16U:
599 RANGE (0, 65536);
600 OP (0) = relocation;
601 OP (1) = relocation >> 8;
602 break;
603
604 case R_RL78_DIR16:
605 RANGE (-32768, 65536);
606 OP (0) = relocation;
607 OP (1) = relocation >> 8;
608 break;
609
610 case R_RL78_DIR16_REV:
611 RANGE (-32768, 65536);
612 OP (1) = relocation;
613 OP (0) = relocation >> 8;
614 break;
615
616 case R_RL78_DIR3U_PCREL:
617 RANGE (3, 10);
618 OP (0) &= 0xf8;
619 OP (0) |= relocation & 0x07;
620 break;
621
622 case R_RL78_DIR24S_PCREL:
623 RANGE (-0x800000, 0x7fffff);
624 OP (0) = relocation;
625 OP (1) = relocation >> 8;
626 OP (2) = relocation >> 16;
627 break;
628
629 case R_RL78_DIR24S:
630 RANGE (-0x800000, 0x7fffff);
631 OP (0) = relocation;
632 OP (1) = relocation >> 8;
633 OP (2) = relocation >> 16;
634 break;
635
636 case R_RL78_DIR32:
637 OP (0) = relocation;
638 OP (1) = relocation >> 8;
639 OP (2) = relocation >> 16;
640 OP (3) = relocation >> 24;
641 break;
642
643 case R_RL78_DIR32_REV:
644 OP (3) = relocation;
645 OP (2) = relocation >> 8;
646 OP (1) = relocation >> 16;
647 OP (0) = relocation >> 24;
648 break;
649
9cea966c 650 case R_RL78_RH_SFR:
9cea966c
DD		 651 RANGE (0xfff00, 0xfffff);
652 OP (0) = relocation & 0xff;
653 break;
654
655 case R_RL78_RH_SADDR:
9cea966c
DD		 656 RANGE (0xffe20, 0xfff1f);
657 OP (0) = relocation & 0xff;
9cea966c
DD		 658 break;
659
99c513f6
DD		 660 /* Complex reloc handling: */
661
662 case R_RL78_ABS32:
663 RL78_STACK_POP (relocation);
664 OP (0) = relocation;
665 OP (1) = relocation >> 8;
666 OP (2) = relocation >> 16;
667 OP (3) = relocation >> 24;
668 break;
669
670 case R_RL78_ABS32_REV:
671 RL78_STACK_POP (relocation);
672 OP (3) = relocation;
673 OP (2) = relocation >> 8;
674 OP (1) = relocation >> 16;
675 OP (0) = relocation >> 24;
676 break;
677
678 case R_RL78_ABS24S_PCREL:
679 case R_RL78_ABS24S:
680 RL78_STACK_POP (relocation);
681 RANGE (-0x800000, 0x7fffff);
682 OP (0) = relocation;
683 OP (1) = relocation >> 8;
684 OP (2) = relocation >> 16;
685 break;
686
687 case R_RL78_ABS16:
688 RL78_STACK_POP (relocation);
689 RANGE (-32768, 65535);
690 OP (0) = relocation;
691 OP (1) = relocation >> 8;
692 break;
693
694 case R_RL78_ABS16_REV:
695 RL78_STACK_POP (relocation);
696 RANGE (-32768, 65535);
697 OP (1) = relocation;
698 OP (0) = relocation >> 8;
699 break;
700
701 case R_RL78_ABS16S_PCREL:
702 case R_RL78_ABS16S:
703 RL78_STACK_POP (relocation);
704 RANGE (-32768, 32767);
705 OP (0) = relocation;
706 OP (1) = relocation >> 8;
707 break;
708
709 case R_RL78_ABS16U:
710 RL78_STACK_POP (relocation);
711 RANGE (0, 65536);
712 OP (0) = relocation;
713 OP (1) = relocation >> 8;
714 break;
715
716 case R_RL78_ABS16UL:
717 RL78_STACK_POP (relocation);
718 relocation >>= 2;
719 RANGE (0, 65536);
720 OP (0) = relocation;
721 OP (1) = relocation >> 8;
722 break;
723
724 case R_RL78_ABS16UW:
725 RL78_STACK_POP (relocation);
726 relocation >>= 1;
727 RANGE (0, 65536);
728 OP (0) = relocation;
729 OP (1) = relocation >> 8;
730 break;
731
732 case R_RL78_ABS8:
733 RL78_STACK_POP (relocation);
734 RANGE (-128, 255);
735 OP (0) = relocation;
736 break;
737
738 case R_RL78_ABS8U:
739 RL78_STACK_POP (relocation);
740 RANGE (0, 255);
741 OP (0) = relocation;
742 break;
743
744 case R_RL78_ABS8UL:
745 RL78_STACK_POP (relocation);
746 relocation >>= 2;
747 RANGE (0, 255);
748 OP (0) = relocation;
749 break;
750
751 case R_RL78_ABS8UW:
752 RL78_STACK_POP (relocation);
753 relocation >>= 1;
754 RANGE (0, 255);
755 OP (0) = relocation;
756 break;
757
758 case R_RL78_ABS8S_PCREL:
759 case R_RL78_ABS8S:
760 RL78_STACK_POP (relocation);
761 RANGE (-128, 127);
762 OP (0) = relocation;
763 break;
764
765 case R_RL78_SYM:
766 if (r_symndx < symtab_hdr->sh_info)
767 RL78_STACK_PUSH (sec->output_section->vma
768 + sec->output_offset
769 + sym->st_value
770 + rel->r_addend);
771 else
772 {
773 if (h != NULL
774 && (h->root.type == bfd_link_hash_defined
775 || h->root.type == bfd_link_hash_defweak))
776 RL78_STACK_PUSH (h->root.u.def.value
777 + sec->output_section->vma
778 + sec->output_offset
779 + rel->r_addend);
4107ae22
DD		 780 else if (h->root.type == bfd_link_hash_undefweak)
781 RL78_STACK_PUSH (0);
99c513f6
DD		 782 else
783 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
784 }
785 break;
786
787 case R_RL78_OPneg:
788 {
789 int32_t tmp;
790
791 RL78_STACK_POP (tmp);
792 tmp = - tmp;
793 RL78_STACK_PUSH (tmp);
794 }
795 break;
796
797 case R_RL78_OPadd:
798 {
799 int32_t tmp1, tmp2;
800
801 RL78_STACK_POP (tmp2);
802 RL78_STACK_POP (tmp1);
803 tmp1 += tmp2;
804 RL78_STACK_PUSH (tmp1);
805 }
806 break;
807
808 case R_RL78_OPsub:
809 {
810 int32_t tmp1, tmp2;
811
34064ff3
DD		 812 /* For the expression "A - B", the assembler pushes A,
813 then B, then OPSUB. So the first op we pop is B, not
814 A. */
815 RL78_STACK_POP (tmp2); /* B */
816 RL78_STACK_POP (tmp1); /* A */
817 tmp1 -= tmp2; /* A - B */
818 RL78_STACK_PUSH (tmp1);
99c513f6
DD		 819 }
820 break;
821
822 case R_RL78_OPmul:
823 {
824 int32_t tmp1, tmp2;
825
826 RL78_STACK_POP (tmp2);
827 RL78_STACK_POP (tmp1);
828 tmp1 *= tmp2;
829 RL78_STACK_PUSH (tmp1);
830 }
831 break;
832
833 case R_RL78_OPdiv:
834 {
835 int32_t tmp1, tmp2;
836
837 RL78_STACK_POP (tmp2);
838 RL78_STACK_POP (tmp1);
839 tmp1 /= tmp2;
840 RL78_STACK_PUSH (tmp1);
841 }
842 break;
843
844 case R_RL78_OPshla:
845 {
846 int32_t tmp1, tmp2;
847
848 RL78_STACK_POP (tmp2);
849 RL78_STACK_POP (tmp1);
850 tmp1 <<= tmp2;
851 RL78_STACK_PUSH (tmp1);
852 }
853 break;
854
855 case R_RL78_OPshra:
856 {
857 int32_t tmp1, tmp2;
858
859 RL78_STACK_POP (tmp2);
860 RL78_STACK_POP (tmp1);
861 tmp1 >>= tmp2;
862 RL78_STACK_PUSH (tmp1);
863 }
864 break;
865
866 case R_RL78_OPsctsize:
867 RL78_STACK_PUSH (input_section->size);
868 break;
869
870 case R_RL78_OPscttop:
871 RL78_STACK_PUSH (input_section->output_section->vma);
872 break;
873
874 case R_RL78_OPand:
875 {
876 int32_t tmp1, tmp2;
877
878 RL78_STACK_POP (tmp2);
879 RL78_STACK_POP (tmp1);
880 tmp1 &= tmp2;
881 RL78_STACK_PUSH (tmp1);
882 }
883 break;
884
885 case R_RL78_OPor:
886 {
887 int32_t tmp1, tmp2;
888
889 RL78_STACK_POP (tmp2);
890 RL78_STACK_POP (tmp1);
891 tmp1 |= tmp2;
892 RL78_STACK_PUSH (tmp1);
893 }
894 break;
895
896 case R_RL78_OPxor:
897 {
898 int32_t tmp1, tmp2;
899
900 RL78_STACK_POP (tmp2);
901 RL78_STACK_POP (tmp1);
902 tmp1 ^= tmp2;
903 RL78_STACK_PUSH (tmp1);
904 }
905 break;
906
907 case R_RL78_OPnot:
908 {
909 int32_t tmp;
910
911 RL78_STACK_POP (tmp);
912 tmp = ~ tmp;
913 RL78_STACK_PUSH (tmp);
914 }
915 break;
916
917 case R_RL78_OPmod:
918 {
919 int32_t tmp1, tmp2;
920
921 RL78_STACK_POP (tmp2);
922 RL78_STACK_POP (tmp1);
923 tmp1 %= tmp2;
924 RL78_STACK_PUSH (tmp1);
925 }
926 break;
927
928 case R_RL78_OPromtop:
929 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
930 break;
931
932 case R_RL78_OPramtop:
933 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
934 break;
935
936 default:
937 r = bfd_reloc_notsupported;
938 break;
939 }
940
941 if (r != bfd_reloc_ok)
942 {
943 const char * msg = NULL;
944
945 switch (r)
946 {
947 case bfd_reloc_overflow:
948 /* Catch the case of a missing function declaration
949 and emit a more helpful error message. */
950 if (r_type == R_RL78_DIR24S_PCREL)
951 msg = _("%B(%A): error: call to undefined function '%s'");
952 else
953 r = info->callbacks->reloc_overflow
954 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
955 input_bfd, input_section, rel->r_offset);
956 break;
957
958 case bfd_reloc_undefined:
959 r = info->callbacks->undefined_symbol
960 (info, name, input_bfd, input_section, rel->r_offset,
961 TRUE);
962 break;
963
964 case bfd_reloc_other:
965 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
966 break;
967
968 case bfd_reloc_outofrange:
969 msg = _("%B(%A): internal error: out of range error");
970 break;
971
972 case bfd_reloc_notsupported:
973 msg = _("%B(%A): internal error: unsupported relocation error");
974 break;
975
976 case bfd_reloc_dangerous:
977 msg = _("%B(%A): internal error: dangerous relocation");
978 break;
979
980 default:
981 msg = _("%B(%A): internal error: unknown error");
982 break;
983 }
984
985 if (msg)
986 _bfd_error_handler (msg, input_bfd, input_section, name);
987
988 if (! r)
989 return FALSE;
990 }
991 }
992
993 return TRUE;
994}
995\f
996/* Function to set the ELF flag bits. */
997
998static bfd_boolean
999rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1000{
1001 elf_elfheader (abfd)->e_flags = flags;
1002 elf_flags_init (abfd) = TRUE;
1003 return TRUE;
1004}
1005
1006static bfd_boolean no_warn_mismatch = FALSE;
1007
1008void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1009
1010void
1011bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1012{
1013 no_warn_mismatch = user_no_warn_mismatch;
1014}
1015
1016/* Merge backend specific data from an object file to the output
1017 object file when linking. */
1018
1019static bfd_boolean
1020rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1021{
99c513f6 1022 flagword new_flags;
4046d87a 1023 flagword old_flags;
99c513f6
DD		 1024 bfd_boolean error = FALSE;
1025
1026 new_flags = elf_elfheader (ibfd)->e_flags;
4046d87a 1027 old_flags = elf_elfheader (obfd)->e_flags;
99c513f6
DD		 1028
1029 if (!elf_flags_init (obfd))
1030 {
1031 /* First call, no flags set. */
1032 elf_flags_init (obfd) = TRUE;
1033 elf_elfheader (obfd)->e_flags = new_flags;
1034 }
4046d87a
NC		 1035 else if (old_flags != new_flags)
1036 {
1037 flagword changed_flags = old_flags ^ new_flags;
1038
1039 if (changed_flags & E_FLAG_RL78_G10)
1040 {
1041 (*_bfd_error_handler)
1042 (_("RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together"));
1043
1044 if (old_flags & E_FLAG_RL78_G10)
1045 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1046 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1047 else
1048 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1049 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1050 }
1051 }
99c513f6
DD		 1052
1053 return !error;
1054}
1055\f
1056static bfd_boolean
1057rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1058{
1059 FILE * file = (FILE *) ptr;
1060 flagword flags;
1061
1062 BFD_ASSERT (abfd != NULL && ptr != NULL);
1063
1064 /* Print normal ELF private data. */
1065 _bfd_elf_print_private_bfd_data (abfd, ptr);
1066
1067 flags = elf_elfheader (abfd)->e_flags;
1068 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1069
4046d87a
NC		 1070 if (flags & E_FLAG_RL78_G10)
1071 fprintf (file, _(" [G10]"));
1072
99c513f6
DD		 1073 fputc ('\n', file);
1074 return TRUE;
1075}
1076
1077/* Return the MACH for an e_flags value. */
1078
1079static int
1080elf32_rl78_machine (bfd * abfd)
1081{
1082 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1083 return bfd_mach_rl78;
1084
1085 return 0;
1086}
1087
1088static bfd_boolean
1089rl78_elf_object_p (bfd * abfd)
1090{
1091 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1092 elf32_rl78_machine (abfd));
1093 return TRUE;
1094}
99c513f6
DD		 1095\f
1096/* support PLT for 16-bit references to 24-bit functions. */
1097
1098/* We support 16-bit pointers to code above 64k by generating a thunk
1099 below 64k containing a JMP instruction to the final address. */
68ffbac6 1100
99c513f6
DD		 1101static bfd_boolean
1102rl78_elf_check_relocs
1103 (bfd * abfd,
1104 struct bfd_link_info * info,
1105 asection * sec,
1106 const Elf_Internal_Rela * relocs)
1107{
1108 Elf_Internal_Shdr * symtab_hdr;
1109 struct elf_link_hash_entry ** sym_hashes;
1110 const Elf_Internal_Rela * rel;
1111 const Elf_Internal_Rela * rel_end;
1112 bfd_vma *local_plt_offsets;
1113 asection *splt;
1114 bfd *dynobj;
1115
1116 if (info->relocatable)
1117 return TRUE;
68ffbac6 1118
99c513f6
DD		 1119 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1120 sym_hashes = elf_sym_hashes (abfd);
1121 local_plt_offsets = elf_local_got_offsets (abfd);
1122 splt = NULL;
1123 dynobj = elf_hash_table(info)->dynobj;
1124
1125 rel_end = relocs + sec->reloc_count;
1126 for (rel = relocs; rel < rel_end; rel++)
1127 {
1128 struct elf_link_hash_entry *h;
1129 unsigned long r_symndx;
1130 bfd_vma *offset;
68ffbac6 1131
99c513f6
DD		 1132 r_symndx = ELF32_R_SYM (rel->r_info);
1133 if (r_symndx < symtab_hdr->sh_info)
1134 h = NULL;
1135 else
1136 {
1137 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1138 while (h->root.type == bfd_link_hash_indirect
1139 || h->root.type == bfd_link_hash_warning)
1140 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1141
1142 /* PR15323, ref flags aren't set for references in the same
1143 object. */
1144 h->root.non_ir_ref = 1;
99c513f6 1145 }
68ffbac6 1146
99c513f6
DD		 1147 switch (ELF32_R_TYPE (rel->r_info))
1148 {
1149 /* This relocation describes a 16-bit pointer to a function.
1150 We may need to allocate a thunk in low memory; reserve memory
1151 for it now. */
1152 case R_RL78_DIR16S:
1153 if (dynobj == NULL)
1154 elf_hash_table (info)->dynobj = dynobj = abfd;
1155 if (splt == NULL)
1156 {
3d4d4302 1157 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1158 if (splt == NULL)
1159 {
1160 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1161 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1162 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1163 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1164 flags);
99c513f6
DD		 1165 if (splt == NULL
1166 || ! bfd_set_section_alignment (dynobj, splt, 1))
1167 return FALSE;
1168 }
1169 }
1170
1171 if (h != NULL)
1172 offset = &h->plt.offset;
1173 else
1174 {
1175 if (local_plt_offsets == NULL)
1176 {
1177 size_t size;
1178 unsigned int i;
1179
1180 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1181 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1182 if (local_plt_offsets == NULL)
1183 return FALSE;
1184 elf_local_got_offsets (abfd) = local_plt_offsets;
1185
1186 for (i = 0; i < symtab_hdr->sh_info; i++)
1187 local_plt_offsets[i] = (bfd_vma) -1;
1188 }
1189 offset = &local_plt_offsets[r_symndx];
1190 }
1191
1192 if (*offset == (bfd_vma) -1)
1193 {
1194 *offset = splt->size;
1195 splt->size += 4;
1196 }
1197 break;
1198 }
1199 }
68ffbac6 1200
99c513f6
DD		 1201 return TRUE;
1202}
1203
1204/* This must exist if dynobj is ever set. */
1205
1206static bfd_boolean
1207rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1208 struct bfd_link_info *info)
1209{
1210 bfd *dynobj;
1211 asection *splt;
1212
47fc0f1f
NC		 1213 if (!elf_hash_table (info)->dynamic_sections_created)
1214 return TRUE;
1215
9cea966c
DD		 1216 /* As an extra sanity check, verify that all plt entries have been
1217 filled in. However, relaxing might have changed the relocs so
1218 that some plt entries don't get filled in, so we have to skip
1219 this check if we're relaxing. Unfortunately, check_relocs is
1220 called before relaxation. */
99c513f6 1221
47fc0f1f
NC		 1222 if (info->relax_trip > 0)
1223 return TRUE;
1224
1225 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1226 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1227 {
47fc0f1f
NC		 1228 bfd_byte *contents = splt->contents;
1229 unsigned int i, size = splt->size;
1230
1231 for (i = 0; i < size; i += 4)
99c513f6 1232 {
47fc0f1f
NC		 1233 unsigned int x = bfd_get_32 (dynobj, contents + i);
1234 BFD_ASSERT (x != 0);
99c513f6
DD		 1235 }
1236 }
1237
1238 return TRUE;
1239}
1240
1241static bfd_boolean
1242rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1243 struct bfd_link_info *info)
1244{
1245 bfd *dynobj;
1246 asection *splt;
1247
1248 if (info->relocatable)
1249 return TRUE;
1250
1251 dynobj = elf_hash_table (info)->dynobj;
1252 if (dynobj == NULL)
1253 return TRUE;
1254
3d4d4302 1255 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1256 BFD_ASSERT (splt != NULL);
1257
1258 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1259 if (splt->contents == NULL)
1260 return FALSE;
1261
1262 return TRUE;
1263}
1264
1265\f
1266
1267/* Handle relaxing. */
1268
1269/* A subroutine of rl78_elf_relax_section. If the global symbol H
1270 is within the low 64k, remove any entry for it in the plt. */
1271
1272struct relax_plt_data
1273{
1274 asection *splt;
1275 bfd_boolean *again;
1276};
1277
1278static bfd_boolean
2c3fc389 1279rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1280{
1281 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1282
1283 if (h->plt.offset != (bfd_vma) -1)
1284 {
1285 bfd_vma address;
1286
1287 if (h->root.type == bfd_link_hash_undefined
1288 || h->root.type == bfd_link_hash_undefweak)
1289 address = 0;
1290 else
1291 address = (h->root.u.def.section->output_section->vma
1292 + h->root.u.def.section->output_offset
1293 + h->root.u.def.value);
1294
1295 if (valid_16bit_address (address))
1296 {
1297 h->plt.offset = -1;
1298 data->splt->size -= 4;
1299 *data->again = TRUE;
1300 }
1301 }
1302
1303 return TRUE;
1304}
1305
1306/* A subroutine of rl78_elf_relax_section. If the global symbol H
1307 previously had a plt entry, give it a new entry offset. */
1308
1309static bfd_boolean
2c3fc389 1310rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1311{
1312 bfd_vma *entry = (bfd_vma *) xdata;
1313
1314 if (h->plt.offset != (bfd_vma) -1)
1315 {
1316 h->plt.offset = *entry;
1317 *entry += 4;
1318 }
1319
1320 return TRUE;
1321}
1322
1323static bfd_boolean
1324rl78_elf_relax_plt_section (bfd *dynobj,
1325 asection *splt,
1326 struct bfd_link_info *info,
1327 bfd_boolean *again)
1328{
1329 struct relax_plt_data relax_plt_data;
1330 bfd *ibfd;
1331
1332 /* Assume nothing changes. */
1333 *again = FALSE;
1334
1335 if (info->relocatable)
1336 return TRUE;
1337
1338 /* We only relax the .plt section at the moment. */
1339 if (dynobj != elf_hash_table (info)->dynobj
1340 || strcmp (splt->name, ".plt") != 0)
1341 return TRUE;
1342
1343 /* Quick check for an empty plt. */
1344 if (splt->size == 0)
1345 return TRUE;
1346
1347 /* Map across all global symbols; see which ones happen to
1348 fall in the low 64k. */
1349 relax_plt_data.splt = splt;
1350 relax_plt_data.again = again;
1351 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1352 &relax_plt_data);
1353
1354 /* Likewise for local symbols, though that's somewhat less convenient
1355 as we have to walk the list of input bfds and swap in symbol data. */
1356 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1357 {
1358 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1359 Elf_Internal_Shdr *symtab_hdr;
1360 Elf_Internal_Sym *isymbuf = NULL;
1361 unsigned int idx;
1362
1363 if (! local_plt_offsets)
1364 continue;
1365
1366 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1367 if (symtab_hdr->sh_info != 0)
1368 {
1369 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1370 if (isymbuf == NULL)
1371 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1372 symtab_hdr->sh_info, 0,
1373 NULL, NULL, NULL);
1374 if (isymbuf == NULL)
1375 return FALSE;
1376 }
1377
1378 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1379 {
1380 Elf_Internal_Sym *isym;
1381 asection *tsec;
1382 bfd_vma address;
1383
1384 if (local_plt_offsets[idx] == (bfd_vma) -1)
1385 continue;
1386
1387 isym = &isymbuf[idx];
1388 if (isym->st_shndx == SHN_UNDEF)
1389 continue;
1390 else if (isym->st_shndx == SHN_ABS)
1391 tsec = bfd_abs_section_ptr;
1392 else if (isym->st_shndx == SHN_COMMON)
1393 tsec = bfd_com_section_ptr;
1394 else
1395 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1396
1397 address = (tsec->output_section->vma
1398 + tsec->output_offset
1399 + isym->st_value);
1400 if (valid_16bit_address (address))
1401 {
1402 local_plt_offsets[idx] = -1;
1403 splt->size -= 4;
1404 *again = TRUE;
1405 }
1406 }
1407
1408 if (isymbuf != NULL
1409 && symtab_hdr->contents != (unsigned char *) isymbuf)
1410 {
1411 if (! info->keep_memory)
1412 free (isymbuf);
1413 else
1414 {
1415 /* Cache the symbols for elf_link_input_bfd. */
1416 symtab_hdr->contents = (unsigned char *) isymbuf;
1417 }
1418 }
1419 }
1420
1421 /* If we changed anything, walk the symbols again to reallocate
1422 .plt entry addresses. */
1423 if (*again && splt->size > 0)
1424 {
1425 bfd_vma entry = 0;
1426
1427 elf_link_hash_traverse (elf_hash_table (info),
1428 rl78_relax_plt_realloc, &entry);
1429
1430 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1431 {
1432 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1433 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1434 unsigned int idx;
1435
1436 if (! local_plt_offsets)
1437 continue;
1438
1439 for (idx = 0; idx < nlocals; ++idx)
1440 if (local_plt_offsets[idx] != (bfd_vma) -1)
1441 {
1442 local_plt_offsets[idx] = entry;
1443 entry += 4;
1444 }
1445 }
1446 }
1447
1448 return TRUE;
1449}
1450
9cea966c
DD		 1451/* Delete some bytes from a section while relaxing. */
1452
1453static bfd_boolean
1454elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1455 Elf_Internal_Rela *alignment_rel, int force_snip)
1456{
1457 Elf_Internal_Shdr * symtab_hdr;
1458 unsigned int sec_shndx;
1459 bfd_byte * contents;
1460 Elf_Internal_Rela * irel;
1461 Elf_Internal_Rela * irelend;
1462 Elf_Internal_Sym * isym;
1463 Elf_Internal_Sym * isymend;
1464 bfd_vma toaddr;
1465 unsigned int symcount;
1466 struct elf_link_hash_entry ** sym_hashes;
1467 struct elf_link_hash_entry ** end_hashes;
1468
1469 if (!alignment_rel)
1470 force_snip = 1;
1471
1472 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1473
1474 contents = elf_section_data (sec)->this_hdr.contents;
1475
1476 /* The deletion must stop at the next alignment boundary, if
1477 ALIGNMENT_REL is non-NULL. */
1478 toaddr = sec->size;
1479 if (alignment_rel)
1480 toaddr = alignment_rel->r_offset;
1481
1482 irel = elf_section_data (sec)->relocs;
1483 irelend = irel + sec->reloc_count;
1484
1485 /* Actually delete the bytes. */
1486 memmove (contents + addr, contents + addr + count,
1487 (size_t) (toaddr - addr - count));
1488
1489 /* If we don't have an alignment marker to worry about, we can just
1490 shrink the section. Otherwise, we have to fill in the newly
1491 created gap with NOP insns (0x03). */
1492 if (force_snip)
1493 sec->size -= count;
1494 else
1495 memset (contents + toaddr - count, 0x03, count);
1496
1497 /* Adjust all the relocs. */
1498 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1499 {
1500 /* Get the new reloc address. */
1501 if (irel->r_offset > addr
1502 && (irel->r_offset < toaddr
1503 || (force_snip && irel->r_offset == toaddr)))
1504 irel->r_offset -= count;
1505
1506 /* If we see an ALIGN marker at the end of the gap, we move it
1507 to the beginning of the gap, since marking these gaps is what
1508 they're for. */
1509 if (irel->r_offset == toaddr
1510 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1511 && irel->r_addend & RL78_RELAXA_ALIGN)
1512 irel->r_offset -= count;
1513 }
1514
1515 /* Adjust the local symbols defined in this section. */
1516 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1517 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1518 isymend = isym + symtab_hdr->sh_info;
1519
1520 for (; isym < isymend; isym++)
1521 {
1522 /* If the symbol is in the range of memory we just moved, we
1523 have to adjust its value. */
1524 if (isym->st_shndx == sec_shndx
1525 && isym->st_value > addr
1526 && isym->st_value < toaddr)
1527 isym->st_value -= count;
1528
1529 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1530 *end* is in the moved bytes but it's *start* isn't), then we
1531 must adjust its size. */
1532 if (isym->st_shndx == sec_shndx
1533 && isym->st_value < addr
1534 && isym->st_value + isym->st_size > addr
1535 && isym->st_value + isym->st_size < toaddr)
1536 isym->st_size -= count;
1537 }
1538
1539 /* Now adjust the global symbols defined in this section. */
1540 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1541 - symtab_hdr->sh_info);
1542 sym_hashes = elf_sym_hashes (abfd);
1543 end_hashes = sym_hashes + symcount;
1544
1545 for (; sym_hashes < end_hashes; sym_hashes++)
1546 {
1547 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1548
1549 if ((sym_hash->root.type == bfd_link_hash_defined
1550 || sym_hash->root.type == bfd_link_hash_defweak)
1551 && sym_hash->root.u.def.section == sec)
1552 {
1553 /* As above, adjust the value if needed. */
1554 if (sym_hash->root.u.def.value > addr
1555 && sym_hash->root.u.def.value < toaddr)
1556 sym_hash->root.u.def.value -= count;
1557
1558 /* As above, adjust the size if needed. */
1559 if (sym_hash->root.u.def.value < addr
1560 && sym_hash->root.u.def.value + sym_hash->size > addr
1561 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1562 sym_hash->size -= count;
1563 }
1564 }
1565
1566 return TRUE;
1567}
1568
1569/* Used to sort relocs by address. If relocs have the same address,
1570 we maintain their relative order, except that R_RL78_RH_RELAX
1571 alignment relocs must be the first reloc for any given address. */
1572
1573static void
1574reloc_bubblesort (Elf_Internal_Rela * r, int count)
1575{
1576 int i;
1577 bfd_boolean again;
1578 bfd_boolean swappit;
1579
1580 /* This is almost a classic bubblesort. It's the slowest sort, but
1581 we're taking advantage of the fact that the relocations are
1582 mostly in order already (the assembler emits them that way) and
1583 we need relocs with the same address to remain in the same
1584 relative order. */
1585 again = TRUE;
1586 while (again)
1587 {
1588 again = FALSE;
1589 for (i = 0; i < count - 1; i ++)
1590 {
1591 if (r[i].r_offset > r[i + 1].r_offset)
1592 swappit = TRUE;
1593 else if (r[i].r_offset < r[i + 1].r_offset)
1594 swappit = FALSE;
1595 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1596 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1597 swappit = TRUE;
1598 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1599 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1600 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1601 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1602 swappit = TRUE;
1603 else
1604 swappit = FALSE;
1605
1606 if (swappit)
1607 {
1608 Elf_Internal_Rela tmp;
1609
1610 tmp = r[i];
1611 r[i] = r[i + 1];
1612 r[i + 1] = tmp;
1613 /* If we do move a reloc back, re-scan to see if it
1614 needs to be moved even further back. This avoids
1615 most of the O(n^2) behavior for our cases. */
1616 if (i > 0)
1617 i -= 2;
1618 again = TRUE;
1619 }
1620 }
1621 }
1622}
1623
1624
1625#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1626 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1627 lrel, abfd, sec, link_info, scale)
1628
1629static bfd_vma
1630rl78_offset_for_reloc (bfd * abfd,
1631 Elf_Internal_Rela * rel,
1632 Elf_Internal_Shdr * symtab_hdr,
1633 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1634 Elf_Internal_Sym * intsyms,
1635 Elf_Internal_Rela ** lrel,
1636 bfd * input_bfd,
1637 asection * input_section,
1638 struct bfd_link_info * info,
1639 int * scale)
1640{
1641 bfd_vma symval;
1642 bfd_reloc_status_type r;
1643
1644 *scale = 1;
1645
1646 /* REL is the first of 1..N relocations. We compute the symbol
1647 value for each relocation, then combine them if needed. LREL
1648 gets a pointer to the last relocation used. */
1649 while (1)
1650 {
1651 int32_t tmp1, tmp2;
1652
1653 /* Get the value of the symbol referred to by the reloc. */
1654 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1655 {
1656 /* A local symbol. */
1657 Elf_Internal_Sym *isym;
1658 asection *ssec;
1659
1660 isym = intsyms + ELF32_R_SYM (rel->r_info);
1661
1662 if (isym->st_shndx == SHN_UNDEF)
1663 ssec = bfd_und_section_ptr;
1664 else if (isym->st_shndx == SHN_ABS)
1665 ssec = bfd_abs_section_ptr;
1666 else if (isym->st_shndx == SHN_COMMON)
1667 ssec = bfd_com_section_ptr;
1668 else
1669 ssec = bfd_section_from_elf_index (abfd,
1670 isym->st_shndx);
1671
1672 /* Initial symbol value. */
1673 symval = isym->st_value;
1674
1675 /* GAS may have made this symbol relative to a section, in
1676 which case, we have to add the addend to find the
1677 symbol. */
1678 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1679 symval += rel->r_addend;
1680
1681 if (ssec)
1682 {
1683 if ((ssec->flags & SEC_MERGE)
dbaa2011 1684 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1685 symval = _bfd_merged_section_offset (abfd, & ssec,
1686 elf_section_data (ssec)->sec_info,
1687 symval);
1688 }
1689
1690 /* Now make the offset relative to where the linker is putting it. */
1691 if (ssec)
1692 symval +=
1693 ssec->output_section->vma + ssec->output_offset;
1694
1695 symval += rel->r_addend;
1696 }
1697 else
1698 {
1699 unsigned long indx;
1700 struct elf_link_hash_entry * h;
1701
1702 /* An external symbol. */
1703 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1704 h = elf_sym_hashes (abfd)[indx];
1705 BFD_ASSERT (h != NULL);
1706
1707 if (h->root.type != bfd_link_hash_defined
1708 && h->root.type != bfd_link_hash_defweak)
1709 {
1710 /* This appears to be a reference to an undefined
1711 symbol. Just ignore it--it will be caught by the
1712 regular reloc processing. */
1713 if (lrel)
1714 *lrel = rel;
1715 return 0;
1716 }
1717
1718 symval = (h->root.u.def.value
1719 + h->root.u.def.section->output_section->vma
1720 + h->root.u.def.section->output_offset);
1721
1722 symval += rel->r_addend;
1723 }
1724
1725 switch (ELF32_R_TYPE (rel->r_info))
1726 {
1727 case R_RL78_SYM:
1728 RL78_STACK_PUSH (symval);
1729 break;
1730
1731 case R_RL78_OPneg:
1732 RL78_STACK_POP (tmp1);
1733 tmp1 = - tmp1;
1734 RL78_STACK_PUSH (tmp1);
1735 break;
1736
1737 case R_RL78_OPadd:
1738 RL78_STACK_POP (tmp1);
1739 RL78_STACK_POP (tmp2);
1740 tmp1 += tmp2;
1741 RL78_STACK_PUSH (tmp1);
1742 break;
1743
1744 case R_RL78_OPsub:
1745 RL78_STACK_POP (tmp1);
1746 RL78_STACK_POP (tmp2);
1747 tmp2 -= tmp1;
1748 RL78_STACK_PUSH (tmp2);
1749 break;
1750
1751 case R_RL78_OPmul:
1752 RL78_STACK_POP (tmp1);
1753 RL78_STACK_POP (tmp2);
1754 tmp1 *= tmp2;
1755 RL78_STACK_PUSH (tmp1);
1756 break;
1757
1758 case R_RL78_OPdiv:
1759 RL78_STACK_POP (tmp1);
1760 RL78_STACK_POP (tmp2);
1761 tmp1 /= tmp2;
1762 RL78_STACK_PUSH (tmp1);
1763 break;
1764
1765 case R_RL78_OPshla:
1766 RL78_STACK_POP (tmp1);
1767 RL78_STACK_POP (tmp2);
1768 tmp1 <<= tmp2;
1769 RL78_STACK_PUSH (tmp1);
1770 break;
1771
1772 case R_RL78_OPshra:
1773 RL78_STACK_POP (tmp1);
1774 RL78_STACK_POP (tmp2);
1775 tmp1 >>= tmp2;
1776 RL78_STACK_PUSH (tmp1);
1777 break;
1778
1779 case R_RL78_OPsctsize:
1780 RL78_STACK_PUSH (input_section->size);
1781 break;
1782
1783 case R_RL78_OPscttop:
1784 RL78_STACK_PUSH (input_section->output_section->vma);
1785 break;
1786
1787 case R_RL78_OPand:
1788 RL78_STACK_POP (tmp1);
1789 RL78_STACK_POP (tmp2);
1790 tmp1 &= tmp2;
1791 RL78_STACK_PUSH (tmp1);
1792 break;
1793
1794 case R_RL78_OPor:
1795 RL78_STACK_POP (tmp1);
1796 RL78_STACK_POP (tmp2);
1797 tmp1 |= tmp2;
1798 RL78_STACK_PUSH (tmp1);
1799 break;
1800
1801 case R_RL78_OPxor:
1802 RL78_STACK_POP (tmp1);
1803 RL78_STACK_POP (tmp2);
1804 tmp1 ^= tmp2;
1805 RL78_STACK_PUSH (tmp1);
1806 break;
1807
1808 case R_RL78_OPnot:
1809 RL78_STACK_POP (tmp1);
1810 tmp1 = ~ tmp1;
1811 RL78_STACK_PUSH (tmp1);
1812 break;
1813
1814 case R_RL78_OPmod:
1815 RL78_STACK_POP (tmp1);
1816 RL78_STACK_POP (tmp2);
1817 tmp1 %= tmp2;
1818 RL78_STACK_PUSH (tmp1);
1819 break;
1820
1821 case R_RL78_OPromtop:
1822 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1823 break;
1824
1825 case R_RL78_OPramtop:
1826 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1827 break;
1828
1829 case R_RL78_DIR16UL:
1830 case R_RL78_DIR8UL:
1831 case R_RL78_ABS16UL:
1832 case R_RL78_ABS8UL:
1833 if (rl78_stack_top)
1834 RL78_STACK_POP (symval);
1835 if (lrel)
1836 *lrel = rel;
1837 *scale = 4;
1838 return symval;
1839
1840 case R_RL78_DIR16UW:
1841 case R_RL78_DIR8UW:
1842 case R_RL78_ABS16UW:
1843 case R_RL78_ABS8UW:
1844 if (rl78_stack_top)
1845 RL78_STACK_POP (symval);
1846 if (lrel)
1847 *lrel = rel;
1848 *scale = 2;
1849 return symval;
1850
1851 default:
1852 if (rl78_stack_top)
1853 RL78_STACK_POP (symval);
1854 if (lrel)
1855 *lrel = rel;
1856 return symval;
1857 }
1858
1859 rel ++;
1860 }
1861}
1862
1863struct {
1864 int prefix; /* or -1 for "no prefix" */
1865 int insn; /* or -1 for "end of list" */
1866 int insn_for_saddr; /* or -1 for "no alternative" */
1867 int insn_for_sfr; /* or -1 for "no alternative" */
1868} relax_addr16[] = {
1869 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1870 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1871 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1872 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1873
1874 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1875 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1876 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1877 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1878 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1879 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1880 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1881 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1882
1883 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1884 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1885 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1886 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1887 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1888
1889 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1890 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1891 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1892 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1893
1894 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1895 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1896 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1897
1898 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1899 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1900 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1901 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1902 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1903 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1904
1905 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1906
1907 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1908 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1909 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1910 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1911 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1912 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1913 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1914 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1915
1916 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1917 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1918 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1919 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1920 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1921 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1922 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1923 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1924
9cea966c
DD		 1925 { -1, -1, -1, -1 }
1926};
1927
1928/* Relax one section. */
1929
99c513f6
DD		 1930static bfd_boolean
1931rl78_elf_relax_section
1932 (bfd * abfd,
1933 asection * sec,
1934 struct bfd_link_info * link_info,
1935 bfd_boolean * again)
1936{
9cea966c
DD		 1937 Elf_Internal_Shdr * symtab_hdr;
1938 Elf_Internal_Shdr * shndx_hdr;
1939 Elf_Internal_Rela * internal_relocs;
1940 Elf_Internal_Rela * free_relocs = NULL;
1941 Elf_Internal_Rela * irel;
1942 Elf_Internal_Rela * srel;
1943 Elf_Internal_Rela * irelend;
1944 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 1945 bfd_byte * contents = NULL;
1946 bfd_byte * free_contents = NULL;
1947 Elf_Internal_Sym * intsyms = NULL;
1948 Elf_Internal_Sym * free_intsyms = NULL;
1949 Elf_External_Sym_Shndx * shndx_buf = NULL;
1950 bfd_vma pc;
9cea966c
DD		 1951 bfd_vma symval ATTRIBUTE_UNUSED = 0;
1952 int pcrel ATTRIBUTE_UNUSED = 0;
1953 int code ATTRIBUTE_UNUSED = 0;
1954 int section_alignment_glue;
1955 int scale;
1956
99c513f6
DD		 1957 if (abfd == elf_hash_table (link_info)->dynobj
1958 && strcmp (sec->name, ".plt") == 0)
1959 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
1960
1961 /* Assume nothing changes. */
1962 *again = FALSE;
9cea966c
DD		 1963
1964 /* We don't have to do anything for a relocatable link, if
1965 this section does not have relocs, or if this is not a
1966 code section. */
1967 if (link_info->relocatable
1968 || (sec->flags & SEC_RELOC) == 0
1969 || sec->reloc_count == 0
1970 || (sec->flags & SEC_CODE) == 0)
1971 return TRUE;
1972
1973 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1974 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1975
9cea966c
DD		 1976 /* Get the section contents. */
1977 if (elf_section_data (sec)->this_hdr.contents != NULL)
1978 contents = elf_section_data (sec)->this_hdr.contents;
1979 /* Go get them off disk. */
1980 else
1981 {
1982 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
1983 goto error_return;
1984 elf_section_data (sec)->this_hdr.contents = contents;
1985 }
1986
1987 /* Read this BFD's symbols. */
1988 /* Get cached copy if it exists. */
1989 if (symtab_hdr->contents != NULL)
1990 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
1991 else
1992 {
1993 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
1994 symtab_hdr->contents = (bfd_byte *) intsyms;
1995 }
1996
1997 if (shndx_hdr->sh_size != 0)
1998 {
1999 bfd_size_type amt;
2000
2001 amt = symtab_hdr->sh_info;
2002 amt *= sizeof (Elf_External_Sym_Shndx);
2003 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2004 if (shndx_buf == NULL)
2005 goto error_return;
2006 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2007 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2008 goto error_return;
2009 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2010 }
2011
2012 /* Get a copy of the native relocations. */
2013 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2014 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2015 link_info->keep_memory));
2016 if (internal_relocs == NULL)
2017 goto error_return;
2018 if (! link_info->keep_memory)
2019 free_relocs = internal_relocs;
2020
2021 /* The RL_ relocs must be just before the operand relocs they go
2022 with, so we must sort them to guarantee this. We use bubblesort
2023 instead of qsort so we can guarantee that relocs with the same
2024 address remain in the same relative order. */
2025 reloc_bubblesort (internal_relocs, sec->reloc_count);
2026
2027 /* Walk through them looking for relaxing opportunities. */
2028 irelend = internal_relocs + sec->reloc_count;
2029
2030
2031 /* This will either be NULL or a pointer to the next alignment
2032 relocation. */
2033 next_alignment = internal_relocs;
9cea966c
DD		 2034
2035 /* We calculate worst case shrinkage caused by alignment directives.
2036 No fool-proof, but better than either ignoring the problem or
2037 doing heavy duty analysis of all the alignment markers in all
2038 input sections. */
2039 section_alignment_glue = 0;
2040 for (irel = internal_relocs; irel < irelend; irel++)
2041 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2042 && irel->r_addend & RL78_RELAXA_ALIGN)
2043 {
2044 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2045
2046 if (section_alignment_glue < this_glue)
2047 section_alignment_glue = this_glue;
2048 }
2049 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2050 shrinkage. */
2051 section_alignment_glue *= 2;
2052
2053 for (irel = internal_relocs; irel < irelend; irel++)
2054 {
2055 unsigned char *insn;
2056 int nrelocs;
2057
2058 /* The insns we care about are all marked with one of these. */
2059 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2060 continue;
2061
2062 if (irel->r_addend & RL78_RELAXA_ALIGN
2063 || next_alignment == internal_relocs)
2064 {
2065 /* When we delete bytes, we need to maintain all the alignments
2066 indicated. In addition, we need to be careful about relaxing
2067 jumps across alignment boundaries - these displacements
2068 *grow* when we delete bytes. For now, don't shrink
2069 displacements across an alignment boundary, just in case.
2070 Note that this only affects relocations to the same
2071 section. */
9cea966c
DD		 2072 next_alignment += 2;
2073 while (next_alignment < irelend
2074 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2075 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2076 next_alignment ++;
2077 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2078 next_alignment = NULL;
2079 }
2080
2081 /* When we hit alignment markers, see if we've shrunk enough
2082 before them to reduce the gap without violating the alignment
2083 requirements. */
2084 if (irel->r_addend & RL78_RELAXA_ALIGN)
2085 {
2086 /* At this point, the next relocation *should* be the ELIGN
2087 end marker. */
2088 Elf_Internal_Rela *erel = irel + 1;
2089 unsigned int alignment, nbytes;
2090
2091 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2092 continue;
2093 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2094 continue;
2095
2096 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2097
2098 if (erel->r_offset - irel->r_offset < alignment)
2099 continue;
2100
2101 nbytes = erel->r_offset - irel->r_offset;
2102 nbytes /= alignment;
2103 nbytes *= alignment;
2104
2105 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2106 erel->r_offset == sec->size);
2107 *again = TRUE;
2108
2109 continue;
2110 }
2111
2112 if (irel->r_addend & RL78_RELAXA_ELIGN)
2113 continue;
2114
2115 insn = contents + irel->r_offset;
2116
2117 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2118
2119 /* At this point, we have an insn that is a candidate for linker
2120 relaxation. There are NRELOCS relocs following that may be
2121 relaxed, although each reloc may be made of more than one
2122 reloc entry (such as gp-rel symbols). */
2123
2124 /* Get the value of the symbol referred to by the reloc. Just
2125 in case this is the last reloc in the list, use the RL's
2126 addend to choose between this reloc (no addend) or the next
2127 (yes addend, which means at least one following reloc). */
2128
2129 /* srel points to the "current" reloction for this insn -
2130 actually the last reloc for a given operand, which is the one
2131 we need to update. We check the relaxations in the same
2132 order that the relocations happen, so we'll just push it
2133 along as we go. */
2134 srel = irel;
2135
2136 pc = sec->output_section->vma + sec->output_offset
2137 + srel->r_offset;
2138
2139#define GET_RELOC \
1122dc88 2140 BFD_ASSERT (nrelocs > 0); \
9cea966c
DD		 2141 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2142 pcrel = symval - pc + srel->r_addend; \
2143 nrelocs --;
2144
2145#define SNIPNR(offset, nbytes) \
2146 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2147#define SNIP(offset, nbytes, newtype) \
2148 SNIPNR (offset, nbytes); \
2149 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2150
2151 /* The order of these bit tests must match the order that the
2152 relocs appear in. Since we sorted those by offset, we can
2153 predict them. */
2154
2155 /*----------------------------------------------------------------------*/
2156 /* EF ad BR $rel8 pcrel
2157 ED al ah BR !abs16 abs
2158 EE al ah BR $!rel16 pcrel
2159 EC al ah as BR !!abs20 abs
2160
2161 FD al ah CALL !abs16 abs
2162 FE al ah CALL $!rel16 pcrel
2163 FC al ah as CALL !!abs20 abs
2164
2165 DC ad BC $rel8
2166 DE ad BNC $rel8
2167 DD ad BZ $rel8
2168 DF ad BNZ $rel8
2169 61 C3 ad BH $rel8
2170 61 D3 ad BNH $rel8
2171 61 C8 EF ad SKC ; BR $rel8
2172 61 D8 EF ad SKNC ; BR $rel8
2173 61 E8 EF ad SKZ ; BR $rel8
2174 61 F8 EF ad SKNZ ; BR $rel8
2175 61 E3 EF ad SKH ; BR $rel8
2176 61 F3 EF ad SKNH ; BR $rel8
2177 */
2178
2179 if (irel->r_addend & RL78_RELAXA_BRA)
2180 {
1122dc88
DD		 2181 /* SKIP opcodes that skip non-branches will have a relax tag
2182 but no corresponding symbol to relax against; we just
2183 skip those. */
2184 if (irel->r_addend & RL78_RELAXA_RNUM)
2185 {
2186 GET_RELOC;
2187 }
9cea966c
DD		 2188
2189 switch (insn[0])
2190 {
2191 case 0xec: /* BR !!abs20 */
2192
2193 if (pcrel < 127
2194 && pcrel > -127)
2195 {
2196 insn[0] = 0xef;
2197 insn[1] = pcrel;
2198 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2199 *again = TRUE;
2200 }
2201 else if (symval < 65536)
2202 {
2203 insn[0] = 0xed;
2204 insn[1] = symval & 0xff;
2205 insn[2] = symval >> 8;
2206 SNIP (2, 1, R_RL78_DIR16S);
2207 *again = TRUE;
2208 }
2209 else if (pcrel < 32767
2210 && pcrel > -32767)
2211 {
2212 insn[0] = 0xee;
2213 insn[1] = pcrel & 0xff;
2214 insn[2] = pcrel >> 8;
2215 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2216 *again = TRUE;
2217 }
2218 break;
2219
2220 case 0xee: /* BR $!pcrel16 */
2221 case 0xed: /* BR $!abs16 */
2222 if (pcrel < 127
2223 && pcrel > -127)
2224 {
2225 insn[0] = 0xef;
2226 insn[1] = pcrel;
2227 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2228 *again = TRUE;
2229 }
2230 break;
2231
2232 case 0xfc: /* CALL !!abs20 */
2233 if (symval < 65536)
2234 {
2235 insn[0] = 0xfd;
2236 insn[1] = symval & 0xff;
2237 insn[2] = symval >> 8;
2238 SNIP (2, 1, R_RL78_DIR16S);
2239 *again = TRUE;
2240 }
2241 else if (pcrel < 32767
2242 && pcrel > -32767)
2243 {
2244 insn[0] = 0xfe;
2245 insn[1] = pcrel & 0xff;
2246 insn[2] = pcrel >> 8;
2247 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2248 *again = TRUE;
2249 }
2250 break;
2251
2252 case 0x61: /* PREFIX */
2253 /* For SKIP/BR, we change the BR opcode and delete the
2254 SKIP. That way, we don't have to find and change the
2255 relocation for the BR. */
1122dc88
DD		 2256 /* Note that, for the case where we're skipping some
2257 other insn, we have no "other" reloc but that's safe
2258 here anyway. */
9cea966c
DD		 2259 switch (insn[1])
2260 {
2261 case 0xc8: /* SKC */
2262 if (insn[2] == 0xef)
2263 {
2264 insn[2] = 0xde; /* BNC */
2265 SNIPNR (0, 2);
2266 }
2267 break;
2268
2269 case 0xd8: /* SKNC */
2270 if (insn[2] == 0xef)
2271 {
2272 insn[2] = 0xdc; /* BC */
2273 SNIPNR (0, 2);
2274 }
2275 break;
2276
2277 case 0xe8: /* SKZ */
2278 if (insn[2] == 0xef)
2279 {
2280 insn[2] = 0xdf; /* BNZ */
2281 SNIPNR (0, 2);
2282 }
2283 break;
2284
2285 case 0xf8: /* SKNZ */
2286 if (insn[2] == 0xef)
2287 {
2288 insn[2] = 0xdd; /* BZ */
2289 SNIPNR (0, 2);
2290 }
2291 break;
2292
2293 case 0xe3: /* SKH */
2294 if (insn[2] == 0xef)
2295 {
2296 insn[2] = 0xd3; /* BNH */
2297 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2298 }
2299 break;
2300
2301 case 0xf3: /* SKNH */
2302 if (insn[2] == 0xef)
2303 {
2304 insn[2] = 0xc3; /* BH */
2305 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2306 }
2307 break;
2308 }
2309 break;
2310 }
68ffbac6 2311
9cea966c
DD		 2312 }
2313
2314 if (irel->r_addend & RL78_RELAXA_ADDR16)
2315 {
2316 /*----------------------------------------------------------------------*/
2317 /* Some insns have both a 16-bit address operand and an 8-bit
2318 variant if the address is within a special range:
2319
2320 Address 16-bit operand SADDR range SFR range
2321 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2322 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2323
2324 The RELAX_ADDR16[] array has the insn encodings for the
2325 16-bit operand version, as well as the SFR and SADDR
2326 variants. We only need to replace the encodings and
2327 adjust the operand.
2328
2329 Note: we intentionally do not attempt to decode and skip
2330 any ES: prefix, as adding ES: means the addr16 (likely)
2331 no longer points to saddr/sfr space.
2332 */
2333
2334 int is_sfr;
2335 int is_saddr;
2336 int idx;
2337 int poff;
2338
2339 GET_RELOC;
2340
9cea966c
DD		 2341 if (0xffe20 <= symval && symval <= 0xfffff)
2342 {
2343
2344 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2345 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2346
2347 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2348 {
2349 if (relax_addr16[idx].prefix != -1
2350 && insn[0] == relax_addr16[idx].prefix
2351 && insn[1] == relax_addr16[idx].insn)
2352 {
2353 poff = 1;
2354 }
2355 else if (relax_addr16[idx].prefix == -1
2356 && insn[0] == relax_addr16[idx].insn)
2357 {
2358 poff = 0;
2359 }
2360 else
2361 continue;
2362
2363 /* We have a matched insn, and poff is 0 or 1 depending
2364 on the base pattern size. */
2365
2366 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2367 {
2368 insn[poff] = relax_addr16[idx].insn_for_sfr;
2369 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2370 }
2371
2372 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2373 {
2374 insn[poff] = relax_addr16[idx].insn_for_saddr;
2375 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2376 }
68ffbac6 2377
9cea966c
DD		 2378 }
2379 }
2380 }
2381
2382 /*----------------------------------------------------------------------*/
2383
2384 }
2385
2386 return TRUE;
2387
2388 error_return:
2389 if (free_relocs != NULL)
2390 free (free_relocs);
2391
2392 if (free_contents != NULL)
2393 free (free_contents);
2394
2395 if (shndx_buf != NULL)
2396 {
2397 shndx_hdr->contents = NULL;
2398 free (shndx_buf);
2399 }
2400
2401 if (free_intsyms != NULL)
2402 free (free_intsyms);
2403
99c513f6
DD		 2404 return TRUE;
2405}
2406
2407\f
2408
2409#define ELF_ARCH bfd_arch_rl78
2410#define ELF_MACHINE_CODE EM_RL78
2411#define ELF_MAXPAGESIZE 0x1000
2412
2413#define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
2414#define TARGET_LITTLE_NAME "elf32-rl78"
2415
2416#define elf_info_to_howto_rel NULL
2417#define elf_info_to_howto rl78_info_to_howto_rela
2418#define elf_backend_object_p rl78_elf_object_p
2419#define elf_backend_relocate_section rl78_elf_relocate_section
2420#define elf_symbol_leading_char ('_')
2421#define elf_backend_can_gc_sections 1
2422
2423#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2424#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2425#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2426#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2427#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2428
2429#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2430#define elf_backend_check_relocs rl78_elf_check_relocs
2431#define elf_backend_always_size_sections \
2432 rl78_elf_always_size_sections
2433#define elf_backend_finish_dynamic_sections \
2434 rl78_elf_finish_dynamic_sections
2435
2436#include "elf32-target.h"
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