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cec5225b 1/* AArch64-specific support for NN-bit ELF.
b3adc24a 2 Copyright (C) 2009-2020 Free Software Foundation, Inc.
a06ea964
NC
3 Contributed by ARM Ltd.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21/* Notes on implementation:
22
23 Thread Local Store (TLS)
24
25 Overview:
26
27 The implementation currently supports both traditional TLS and TLS
28 descriptors, but only general dynamic (GD).
29
30 For traditional TLS the assembler will present us with code
31 fragments of the form:
32
33 adrp x0, :tlsgd:foo
07d6d2b8 34 R_AARCH64_TLSGD_ADR_PAGE21(foo)
a06ea964 35 add x0, :tlsgd_lo12:foo
07d6d2b8 36 R_AARCH64_TLSGD_ADD_LO12_NC(foo)
a06ea964
NC
37 bl __tls_get_addr
38 nop
39
40 For TLS descriptors the assembler will present us with code
41 fragments of the form:
42
07d6d2b8
AM
43 adrp x0, :tlsdesc:foo R_AARCH64_TLSDESC_ADR_PAGE21(foo)
44 ldr x1, [x0, #:tlsdesc_lo12:foo] R_AARCH64_TLSDESC_LD64_LO12(foo)
45 add x0, x0, #:tlsdesc_lo12:foo R_AARCH64_TLSDESC_ADD_LO12(foo)
a06ea964 46 .tlsdesccall foo
07d6d2b8 47 blr x1 R_AARCH64_TLSDESC_CALL(foo)
a06ea964
NC
48
49 The relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} against foo
50 indicate that foo is thread local and should be accessed via the
51 traditional TLS mechanims.
52
a6bb11b2 53 The relocations R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC}
a06ea964
NC
54 against foo indicate that 'foo' is thread local and should be accessed
55 via a TLS descriptor mechanism.
56
57 The precise instruction sequence is only relevant from the
58 perspective of linker relaxation which is currently not implemented.
59
60 The static linker must detect that 'foo' is a TLS object and
61 allocate a double GOT entry. The GOT entry must be created for both
62 global and local TLS symbols. Note that this is different to none
63 TLS local objects which do not need a GOT entry.
64
65 In the traditional TLS mechanism, the double GOT entry is used to
66 provide the tls_index structure, containing module and offset
a6bb11b2 67 entries. The static linker places the relocation R_AARCH64_TLS_DTPMOD
a06ea964
NC
68 on the module entry. The loader will subsequently fixup this
69 relocation with the module identity.
70
71 For global traditional TLS symbols the static linker places an
a6bb11b2 72 R_AARCH64_TLS_DTPREL relocation on the offset entry. The loader
a06ea964
NC
73 will subsequently fixup the offset. For local TLS symbols the static
74 linker fixes up offset.
75
76 In the TLS descriptor mechanism the double GOT entry is used to
77 provide the descriptor. The static linker places the relocation
78 R_AARCH64_TLSDESC on the first GOT slot. The loader will
79 subsequently fix this up.
80
81 Implementation:
82
83 The handling of TLS symbols is implemented across a number of
84 different backend functions. The following is a top level view of
85 what processing is performed where.
86
87 The TLS implementation maintains state information for each TLS
88 symbol. The state information for local and global symbols is kept
89 in different places. Global symbols use generic BFD structures while
90 local symbols use backend specific structures that are allocated and
91 maintained entirely by the backend.
92
93 The flow:
94
cec5225b 95 elfNN_aarch64_check_relocs()
a06ea964
NC
96
97 This function is invoked for each relocation.
98
99 The TLS relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} and
a6bb11b2 100 R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC} are
a06ea964
NC
101 spotted. One time creation of local symbol data structures are
102 created when the first local symbol is seen.
103
104 The reference count for a symbol is incremented. The GOT type for
105 each symbol is marked as general dynamic.
106
cec5225b 107 elfNN_aarch64_allocate_dynrelocs ()
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NC
108
109 For each global with positive reference count we allocate a double
110 GOT slot. For a traditional TLS symbol we allocate space for two
111 relocation entries on the GOT, for a TLS descriptor symbol we
112 allocate space for one relocation on the slot. Record the GOT offset
113 for this symbol.
114
cec5225b 115 elfNN_aarch64_size_dynamic_sections ()
a06ea964
NC
116
117 Iterate all input BFDS, look for in the local symbol data structure
118 constructed earlier for local TLS symbols and allocate them double
119 GOT slots along with space for a single GOT relocation. Update the
120 local symbol structure to record the GOT offset allocated.
121
cec5225b 122 elfNN_aarch64_relocate_section ()
a06ea964 123
cec5225b 124 Calls elfNN_aarch64_final_link_relocate ()
a06ea964
NC
125
126 Emit the relevant TLS relocations against the GOT for each TLS
127 symbol. For local TLS symbols emit the GOT offset directly. The GOT
128 relocations are emitted once the first time a TLS symbol is
129 encountered. The implementation uses the LSB of the GOT offset to
130 flag that the relevant GOT relocations for a symbol have been
131 emitted. All of the TLS code that uses the GOT offset needs to take
132 care to mask out this flag bit before using the offset.
133
cec5225b 134 elfNN_aarch64_final_link_relocate ()
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NC
135
136 Fixup the R_AARCH64_TLSGD_{ADR_PREL21, ADD_LO12_NC} relocations. */
137
138#include "sysdep.h"
139#include "bfd.h"
140#include "libiberty.h"
141#include "libbfd.h"
a06ea964
NC
142#include "elf-bfd.h"
143#include "bfdlink.h"
1419bbe5 144#include "objalloc.h"
a06ea964 145#include "elf/aarch64.h"
caed7120 146#include "elfxx-aarch64.h"
a8bfaadb 147#include "cpu-aarch64.h"
a06ea964 148
cec5225b
YZ
149#define ARCH_SIZE NN
150
151#if ARCH_SIZE == 64
152#define AARCH64_R(NAME) R_AARCH64_ ## NAME
153#define AARCH64_R_STR(NAME) "R_AARCH64_" #NAME
a6bb11b2
YZ
154#define HOWTO64(...) HOWTO (__VA_ARGS__)
155#define HOWTO32(...) EMPTY_HOWTO (0)
cec5225b 156#define LOG_FILE_ALIGN 3
f955cccf 157#define BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
cec5225b
YZ
158#endif
159
f7d2c675
SP
160#define MORELLO_R(NAME) R_MORELLO_ ## NAME
161#define MORELLO_R_STR(NAME) "R_MORELLO_" #NAME
162
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YZ
163#if ARCH_SIZE == 32
164#define AARCH64_R(NAME) R_AARCH64_P32_ ## NAME
165#define AARCH64_R_STR(NAME) "R_AARCH64_P32_" #NAME
a6bb11b2
YZ
166#define HOWTO64(...) EMPTY_HOWTO (0)
167#define HOWTO32(...) HOWTO (__VA_ARGS__)
cec5225b 168#define LOG_FILE_ALIGN 2
07d6d2b8
AM
169#define BFD_RELOC_AARCH64_TLSDESC_LD32_LO12 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
170#define R_AARCH64_P32_TLSDESC_ADD_LO12 R_AARCH64_P32_TLSDESC_ADD_LO12_NC
cec5225b
YZ
171#endif
172
a6bb11b2 173#define IS_AARCH64_TLS_RELOC(R_TYPE) \
4c0a9a6f
JW
174 ((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
175 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
3c12b054 176 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
3e8286c0 177 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
1aa66fb1 178 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
a6bb11b2 179 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
a6bb11b2 180 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
4c0a9a6f 181 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC \
a6bb11b2 182 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
4c0a9a6f
JW
183 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC \
184 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1 \
6ffe9a1b 185 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12 \
40fbed84 186 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 \
753999c1 187 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC \
73f925cc 188 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
f69e4920 189 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
77a69ff8 190 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 \
07c9aa07
JW
191 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12 \
192 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC \
193 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12 \
194 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC \
195 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12 \
196 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC \
197 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12 \
198 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC \
6ffe9a1b
JW
199 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0 \
200 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC \
201 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1 \
202 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC \
203 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2 \
a6bb11b2 204 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
4c0a9a6f 205 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
a6bb11b2 206 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
e04ef022
RL
207 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
208 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
209 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
210 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
211 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
212 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
213 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
214 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
a6bb11b2
YZ
215 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
216 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
4c0a9a6f
JW
217 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
218 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC \
219 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2 \
a6bb11b2
YZ
220 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPMOD \
221 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPREL \
222 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_TPREL \
a06ea964
NC
223 || IS_AARCH64_TLSDESC_RELOC ((R_TYPE)))
224
9331eea1 225#define IS_AARCH64_TLS_RELAX_RELOC(R_TYPE) \
f955cccf
NC
226 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
227 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
4ca9b406 228 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
4af68b9c
JW
229 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
230 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4ca9b406 231 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
4af68b9c
JW
232 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
233 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
4ca9b406 234 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
4af68b9c 235 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC \
0484b454
RL
236 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
237 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
238 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1 \
239 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4af68b9c 240 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
9331eea1
JW
241 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
242 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
ac734732
RL
243 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
244 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
9331eea1
JW
245 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
246 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
247 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC \
259364ad
JW
248 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
249 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
4af68b9c 250 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21)
9331eea1 251
a6bb11b2 252#define IS_AARCH64_TLSDESC_RELOC(R_TYPE) \
4c0a9a6f
JW
253 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC \
254 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
f955cccf 255 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
a6bb11b2 256 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
4ca9b406 257 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
389b8029 258 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4c0a9a6f 259 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
4ca9b406 260 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
a6bb11b2 261 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC \
f955cccf 262 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD64_LO12 \
4ca9b406 263 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
a6bb11b2 264 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4c0a9a6f
JW
265 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
266 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
267 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1)
a06ea964 268
6353d82b 269#define ELIMINATE_COPY_RELOCS 1
a06ea964 270
a06ea964 271/* Return size of a relocation entry. HTAB is the bfd's
cec5225b
YZ
272 elf_aarch64_link_hash_entry. */
273#define RELOC_SIZE(HTAB) (sizeof (ElfNN_External_Rela))
a06ea964 274
a1bdea65
SP
275/* GOT Entry size - 16 bytes in C64, 8 bytes in ELF64 and 4 bytes in ELF32. */
276#define GOT_ENTRY_SIZE(htab) (ARCH_SIZE >> (3 - htab->c64_rel))
277#define GOT_RESERVED_HEADER_SLOTS (3)
07d6d2b8
AM
278#define PLT_ENTRY_SIZE (32)
279#define PLT_SMALL_ENTRY_SIZE (16)
280#define PLT_TLSDESC_ENTRY_SIZE (32)
37c18eed 281/* PLT sizes with BTI insn. */
68bb0359 282#define PLT_BTI_SMALL_ENTRY_SIZE (24)
1dbade74 283/* PLT sizes with PAC insn. */
68bb0359 284#define PLT_PAC_SMALL_ENTRY_SIZE (24)
1dbade74 285/* PLT sizes with BTI and PAC insn. */
1dbade74 286#define PLT_BTI_PAC_SMALL_ENTRY_SIZE (24)
a06ea964 287
2d0ca824 288/* Encoding of the nop instruction. */
a06ea964
NC
289#define INSN_NOP 0xd503201f
290
291#define aarch64_compute_jump_table_size(htab) \
292 (((htab)->root.srelplt == NULL) ? 0 \
a1bdea65 293 : (htab)->root.srelplt->reloc_count * GOT_ENTRY_SIZE (htab))
a06ea964
NC
294
295/* The first entry in a procedure linkage table looks like this
296 if the distance between the PLTGOT and the PLT is < 4GB use
297 these PLT entries. Note that the dynamic linker gets &PLTGOT[2]
298 in x16 and needs to work out PLTGOT[1] by using an address of
cec5225b
YZ
299 [x16,#-GOT_ENTRY_SIZE]. */
300static const bfd_byte elfNN_aarch64_small_plt0_entry[PLT_ENTRY_SIZE] =
a06ea964
NC
301{
302 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
303 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
caed7120 304#if ARCH_SIZE == 64
a06ea964
NC
305 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
306 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
caed7120
YZ
307#else
308 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
309 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
310#endif
a06ea964
NC
311 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
312 0x1f, 0x20, 0x03, 0xd5, /* nop */
313 0x1f, 0x20, 0x03, 0xd5, /* nop */
314 0x1f, 0x20, 0x03, 0xd5, /* nop */
315};
316
68bb0359 317static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_ENTRY_SIZE] =
37c18eed
SD
318{
319 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
320 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
321 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
322#if ARCH_SIZE == 64
323 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
324 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
325#else
326 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
327 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
328#endif
329 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
330 0x1f, 0x20, 0x03, 0xd5, /* nop */
331 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD
332};
333
e19e9199
SP
334/* The C64 PLT0. */
335static const bfd_byte elfNN_c64_small_plt0_entry[PLT_ENTRY_SIZE] =
336{
337 0xf0, 0x7b, 0xbf, 0x62, /* stp c16, c30, [csp, #-32]! */
338 0x10, 0x00, 0x80, 0x90, /* adrp c16, (GOT+16) */
339 0x11, 0x0a, 0x40, 0xc2, /* ldr c17, [c16, #PLT_GOT+0x10] */
340 0x10, 0x02, 0x00, 0x02, /* add c16, c16,#PLT_GOT+0x10 */
341 0x20, 0x12, 0xc2, 0xc2, /* br c17 */
342 0x1f, 0x20, 0x03, 0xd5, /* nop */
343 0x1f, 0x20, 0x03, 0xd5, /* nop */
344 0x1f, 0x20, 0x03, 0xd5, /* nop */
345};
346
a06ea964
NC
347/* Per function entry in a procedure linkage table looks like this
348 if the distance between the PLTGOT and the PLT is < 4GB use
37c18eed 349 these PLT entries. Use BTI versions of the PLTs when enabled. */
cec5225b 350static const bfd_byte elfNN_aarch64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
a06ea964
NC
351{
352 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
caed7120 353#if ARCH_SIZE == 64
a06ea964
NC
354 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
355 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
caed7120
YZ
356#else
357 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
358 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
359#endif
a06ea964
NC
360 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
361};
362
e19e9199
SP
363/* The C64 PLT. */
364static const bfd_byte elfNN_c64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
365{
366 0x10, 0x00, 0x80, 0x90, /* adrp c16, PLTGOT + offset */
367 0x11, 0x02, 0x40, 0xc2, /* ldr c17, [c16, PLTGOT + offset] */
368 0x10, 0x02, 0x00, 0x02, /* add c16, c16, :lo12:PLTGOT + offset */
369 0x20, 0x12, 0xc2, 0xc2, /* br c17. */
370};
371
37c18eed
SD
372static const bfd_byte
373elfNN_aarch64_small_plt_bti_entry[PLT_BTI_SMALL_ENTRY_SIZE] =
374{
375 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
376 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
377#if ARCH_SIZE == 64
378 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
379 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
380#else
381 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
382 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
383#endif
384 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 385 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD
386};
387
1dbade74
SD
388static const bfd_byte
389elfNN_aarch64_small_plt_pac_entry[PLT_PAC_SMALL_ENTRY_SIZE] =
390{
391 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
392#if ARCH_SIZE == 64
393 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
394 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
395#else
396 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
397 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
398#endif
399 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
400 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 401 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD
402};
403
404static const bfd_byte
405elfNN_aarch64_small_plt_bti_pac_entry[PLT_BTI_PAC_SMALL_ENTRY_SIZE] =
406{
407 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
408 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
409#if ARCH_SIZE == 64
410 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
411 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
412#else
413 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
414 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
415#endif
416 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
417 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
418};
419
a06ea964 420static const bfd_byte
cec5225b 421elfNN_aarch64_tlsdesc_small_plt_entry[PLT_TLSDESC_ENTRY_SIZE] =
a06ea964
NC
422{
423 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
424 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
425 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
caed7120
YZ
426#if ARCH_SIZE == 64
427 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
a06ea964 428 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
caed7120
YZ
429#else
430 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
431 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
432#endif
433 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
a06ea964
NC
434 0x1f, 0x20, 0x03, 0xd5, /* nop */
435 0x1f, 0x20, 0x03, 0xd5, /* nop */
436};
437
37c18eed 438static const bfd_byte
68bb0359 439elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_TLSDESC_ENTRY_SIZE] =
37c18eed
SD
440{
441 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
442 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
443 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
444 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
445#if ARCH_SIZE == 64
446 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
447 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
448#else
449 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
450 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
451#endif
452 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
453 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD
454};
455
4ca9b406
SP
456static const bfd_byte
457elfNN_aarch64_tlsdesc_small_plt_c64_entry[PLT_TLSDESC_ENTRY_SIZE] =
458{
459 0xe2, 0x8f, 0xbf, 0x62, /* stp c2, c3, [sp, #-16]! */
460 0x02, 0x00, 0x80, 0x90, /* adrp c2, 0 */
461 0x03, 0x00, 0x80, 0x90, /* adrp c3, 0 */
462 0x42, 0x00, 0x40, 0xc2, /* ldr c2, [c2, #0] */
463 0x63, 0x00, 0x00, 0x02, /* add c3, c3, 0 */
464 0x40, 0x10, 0xc2, 0xc2, /* br c2 */
465 0x1f, 0x20, 0x03, 0xd5, /* nop */
466 0x1f, 0x20, 0x03, 0xd5, /* nop */
467};
468
07d6d2b8
AM
469#define elf_info_to_howto elfNN_aarch64_info_to_howto
470#define elf_info_to_howto_rel elfNN_aarch64_info_to_howto
a06ea964
NC
471
472#define AARCH64_ELF_ABI_VERSION 0
a06ea964
NC
473
474/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
475#define ALL_ONES (~ (bfd_vma) 0)
476
a6bb11b2
YZ
477/* Indexed by the bfd interal reloc enumerators.
478 Therefore, the table needs to be synced with BFD_RELOC_AARCH64_*
479 in reloc.c. */
a06ea964 480
a6bb11b2 481static reloc_howto_type elfNN_aarch64_howto_table[] =
a06ea964 482{
a6bb11b2 483 EMPTY_HOWTO (0),
a06ea964 484
a6bb11b2 485 /* Basic data relocations. */
a06ea964 486
b7f28d87
JW
487 /* Deprecated, but retained for backwards compatibility. */
488 HOWTO64 (R_AARCH64_NULL, /* type */
a06ea964 489 0, /* rightshift */
6346d5ca 490 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2 491 0, /* bitsize */
a06ea964
NC
492 FALSE, /* pc_relative */
493 0, /* bitpos */
494 complain_overflow_dont, /* complain_on_overflow */
495 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 496 "R_AARCH64_NULL", /* name */
a06ea964
NC
497 FALSE, /* partial_inplace */
498 0, /* src_mask */
a6bb11b2 499 0, /* dst_mask */
a06ea964 500 FALSE), /* pcrel_offset */
a6bb11b2 501 HOWTO (R_AARCH64_NONE, /* type */
a06ea964 502 0, /* rightshift */
6346d5ca 503 3, /* size (0 = byte, 1 = short, 2 = long) */
a06ea964
NC
504 0, /* bitsize */
505 FALSE, /* pc_relative */
506 0, /* bitpos */
507 complain_overflow_dont, /* complain_on_overflow */
508 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 509 "R_AARCH64_NONE", /* name */
a06ea964
NC
510 FALSE, /* partial_inplace */
511 0, /* src_mask */
512 0, /* dst_mask */
513 FALSE), /* pcrel_offset */
514
515 /* .xword: (S+A) */
a6bb11b2 516 HOWTO64 (AARCH64_R (ABS64), /* type */
a06ea964
NC
517 0, /* rightshift */
518 4, /* size (4 = long long) */
519 64, /* bitsize */
520 FALSE, /* pc_relative */
521 0, /* bitpos */
522 complain_overflow_unsigned, /* complain_on_overflow */
523 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 524 AARCH64_R_STR (ABS64), /* name */
a06ea964
NC
525 FALSE, /* partial_inplace */
526 ALL_ONES, /* src_mask */
527 ALL_ONES, /* dst_mask */
528 FALSE), /* pcrel_offset */
529
530 /* .word: (S+A) */
a6bb11b2 531 HOWTO (AARCH64_R (ABS32), /* type */
a06ea964
NC
532 0, /* rightshift */
533 2, /* size (0 = byte, 1 = short, 2 = long) */
534 32, /* bitsize */
535 FALSE, /* pc_relative */
536 0, /* bitpos */
537 complain_overflow_unsigned, /* complain_on_overflow */
538 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 539 AARCH64_R_STR (ABS32), /* name */
a06ea964
NC
540 FALSE, /* partial_inplace */
541 0xffffffff, /* src_mask */
542 0xffffffff, /* dst_mask */
543 FALSE), /* pcrel_offset */
544
545 /* .half: (S+A) */
a6bb11b2 546 HOWTO (AARCH64_R (ABS16), /* type */
a06ea964
NC
547 0, /* rightshift */
548 1, /* size (0 = byte, 1 = short, 2 = long) */
549 16, /* bitsize */
550 FALSE, /* pc_relative */
551 0, /* bitpos */
552 complain_overflow_unsigned, /* complain_on_overflow */
553 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 554 AARCH64_R_STR (ABS16), /* name */
a06ea964
NC
555 FALSE, /* partial_inplace */
556 0xffff, /* src_mask */
557 0xffff, /* dst_mask */
558 FALSE), /* pcrel_offset */
559
560 /* .xword: (S+A-P) */
a6bb11b2 561 HOWTO64 (AARCH64_R (PREL64), /* type */
a06ea964
NC
562 0, /* rightshift */
563 4, /* size (4 = long long) */
564 64, /* bitsize */
565 TRUE, /* pc_relative */
566 0, /* bitpos */
567 complain_overflow_signed, /* complain_on_overflow */
568 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 569 AARCH64_R_STR (PREL64), /* name */
a06ea964
NC
570 FALSE, /* partial_inplace */
571 ALL_ONES, /* src_mask */
572 ALL_ONES, /* dst_mask */
573 TRUE), /* pcrel_offset */
574
575 /* .word: (S+A-P) */
a6bb11b2 576 HOWTO (AARCH64_R (PREL32), /* type */
a06ea964
NC
577 0, /* rightshift */
578 2, /* size (0 = byte, 1 = short, 2 = long) */
579 32, /* bitsize */
580 TRUE, /* pc_relative */
581 0, /* bitpos */
582 complain_overflow_signed, /* complain_on_overflow */
583 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 584 AARCH64_R_STR (PREL32), /* name */
a06ea964
NC
585 FALSE, /* partial_inplace */
586 0xffffffff, /* src_mask */
587 0xffffffff, /* dst_mask */
588 TRUE), /* pcrel_offset */
589
590 /* .half: (S+A-P) */
a6bb11b2 591 HOWTO (AARCH64_R (PREL16), /* type */
a06ea964
NC
592 0, /* rightshift */
593 1, /* size (0 = byte, 1 = short, 2 = long) */
594 16, /* bitsize */
595 TRUE, /* pc_relative */
596 0, /* bitpos */
597 complain_overflow_signed, /* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 599 AARCH64_R_STR (PREL16), /* name */
a06ea964
NC
600 FALSE, /* partial_inplace */
601 0xffff, /* src_mask */
602 0xffff, /* dst_mask */
603 TRUE), /* pcrel_offset */
604
605 /* Group relocations to create a 16, 32, 48 or 64 bit
606 unsigned data or abs address inline. */
607
608 /* MOVZ: ((S+A) >> 0) & 0xffff */
a6bb11b2 609 HOWTO (AARCH64_R (MOVW_UABS_G0), /* type */
a06ea964
NC
610 0, /* rightshift */
611 2, /* size (0 = byte, 1 = short, 2 = long) */
612 16, /* bitsize */
613 FALSE, /* pc_relative */
614 0, /* bitpos */
615 complain_overflow_unsigned, /* complain_on_overflow */
616 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 617 AARCH64_R_STR (MOVW_UABS_G0), /* name */
a06ea964
NC
618 FALSE, /* partial_inplace */
619 0xffff, /* src_mask */
620 0xffff, /* dst_mask */
621 FALSE), /* pcrel_offset */
622
623 /* MOVK: ((S+A) >> 0) & 0xffff [no overflow check] */
a6bb11b2 624 HOWTO (AARCH64_R (MOVW_UABS_G0_NC), /* type */
a06ea964
NC
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 16, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont, /* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 632 AARCH64_R_STR (MOVW_UABS_G0_NC), /* name */
a06ea964
NC
633 FALSE, /* partial_inplace */
634 0xffff, /* src_mask */
635 0xffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 /* MOVZ: ((S+A) >> 16) & 0xffff */
a6bb11b2 639 HOWTO (AARCH64_R (MOVW_UABS_G1), /* type */
a06ea964
NC
640 16, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 16, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_unsigned, /* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 647 AARCH64_R_STR (MOVW_UABS_G1), /* name */
a06ea964
NC
648 FALSE, /* partial_inplace */
649 0xffff, /* src_mask */
650 0xffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 /* MOVK: ((S+A) >> 16) & 0xffff [no overflow check] */
a6bb11b2 654 HOWTO64 (AARCH64_R (MOVW_UABS_G1_NC), /* type */
a06ea964
NC
655 16, /* rightshift */
656 2, /* size (0 = byte, 1 = short, 2 = long) */
657 16, /* bitsize */
658 FALSE, /* pc_relative */
659 0, /* bitpos */
660 complain_overflow_dont, /* complain_on_overflow */
661 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 662 AARCH64_R_STR (MOVW_UABS_G1_NC), /* name */
a06ea964
NC
663 FALSE, /* partial_inplace */
664 0xffff, /* src_mask */
665 0xffff, /* dst_mask */
666 FALSE), /* pcrel_offset */
667
668 /* MOVZ: ((S+A) >> 32) & 0xffff */
a6bb11b2 669 HOWTO64 (AARCH64_R (MOVW_UABS_G2), /* type */
a06ea964
NC
670 32, /* rightshift */
671 2, /* size (0 = byte, 1 = short, 2 = long) */
672 16, /* bitsize */
673 FALSE, /* pc_relative */
674 0, /* bitpos */
675 complain_overflow_unsigned, /* complain_on_overflow */
676 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 677 AARCH64_R_STR (MOVW_UABS_G2), /* name */
a06ea964
NC
678 FALSE, /* partial_inplace */
679 0xffff, /* src_mask */
680 0xffff, /* dst_mask */
681 FALSE), /* pcrel_offset */
682
683 /* MOVK: ((S+A) >> 32) & 0xffff [no overflow check] */
a6bb11b2 684 HOWTO64 (AARCH64_R (MOVW_UABS_G2_NC), /* type */
a06ea964
NC
685 32, /* rightshift */
686 2, /* size (0 = byte, 1 = short, 2 = long) */
687 16, /* bitsize */
688 FALSE, /* pc_relative */
689 0, /* bitpos */
690 complain_overflow_dont, /* complain_on_overflow */
691 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 692 AARCH64_R_STR (MOVW_UABS_G2_NC), /* name */
a06ea964
NC
693 FALSE, /* partial_inplace */
694 0xffff, /* src_mask */
695 0xffff, /* dst_mask */
696 FALSE), /* pcrel_offset */
697
698 /* MOVZ: ((S+A) >> 48) & 0xffff */
a6bb11b2 699 HOWTO64 (AARCH64_R (MOVW_UABS_G3), /* type */
a06ea964
NC
700 48, /* rightshift */
701 2, /* size (0 = byte, 1 = short, 2 = long) */
702 16, /* bitsize */
703 FALSE, /* pc_relative */
704 0, /* bitpos */
705 complain_overflow_unsigned, /* complain_on_overflow */
706 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 707 AARCH64_R_STR (MOVW_UABS_G3), /* name */
a06ea964
NC
708 FALSE, /* partial_inplace */
709 0xffff, /* src_mask */
710 0xffff, /* dst_mask */
711 FALSE), /* pcrel_offset */
712
713 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
714 signed data or abs address inline. Will change instruction
715 to MOVN or MOVZ depending on sign of calculated value. */
716
717 /* MOV[ZN]: ((S+A) >> 0) & 0xffff */
a6bb11b2 718 HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
a06ea964
NC
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 721 17, /* bitsize */
a06ea964
NC
722 FALSE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_signed, /* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 726 AARCH64_R_STR (MOVW_SABS_G0), /* name */
a06ea964
NC
727 FALSE, /* partial_inplace */
728 0xffff, /* src_mask */
729 0xffff, /* dst_mask */
730 FALSE), /* pcrel_offset */
731
732 /* MOV[ZN]: ((S+A) >> 16) & 0xffff */
a6bb11b2 733 HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
a06ea964
NC
734 16, /* rightshift */
735 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 736 17, /* bitsize */
a06ea964
NC
737 FALSE, /* pc_relative */
738 0, /* bitpos */
739 complain_overflow_signed, /* complain_on_overflow */
740 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 741 AARCH64_R_STR (MOVW_SABS_G1), /* name */
a06ea964
NC
742 FALSE, /* partial_inplace */
743 0xffff, /* src_mask */
744 0xffff, /* dst_mask */
745 FALSE), /* pcrel_offset */
746
747 /* MOV[ZN]: ((S+A) >> 32) & 0xffff */
a6bb11b2 748 HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
a06ea964
NC
749 32, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 751 17, /* bitsize */
a06ea964
NC
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_signed, /* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 756 AARCH64_R_STR (MOVW_SABS_G2), /* name */
a06ea964
NC
757 FALSE, /* partial_inplace */
758 0xffff, /* src_mask */
759 0xffff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
32247401
RL
762 /* Group relocations to create a 16, 32, 48 or 64 bit
763 PC relative address inline. */
764
765 /* MOV[NZ]: ((S+A-P) >> 0) & 0xffff */
e30d1fa1 766 HOWTO (AARCH64_R (MOVW_PREL_G0), /* type */
32247401
RL
767 0, /* rightshift */
768 2, /* size (0 = byte, 1 = short, 2 = long) */
769 17, /* bitsize */
770 TRUE, /* pc_relative */
771 0, /* bitpos */
772 complain_overflow_signed, /* complain_on_overflow */
773 bfd_elf_generic_reloc, /* special_function */
774 AARCH64_R_STR (MOVW_PREL_G0), /* name */
775 FALSE, /* partial_inplace */
776 0xffff, /* src_mask */
777 0xffff, /* dst_mask */
778 TRUE), /* pcrel_offset */
779
780 /* MOVK: ((S+A-P) >> 0) & 0xffff [no overflow check] */
e30d1fa1 781 HOWTO (AARCH64_R (MOVW_PREL_G0_NC), /* type */
32247401
RL
782 0, /* rightshift */
783 2, /* size (0 = byte, 1 = short, 2 = long) */
784 16, /* bitsize */
785 TRUE, /* pc_relative */
786 0, /* bitpos */
787 complain_overflow_dont, /* complain_on_overflow */
788 bfd_elf_generic_reloc, /* special_function */
789 AARCH64_R_STR (MOVW_PREL_G0_NC), /* name */
790 FALSE, /* partial_inplace */
791 0xffff, /* src_mask */
792 0xffff, /* dst_mask */
793 TRUE), /* pcrel_offset */
794
795 /* MOV[NZ]: ((S+A-P) >> 16) & 0xffff */
e30d1fa1 796 HOWTO (AARCH64_R (MOVW_PREL_G1), /* type */
32247401
RL
797 16, /* rightshift */
798 2, /* size (0 = byte, 1 = short, 2 = long) */
799 17, /* bitsize */
800 TRUE, /* pc_relative */
801 0, /* bitpos */
802 complain_overflow_signed, /* complain_on_overflow */
803 bfd_elf_generic_reloc, /* special_function */
804 AARCH64_R_STR (MOVW_PREL_G1), /* name */
805 FALSE, /* partial_inplace */
806 0xffff, /* src_mask */
807 0xffff, /* dst_mask */
808 TRUE), /* pcrel_offset */
809
810 /* MOVK: ((S+A-P) >> 16) & 0xffff [no overflow check] */
811 HOWTO64 (AARCH64_R (MOVW_PREL_G1_NC), /* type */
812 16, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 16, /* bitsize */
815 TRUE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_dont, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 AARCH64_R_STR (MOVW_PREL_G1_NC), /* name */
820 FALSE, /* partial_inplace */
821 0xffff, /* src_mask */
822 0xffff, /* dst_mask */
823 TRUE), /* pcrel_offset */
824
825 /* MOV[NZ]: ((S+A-P) >> 32) & 0xffff */
826 HOWTO64 (AARCH64_R (MOVW_PREL_G2), /* type */
827 32, /* rightshift */
828 2, /* size (0 = byte, 1 = short, 2 = long) */
829 17, /* bitsize */
830 TRUE, /* pc_relative */
831 0, /* bitpos */
832 complain_overflow_signed, /* complain_on_overflow */
833 bfd_elf_generic_reloc, /* special_function */
834 AARCH64_R_STR (MOVW_PREL_G2), /* name */
835 FALSE, /* partial_inplace */
836 0xffff, /* src_mask */
837 0xffff, /* dst_mask */
838 TRUE), /* pcrel_offset */
839
840 /* MOVK: ((S+A-P) >> 32) & 0xffff [no overflow check] */
841 HOWTO64 (AARCH64_R (MOVW_PREL_G2_NC), /* type */
842 32, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 16, /* bitsize */
845 TRUE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_dont, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 AARCH64_R_STR (MOVW_PREL_G2_NC), /* name */
850 FALSE, /* partial_inplace */
851 0xffff, /* src_mask */
852 0xffff, /* dst_mask */
853 TRUE), /* pcrel_offset */
854
855 /* MOV[NZ]: ((S+A-P) >> 48) & 0xffff */
856 HOWTO64 (AARCH64_R (MOVW_PREL_G3), /* type */
857 48, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 16, /* bitsize */
860 TRUE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont, /* complain_on_overflow */
863 bfd_elf_generic_reloc, /* special_function */
864 AARCH64_R_STR (MOVW_PREL_G3), /* name */
865 FALSE, /* partial_inplace */
866 0xffff, /* src_mask */
867 0xffff, /* dst_mask */
868 TRUE), /* pcrel_offset */
869
a06ea964
NC
870/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
871 addresses: PG(x) is (x & ~0xfff). */
872
f7d2c675
SP
873 /* LD-lit: ((S+A-P) >> 4) & 0x1ffff */
874 HOWTO64 (MORELLO_R (LD_PREL_LO17), /* type */
875 4, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 17, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_signed, /* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 MORELLO_R_STR (LD_PREL_LO17), /* name */
883 FALSE, /* partial_inplace */
884 0x1ffff, /* src_mask */
885 0x1ffff, /* dst_mask */
886 TRUE), /* pcrel_offset */
887
a06ea964 888 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 889 HOWTO (AARCH64_R (LD_PREL_LO19), /* type */
a06ea964
NC
890 2, /* rightshift */
891 2, /* size (0 = byte, 1 = short, 2 = long) */
892 19, /* bitsize */
893 TRUE, /* pc_relative */
894 0, /* bitpos */
895 complain_overflow_signed, /* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 897 AARCH64_R_STR (LD_PREL_LO19), /* name */
a06ea964
NC
898 FALSE, /* partial_inplace */
899 0x7ffff, /* src_mask */
900 0x7ffff, /* dst_mask */
901 TRUE), /* pcrel_offset */
902
92504105
SP
903 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
904 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20), /* type */
905 12, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 20, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_signed, /* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 MORELLO_R_STR (ADR_PREL_PG_HI20), /* name */
913 FALSE, /* partial_inplace */
914 0xfffff, /* src_mask */
915 0xfffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff [no overflow check] */
919 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20_NC), /* type */
920 12, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 20, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont, /* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 MORELLO_R_STR (ADR_PREL_PG_HI20_NC), /* name */
928 FALSE, /* partial_inplace */
929 0xfffff, /* src_mask */
930 0xfffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
a06ea964 933 /* ADR: (S+A-P) & 0x1fffff */
a6bb11b2 934 HOWTO (AARCH64_R (ADR_PREL_LO21), /* type */
a06ea964
NC
935 0, /* rightshift */
936 2, /* size (0 = byte, 1 = short, 2 = long) */
937 21, /* bitsize */
938 TRUE, /* pc_relative */
939 0, /* bitpos */
940 complain_overflow_signed, /* complain_on_overflow */
941 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 942 AARCH64_R_STR (ADR_PREL_LO21), /* name */
a06ea964
NC
943 FALSE, /* partial_inplace */
944 0x1fffff, /* src_mask */
945 0x1fffff, /* dst_mask */
946 TRUE), /* pcrel_offset */
947
948 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
a6bb11b2 949 HOWTO (AARCH64_R (ADR_PREL_PG_HI21), /* type */
a06ea964
NC
950 12, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 21, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_signed, /* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 957 AARCH64_R_STR (ADR_PREL_PG_HI21), /* name */
a06ea964
NC
958 FALSE, /* partial_inplace */
959 0x1fffff, /* src_mask */
960 0x1fffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff [no overflow check] */
a6bb11b2 964 HOWTO64 (AARCH64_R (ADR_PREL_PG_HI21_NC), /* type */
a06ea964
NC
965 12, /* rightshift */
966 2, /* size (0 = byte, 1 = short, 2 = long) */
967 21, /* bitsize */
968 TRUE, /* pc_relative */
969 0, /* bitpos */
970 complain_overflow_dont, /* complain_on_overflow */
971 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 972 AARCH64_R_STR (ADR_PREL_PG_HI21_NC), /* name */
a06ea964
NC
973 FALSE, /* partial_inplace */
974 0x1fffff, /* src_mask */
975 0x1fffff, /* dst_mask */
976 TRUE), /* pcrel_offset */
977
978 /* ADD: (S+A) & 0xfff [no overflow check] */
a6bb11b2 979 HOWTO (AARCH64_R (ADD_ABS_LO12_NC), /* type */
a06ea964
NC
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 12, /* bitsize */
983 FALSE, /* pc_relative */
984 10, /* bitpos */
985 complain_overflow_dont, /* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 987 AARCH64_R_STR (ADD_ABS_LO12_NC), /* name */
a06ea964
NC
988 FALSE, /* partial_inplace */
989 0x3ffc00, /* src_mask */
990 0x3ffc00, /* dst_mask */
991 FALSE), /* pcrel_offset */
992
993 /* LD/ST8: (S+A) & 0xfff */
a6bb11b2 994 HOWTO (AARCH64_R (LDST8_ABS_LO12_NC), /* type */
a06ea964
NC
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 12, /* bitsize */
998 FALSE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont, /* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1002 AARCH64_R_STR (LDST8_ABS_LO12_NC), /* name */
a06ea964
NC
1003 FALSE, /* partial_inplace */
1004 0xfff, /* src_mask */
1005 0xfff, /* dst_mask */
1006 FALSE), /* pcrel_offset */
1007
1008 /* Relocations for control-flow instructions. */
1009
1010 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
a6bb11b2 1011 HOWTO (AARCH64_R (TSTBR14), /* type */
a06ea964
NC
1012 2, /* rightshift */
1013 2, /* size (0 = byte, 1 = short, 2 = long) */
1014 14, /* bitsize */
1015 TRUE, /* pc_relative */
1016 0, /* bitpos */
1017 complain_overflow_signed, /* complain_on_overflow */
1018 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1019 AARCH64_R_STR (TSTBR14), /* name */
a06ea964
NC
1020 FALSE, /* partial_inplace */
1021 0x3fff, /* src_mask */
1022 0x3fff, /* dst_mask */
1023 TRUE), /* pcrel_offset */
1024
1025 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 1026 HOWTO (AARCH64_R (CONDBR19), /* type */
a06ea964
NC
1027 2, /* rightshift */
1028 2, /* size (0 = byte, 1 = short, 2 = long) */
1029 19, /* bitsize */
1030 TRUE, /* pc_relative */
1031 0, /* bitpos */
1032 complain_overflow_signed, /* complain_on_overflow */
1033 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1034 AARCH64_R_STR (CONDBR19), /* name */
a06ea964
NC
1035 FALSE, /* partial_inplace */
1036 0x7ffff, /* src_mask */
1037 0x7ffff, /* dst_mask */
1038 TRUE), /* pcrel_offset */
1039
a06ea964 1040 /* B: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1041 HOWTO (AARCH64_R (JUMP26), /* type */
a06ea964
NC
1042 2, /* rightshift */
1043 2, /* size (0 = byte, 1 = short, 2 = long) */
1044 26, /* bitsize */
1045 TRUE, /* pc_relative */
1046 0, /* bitpos */
1047 complain_overflow_signed, /* complain_on_overflow */
1048 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1049 AARCH64_R_STR (JUMP26), /* name */
a06ea964
NC
1050 FALSE, /* partial_inplace */
1051 0x3ffffff, /* src_mask */
1052 0x3ffffff, /* dst_mask */
1053 TRUE), /* pcrel_offset */
1054
1055 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1056 HOWTO (AARCH64_R (CALL26), /* type */
a06ea964
NC
1057 2, /* rightshift */
1058 2, /* size (0 = byte, 1 = short, 2 = long) */
1059 26, /* bitsize */
1060 TRUE, /* pc_relative */
1061 0, /* bitpos */
1062 complain_overflow_signed, /* complain_on_overflow */
1063 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1064 AARCH64_R_STR (CALL26), /* name */
a06ea964
NC
1065 FALSE, /* partial_inplace */
1066 0x3ffffff, /* src_mask */
1067 0x3ffffff, /* dst_mask */
1068 TRUE), /* pcrel_offset */
1069
e19e9199
SP
1070 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
1071 HOWTO64 (MORELLO_R (TSTBR14), /* type */
1072 2, /* rightshift */
1073 2, /* size (0 = byte, 1 = short, 2 = long) */
1074 14, /* bitsize */
1075 TRUE, /* pc_relative */
1076 0, /* bitpos */
1077 complain_overflow_signed, /* complain_on_overflow */
1078 bfd_elf_generic_reloc, /* special_function */
1079 MORELLO_R_STR (TSTBR14), /* name */
1080 FALSE, /* partial_inplace */
1081 0x3fff, /* src_mask */
1082 0x3fff, /* dst_mask */
1083 TRUE), /* pcrel_offset */
1084
1085 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
1086 HOWTO64 (MORELLO_R (CONDBR19), /* type */
1087 2, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 19, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_signed, /* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 MORELLO_R_STR (CONDBR19), /* name */
1095 FALSE, /* partial_inplace */
1096 0x7ffff, /* src_mask */
1097 0x7ffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 /* B: ((S+A-P) >> 2) & 0x3ffffff */
1101 HOWTO64 (MORELLO_R (JUMP26), /* type */
1102 2, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 26, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_signed, /* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 MORELLO_R_STR (JUMP26), /* name */
1110 FALSE, /* partial_inplace */
1111 0x3ffffff, /* src_mask */
1112 0x3ffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
1116 HOWTO64 (MORELLO_R (CALL26), /* type */
1117 2, /* rightshift */
1118 2, /* size (0 = byte, 1 = short, 2 = long) */
1119 26, /* bitsize */
1120 TRUE, /* pc_relative */
1121 0, /* bitpos */
1122 complain_overflow_signed, /* complain_on_overflow */
1123 bfd_elf_generic_reloc, /* special_function */
1124 MORELLO_R_STR (CALL26), /* name */
1125 FALSE, /* partial_inplace */
1126 0x3ffffff, /* src_mask */
1127 0x3ffffff, /* dst_mask */
1128 TRUE), /* pcrel_offset */
1129
a06ea964 1130 /* LD/ST16: (S+A) & 0xffe */
a6bb11b2 1131 HOWTO (AARCH64_R (LDST16_ABS_LO12_NC), /* type */
a06ea964
NC
1132 1, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 12, /* bitsize */
1135 FALSE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont, /* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1139 AARCH64_R_STR (LDST16_ABS_LO12_NC), /* name */
a06ea964
NC
1140 FALSE, /* partial_inplace */
1141 0xffe, /* src_mask */
1142 0xffe, /* dst_mask */
1143 FALSE), /* pcrel_offset */
1144
1145 /* LD/ST32: (S+A) & 0xffc */
a6bb11b2 1146 HOWTO (AARCH64_R (LDST32_ABS_LO12_NC), /* type */
a06ea964
NC
1147 2, /* rightshift */
1148 2, /* size (0 = byte, 1 = short, 2 = long) */
1149 12, /* bitsize */
1150 FALSE, /* pc_relative */
1151 0, /* bitpos */
1152 complain_overflow_dont, /* complain_on_overflow */
1153 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1154 AARCH64_R_STR (LDST32_ABS_LO12_NC), /* name */
a06ea964
NC
1155 FALSE, /* partial_inplace */
1156 0xffc, /* src_mask */
1157 0xffc, /* dst_mask */
1158 FALSE), /* pcrel_offset */
1159
1160 /* LD/ST64: (S+A) & 0xff8 */
a6bb11b2 1161 HOWTO (AARCH64_R (LDST64_ABS_LO12_NC), /* type */
a06ea964
NC
1162 3, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 12, /* bitsize */
1165 FALSE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont, /* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1169 AARCH64_R_STR (LDST64_ABS_LO12_NC), /* name */
a06ea964
NC
1170 FALSE, /* partial_inplace */
1171 0xff8, /* src_mask */
1172 0xff8, /* dst_mask */
1173 FALSE), /* pcrel_offset */
1174
a06ea964 1175 /* LD/ST128: (S+A) & 0xff0 */
a6bb11b2 1176 HOWTO (AARCH64_R (LDST128_ABS_LO12_NC), /* type */
a06ea964
NC
1177 4, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 12, /* bitsize */
1180 FALSE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont, /* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1184 AARCH64_R_STR (LDST128_ABS_LO12_NC), /* name */
a06ea964
NC
1185 FALSE, /* partial_inplace */
1186 0xff0, /* src_mask */
1187 0xff0, /* dst_mask */
1188 FALSE), /* pcrel_offset */
1189
f41aef5f
RE
1190 /* Set a load-literal immediate field to bits
1191 0x1FFFFC of G(S)-P */
a6bb11b2 1192 HOWTO (AARCH64_R (GOT_LD_PREL19), /* type */
f41aef5f
RE
1193 2, /* rightshift */
1194 2, /* size (0 = byte,1 = short,2 = long) */
1195 19, /* bitsize */
1196 TRUE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_signed, /* complain_on_overflow */
1199 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1200 AARCH64_R_STR (GOT_LD_PREL19), /* name */
f41aef5f
RE
1201 FALSE, /* partial_inplace */
1202 0xffffe0, /* src_mask */
1203 0xffffe0, /* dst_mask */
1204 TRUE), /* pcrel_offset */
1205
a06ea964
NC
1206 /* Get to the page for the GOT entry for the symbol
1207 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1208 HOWTO (AARCH64_R (ADR_GOT_PAGE), /* type */
a06ea964
NC
1209 12, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 21, /* bitsize */
1212 TRUE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont, /* complain_on_overflow */
1215 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1216 AARCH64_R_STR (ADR_GOT_PAGE), /* name */
a06ea964
NC
1217 FALSE, /* partial_inplace */
1218 0x1fffff, /* src_mask */
1219 0x1fffff, /* dst_mask */
1220 TRUE), /* pcrel_offset */
1221
92504105
SP
1222 /* Get to the page for the GOT entry for the symbol
1223 (G(S) - P) using a C64 ADRP instruction. */
1224 HOWTO64 (MORELLO_R (ADR_GOT_PAGE), /* type */
1225 12, /* rightshift */
1226 2, /* size (0 = byte, 1 = short, 2 = long) */
1227 20, /* bitsize */
1228 TRUE, /* pc_relative */
1229 0, /* bitpos */
1230 complain_overflow_dont, /* complain_on_overflow */
1231 bfd_elf_generic_reloc, /* special_function */
1232 MORELLO_R_STR (ADR_GOT_PAGE), /* name */
1233 FALSE, /* partial_inplace */
1234 0xfffff, /* src_mask */
1235 0xfffff, /* dst_mask */
1236 TRUE), /* pcrel_offset */
1237
a6bb11b2
YZ
1238 /* LD64: GOT offset G(S) & 0xff8 */
1239 HOWTO64 (AARCH64_R (LD64_GOT_LO12_NC), /* type */
a06ea964
NC
1240 3, /* rightshift */
1241 2, /* size (0 = byte, 1 = short, 2 = long) */
1242 12, /* bitsize */
1243 FALSE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont, /* complain_on_overflow */
1246 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1247 AARCH64_R_STR (LD64_GOT_LO12_NC), /* name */
a06ea964
NC
1248 FALSE, /* partial_inplace */
1249 0xff8, /* src_mask */
1250 0xff8, /* dst_mask */
a6bb11b2 1251 FALSE), /* pcrel_offset */
a06ea964 1252
a1bdea65
SP
1253 /* LD128: GOT offset G(S) & 0xff0 */
1254 HOWTO64 (MORELLO_R (LD128_GOT_LO12_NC), /* type */
1255 4, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 12, /* bitsize */
1258 FALSE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont, /* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 MORELLO_R_STR (LD128_GOT_LO12_NC), /* name */
1263 FALSE, /* partial_inplace */
1264 0xff0, /* src_mask */
1265 0xff0, /* dst_mask */
1266 FALSE), /* pcrel_offset */
1267
a6bb11b2
YZ
1268 /* LD32: GOT offset G(S) & 0xffc */
1269 HOWTO32 (AARCH64_R (LD32_GOT_LO12_NC), /* type */
1270 2, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 12, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont, /* complain_on_overflow */
1276 bfd_elf_generic_reloc, /* special_function */
1277 AARCH64_R_STR (LD32_GOT_LO12_NC), /* name */
1278 FALSE, /* partial_inplace */
1279 0xffc, /* src_mask */
1280 0xffc, /* dst_mask */
1281 FALSE), /* pcrel_offset */
a06ea964 1282
ca632371
RL
1283 /* Lower 16 bits of GOT offset for the symbol. */
1284 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G0_NC), /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_dont, /* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 AARCH64_R_STR (MOVW_GOTOFF_G0_NC), /* name */
1293 FALSE, /* partial_inplace */
1294 0xffff, /* src_mask */
1295 0xffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
654248e7
RL
1298 /* Higher 16 bits of GOT offset for the symbol. */
1299 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G1), /* type */
1300 16, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_unsigned, /* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 AARCH64_R_STR (MOVW_GOTOFF_G1), /* name */
1308 FALSE, /* partial_inplace */
1309 0xffff, /* src_mask */
1310 0xffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
87f5fbcc
RL
1313 /* LD64: GOT offset for the symbol. */
1314 HOWTO64 (AARCH64_R (LD64_GOTOFF_LO15), /* type */
1315 3, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 12, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_unsigned, /* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 AARCH64_R_STR (LD64_GOTOFF_LO15), /* name */
1323 FALSE, /* partial_inplace */
1324 0x7ff8, /* src_mask */
1325 0x7ff8, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
3d715ce4
JW
1328 /* LD32: GOT offset to the page address of GOT table.
1329 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x5ffc. */
1330 HOWTO32 (AARCH64_R (LD32_GOTPAGE_LO14), /* type */
1331 2, /* rightshift */
1332 2, /* size (0 = byte, 1 = short, 2 = long) */
1333 12, /* bitsize */
1334 FALSE, /* pc_relative */
1335 0, /* bitpos */
1336 complain_overflow_unsigned, /* complain_on_overflow */
1337 bfd_elf_generic_reloc, /* special_function */
1338 AARCH64_R_STR (LD32_GOTPAGE_LO14), /* name */
1339 FALSE, /* partial_inplace */
1340 0x5ffc, /* src_mask */
1341 0x5ffc, /* dst_mask */
1342 FALSE), /* pcrel_offset */
1343
a921b5bd
JW
1344 /* LD64: GOT offset to the page address of GOT table.
1345 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x7ff8. */
1346 HOWTO64 (AARCH64_R (LD64_GOTPAGE_LO15), /* type */
1347 3, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 12, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_unsigned, /* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 AARCH64_R_STR (LD64_GOTPAGE_LO15), /* name */
1355 FALSE, /* partial_inplace */
1356 0x7ff8, /* src_mask */
1357 0x7ff8, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
a06ea964
NC
1360 /* Get to the page for the GOT entry for the symbol
1361 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1362 HOWTO (AARCH64_R (TLSGD_ADR_PAGE21), /* type */
a06ea964
NC
1363 12, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 21, /* bitsize */
1366 TRUE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont, /* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1370 AARCH64_R_STR (TLSGD_ADR_PAGE21), /* name */
a06ea964
NC
1371 FALSE, /* partial_inplace */
1372 0x1fffff, /* src_mask */
1373 0x1fffff, /* dst_mask */
1374 TRUE), /* pcrel_offset */
1375
3c12b054
MS
1376 HOWTO (AARCH64_R (TLSGD_ADR_PREL21), /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 21, /* bitsize */
1380 TRUE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont, /* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 AARCH64_R_STR (TLSGD_ADR_PREL21), /* name */
1385 FALSE, /* partial_inplace */
1386 0x1fffff, /* src_mask */
1387 0x1fffff, /* dst_mask */
1388 TRUE), /* pcrel_offset */
1389
a06ea964 1390 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
a6bb11b2 1391 HOWTO (AARCH64_R (TLSGD_ADD_LO12_NC), /* type */
a06ea964
NC
1392 0, /* rightshift */
1393 2, /* size (0 = byte, 1 = short, 2 = long) */
1394 12, /* bitsize */
1395 FALSE, /* pc_relative */
1396 0, /* bitpos */
1397 complain_overflow_dont, /* complain_on_overflow */
1398 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1399 AARCH64_R_STR (TLSGD_ADD_LO12_NC), /* name */
a06ea964
NC
1400 FALSE, /* partial_inplace */
1401 0xfff, /* src_mask */
1402 0xfff, /* dst_mask */
1403 FALSE), /* pcrel_offset */
1404
3e8286c0
RL
1405 /* Lower 16 bits of GOT offset to tls_index. */
1406 HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
1407 0, /* rightshift */
1408 2, /* size (0 = byte, 1 = short, 2 = long) */
1409 16, /* bitsize */
1410 FALSE, /* pc_relative */
1411 0, /* bitpos */
1412 complain_overflow_dont, /* complain_on_overflow */
1413 bfd_elf_generic_reloc, /* special_function */
1414 AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
1415 FALSE, /* partial_inplace */
1416 0xffff, /* src_mask */
1417 0xffff, /* dst_mask */
1418 FALSE), /* pcrel_offset */
1419
1aa66fb1
RL
1420 /* Higher 16 bits of GOT offset to tls_index. */
1421 HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
1422 16, /* rightshift */
1423 2, /* size (0 = byte, 1 = short, 2 = long) */
1424 16, /* bitsize */
1425 FALSE, /* pc_relative */
1426 0, /* bitpos */
1427 complain_overflow_unsigned, /* complain_on_overflow */
1428 bfd_elf_generic_reloc, /* special_function */
1429 AARCH64_R_STR (TLSGD_MOVW_G1), /* name */
1430 FALSE, /* partial_inplace */
1431 0xffff, /* src_mask */
1432 0xffff, /* dst_mask */
1433 FALSE), /* pcrel_offset */
1434
a6bb11b2 1435 HOWTO (AARCH64_R (TLSIE_ADR_GOTTPREL_PAGE21), /* type */
a06ea964
NC
1436 12, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
1438 21, /* bitsize */
1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
1441 complain_overflow_dont, /* complain_on_overflow */
1442 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1443 AARCH64_R_STR (TLSIE_ADR_GOTTPREL_PAGE21), /* name */
a06ea964
NC
1444 FALSE, /* partial_inplace */
1445 0x1fffff, /* src_mask */
1446 0x1fffff, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
a6bb11b2 1449 HOWTO64 (AARCH64_R (TLSIE_LD64_GOTTPREL_LO12_NC), /* type */
a06ea964
NC
1450 3, /* rightshift */
1451 2, /* size (0 = byte, 1 = short, 2 = long) */
1452 12, /* bitsize */
1453 FALSE, /* pc_relative */
1454 0, /* bitpos */
1455 complain_overflow_dont, /* complain_on_overflow */
1456 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1457 AARCH64_R_STR (TLSIE_LD64_GOTTPREL_LO12_NC), /* name */
a06ea964
NC
1458 FALSE, /* partial_inplace */
1459 0xff8, /* src_mask */
1460 0xff8, /* dst_mask */
1461 FALSE), /* pcrel_offset */
1462
a6bb11b2
YZ
1463 HOWTO32 (AARCH64_R (TLSIE_LD32_GOTTPREL_LO12_NC), /* type */
1464 2, /* rightshift */
1465 2, /* size (0 = byte, 1 = short, 2 = long) */
1466 12, /* bitsize */
1467 FALSE, /* pc_relative */
1468 0, /* bitpos */
1469 complain_overflow_dont, /* complain_on_overflow */
1470 bfd_elf_generic_reloc, /* special_function */
1471 AARCH64_R_STR (TLSIE_LD32_GOTTPREL_LO12_NC), /* name */
1472 FALSE, /* partial_inplace */
1473 0xffc, /* src_mask */
1474 0xffc, /* dst_mask */
1475 FALSE), /* pcrel_offset */
1476
1477 HOWTO (AARCH64_R (TLSIE_LD_GOTTPREL_PREL19), /* type */
bb3f9ed8 1478 2, /* rightshift */
a06ea964 1479 2, /* size (0 = byte, 1 = short, 2 = long) */
043bf05a 1480 19, /* bitsize */
a06ea964
NC
1481 FALSE, /* pc_relative */
1482 0, /* bitpos */
1483 complain_overflow_dont, /* complain_on_overflow */
1484 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1485 AARCH64_R_STR (TLSIE_LD_GOTTPREL_PREL19), /* name */
a06ea964
NC
1486 FALSE, /* partial_inplace */
1487 0x1ffffc, /* src_mask */
1488 0x1ffffc, /* dst_mask */
1489 FALSE), /* pcrel_offset */
1490
3b957e5b
RL
1491 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G0_NC), /* type */
1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 16, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_dont, /* complain_on_overflow */
1498 bfd_elf_generic_reloc, /* special_function */
1499 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G0_NC), /* name */
1500 FALSE, /* partial_inplace */
1501 0xffff, /* src_mask */
1502 0xffff, /* dst_mask */
1503 FALSE), /* pcrel_offset */
1504
1505 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G1), /* type */
1506 16, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 16, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_unsigned, /* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G1), /* name */
1514 FALSE, /* partial_inplace */
1515 0xffff, /* src_mask */
1516 0xffff, /* dst_mask */
1517 FALSE), /* pcrel_offset */
1518
49df5539
JW
1519 /* ADD: bit[23:12] of byte offset to module TLS base address. */
1520 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12), /* type */
1521 12, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 12, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_unsigned, /* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12), /* name */
1529 FALSE, /* partial_inplace */
1530 0xfff, /* src_mask */
1531 0xfff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533
70151fb5
JW
1534 /* Unsigned 12 bit byte offset to module TLS base address. */
1535 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 12, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_unsigned, /* complain_on_overflow */
1542 bfd_elf_generic_reloc, /* special_function */
1543 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */
1544 FALSE, /* partial_inplace */
1545 0xfff, /* src_mask */
1546 0xfff, /* dst_mask */
1547 FALSE), /* pcrel_offset */
13289c10
JW
1548
1549 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
1550 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC), /* type */
1551 0, /* rightshift */
1552 2, /* size (0 = byte, 1 = short, 2 = long) */
1553 12, /* bitsize */
1554 FALSE, /* pc_relative */
1555 0, /* bitpos */
1556 complain_overflow_dont, /* complain_on_overflow */
1557 bfd_elf_generic_reloc, /* special_function */
1558 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC), /* name */
1559 FALSE, /* partial_inplace */
1560 0xfff, /* src_mask */
1561 0xfff, /* dst_mask */
1562 FALSE), /* pcrel_offset */
70151fb5 1563
a12fad50
JW
1564 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
1565 HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
1566 0, /* rightshift */
1567 2, /* size (0 = byte, 1 = short, 2 = long) */
1568 12, /* bitsize */
1569 FALSE, /* pc_relative */
1570 0, /* bitpos */
1571 complain_overflow_dont, /* complain_on_overflow */
1572 bfd_elf_generic_reloc, /* special_function */
1573 AARCH64_R_STR (TLSLD_ADD_LO12_NC), /* name */
1574 FALSE, /* partial_inplace */
1575 0xfff, /* src_mask */
1576 0xfff, /* dst_mask */
1577 FALSE), /* pcrel_offset */
1578
1107e076
JW
1579 /* Get to the page for the GOT entry for the symbol
1580 (G(S) - P) using an ADRP instruction. */
1581 HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */
1582 12, /* rightshift */
1583 2, /* size (0 = byte, 1 = short, 2 = long) */
1584 21, /* bitsize */
1585 TRUE, /* pc_relative */
1586 0, /* bitpos */
1587 complain_overflow_signed, /* complain_on_overflow */
1588 bfd_elf_generic_reloc, /* special_function */
1589 AARCH64_R_STR (TLSLD_ADR_PAGE21), /* name */
1590 FALSE, /* partial_inplace */
1591 0x1fffff, /* src_mask */
1592 0x1fffff, /* dst_mask */
1593 TRUE), /* pcrel_offset */
1594
6c37fedc
JW
1595 HOWTO (AARCH64_R (TLSLD_ADR_PREL21), /* type */
1596 0, /* rightshift */
1597 2, /* size (0 = byte, 1 = short, 2 = long) */
1598 21, /* bitsize */
1599 TRUE, /* pc_relative */
1600 0, /* bitpos */
1601 complain_overflow_signed, /* complain_on_overflow */
1602 bfd_elf_generic_reloc, /* special_function */
1603 AARCH64_R_STR (TLSLD_ADR_PREL21), /* name */
1604 FALSE, /* partial_inplace */
1605 0x1fffff, /* src_mask */
1606 0x1fffff, /* dst_mask */
1607 TRUE), /* pcrel_offset */
1608
4c562523
JW
1609 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1610 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12), /* type */
1611 1, /* rightshift */
1612 2, /* size (0 = byte, 1 = short, 2 = long) */
1613 11, /* bitsize */
1614 FALSE, /* pc_relative */
1615 10, /* bitpos */
1616 complain_overflow_unsigned, /* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12), /* name */
1619 FALSE, /* partial_inplace */
1620 0x1ffc00, /* src_mask */
1621 0x1ffc00, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623
1624 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check. */
1625 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC), /* type */
1626 1, /* rightshift */
1627 2, /* size (0 = byte, 1 = short, 2 = long) */
1628 11, /* bitsize */
1629 FALSE, /* pc_relative */
1630 10, /* bitpos */
1631 complain_overflow_dont, /* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC), /* name */
1634 FALSE, /* partial_inplace */
1635 0x1ffc00, /* src_mask */
1636 0x1ffc00, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1640 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12), /* type */
1641 2, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 10, /* bitsize */
1644 FALSE, /* pc_relative */
1645 10, /* bitpos */
1646 complain_overflow_unsigned, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12), /* name */
1649 FALSE, /* partial_inplace */
1650 0x3ffc00, /* src_mask */
1651 0x3ffc00, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check. */
1655 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC), /* type */
1656 2, /* rightshift */
1657 2, /* size (0 = byte, 1 = short, 2 = long) */
1658 10, /* bitsize */
1659 FALSE, /* pc_relative */
1660 10, /* bitpos */
1661 complain_overflow_dont, /* complain_on_overflow */
1662 bfd_elf_generic_reloc, /* special_function */
1663 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC), /* name */
1664 FALSE, /* partial_inplace */
1665 0xffc00, /* src_mask */
1666 0xffc00, /* dst_mask */
1667 FALSE), /* pcrel_offset */
1668
1669 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1670 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12), /* type */
1671 3, /* rightshift */
1672 2, /* size (0 = byte, 1 = short, 2 = long) */
1673 9, /* bitsize */
1674 FALSE, /* pc_relative */
1675 10, /* bitpos */
1676 complain_overflow_unsigned, /* complain_on_overflow */
1677 bfd_elf_generic_reloc, /* special_function */
1678 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12), /* name */
1679 FALSE, /* partial_inplace */
1680 0x3ffc00, /* src_mask */
1681 0x3ffc00, /* dst_mask */
1682 FALSE), /* pcrel_offset */
1683
1684 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check. */
1685 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC), /* type */
1686 3, /* rightshift */
1687 2, /* size (0 = byte, 1 = short, 2 = long) */
1688 9, /* bitsize */
1689 FALSE, /* pc_relative */
1690 10, /* bitpos */
1691 complain_overflow_dont, /* complain_on_overflow */
1692 bfd_elf_generic_reloc, /* special_function */
1693 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC), /* name */
1694 FALSE, /* partial_inplace */
1695 0x7fc00, /* src_mask */
1696 0x7fc00, /* dst_mask */
1697 FALSE), /* pcrel_offset */
1698
1699 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
1700 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12), /* type */
1701 0, /* rightshift */
1702 2, /* size (0 = byte, 1 = short, 2 = long) */
1703 12, /* bitsize */
1704 FALSE, /* pc_relative */
1705 10, /* bitpos */
1706 complain_overflow_unsigned, /* complain_on_overflow */
1707 bfd_elf_generic_reloc, /* special_function */
1708 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12), /* name */
1709 FALSE, /* partial_inplace */
1710 0x3ffc00, /* src_mask */
1711 0x3ffc00, /* dst_mask */
1712 FALSE), /* pcrel_offset */
1713
1714 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check. */
1715 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC), /* type */
1716 0, /* rightshift */
1717 2, /* size (0 = byte, 1 = short, 2 = long) */
1718 12, /* bitsize */
1719 FALSE, /* pc_relative */
1720 10, /* bitpos */
1721 complain_overflow_dont, /* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC), /* name */
1724 FALSE, /* partial_inplace */
1725 0x3ffc00, /* src_mask */
1726 0x3ffc00, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
49df5539
JW
1729 /* MOVZ: bit[15:0] of byte offset to module TLS base address. */
1730 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0), /* type */
1731 0, /* rightshift */
1732 2, /* size (0 = byte, 1 = short, 2 = long) */
1733 16, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_unsigned, /* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0), /* name */
1739 FALSE, /* partial_inplace */
1740 0xffff, /* src_mask */
1741 0xffff, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0. */
1745 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC), /* type */
1746 0, /* rightshift */
1747 2, /* size (0 = byte, 1 = short, 2 = long) */
1748 16, /* bitsize */
1749 FALSE, /* pc_relative */
1750 0, /* bitpos */
1751 complain_overflow_dont, /* complain_on_overflow */
1752 bfd_elf_generic_reloc, /* special_function */
1753 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC), /* name */
1754 FALSE, /* partial_inplace */
1755 0xffff, /* src_mask */
1756 0xffff, /* dst_mask */
1757 FALSE), /* pcrel_offset */
1758
1759 /* MOVZ: bit[31:16] of byte offset to module TLS base address. */
1760 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1), /* type */
1761 16, /* rightshift */
1762 2, /* size (0 = byte, 1 = short, 2 = long) */
1763 16, /* bitsize */
1764 FALSE, /* pc_relative */
1765 0, /* bitpos */
1766 complain_overflow_unsigned, /* complain_on_overflow */
1767 bfd_elf_generic_reloc, /* special_function */
1768 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1), /* name */
1769 FALSE, /* partial_inplace */
1770 0xffff, /* src_mask */
1771 0xffff, /* dst_mask */
1772 FALSE), /* pcrel_offset */
1773
1774 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1. */
1775 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC), /* type */
1776 16, /* rightshift */
1777 2, /* size (0 = byte, 1 = short, 2 = long) */
1778 16, /* bitsize */
1779 FALSE, /* pc_relative */
1780 0, /* bitpos */
1781 complain_overflow_dont, /* complain_on_overflow */
1782 bfd_elf_generic_reloc, /* special_function */
1783 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC), /* name */
1784 FALSE, /* partial_inplace */
1785 0xffff, /* src_mask */
1786 0xffff, /* dst_mask */
1787 FALSE), /* pcrel_offset */
1788
1789 /* MOVZ: bit[47:32] of byte offset to module TLS base address. */
1790 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2), /* type */
1791 32, /* rightshift */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1793 16, /* bitsize */
1794 FALSE, /* pc_relative */
1795 0, /* bitpos */
1796 complain_overflow_unsigned, /* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2), /* name */
1799 FALSE, /* partial_inplace */
1800 0xffff, /* src_mask */
1801 0xffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803
a6bb11b2 1804 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2), /* type */
bb3f9ed8 1805 32, /* rightshift */
a06ea964 1806 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1807 16, /* bitsize */
a06ea964
NC
1808 FALSE, /* pc_relative */
1809 0, /* bitpos */
0172429c 1810 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1811 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1812 AARCH64_R_STR (TLSLE_MOVW_TPREL_G2), /* name */
a06ea964
NC
1813 FALSE, /* partial_inplace */
1814 0xffff, /* src_mask */
1815 0xffff, /* dst_mask */
1816 FALSE), /* pcrel_offset */
1817
a6bb11b2 1818 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G1), /* type */
bb3f9ed8 1819 16, /* rightshift */
a06ea964 1820 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1821 16, /* bitsize */
a06ea964
NC
1822 FALSE, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_dont, /* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1826 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1), /* name */
a06ea964
NC
1827 FALSE, /* partial_inplace */
1828 0xffff, /* src_mask */
1829 0xffff, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831
a6bb11b2 1832 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G1_NC), /* type */
bb3f9ed8 1833 16, /* rightshift */
a06ea964 1834 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1835 16, /* bitsize */
a06ea964
NC
1836 FALSE, /* pc_relative */
1837 0, /* bitpos */
1838 complain_overflow_dont, /* complain_on_overflow */
1839 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1840 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1_NC), /* name */
a06ea964
NC
1841 FALSE, /* partial_inplace */
1842 0xffff, /* src_mask */
1843 0xffff, /* dst_mask */
1844 FALSE), /* pcrel_offset */
1845
a6bb11b2 1846 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0), /* type */
a06ea964
NC
1847 0, /* rightshift */
1848 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1849 16, /* bitsize */
a06ea964
NC
1850 FALSE, /* pc_relative */
1851 0, /* bitpos */
1852 complain_overflow_dont, /* complain_on_overflow */
1853 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1854 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0), /* name */
a06ea964
NC
1855 FALSE, /* partial_inplace */
1856 0xffff, /* src_mask */
1857 0xffff, /* dst_mask */
1858 FALSE), /* pcrel_offset */
1859
a6bb11b2 1860 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0_NC), /* type */
a06ea964
NC
1861 0, /* rightshift */
1862 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1863 16, /* bitsize */
a06ea964
NC
1864 FALSE, /* pc_relative */
1865 0, /* bitpos */
1866 complain_overflow_dont, /* complain_on_overflow */
1867 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1868 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0_NC), /* name */
a06ea964
NC
1869 FALSE, /* partial_inplace */
1870 0xffff, /* src_mask */
1871 0xffff, /* dst_mask */
1872 FALSE), /* pcrel_offset */
1873
a6bb11b2 1874 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_HI12), /* type */
bb3f9ed8 1875 12, /* rightshift */
a06ea964
NC
1876 2, /* size (0 = byte, 1 = short, 2 = long) */
1877 12, /* bitsize */
1878 FALSE, /* pc_relative */
1879 0, /* bitpos */
bab91cce 1880 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1881 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1882 AARCH64_R_STR (TLSLE_ADD_TPREL_HI12), /* name */
a06ea964
NC
1883 FALSE, /* partial_inplace */
1884 0xfff, /* src_mask */
1885 0xfff, /* dst_mask */
1886 FALSE), /* pcrel_offset */
1887
a6bb11b2 1888 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12), /* type */
a06ea964
NC
1889 0, /* rightshift */
1890 2, /* size (0 = byte, 1 = short, 2 = long) */
1891 12, /* bitsize */
1892 FALSE, /* pc_relative */
1893 0, /* bitpos */
36e6c140 1894 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1895 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1896 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12), /* name */
a06ea964
NC
1897 FALSE, /* partial_inplace */
1898 0xfff, /* src_mask */
1899 0xfff, /* dst_mask */
1900 FALSE), /* pcrel_offset */
1901
a6bb11b2 1902 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12_NC), /* type */
a06ea964
NC
1903 0, /* rightshift */
1904 2, /* size (0 = byte, 1 = short, 2 = long) */
1905 12, /* bitsize */
1906 FALSE, /* pc_relative */
1907 0, /* bitpos */
1908 complain_overflow_dont, /* complain_on_overflow */
1909 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1910 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12_NC), /* name */
a06ea964
NC
1911 FALSE, /* partial_inplace */
1912 0xfff, /* src_mask */
1913 0xfff, /* dst_mask */
1914 FALSE), /* pcrel_offset */
a06ea964 1915
84f1b9fb
RL
1916 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1917 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12), /* type */
1918 1, /* rightshift */
1919 2, /* size (0 = byte, 1 = short, 2 = long) */
1920 11, /* bitsize */
1921 FALSE, /* pc_relative */
1922 10, /* bitpos */
1923 complain_overflow_unsigned, /* complain_on_overflow */
1924 bfd_elf_generic_reloc, /* special_function */
1925 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12), /* name */
1926 FALSE, /* partial_inplace */
1927 0x1ffc00, /* src_mask */
1928 0x1ffc00, /* dst_mask */
1929 FALSE), /* pcrel_offset */
1930
1931 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check. */
1932 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12_NC), /* type */
1933 1, /* rightshift */
1934 2, /* size (0 = byte, 1 = short, 2 = long) */
1935 11, /* bitsize */
1936 FALSE, /* pc_relative */
1937 10, /* bitpos */
1938 complain_overflow_dont, /* complain_on_overflow */
1939 bfd_elf_generic_reloc, /* special_function */
1940 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12_NC), /* name */
1941 FALSE, /* partial_inplace */
1942 0x1ffc00, /* src_mask */
1943 0x1ffc00, /* dst_mask */
1944 FALSE), /* pcrel_offset */
1945
1946 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1947 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12), /* type */
1948 2, /* rightshift */
1949 2, /* size (0 = byte, 1 = short, 2 = long) */
1950 10, /* bitsize */
1951 FALSE, /* pc_relative */
1952 10, /* bitpos */
1953 complain_overflow_unsigned, /* complain_on_overflow */
1954 bfd_elf_generic_reloc, /* special_function */
1955 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12), /* name */
1956 FALSE, /* partial_inplace */
1957 0xffc00, /* src_mask */
1958 0xffc00, /* dst_mask */
1959 FALSE), /* pcrel_offset */
1960
1961 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check. */
1962 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12_NC), /* type */
1963 2, /* rightshift */
1964 2, /* size (0 = byte, 1 = short, 2 = long) */
1965 10, /* bitsize */
1966 FALSE, /* pc_relative */
1967 10, /* bitpos */
1968 complain_overflow_dont, /* complain_on_overflow */
1969 bfd_elf_generic_reloc, /* special_function */
1970 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12_NC), /* name */
1971 FALSE, /* partial_inplace */
1972 0xffc00, /* src_mask */
1973 0xffc00, /* dst_mask */
1974 FALSE), /* pcrel_offset */
1975
1976 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1977 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12), /* type */
1978 3, /* rightshift */
1979 2, /* size (0 = byte, 1 = short, 2 = long) */
1980 9, /* bitsize */
1981 FALSE, /* pc_relative */
1982 10, /* bitpos */
1983 complain_overflow_unsigned, /* complain_on_overflow */
1984 bfd_elf_generic_reloc, /* special_function */
1985 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12), /* name */
1986 FALSE, /* partial_inplace */
1987 0x7fc00, /* src_mask */
1988 0x7fc00, /* dst_mask */
1989 FALSE), /* pcrel_offset */
1990
1991 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check. */
1992 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12_NC), /* type */
1993 3, /* rightshift */
1994 2, /* size (0 = byte, 1 = short, 2 = long) */
1995 9, /* bitsize */
1996 FALSE, /* pc_relative */
1997 10, /* bitpos */
1998 complain_overflow_dont, /* complain_on_overflow */
1999 bfd_elf_generic_reloc, /* special_function */
2000 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12_NC), /* name */
2001 FALSE, /* partial_inplace */
2002 0x7fc00, /* src_mask */
2003 0x7fc00, /* dst_mask */
2004 FALSE), /* pcrel_offset */
2005
2006 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
2007 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12), /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 12, /* bitsize */
2011 FALSE, /* pc_relative */
2012 10, /* bitpos */
2013 complain_overflow_unsigned, /* complain_on_overflow */
2014 bfd_elf_generic_reloc, /* special_function */
2015 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12), /* name */
2016 FALSE, /* partial_inplace */
2017 0x3ffc00, /* src_mask */
2018 0x3ffc00, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020
2021 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check. */
2022 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12_NC), /* type */
2023 0, /* rightshift */
2024 2, /* size (0 = byte, 1 = short, 2 = long) */
2025 12, /* bitsize */
2026 FALSE, /* pc_relative */
2027 10, /* bitpos */
2028 complain_overflow_dont, /* complain_on_overflow */
2029 bfd_elf_generic_reloc, /* special_function */
2030 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12_NC), /* name */
2031 FALSE, /* partial_inplace */
2032 0x3ffc00, /* src_mask */
2033 0x3ffc00, /* dst_mask */
2034 FALSE), /* pcrel_offset */
2035
a6bb11b2 2036 HOWTO (AARCH64_R (TLSDESC_LD_PREL19), /* type */
bb3f9ed8 2037 2, /* rightshift */
a06ea964 2038 2, /* size (0 = byte, 1 = short, 2 = long) */
1ada945d 2039 19, /* bitsize */
a06ea964
NC
2040 TRUE, /* pc_relative */
2041 0, /* bitpos */
2042 complain_overflow_dont, /* complain_on_overflow */
2043 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2044 AARCH64_R_STR (TLSDESC_LD_PREL19), /* name */
a06ea964 2045 FALSE, /* partial_inplace */
1ada945d
MS
2046 0x0ffffe0, /* src_mask */
2047 0x0ffffe0, /* dst_mask */
a06ea964
NC
2048 TRUE), /* pcrel_offset */
2049
a6bb11b2 2050 HOWTO (AARCH64_R (TLSDESC_ADR_PREL21), /* type */
a06ea964
NC
2051 0, /* rightshift */
2052 2, /* size (0 = byte, 1 = short, 2 = long) */
2053 21, /* bitsize */
2054 TRUE, /* pc_relative */
2055 0, /* bitpos */
2056 complain_overflow_dont, /* complain_on_overflow */
2057 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2058 AARCH64_R_STR (TLSDESC_ADR_PREL21), /* name */
a06ea964
NC
2059 FALSE, /* partial_inplace */
2060 0x1fffff, /* src_mask */
2061 0x1fffff, /* dst_mask */
2062 TRUE), /* pcrel_offset */
2063
2064 /* Get to the page for the GOT entry for the symbol
2065 (G(S) - P) using an ADRP instruction. */
a6bb11b2 2066 HOWTO (AARCH64_R (TLSDESC_ADR_PAGE21), /* type */
a06ea964
NC
2067 12, /* rightshift */
2068 2, /* size (0 = byte, 1 = short, 2 = long) */
2069 21, /* bitsize */
2070 TRUE, /* pc_relative */
2071 0, /* bitpos */
2072 complain_overflow_dont, /* complain_on_overflow */
2073 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2074 AARCH64_R_STR (TLSDESC_ADR_PAGE21), /* name */
a06ea964
NC
2075 FALSE, /* partial_inplace */
2076 0x1fffff, /* src_mask */
2077 0x1fffff, /* dst_mask */
2078 TRUE), /* pcrel_offset */
2079
a6bb11b2 2080 /* LD64: GOT offset G(S) & 0xff8. */
f955cccf 2081 HOWTO64 (AARCH64_R (TLSDESC_LD64_LO12), /* type */
a06ea964
NC
2082 3, /* rightshift */
2083 2, /* size (0 = byte, 1 = short, 2 = long) */
2084 12, /* bitsize */
2085 FALSE, /* pc_relative */
2086 0, /* bitpos */
2087 complain_overflow_dont, /* complain_on_overflow */
2088 bfd_elf_generic_reloc, /* special_function */
f955cccf 2089 AARCH64_R_STR (TLSDESC_LD64_LO12), /* name */
a06ea964 2090 FALSE, /* partial_inplace */
a6bb11b2
YZ
2091 0xff8, /* src_mask */
2092 0xff8, /* dst_mask */
2093 FALSE), /* pcrel_offset */
2094
2095 /* LD32: GOT offset G(S) & 0xffc. */
2096 HOWTO32 (AARCH64_R (TLSDESC_LD32_LO12_NC), /* type */
2097 2, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 12, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont, /* complain_on_overflow */
2103 bfd_elf_generic_reloc, /* special_function */
2104 AARCH64_R_STR (TLSDESC_LD32_LO12_NC), /* name */
2105 FALSE, /* partial_inplace */
2106 0xffc, /* src_mask */
2107 0xffc, /* dst_mask */
a06ea964
NC
2108 FALSE), /* pcrel_offset */
2109
2110 /* ADD: GOT offset G(S) & 0xfff. */
f955cccf 2111 HOWTO (AARCH64_R (TLSDESC_ADD_LO12), /* type */
a06ea964
NC
2112 0, /* rightshift */
2113 2, /* size (0 = byte, 1 = short, 2 = long) */
2114 12, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
f955cccf 2117 complain_overflow_dont,/* complain_on_overflow */
a06ea964 2118 bfd_elf_generic_reloc, /* special_function */
f955cccf 2119 AARCH64_R_STR (TLSDESC_ADD_LO12), /* name */
a06ea964
NC
2120 FALSE, /* partial_inplace */
2121 0xfff, /* src_mask */
2122 0xfff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124
a6bb11b2 2125 HOWTO64 (AARCH64_R (TLSDESC_OFF_G1), /* type */
bb3f9ed8 2126 16, /* rightshift */
a06ea964
NC
2127 2, /* size (0 = byte, 1 = short, 2 = long) */
2128 12, /* bitsize */
2129 FALSE, /* pc_relative */
2130 0, /* bitpos */
43a357f9 2131 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 2132 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2133 AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
a06ea964
NC
2134 FALSE, /* partial_inplace */
2135 0xffff, /* src_mask */
2136 0xffff, /* dst_mask */
2137 FALSE), /* pcrel_offset */
2138
a6bb11b2 2139 HOWTO64 (AARCH64_R (TLSDESC_OFF_G0_NC), /* type */
a06ea964
NC
2140 0, /* rightshift */
2141 2, /* size (0 = byte, 1 = short, 2 = long) */
2142 12, /* bitsize */
2143 FALSE, /* pc_relative */
2144 0, /* bitpos */
2145 complain_overflow_dont, /* complain_on_overflow */
2146 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2147 AARCH64_R_STR (TLSDESC_OFF_G0_NC), /* name */
a06ea964
NC
2148 FALSE, /* partial_inplace */
2149 0xffff, /* src_mask */
2150 0xffff, /* dst_mask */
2151 FALSE), /* pcrel_offset */
2152
a6bb11b2 2153 HOWTO64 (AARCH64_R (TLSDESC_LDR), /* type */
a06ea964
NC
2154 0, /* rightshift */
2155 2, /* size (0 = byte, 1 = short, 2 = long) */
2156 12, /* bitsize */
2157 FALSE, /* pc_relative */
2158 0, /* bitpos */
2159 complain_overflow_dont, /* complain_on_overflow */
2160 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2161 AARCH64_R_STR (TLSDESC_LDR), /* name */
a06ea964
NC
2162 FALSE, /* partial_inplace */
2163 0x0, /* src_mask */
2164 0x0, /* dst_mask */
2165 FALSE), /* pcrel_offset */
2166
a6bb11b2 2167 HOWTO64 (AARCH64_R (TLSDESC_ADD), /* type */
a06ea964
NC
2168 0, /* rightshift */
2169 2, /* size (0 = byte, 1 = short, 2 = long) */
2170 12, /* bitsize */
2171 FALSE, /* pc_relative */
2172 0, /* bitpos */
2173 complain_overflow_dont, /* complain_on_overflow */
2174 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2175 AARCH64_R_STR (TLSDESC_ADD), /* name */
a06ea964
NC
2176 FALSE, /* partial_inplace */
2177 0x0, /* src_mask */
2178 0x0, /* dst_mask */
2179 FALSE), /* pcrel_offset */
2180
a6bb11b2 2181 HOWTO (AARCH64_R (TLSDESC_CALL), /* type */
a06ea964
NC
2182 0, /* rightshift */
2183 2, /* size (0 = byte, 1 = short, 2 = long) */
7366006f 2184 0, /* bitsize */
a06ea964
NC
2185 FALSE, /* pc_relative */
2186 0, /* bitpos */
2187 complain_overflow_dont, /* complain_on_overflow */
2188 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2189 AARCH64_R_STR (TLSDESC_CALL), /* name */
a06ea964
NC
2190 FALSE, /* partial_inplace */
2191 0x0, /* src_mask */
2192 0x0, /* dst_mask */
2193 FALSE), /* pcrel_offset */
a6bb11b2 2194
4ca9b406
SP
2195 /* Get to the page for the GOT entry for the symbol
2196 (G(S) - P) using an ADRP instruction. */
2197 HOWTO64 (MORELLO_R (TLSDESC_ADR_PAGE20), /* type */
2198 12, /* rightshift */
2199 2, /* size (0 = byte, 1 = short, 2 = long) */
2200 20, /* bitsize */
2201 TRUE, /* pc_relative */
2202 0, /* bitpos */
2203 complain_overflow_dont, /* complain_on_overflow */
2204 bfd_elf_generic_reloc, /* special_function */
2205 MORELLO_R_STR (TLSDESC_ADR_PAGE20), /* name */
2206 FALSE, /* partial_inplace */
2207 0xfffff, /* src_mask */
2208 0xfffff, /* dst_mask */
2209 TRUE), /* pcrel_offset */
2210
2211 /* LD128: GOT offset G(S) & 0xff0. */
2212 HOWTO64 (MORELLO_R (TLSDESC_LD128_LO12), /* type */
2213 4, /* rightshift */
2214 2, /* size (0 = byte, 1 = short, 2 = long) */
2215 12, /* bitsize */
2216 FALSE, /* pc_relative */
2217 0, /* bitpos */
2218 complain_overflow_dont, /* complain_on_overflow */
2219 bfd_elf_generic_reloc, /* special_function */
2220 MORELLO_R_STR (TLSDESC_LD128_LO12), /* name */
2221 FALSE, /* partial_inplace */
2222 0xff0, /* src_mask */
2223 0xff0, /* dst_mask */
2224 FALSE), /* pcrel_offset */
2225
2226 HOWTO64 (MORELLO_R (TLSDESC_CALL), /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 0, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont, /* complain_on_overflow */
2233 bfd_elf_generic_reloc, /* special_function */
2234 MORELLO_R_STR (TLSDESC_CALL), /* name */
2235 FALSE, /* partial_inplace */
2236 0x0, /* src_mask */
2237 0x0, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239
a6bb11b2
YZ
2240 HOWTO (AARCH64_R (COPY), /* type */
2241 0, /* rightshift */
2242 2, /* size (0 = byte, 1 = short, 2 = long) */
2243 64, /* bitsize */
2244 FALSE, /* pc_relative */
2245 0, /* bitpos */
2246 complain_overflow_bitfield, /* complain_on_overflow */
2247 bfd_elf_generic_reloc, /* special_function */
2248 AARCH64_R_STR (COPY), /* name */
2249 TRUE, /* partial_inplace */
2250 0xffffffff, /* src_mask */
2251 0xffffffff, /* dst_mask */
2252 FALSE), /* pcrel_offset */
2253
2254 HOWTO (AARCH64_R (GLOB_DAT), /* type */
2255 0, /* rightshift */
2256 2, /* size (0 = byte, 1 = short, 2 = long) */
2257 64, /* bitsize */
2258 FALSE, /* pc_relative */
2259 0, /* bitpos */
2260 complain_overflow_bitfield, /* complain_on_overflow */
2261 bfd_elf_generic_reloc, /* special_function */
2262 AARCH64_R_STR (GLOB_DAT), /* name */
2263 TRUE, /* partial_inplace */
2264 0xffffffff, /* src_mask */
2265 0xffffffff, /* dst_mask */
2266 FALSE), /* pcrel_offset */
2267
2268 HOWTO (AARCH64_R (JUMP_SLOT), /* type */
2269 0, /* rightshift */
2270 2, /* size (0 = byte, 1 = short, 2 = long) */
2271 64, /* bitsize */
2272 FALSE, /* pc_relative */
2273 0, /* bitpos */
2274 complain_overflow_bitfield, /* complain_on_overflow */
2275 bfd_elf_generic_reloc, /* special_function */
2276 AARCH64_R_STR (JUMP_SLOT), /* name */
2277 TRUE, /* partial_inplace */
2278 0xffffffff, /* src_mask */
2279 0xffffffff, /* dst_mask */
2280 FALSE), /* pcrel_offset */
2281
2282 HOWTO (AARCH64_R (RELATIVE), /* type */
2283 0, /* rightshift */
2284 2, /* size (0 = byte, 1 = short, 2 = long) */
2285 64, /* bitsize */
2286 FALSE, /* pc_relative */
2287 0, /* bitpos */
2288 complain_overflow_bitfield, /* complain_on_overflow */
2289 bfd_elf_generic_reloc, /* special_function */
2290 AARCH64_R_STR (RELATIVE), /* name */
2291 TRUE, /* partial_inplace */
2292 ALL_ONES, /* src_mask */
2293 ALL_ONES, /* dst_mask */
2294 FALSE), /* pcrel_offset */
2295
2296 HOWTO (AARCH64_R (TLS_DTPMOD), /* type */
2297 0, /* rightshift */
2298 2, /* size (0 = byte, 1 = short, 2 = long) */
2299 64, /* bitsize */
2300 FALSE, /* pc_relative */
2301 0, /* bitpos */
2302 complain_overflow_dont, /* complain_on_overflow */
2303 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ
2304#if ARCH_SIZE == 64
2305 AARCH64_R_STR (TLS_DTPMOD64), /* name */
2306#else
a6bb11b2 2307 AARCH64_R_STR (TLS_DTPMOD), /* name */
da0781dc 2308#endif
a6bb11b2
YZ
2309 FALSE, /* partial_inplace */
2310 0, /* src_mask */
2311 ALL_ONES, /* dst_mask */
2312 FALSE), /* pc_reloffset */
2313
2314 HOWTO (AARCH64_R (TLS_DTPREL), /* type */
2315 0, /* rightshift */
2316 2, /* size (0 = byte, 1 = short, 2 = long) */
2317 64, /* bitsize */
2318 FALSE, /* pc_relative */
2319 0, /* bitpos */
2320 complain_overflow_dont, /* complain_on_overflow */
2321 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ
2322#if ARCH_SIZE == 64
2323 AARCH64_R_STR (TLS_DTPREL64), /* name */
2324#else
a6bb11b2 2325 AARCH64_R_STR (TLS_DTPREL), /* name */
da0781dc 2326#endif
a6bb11b2
YZ
2327 FALSE, /* partial_inplace */
2328 0, /* src_mask */
2329 ALL_ONES, /* dst_mask */
2330 FALSE), /* pcrel_offset */
2331
2332 HOWTO (AARCH64_R (TLS_TPREL), /* type */
2333 0, /* rightshift */
2334 2, /* size (0 = byte, 1 = short, 2 = long) */
2335 64, /* bitsize */
2336 FALSE, /* pc_relative */
2337 0, /* bitpos */
2338 complain_overflow_dont, /* complain_on_overflow */
2339 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ
2340#if ARCH_SIZE == 64
2341 AARCH64_R_STR (TLS_TPREL64), /* name */
2342#else
a6bb11b2 2343 AARCH64_R_STR (TLS_TPREL), /* name */
da0781dc 2344#endif
a6bb11b2
YZ
2345 FALSE, /* partial_inplace */
2346 0, /* src_mask */
2347 ALL_ONES, /* dst_mask */
2348 FALSE), /* pcrel_offset */
2349
2350 HOWTO (AARCH64_R (TLSDESC), /* type */
2351 0, /* rightshift */
2352 2, /* size (0 = byte, 1 = short, 2 = long) */
2353 64, /* bitsize */
2354 FALSE, /* pc_relative */
2355 0, /* bitpos */
2356 complain_overflow_dont, /* complain_on_overflow */
2357 bfd_elf_generic_reloc, /* special_function */
2358 AARCH64_R_STR (TLSDESC), /* name */
2359 FALSE, /* partial_inplace */
2360 0, /* src_mask */
2361 ALL_ONES, /* dst_mask */
2362 FALSE), /* pcrel_offset */
2363
2364 HOWTO (AARCH64_R (IRELATIVE), /* type */
2365 0, /* rightshift */
2366 2, /* size (0 = byte, 1 = short, 2 = long) */
2367 64, /* bitsize */
2368 FALSE, /* pc_relative */
2369 0, /* bitpos */
2370 complain_overflow_bitfield, /* complain_on_overflow */
2371 bfd_elf_generic_reloc, /* special_function */
2372 AARCH64_R_STR (IRELATIVE), /* name */
2373 FALSE, /* partial_inplace */
2374 0, /* src_mask */
2375 ALL_ONES, /* dst_mask */
2376 FALSE), /* pcrel_offset */
2377
40bbb79e
SP
2378 HOWTO64 (MORELLO_R (CAPINIT), /* type */
2379 0, /* rightshift */
2380 4, /* size (0 = byte, 1 = short, 2 = long) */
2381 0, /* bitsize */
2382 FALSE, /* pc_relative */
2383 0, /* bitpos */
2384 complain_overflow_dont, /* complain_on_overflow */
2385 bfd_elf_generic_reloc, /* special_function */
2386 MORELLO_R_STR (CAPINIT), /* name */
2387 FALSE, /* partial_inplace */
2388 ALL_ONES, /* src_mask */
2389 ALL_ONES, /* dst_mask */
2390 FALSE), /* pcrel_offset */
2391
a1bdea65
SP
2392 HOWTO64 (MORELLO_R (GLOB_DAT),/* type */
2393 0, /* rightshift */
2394 2, /* size (0 = byte, 1 = short, 2 = long) */
2395 64, /* bitsize */
2396 FALSE, /* pc_relative */
2397 0, /* bitpos */
2398 complain_overflow_bitfield, /* complain_on_overflow */
2399 bfd_elf_generic_reloc, /* special_function */
2400 MORELLO_R_STR (GLOB_DAT), /* name */
2401 TRUE, /* partial_inplace */
2402 0xffffffff, /* src_mask */
2403 0xffffffff, /* dst_mask */
2404 FALSE), /* pcrel_offset */
2405
e19e9199
SP
2406 HOWTO64 (MORELLO_R (JUMP_SLOT), /* type */
2407 0, /* rightshift */
2408 2, /* size (0 = byte, 1 = short, 2 = long) */
2409 64, /* bitsize */
2410 FALSE, /* pc_relative */
2411 0, /* bitpos */
2412 complain_overflow_bitfield, /* complain_on_overflow */
2413 bfd_elf_generic_reloc, /* special_function */
2414 MORELLO_R_STR (JUMP_SLOT), /* name */
2415 TRUE, /* partial_inplace */
2416 0xffffffff, /* src_mask */
2417 0xffffffff, /* dst_mask */
2418 FALSE), /* pcrel_offset */
2419
2420 HOWTO64 (MORELLO_R (RELATIVE), /* type */
40bbb79e
SP
2421 0, /* rightshift */
2422 2, /* size (0 = byte, 1 = short, 2 = long) */
2423 64, /* bitsize */
2424 FALSE, /* pc_relative */
2425 0, /* bitpos */
2426 complain_overflow_bitfield, /* complain_on_overflow */
2427 bfd_elf_generic_reloc, /* special_function */
2428 MORELLO_R_STR (RELATIVE), /* name */
2429 TRUE, /* partial_inplace */
2430 ALL_ONES, /* src_mask */
2431 ALL_ONES, /* dst_mask */
2432 FALSE), /* pcrel_offset */
2433
e19e9199
SP
2434 HOWTO64 (MORELLO_R (IRELATIVE), /* type */
2435 0, /* rightshift */
2436 2, /* size (0 = byte, 1 = short, 2 = long) */
2437 64, /* bitsize */
2438 FALSE, /* pc_relative */
2439 0, /* bitpos */
2440 complain_overflow_bitfield, /* complain_on_overflow */
2441 bfd_elf_generic_reloc, /* special_function */
2442 MORELLO_R_STR (IRELATIVE), /* name */
2443 FALSE, /* partial_inplace */
2444 0, /* src_mask */
2445 ALL_ONES, /* dst_mask */
2446 FALSE), /* pcrel_offset */
2447
4ca9b406
SP
2448 HOWTO64 (MORELLO_R (TLSDESC), /* type */
2449 0, /* rightshift */
2450 2, /* size (0 = byte, 1 = short, 2 = long) */
2451 64, /* bitsize */
2452 FALSE, /* pc_relative */
2453 0, /* bitpos */
2454 complain_overflow_dont, /* complain_on_overflow */
2455 bfd_elf_generic_reloc, /* special_function */
2456 MORELLO_R_STR (TLSDESC), /* name */
2457 FALSE, /* partial_inplace */
2458 0, /* src_mask */
2459 ALL_ONES, /* dst_mask */
2460 FALSE), /* pcrel_offset */
2461
a6bb11b2 2462 EMPTY_HOWTO (0),
a06ea964
NC
2463};
2464
a6bb11b2
YZ
2465static reloc_howto_type elfNN_aarch64_howto_none =
2466 HOWTO (R_AARCH64_NONE, /* type */
2467 0, /* rightshift */
6346d5ca 2468 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2
YZ
2469 0, /* bitsize */
2470 FALSE, /* pc_relative */
2471 0, /* bitpos */
2472 complain_overflow_dont,/* complain_on_overflow */
2473 bfd_elf_generic_reloc, /* special_function */
2474 "R_AARCH64_NONE", /* name */
2475 FALSE, /* partial_inplace */
2476 0, /* src_mask */
2477 0, /* dst_mask */
2478 FALSE); /* pcrel_offset */
2479
2480/* Given HOWTO, return the bfd internal relocation enumerator. */
2481
2482static bfd_reloc_code_real_type
2483elfNN_aarch64_bfd_reloc_from_howto (reloc_howto_type *howto)
2484{
2485 const int size
2486 = (int) ARRAY_SIZE (elfNN_aarch64_howto_table);
2487 const ptrdiff_t offset
2488 = howto - elfNN_aarch64_howto_table;
2489
2490 if (offset > 0 && offset < size - 1)
2491 return BFD_RELOC_AARCH64_RELOC_START + offset;
2492
2493 if (howto == &elfNN_aarch64_howto_none)
2494 return BFD_RELOC_AARCH64_NONE;
2495
2496 return BFD_RELOC_AARCH64_RELOC_START;
2497}
2498
2499/* Given R_TYPE, return the bfd internal relocation enumerator. */
2500
2501static bfd_reloc_code_real_type
0aa13fee 2502elfNN_aarch64_bfd_reloc_from_type (bfd *abfd, unsigned int r_type)
a6bb11b2
YZ
2503{
2504 static bfd_boolean initialized_p = FALSE;
2505 /* Indexed by R_TYPE, values are offsets in the howto_table. */
2506 static unsigned int offsets[R_AARCH64_end];
2507
535b785f 2508 if (!initialized_p)
a6bb11b2
YZ
2509 {
2510 unsigned int i;
2511
2512 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2513 if (elfNN_aarch64_howto_table[i].type != 0)
2514 offsets[elfNN_aarch64_howto_table[i].type] = i;
2515
2516 initialized_p = TRUE;
2517 }
2518
2519 if (r_type == R_AARCH64_NONE || r_type == R_AARCH64_NULL)
2520 return BFD_RELOC_AARCH64_NONE;
2521
5860e3f8
NC
2522 /* PR 17512: file: b371e70a. */
2523 if (r_type >= R_AARCH64_end)
2524 {
0aa13fee
AM
2525 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2526 abfd, r_type);
5860e3f8
NC
2527 bfd_set_error (bfd_error_bad_value);
2528 return BFD_RELOC_AARCH64_NONE;
2529 }
2530
a6bb11b2
YZ
2531 return BFD_RELOC_AARCH64_RELOC_START + offsets[r_type];
2532}
2533
2534struct elf_aarch64_reloc_map
2535{
2536 bfd_reloc_code_real_type from;
2537 bfd_reloc_code_real_type to;
2538};
2539
2540/* Map bfd generic reloc to AArch64-specific reloc. */
2541static const struct elf_aarch64_reloc_map elf_aarch64_reloc_map[] =
2542{
2543 {BFD_RELOC_NONE, BFD_RELOC_AARCH64_NONE},
2544
2545 /* Basic data relocations. */
2546 {BFD_RELOC_CTOR, BFD_RELOC_AARCH64_NN},
2547 {BFD_RELOC_64, BFD_RELOC_AARCH64_64},
2548 {BFD_RELOC_32, BFD_RELOC_AARCH64_32},
2549 {BFD_RELOC_16, BFD_RELOC_AARCH64_16},
2550 {BFD_RELOC_64_PCREL, BFD_RELOC_AARCH64_64_PCREL},
2551 {BFD_RELOC_32_PCREL, BFD_RELOC_AARCH64_32_PCREL},
2552 {BFD_RELOC_16_PCREL, BFD_RELOC_AARCH64_16_PCREL},
2553};
2554
2555/* Given the bfd internal relocation enumerator in CODE, return the
2556 corresponding howto entry. */
2557
2558static reloc_howto_type *
2559elfNN_aarch64_howto_from_bfd_reloc (bfd_reloc_code_real_type code)
2560{
2561 unsigned int i;
2562
2563 /* Convert bfd generic reloc to AArch64-specific reloc. */
2564 if (code < BFD_RELOC_AARCH64_RELOC_START
2565 || code > BFD_RELOC_AARCH64_RELOC_END)
2566 for (i = 0; i < ARRAY_SIZE (elf_aarch64_reloc_map); i++)
2567 if (elf_aarch64_reloc_map[i].from == code)
2568 {
2569 code = elf_aarch64_reloc_map[i].to;
2570 break;
2571 }
2572
2573 if (code > BFD_RELOC_AARCH64_RELOC_START
2574 && code < BFD_RELOC_AARCH64_RELOC_END)
2575 if (elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START].type)
2576 return &elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START];
2577
54757ed1
AP
2578 if (code == BFD_RELOC_AARCH64_NONE)
2579 return &elfNN_aarch64_howto_none;
2580
a6bb11b2
YZ
2581 return NULL;
2582}
2583
a06ea964 2584static reloc_howto_type *
0aa13fee 2585elfNN_aarch64_howto_from_type (bfd *abfd, unsigned int r_type)
a06ea964 2586{
a6bb11b2
YZ
2587 bfd_reloc_code_real_type val;
2588 reloc_howto_type *howto;
2589
cec5225b
YZ
2590#if ARCH_SIZE == 32
2591 if (r_type > 256)
2592 {
2593 bfd_set_error (bfd_error_bad_value);
2594 return NULL;
2595 }
2596#endif
2597
a6bb11b2
YZ
2598 if (r_type == R_AARCH64_NONE)
2599 return &elfNN_aarch64_howto_none;
a06ea964 2600
0aa13fee 2601 val = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a6bb11b2 2602 howto = elfNN_aarch64_howto_from_bfd_reloc (val);
a06ea964 2603
a6bb11b2
YZ
2604 if (howto != NULL)
2605 return howto;
a06ea964 2606
a06ea964
NC
2607 bfd_set_error (bfd_error_bad_value);
2608 return NULL;
2609}
2610
f3185997 2611static bfd_boolean
0aa13fee 2612elfNN_aarch64_info_to_howto (bfd *abfd, arelent *bfd_reloc,
a06ea964
NC
2613 Elf_Internal_Rela *elf_reloc)
2614{
2615 unsigned int r_type;
2616
cec5225b 2617 r_type = ELFNN_R_TYPE (elf_reloc->r_info);
0aa13fee 2618 bfd_reloc->howto = elfNN_aarch64_howto_from_type (abfd, r_type);
f3185997
NC
2619
2620 if (bfd_reloc->howto == NULL)
2621 {
2622 /* xgettext:c-format */
2623 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2624 return FALSE;
2625 }
2626 return TRUE;
a06ea964
NC
2627}
2628
a06ea964 2629static reloc_howto_type *
cec5225b 2630elfNN_aarch64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC
2631 bfd_reloc_code_real_type code)
2632{
a6bb11b2 2633 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (code);
a06ea964 2634
a6bb11b2
YZ
2635 if (howto != NULL)
2636 return howto;
a06ea964
NC
2637
2638 bfd_set_error (bfd_error_bad_value);
2639 return NULL;
2640}
2641
2642static reloc_howto_type *
cec5225b 2643elfNN_aarch64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC
2644 const char *r_name)
2645{
2646 unsigned int i;
2647
a6bb11b2
YZ
2648 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2649 if (elfNN_aarch64_howto_table[i].name != NULL
2650 && strcasecmp (elfNN_aarch64_howto_table[i].name, r_name) == 0)
2651 return &elfNN_aarch64_howto_table[i];
a06ea964
NC
2652
2653 return NULL;
2654}
2655
07d6d2b8
AM
2656#define TARGET_LITTLE_SYM aarch64_elfNN_le_vec
2657#define TARGET_LITTLE_NAME "elfNN-littleaarch64"
2658#define TARGET_BIG_SYM aarch64_elfNN_be_vec
2659#define TARGET_BIG_NAME "elfNN-bigaarch64"
a06ea964 2660
a06ea964
NC
2661/* The linker script knows the section names for placement.
2662 The entry_names are used to do simple name mangling on the stubs.
2663 Given a function name, and its type, the stub can be found. The
2664 name can be changed. The only requirement is the %s be present. */
50e192f0 2665#define STUB_ENTRY_NAME "__%s%s_veneer"
a06ea964
NC
2666
2667/* The name of the dynamic interpreter. This is put in the .interp
2668 section. */
2669#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so.1"
2670
2671#define AARCH64_MAX_FWD_BRANCH_OFFSET \
2672 (((1 << 25) - 1) << 2)
2673#define AARCH64_MAX_BWD_BRANCH_OFFSET \
2674 (-((1 << 25) << 2))
2675
2676#define AARCH64_MAX_ADRP_IMM ((1 << 20) - 1)
2677#define AARCH64_MIN_ADRP_IMM (-(1 << 20))
2678
50e192f0
SP
2679#define C64_MAX_ADRP_IMM ((1 << 19) - 1)
2680#define C64_MIN_ADRP_IMM (-(1 << 19))
2681
2682static bfd_boolean
2683aarch64_branch_reloc_p (unsigned int r_type)
2684{
2685 switch (r_type)
2686 {
2687 case MORELLO_R (JUMP26):
2688 case MORELLO_R (CALL26):
2689 case AARCH64_R (JUMP26):
2690 case AARCH64_R (CALL26):
2691 return TRUE;
2692
2693 default: break;
2694 }
2695
2696 return FALSE;
2697}
2698
a06ea964
NC
2699static int
2700aarch64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2701{
2702 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2703 return offset <= AARCH64_MAX_ADRP_IMM && offset >= AARCH64_MIN_ADRP_IMM;
2704}
2705
50e192f0
SP
2706static bfd_boolean
2707c64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2708{
2709 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2710 return offset <= C64_MAX_ADRP_IMM && offset >= C64_MIN_ADRP_IMM;
2711}
2712
a06ea964
NC
2713static int
2714aarch64_valid_branch_p (bfd_vma value, bfd_vma place)
2715{
2716 bfd_signed_vma offset = (bfd_signed_vma) (value - place);
2717 return (offset <= AARCH64_MAX_FWD_BRANCH_OFFSET
2718 && offset >= AARCH64_MAX_BWD_BRANCH_OFFSET);
2719}
2720
2721static const uint32_t aarch64_adrp_branch_stub [] =
2722{
2723 0x90000010, /* adrp ip0, X */
2724 /* R_AARCH64_ADR_HI21_PCREL(X) */
2725 0x91000210, /* add ip0, ip0, :lo12:X */
2726 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2727 0xd61f0200, /* br ip0 */
2728};
2729
2730static const uint32_t aarch64_long_branch_stub[] =
2731{
cec5225b 2732#if ARCH_SIZE == 64
a06ea964 2733 0x58000090, /* ldr ip0, 1f */
cec5225b
YZ
2734#else
2735 0x18000090, /* ldr wip0, 1f */
2736#endif
a06ea964
NC
2737 0x10000011, /* adr ip1, #0 */
2738 0x8b110210, /* add ip0, ip0, ip1 */
2739 0xd61f0200, /* br ip0 */
cec5225b
YZ
2740 0x00000000, /* 1: .xword or .word
2741 R_AARCH64_PRELNN(X) + 12
a06ea964
NC
2742 */
2743 0x00000000,
2744};
2745
68fcca92
JW
2746static const uint32_t aarch64_erratum_835769_stub[] =
2747{
2748 0x00000000, /* Placeholder for multiply accumulate. */
2749 0x14000000, /* b <label> */
2750};
2751
4106101c
MS
2752static const uint32_t aarch64_erratum_843419_stub[] =
2753{
2754 0x00000000, /* Placeholder for LDR instruction. */
2755 0x14000000, /* b <label> */
2756};
2757
50e192f0
SP
2758static const uint32_t aarch64_c64_branch_stub [] =
2759{
2760 0xc2c273e0, /* bx #4 */
2761 0x90800010, /* adrp c16, X */
2762 /* R_MORELLO_ADR_HI20_PCREL(X) */
2763 0x02000210, /* add c16, c16, :lo12:X */
2764 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2765 0xc2c21200, /* br c16 */
2766};
2767
2768static const uint32_t c64_aarch64_branch_stub [] =
2769{
2770 0x90800010, /* adrp c16, X */
2771 /* R_MORELLO_ADR_HI20_PCREL(X) */
2772 0x02000210, /* add c16, c16, :lo12:X */
2773 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2774 0xc2c21200, /* br c16 */
2775};
2776
a06ea964
NC
2777/* Section name for stubs is the associated section name plus this
2778 string. */
2779#define STUB_SUFFIX ".stub"
2780
cec5225b 2781enum elf_aarch64_stub_type
a06ea964
NC
2782{
2783 aarch64_stub_none,
2784 aarch64_stub_adrp_branch,
2785 aarch64_stub_long_branch,
68fcca92 2786 aarch64_stub_erratum_835769_veneer,
4106101c 2787 aarch64_stub_erratum_843419_veneer,
50e192f0
SP
2788 aarch64_stub_branch_c64,
2789 c64_stub_branch_aarch64,
2790 c64_stub_branch_c64,
a06ea964
NC
2791};
2792
cec5225b 2793struct elf_aarch64_stub_hash_entry
a06ea964
NC
2794{
2795 /* Base hash table entry structure. */
2796 struct bfd_hash_entry root;
2797
2798 /* The stub section. */
2799 asection *stub_sec;
2800
2801 /* Offset within stub_sec of the beginning of this stub. */
2802 bfd_vma stub_offset;
2803
2804 /* Given the symbol's value and its section we can determine its final
2805 value when building the stubs (so the stub knows where to jump). */
2806 bfd_vma target_value;
2807 asection *target_section;
2808
cec5225b 2809 enum elf_aarch64_stub_type stub_type;
a06ea964
NC
2810
2811 /* The symbol table entry, if any, that this was derived from. */
cec5225b 2812 struct elf_aarch64_link_hash_entry *h;
a06ea964
NC
2813
2814 /* Destination symbol type */
2815 unsigned char st_type;
2816
2817 /* Where this stub is being called from, or, in the case of combined
2818 stub sections, the first input section in the group. */
2819 asection *id_sec;
2820
2821 /* The name for the local symbol at the start of this stub. The
2822 stub name in the hash table has to be unique; this does not, so
2823 it can be friendlier. */
2824 char *output_name;
68fcca92
JW
2825
2826 /* The instruction which caused this stub to be generated (only valid for
2827 erratum 835769 workaround stubs at present). */
2828 uint32_t veneered_insn;
4106101c
MS
2829
2830 /* In an erratum 843419 workaround stub, the ADRP instruction offset. */
2831 bfd_vma adrp_offset;
a06ea964
NC
2832};
2833
2834/* Used to build a map of a section. This is required for mixed-endian
2835 code/data. */
2836
cec5225b 2837typedef struct elf_elf_section_map
a06ea964
NC
2838{
2839 bfd_vma vma;
2840 char type;
2841}
cec5225b 2842elf_aarch64_section_map;
a06ea964
NC
2843
2844
2845typedef struct _aarch64_elf_section_data
2846{
2847 struct bfd_elf_section_data elf;
2848 unsigned int mapcount;
2849 unsigned int mapsize;
cec5225b 2850 elf_aarch64_section_map *map;
f0070c1e 2851 bfd_boolean sorted;
a06ea964
NC
2852}
2853_aarch64_elf_section_data;
2854
cec5225b 2855#define elf_aarch64_section_data(sec) \
a06ea964
NC
2856 ((_aarch64_elf_section_data *) elf_section_data (sec))
2857
f0070c1e
SP
2858/* Used to order a list of mapping symbols by address. */
2859
2860static int
2861elf_aarch64_compare_mapping (const void *a, const void *b)
2862{
2863 const elf_aarch64_section_map *amap = (const elf_aarch64_section_map *) a;
2864 const elf_aarch64_section_map *bmap = (const elf_aarch64_section_map *) b;
2865
2866 if (amap->vma > bmap->vma)
2867 return 1;
2868 else if (amap->vma < bmap->vma)
2869 return -1;
2870 else if (amap->type > bmap->type)
2871 /* Ensure results do not depend on the host qsort for objects with
2872 multiple mapping symbols at the same address by sorting on type
2873 after vma. */
2874 return 1;
2875 else if (amap->type < bmap->type)
2876 return -1;
2877 else
2878 return 0;
2879}
2880
2881static _aarch64_elf_section_data *
2882elf_aarch64_section_data_get (asection *sec)
2883{
2884 _aarch64_elf_section_data *sec_data = elf_aarch64_section_data(sec);
2885
2886 /* A section that does not have aarch64 section data, so it does not have any
2887 map information. Assume A64. */
2888 if (sec_data == NULL || !sec_data->elf.is_target_section_data)
2889 return NULL;
2890
2891 if (sec_data->sorted)
2892 goto done;
2893
2894 qsort (sec_data->map, sec_data->mapcount, sizeof (elf_aarch64_section_map),
2895 elf_aarch64_compare_mapping);
2896
2897 sec_data->sorted = TRUE;
2898
2899done:
2900 return sec_data;
2901}
2902
2903/* Returns TRUE if the label with st_value as VALUE is within a C64 code
2904 section or not. */
2905
2906static bfd_boolean
2907c64_value_p (asection *section, unsigned int value)
2908{
2909 struct _aarch64_elf_section_data *sec_data =
2910 elf_aarch64_section_data_get (section);
2911
2912 if (sec_data == NULL)
2913 return FALSE;
2914
2915 unsigned int span;
2916
2917 for (span = 0; span < sec_data->mapcount; span++)
2918 {
2919 unsigned int span_start = sec_data->map[span].vma;
2920 unsigned int span_end = ((span == sec_data->mapcount - 1)
2921 ? sec_data->map[0].vma + section->size
2922 : sec_data->map[span + 1].vma);
2923 char span_type = sec_data->map[span].type;
2924
2925 if (span_start <= value && value < span_end && span_type == 'c')
2926 return TRUE;
2927 }
2928 return FALSE;
2929}
2930
4e8516b2
AP
2931/* The size of the thread control block which is defined to be two pointers. */
2932#define TCB_SIZE (ARCH_SIZE/8)*2
a06ea964
NC
2933
2934struct elf_aarch64_local_symbol
2935{
2936 unsigned int got_type;
2937 bfd_signed_vma got_refcount;
2938 bfd_vma got_offset;
2939
2940 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The
2941 offset is from the end of the jump table and reserved entries
2942 within the PLTGOT.
2943
2944 The magic value (bfd_vma) -1 indicates that an offset has not be
2945 allocated. */
2946 bfd_vma tlsdesc_got_jump_table_offset;
2947};
2948
2949struct elf_aarch64_obj_tdata
2950{
2951 struct elf_obj_tdata root;
2952
2953 /* local symbol descriptors */
2954 struct elf_aarch64_local_symbol *locals;
2955
2956 /* Zero to warn when linking objects with incompatible enum sizes. */
2957 int no_enum_size_warning;
2958
2959 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2960 int no_wchar_size_warning;
cd702818
SD
2961
2962 /* All GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. */
2963 uint32_t gnu_and_prop;
37c18eed
SD
2964
2965 /* Zero to warn when linking objects with incompatible
2966 GNU_PROPERTY_AARCH64_FEATURE_1_BTI. */
2967 int no_bti_warn;
2968
2969 /* PLT type based on security. */
2970 aarch64_plt_type plt_type;
f0070c1e
SP
2971
2972 /* Flag to check if section maps have been initialised for all sections in
2973 this object. */
2974 bfd_boolean secmaps_initialised;
a06ea964
NC
2975};
2976
2977#define elf_aarch64_tdata(bfd) \
2978 ((struct elf_aarch64_obj_tdata *) (bfd)->tdata.any)
2979
cec5225b 2980#define elf_aarch64_locals(bfd) (elf_aarch64_tdata (bfd)->locals)
a06ea964
NC
2981
2982#define is_aarch64_elf(bfd) \
2983 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2984 && elf_tdata (bfd) != NULL \
2985 && elf_object_id (bfd) == AARCH64_ELF_DATA)
2986
2987static bfd_boolean
cec5225b 2988elfNN_aarch64_mkobject (bfd *abfd)
a06ea964
NC
2989{
2990 return bfd_elf_allocate_object (abfd, sizeof (struct elf_aarch64_obj_tdata),
2991 AARCH64_ELF_DATA);
2992}
2993
cec5225b
YZ
2994#define elf_aarch64_hash_entry(ent) \
2995 ((struct elf_aarch64_link_hash_entry *)(ent))
a06ea964
NC
2996
2997#define GOT_UNKNOWN 0
2998#define GOT_NORMAL 1
2999#define GOT_TLS_GD 2
3000#define GOT_TLS_IE 4
3001#define GOT_TLSDESC_GD 8
a1bdea65 3002#define GOT_CAP 16
a06ea964
NC
3003
3004#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLSDESC_GD))
3005
3006/* AArch64 ELF linker hash entry. */
cec5225b 3007struct elf_aarch64_link_hash_entry
a06ea964
NC
3008{
3009 struct elf_link_hash_entry root;
3010
a06ea964
NC
3011 /* Since PLT entries have variable size, we need to record the
3012 index into .got.plt instead of recomputing it from the PLT
3013 offset. */
3014 bfd_signed_vma plt_got_offset;
3015
3016 /* Bit mask representing the type of GOT entry(s) if any required by
3017 this symbol. */
3018 unsigned int got_type;
3019
3020 /* A pointer to the most recently used stub hash entry against this
3021 symbol. */
cec5225b 3022 struct elf_aarch64_stub_hash_entry *stub_cache;
a06ea964
NC
3023
3024 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The offset
3025 is from the end of the jump table and reserved entries within the PLTGOT.
3026
3027 The magic value (bfd_vma) -1 indicates that an offset has not
3028 be allocated. */
3029 bfd_vma tlsdesc_got_jump_table_offset;
3030};
3031
3032static unsigned int
cec5225b 3033elfNN_aarch64_symbol_got_type (struct elf_link_hash_entry *h,
a06ea964
NC
3034 bfd *abfd,
3035 unsigned long r_symndx)
3036{
3037 if (h)
cec5225b 3038 return elf_aarch64_hash_entry (h)->got_type;
a06ea964 3039
cec5225b 3040 if (! elf_aarch64_locals (abfd))
a06ea964
NC
3041 return GOT_UNKNOWN;
3042
cec5225b 3043 return elf_aarch64_locals (abfd)[r_symndx].got_type;
a06ea964
NC
3044}
3045
a06ea964 3046/* Get the AArch64 elf linker hash table from a link_info structure. */
cec5225b
YZ
3047#define elf_aarch64_hash_table(info) \
3048 ((struct elf_aarch64_link_hash_table *) ((info)->hash))
a06ea964
NC
3049
3050#define aarch64_stub_hash_lookup(table, string, create, copy) \
cec5225b 3051 ((struct elf_aarch64_stub_hash_entry *) \
a06ea964
NC
3052 bfd_hash_lookup ((table), (string), (create), (copy)))
3053
3054/* AArch64 ELF linker hash table. */
cec5225b 3055struct elf_aarch64_link_hash_table
a06ea964
NC
3056{
3057 /* The main hash table. */
3058 struct elf_link_hash_table root;
3059
3060 /* Nonzero to force PIC branch veneers. */
3061 int pic_veneer;
3062
68fcca92
JW
3063 /* Fix erratum 835769. */
3064 int fix_erratum_835769;
3065
4106101c 3066 /* Fix erratum 843419. */
739b5c9c 3067 erratum_84319_opts fix_erratum_843419;
4106101c 3068
1f56df9d
JW
3069 /* Don't apply link-time values for dynamic relocations. */
3070 int no_apply_dynamic_relocs;
3071
a06ea964
NC
3072 /* The number of bytes in the initial entry in the PLT. */
3073 bfd_size_type plt_header_size;
3074
37c18eed
SD
3075 /* The bytes of the initial PLT entry. */
3076 const bfd_byte *plt0_entry;
3077
3078 /* The number of bytes in the subsequent PLT entries. */
a06ea964
NC
3079 bfd_size_type plt_entry_size;
3080
37c18eed
SD
3081 /* The bytes of the subsequent PLT entry. */
3082 const bfd_byte *plt_entry;
3083
a06ea964
NC
3084 /* For convenience in allocate_dynrelocs. */
3085 bfd *obfd;
3086
3087 /* The amount of space used by the reserved portion of the sgotplt
3088 section, plus whatever space is used by the jump slots. */
3089 bfd_vma sgotplt_jump_table_size;
3090
3091 /* The stub hash table. */
3092 struct bfd_hash_table stub_hash_table;
3093
3094 /* Linker stub bfd. */
3095 bfd *stub_bfd;
3096
3097 /* Linker call-backs. */
3098 asection *(*add_stub_section) (const char *, asection *);
3099 void (*layout_sections_again) (void);
3100
3101 /* Array to keep track of which stub sections have been created, and
3102 information on stub grouping. */
3103 struct map_stub
3104 {
3105 /* This is the section to which stubs in the group will be
3106 attached. */
3107 asection *link_sec;
3108 /* The stub section. */
3109 asection *stub_sec;
3110 } *stub_group;
3111
cec5225b 3112 /* Assorted information used by elfNN_aarch64_size_stubs. */
a06ea964 3113 unsigned int bfd_count;
7292b3ac 3114 unsigned int top_index;
a06ea964
NC
3115 asection **input_list;
3116
823710d5
SN
3117 /* JUMP_SLOT relocs for variant PCS symbols may be present. */
3118 int variant_pcs;
3119
37c18eed
SD
3120 /* The number of bytes in the PLT enty for the TLS descriptor. */
3121 bfd_size_type tlsdesc_plt_entry_size;
3122
1419bbe5
WN
3123 /* Used by local STT_GNU_IFUNC symbols. */
3124 htab_t loc_hash_table;
3125 void * loc_hash_memory;
40bbb79e
SP
3126
3127 /* Used for capability relocations. */
3128 asection *srelcaps;
a1bdea65 3129 int c64_rel;
7ff36d1a 3130 bfd_boolean c64_output;
a06ea964
NC
3131};
3132
a06ea964
NC
3133/* Create an entry in an AArch64 ELF linker hash table. */
3134
3135static struct bfd_hash_entry *
cec5225b 3136elfNN_aarch64_link_hash_newfunc (struct bfd_hash_entry *entry,
a06ea964
NC
3137 struct bfd_hash_table *table,
3138 const char *string)
3139{
cec5225b
YZ
3140 struct elf_aarch64_link_hash_entry *ret =
3141 (struct elf_aarch64_link_hash_entry *) entry;
a06ea964
NC
3142
3143 /* Allocate the structure if it has not already been allocated by a
3144 subclass. */
3145 if (ret == NULL)
3146 ret = bfd_hash_allocate (table,
cec5225b 3147 sizeof (struct elf_aarch64_link_hash_entry));
a06ea964
NC
3148 if (ret == NULL)
3149 return (struct bfd_hash_entry *) ret;
3150
3151 /* Call the allocation method of the superclass. */
cec5225b 3152 ret = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC
3153 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3154 table, string));
3155 if (ret != NULL)
3156 {
a06ea964
NC
3157 ret->got_type = GOT_UNKNOWN;
3158 ret->plt_got_offset = (bfd_vma) - 1;
3159 ret->stub_cache = NULL;
3160 ret->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
3161 }
3162
3163 return (struct bfd_hash_entry *) ret;
3164}
3165
3166/* Initialize an entry in the stub hash table. */
3167
3168static struct bfd_hash_entry *
3169stub_hash_newfunc (struct bfd_hash_entry *entry,
3170 struct bfd_hash_table *table, const char *string)
3171{
3172 /* Allocate the structure if it has not already been allocated by a
3173 subclass. */
3174 if (entry == NULL)
3175 {
3176 entry = bfd_hash_allocate (table,
3177 sizeof (struct
cec5225b 3178 elf_aarch64_stub_hash_entry));
a06ea964
NC
3179 if (entry == NULL)
3180 return entry;
3181 }
3182
3183 /* Call the allocation method of the superclass. */
3184 entry = bfd_hash_newfunc (entry, table, string);
3185 if (entry != NULL)
3186 {
cec5225b 3187 struct elf_aarch64_stub_hash_entry *eh;
a06ea964
NC
3188
3189 /* Initialize the local fields. */
cec5225b 3190 eh = (struct elf_aarch64_stub_hash_entry *) entry;
4106101c 3191 eh->adrp_offset = 0;
a06ea964
NC
3192 eh->stub_sec = NULL;
3193 eh->stub_offset = 0;
3194 eh->target_value = 0;
3195 eh->target_section = NULL;
3196 eh->stub_type = aarch64_stub_none;
3197 eh->h = NULL;
3198 eh->id_sec = NULL;
3199 }
3200
3201 return entry;
3202}
3203
1419bbe5
WN
3204/* Compute a hash of a local hash entry. We use elf_link_hash_entry
3205 for local symbol so that we can handle local STT_GNU_IFUNC symbols
3206 as global symbol. We reuse indx and dynstr_index for local symbol
3207 hash since they aren't used by global symbols in this backend. */
3208
3209static hashval_t
3210elfNN_aarch64_local_htab_hash (const void *ptr)
3211{
3212 struct elf_link_hash_entry *h
3213 = (struct elf_link_hash_entry *) ptr;
3214 return ELF_LOCAL_SYMBOL_HASH (h->indx, h->dynstr_index);
3215}
3216
3217/* Compare local hash entries. */
3218
3219static int
3220elfNN_aarch64_local_htab_eq (const void *ptr1, const void *ptr2)
3221{
3222 struct elf_link_hash_entry *h1
3223 = (struct elf_link_hash_entry *) ptr1;
3224 struct elf_link_hash_entry *h2
3225 = (struct elf_link_hash_entry *) ptr2;
3226
3227 return h1->indx == h2->indx && h1->dynstr_index == h2->dynstr_index;
3228}
3229
3230/* Find and/or create a hash entry for local symbol. */
3231
3232static struct elf_link_hash_entry *
3233elfNN_aarch64_get_local_sym_hash (struct elf_aarch64_link_hash_table *htab,
3234 bfd *abfd, const Elf_Internal_Rela *rel,
3235 bfd_boolean create)
3236{
3237 struct elf_aarch64_link_hash_entry e, *ret;
3238 asection *sec = abfd->sections;
3239 hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id,
3240 ELFNN_R_SYM (rel->r_info));
3241 void **slot;
3242
3243 e.root.indx = sec->id;
3244 e.root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3245 slot = htab_find_slot_with_hash (htab->loc_hash_table, &e, h,
3246 create ? INSERT : NO_INSERT);
3247
3248 if (!slot)
3249 return NULL;
3250
3251 if (*slot)
3252 {
3253 ret = (struct elf_aarch64_link_hash_entry *) *slot;
3254 return &ret->root;
3255 }
3256
3257 ret = (struct elf_aarch64_link_hash_entry *)
3258 objalloc_alloc ((struct objalloc *) htab->loc_hash_memory,
3259 sizeof (struct elf_aarch64_link_hash_entry));
3260 if (ret)
3261 {
3262 memset (ret, 0, sizeof (*ret));
3263 ret->root.indx = sec->id;
3264 ret->root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3265 ret->root.dynindx = -1;
3266 *slot = ret;
3267 }
3268 return &ret->root;
3269}
a06ea964
NC
3270
3271/* Copy the extra info we tack onto an elf_link_hash_entry. */
3272
3273static void
cec5225b 3274elfNN_aarch64_copy_indirect_symbol (struct bfd_link_info *info,
a06ea964
NC
3275 struct elf_link_hash_entry *dir,
3276 struct elf_link_hash_entry *ind)
3277{
cec5225b 3278 struct elf_aarch64_link_hash_entry *edir, *eind;
a06ea964 3279
cec5225b
YZ
3280 edir = (struct elf_aarch64_link_hash_entry *) dir;
3281 eind = (struct elf_aarch64_link_hash_entry *) ind;
a06ea964 3282
a06ea964
NC
3283 if (ind->root.type == bfd_link_hash_indirect)
3284 {
3285 /* Copy over PLT info. */
3286 if (dir->got.refcount <= 0)
3287 {
3288 edir->got_type = eind->got_type;
3289 eind->got_type = GOT_UNKNOWN;
3290 }
3291 }
3292
3293 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3294}
3295
823710d5
SN
3296/* Merge non-visibility st_other attributes. */
3297
3298static void
3299elfNN_aarch64_merge_symbol_attribute (struct elf_link_hash_entry *h,
3300 const Elf_Internal_Sym *isym,
3301 bfd_boolean definition ATTRIBUTE_UNUSED,
3302 bfd_boolean dynamic ATTRIBUTE_UNUSED)
3303{
3304 unsigned int isym_sto = isym->st_other & ~ELF_ST_VISIBILITY (-1);
3305 unsigned int h_sto = h->other & ~ELF_ST_VISIBILITY (-1);
3306
3307 if (isym_sto == h_sto)
3308 return;
3309
3310 if (isym_sto & ~STO_AARCH64_VARIANT_PCS)
3311 /* Not fatal, this callback cannot fail. */
3312 _bfd_error_handler (_("unknown attribute for symbol `%s': 0x%02x"),
3313 h->root.root.string, isym_sto);
3314
3315 /* Note: Ideally we would warn about any attribute mismatch, but
3316 this api does not allow that without substantial changes. */
3317 if (isym_sto & STO_AARCH64_VARIANT_PCS)
3318 h->other |= STO_AARCH64_VARIANT_PCS;
3319}
3320
68faa637
AM
3321/* Destroy an AArch64 elf linker hash table. */
3322
3323static void
d495ab0d 3324elfNN_aarch64_link_hash_table_free (bfd *obfd)
68faa637
AM
3325{
3326 struct elf_aarch64_link_hash_table *ret
d495ab0d 3327 = (struct elf_aarch64_link_hash_table *) obfd->link.hash;
68faa637
AM
3328
3329 if (ret->loc_hash_table)
3330 htab_delete (ret->loc_hash_table);
3331 if (ret->loc_hash_memory)
3332 objalloc_free ((struct objalloc *) ret->loc_hash_memory);
3333
3334 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3335 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM
3336}
3337
a06ea964
NC
3338/* Create an AArch64 elf linker hash table. */
3339
3340static struct bfd_link_hash_table *
cec5225b 3341elfNN_aarch64_link_hash_table_create (bfd *abfd)
a06ea964 3342{
cec5225b 3343 struct elf_aarch64_link_hash_table *ret;
986f0783 3344 size_t amt = sizeof (struct elf_aarch64_link_hash_table);
a06ea964 3345
7bf52ea2 3346 ret = bfd_zmalloc (amt);
a06ea964
NC
3347 if (ret == NULL)
3348 return NULL;
3349
3350 if (!_bfd_elf_link_hash_table_init
cec5225b
YZ
3351 (&ret->root, abfd, elfNN_aarch64_link_hash_newfunc,
3352 sizeof (struct elf_aarch64_link_hash_entry), AARCH64_ELF_DATA))
a06ea964
NC
3353 {
3354 free (ret);
3355 return NULL;
3356 }
3357
a06ea964 3358 ret->plt_header_size = PLT_ENTRY_SIZE;
37c18eed 3359 ret->plt0_entry = elfNN_aarch64_small_plt0_entry;
a06ea964 3360 ret->plt_entry_size = PLT_SMALL_ENTRY_SIZE;
37c18eed
SD
3361 ret->plt_entry = elfNN_aarch64_small_plt_entry;
3362 ret->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
a06ea964 3363 ret->obfd = abfd;
9bcc30e4 3364 ret->root.tlsdesc_got = (bfd_vma) - 1;
a06ea964
NC
3365
3366 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
cec5225b 3367 sizeof (struct elf_aarch64_stub_hash_entry)))
a06ea964 3368 {
d495ab0d 3369 _bfd_elf_link_hash_table_free (abfd);
a06ea964
NC
3370 return NULL;
3371 }
3372
1419bbe5
WN
3373 ret->loc_hash_table = htab_try_create (1024,
3374 elfNN_aarch64_local_htab_hash,
3375 elfNN_aarch64_local_htab_eq,
3376 NULL);
3377 ret->loc_hash_memory = objalloc_create ();
3378 if (!ret->loc_hash_table || !ret->loc_hash_memory)
3379 {
d495ab0d 3380 elfNN_aarch64_link_hash_table_free (abfd);
1419bbe5
WN
3381 return NULL;
3382 }
d495ab0d 3383 ret->root.root.hash_table_free = elfNN_aarch64_link_hash_table_free;
1419bbe5 3384
a06ea964
NC
3385 return &ret->root.root;
3386}
3387
1d75a8e2
NC
3388/* Perform relocation R_TYPE. Returns TRUE upon success, FALSE otherwise. */
3389
a06ea964
NC
3390static bfd_boolean
3391aarch64_relocate (unsigned int r_type, bfd *input_bfd, asection *input_section,
3392 bfd_vma offset, bfd_vma value)
3393{
3394 reloc_howto_type *howto;
3395 bfd_vma place;
3396
0aa13fee 3397 howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
a06ea964
NC
3398 place = (input_section->output_section->vma + input_section->output_offset
3399 + offset);
caed7120 3400
0aa13fee 3401 r_type = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
652afeef
TC
3402 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, r_type, place,
3403 value, 0, FALSE);
caed7120
YZ
3404 return _bfd_aarch64_elf_put_addend (input_bfd,
3405 input_section->contents + offset, r_type,
1d75a8e2 3406 howto, value) == bfd_reloc_ok;
a06ea964
NC
3407}
3408
50e192f0
SP
3409/* Return interworking stub for a relocation. */
3410
3411static enum elf_aarch64_stub_type
3412aarch64_interwork_stub (unsigned int r_type,
3413 bfd_boolean branch_to_c64)
3414{
3415 switch (r_type)
3416 {
3417 case MORELLO_R (JUMP26):
3418 case MORELLO_R (CALL26):
3419 if (!branch_to_c64)
3420 return c64_stub_branch_aarch64;
3421 break;
3422 case AARCH64_R (JUMP26):
3423 case AARCH64_R (CALL26):
3424 if (branch_to_c64)
3425 return aarch64_stub_branch_c64;
3426 break;
3427 default:
3428 break;
3429 }
3430
3431 return aarch64_stub_none;
3432}
3433
cec5225b 3434static enum elf_aarch64_stub_type
a06ea964
NC
3435aarch64_select_branch_stub (bfd_vma value, bfd_vma place)
3436{
3437 if (aarch64_valid_for_adrp_p (value, place))
3438 return aarch64_stub_adrp_branch;
3439 return aarch64_stub_long_branch;
3440}
3441
3442/* Determine the type of stub needed, if any, for a call. */
3443
cec5225b 3444static enum elf_aarch64_stub_type
9a228467 3445aarch64_type_of_stub (asection *input_sec,
a06ea964 3446 const Elf_Internal_Rela *rel,
f678ded7 3447 asection *sym_sec,
a06ea964 3448 unsigned char st_type,
a06ea964
NC
3449 bfd_vma destination)
3450{
3451 bfd_vma location;
3452 bfd_signed_vma branch_offset;
50e192f0 3453 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
cec5225b 3454 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
a06ea964 3455
f678ded7 3456 if (st_type != STT_FUNC
2f340668 3457 && (sym_sec == input_sec))
a06ea964
NC
3458 return stub_type;
3459
a06ea964
NC
3460 /* Determine where the call point is. */
3461 location = (input_sec->output_offset
3462 + input_sec->output_section->vma + rel->r_offset);
3463
3464 branch_offset = (bfd_signed_vma) (destination - location);
3465
50e192f0
SP
3466 /* For A64 <-> C64 branches we only come here for jumps to PLT. Treat them
3467 as regular branches and leave the interworking to PLT. */
3468 if (branch_offset > AARCH64_MAX_FWD_BRANCH_OFFSET
3469 || branch_offset < AARCH64_MAX_BWD_BRANCH_OFFSET)
a06ea964 3470 {
50e192f0
SP
3471 switch (r_type)
3472 {
3473 /* We don't want to redirect any old unconditional jump in this way,
3474 only one which is being used for a sibcall, where it is
3475 acceptable for the IP0 and IP1 registers to be clobbered. */
3476 case AARCH64_R (CALL26):
3477 case AARCH64_R (JUMP26):
3478 return aarch64_stub_long_branch;
3479 case MORELLO_R (CALL26):
3480 case MORELLO_R (JUMP26):
3481 return c64_stub_branch_c64;
3482 default:
3483 break;
3484 }
a06ea964
NC
3485 }
3486
50e192f0
SP
3487 return aarch64_stub_none;
3488}
3489
3490/* Return a string to add as suffix to a veneer name. */
3491
3492static const char *
3493aarch64_lookup_stub_type_suffix (enum elf_aarch64_stub_type stub_type)
3494{
3495 switch (stub_type)
3496 {
3497 case aarch64_stub_branch_c64:
3498 return "_a64c64";
3499 case c64_stub_branch_aarch64:
3500 return "_c64a64";
3501 break;
3502 default:
3503 return "";
3504 }
a06ea964
NC
3505}
3506
3507/* Build a name for an entry in the stub hash table. */
3508
3509static char *
cec5225b 3510elfNN_aarch64_stub_name (const asection *input_section,
a06ea964 3511 const asection *sym_sec,
cec5225b 3512 const struct elf_aarch64_link_hash_entry *hash,
50e192f0
SP
3513 const Elf_Internal_Rela *rel,
3514 enum elf_aarch64_stub_type stub_type)
a06ea964
NC
3515{
3516 char *stub_name;
3517 bfd_size_type len;
50e192f0 3518 const char *suffix = aarch64_lookup_stub_type_suffix (stub_type);;
a06ea964
NC
3519
3520 if (hash)
3521 {
3522 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 16 + 1;
3523 stub_name = bfd_malloc (len);
3524 if (stub_name != NULL)
50e192f0 3525 snprintf (stub_name, len, "%08x_%s%s+%" BFD_VMA_FMT "x",
a06ea964
NC
3526 (unsigned int) input_section->id,
3527 hash->root.root.root.string,
50e192f0 3528 suffix, rel->r_addend);
a06ea964
NC
3529 }
3530 else
3531 {
3532 len = 8 + 1 + 8 + 1 + 8 + 1 + 16 + 1;
3533 stub_name = bfd_malloc (len);
3534 if (stub_name != NULL)
50e192f0 3535 snprintf (stub_name, len, "%08x_%x:%x%s+%" BFD_VMA_FMT "x",
a06ea964
NC
3536 (unsigned int) input_section->id,
3537 (unsigned int) sym_sec->id,
cec5225b 3538 (unsigned int) ELFNN_R_SYM (rel->r_info),
50e192f0 3539 suffix, rel->r_addend);
a06ea964
NC
3540 }
3541
3542 return stub_name;
3543}
3544
7f784814
JW
3545/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For
3546 executable PLT slots where the executable never takes the address of those
3547 functions, the function symbols are not added to the hash table. */
3548
3549static bfd_boolean
3550elf_aarch64_hash_symbol (struct elf_link_hash_entry *h)
3551{
3552 if (h->plt.offset != (bfd_vma) -1
3553 && !h->def_regular
3554 && !h->pointer_equality_needed)
3555 return FALSE;
3556
3557 return _bfd_elf_hash_symbol (h);
3558}
3559
a06ea964
NC
3560/* Look up an entry in the stub hash. Stub entries are cached because
3561 creating the stub name takes a bit of time. */
3562
cec5225b
YZ
3563static struct elf_aarch64_stub_hash_entry *
3564elfNN_aarch64_get_stub_entry (const asection *input_section,
a06ea964
NC
3565 const asection *sym_sec,
3566 struct elf_link_hash_entry *hash,
3567 const Elf_Internal_Rela *rel,
50e192f0
SP
3568 struct elf_aarch64_link_hash_table *htab,
3569 enum elf_aarch64_stub_type stub_type)
a06ea964 3570{
cec5225b
YZ
3571 struct elf_aarch64_stub_hash_entry *stub_entry;
3572 struct elf_aarch64_link_hash_entry *h =
3573 (struct elf_aarch64_link_hash_entry *) hash;
a06ea964
NC
3574 const asection *id_sec;
3575
3576 if ((input_section->flags & SEC_CODE) == 0)
3577 return NULL;
3578
3579 /* If this input section is part of a group of sections sharing one
3580 stub section, then use the id of the first section in the group.
3581 Stub names need to include a section id, as there may well be
3582 more than one stub used to reach say, printf, and we need to
3583 distinguish between them. */
3584 id_sec = htab->stub_group[input_section->id].link_sec;
3585
3586 if (h != NULL && h->stub_cache != NULL
3587 && h->stub_cache->h == h && h->stub_cache->id_sec == id_sec)
3588 {
3589 stub_entry = h->stub_cache;
3590 }
3591 else
3592 {
3593 char *stub_name;
3594
50e192f0 3595 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, h, rel, stub_type);
a06ea964
NC
3596 if (stub_name == NULL)
3597 return NULL;
3598
3599 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table,
3600 stub_name, FALSE, FALSE);
3601 if (h != NULL)
3602 h->stub_cache = stub_entry;
3603
3604 free (stub_name);
3605 }
3606
3607 return stub_entry;
3608}
3609
a06ea964 3610
66585675
MS
3611/* Create a stub section. */
3612
3613static asection *
3614_bfd_aarch64_create_stub_section (asection *section,
3615 struct elf_aarch64_link_hash_table *htab)
3616{
3617 size_t namelen;
3618 bfd_size_type len;
3619 char *s_name;
3620
3621 namelen = strlen (section->name);
3622 len = namelen + sizeof (STUB_SUFFIX);
3623 s_name = bfd_alloc (htab->stub_bfd, len);
3624 if (s_name == NULL)
3625 return NULL;
3626
3627 memcpy (s_name, section->name, namelen);
3628 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3629 return (*htab->add_stub_section) (s_name, section);
3630}
3631
3632
fc6d53be
MS
3633/* Find or create a stub section for a link section.
3634
3635 Fix or create the stub section used to collect stubs attached to
3636 the specified link section. */
3637
3638static asection *
3639_bfd_aarch64_get_stub_for_link_section (asection *link_section,
3640 struct elf_aarch64_link_hash_table *htab)
3641{
3642 if (htab->stub_group[link_section->id].stub_sec == NULL)
3643 htab->stub_group[link_section->id].stub_sec
3644 = _bfd_aarch64_create_stub_section (link_section, htab);
3645 return htab->stub_group[link_section->id].stub_sec;
3646}
3647
3648
ef857521
MS
3649/* Find or create a stub section in the stub group for an input
3650 section. */
3651
3652static asection *
3653_bfd_aarch64_create_or_find_stub_sec (asection *section,
3654 struct elf_aarch64_link_hash_table *htab)
a06ea964 3655{
fc6d53be
MS
3656 asection *link_sec = htab->stub_group[section->id].link_sec;
3657 return _bfd_aarch64_get_stub_for_link_section (link_sec, htab);
ef857521
MS
3658}
3659
3660
3661/* Add a new stub entry in the stub group associated with an input
3662 section to the stub hash. Not all fields of the new stub entry are
3663 initialised. */
3664
3665static struct elf_aarch64_stub_hash_entry *
3666_bfd_aarch64_add_stub_entry_in_group (const char *stub_name,
3667 asection *section,
3668 struct elf_aarch64_link_hash_table *htab)
3669{
3670 asection *link_sec;
3671 asection *stub_sec;
3672 struct elf_aarch64_stub_hash_entry *stub_entry;
3673
3674 link_sec = htab->stub_group[section->id].link_sec;
3675 stub_sec = _bfd_aarch64_create_or_find_stub_sec (section, htab);
3676
a06ea964
NC
3677 /* Enter this entry into the linker stub hash table. */
3678 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3679 TRUE, FALSE);
3680 if (stub_entry == NULL)
3681 {
695344c0 3682 /* xgettext:c-format */
871b3ab2 3683 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4eca0228 3684 section->owner, stub_name);
a06ea964
NC
3685 return NULL;
3686 }
3687
3688 stub_entry->stub_sec = stub_sec;
3689 stub_entry->stub_offset = 0;
3690 stub_entry->id_sec = link_sec;
3691
3692 return stub_entry;
3693}
3694
4106101c
MS
3695/* Add a new stub entry in the final stub section to the stub hash.
3696 Not all fields of the new stub entry are initialised. */
3697
3698static struct elf_aarch64_stub_hash_entry *
3699_bfd_aarch64_add_stub_entry_after (const char *stub_name,
3700 asection *link_section,
3701 struct elf_aarch64_link_hash_table *htab)
3702{
3703 asection *stub_sec;
3704 struct elf_aarch64_stub_hash_entry *stub_entry;
3705
739b5c9c
TC
3706 stub_sec = NULL;
3707 /* Only create the actual stub if we will end up needing it. */
3708 if (htab->fix_erratum_843419 & ERRAT_ADRP)
3709 stub_sec = _bfd_aarch64_get_stub_for_link_section (link_section, htab);
4106101c
MS
3710 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3711 TRUE, FALSE);
3712 if (stub_entry == NULL)
3713 {
4eca0228 3714 _bfd_error_handler (_("cannot create stub entry %s"), stub_name);
4106101c
MS
3715 return NULL;
3716 }
3717
3718 stub_entry->stub_sec = stub_sec;
3719 stub_entry->stub_offset = 0;
3720 stub_entry->id_sec = link_section;
3721
3722 return stub_entry;
3723}
3724
3725
a06ea964
NC
3726static bfd_boolean
3727aarch64_build_one_stub (struct bfd_hash_entry *gen_entry,
abf874aa 3728 void *in_arg)
a06ea964 3729{
cec5225b 3730 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC
3731 asection *stub_sec;
3732 bfd *stub_bfd;
3733 bfd_byte *loc;
3734 bfd_vma sym_value;
68fcca92
JW
3735 bfd_vma veneered_insn_loc;
3736 bfd_vma veneer_entry_loc;
3737 bfd_signed_vma branch_offset = 0;
a06ea964
NC
3738 unsigned int template_size;
3739 const uint32_t *template;
3740 unsigned int i;
abf874aa 3741 struct bfd_link_info *info;
a06ea964
NC
3742
3743 /* Massage our args to the form they really have. */
cec5225b 3744 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964 3745
abf874aa
CL
3746 info = (struct bfd_link_info *) in_arg;
3747
3748 /* Fail if the target section could not be assigned to an output
3749 section. The user should fix his linker script. */
3750 if (stub_entry->target_section->output_section == NULL
3751 && info->non_contiguous_regions)
53215f21
CL
3752 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
3753 "Retry without "
3754 "--enable-non-contiguous-regions.\n"),
3755 stub_entry->target_section);
abf874aa 3756
a06ea964
NC
3757 stub_sec = stub_entry->stub_sec;
3758
3759 /* Make a note of the offset within the stubs for this entry. */
3760 stub_entry->stub_offset = stub_sec->size;
3761 loc = stub_sec->contents + stub_entry->stub_offset;
3762
3763 stub_bfd = stub_sec->owner;
3764
3765 /* This is the address of the stub destination. */
3766 sym_value = (stub_entry->target_value
3767 + stub_entry->target_section->output_offset
3768 + stub_entry->target_section->output_section->vma);
3769
50e192f0
SP
3770 bfd_vma place = (stub_entry->stub_offset + stub_sec->output_section->vma
3771 + stub_sec->output_offset);
3772
a06ea964
NC
3773 if (stub_entry->stub_type == aarch64_stub_long_branch)
3774 {
a06ea964
NC
3775 /* See if we can relax the stub. */
3776 if (aarch64_valid_for_adrp_p (sym_value, place))
3777 stub_entry->stub_type = aarch64_select_branch_stub (sym_value, place);
3778 }
3779
50e192f0
SP
3780 if ((stub_entry->stub_type == aarch64_stub_branch_c64
3781 || stub_entry->stub_type == c64_stub_branch_aarch64
3782 || stub_entry->stub_type == c64_stub_branch_c64)
3783 && !c64_valid_for_adrp_p (sym_value, place))
3784 {
3785 _bfd_error_handler
3786 (_("%s: stub target out of range for %s branch"),
3787 stub_entry->output_name,
3788 (stub_entry->stub_type == aarch64_stub_branch_c64
3789 ? "A64 to C64" : "C64 to A64"));
3790 bfd_set_error (bfd_error_bad_value);
3791 return FALSE;
3792 }
3793
a06ea964
NC
3794 switch (stub_entry->stub_type)
3795 {
3796 case aarch64_stub_adrp_branch:
3797 template = aarch64_adrp_branch_stub;
3798 template_size = sizeof (aarch64_adrp_branch_stub);
3799 break;
3800 case aarch64_stub_long_branch:
3801 template = aarch64_long_branch_stub;
3802 template_size = sizeof (aarch64_long_branch_stub);
3803 break;
68fcca92
JW
3804 case aarch64_stub_erratum_835769_veneer:
3805 template = aarch64_erratum_835769_stub;
3806 template_size = sizeof (aarch64_erratum_835769_stub);
3807 break;
4106101c
MS
3808 case aarch64_stub_erratum_843419_veneer:
3809 template = aarch64_erratum_843419_stub;
3810 template_size = sizeof (aarch64_erratum_843419_stub);
3811 break;
50e192f0
SP
3812 case aarch64_stub_branch_c64:
3813 template = aarch64_c64_branch_stub;
3814 template_size = sizeof (aarch64_c64_branch_stub);
3815 break;
3816 case c64_stub_branch_aarch64:
3817 case c64_stub_branch_c64:
3818 template = c64_aarch64_branch_stub;
3819 template_size = sizeof (c64_aarch64_branch_stub);
3820 break;
a06ea964 3821 default:
8e2fe09f 3822 abort ();
a06ea964
NC
3823 }
3824
3825 for (i = 0; i < (template_size / sizeof template[0]); i++)
3826 {
3827 bfd_putl32 (template[i], loc);
3828 loc += 4;
3829 }
3830
3831 template_size = (template_size + 7) & ~7;
3832 stub_sec->size += template_size;
3833
50e192f0
SP
3834 bfd_vma stub_offset = stub_entry->stub_offset;
3835
a06ea964
NC
3836 switch (stub_entry->stub_type)
3837 {
3838 case aarch64_stub_adrp_branch:
1d75a8e2
NC
3839 if (!aarch64_relocate (AARCH64_R (ADR_PREL_PG_HI21), stub_bfd, stub_sec,
3840 stub_entry->stub_offset, sym_value))
a06ea964
NC
3841 /* The stub would not have been relaxed if the offset was out
3842 of range. */
3843 BFD_FAIL ();
3844
1d75a8e2
NC
3845 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
3846 stub_entry->stub_offset + 4, sym_value))
93ca8569 3847 BFD_FAIL ();
a06ea964
NC
3848 break;
3849
3850 case aarch64_stub_long_branch:
3851 /* We want the value relative to the address 12 bytes back from the
07d6d2b8 3852 value itself. */
1d75a8e2
NC
3853 if (!aarch64_relocate (AARCH64_R (PRELNN), stub_bfd, stub_sec,
3854 stub_entry->stub_offset + 16, sym_value + 12))
93ca8569 3855 BFD_FAIL ();
a06ea964 3856 break;
68fcca92
JW
3857
3858 case aarch64_stub_erratum_835769_veneer:
3859 veneered_insn_loc = stub_entry->target_section->output_section->vma
3860 + stub_entry->target_section->output_offset
3861 + stub_entry->target_value;
3862 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
3863 + stub_entry->stub_sec->output_offset
3864 + stub_entry->stub_offset;
3865 branch_offset = veneered_insn_loc - veneer_entry_loc;
3866 branch_offset >>= 2;
3867 branch_offset &= 0x3ffffff;
3868 bfd_putl32 (stub_entry->veneered_insn,
3869 stub_sec->contents + stub_entry->stub_offset);
3870 bfd_putl32 (template[1] | branch_offset,
3871 stub_sec->contents + stub_entry->stub_offset + 4);
3872 break;
3873
4106101c 3874 case aarch64_stub_erratum_843419_veneer:
1d75a8e2
NC
3875 if (!aarch64_relocate (AARCH64_R (JUMP26), stub_bfd, stub_sec,
3876 stub_entry->stub_offset + 4, sym_value + 4))
4106101c
MS
3877 BFD_FAIL ();
3878 break;
3879
50e192f0
SP
3880 case aarch64_stub_branch_c64:
3881 stub_offset += 4;
3882 /* Fall through. */
3883 case c64_stub_branch_aarch64:
3884 case c64_stub_branch_c64:
3885 if (!aarch64_relocate (R_MORELLO_ADR_PREL_PG_HI20, stub_bfd, stub_sec,
3886 stub_offset, sym_value))
3887 /* We fail early if offset is out of range. */
3888 BFD_FAIL ();
3889
3890 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
3891 stub_offset + 4, sym_value))
3892 BFD_FAIL ();
3893 break;
3894
a06ea964 3895 default:
8e2fe09f 3896 abort ();
a06ea964
NC
3897 }
3898
3899 return TRUE;
3900}
3901
3902/* As above, but don't actually build the stub. Just bump offset so
3903 we know stub section sizes. */
3904
3905static bfd_boolean
739b5c9c 3906aarch64_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
a06ea964 3907{
cec5225b 3908 struct elf_aarch64_stub_hash_entry *stub_entry;
739b5c9c 3909 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC
3910 int size;
3911
3912 /* Massage our args to the form they really have. */
cec5225b 3913 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
739b5c9c 3914 htab = (struct elf_aarch64_link_hash_table *) in_arg;
a06ea964
NC
3915
3916 switch (stub_entry->stub_type)
3917 {
3918 case aarch64_stub_adrp_branch:
3919 size = sizeof (aarch64_adrp_branch_stub);
3920 break;
3921 case aarch64_stub_long_branch:
3922 size = sizeof (aarch64_long_branch_stub);
3923 break;
68fcca92
JW
3924 case aarch64_stub_erratum_835769_veneer:
3925 size = sizeof (aarch64_erratum_835769_stub);
3926 break;
4106101c 3927 case aarch64_stub_erratum_843419_veneer:
739b5c9c
TC
3928 {
3929 if (htab->fix_erratum_843419 == ERRAT_ADR)
3930 return TRUE;
3931 size = sizeof (aarch64_erratum_843419_stub);
3932 }
4106101c 3933 break;
50e192f0
SP
3934 case aarch64_stub_branch_c64:
3935 size = sizeof (aarch64_c64_branch_stub);
3936 break;
3937 case c64_stub_branch_aarch64:
3938 case c64_stub_branch_c64:
3939 size = sizeof (c64_aarch64_branch_stub);
3940 break;
a06ea964 3941 default:
8e2fe09f 3942 abort ();
a06ea964
NC
3943 }
3944
3945 size = (size + 7) & ~7;
3946 stub_entry->stub_sec->size += size;
3947 return TRUE;
3948}
3949
3950/* External entry points for sizing and building linker stubs. */
3951
3952/* Set up various things so that we can make a list of input sections
3953 for each output section included in the link. Returns -1 on error,
3954 0 when no stubs will be needed, and 1 on success. */
3955
3956int
cec5225b 3957elfNN_aarch64_setup_section_lists (bfd *output_bfd,
a06ea964
NC
3958 struct bfd_link_info *info)
3959{
3960 bfd *input_bfd;
3961 unsigned int bfd_count;
7292b3ac 3962 unsigned int top_id, top_index;
a06ea964
NC
3963 asection *section;
3964 asection **input_list, **list;
986f0783 3965 size_t amt;
cec5225b
YZ
3966 struct elf_aarch64_link_hash_table *htab =
3967 elf_aarch64_hash_table (info);
a06ea964
NC
3968
3969 if (!is_elf_hash_table (htab))
3970 return 0;
3971
3972 /* Count the number of input BFDs and find the top input section id. */
3973 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
c72f2fb2 3974 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC
3975 {
3976 bfd_count += 1;
3977 for (section = input_bfd->sections;
3978 section != NULL; section = section->next)
3979 {
3980 if (top_id < section->id)
3981 top_id = section->id;
3982 }
3983 }
3984 htab->bfd_count = bfd_count;
3985
3986 amt = sizeof (struct map_stub) * (top_id + 1);
3987 htab->stub_group = bfd_zmalloc (amt);
3988 if (htab->stub_group == NULL)
3989 return -1;
3990
3991 /* We can't use output_bfd->section_count here to find the top output
3992 section index as some sections may have been removed, and
3993 _bfd_strip_section_from_output doesn't renumber the indices. */
3994 for (section = output_bfd->sections, top_index = 0;
3995 section != NULL; section = section->next)
3996 {
3997 if (top_index < section->index)
3998 top_index = section->index;
3999 }
4000
4001 htab->top_index = top_index;
4002 amt = sizeof (asection *) * (top_index + 1);
4003 input_list = bfd_malloc (amt);
4004 htab->input_list = input_list;
4005 if (input_list == NULL)
4006 return -1;
4007
4008 /* For sections we aren't interested in, mark their entries with a
4009 value we can check later. */
4010 list = input_list + top_index;
4011 do
4012 *list = bfd_abs_section_ptr;
4013 while (list-- != input_list);
4014
4015 for (section = output_bfd->sections;
4016 section != NULL; section = section->next)
4017 {
4018 if ((section->flags & SEC_CODE) != 0)
4019 input_list[section->index] = NULL;
4020 }
4021
4022 return 1;
4023}
4024
cec5225b 4025/* Used by elfNN_aarch64_next_input_section and group_sections. */
a06ea964
NC
4026#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4027
4028/* The linker repeatedly calls this function for each input section,
4029 in the order that input sections are linked into output sections.
4030 Build lists of input sections to determine groupings between which
4031 we may insert linker stubs. */
4032
4033void
cec5225b 4034elfNN_aarch64_next_input_section (struct bfd_link_info *info, asection *isec)
a06ea964 4035{
cec5225b
YZ
4036 struct elf_aarch64_link_hash_table *htab =
4037 elf_aarch64_hash_table (info);
a06ea964
NC
4038
4039 if (isec->output_section->index <= htab->top_index)
4040 {
4041 asection **list = htab->input_list + isec->output_section->index;
4042
cff69cf4 4043 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
a06ea964
NC
4044 {
4045 /* Steal the link_sec pointer for our list. */
4046 /* This happens to make the list in reverse order,
4047 which is what we want. */
4048 PREV_SEC (isec) = *list;
4049 *list = isec;
4050 }
4051 }
4052}
4053
4054/* See whether we can group stub sections together. Grouping stub
4055 sections may result in fewer stubs. More importantly, we need to
4056 put all .init* and .fini* stubs at the beginning of the .init or
4057 .fini output sections respectively, because glibc splits the
4058 _init and _fini functions into multiple parts. Putting a stub in
4059 the middle of a function is not a good idea. */
4060
4061static void
cec5225b 4062group_sections (struct elf_aarch64_link_hash_table *htab,
a06ea964 4063 bfd_size_type stub_group_size,
cff69cf4 4064 bfd_boolean stubs_always_after_branch)
a06ea964 4065{
cff69cf4 4066 asection **list = htab->input_list;
a06ea964
NC
4067
4068 do
4069 {
4070 asection *tail = *list;
cff69cf4 4071 asection *head;
a06ea964
NC
4072
4073 if (tail == bfd_abs_section_ptr)
4074 continue;
4075
cff69cf4
WD
4076 /* Reverse the list: we must avoid placing stubs at the
4077 beginning of the section because the beginning of the text
4078 section may be required for an interrupt vector in bare metal
4079 code. */
4080#define NEXT_SEC PREV_SEC
4081 head = NULL;
a06ea964 4082 while (tail != NULL)
cff69cf4
WD
4083 {
4084 /* Pop from tail. */
4085 asection *item = tail;
4086 tail = PREV_SEC (item);
4087
4088 /* Push on head. */
4089 NEXT_SEC (item) = head;
4090 head = item;
4091 }
4092
4093 while (head != NULL)
a06ea964
NC
4094 {
4095 asection *curr;
cff69cf4
WD
4096 asection *next;
4097 bfd_vma stub_group_start = head->output_offset;
4098 bfd_vma end_of_next;
a06ea964 4099
cff69cf4
WD
4100 curr = head;
4101 while (NEXT_SEC (curr) != NULL)
4102 {
4103 next = NEXT_SEC (curr);
4104 end_of_next = next->output_offset + next->size;
4105 if (end_of_next - stub_group_start >= stub_group_size)
4106 /* End of NEXT is too far from start, so stop. */
4107 break;
4108 /* Add NEXT to the group. */
4109 curr = next;
4110 }
a06ea964 4111
cff69cf4 4112 /* OK, the size from the start to the start of CURR is less
a06ea964 4113 than stub_group_size and thus can be handled by one stub
cff69cf4 4114 section. (Or the head section is itself larger than
a06ea964
NC
4115 stub_group_size, in which case we may be toast.)
4116 We should really be keeping track of the total size of
4117 stubs added here, as stubs contribute to the final output
4118 section size. */
4119 do
4120 {
cff69cf4 4121 next = NEXT_SEC (head);
a06ea964 4122 /* Set up this stub group. */
cff69cf4 4123 htab->stub_group[head->id].link_sec = curr;
a06ea964 4124 }
cff69cf4 4125 while (head != curr && (head = next) != NULL);
a06ea964
NC
4126
4127 /* But wait, there's more! Input sections up to stub_group_size
cff69cf4
WD
4128 bytes after the stub section can be handled by it too. */
4129 if (!stubs_always_after_branch)
a06ea964 4130 {
cff69cf4
WD
4131 stub_group_start = curr->output_offset + curr->size;
4132
4133 while (next != NULL)
a06ea964 4134 {
cff69cf4
WD
4135 end_of_next = next->output_offset + next->size;
4136 if (end_of_next - stub_group_start >= stub_group_size)
4137 /* End of NEXT is too far from stubs, so stop. */
4138 break;
4139 /* Add NEXT to the stub group. */
4140 head = next;
4141 next = NEXT_SEC (head);
4142 htab->stub_group[head->id].link_sec = curr;
a06ea964
NC
4143 }
4144 }
cff69cf4 4145 head = next;
a06ea964
NC
4146 }
4147 }
cff69cf4 4148 while (list++ != htab->input_list + htab->top_index);
a06ea964
NC
4149
4150 free (htab->input_list);
4151}
4152
cff69cf4 4153#undef PREV_SEC
a06ea964
NC
4154#undef PREV_SEC
4155
68fcca92
JW
4156#define AARCH64_BITS(x, pos, n) (((x) >> (pos)) & ((1 << (n)) - 1))
4157
4158#define AARCH64_RT(insn) AARCH64_BITS (insn, 0, 5)
4159#define AARCH64_RT2(insn) AARCH64_BITS (insn, 10, 5)
4160#define AARCH64_RA(insn) AARCH64_BITS (insn, 10, 5)
4161#define AARCH64_RD(insn) AARCH64_BITS (insn, 0, 5)
4162#define AARCH64_RN(insn) AARCH64_BITS (insn, 5, 5)
4163#define AARCH64_RM(insn) AARCH64_BITS (insn, 16, 5)
4164
4165#define AARCH64_MAC(insn) (((insn) & 0xff000000) == 0x9b000000)
4166#define AARCH64_BIT(insn, n) AARCH64_BITS (insn, n, 1)
4167#define AARCH64_OP31(insn) AARCH64_BITS (insn, 21, 3)
4168#define AARCH64_ZR 0x1f
4169
4170/* All ld/st ops. See C4-182 of the ARM ARM. The encoding space for
4171 LD_PCREL, LDST_RO, LDST_UI and LDST_UIMM cover prefetch ops. */
4172
4173#define AARCH64_LD(insn) (AARCH64_BIT (insn, 22) == 1)
4174#define AARCH64_LDST(insn) (((insn) & 0x0a000000) == 0x08000000)
4175#define AARCH64_LDST_EX(insn) (((insn) & 0x3f000000) == 0x08000000)
4176#define AARCH64_LDST_PCREL(insn) (((insn) & 0x3b000000) == 0x18000000)
4177#define AARCH64_LDST_NAP(insn) (((insn) & 0x3b800000) == 0x28000000)
4178#define AARCH64_LDSTP_PI(insn) (((insn) & 0x3b800000) == 0x28800000)
4179#define AARCH64_LDSTP_O(insn) (((insn) & 0x3b800000) == 0x29000000)
4180#define AARCH64_LDSTP_PRE(insn) (((insn) & 0x3b800000) == 0x29800000)
4181#define AARCH64_LDST_UI(insn) (((insn) & 0x3b200c00) == 0x38000000)
4182#define AARCH64_LDST_PIIMM(insn) (((insn) & 0x3b200c00) == 0x38000400)
4183#define AARCH64_LDST_U(insn) (((insn) & 0x3b200c00) == 0x38000800)
4184#define AARCH64_LDST_PREIMM(insn) (((insn) & 0x3b200c00) == 0x38000c00)
4185#define AARCH64_LDST_RO(insn) (((insn) & 0x3b200c00) == 0x38200800)
4186#define AARCH64_LDST_UIMM(insn) (((insn) & 0x3b000000) == 0x39000000)
4187#define AARCH64_LDST_SIMD_M(insn) (((insn) & 0xbfbf0000) == 0x0c000000)
4188#define AARCH64_LDST_SIMD_M_PI(insn) (((insn) & 0xbfa00000) == 0x0c800000)
4189#define AARCH64_LDST_SIMD_S(insn) (((insn) & 0xbf9f0000) == 0x0d000000)
4190#define AARCH64_LDST_SIMD_S_PI(insn) (((insn) & 0xbf800000) == 0x0d800000)
4191
3d14faea
MS
4192/* Classify an INSN if it is indeed a load/store.
4193
4194 Return TRUE if INSN is a LD/ST instruction otherwise return FALSE.
4195
4196 For scalar LD/ST instructions PAIR is FALSE, RT is returned and RT2
4197 is set equal to RT.
4198
2d0ca824 4199 For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned. */
68fcca92
JW
4200
4201static bfd_boolean
3d14faea 4202aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
68fcca92
JW
4203 bfd_boolean *pair, bfd_boolean *load)
4204{
4205 uint32_t opcode;
4206 unsigned int r;
4207 uint32_t opc = 0;
4208 uint32_t v = 0;
4209 uint32_t opc_v = 0;
4210
de194d85 4211 /* Bail out quickly if INSN doesn't fall into the load-store
68fcca92
JW
4212 encoding space. */
4213 if (!AARCH64_LDST (insn))
4214 return FALSE;
4215
4216 *pair = FALSE;
4217 *load = FALSE;
4218 if (AARCH64_LDST_EX (insn))
4219 {
4220 *rt = AARCH64_RT (insn);
3d14faea 4221 *rt2 = *rt;
68fcca92 4222 if (AARCH64_BIT (insn, 21) == 1)
07d6d2b8 4223 {
68fcca92 4224 *pair = TRUE;
3d14faea 4225 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW
4226 }
4227 *load = AARCH64_LD (insn);
4228 return TRUE;
4229 }
4230 else if (AARCH64_LDST_NAP (insn)
4231 || AARCH64_LDSTP_PI (insn)
4232 || AARCH64_LDSTP_O (insn)
4233 || AARCH64_LDSTP_PRE (insn))
4234 {
4235 *pair = TRUE;
4236 *rt = AARCH64_RT (insn);
3d14faea 4237 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW
4238 *load = AARCH64_LD (insn);
4239 return TRUE;
4240 }
4241 else if (AARCH64_LDST_PCREL (insn)
4242 || AARCH64_LDST_UI (insn)
4243 || AARCH64_LDST_PIIMM (insn)
4244 || AARCH64_LDST_U (insn)
4245 || AARCH64_LDST_PREIMM (insn)
4246 || AARCH64_LDST_RO (insn)
4247 || AARCH64_LDST_UIMM (insn))
4248 {
4249 *rt = AARCH64_RT (insn);
3d14faea 4250 *rt2 = *rt;
68fcca92
JW
4251 if (AARCH64_LDST_PCREL (insn))
4252 *load = TRUE;
4253 opc = AARCH64_BITS (insn, 22, 2);
4254 v = AARCH64_BIT (insn, 26);
4255 opc_v = opc | (v << 2);
4256 *load = (opc_v == 1 || opc_v == 2 || opc_v == 3
4257 || opc_v == 5 || opc_v == 7);
4258 return TRUE;
4259 }
4260 else if (AARCH64_LDST_SIMD_M (insn)
4261 || AARCH64_LDST_SIMD_M_PI (insn))
4262 {
4263 *rt = AARCH64_RT (insn);
4264 *load = AARCH64_BIT (insn, 22);
4265 opcode = (insn >> 12) & 0xf;
4266 switch (opcode)
4267 {
4268 case 0:
4269 case 2:
3d14faea 4270 *rt2 = *rt + 3;
68fcca92
JW
4271 break;
4272
4273 case 4:
4274 case 6:
3d14faea 4275 *rt2 = *rt + 2;
68fcca92
JW
4276 break;
4277
4278 case 7:
3d14faea 4279 *rt2 = *rt;
68fcca92
JW
4280 break;
4281
4282 case 8:
4283 case 10:
3d14faea 4284 *rt2 = *rt + 1;
68fcca92
JW
4285 break;
4286
4287 default:
4288 return FALSE;
4289 }
4290 return TRUE;
4291 }
4292 else if (AARCH64_LDST_SIMD_S (insn)
4293 || AARCH64_LDST_SIMD_S_PI (insn))
4294 {
4295 *rt = AARCH64_RT (insn);
4296 r = (insn >> 21) & 1;
4297 *load = AARCH64_BIT (insn, 22);
4298 opcode = (insn >> 13) & 0x7;
4299 switch (opcode)
4300 {
4301 case 0:
4302 case 2:
4303 case 4:
3d14faea 4304 *rt2 = *rt + r;
68fcca92
JW
4305 break;
4306
4307 case 1:
4308 case 3:
4309 case 5:
3d14faea 4310 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW
4311 break;
4312
4313 case 6:
3d14faea 4314 *rt2 = *rt + r;
68fcca92
JW
4315 break;
4316
4317 case 7:
3d14faea 4318 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW
4319 break;
4320
4321 default:
4322 return FALSE;
4323 }
4324 return TRUE;
4325 }
4326
4327 return FALSE;
4328}
4329
4330/* Return TRUE if INSN is multiply-accumulate. */
4331
4332static bfd_boolean
4333aarch64_mlxl_p (uint32_t insn)
4334{
4335 uint32_t op31 = AARCH64_OP31 (insn);
4336
4337 if (AARCH64_MAC (insn)
4338 && (op31 == 0 || op31 == 1 || op31 == 5)
4339 /* Exclude MUL instructions which are encoded as a multiple accumulate
4340 with RA = XZR. */
4341 && AARCH64_RA (insn) != AARCH64_ZR)
4342 return TRUE;
4343
4344 return FALSE;
4345}
4346
4347/* Some early revisions of the Cortex-A53 have an erratum (835769) whereby
4348 it is possible for a 64-bit multiply-accumulate instruction to generate an
4349 incorrect result. The details are quite complex and hard to
4350 determine statically, since branches in the code may exist in some
4351 circumstances, but all cases end with a memory (load, store, or
4352 prefetch) instruction followed immediately by the multiply-accumulate
4353 operation. We employ a linker patching technique, by moving the potentially
4354 affected multiply-accumulate instruction into a patch region and replacing
4355 the original instruction with a branch to the patch. This function checks
4356 if INSN_1 is the memory operation followed by a multiply-accumulate
4357 operation (INSN_2). Return TRUE if an erratum sequence is found, FALSE
4358 if INSN_1 and INSN_2 are safe. */
4359
4360static bfd_boolean
4361aarch64_erratum_sequence (uint32_t insn_1, uint32_t insn_2)
4362{
4363 uint32_t rt;
3d14faea 4364 uint32_t rt2;
68fcca92
JW
4365 uint32_t rn;
4366 uint32_t rm;
4367 uint32_t ra;
4368 bfd_boolean pair;
4369 bfd_boolean load;
4370
4371 if (aarch64_mlxl_p (insn_2)
3d14faea 4372 && aarch64_mem_op_p (insn_1, &rt, &rt2, &pair, &load))
68fcca92
JW
4373 {
4374 /* Any SIMD memory op is independent of the subsequent MLA
4375 by definition of the erratum. */
4376 if (AARCH64_BIT (insn_1, 26))
4377 return TRUE;
4378
4379 /* If not SIMD, check for integer memory ops and MLA relationship. */
4380 rn = AARCH64_RN (insn_2);
4381 ra = AARCH64_RA (insn_2);
4382 rm = AARCH64_RM (insn_2);
4383
4384 /* If this is a load and there's a true(RAW) dependency, we are safe
4385 and this is not an erratum sequence. */
4386 if (load &&
4387 (rt == rn || rt == rm || rt == ra
3d14faea 4388 || (pair && (rt2 == rn || rt2 == rm || rt2 == ra))))
68fcca92
JW
4389 return FALSE;
4390
4391 /* We conservatively put out stubs for all other cases (including
4392 writebacks). */
4393 return TRUE;
4394 }
4395
4396 return FALSE;
4397}
4398
2144188d 4399
35fee8b7
MS
4400static char *
4401_bfd_aarch64_erratum_835769_stub_name (unsigned num_fixes)
4402{
4403 char *stub_name = (char *) bfd_malloc
4404 (strlen ("__erratum_835769_veneer_") + 16);
bb69498c
NC
4405 if (stub_name != NULL)
4406 sprintf (stub_name,"__erratum_835769_veneer_%d", num_fixes);
35fee8b7
MS
4407 return stub_name;
4408}
4409
4106101c 4410/* Scan for Cortex-A53 erratum 835769 sequence.
2144188d
MS
4411
4412 Return TRUE else FALSE on abnormal termination. */
4413
68fcca92 4414static bfd_boolean
5421cc6e
MS
4415_bfd_aarch64_erratum_835769_scan (bfd *input_bfd,
4416 struct bfd_link_info *info,
4417 unsigned int *num_fixes_p)
68fcca92
JW
4418{
4419 asection *section;
4420 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 4421 unsigned int num_fixes = *num_fixes_p;
68fcca92
JW
4422
4423 if (htab == NULL)
2144188d 4424 return TRUE;
68fcca92
JW
4425
4426 for (section = input_bfd->sections;
4427 section != NULL;
4428 section = section->next)
4429 {
4430 bfd_byte *contents = NULL;
4431 struct _aarch64_elf_section_data *sec_data;
4432 unsigned int span;
4433
4434 if (elf_section_type (section) != SHT_PROGBITS
4435 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4436 || (section->flags & SEC_EXCLUDE) != 0
4437 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4438 || (section->output_section == bfd_abs_section_ptr))
4439 continue;
4440
4441 if (elf_section_data (section)->this_hdr.contents != NULL)
4442 contents = elf_section_data (section)->this_hdr.contents;
4443 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
2144188d 4444 return FALSE;
68fcca92
JW
4445
4446 sec_data = elf_aarch64_section_data (section);
520c7b56 4447
ccf61261
NC
4448 if (sec_data->mapcount)
4449 qsort (sec_data->map, sec_data->mapcount,
4450 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
520c7b56 4451
68fcca92
JW
4452 for (span = 0; span < sec_data->mapcount; span++)
4453 {
4454 unsigned int span_start = sec_data->map[span].vma;
4455 unsigned int span_end = ((span == sec_data->mapcount - 1)
4456 ? sec_data->map[0].vma + section->size
4457 : sec_data->map[span + 1].vma);
4458 unsigned int i;
4459 char span_type = sec_data->map[span].type;
4460
4461 if (span_type == 'd')
4462 continue;
4463
4464 for (i = span_start; i + 4 < span_end; i += 4)
4465 {
4466 uint32_t insn_1 = bfd_getl32 (contents + i);
4467 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4468
4469 if (aarch64_erratum_sequence (insn_1, insn_2))
4470 {
5421cc6e 4471 struct elf_aarch64_stub_hash_entry *stub_entry;
35fee8b7
MS
4472 char *stub_name = _bfd_aarch64_erratum_835769_stub_name (num_fixes);
4473 if (! stub_name)
2144188d 4474 return FALSE;
68fcca92 4475
5421cc6e
MS
4476 stub_entry = _bfd_aarch64_add_stub_entry_in_group (stub_name,
4477 section,
4478 htab);
4479 if (! stub_entry)
4480 return FALSE;
68fcca92 4481
5421cc6e
MS
4482 stub_entry->stub_type = aarch64_stub_erratum_835769_veneer;
4483 stub_entry->target_section = section;
4484 stub_entry->target_value = i + 4;
4485 stub_entry->veneered_insn = insn_2;
4486 stub_entry->output_name = stub_name;
68fcca92
JW
4487 num_fixes++;
4488 }
4489 }
4490 }
4491 if (elf_section_data (section)->this_hdr.contents == NULL)
4492 free (contents);
4493 }
4494
357d1523
MS
4495 *num_fixes_p = num_fixes;
4496
2144188d 4497 return TRUE;
68fcca92
JW
4498}
4499
13f622ec 4500
4106101c
MS
4501/* Test if instruction INSN is ADRP. */
4502
4503static bfd_boolean
4504_bfd_aarch64_adrp_p (uint32_t insn)
4505{
9fca35fc 4506 return ((insn & AARCH64_ADRP_OP_MASK) == AARCH64_ADRP_OP);
4106101c
MS
4507}
4508
4509
4510/* Helper predicate to look for cortex-a53 erratum 843419 sequence 1. */
4511
4512static bfd_boolean
4513_bfd_aarch64_erratum_843419_sequence_p (uint32_t insn_1, uint32_t insn_2,
4514 uint32_t insn_3)
4515{
4516 uint32_t rt;
4517 uint32_t rt2;
4518 bfd_boolean pair;
4519 bfd_boolean load;
4520
4521 return (aarch64_mem_op_p (insn_2, &rt, &rt2, &pair, &load)
4522 && (!pair
4523 || (pair && !load))
4524 && AARCH64_LDST_UIMM (insn_3)
4525 && AARCH64_RN (insn_3) == AARCH64_RD (insn_1));
4526}
4527
4528
4529/* Test for the presence of Cortex-A53 erratum 843419 instruction sequence.
4530
4531 Return TRUE if section CONTENTS at offset I contains one of the
4532 erratum 843419 sequences, otherwise return FALSE. If a sequence is
4533 seen set P_VENEER_I to the offset of the final LOAD/STORE
4534 instruction in the sequence.
4535 */
4536
4537static bfd_boolean
4538_bfd_aarch64_erratum_843419_p (bfd_byte *contents, bfd_vma vma,
4539 bfd_vma i, bfd_vma span_end,
4540 bfd_vma *p_veneer_i)
4541{
4542 uint32_t insn_1 = bfd_getl32 (contents + i);
4543
4544 if (!_bfd_aarch64_adrp_p (insn_1))
4545 return FALSE;
4546
4547 if (span_end < i + 12)
4548 return FALSE;
4549
4550 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4551 uint32_t insn_3 = bfd_getl32 (contents + i + 8);
4552
4553 if ((vma & 0xfff) != 0xff8 && (vma & 0xfff) != 0xffc)
4554 return FALSE;
4555
4556 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_3))
4557 {
4558 *p_veneer_i = i + 8;
4559 return TRUE;
4560 }
4561
4562 if (span_end < i + 16)
4563 return FALSE;
4564
4565 uint32_t insn_4 = bfd_getl32 (contents + i + 12);
4566
4567 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_4))
4568 {
4569 *p_veneer_i = i + 12;
4570 return TRUE;
4571 }
4572
4573 return FALSE;
4574}
4575
4576
13f622ec
MS
4577/* Resize all stub sections. */
4578
4579static void
4580_bfd_aarch64_resize_stubs (struct elf_aarch64_link_hash_table *htab)
4581{
4582 asection *section;
4583
4584 /* OK, we've added some stubs. Find out the new size of the
4585 stub sections. */
4586 for (section = htab->stub_bfd->sections;
4587 section != NULL; section = section->next)
4588 {
4589 /* Ignore non-stub sections. */
4590 if (!strstr (section->name, STUB_SUFFIX))
4591 continue;
4592 section->size = 0;
4593 }
4594
4595 bfd_hash_traverse (&htab->stub_hash_table, aarch64_size_one_stub, htab);
13f622ec 4596
61865519
MS
4597 for (section = htab->stub_bfd->sections;
4598 section != NULL; section = section->next)
4599 {
4600 if (!strstr (section->name, STUB_SUFFIX))
4601 continue;
4602
9a2ebffd
JW
4603 /* Add space for a branch. Add 8 bytes to keep section 8 byte aligned,
4604 as long branch stubs contain a 64-bit address. */
61865519 4605 if (section->size)
9a2ebffd 4606 section->size += 8;
4106101c
MS
4607
4608 /* Ensure all stub sections have a size which is a multiple of
4609 4096. This is important in order to ensure that the insertion
4610 of stub sections does not in itself move existing code around
739b5c9c
TC
4611 in such a way that new errata sequences are created. We only do this
4612 when the ADRP workaround is enabled. If only the ADR workaround is
4613 enabled then the stubs workaround won't ever be used. */
4614 if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS
4615 if (section->size)
4616 section->size = BFD_ALIGN (section->size, 0x1000);
4617 }
4618}
4619
9a2ebffd 4620/* Construct an erratum 843419 workaround stub name. */
4106101c
MS
4621
4622static char *
4623_bfd_aarch64_erratum_843419_stub_name (asection *input_section,
4624 bfd_vma offset)
4625{
4626 const bfd_size_type len = 8 + 4 + 1 + 8 + 1 + 16 + 1;
4627 char *stub_name = bfd_malloc (len);
4628
4629 if (stub_name != NULL)
4630 snprintf (stub_name, len, "e843419@%04x_%08x_%" BFD_VMA_FMT "x",
4631 input_section->owner->id,
4632 input_section->id,
4633 offset);
4634 return stub_name;
4635}
4636
4637/* Build a stub_entry structure describing an 843419 fixup.
4638
4639 The stub_entry constructed is populated with the bit pattern INSN
4640 of the instruction located at OFFSET within input SECTION.
4641
4642 Returns TRUE on success. */
4643
4644static bfd_boolean
4645_bfd_aarch64_erratum_843419_fixup (uint32_t insn,
4646 bfd_vma adrp_offset,
4647 bfd_vma ldst_offset,
4648 asection *section,
4649 struct bfd_link_info *info)
4650{
4651 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4652 char *stub_name;
4653 struct elf_aarch64_stub_hash_entry *stub_entry;
4654
4655 stub_name = _bfd_aarch64_erratum_843419_stub_name (section, ldst_offset);
bb69498c
NC
4656 if (stub_name == NULL)
4657 return FALSE;
4106101c
MS
4658 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4659 FALSE, FALSE);
4660 if (stub_entry)
4661 {
4662 free (stub_name);
4663 return TRUE;
4664 }
4665
4666 /* We always place an 843419 workaround veneer in the stub section
4667 attached to the input section in which an erratum sequence has
4668 been found. This ensures that later in the link process (in
4669 elfNN_aarch64_write_section) when we copy the veneered
4670 instruction from the input section into the stub section the
4671 copied instruction will have had any relocations applied to it.
4672 If we placed workaround veneers in any other stub section then we
4673 could not assume that all relocations have been processed on the
4674 corresponding input section at the point we output the stub
bb69498c 4675 section. */
4106101c
MS
4676
4677 stub_entry = _bfd_aarch64_add_stub_entry_after (stub_name, section, htab);
4678 if (stub_entry == NULL)
4679 {
4680 free (stub_name);
4681 return FALSE;
4682 }
4683
4684 stub_entry->adrp_offset = adrp_offset;
4685 stub_entry->target_value = ldst_offset;
4686 stub_entry->target_section = section;
4687 stub_entry->stub_type = aarch64_stub_erratum_843419_veneer;
4688 stub_entry->veneered_insn = insn;
4689 stub_entry->output_name = stub_name;
4690
4691 return TRUE;
4692}
4693
4694
4695/* Scan an input section looking for the signature of erratum 843419.
4696
4697 Scans input SECTION in INPUT_BFD looking for erratum 843419
4698 signatures, for each signature found a stub_entry is created
4699 describing the location of the erratum for subsequent fixup.
4700
4701 Return TRUE on successful scan, FALSE on failure to scan.
4702 */
4703
4704static bfd_boolean
4705_bfd_aarch64_erratum_843419_scan (bfd *input_bfd, asection *section,
4706 struct bfd_link_info *info)
4707{
4708 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4709
4710 if (htab == NULL)
4711 return TRUE;
4712
4713 if (elf_section_type (section) != SHT_PROGBITS
4714 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4715 || (section->flags & SEC_EXCLUDE) != 0
4716 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4717 || (section->output_section == bfd_abs_section_ptr))
4718 return TRUE;
4719
4720 do
4721 {
4722 bfd_byte *contents = NULL;
4723 struct _aarch64_elf_section_data *sec_data;
4724 unsigned int span;
4725
4726 if (elf_section_data (section)->this_hdr.contents != NULL)
4727 contents = elf_section_data (section)->this_hdr.contents;
4728 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4729 return FALSE;
4730
4731 sec_data = elf_aarch64_section_data (section);
4732
ccf61261
NC
4733 if (sec_data->mapcount)
4734 qsort (sec_data->map, sec_data->mapcount,
4735 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
4106101c
MS
4736
4737 for (span = 0; span < sec_data->mapcount; span++)
4738 {
4739 unsigned int span_start = sec_data->map[span].vma;
4740 unsigned int span_end = ((span == sec_data->mapcount - 1)
4741 ? sec_data->map[0].vma + section->size
4742 : sec_data->map[span + 1].vma);
4743 unsigned int i;
4744 char span_type = sec_data->map[span].type;
4745
4746 if (span_type == 'd')
4747 continue;
4748
4749 for (i = span_start; i + 8 < span_end; i += 4)
4750 {
4751 bfd_vma vma = (section->output_section->vma
4752 + section->output_offset
4753 + i);
4754 bfd_vma veneer_i;
4755
4756 if (_bfd_aarch64_erratum_843419_p
4757 (contents, vma, i, span_end, &veneer_i))
4758 {
4759 uint32_t insn = bfd_getl32 (contents + veneer_i);
4760
4761 if (!_bfd_aarch64_erratum_843419_fixup (insn, i, veneer_i,
4762 section, info))
4763 return FALSE;
4764 }
4765 }
4766 }
4767
4768 if (elf_section_data (section)->this_hdr.contents == NULL)
4769 free (contents);
61865519 4770 }
4106101c
MS
4771 while (0);
4772
4773 return TRUE;
61865519 4774}
13f622ec 4775
7ff36d1a
SP
4776static bfd_boolean
4777section_start_symbol (bfd *abfd ATTRIBUTE_UNUSED, asection *section,
4778 void *valp)
4779{
4780 return section->vma == *(bfd_vma *)valp;
4781}
4782
4783/* Capability format functions. */
4784
4785static unsigned
4786exponent (uint64_t len)
4787{
4788#define CAP_MAX_EXPONENT 50
4789 /* Size is a 65 bit value, so there's an implicit 0 MSB. */
4790 unsigned zeroes = __builtin_clzl (len) + 1;
4791
4792 /* All bits up to and including CAP_MW - 2 are zero. */
4793 if (CAP_MAX_EXPONENT < zeroes)
4794 return (unsigned) -1;
4795 else
4796 return CAP_MAX_EXPONENT - zeroes;
4797#undef CAP_MAX_EXPONENT
4798}
4799
dbd880c7 4800#define ONES(x) ((1ULL << (x)) - 1)
7ff36d1a
SP
4801#define ALIGN_UP(x, a) (((x) + ONES (a)) & (~ONES (a)))
4802
4803static bfd_boolean
5a9e7a18 4804c64_valid_cap_range (bfd_vma *basep, bfd_vma *limitp, unsigned *alignmentp)
7ff36d1a
SP
4805{
4806 bfd_vma base = *basep, size = *limitp - *basep;
4807
4808 unsigned e, old_e;
5a9e7a18 4809 *alignmentp = 1;
7ff36d1a
SP
4810
4811 if ((e = exponent (size)) == (unsigned) -1)
4812 return TRUE;
4813
4814 size = ALIGN_UP (size, e + 3);
4815 old_e = e;
4816 e = exponent (size);
4817 if (old_e != e)
4818 size = ALIGN_UP (size, e + 3);
4819
4820 base = ALIGN_UP (base, e + 3);
4821
5a9e7a18 4822 *alignmentp = e+3;
7ff36d1a
SP
4823 if (base == *basep && *limitp == base + size)
4824 return TRUE;
4825
4826 *basep = base;
4827 *limitp = base + size;
4828 return FALSE;
4829}
4830
4831struct sec_change_queue
4832{
4833 asection *sec;
4834 struct sec_change_queue *next;
4835};
4836
4837/* Queue up the change, sorted in order of the output section vma. */
4838
4839static void
4840queue_section_padding (struct sec_change_queue **queue, asection *sec)
4841{
4842 struct sec_change_queue *q = *queue, *last_q = NULL, *n;
4843
4844 while (q != NULL)
4845 {
4846 if (q->sec->vma > sec->vma)
4847 break;
4848 last_q = q;
4849 q = q->next;
4850 }
4851
4852 n = bfd_zmalloc (sizeof (struct sec_change_queue));
4853
4854 if (last_q == NULL)
4855 *queue = n;
4856 else
4857 {
4858 n->next = q;
4859 last_q->next = n;
4860 }
4861
4862 n->sec = sec;
4863}
4864
4865/* Check if the bounds covering all sections between LOW_SEC and HIGH_SEC will
4866 get rounded off in the Morello capability format and if it does, queue up a
4867 change to fix up the section layout. */
4868static inline void
4869record_section_change (asection *sec, struct sec_change_queue **queue)
4870{
4871 bfd_vma low = sec->vma;
4872 bfd_vma high = sec->vma + sec->size;
5a9e7a18 4873 unsigned alignment;
7ff36d1a 4874
b3d71cf9
MM
4875 if (!c64_valid_cap_range (&low, &high, &alignment)
4876 || sec->alignment_power < alignment)
7ff36d1a
SP
4877 queue_section_padding (queue, sec);
4878}
4879
4880/* Make sure that all capabilities that refer to sections have bounds that
4881 won't overlap with neighbouring sections. This is needed in two specific
4882 cases. The first case is that of PCC, which needs to span across all
5a9e7a18
MM
4883 readonly sections as well as the GOT and PLT sections in the output binary.
4884 The second case is that of linker and ldscript defined symbols that indicate
4885 start and/or end of sections and/or zero-sized symbols.
7ff36d1a
SP
4886
4887 In both cases, overlap of capability bounds are avoided by aligning the base
4888 of the section and if necessary, adding a pad at the end of the section so
4889 that the section following it starts only after the pad. */
4890
5fa80905
AC
4891static bfd_vma pcc_low;
4892static bfd_vma pcc_high;
7ff36d1a
SP
4893void
4894elfNN_c64_resize_sections (bfd *output_bfd, struct bfd_link_info *info,
4895 void (*c64_pad_section) (asection *, bfd_vma),
4896 void (*layout_sections_again) (void))
4897{
4a74b265 4898 asection *sec;
7ff36d1a 4899 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
2d99dff6 4900 bfd *input_bfd;
e2314302 4901 unsigned align = 0;
7ff36d1a
SP
4902
4903 htab->layout_sections_again = layout_sections_again;
4904
4a74b265
MM
4905 /* If this is not a PURECAP binary, and has no C64 code in it, then this is
4906 just a stock AArch64 binary and the section padding is not necessary.
4907 We can have PURECAP shared libraries that are data-only, so just checking
4908 if there is C64 code in this executable is not enough. We can have HYBRID
4909 binaries, so just checking for PURECAP is not enough. */
4910 if (!(htab->c64_output
4911 || (elf_elfheader (output_bfd)->e_flags & EF_AARCH64_CHERI_PURECAP)))
7ff36d1a
SP
4912 return;
4913
4914 struct sec_change_queue *queue = NULL;
4915
4916 /* First, walk through all the relocations to find those referring to linker
4917 defined and ldscript defined symbols since we set their range to their
4918 output sections. */
2d99dff6 4919 for (input_bfd = info->input_bfds;
4a74b265
MM
4920 /* No point iterating over all relocations to ensure each section that
4921 needs to give the bounds for a capability is padded accordingly if
4922 there are no capability relocations in the GOT and there are no
4923 CAPINIT relocations.
4924 N.b. It is possible that when creating a dynamic object a
4925 section-spanning symbol could be used by some other executable
4926 linking to it when we don't have a relocation to it in the given
4927 dynamic library. Rather than pad every section which has a linker
4928 defined symbol pointing into it we choose to allow such use-cases to
4929 have sizes which bleed into another section. */
4930 (htab->c64_rel || htab->srelcaps) && input_bfd != NULL;
4931 input_bfd = input_bfd->link.next)
7ff36d1a
SP
4932 {
4933 Elf_Internal_Shdr *symtab_hdr;
4934
4935 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4936 if (symtab_hdr->sh_info == 0)
4937 continue;
4938
4939 for (sec = input_bfd->sections; sec != NULL; sec = sec->next)
4940 {
4941 Elf_Internal_Rela *irelaend, *irela;
4942
4943 /* If there aren't any relocs, then there's nothing more to do. */
4944 if ((sec->flags & SEC_RELOC) == 0 || sec->reloc_count == 0)
4945 continue;
4946
4947 irela = _bfd_elf_link_read_relocs (input_bfd, sec, NULL, NULL,
4948 info->keep_memory);
4949 if (irela == NULL)
4950 continue;
4951
4952 /* Now examine each relocation. */
4953 irelaend = irela + sec->reloc_count;
4954 for (; irela < irelaend; irela++)
4955 {
4956 unsigned int r_indx;
4957 struct elf_link_hash_entry *h;
4958 int e_indx;
4959 asection *os;
4960
4961 r_indx = ELFNN_R_SYM (irela->r_info);
4962
4963 /* Linker defined or linker script defined symbols are always in
4964 the symbol hash. */
4965 if (r_indx < symtab_hdr->sh_info)
4966 continue;
4967
4968 e_indx = r_indx - symtab_hdr->sh_info;
4969 h = elf_sym_hashes (input_bfd)[e_indx];
4970
4971 /* XXX Does this ever happen? */
4972 if (h == NULL)
4973 continue;
4974
4975 os = h->root.u.def.section->output_section;
4976
4977 if (h->root.linker_def)
4978 record_section_change (os, &queue);
4979 else if (h->root.ldscript_def)
4980 {
4981 const char *name = h->root.root.string;
4982 size_t len = strlen (name);
4983
4984 if (len > 8 && name[0] == '_' && name[1] == '_'
4985 && (!strncmp (name + 2, "start_", 6)
4986 || !strcmp (name + len - 6, "_start")))
7ff36d1a
SP
4987 {
4988 bfd_vma value = os->vma + os->size;
4989
4990 os = bfd_sections_find_if (info->output_bfd,
4991 section_start_symbol, &value);
4992
4993 if (os != NULL)
4994 record_section_change (os, &queue);
4995 }
4996 /* XXX We're overfitting here because the offset of H within
4997 the output section is not yet resolved and ldscript
4998 defined symbols do not have input section information. */
4999 else
5000 record_section_change (os, &queue);
5001 }
5002 }
5003 }
5004 }
5005
4a74b265
MM
5006 /* Sequentially add alignment and padding as required. */
5007 while (queue)
5008 {
5009 bfd_vma low = queue->sec->vma;
5010 bfd_vma high = queue->sec->vma + queue->sec->size;
5011
5012 if (!c64_valid_cap_range (&low, &high, &align))
5013 {
5014 bfd_vma padding = high - low - queue->sec->size;
5015 c64_pad_section (queue->sec, padding);
5016 }
5017 if (queue->sec->alignment_power < align)
5018 queue->sec->alignment_power = align;
5019
5020 (*htab->layout_sections_again) ();
5021
5022 struct sec_change_queue *queue_free = queue;
5023
5024 queue = queue->next;
5025 free (queue_free);
5026 }
5027
7ff36d1a
SP
5028 /* Next, walk through output sections to find the PCC span and add a padding
5029 at the end to ensure that PCC bounds don't bleed into neighbouring
5030 sections. For now PCC needs to encompass all code sections, .got, .plt
4a74b265
MM
5031 and .got.plt.
5032 If there is no C64 code in this binary, then we do not need to care about
5033 PCC bounds, hence skip this bit.
5034 It's tempting to also avoid padding the PCC range when we have no static
5035 relocations in this binary, since it would seem that we can never end up
5036 trying to access something "outside" the PCC bounds (any PCC bounded
5037 capability provided to an outside dynamic object would be sealed by the
5038 runtime, and hence can't be offset). Unfortunately it is still possible,
5039 since an `adr c0, 0` gives an unsealed capability to the current code
5040 which could then be offset by some other means.
5041 While that seems unlikely to happen, having no relocations in a file also
5042 seems quite unlikely, so we may as well play it safe. */
5043 if (!htab->c64_output)
5044 return;
5045
5046 bfd_vma low = (bfd_vma) -1, high = 0;
5047 asection *pcc_low_sec = NULL, *pcc_high_sec = NULL;
7ff36d1a
SP
5048 for (sec = output_bfd->sections; sec != NULL; sec = sec->next)
5049 {
5050 /* XXX This is a good place to figure out if there are any readable or
5051 writable sections in the PCC range that are not in the list of
5052 sections we want the PCC to span and then warn the user of it. */
5053
5054#define NOT_OP_SECTION(s) ((s) == NULL || (s)->output_section != sec)
5055
0e02111b 5056 if ((sec->flags & SEC_READONLY) == 0
7ff36d1a
SP
5057 && NOT_OP_SECTION (htab->root.sgotplt)
5058 && NOT_OP_SECTION (htab->root.igotplt)
5059 && NOT_OP_SECTION (htab->root.sgot)
5060 && NOT_OP_SECTION (htab->root.splt)
0e02111b
MM
5061 && NOT_OP_SECTION (htab->root.iplt)
5062 && (sec->vma < info->relro_start
5063 || sec->vma >= info->relro_end))
5064 continue;
5065 if ((sec->flags & SEC_ALLOC) == 0)
7ff36d1a
SP
5066 continue;
5067
5068 if (sec->vma < low)
5069 {
5070 low = sec->vma;
5071 pcc_low_sec = sec;
5072 }
5073 if (sec->vma + sec->size > high)
5074 {
5075 high = sec->vma + sec->size;
5076 pcc_high_sec = sec;
5077 }
5078
5079#undef NOT_OP_SECTION
5080 }
5081
4a74b265
MM
5082 /* Set the PCC range to have precise bounds to ensure that PCC relative loads
5083 can not access outside of their given range. */
e2314302 5084 if (pcc_low_sec != NULL)
5fa80905 5085 {
e2314302
MM
5086 BFD_ASSERT (pcc_high_sec);
5087
5088 bfd_vma pcc_low_tmp;
5089 bfd_vma pcc_high_tmp;
5090
5091 /* We have to be a little careful about the padding we introduce. The
5092 padding we could calculate here may not be the padding that we would
5093 want after the very first section in the PCC bounds has been aligned
5094 properly. That change in the start address propagated through a few
5095 different sections with their own alignment requirements can easily
5096 change the length of the region we want the PCC to span.
4a74b265
MM
5097 Also, that change in length could change the alignment we want. We
5098 don't proove that the alignment requirement converges, but believe
5099 that it should (there is only so much space that existing alignment
5100 requirements could trigger to be added -- a section with an alignment
5101 requirement of 16 can only really add 15 bytes to the length). */
e2314302
MM
5102 bfd_boolean valid_range = FALSE;
5103 while (TRUE) {
5104 pcc_low_tmp = pcc_low_sec->vma;
5105 pcc_high_tmp = pcc_high_sec->vma + pcc_high_sec->size;
5106 valid_range =
5107 c64_valid_cap_range (&pcc_low_tmp, &pcc_high_tmp, &align);
5108 if (pcc_low_sec->alignment_power >= align)
5109 break;
5110 pcc_low_sec->alignment_power = align;
5111 (*htab->layout_sections_again) ();
5112 }
5113
5114 /* We have calculated the bottom and top address that we want in the
5115 above call to c64_valid_cap_range. We have also aligned the lowest
5116 section in the PCC range to where we want it. Just have to add the
5117 padding remaining if needs be. */
5118 if (!valid_range)
5119 {
5120 BFD_ASSERT (pcc_low_tmp == pcc_low_sec->vma);
5121 bfd_vma current_length =
5122 (pcc_high_sec->vma + pcc_high_sec->size) - pcc_low_sec->vma;
5123 bfd_vma desired_length = (pcc_high_tmp - pcc_low_tmp);
5124 bfd_vma padding = desired_length - current_length;
5125 c64_pad_section (pcc_high_sec, padding);
4a74b265 5126 (*htab->layout_sections_again) ();
e2314302 5127 }
e2314302 5128
5fa80905
AC
5129 pcc_low = pcc_low_sec->vma;
5130 pcc_high = pcc_high_sec->vma + pcc_high_sec->size;
5131 }
7ff36d1a 5132}
4106101c 5133
a06ea964
NC
5134/* Determine and set the size of the stub section for a final link.
5135
5136 The basic idea here is to examine all the relocations looking for
50e192f0
SP
5137 PC-relative calls to a target that either needs a PE state change (A64 to
5138 C64 or vice versa) or in case of unconditional branches (B/BL), is
5139 unreachable. */
a06ea964
NC
5140
5141bfd_boolean
cec5225b 5142elfNN_aarch64_size_stubs (bfd *output_bfd,
a06ea964
NC
5143 bfd *stub_bfd,
5144 struct bfd_link_info *info,
5145 bfd_signed_vma group_size,
5146 asection * (*add_stub_section) (const char *,
5147 asection *),
5148 void (*layout_sections_again) (void))
5149{
5150 bfd_size_type stub_group_size;
5151 bfd_boolean stubs_always_before_branch;
5421cc6e 5152 bfd_boolean stub_changed = FALSE;
cec5225b 5153 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 5154 unsigned int num_erratum_835769_fixes = 0;
a06ea964
NC
5155
5156 /* Propagate mach to stub bfd, because it may not have been
5157 finalized when we created stub_bfd. */
5158 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5159 bfd_get_mach (output_bfd));
5160
5161 /* Stash our params away. */
5162 htab->stub_bfd = stub_bfd;
5163 htab->add_stub_section = add_stub_section;
5164 htab->layout_sections_again = layout_sections_again;
5165 stubs_always_before_branch = group_size < 0;
5166 if (group_size < 0)
5167 stub_group_size = -group_size;
5168 else
5169 stub_group_size = group_size;
5170
5171 if (stub_group_size == 1)
5172 {
5173 /* Default values. */
b9eead84 5174 /* AArch64 branch range is +-128MB. The value used is 1MB less. */
a06ea964
NC
5175 stub_group_size = 127 * 1024 * 1024;
5176 }
5177
5178 group_sections (htab, stub_group_size, stubs_always_before_branch);
5179
4106101c
MS
5180 (*htab->layout_sections_again) ();
5181
5421cc6e
MS
5182 if (htab->fix_erratum_835769)
5183 {
5184 bfd *input_bfd;
5185
5186 for (input_bfd = info->input_bfds;
5187 input_bfd != NULL; input_bfd = input_bfd->link.next)
8c803a2d
AM
5188 {
5189 if (!is_aarch64_elf (input_bfd)
5190 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5191 continue;
5192
5193 if (!_bfd_aarch64_erratum_835769_scan (input_bfd, info,
5194 &num_erratum_835769_fixes))
5195 return FALSE;
5196 }
5421cc6e 5197
4106101c
MS
5198 _bfd_aarch64_resize_stubs (htab);
5199 (*htab->layout_sections_again) ();
5200 }
5201
739b5c9c 5202 if (htab->fix_erratum_843419 != ERRAT_NONE)
4106101c
MS
5203 {
5204 bfd *input_bfd;
5205
5206 for (input_bfd = info->input_bfds;
5207 input_bfd != NULL;
5208 input_bfd = input_bfd->link.next)
5209 {
5210 asection *section;
5211
8c803a2d
AM
5212 if (!is_aarch64_elf (input_bfd)
5213 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5214 continue;
5215
4106101c
MS
5216 for (section = input_bfd->sections;
5217 section != NULL;
5218 section = section->next)
5219 if (!_bfd_aarch64_erratum_843419_scan (input_bfd, section, info))
5220 return FALSE;
5221 }
5222
5223 _bfd_aarch64_resize_stubs (htab);
5224 (*htab->layout_sections_again) ();
5421cc6e
MS
5225 }
5226
a06ea964
NC
5227 while (1)
5228 {
5229 bfd *input_bfd;
a06ea964 5230
9b9971aa
MS
5231 for (input_bfd = info->input_bfds;
5232 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC
5233 {
5234 Elf_Internal_Shdr *symtab_hdr;
5235 asection *section;
a06ea964 5236
8c803a2d
AM
5237 if (!is_aarch64_elf (input_bfd)
5238 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5239 continue;
5240
a06ea964
NC
5241 /* We'll need the symbol table in a second. */
5242 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5243 if (symtab_hdr->sh_info == 0)
5244 continue;
5245
5246 /* Walk over each section attached to the input bfd. */
5247 for (section = input_bfd->sections;
5248 section != NULL; section = section->next)
5249 {
5250 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5251
5252 /* If there aren't any relocs, then there's nothing more
5253 to do. */
5254 if ((section->flags & SEC_RELOC) == 0
5255 || section->reloc_count == 0
5256 || (section->flags & SEC_CODE) == 0)
5257 continue;
5258
5259 /* If this section is a link-once section that will be
5260 discarded, then don't create any stubs. */
5261 if (section->output_section == NULL
5262 || section->output_section->owner != output_bfd)
5263 continue;
5264
5265 /* Get the relocs. */
5266 internal_relocs
5267 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5268 NULL, info->keep_memory);
5269 if (internal_relocs == NULL)
5270 goto error_ret_free_local;
5271
5272 /* Now examine each relocation. */
5273 irela = internal_relocs;
5274 irelaend = irela + section->reloc_count;
5275 for (; irela < irelaend; irela++)
5276 {
5277 unsigned int r_type, r_indx;
50e192f0 5278 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
cec5225b 5279 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC
5280 asection *sym_sec;
5281 bfd_vma sym_value;
5282 bfd_vma destination;
cec5225b 5283 struct elf_aarch64_link_hash_entry *hash;
a06ea964
NC
5284 const char *sym_name;
5285 char *stub_name;
5286 const asection *id_sec;
5287 unsigned char st_type;
5288 bfd_size_type len;
50e192f0
SP
5289 unsigned branch_to_c64 = FALSE;
5290 const char *suffix;
a06ea964 5291
cec5225b
YZ
5292 r_type = ELFNN_R_TYPE (irela->r_info);
5293 r_indx = ELFNN_R_SYM (irela->r_info);
a06ea964
NC
5294
5295 if (r_type >= (unsigned int) R_AARCH64_end)
5296 {
5297 bfd_set_error (bfd_error_bad_value);
5298 error_ret_free_internal:
5299 if (elf_section_data (section)->relocs == NULL)
5300 free (internal_relocs);
5301 goto error_ret_free_local;
5302 }
5303
5304 /* Only look for stubs on unconditional branch and
5305 branch and link instructions. */
50e192f0 5306 if (!aarch64_branch_reloc_p (r_type))
a06ea964
NC
5307 continue;
5308
5309 /* Now determine the call target, its name, value,
5310 section. */
5311 sym_sec = NULL;
5312 sym_value = 0;
5313 destination = 0;
5314 hash = NULL;
5315 sym_name = NULL;
5316 if (r_indx < symtab_hdr->sh_info)
5317 {
5318 /* It's a local symbol. */
f0070c1e
SP
5319 Elf_Internal_Sym *sym =
5320 bfd_sym_from_r_symndx (&htab->root.sym_cache,
5321 input_bfd, r_indx);
5322 if (sym == NULL)
5323 goto error_ret_free_internal;
a06ea964 5324
50e192f0
SP
5325 branch_to_c64 |= (sym->st_target_internal
5326 & ST_BRANCH_TO_C64);
5327
f0070c1e
SP
5328 Elf_Internal_Shdr *hdr =
5329 elf_elfsections (input_bfd)[sym->st_shndx];
a06ea964 5330
a06ea964
NC
5331 sym_sec = hdr->bfd_section;
5332 if (!sym_sec)
5333 /* This is an undefined symbol. It can never
5334 be resolved. */
5335 continue;
5336
5337 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5338 sym_value = sym->st_value;
5339 destination = (sym_value + irela->r_addend
5340 + sym_sec->output_offset
5341 + sym_sec->output_section->vma);
5342 st_type = ELF_ST_TYPE (sym->st_info);
5343 sym_name
5344 = bfd_elf_string_from_elf_section (input_bfd,
5345 symtab_hdr->sh_link,
5346 sym->st_name);
50e192f0
SP
5347
5348 /* Get the interworking stub if needed. */
5349 stub_type = aarch64_interwork_stub (r_type,
5350 branch_to_c64);
a06ea964
NC
5351 }
5352 else
5353 {
5354 int e_indx;
50e192f0
SP
5355 struct elf_aarch64_link_hash_table *globals =
5356 elf_aarch64_hash_table (info);
a06ea964
NC
5357
5358 e_indx = r_indx - symtab_hdr->sh_info;
cec5225b 5359 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC
5360 elf_sym_hashes (input_bfd)[e_indx]);
5361
5362 while (hash->root.root.type == bfd_link_hash_indirect
5363 || hash->root.root.type == bfd_link_hash_warning)
cec5225b 5364 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC
5365 hash->root.root.u.i.link);
5366
50e192f0
SP
5367 /* Static executable. */
5368 if (globals->root.splt == NULL || hash == NULL
5369 || hash->root.plt.offset == (bfd_vma) - 1)
5370 {
5371 branch_to_c64 |= (hash->root.target_internal
5372 & ST_BRANCH_TO_C64);
5373 stub_type = aarch64_interwork_stub (r_type,
5374 branch_to_c64);
5375 }
5376
a06ea964
NC
5377 if (hash->root.root.type == bfd_link_hash_defined
5378 || hash->root.root.type == bfd_link_hash_defweak)
5379 {
a06ea964
NC
5380 sym_sec = hash->root.root.u.def.section;
5381 sym_value = hash->root.root.u.def.value;
5382 /* For a destination in a shared library,
5383 use the PLT stub as target address to
5384 decide whether a branch stub is
5385 needed. */
5386 if (globals->root.splt != NULL && hash != NULL
5387 && hash->root.plt.offset != (bfd_vma) - 1)
5388 {
5389 sym_sec = globals->root.splt;
5390 sym_value = hash->root.plt.offset;
5391 if (sym_sec->output_section != NULL)
5392 destination = (sym_value
5393 + sym_sec->output_offset
5394 +
5395 sym_sec->output_section->vma);
5396 }
5397 else if (sym_sec->output_section != NULL)
5398 destination = (sym_value + irela->r_addend
5399 + sym_sec->output_offset
5400 + sym_sec->output_section->vma);
5401 }
5402 else if (hash->root.root.type == bfd_link_hash_undefined
5403 || (hash->root.root.type
5404 == bfd_link_hash_undefweak))
5405 {
5406 /* For a shared library, use the PLT stub as
5407 target address to decide whether a long
5408 branch stub is needed.
5409 For absolute code, they cannot be handled. */
a06ea964
NC
5410
5411 if (globals->root.splt != NULL && hash != NULL
5412 && hash->root.plt.offset != (bfd_vma) - 1)
5413 {
5414 sym_sec = globals->root.splt;
5415 sym_value = hash->root.plt.offset;
5416 if (sym_sec->output_section != NULL)
5417 destination = (sym_value
5418 + sym_sec->output_offset
5419 +
5420 sym_sec->output_section->vma);
5421 }
5422 else
5423 continue;
5424 }
5425 else
5426 {
5427 bfd_set_error (bfd_error_bad_value);
5428 goto error_ret_free_internal;
5429 }
5430 st_type = ELF_ST_TYPE (hash->root.type);
5431 sym_name = hash->root.root.root.string;
5432 }
5433
5434 /* Determine what (if any) linker stub is needed. */
50e192f0
SP
5435 if (stub_type == aarch64_stub_none)
5436 stub_type = aarch64_type_of_stub (section, irela, sym_sec,
5437 st_type, destination);
5438
a06ea964
NC
5439 if (stub_type == aarch64_stub_none)
5440 continue;
5441
5442 /* Support for grouping stub sections. */
5443 id_sec = htab->stub_group[section->id].link_sec;
5444
5445 /* Get the name of this stub. */
cec5225b 5446 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, hash,
50e192f0 5447 irela, stub_type);
a06ea964
NC
5448 if (!stub_name)
5449 goto error_ret_free_internal;
5450
5451 stub_entry =
5452 aarch64_stub_hash_lookup (&htab->stub_hash_table,
5453 stub_name, FALSE, FALSE);
5454 if (stub_entry != NULL)
5455 {
5456 /* The proper stub has already been created. */
5457 free (stub_name);
3da64fe4
RA
5458 /* Always update this stub's target since it may have
5459 changed after layout. */
5460 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP
5461
5462 /* Set LSB for A64 to C64 branch. */
5463 if (branch_to_c64)
5464 stub_entry->target_value |= 1;
5465
a06ea964
NC
5466 continue;
5467 }
5468
ef857521
MS
5469 stub_entry = _bfd_aarch64_add_stub_entry_in_group
5470 (stub_name, section, htab);
a06ea964
NC
5471 if (stub_entry == NULL)
5472 {
5473 free (stub_name);
5474 goto error_ret_free_internal;
5475 }
5476
2f340668 5477 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP
5478 /* Set LSB for A64 to C64 branch. */
5479 if (branch_to_c64)
5480 stub_entry->target_value |= 1;
5481
a06ea964
NC
5482 stub_entry->target_section = sym_sec;
5483 stub_entry->stub_type = stub_type;
5484 stub_entry->h = hash;
5485 stub_entry->st_type = st_type;
5486
50e192f0
SP
5487 suffix = aarch64_lookup_stub_type_suffix (stub_type);
5488
a06ea964
NC
5489 if (sym_name == NULL)
5490 sym_name = "unnamed";
50e192f0
SP
5491 len = (sizeof (STUB_ENTRY_NAME) + strlen (sym_name)
5492 + strlen (suffix));
a06ea964
NC
5493 stub_entry->output_name = bfd_alloc (htab->stub_bfd, len);
5494 if (stub_entry->output_name == NULL)
5495 {
5496 free (stub_name);
5497 goto error_ret_free_internal;
5498 }
5499
5500 snprintf (stub_entry->output_name, len, STUB_ENTRY_NAME,
50e192f0 5501 sym_name, suffix);
a06ea964
NC
5502
5503 stub_changed = TRUE;
5504 }
5505
5506 /* We're done with the internal relocs, free them. */
5507 if (elf_section_data (section)->relocs == NULL)
5508 free (internal_relocs);
5509 }
5510 }
5511
5512 if (!stub_changed)
5513 break;
5514
13f622ec 5515 _bfd_aarch64_resize_stubs (htab);
a06ea964
NC
5516
5517 /* Ask the linker to do its stuff. */
5518 (*htab->layout_sections_again) ();
5519 stub_changed = FALSE;
5520 }
5521
5522 return TRUE;
5523
dc1e8a47 5524 error_ret_free_local:
a06ea964
NC
5525 return FALSE;
5526}
5527
5528/* Build all the stubs associated with the current output file. The
5529 stubs are kept in a hash table attached to the main linker hash
5530 table. We also set up the .plt entries for statically linked PIC
5531 functions here. This function is called via aarch64_elf_finish in the
5532 linker. */
5533
5534bfd_boolean
cec5225b 5535elfNN_aarch64_build_stubs (struct bfd_link_info *info)
a06ea964
NC
5536{
5537 asection *stub_sec;
5538 struct bfd_hash_table *table;
cec5225b 5539 struct elf_aarch64_link_hash_table *htab;
a06ea964 5540
cec5225b 5541 htab = elf_aarch64_hash_table (info);
a06ea964
NC
5542
5543 for (stub_sec = htab->stub_bfd->sections;
5544 stub_sec != NULL; stub_sec = stub_sec->next)
5545 {
5546 bfd_size_type size;
5547
5548 /* Ignore non-stub sections. */
5549 if (!strstr (stub_sec->name, STUB_SUFFIX))
5550 continue;
5551
5552 /* Allocate memory to hold the linker stubs. */
5553 size = stub_sec->size;
5554 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
5555 if (stub_sec->contents == NULL && size != 0)
5556 return FALSE;
5557 stub_sec->size = 0;
61865519 5558
9a2ebffd
JW
5559 /* Add a branch around the stub section, and a nop, to keep it 8 byte
5560 aligned, as long branch stubs contain a 64-bit address. */
61865519 5561 bfd_putl32 (0x14000000 | (size >> 2), stub_sec->contents);
9a2ebffd
JW
5562 bfd_putl32 (INSN_NOP, stub_sec->contents + 4);
5563 stub_sec->size += 8;
a06ea964
NC
5564 }
5565
5566 /* Build the stubs as directed by the stub hash table. */
5567 table = &htab->stub_hash_table;
50e192f0
SP
5568
5569 bfd_error_type save_error = bfd_get_error ();
5570 bfd_set_error (bfd_error_no_error);
a06ea964
NC
5571 bfd_hash_traverse (table, aarch64_build_one_stub, info);
5572
50e192f0
SP
5573 if (bfd_get_error () != bfd_error_no_error)
5574 return FALSE;
5575
5576 bfd_set_error (save_error);
5577
a06ea964
NC
5578 return TRUE;
5579}
5580
5581
5582/* Add an entry to the code/data map for section SEC. */
5583
5584static void
f0070c1e
SP
5585elfNN_aarch64_section_map_add (bfd *abfd, asection *sec, char type,
5586 bfd_vma vma)
a06ea964
NC
5587{
5588 struct _aarch64_elf_section_data *sec_data =
cec5225b 5589 elf_aarch64_section_data (sec);
a06ea964
NC
5590 unsigned int newidx;
5591
f0070c1e
SP
5592 /* The aarch64 section hook was not called for this section. */
5593 if (!sec_data->elf.is_target_section_data)
5594 {
5595 struct _aarch64_elf_section_data *newdata =
5596 bfd_zalloc (abfd, sizeof (*newdata));
5597
5598 if (newdata == NULL)
5599 return;
5600
5601 newdata->elf = sec_data->elf;
5602 newdata->elf.is_target_section_data = TRUE;
5603 free (sec_data);
5604 sec->used_by_bfd = sec_data = newdata;
5605 }
5606
a06ea964
NC
5607 if (sec_data->map == NULL)
5608 {
cec5225b 5609 sec_data->map = bfd_malloc (sizeof (elf_aarch64_section_map));
a06ea964
NC
5610 sec_data->mapcount = 0;
5611 sec_data->mapsize = 1;
5612 }
5613
5614 newidx = sec_data->mapcount++;
5615
5616 if (sec_data->mapcount > sec_data->mapsize)
5617 {
5618 sec_data->mapsize *= 2;
5619 sec_data->map = bfd_realloc_or_free
cec5225b 5620 (sec_data->map, sec_data->mapsize * sizeof (elf_aarch64_section_map));
a06ea964
NC
5621 }
5622
5623 if (sec_data->map)
5624 {
5625 sec_data->map[newidx].vma = vma;
5626 sec_data->map[newidx].type = type;
5627 }
5628}
5629
5630
5631/* Initialise maps of insn/data for input BFDs. */
5632void
7ff36d1a 5633bfd_elfNN_aarch64_init_maps (bfd *abfd, struct bfd_link_info *info)
a06ea964
NC
5634{
5635 Elf_Internal_Sym *isymbuf;
5636 Elf_Internal_Shdr *hdr;
5637 unsigned int i, localsyms;
5638
5639 /* Make sure that we are dealing with an AArch64 elf binary. */
5640 if (!is_aarch64_elf (abfd))
5641 return;
5642
f0070c1e
SP
5643 if (elf_aarch64_tdata (abfd)->secmaps_initialised)
5644 return;
5645
a06ea964 5646 if ((abfd->flags & DYNAMIC) != 0)
68fcca92 5647 return;
a06ea964
NC
5648
5649 hdr = &elf_symtab_hdr (abfd);
5650 localsyms = hdr->sh_info;
5651
5652 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5653 should contain the number of local symbols, which should come before any
5654 global symbols. Mapping symbols are always local. */
5655 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, NULL);
5656
5657 /* No internal symbols read? Skip this BFD. */
5658 if (isymbuf == NULL)
5659 return;
5660
7ff36d1a
SP
5661 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table ((info));
5662
a06ea964
NC
5663 for (i = 0; i < localsyms; i++)
5664 {
5665 Elf_Internal_Sym *isym = &isymbuf[i];
5666 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5667 const char *name;
5668
5669 if (sec != NULL && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5670 {
5671 name = bfd_elf_string_from_elf_section (abfd,
5672 hdr->sh_link,
5673 isym->st_name);
5674
5675 if (bfd_is_aarch64_special_symbol_name
5676 (name, BFD_AARCH64_SPECIAL_SYM_TYPE_MAP))
7ff36d1a
SP
5677 {
5678 elfNN_aarch64_section_map_add (abfd, sec, name[1],
5679 isym->st_value);
5680 if (!htab->c64_output && name[1] == 'c')
5681 htab->c64_output = TRUE;
5682 }
a06ea964
NC
5683 }
5684 }
f0070c1e 5685 elf_aarch64_tdata (abfd)->secmaps_initialised = TRUE;
a06ea964
NC
5686}
5687
37c18eed
SD
5688static void
5689setup_plt_values (struct bfd_link_info *link_info,
5690 aarch64_plt_type plt_type)
5691{
5692 struct elf_aarch64_link_hash_table *globals;
5693 globals = elf_aarch64_hash_table (link_info);
5694
e19e9199
SP
5695 /* Set up plt stubs in case we need C64 PLT. Override BTI/PAC since they're
5696 not compatible. PLT stub sizes are the same as the default ones. */
5697 if (globals->c64_rel)
5698 {
5699 if (plt_type != PLT_NORMAL)
5700 _bfd_error_handler
5701 (_("ignoring C64-incompatible extensions: %s"),
5702 (plt_type == PLT_BTI_PAC ? "BTI, PAC"
5703 : plt_type == PLT_BTI ? "BTI" : "PAC"));
5704
5705 globals->plt0_entry = elfNN_c64_small_plt0_entry;
5706 globals->plt_entry = elfNN_c64_small_plt_entry;
5707 return;
5708 }
5709
1dbade74
SD
5710 if (plt_type == PLT_BTI_PAC)
5711 {
68bb0359 5712 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
1dbade74
SD
5713
5714 /* Only in ET_EXEC we need PLTn with BTI. */
5715 if (bfd_link_pde (link_info))
5716 {
5717 globals->plt_entry_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
5718 globals->plt_entry = elfNN_aarch64_small_plt_bti_pac_entry;
5719 }
5720 else
5721 {
5722 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
5723 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
5724 }
5725 }
5726 else if (plt_type == PLT_BTI)
37c18eed 5727 {
37c18eed 5728 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
37c18eed
SD
5729
5730 /* Only in ET_EXEC we need PLTn with BTI. */
5731 if (bfd_link_pde (link_info))
5732 {
5733 globals->plt_entry_size = PLT_BTI_SMALL_ENTRY_SIZE;
5734 globals->plt_entry = elfNN_aarch64_small_plt_bti_entry;
5735 }
5736 }
1dbade74
SD
5737 else if (plt_type == PLT_PAC)
5738 {
1dbade74
SD
5739 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
5740 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
5741 }
37c18eed
SD
5742}
5743
a06ea964
NC
5744/* Set option values needed during linking. */
5745void
cec5225b 5746bfd_elfNN_aarch64_set_options (struct bfd *output_bfd,
a06ea964
NC
5747 struct bfd_link_info *link_info,
5748 int no_enum_warn,
68fcca92 5749 int no_wchar_warn, int pic_veneer,
4106101c 5750 int fix_erratum_835769,
739b5c9c 5751 erratum_84319_opts fix_erratum_843419,
37c18eed
SD
5752 int no_apply_dynamic_relocs,
5753 aarch64_bti_pac_info bp_info)
a06ea964 5754{
cec5225b 5755 struct elf_aarch64_link_hash_table *globals;
a06ea964 5756
cec5225b 5757 globals = elf_aarch64_hash_table (link_info);
a06ea964 5758 globals->pic_veneer = pic_veneer;
68fcca92 5759 globals->fix_erratum_835769 = fix_erratum_835769;
739b5c9c
TC
5760 /* If the default options are used, then ERRAT_ADR will be set by default
5761 which will enable the ADRP->ADR workaround for the erratum 843419
5762 workaround. */
4106101c 5763 globals->fix_erratum_843419 = fix_erratum_843419;
1f56df9d 5764 globals->no_apply_dynamic_relocs = no_apply_dynamic_relocs;
a1bdea65 5765 globals->c64_rel = 0;
a06ea964
NC
5766
5767 BFD_ASSERT (is_aarch64_elf (output_bfd));
5768 elf_aarch64_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
5769 elf_aarch64_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
37c18eed
SD
5770
5771 switch (bp_info.bti_type)
5772 {
5773 case BTI_WARN:
5774 elf_aarch64_tdata (output_bfd)->no_bti_warn = 0;
5775 elf_aarch64_tdata (output_bfd)->gnu_and_prop
5776 |= GNU_PROPERTY_AARCH64_FEATURE_1_BTI;
5777 break;
5778
5779 default:
5780 break;
5781 }
5782 elf_aarch64_tdata (output_bfd)->plt_type = bp_info.plt_type;
f0070c1e 5783 elf_aarch64_tdata (output_bfd)->secmaps_initialised = FALSE;
a06ea964
NC
5784}
5785
a06ea964
NC
5786static bfd_vma
5787aarch64_calculate_got_entry_vma (struct elf_link_hash_entry *h,
cec5225b 5788 struct elf_aarch64_link_hash_table
a06ea964
NC
5789 *globals, struct bfd_link_info *info,
5790 bfd_vma value, bfd *output_bfd,
5791 bfd_boolean *unresolved_reloc_p)
5792{
5793 bfd_vma off = (bfd_vma) - 1;
5794 asection *basegot = globals->root.sgot;
5795 bfd_boolean dyn = globals->root.dynamic_sections_created;
5796
5797 if (h != NULL)
5798 {
a6bb11b2 5799 BFD_ASSERT (basegot != NULL);
a06ea964
NC
5800 off = h->got.offset;
5801 BFD_ASSERT (off != (bfd_vma) - 1);
0e1862bb
L
5802 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5803 || (bfd_link_pic (info)
a06ea964
NC
5804 && SYMBOL_REFERENCES_LOCAL (info, h))
5805 || (ELF_ST_VISIBILITY (h->other)
5806 && h->root.type == bfd_link_hash_undefweak))
5807 {
5808 /* This is actually a static link, or it is a -Bsymbolic link
5809 and the symbol is defined locally. We must initialize this
5810 entry in the global offset table. Since the offset must
a6bb11b2
YZ
5811 always be a multiple of 8 (4 in the case of ILP32), we use
5812 the least significant bit to record whether we have
5813 initialized it already.
a06ea964
NC
5814 When doing a dynamic link, we create a .rel(a).got relocation
5815 entry to initialize the value. This is done in the
5816 finish_dynamic_symbol routine. */
5817 if ((off & 1) != 0)
5818 off &= ~1;
5819 else
5820 {
cec5225b 5821 bfd_put_NN (output_bfd, value, basegot->contents + off);
a06ea964
NC
5822 h->got.offset |= 1;
5823 }
5824 }
5825 else
5826 *unresolved_reloc_p = FALSE;
5827
5828 off = off + basegot->output_section->vma + basegot->output_offset;
5829 }
5830
5831 return off;
5832}
5833
5834/* Change R_TYPE to a more efficient access model where possible,
5835 return the new reloc type. */
5836
a6bb11b2
YZ
5837static bfd_reloc_code_real_type
5838aarch64_tls_transition_without_check (bfd_reloc_code_real_type r_type,
4ca9b406
SP
5839 struct bfd_link_info *info,
5840 struct elf_link_hash_entry *h,
5841 bfd_boolean morello_reloc)
a06ea964
NC
5842{
5843 bfd_boolean is_local = h == NULL;
a6bb11b2 5844
a06ea964
NC
5845 switch (r_type)
5846 {
4ca9b406
SP
5847 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
5848 return (is_local || !bfd_link_pic (info)
5849 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5850 : r_type);
5851
a6bb11b2 5852 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 5853 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
a6bb11b2
YZ
5854 return (is_local
5855 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5856 : BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21);
5857
389b8029
MS
5858 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
5859 return (is_local
5860 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5861 : r_type);
5862
1ada945d
MS
5863 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
5864 return (is_local
5865 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5866 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
5867
0484b454
RL
5868 case BFD_RELOC_AARCH64_TLSDESC_LDR:
5869 return (is_local
5870 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5871 : BFD_RELOC_AARCH64_NONE);
5872
5873 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
5874 return (is_local
5875 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
5876 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC);
5877
5878 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
5879 return (is_local
5880 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
5881 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1);
5882
4ca9b406
SP
5883 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
5884 return ((is_local || !bfd_link_pie (info)
5885 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type));
5886
a6bb11b2 5887 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
ce336788 5888 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2
YZ
5889 return (is_local
5890 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5891 : BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC);
5892
5893 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
5894 return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 : r_type;
5895
5896 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
5897 return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type;
5898
043bf05a
MS
5899 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
5900 return r_type;
5901
3c12b054
MS
5902 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
5903 return (is_local
5904 ? BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
5905 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
5906
4ca9b406
SP
5907 case BFD_RELOC_MORELLO_TLSDESC_CALL:
5908 return ((is_local || !bfd_link_pie (info))
5909 ? BFD_RELOC_AARCH64_NONE : r_type);
5910
f955cccf 5911 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406
SP
5912 if (morello_reloc && !is_local && bfd_link_pie (info))
5913 return r_type;
5914 /* Fall through. */
5915 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 5916 case BFD_RELOC_AARCH64_TLSDESC_CALL:
4ca9b406
SP
5917 /* Instructions with these relocations will be fully resolved during the
5918 transition into either a NOP in the A64 case or movk and add in
5919 C64. */
a6bb11b2
YZ
5920 return BFD_RELOC_AARCH64_NONE;
5921
259364ad
JW
5922 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
5923 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
5924 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
5925 return is_local ? BFD_RELOC_AARCH64_NONE : r_type;
5926
ac734732
RL
5927#if ARCH_SIZE == 64
5928 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
5929 return is_local
5930 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
5931 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
5932
5933 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
5934 return is_local
5935 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
5936 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
5937#endif
5938
a6bb11b2
YZ
5939 default:
5940 break;
a06ea964
NC
5941 }
5942
5943 return r_type;
5944}
5945
5946static unsigned int
a6bb11b2 5947aarch64_reloc_got_type (bfd_reloc_code_real_type r_type)
a06ea964
NC
5948{
5949 switch (r_type)
5950 {
a6bb11b2
YZ
5951 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
5952 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 5953 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 5954 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 5955 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 5956 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 5957 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 5958 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 5959 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a06ea964
NC
5960 return GOT_NORMAL;
5961
a1bdea65
SP
5962 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
5963 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
5964 return GOT_CAP;
5965
ce336788 5966 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 5967 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 5968 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 5969 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 5970 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 5971 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 5972 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 5973 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
5974 return GOT_TLS_GD;
5975
4ca9b406
SP
5976 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
5977 case BFD_RELOC_MORELLO_TLSDESC_CALL:
5978 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
5979 return GOT_TLSDESC_GD | GOT_CAP;
5980
0484b454 5981 case BFD_RELOC_AARCH64_TLSDESC_ADD:
f955cccf 5982 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 5983 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 5984 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 5985 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a6bb11b2 5986 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 5987 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 5988 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL
5989 case BFD_RELOC_AARCH64_TLSDESC_LDR:
5990 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
5991 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC
5992 return GOT_TLSDESC_GD;
5993
a6bb11b2 5994 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 5995 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 5996 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 5997 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL
5998 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
5999 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC
6000 return GOT_TLS_IE;
6001
a6bb11b2
YZ
6002 default:
6003 break;
a06ea964
NC
6004 }
6005 return GOT_UNKNOWN;
6006}
6007
6008static bfd_boolean
6009aarch64_can_relax_tls (bfd *input_bfd,
6010 struct bfd_link_info *info,
4ca9b406 6011 const Elf_Internal_Rela *rel,
a06ea964
NC
6012 struct elf_link_hash_entry *h,
6013 unsigned long r_symndx)
6014{
6015 unsigned int symbol_got_type;
6016 unsigned int reloc_got_type;
6017
4ca9b406
SP
6018 bfd_reloc_code_real_type bfd_r_type
6019 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
6020 ELFNN_R_TYPE (rel->r_info));
6021
6022 if (! IS_AARCH64_TLS_RELAX_RELOC (bfd_r_type))
a06ea964
NC
6023 return FALSE;
6024
cec5225b 6025 symbol_got_type = elfNN_aarch64_symbol_got_type (h, input_bfd, r_symndx);
4ca9b406 6026 reloc_got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC
6027
6028 if (symbol_got_type == GOT_TLS_IE && GOT_TLS_GD_ANY_P (reloc_got_type))
6029 return TRUE;
6030
6dda7875 6031 if (!bfd_link_executable (info))
a06ea964
NC
6032 return FALSE;
6033
6034 if (h && h->root.type == bfd_link_hash_undefweak)
6035 return FALSE;
6036
6037 return TRUE;
6038}
6039
a6bb11b2
YZ
6040/* Given the relocation code R_TYPE, return the relaxed bfd reloc
6041 enumerator. */
6042
6043static bfd_reloc_code_real_type
a06ea964
NC
6044aarch64_tls_transition (bfd *input_bfd,
6045 struct bfd_link_info *info,
4ca9b406 6046 const Elf_Internal_Rela *rel,
a06ea964
NC
6047 struct elf_link_hash_entry *h,
6048 unsigned long r_symndx)
6049{
a6bb11b2 6050 bfd_reloc_code_real_type bfd_r_type
4ca9b406
SP
6051 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
6052 ELFNN_R_TYPE (rel->r_info));
6053
6054 if (! aarch64_can_relax_tls (input_bfd, info, rel, h, r_symndx))
6055 return bfd_r_type;
a06ea964 6056
4ca9b406
SP
6057 bfd_boolean morello_reloc = (bfd_r_type == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
6058 && (ELFNN_R_TYPE (rel[1].r_info)
6059 == MORELLO_R (TLSDESC_CALL)));
6060
6061 /* GD -> IE is not supported for Morello TLSDESC yet. We do however allow
6062 lowering of GD -> LE for static non-pie executables. XXX It ought to be
6063 safe to do this for A64 as well but it is not implemented yet. */
6064 if (h != NULL && morello_reloc && bfd_link_pie (info))
a6bb11b2
YZ
6065 return bfd_r_type;
6066
4ca9b406
SP
6067 return aarch64_tls_transition_without_check (bfd_r_type, info, h,
6068 morello_reloc);
a06ea964
NC
6069}
6070
6071/* Return the base VMA address which should be subtracted from real addresses
a6bb11b2 6072 when resolving R_AARCH64_TLS_DTPREL relocation. */
a06ea964
NC
6073
6074static bfd_vma
6075dtpoff_base (struct bfd_link_info *info)
6076{
6077 /* If tls_sec is NULL, we should have signalled an error already. */
6078 BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL);
6079 return elf_hash_table (info)->tls_sec->vma;
6080}
6081
a06ea964
NC
6082/* Return the base VMA address which should be subtracted from real addresses
6083 when resolving R_AARCH64_TLS_GOTTPREL64 relocations. */
6084
6085static bfd_vma
6086tpoff_base (struct bfd_link_info *info)
6087{
6088 struct elf_link_hash_table *htab = elf_hash_table (info);
6089
6090 /* If tls_sec is NULL, we should have signalled an error already. */
ac21917f 6091 BFD_ASSERT (htab->tls_sec != NULL);
a06ea964
NC
6092
6093 bfd_vma base = align_power ((bfd_vma) TCB_SIZE,
6094 htab->tls_sec->alignment_power);
6095 return htab->tls_sec->vma - base;
6096}
6097
6098static bfd_vma *
6099symbol_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6100 unsigned long r_symndx)
6101{
6102 /* Calculate the address of the GOT entry for symbol
6103 referred to in h. */
6104 if (h != NULL)
6105 return &h->got.offset;
6106 else
6107 {
6108 /* local symbol */
6109 struct elf_aarch64_local_symbol *l;
6110
cec5225b 6111 l = elf_aarch64_locals (input_bfd);
a06ea964
NC
6112 return &l[r_symndx].got_offset;
6113 }
6114}
6115
6116static void
6117symbol_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6118 unsigned long r_symndx)
6119{
6120 bfd_vma *p;
6121 p = symbol_got_offset_ref (input_bfd, h, r_symndx);
6122 *p |= 1;
6123}
6124
6125static int
6126symbol_got_offset_mark_p (bfd *input_bfd, struct elf_link_hash_entry *h,
6127 unsigned long r_symndx)
6128{
6129 bfd_vma value;
6130 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6131 return value & 1;
6132}
6133
6134static bfd_vma
6135symbol_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6136 unsigned long r_symndx)
6137{
6138 bfd_vma value;
6139 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6140 value &= ~1;
6141 return value;
6142}
6143
6144static bfd_vma *
6145symbol_tlsdesc_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6146 unsigned long r_symndx)
6147{
6148 /* Calculate the address of the GOT entry for symbol
6149 referred to in h. */
6150 if (h != NULL)
6151 {
cec5225b
YZ
6152 struct elf_aarch64_link_hash_entry *eh;
6153 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC
6154 return &eh->tlsdesc_got_jump_table_offset;
6155 }
6156 else
6157 {
6158 /* local symbol */
6159 struct elf_aarch64_local_symbol *l;
6160
cec5225b 6161 l = elf_aarch64_locals (input_bfd);
a06ea964
NC
6162 return &l[r_symndx].tlsdesc_got_jump_table_offset;
6163 }
6164}
6165
6166static void
6167symbol_tlsdesc_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6168 unsigned long r_symndx)
6169{
6170 bfd_vma *p;
6171 p = symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6172 *p |= 1;
6173}
6174
6175static int
6176symbol_tlsdesc_got_offset_mark_p (bfd *input_bfd,
6177 struct elf_link_hash_entry *h,
6178 unsigned long r_symndx)
6179{
6180 bfd_vma value;
6181 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6182 return value & 1;
6183}
6184
6185static bfd_vma
6186symbol_tlsdesc_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6187 unsigned long r_symndx)
6188{
6189 bfd_vma value;
6190 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6191 value &= ~1;
6192 return value;
6193}
6194
68fcca92
JW
6195/* Data for make_branch_to_erratum_835769_stub(). */
6196
6197struct erratum_835769_branch_to_stub_data
6198{
4106101c 6199 struct bfd_link_info *info;
68fcca92
JW
6200 asection *output_section;
6201 bfd_byte *contents;
6202};
6203
6204/* Helper to insert branches to erratum 835769 stubs in the right
6205 places for a particular section. */
6206
6207static bfd_boolean
6208make_branch_to_erratum_835769_stub (struct bfd_hash_entry *gen_entry,
6209 void *in_arg)
6210{
6211 struct elf_aarch64_stub_hash_entry *stub_entry;
6212 struct erratum_835769_branch_to_stub_data *data;
6213 bfd_byte *contents;
6214 unsigned long branch_insn = 0;
6215 bfd_vma veneered_insn_loc, veneer_entry_loc;
6216 bfd_signed_vma branch_offset;
6217 unsigned int target;
6218 bfd *abfd;
6219
6220 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6221 data = (struct erratum_835769_branch_to_stub_data *) in_arg;
6222
6223 if (stub_entry->target_section != data->output_section
6224 || stub_entry->stub_type != aarch64_stub_erratum_835769_veneer)
6225 return TRUE;
6226
6227 contents = data->contents;
6228 veneered_insn_loc = stub_entry->target_section->output_section->vma
6229 + stub_entry->target_section->output_offset
6230 + stub_entry->target_value;
6231 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6232 + stub_entry->stub_sec->output_offset
6233 + stub_entry->stub_offset;
6234 branch_offset = veneer_entry_loc - veneered_insn_loc;
6235
6236 abfd = stub_entry->target_section->owner;
6237 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6238 _bfd_error_handler
90b6238f 6239 (_("%pB: error: erratum 835769 stub out "
4eca0228 6240 "of range (input file too large)"), abfd);
68fcca92
JW
6241
6242 target = stub_entry->target_value;
6243 branch_insn = 0x14000000;
6244 branch_offset >>= 2;
6245 branch_offset &= 0x3ffffff;
6246 branch_insn |= branch_offset;
6247 bfd_putl32 (branch_insn, &contents[target]);
6248
6249 return TRUE;
6250}
6251
4106101c
MS
6252
6253static bfd_boolean
6254_bfd_aarch64_erratum_843419_branch_to_stub (struct bfd_hash_entry *gen_entry,
6255 void *in_arg)
6256{
6257 struct elf_aarch64_stub_hash_entry *stub_entry
6258 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6259 struct erratum_835769_branch_to_stub_data *data
6260 = (struct erratum_835769_branch_to_stub_data *) in_arg;
6261 struct bfd_link_info *info;
6262 struct elf_aarch64_link_hash_table *htab;
6263 bfd_byte *contents;
6264 asection *section;
6265 bfd *abfd;
6266 bfd_vma place;
6267 uint32_t insn;
6268
6269 info = data->info;
6270 contents = data->contents;
6271 section = data->output_section;
6272
6273 htab = elf_aarch64_hash_table (info);
6274
6275 if (stub_entry->target_section != section
6276 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer)
6277 return TRUE;
6278
739b5c9c
TC
6279 BFD_ASSERT (((htab->fix_erratum_843419 & ERRAT_ADRP) && stub_entry->stub_sec)
6280 || (htab->fix_erratum_843419 & ERRAT_ADR));
6281
6282 /* Only update the stub section if we have one. We should always have one if
6283 we're allowed to use the ADRP errata workaround, otherwise it is not
6284 required. */
6285 if (stub_entry->stub_sec)
6286 {
6287 insn = bfd_getl32 (contents + stub_entry->target_value);
6288 bfd_putl32 (insn,
6289 stub_entry->stub_sec->contents + stub_entry->stub_offset);
6290 }
4106101c
MS
6291
6292 place = (section->output_section->vma + section->output_offset
6293 + stub_entry->adrp_offset);
6294 insn = bfd_getl32 (contents + stub_entry->adrp_offset);
6295
9fca35fc 6296 if (!_bfd_aarch64_adrp_p (insn))
4106101c
MS
6297 abort ();
6298
6299 bfd_signed_vma imm =
6300 (_bfd_aarch64_sign_extend
6301 ((bfd_vma) _bfd_aarch64_decode_adrp_imm (insn) << 12, 33)
6302 - (place & 0xfff));
6303
739b5c9c 6304 if ((htab->fix_erratum_843419 & ERRAT_ADR)
4106101c
MS
6305 && (imm >= AARCH64_MIN_ADRP_IMM && imm <= AARCH64_MAX_ADRP_IMM))
6306 {
92504105 6307 insn = (_bfd_aarch64_reencode_adr_imm (AARCH64_ADR_OP, imm, 0)
4106101c
MS
6308 | AARCH64_RT (insn));
6309 bfd_putl32 (insn, contents + stub_entry->adrp_offset);
739b5c9c
TC
6310 /* Stub is not needed, don't map it out. */
6311 stub_entry->stub_type = aarch64_stub_none;
4106101c 6312 }
739b5c9c 6313 else if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS
6314 {
6315 bfd_vma veneered_insn_loc;
6316 bfd_vma veneer_entry_loc;
6317 bfd_signed_vma branch_offset;
6318 uint32_t branch_insn;
6319
6320 veneered_insn_loc = stub_entry->target_section->output_section->vma
6321 + stub_entry->target_section->output_offset
6322 + stub_entry->target_value;
6323 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6324 + stub_entry->stub_sec->output_offset
6325 + stub_entry->stub_offset;
6326 branch_offset = veneer_entry_loc - veneered_insn_loc;
6327
6328 abfd = stub_entry->target_section->owner;
6329 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6330 _bfd_error_handler
90b6238f 6331 (_("%pB: error: erratum 843419 stub out "
4106101c
MS
6332 "of range (input file too large)"), abfd);
6333
6334 branch_insn = 0x14000000;
6335 branch_offset >>= 2;
6336 branch_offset &= 0x3ffffff;
6337 branch_insn |= branch_offset;
6338 bfd_putl32 (branch_insn, contents + stub_entry->target_value);
6339 }
739b5c9c
TC
6340 else
6341 {
6342 abfd = stub_entry->target_section->owner;
6343 _bfd_error_handler
64672071 6344 (_("%pB: error: erratum 843419 immediate 0x%" BFD_VMA_FMT "x "
739b5c9c
TC
6345 "out of range for ADR (input file too large) and "
6346 "--fix-cortex-a53-843419=adr used. Run the linker with "
6347 "--fix-cortex-a53-843419=full instead"), abfd, imm);
6348 bfd_set_error (bfd_error_bad_value);
6349 /* This function is called inside a hashtable traversal and the error
6350 handlers called above turn into non-fatal errors. Which means this
6351 case ld returns an exit code 0 and also produces a broken object file.
6352 To prevent this, issue a hard abort. */
6353 BFD_FAIL ();
6354 }
4106101c
MS
6355 return TRUE;
6356}
6357
6358
68fcca92
JW
6359static bfd_boolean
6360elfNN_aarch64_write_section (bfd *output_bfd ATTRIBUTE_UNUSED,
6361 struct bfd_link_info *link_info,
6362 asection *sec,
6363 bfd_byte *contents)
6364
6365{
6366 struct elf_aarch64_link_hash_table *globals =
f872121a 6367 elf_aarch64_hash_table (link_info);
68fcca92
JW
6368
6369 if (globals == NULL)
6370 return FALSE;
6371
6372 /* Fix code to point to erratum 835769 stubs. */
6373 if (globals->fix_erratum_835769)
6374 {
6375 struct erratum_835769_branch_to_stub_data data;
6376
4106101c 6377 data.info = link_info;
68fcca92
JW
6378 data.output_section = sec;
6379 data.contents = contents;
6380 bfd_hash_traverse (&globals->stub_hash_table,
6381 make_branch_to_erratum_835769_stub, &data);
6382 }
6383
4106101c
MS
6384 if (globals->fix_erratum_843419)
6385 {
6386 struct erratum_835769_branch_to_stub_data data;
6387
6388 data.info = link_info;
6389 data.output_section = sec;
6390 data.contents = contents;
6391 bfd_hash_traverse (&globals->stub_hash_table,
6392 _bfd_aarch64_erratum_843419_branch_to_stub, &data);
6393 }
6394
68fcca92
JW
6395 return FALSE;
6396}
6397
2aff25ba
JW
6398/* Return TRUE if RELOC is a relocation against the base of GOT table. */
6399
6400static bfd_boolean
6401aarch64_relocation_aginst_gp_p (bfd_reloc_code_real_type reloc)
6402{
6403 return (reloc == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
6404 || reloc == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
6405 || reloc == BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
6406 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
6407 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G1);
6408}
6409
40bbb79e
SP
6410/* Build capability meta data, i.e. size and permissions for a capability. */
6411
6412static bfd_vma
e10c835d 6413cap_meta (size_t size, const asection *sec, bfd_boolean *guessed)
40bbb79e
SP
6414{
6415
6416 if (size >= (1ULL << 56))
6417 return (bfd_vma) -1;
6418
b235f0e0
MM
6419 /* N.b. We are only ever using this function for Morello.
6420 Morello is little-endian.
6421 We are returning a 64bit sized integer.
6422 The format this metadata is supposed to fit is
6423 | 56 bit length | 8 bit permissions |
6424 This means that (in little endian layout) we need to put the 56 bit size
6425 in the *lower* bits of the uint64_t. */
6426 uint64_t flags = 0;
40bbb79e 6427 if (sec->flags & SEC_CODE)
b235f0e0
MM
6428 flags = 4;
6429 else if (sec->flags & SEC_READONLY
6430 || sec->flags & SEC_ROM)
6431 flags = 1;
6432 else if (sec->flags & SEC_ALLOC)
6433 flags = 2;
40bbb79e 6434
e10c835d
MM
6435 /* We should usually be able to derive a valid set of permissions
6436 from the section flags. We know that when a relocation is against an
6437 SHN_ABS symbol the section has no associated flags and we must guess.
6438
6439 As it stands we don't know of any other instances where we do not have
6440 permission flags on a section. We choose to allow instances that we do
6441 not know of rather than abort on them so that if the guess is correct we
6442 don't hamper anyone progressing. */
b235f0e0 6443 if (flags == 0)
e10c835d
MM
6444 {
6445 flags = 2;
6446 *guessed = TRUE;
6447 }
6448
b235f0e0 6449 return size | (flags << 56);
40bbb79e
SP
6450}
6451
5fa80905
AC
6452enum c64_section_perm_type {
6453 C64_SYM_UNKNOWN = 0,
6454 C64_SYM_STANDARD,
6455 C64_SYM_LINKER_DEF,
6456 C64_SYM_LDSCRIPT_DEF,
6457 C64_SYM_LDSCRIPT_START,
6458};
6459
6460static enum c64_section_perm_type
6461c64_symbol_section_adjustment (struct elf_link_hash_entry *h, bfd_vma value,
6462 asection *sym_sec, asection **ret_sec,
6463 struct bfd_link_info *info)
6464{
6465 if (!sym_sec)
6466 return C64_SYM_UNKNOWN;
6467
6468 *ret_sec = sym_sec;
6469 if (!h)
6470 return C64_SYM_STANDARD;
6471
6472 /* Linker defined symbols are always at the start of the section they
6473 track. */
6474 if (h->root.linker_def)
6475 return C64_SYM_LINKER_DEF;
6476 else if (h->root.ldscript_def)
6477 {
6478 const char *name = h->root.root.string;
6479 size_t len = strlen (name);
6480
6481 bfd_vma size = sym_sec->size - (value - sym_sec->vma);
6482 /* The special case: the symbol is at the end of the section.
6483 This could either mean that it is an end symbol or it is the
6484 start of the output section following the symbol. We try to
6485 guess if it is a start of the next section by reading its
6486 name. This is a compatibility hack, ideally linker scripts
6487 should be written such that start symbols are defined within
6488 the output section it intends to track. */
6489 if (size == 0
6490 && (len > 8 && name[0] == '_' && name[1] == '_'
6491 && (!strncmp (name + 2, "start_", 6)
6492 || !strcmp (name + len - 6, "_start"))))
6493 {
6494 asection *s = bfd_sections_find_if (info->output_bfd,
6495 section_start_symbol,
6496 &value);
6497 if (s != NULL)
6498 {
6499 *ret_sec = s;
6500 return C64_SYM_LDSCRIPT_START;
6501 }
6502 }
6503 return C64_SYM_LDSCRIPT_DEF;
6504 }
6505 return C64_SYM_STANDARD;
6506}
6507
40bbb79e
SP
6508static bfd_reloc_status_type
6509c64_fixup_frag (bfd *input_bfd, struct bfd_link_info *info,
e10c835d
MM
6510 bfd_reloc_code_real_type bfd_r_type, Elf_Internal_Sym *sym,
6511 struct elf_link_hash_entry *h, asection *sym_sec,
6512 asection *reloc_sec, bfd_byte *frag_loc, bfd_vma value,
6513 bfd_signed_vma addend, bfd_vma r_offset)
40bbb79e 6514{
5fa80905
AC
6515 BFD_ASSERT (h || sym);
6516 bfd_vma size = sym ? sym->st_size : h->size;
40bbb79e
SP
6517 asection *perm_sec = sym_sec;
6518 bfd_boolean bounds_ok = FALSE;
6519
e10c835d
MM
6520 const int aarch64_reloc_idx = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
6521 const char *reloc_name = elfNN_aarch64_howto_table[aarch64_reloc_idx].name;
7401203c
MM
6522 const char *sym_name;
6523
6524 if (sym)
6525 {
6526 Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (input_bfd);
6527 sym_name = (bfd_elf_string_from_elf_section (input_bfd,
6528 symtab_hdr->sh_link,
6529 sym->st_name));
6530 }
6531 else
6532 sym_name = h->root.root.string;
6533
5fa80905 6534 if (size == 0 && sym_sec)
40bbb79e 6535 {
5fa80905
AC
6536 bounds_ok = TRUE;
6537 enum c64_section_perm_type type
6538 = c64_symbol_section_adjustment (h, value, sym_sec, &perm_sec, info);
40bbb79e 6539
5fa80905 6540 switch (type)
40bbb79e 6541 {
5fa80905
AC
6542 case C64_SYM_STANDARD:
6543 break;
6544 case C64_SYM_LINKER_DEF:
6545 size = perm_sec->output_section->size;
6546 break;
6547 case C64_SYM_LDSCRIPT_DEF:
6548 size = perm_sec->size - (value - perm_sec->vma);
6549 break;
6550 case C64_SYM_LDSCRIPT_START:
6551 size = perm_sec->size;
6552 break;
6553 default:
6554 abort ();
40bbb79e
SP
6555 }
6556 }
6557
6558 /* Negative addends are not allowed for capability symbols. */
6559 if (addend < 0 || (bfd_vma) addend > size)
6560 return bfd_reloc_outofrange;
6561
5fa80905 6562 bfd_vma base = value, limit = value + size;
5a9e7a18 6563 unsigned align = 0;
40bbb79e 6564
5a9e7a18 6565 if (!bounds_ok && !c64_valid_cap_range (&base, &limit, &align))
40bbb79e 6566 {
7401203c
MM
6567 /* Just warn about this. It's not a requirement that bounds on
6568 objects should be precise, so there's no reason to error out on
6569 such an object. */
40bbb79e 6570 /* xgettext:c-format */
7401203c
MM
6571 _bfd_error_handler
6572 (_("%pB: capability range for '%s' may exceed object bounds"),
6573 input_bfd, sym_name);
40bbb79e
SP
6574 }
6575
5fa80905
AC
6576 if (perm_sec && perm_sec->flags & SEC_CODE)
6577 {
6578 /* Any symbol pointing into an executable section gets bounds according
6579 to PCC. In this case the relocation is set up so that the value is
6580 the base of the PCC, the addend is the offset from the PCC base to the
6581 VA that we want, and the size is the length of the PCC range.
6582 In this function we only use `value` to check the bounds make sense,
6583 which is somewhat superfluous when we're using pcc_high and pcc_low
6584 since we already enforced that in elfNN_c64_resize_sections. No harm
6585 in instead checking that the bounds on the object that were requested
6586 made sense even if they were overridden because this symbol points
6587 into an executable section.
6588
6589 `size` on the other hand is part of the fragment that we output to and
6590 we need to change it in order to have functions that can access global
6591 data or jump to other functions. */
6592 size = pcc_high - pcc_low;
6593 }
6594
40bbb79e
SP
6595 if (perm_sec != NULL)
6596 {
e10c835d
MM
6597 bfd_boolean permissions_guessed = FALSE;
6598 bfd_vma frag = cap_meta (size, perm_sec, &permissions_guessed);
40bbb79e
SP
6599
6600 if (frag == (bfd_vma) -1)
6601 return bfd_reloc_outofrange;
6602
e10c835d
MM
6603 if (permissions_guessed)
6604 {
6605 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): "
6606 "warning: relocation %s against symbol '%s' in "
6607 "section without permission flags '%s'. "
6608 "Assuming Read-Write."),
6609 input_bfd, reloc_sec, r_offset, reloc_name,
6610 sym_name, perm_sec->name);
6611 }
6612
40bbb79e
SP
6613 bfd_put_64 (input_bfd, frag, frag_loc);
6614 }
6615
6616 return bfd_reloc_continue;
5fa80905 6617}
40bbb79e 6618
5fa80905
AC
6619/* Given either a local symbol SYM or global symbol H, do we need to adjust
6620 capability relocations against the symbol due to the fact that it points to
6621 a code section? */
6622static bfd_boolean
6623c64_symbol_adjust (struct elf_link_hash_entry *h,
6624 bfd_vma value, asection *sym_sec, struct bfd_link_info *info,
6625 bfd_vma *adjust_addr)
6626{
6627 asection *tmp_sec;
6628 enum c64_section_perm_type type
6629 = c64_symbol_section_adjustment (h, value, sym_sec, &tmp_sec, info);
6630
6631 if (type == C64_SYM_UNKNOWN)
6632 return FALSE;
6633
6634 if (tmp_sec->flags & SEC_CODE)
40bbb79e 6635 {
5fa80905
AC
6636 *adjust_addr = pcc_low;
6637 return TRUE;
40bbb79e 6638 }
5fa80905
AC
6639
6640 return FALSE;
40bbb79e
SP
6641}
6642
4e7fbb34
JW
6643/* Perform a relocation as part of a final link. The input relocation type
6644 should be TLS relaxed. */
6645
a06ea964 6646static bfd_reloc_status_type
cec5225b 6647elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
a06ea964
NC
6648 bfd *input_bfd,
6649 bfd *output_bfd,
6650 asection *input_section,
6651 bfd_byte *contents,
6652 Elf_Internal_Rela *rel,
6653 bfd_vma value,
6654 struct bfd_link_info *info,
6655 asection *sym_sec,
6656 struct elf_link_hash_entry *h,
6657 bfd_boolean *unresolved_reloc_p,
6658 bfd_boolean save_addend,
1419bbe5
WN
6659 bfd_vma *saved_addend,
6660 Elf_Internal_Sym *sym)
a06ea964 6661{
1419bbe5 6662 Elf_Internal_Shdr *symtab_hdr;
a06ea964 6663 unsigned int r_type = howto->type;
a6bb11b2
YZ
6664 bfd_reloc_code_real_type bfd_r_type
6665 = elfNN_aarch64_bfd_reloc_from_howto (howto);
a06ea964
NC
6666 unsigned long r_symndx;
6667 bfd_byte *hit_data = contents + rel->r_offset;
96d01d93 6668 bfd_vma place, off, got_entry_addr = 0;
a06ea964 6669 bfd_signed_vma signed_addend;
cec5225b 6670 struct elf_aarch64_link_hash_table *globals;
a06ea964 6671 bfd_boolean weak_undef_p;
ff07562f 6672 bfd_boolean relative_reloc;
b53b1bed 6673 asection *base_got;
ff07562f 6674 bfd_vma orig_value = value;
ddb7fd0f 6675 bfd_boolean resolved_to_zero;
0c1ded8d 6676 bfd_boolean abs_symbol_p;
f0070c1e 6677 Elf_Internal_Sym *isym = NULL;
50e192f0
SP
6678 bfd_boolean c64_rtype = FALSE;
6679 bfd_boolean to_c64 = FALSE;
a06ea964 6680
cec5225b 6681 globals = elf_aarch64_hash_table (info);
a06ea964 6682
1419bbe5
WN
6683 symtab_hdr = &elf_symtab_hdr (input_bfd);
6684
a06ea964
NC
6685 BFD_ASSERT (is_aarch64_elf (input_bfd));
6686
cec5225b 6687 r_symndx = ELFNN_R_SYM (rel->r_info);
a06ea964 6688
a06ea964
NC
6689 place = input_section->output_section->vma
6690 + input_section->output_offset + rel->r_offset;
6691
6692 /* Get addend, accumulating the addend for consecutive relocs
6693 which refer to the same offset. */
6694 signed_addend = saved_addend ? *saved_addend : 0;
6695 signed_addend += rel->r_addend;
6696
6697 weak_undef_p = (h ? h->root.type == bfd_link_hash_undefweak
6698 : bfd_is_und_section (sym_sec));
c691de6a 6699 abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
0c1ded8d 6700
f0070c1e 6701 if (sym)
50e192f0
SP
6702 {
6703 isym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
6704 r_symndx);
6705 BFD_ASSERT (isym != NULL);
6706 to_c64 = (isym->st_target_internal & ST_BRANCH_TO_C64) != 0;
6707 }
6708 else
6709 to_c64 = (h->target_internal & ST_BRANCH_TO_C64) != 0;
f0070c1e 6710
a6bb11b2 6711
1419bbe5
WN
6712 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle
6713 it here if it is defined in a non-shared object. */
6714 if (h != NULL
6715 && h->type == STT_GNU_IFUNC
6716 && h->def_regular)
6717 {
6718 asection *plt;
6719 const char *name;
99ad26cb 6720 bfd_vma addend = 0;
1419bbe5 6721
545bc2b3
SN
6722 if ((input_section->flags & SEC_ALLOC) == 0)
6723 {
f657f8c4
NC
6724 /* If this is a SHT_NOTE section without SHF_ALLOC, treat
6725 STT_GNU_IFUNC symbol as STT_FUNC. */
6726 if (elf_section_type (input_section) == SHT_NOTE)
6727 goto skip_ifunc;
6728
545bc2b3
SN
6729 /* Dynamic relocs are not propagated for SEC_DEBUGGING
6730 sections because such sections are not SEC_ALLOC and
6731 thus ld.so will not process them. */
6732 if ((input_section->flags & SEC_DEBUGGING) != 0)
6733 return bfd_reloc_ok;
6734
6735 if (h->root.root.string)
6736 name = h->root.root.string;
6737 else
6738 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, NULL);
6739 _bfd_error_handler
6740 /* xgettext:c-format */
2dcf00ce
AM
6741 (_("%pB(%pA+%#" PRIx64 "): "
6742 "unresolvable %s relocation against symbol `%s'"),
6743 input_bfd, input_section, (uint64_t) rel->r_offset,
6744 howto->name, name);
545bc2b3 6745 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6746 return bfd_reloc_notsupported;
545bc2b3
SN
6747 }
6748 else if (h->plt.offset == (bfd_vma) -1)
6749 goto bad_ifunc_reloc;
1419bbe5
WN
6750
6751 /* STT_GNU_IFUNC symbol must go through PLT. */
6752 plt = globals->root.splt ? globals->root.splt : globals->root.iplt;
6753 value = (plt->output_section->vma + plt->output_offset + h->plt.offset);
6754
6755 switch (bfd_r_type)
6756 {
6757 default:
dc1e8a47 6758 bad_ifunc_reloc:
1419bbe5
WN
6759 if (h->root.root.string)
6760 name = h->root.root.string;
6761 else
6762 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
6763 NULL);
4eca0228 6764 _bfd_error_handler
695344c0 6765 /* xgettext:c-format */
871b3ab2 6766 (_("%pB: relocation %s against STT_GNU_IFUNC "
1419bbe5
WN
6767 "symbol `%s' isn't handled by %s"), input_bfd,
6768 howto->name, name, __FUNCTION__);
6769 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6770 return bfd_reloc_notsupported;
1419bbe5
WN
6771
6772 case BFD_RELOC_AARCH64_NN:
6773 if (rel->r_addend != 0)
6774 {
6775 if (h->root.root.string)
6776 name = h->root.root.string;
6777 else
6778 name = bfd_elf_sym_name (input_bfd, symtab_hdr,
6779 sym, NULL);
4eca0228 6780 _bfd_error_handler
695344c0 6781 /* xgettext:c-format */
871b3ab2 6782 (_("%pB: relocation %s against STT_GNU_IFUNC "
2dcf00ce
AM
6783 "symbol `%s' has non-zero addend: %" PRId64),
6784 input_bfd, howto->name, name, (int64_t) rel->r_addend);
1419bbe5 6785 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6786 return bfd_reloc_notsupported;
1419bbe5
WN
6787 }
6788
6789 /* Generate dynamic relocation only when there is a
6790 non-GOT reference in a shared object. */
0e1862bb 6791 if (bfd_link_pic (info) && h->non_got_ref)
1419bbe5
WN
6792 {
6793 Elf_Internal_Rela outrel;
6794 asection *sreloc;
6795
6796 /* Need a dynamic relocation to get the real function
6797 address. */
6798 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
6799 info,
6800 input_section,
6801 rel->r_offset);
6802 if (outrel.r_offset == (bfd_vma) -1
6803 || outrel.r_offset == (bfd_vma) -2)
6804 abort ();
6805
6806 outrel.r_offset += (input_section->output_section->vma
6807 + input_section->output_offset);
6808
6809 if (h->dynindx == -1
6810 || h->forced_local
0e1862bb 6811 || bfd_link_executable (info))
1419bbe5
WN
6812 {
6813 /* This symbol is resolved locally. */
e19e9199
SP
6814 outrel.r_info = (elf_aarch64_hash_entry (h)->got_type
6815 == GOT_CAP
6816 ? ELFNN_R_INFO (0, MORELLO_R (IRELATIVE))
6817 : ELFNN_R_INFO (0, AARCH64_R (IRELATIVE)));
1419bbe5
WN
6818 outrel.r_addend = (h->root.u.def.value
6819 + h->root.u.def.section->output_section->vma
6820 + h->root.u.def.section->output_offset);
6821 }
6822 else
6823 {
6824 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
6825 outrel.r_addend = 0;
6826 }
6827
6828 sreloc = globals->root.irelifunc;
6829 elf_append_rela (output_bfd, sreloc, &outrel);
6830
6831 /* If this reloc is against an external symbol, we
6832 do not want to fiddle with the addend. Otherwise,
6833 we need to include the symbol value so that it
6834 becomes an addend for the dynamic reloc. For an
6835 internal symbol, we have updated addend. */
6836 return bfd_reloc_ok;
6837 }
6838 /* FALLTHROUGH */
e19e9199
SP
6839 case BFD_RELOC_MORELLO_CALL26:
6840 case BFD_RELOC_MORELLO_JUMP26:
1419bbe5 6841 case BFD_RELOC_AARCH64_CALL26:
ce336788 6842 case BFD_RELOC_AARCH64_JUMP26:
652afeef
TC
6843 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
6844 place, value,
1419bbe5
WN
6845 signed_addend,
6846 weak_undef_p);
6847 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
6848 howto, value);
1419bbe5 6849 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 6850 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
1419bbe5 6851 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 6852 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 6853 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 6854 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
dc8008f5 6855 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 6856 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a2e1db00 6857 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
ce336788 6858 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 6859 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
1419bbe5
WN
6860 base_got = globals->root.sgot;
6861 off = h->got.offset;
6862
6863 if (base_got == NULL)
6864 abort ();
6865
6866 if (off == (bfd_vma) -1)
6867 {
6868 bfd_vma plt_index;
6869
6870 /* We can't use h->got.offset here to save state, or
6871 even just remember the offset, as finish_dynamic_symbol
6872 would use that as offset into .got. */
6873
6874 if (globals->root.splt != NULL)
6875 {
b1ee0cc4
WN
6876 plt_index = ((h->plt.offset - globals->plt_header_size) /
6877 globals->plt_entry_size);
a1bdea65 6878 off = (plt_index + 3) * GOT_ENTRY_SIZE (globals);
1419bbe5
WN
6879 base_got = globals->root.sgotplt;
6880 }
6881 else
6882 {
6883 plt_index = h->plt.offset / globals->plt_entry_size;
a1bdea65 6884 off = plt_index * GOT_ENTRY_SIZE (globals);
1419bbe5
WN
6885 base_got = globals->root.igotplt;
6886 }
6887
6888 if (h->dynindx == -1
6889 || h->forced_local
6890 || info->symbolic)
6891 {
6892 /* This references the local definition. We must
6893 initialize this entry in the global offset table.
6894 Since the offset must always be a multiple of 8,
6895 we use the least significant bit to record
6896 whether we have initialized it already.
6897
6898 When doing a dynamic link, we create a .rela.got
6899 relocation entry to initialize the value. This
6900 is done in the finish_dynamic_symbol routine. */
6901 if ((off & 1) != 0)
6902 off &= ~1;
6903 else
6904 {
6905 bfd_put_NN (output_bfd, value,
6906 base_got->contents + off);
6907 /* Note that this is harmless as -1 | 1 still is -1. */
6908 h->got.offset |= 1;
6909 }
6910 }
6911 value = (base_got->output_section->vma
6912 + base_got->output_offset + off);
6913 }
6914 else
6915 value = aarch64_calculate_got_entry_vma (h, globals, info,
6916 value, output_bfd,
6917 unresolved_reloc_p);
a0becb89 6918
2aff25ba
JW
6919 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
6920 addend = (globals->root.sgot->output_section->vma
6921 + globals->root.sgot->output_offset);
a0becb89 6922
652afeef
TC
6923 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
6924 place, value,
99ad26cb 6925 addend, weak_undef_p);
1419bbe5 6926 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type, howto, value);
1419bbe5 6927 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 6928 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 6929 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5
WN
6930 break;
6931 }
6932 }
6933
f657f8c4 6934 skip_ifunc:
ddb7fd0f
L
6935 resolved_to_zero = (h != NULL
6936 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
6937
a6bb11b2 6938 switch (bfd_r_type)
a06ea964 6939 {
a6bb11b2 6940 case BFD_RELOC_AARCH64_NONE:
0484b454 6941 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 6942 case BFD_RELOC_AARCH64_TLSDESC_CALL:
0484b454 6943 case BFD_RELOC_AARCH64_TLSDESC_LDR:
4ca9b406 6944 case BFD_RELOC_MORELLO_TLSDESC_CALL:
a06ea964
NC
6945 *unresolved_reloc_p = FALSE;
6946 return bfd_reloc_ok;
6947
a6bb11b2 6948 case BFD_RELOC_AARCH64_NN:
a06ea964
NC
6949
6950 /* When generating a shared object or relocatable executable, these
07d6d2b8
AM
6951 relocations are copied into the output file to be resolved at
6952 run time. */
6353d82b
JW
6953 if (((bfd_link_pic (info)
6954 || globals->root.is_relocatable_executable)
6955 && (input_section->flags & SEC_ALLOC)
6956 && (h == NULL
ddb7fd0f
L
6957 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6958 && !resolved_to_zero)
6353d82b
JW
6959 || h->root.type != bfd_link_hash_undefweak))
6960 /* Or we are creating an executable, we may need to keep relocations
6961 for symbols satisfied by a dynamic library if we manage to avoid
6962 copy relocs for the symbol. */
6963 || (ELIMINATE_COPY_RELOCS
6964 && !bfd_link_pic (info)
6965 && h != NULL
6966 && (input_section->flags & SEC_ALLOC)
6967 && h->dynindx != -1
6968 && !h->non_got_ref
6969 && ((h->def_dynamic
6970 && !h->def_regular)
6971 || h->root.type == bfd_link_hash_undefweak
6972 || h->root.type == bfd_link_hash_undefined)))
a06ea964
NC
6973 {
6974 Elf_Internal_Rela outrel;
6975 bfd_byte *loc;
6976 bfd_boolean skip, relocate;
6977 asection *sreloc;
6978
6979 *unresolved_reloc_p = FALSE;
6980
a06ea964
NC
6981 skip = FALSE;
6982 relocate = FALSE;
6983
6984 outrel.r_addend = signed_addend;
6985 outrel.r_offset =
6986 _bfd_elf_section_offset (output_bfd, info, input_section,
6987 rel->r_offset);
6988 if (outrel.r_offset == (bfd_vma) - 1)
6989 skip = TRUE;
6990 else if (outrel.r_offset == (bfd_vma) - 2)
6991 {
6992 skip = TRUE;
6993 relocate = TRUE;
6994 }
0c1ded8d
RL
6995 else if (abs_symbol_p)
6996 {
6997 /* Local absolute symbol. */
6998 skip = (h->forced_local || (h->dynindx == -1));
6999 relocate = skip;
7000 }
a06ea964
NC
7001
7002 outrel.r_offset += (input_section->output_section->vma
7003 + input_section->output_offset);
7004
7005 if (skip)
7006 memset (&outrel, 0, sizeof outrel);
7007 else if (h != NULL
7008 && h->dynindx != -1
0e1862bb 7009 && (!bfd_link_pic (info)
0c1ded8d 7010 || !(bfd_link_pie (info) || SYMBOLIC_BIND (info, h))
0e1862bb 7011 || !h->def_regular))
cec5225b 7012 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
a06ea964
NC
7013 else
7014 {
7015 int symbol;
7016
7017 /* On SVR4-ish systems, the dynamic loader cannot
7018 relocate the text and data segments independently,
7019 so the symbol does not matter. */
7020 symbol = 0;
1f56df9d 7021 relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE;
a6bb11b2 7022 outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE));
a06ea964
NC
7023 outrel.r_addend += value;
7024 }
7025
1419bbe5
WN
7026 sreloc = elf_section_data (input_section)->sreloc;
7027 if (sreloc == NULL || sreloc->contents == NULL)
7028 return bfd_reloc_notsupported;
7029
7030 loc = sreloc->contents + sreloc->reloc_count++ * RELOC_SIZE (globals);
cec5225b 7031 bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc);
a06ea964 7032
1419bbe5 7033 if (sreloc->reloc_count * RELOC_SIZE (globals) > sreloc->size)
a06ea964
NC
7034 {
7035 /* Sanity to check that we have previously allocated
7036 sufficient space in the relocation section for the
7037 number of relocations we actually want to emit. */
7038 abort ();
7039 }
7040
7041 /* If this reloc is against an external symbol, we do not want to
7042 fiddle with the addend. Otherwise, we need to include the symbol
7043 value so that it becomes an addend for the dynamic reloc. */
7044 if (!relocate)
7045 return bfd_reloc_ok;
7046
7047 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7048 contents, rel->r_offset, value,
7049 signed_addend);
7050 }
7051 else
7052 value += signed_addend;
7053 break;
7054
e19e9199
SP
7055 case BFD_RELOC_MORELLO_CALL26:
7056 case BFD_RELOC_MORELLO_JUMP26:
a6bb11b2 7057 case BFD_RELOC_AARCH64_CALL26:
ce336788 7058 case BFD_RELOC_AARCH64_JUMP26:
a06ea964
NC
7059 {
7060 asection *splt = globals->root.splt;
c7cd2917
SP
7061 bfd_boolean via_plt_p =
7062 splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1;
a06ea964
NC
7063
7064 /* A call to an undefined weak symbol is converted to a jump to
7065 the next instruction unless a PLT entry will be created.
7066 The jump to the next instruction is optimized as a NOP.
7067 Do the same for local undefined symbols. */
7068 if (weak_undef_p && ! via_plt_p)
7069 {
7070 bfd_putl32 (INSN_NOP, hit_data);
7071 return bfd_reloc_ok;
7072 }
7073
7074 /* If the call goes through a PLT entry, make sure to
7075 check distance to the right destination address. */
7076 if (via_plt_p)
07f9ddfe
JW
7077 value = (splt->output_section->vma
7078 + splt->output_offset + h->plt.offset);
7079
7080 /* Check if a stub has to be inserted because the destination
7081 is too far away. */
7082 struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
2f340668 7083
50e192f0
SP
7084 enum elf_aarch64_stub_type c64_stub = aarch64_stub_none;
7085
7086 /* Figure out if we need an interworking stub and if yes, what
7087 kind. */
7088 if (!via_plt_p)
7089 c64_stub = aarch64_interwork_stub (r_type, to_c64);
7090
2f340668
JW
7091 /* If the branch destination is directed to plt stub, "value" will be
7092 the final destination, otherwise we should plus signed_addend, it may
7093 contain non-zero value, for example call to local function symbol
7094 which are turned into "sec_sym + sec_off", and sec_off is kept in
7095 signed_addend. */
50e192f0
SP
7096 if (c64_stub != aarch64_stub_none
7097 || (aarch64_branch_reloc_p (r_type)
7098 && !aarch64_valid_branch_p ((via_plt_p ? value
7099 : value + signed_addend), place)))
7100 {
7101 /* The target is out of reach, so redirect the branch to
7102 the local stub for this function. */
7103 stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec,
7104 h, rel, globals,
7105 c64_stub);
7106 }
7107
07f9ddfe 7108 if (stub_entry != NULL)
2f340668
JW
7109 {
7110 value = (stub_entry->stub_offset
7111 + stub_entry->stub_sec->output_offset
7112 + stub_entry->stub_sec->output_section->vma);
7113
7114 /* We have redirected the destination to stub entry address,
7115 so ignore any addend record in the original rela entry. */
7116 signed_addend = 0;
7117 }
a06ea964 7118 }
652afeef
TC
7119 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7120 place, value,
caed7120 7121 signed_addend, weak_undef_p);
07f9ddfe 7122 *unresolved_reloc_p = FALSE;
a06ea964
NC
7123 break;
7124
dcbd20eb
JW
7125 case BFD_RELOC_AARCH64_16_PCREL:
7126 case BFD_RELOC_AARCH64_32_PCREL:
7127 case BFD_RELOC_AARCH64_64_PCREL:
ce336788
JW
7128 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
7129 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP
7130 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
7131 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
ce336788
JW
7132 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
7133 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 7134 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
1daf502a
RL
7135 case BFD_RELOC_AARCH64_MOVW_PREL_G0:
7136 case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
7137 case BFD_RELOC_AARCH64_MOVW_PREL_G1:
7138 case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
7139 case BFD_RELOC_AARCH64_MOVW_PREL_G2:
7140 case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
7141 case BFD_RELOC_AARCH64_MOVW_PREL_G3:
0e1862bb 7142 if (bfd_link_pic (info)
dcbd20eb
JW
7143 && (input_section->flags & SEC_ALLOC) != 0
7144 && (input_section->flags & SEC_READONLY) != 0
d68f1976 7145 && !SYMBOL_REFERENCES_LOCAL (info, h))
dcbd20eb
JW
7146 {
7147 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7148
4eca0228 7149 _bfd_error_handler
695344c0 7150 /* xgettext:c-format */
871b3ab2 7151 (_("%pB: relocation %s against symbol `%s' which may bind "
d68f1976
JW
7152 "externally can not be used when making a shared object; "
7153 "recompile with -fPIC"),
dcbd20eb
JW
7154 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7155 h->root.root.string);
7156 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7157 return bfd_reloc_notsupported;
dcbd20eb 7158 }
c7cd2917
SP
7159 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7160 place, value,
7161 signed_addend,
7162 weak_undef_p);
8b21361b 7163
f0070c1e
SP
7164 if (bfd_r_type == BFD_RELOC_AARCH64_ADR_LO21_PCREL && isym != NULL
7165 && isym->st_target_internal & ST_BRANCH_TO_C64)
8b21361b 7166 value |= 1;
c7cd2917
SP
7167 break;
7168
e19e9199
SP
7169 case BFD_RELOC_MORELLO_BRANCH19:
7170 case BFD_RELOC_MORELLO_TSTBR14:
50e192f0
SP
7171 c64_rtype = TRUE;
7172 /* Fall through. */
c7cd2917
SP
7173 case BFD_RELOC_AARCH64_BRANCH19:
7174 case BFD_RELOC_AARCH64_TSTBR14:
7175 if (h && h->root.type == bfd_link_hash_undefined)
7176 {
7177 _bfd_error_handler
7178 /* xgettext:c-format */
7179 (_("%pB: conditional branch to undefined symbol `%s' "
7180 "not allowed"), input_bfd, h->root.root.string);
7181 bfd_set_error (bfd_error_bad_value);
7182 return bfd_reloc_notsupported;
7183 }
50e192f0
SP
7184 {
7185 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7186
7187 if ((c64_rtype && !to_c64) || (!c64_rtype && to_c64))
7188 {
7189 _bfd_error_handler
7190 /* xgettext:c-format */
7191 (_("%pB: interworking not supported on relocation %s"),
7192 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7193 return bfd_reloc_notsupported;
7194 }
7195 }
1a0670f3 7196 /* Fall through. */
dcbd20eb 7197
a6bb11b2 7198 case BFD_RELOC_AARCH64_16:
92d77487
RL
7199#if ARCH_SIZE == 64
7200 case BFD_RELOC_AARCH64_32:
7201#endif
a6bb11b2 7202 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 7203 case BFD_RELOC_AARCH64_LDST128_LO12:
a6bb11b2
YZ
7204 case BFD_RELOC_AARCH64_LDST16_LO12:
7205 case BFD_RELOC_AARCH64_LDST32_LO12:
7206 case BFD_RELOC_AARCH64_LDST64_LO12:
ce336788 7207 case BFD_RELOC_AARCH64_LDST8_LO12:
a6bb11b2
YZ
7208 case BFD_RELOC_AARCH64_MOVW_G0:
7209 case BFD_RELOC_AARCH64_MOVW_G0_NC:
ce336788 7210 case BFD_RELOC_AARCH64_MOVW_G0_S:
a6bb11b2
YZ
7211 case BFD_RELOC_AARCH64_MOVW_G1:
7212 case BFD_RELOC_AARCH64_MOVW_G1_NC:
ce336788 7213 case BFD_RELOC_AARCH64_MOVW_G1_S:
a6bb11b2
YZ
7214 case BFD_RELOC_AARCH64_MOVW_G2:
7215 case BFD_RELOC_AARCH64_MOVW_G2_NC:
ce336788 7216 case BFD_RELOC_AARCH64_MOVW_G2_S:
a6bb11b2 7217 case BFD_RELOC_AARCH64_MOVW_G3:
652afeef
TC
7218 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7219 place, value,
caed7120 7220 signed_addend, weak_undef_p);
f0070c1e
SP
7221 if (bfd_r_type == BFD_RELOC_AARCH64_ADD_LO12 && isym != NULL
7222 && isym->st_target_internal & ST_BRANCH_TO_C64)
8b21361b
SP
7223 value |= 1;
7224
a06ea964
NC
7225 break;
7226
a6bb11b2 7227 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 7228 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a6bb11b2 7229 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 7230 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 7231 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 7232 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 7233 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 7234 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
2aff25ba
JW
7235 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
7236 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
7237 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
8d4edc5f
SP
7238 off = symbol_got_offset (input_bfd, h, r_symndx);
7239 base_got = globals->root.sgot;
5fa80905 7240
c50aec72
MM
7241 bfd_boolean c64_reloc =
7242 (bfd_r_type == BFD_RELOC_MORELLO_LD128_GOT_LO12_NC
7243 || bfd_r_type == BFD_RELOC_MORELLO_ADR_GOT_PAGE);
8d4edc5f 7244
5fa80905
AC
7245 if (signed_addend != 0)
7246 {
7247 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7248 _bfd_error_handler
7249 /* xgettext:c-format */
7250 (_("%pB: symbol plus addend can not be placed into the GOT "
7251 "for relocation %s"),
7252 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7253 abort ();
7254 }
7255
8d4edc5f 7256 if (base_got == NULL)
a06ea964
NC
7257 BFD_ASSERT (h != NULL);
7258
ff07562f 7259 relative_reloc = FALSE;
a06ea964
NC
7260 if (h != NULL)
7261 {
99ad26cb 7262 bfd_vma addend = 0;
5fa80905 7263 bfd_vma frag_value;
ff07562f
JW
7264
7265 /* If a symbol is not dynamic and is not undefined weak, bind it
7266 locally and generate a RELATIVE relocation under PIC mode.
7267
7268 NOTE: one symbol may be referenced by several relocations, we
7269 should only generate one RELATIVE relocation for that symbol.
8d4edc5f
SP
7270 Therefore, check GOT offset mark first.
7271
7272 NOTE2: Symbol references via GOT in C64 static binaries without
7273 PIC should always have relative relocations, so we do that here
7274 early. */
7275 if (((h->dynindx == -1
7276 && !h->forced_local
7277 && h->root.type != bfd_link_hash_undefweak
7278 && bfd_link_pic (info))
7279 || (!bfd_link_pic (info) && bfd_link_executable (info)
7280 && c64_reloc))
ff07562f
JW
7281 && !symbol_got_offset_mark_p (input_bfd, h, r_symndx))
7282 relative_reloc = TRUE;
7283
5fa80905
AC
7284 if (c64_reloc
7285 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
7286 signed_addend = (value | h->target_internal) - frag_value;
7287 else
7288 frag_value = value | h->target_internal;
7289
c50aec72 7290 value = aarch64_calculate_got_entry_vma (h, globals, info,
5fa80905 7291 frag_value,
a06ea964
NC
7292 output_bfd,
7293 unresolved_reloc_p);
ff07562f
JW
7294 /* Record the GOT entry address which will be used when generating
7295 RELATIVE relocation. */
7296 if (relative_reloc)
8d4edc5f 7297 got_entry_addr = value;
ff07562f 7298
2aff25ba 7299 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW
7300 addend = (globals->root.sgot->output_section->vma
7301 + globals->root.sgot->output_offset);
652afeef
TC
7302 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7303 place, value,
99ad26cb 7304 addend, weak_undef_p);
a06ea964 7305 }
b53b1bed
JW
7306 else
7307 {
99ad26cb 7308 bfd_vma addend = 0;
b53b1bed
JW
7309 struct elf_aarch64_local_symbol *locals
7310 = elf_aarch64_locals (input_bfd);
7311
7312 if (locals == NULL)
7313 {
7314 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
4eca0228 7315 _bfd_error_handler
695344c0 7316 /* xgettext:c-format */
90b6238f 7317 (_("%pB: local symbol descriptor table be NULL when applying "
b53b1bed
JW
7318 "relocation %s against local symbol"),
7319 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7320 abort ();
7321 }
7322
ff07562f
JW
7323 got_entry_addr = (base_got->output_section->vma
7324 + base_got->output_offset + off);
b53b1bed
JW
7325
7326 if (!symbol_got_offset_mark_p (input_bfd, h, r_symndx))
7327 {
5fa80905
AC
7328 bfd_vma frag_value;
7329
7330 if (c64_reloc
7331 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
7332 signed_addend = (value | sym->st_target_internal) - frag_value;
7333 else
7334 frag_value = value | sym->st_target_internal;
7335
7336 bfd_put_64 (output_bfd, frag_value, base_got->contents + off);
b53b1bed 7337
ff07562f
JW
7338 /* For local symbol, we have done absolute relocation in static
7339 linking stage. While for shared library, we need to update the
7340 content of GOT entry according to the shared object's runtime
7341 base address. So, we need to generate a R_AARCH64_RELATIVE reloc
7342 for dynamic linker. */
c50aec72
MM
7343 if (bfd_link_pic (info)
7344 || (!bfd_link_pic (info) && bfd_link_executable (info)
7345 && c64_reloc))
ff07562f 7346 relative_reloc = TRUE;
b53b1bed
JW
7347
7348 symbol_got_offset_mark (input_bfd, h, r_symndx);
7349 }
7350
7351 /* Update the relocation value to GOT entry addr as we have transformed
7352 the direct data access into indirect data access through GOT. */
7353 value = got_entry_addr;
99ad26cb 7354
2aff25ba 7355 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW
7356 addend = base_got->output_section->vma + base_got->output_offset;
7357
652afeef
TC
7358 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7359 place, value,
99ad26cb 7360 addend, weak_undef_p);
b53b1bed 7361 }
ff07562f
JW
7362
7363 if (relative_reloc)
7364 {
7365 asection *s;
7366 Elf_Internal_Rela outrel;
7367
a1bdea65
SP
7368 enum elf_aarch64_reloc_type rtype = AARCH64_R (RELATIVE);
7369
8d4edc5f
SP
7370 s = globals->root.srelgot;
7371
a1bdea65
SP
7372 /* For a C64 relative relocation, also add size and permissions into
7373 the frag. */
c50aec72 7374 if (c64_reloc)
a1bdea65
SP
7375 {
7376 bfd_reloc_status_type ret;
7377
e10c835d
MM
7378 ret = c64_fixup_frag (input_bfd, info, bfd_r_type, sym, h,
7379 sym_sec, s, base_got->contents + off + 8,
7380 orig_value, 0, off);
a1bdea65
SP
7381
7382 if (ret != bfd_reloc_continue)
7383 return ret;
7384
7385 rtype = MORELLO_R (RELATIVE);
8d4edc5f
SP
7386
7387 if (bfd_link_executable (info) && !bfd_link_pic (info))
7388 s = globals->srelcaps;
7389
5fa80905 7390 outrel.r_addend = signed_addend;
a1bdea65
SP
7391 }
7392 else
7393 outrel.r_addend = orig_value;
7394
ff07562f
JW
7395 if (s == NULL)
7396 abort ();
7397
7398 outrel.r_offset = got_entry_addr;
a1bdea65 7399 outrel.r_info = ELFNN_R_INFO (0, rtype);
ff07562f
JW
7400 elf_append_rela (output_bfd, s, &outrel);
7401 }
a2e1db00
RL
7402 break;
7403
ce336788 7404 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 7405 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 7406 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
a6bb11b2 7407 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 7408 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 7409 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 7410 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
73f925cc 7411 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 7412 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 7413 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
7414 if (globals->root.sgot == NULL)
7415 return bfd_reloc_notsupported;
7416
7417 value = (symbol_got_offset (input_bfd, h, r_symndx)
7418 + globals->root.sgot->output_section->vma
f44a1f8e 7419 + globals->root.sgot->output_offset);
a06ea964 7420
652afeef
TC
7421 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7422 place, value,
caed7120 7423 0, weak_undef_p);
a06ea964
NC
7424 *unresolved_reloc_p = FALSE;
7425 break;
7426
7ba7cfe4 7427 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 7428 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
3b957e5b
RL
7429 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
7430 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
94facae3
RL
7431 if (globals->root.sgot == NULL)
7432 return bfd_reloc_notsupported;
7433
7434 value = symbol_got_offset (input_bfd, h, r_symndx);
652afeef
TC
7435 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7436 place, value,
94facae3
RL
7437 0, weak_undef_p);
7438 *unresolved_reloc_p = FALSE;
7439 break;
7440
6ffe9a1b 7441 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
40fbed84 7442 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
753999c1 7443 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
07c9aa07
JW
7444 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
7445 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
7446 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
7447 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
7448 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
7449 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
7450 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
7451 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
6ffe9a1b
JW
7452 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
7453 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
7454 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
7455 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
7456 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
652afeef
TC
7457 {
7458 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
7459 {
7460 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7461 _bfd_error_handler
7462 /* xgettext:c-format */
7463 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
7464 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7465 h->root.root.string);
7466 bfd_set_error (bfd_error_bad_value);
7467 return bfd_reloc_notsupported;
7468 }
7469
7470 bfd_vma def_value
7471 = weak_undef_p ? 0 : signed_addend - dtpoff_base (info);
7472 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7473 place, value,
7474 def_value, weak_undef_p);
7475 break;
7476 }
40fbed84 7477
a6bb11b2
YZ
7478 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
7479 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
7480 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
e04ef022
RL
7481 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
7482 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
7483 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
7484 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
7485 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
7486 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
7487 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
7488 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
a6bb11b2
YZ
7489 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
7490 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
7491 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
7492 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
7493 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
652afeef
TC
7494 {
7495 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
7496 {
7497 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7498 _bfd_error_handler
7499 /* xgettext:c-format */
7500 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
7501 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7502 h->root.root.string);
7503 bfd_set_error (bfd_error_bad_value);
7504 return bfd_reloc_notsupported;
7505 }
7506
7507 bfd_vma def_value
7508 = weak_undef_p ? 0 : signed_addend - tpoff_base (info);
7509 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7510 place, value,
7511 def_value, weak_undef_p);
7512 *unresolved_reloc_p = FALSE;
7513 break;
7514 }
a06ea964 7515
f955cccf 7516 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 7517 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
4ca9b406 7518 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
389b8029 7519 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 7520 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 7521 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 7522 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
4ca9b406 7523 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a06ea964
NC
7524 if (globals->root.sgot == NULL)
7525 return bfd_reloc_notsupported;
a06ea964
NC
7526 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
7527 + globals->root.sgotplt->output_section->vma
f44a1f8e 7528 + globals->root.sgotplt->output_offset
a06ea964
NC
7529 + globals->sgotplt_jump_table_size);
7530
652afeef
TC
7531 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7532 place, value,
caed7120 7533 0, weak_undef_p);
a06ea964
NC
7534 *unresolved_reloc_p = FALSE;
7535 break;
7536
0484b454
RL
7537 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
7538 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
7539 if (globals->root.sgot == NULL)
7540 return bfd_reloc_notsupported;
7541
7542 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
7543 + globals->root.sgotplt->output_section->vma
7544 + globals->root.sgotplt->output_offset
7545 + globals->sgotplt_jump_table_size);
7546
7547 value -= (globals->root.sgot->output_section->vma
7548 + globals->root.sgot->output_offset);
7549
652afeef
TC
7550 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7551 place, value,
0484b454
RL
7552 0, weak_undef_p);
7553 *unresolved_reloc_p = FALSE;
7554 break;
7555
40bbb79e
SP
7556 case BFD_RELOC_MORELLO_CAPINIT:
7557 {
7558 Elf_Internal_Rela outrel;
7559
7560 if (input_section->flags & SEC_READONLY)
7561 {
7562 _bfd_error_handler
7563 /* xgettext:c-format */
7564 (_("%pB: capability relocation section must be writable"),
7565 input_bfd);
7566 bfd_set_error (bfd_error_bad_value);
7567 return bfd_reloc_notsupported;
7568 }
7569
7570 outrel.r_offset = _bfd_elf_section_offset (output_bfd, info,
7571 input_section,
7572 rel->r_offset);
7573
7574 outrel.r_offset += (input_section->output_section->vma
7575 + input_section->output_offset);
7576
7577 /* Capability-aligned. */
7578 if (outrel.r_offset & 0xf)
7579 return bfd_reloc_overflow;
7580
7581 bfd_reloc_status_type ret;
7582
e10c835d
MM
7583 ret = c64_fixup_frag (input_bfd, info, bfd_r_type, sym, h, sym_sec,
7584 input_section, hit_data + 8, value,
7585 signed_addend, rel->r_offset);
40bbb79e
SP
7586
7587 if (ret != bfd_reloc_continue)
7588 return ret;
7589
7590 outrel.r_addend = signed_addend;
5fa80905 7591 value |= (h != NULL ? h->target_internal : sym->st_target_internal);
40bbb79e
SP
7592
7593 /* Emit a dynamic relocation if we are building PIC. */
7594 if (h != NULL
7595 && h->dynindx != -1
7596 && bfd_link_pic (info)
7597 && !SYMBOL_REFERENCES_LOCAL (info, h))
7598 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
7599 else
7600 outrel.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
7601
5fa80905
AC
7602 /* Symbols without size information get bounds to the
7603 whole section: adjust the base of the capability to the
7604 start of the section and set the addend to obtain the
7605 correct address for the symbol. */
7606 bfd_vma new_value;
7607 if (c64_symbol_adjust (h, value, sym_sec, info, &new_value))
7608 {
7609 outrel.r_addend += (value - new_value);
7610 value = new_value;
7611 }
40bbb79e
SP
7612
7613 asection *s = globals->srelcaps;
7614
7615 elf_append_rela (output_bfd, s, &outrel);
7616 *unresolved_reloc_p = FALSE;
7617 }
7618 break;
7619
a06ea964
NC
7620 default:
7621 return bfd_reloc_notsupported;
7622 }
7623
7624 if (saved_addend)
7625 *saved_addend = value;
7626
7627 /* Only apply the final relocation in a sequence. */
7628 if (save_addend)
7629 return bfd_reloc_continue;
7630
caed7120
YZ
7631 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
7632 howto, value);
a06ea964
NC
7633}
7634
2d0ca824
YN
7635/* LP64 and ILP32 operates on x- and w-registers respectively.
7636 Next definitions take into account the difference between
7637 corresponding machine codes. R means x-register if the target
7638 arch is LP64, and w-register if the target is ILP32. */
7639
7640#if ARCH_SIZE == 64
7641# define add_R0_R0 (0x91000000)
7642# define add_R0_R0_R1 (0x8b000020)
7643# define add_R0_R1 (0x91400020)
7644# define ldr_R0 (0x58000000)
7645# define ldr_R0_mask(i) (i & 0xffffffe0)
7646# define ldr_R0_x0 (0xf9400000)
7647# define ldr_hw_R0 (0xf2a00000)
7648# define movk_R0 (0xf2800000)
7649# define movz_R0 (0xd2a00000)
7650# define movz_hw_R0 (0xd2c00000)
7651#else /*ARCH_SIZE == 32 */
7652# define add_R0_R0 (0x11000000)
7653# define add_R0_R0_R1 (0x0b000020)
7654# define add_R0_R1 (0x11400020)
7655# define ldr_R0 (0x18000000)
7656# define ldr_R0_mask(i) (i & 0xbfffffe0)
7657# define ldr_R0_x0 (0xb9400000)
7658# define ldr_hw_R0 (0x72a00000)
7659# define movk_R0 (0x72800000)
7660# define movz_R0 (0x52a00000)
7661# define movz_hw_R0 (0x52c00000)
7662#endif
7663
9fca35fc
TC
7664/* Structure to hold payload for _bfd_aarch64_erratum_843419_clear_stub,
7665 it is used to identify the stub information to reset. */
7666
7667struct erratum_843419_branch_to_stub_clear_data
7668{
7669 bfd_vma adrp_offset;
7670 asection *output_section;
7671};
7672
7673/* Clear the erratum information for GEN_ENTRY if the ADRP_OFFSET and
7674 section inside IN_ARG matches. The clearing is done by setting the
7675 stub_type to none. */
7676
7677static bfd_boolean
7678_bfd_aarch64_erratum_843419_clear_stub (struct bfd_hash_entry *gen_entry,
7679 void *in_arg)
7680{
7681 struct elf_aarch64_stub_hash_entry *stub_entry
7682 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
7683 struct erratum_843419_branch_to_stub_clear_data *data
7684 = (struct erratum_843419_branch_to_stub_clear_data *) in_arg;
7685
7686 if (stub_entry->target_section != data->output_section
7687 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer
7688 || stub_entry->adrp_offset != data->adrp_offset)
7689 return TRUE;
7690
7691 /* Change the stub type instead of removing the entry, removing from the hash
7692 table would be slower and we have already reserved the memory for the entry
7693 so there wouldn't be much gain. Changing the stub also keeps around a
7694 record of what was there before. */
7695 stub_entry->stub_type = aarch64_stub_none;
7696
7697 /* We're done and there could have been only one matching stub at that
7698 particular offset, so abort further traversal. */
7699 return FALSE;
7700}
7701
7702/* TLS Relaxations may relax an adrp sequence that matches the erratum 843419
7703 sequence. In this case the erratum no longer applies and we need to remove
7704 the entry from the pending stub generation. This clears matching adrp insn
7705 at ADRP_OFFSET in INPUT_SECTION in the stub table defined in GLOBALS. */
7706
7707static void
7708clear_erratum_843419_entry (struct elf_aarch64_link_hash_table *globals,
7709 bfd_vma adrp_offset, asection *input_section)
7710{
739b5c9c 7711 if (globals->fix_erratum_843419 & ERRAT_ADRP)
9fca35fc
TC
7712 {
7713 struct erratum_843419_branch_to_stub_clear_data data;
7714 data.adrp_offset = adrp_offset;
7715 data.output_section = input_section;
7716
7717 bfd_hash_traverse (&globals->stub_hash_table,
7718 _bfd_aarch64_erratum_843419_clear_stub, &data);
7719 }
7720}
7721
4ca9b406
SP
7722#define BUILD_MOVZ(_reg, _imm) (movz_R0 \
7723 | ((((_imm) >> 16) & 0xffff) << 5) \
7724 | (_reg))
7725#define BUILD_MOVK(_reg, _imm) (movk_R0 | (((_imm) & 0xffff) << 5) | (_reg))
7726
a06ea964
NC
7727/* Handle TLS relaxations. Relaxing is possible for symbols that use
7728 R_AARCH64_TLSDESC_ADR_{PAGE, LD64_LO12_NC, ADD_LO12_NC} during a static
7729 link.
7730
7731 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7732 is to then call final_link_relocate. Return other values in the
7733 case of error. */
7734
7735static bfd_reloc_status_type
4ca9b406
SP
7736elfNN_aarch64_tls_relax (bfd *input_bfd, struct bfd_link_info *info,
7737 asection *input_section,
9fca35fc 7738 bfd_byte *contents, Elf_Internal_Rela *rel,
4ca9b406 7739 struct elf_link_hash_entry *h, unsigned long r_symndx)
a06ea964
NC
7740{
7741 bfd_boolean is_local = h == NULL;
4ca9b406 7742
cec5225b 7743 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 7744 unsigned long insn;
4ca9b406
SP
7745 bfd_vma sym_size = 0;
7746 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
a06ea964
NC
7747
7748 BFD_ASSERT (globals && input_bfd && contents && rel);
7749
4ca9b406
SP
7750 if (is_local)
7751 {
7752 if (h != NULL)
7753 sym_size = h->size;
7754 else
7755 {
7756 Elf_Internal_Sym *sym;
7757
7758 sym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
7759 r_symndx);
7760 BFD_ASSERT (sym != NULL);
7761 sym_size = sym->st_size;
7762 }
7763 }
7764
0aa13fee 7765 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 7766 {
4ca9b406
SP
7767 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
7768 if (is_local || !bfd_link_pic (info))
7769 {
7770 /* GD->LE relaxation:
7771 nop => movz x1, objsize_hi16
7772 adrp x0, :tlsdesc:var => movz x0, :tprel_g1:var */
7773 bfd_putl32 (BUILD_MOVZ(1, sym_size), contents + rel->r_offset - 4);
7774 bfd_putl32 (movz_R0, contents + rel->r_offset);
7775
7776 /* We have relaxed the adrp into a mov, we may have to clear any
7777 pending erratum fixes. */
7778 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
7779 return bfd_reloc_continue;
7780 }
7781 else
7782 {
7783 /* GD->IE relaxation: Not implemented. */
7784 return bfd_reloc_continue;
7785 }
a6bb11b2 7786 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 7787 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
a06ea964
NC
7788 if (is_local)
7789 {
7790 /* GD->LE relaxation:
2d0ca824 7791 adrp x0, :tlsgd:var => movz R0, :tprel_g1:var
a06ea964 7792 or
2d0ca824
YN
7793 adrp x0, :tlsdesc:var => movz R0, :tprel_g1:var
7794
7795 Where R is x for LP64, and w for ILP32. */
7796 bfd_putl32 (movz_R0, contents + rel->r_offset);
9fca35fc
TC
7797 /* We have relaxed the adrp into a mov, we may have to clear any
7798 pending erratum fixes. */
7799 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC
7800 return bfd_reloc_continue;
7801 }
7802 else
7803 {
7804 /* GD->IE relaxation:
7805 adrp x0, :tlsgd:var => adrp x0, :gottprel:var
7806 or
7807 adrp x0, :tlsdesc:var => adrp x0, :gottprel:var
7808 */
a06ea964
NC
7809 return bfd_reloc_continue;
7810 }
7811
389b8029
MS
7812 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7813 BFD_ASSERT (0);
7814 break;
7815
1ada945d
MS
7816 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
7817 if (is_local)
7818 {
7819 /* Tiny TLSDESC->LE relaxation:
07d6d2b8
AM
7820 ldr x1, :tlsdesc:var => movz R0, #:tprel_g1:var
7821 adr x0, :tlsdesc:var => movk R0, #:tprel_g0_nc:var
1ada945d 7822 .tlsdesccall var
07d6d2b8 7823 blr x1 => nop
2d0ca824
YN
7824
7825 Where R is x for LP64, and w for ILP32. */
1ada945d
MS
7826 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
7827 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
7828
7829 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7830 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
7831 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7832
2d0ca824
YN
7833 bfd_putl32 (movz_R0, contents + rel->r_offset);
7834 bfd_putl32 (movk_R0, contents + rel->r_offset + 4);
1ada945d
MS
7835 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
7836 return bfd_reloc_continue;
7837 }
7838 else
7839 {
7840 /* Tiny TLSDESC->IE relaxation:
07d6d2b8
AM
7841 ldr x1, :tlsdesc:var => ldr x0, :gottprel:var
7842 adr x0, :tlsdesc:var => nop
1ada945d 7843 .tlsdesccall var
07d6d2b8 7844 blr x1 => nop
1ada945d
MS
7845 */
7846 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
7847 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
7848
7849 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7850 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7851
2d0ca824 7852 bfd_putl32 (ldr_R0, contents + rel->r_offset);
1ada945d
MS
7853 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
7854 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
7855 return bfd_reloc_continue;
7856 }
7857
3c12b054
MS
7858 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7859 if (is_local)
7860 {
7861 /* Tiny GD->LE relaxation:
07d6d2b8
AM
7862 adr x0, :tlsgd:var => mrs x1, tpidr_el0
7863 bl __tls_get_addr => add R0, R1, #:tprel_hi12:x, lsl #12
7864 nop => add R0, R0, #:tprel_lo12_nc:x
2d0ca824
YN
7865
7866 Where R is x for LP64, and x for Ilp32. */
3c12b054
MS
7867
7868 /* First kill the tls_get_addr reloc on the bl instruction. */
7869 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
7870
7871 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 0);
2d0ca824
YN
7872 bfd_putl32 (add_R0_R1, contents + rel->r_offset + 4);
7873 bfd_putl32 (add_R0_R0, contents + rel->r_offset + 8);
3c12b054
MS
7874
7875 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7876 AARCH64_R (TLSLE_ADD_TPREL_LO12_NC));
7877 rel[1].r_offset = rel->r_offset + 8;
7878
7879 /* Move the current relocation to the second instruction in
7880 the sequence. */
7881 rel->r_offset += 4;
7882 rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7883 AARCH64_R (TLSLE_ADD_TPREL_HI12));
7884 return bfd_reloc_continue;
7885 }
7886 else
7887 {
7888 /* Tiny GD->IE relaxation:
07d6d2b8
AM
7889 adr x0, :tlsgd:var => ldr R0, :gottprel:var
7890 bl __tls_get_addr => mrs x1, tpidr_el0
7891 nop => add R0, R0, R1
2d0ca824
YN
7892
7893 Where R is x for LP64, and w for Ilp32. */
3c12b054
MS
7894
7895 /* First kill the tls_get_addr reloc on the bl instruction. */
7896 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
7897 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7898
2d0ca824 7899 bfd_putl32 (ldr_R0, contents + rel->r_offset);
3c12b054 7900 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 7901 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
3c12b054
MS
7902 return bfd_reloc_continue;
7903 }
7904
ac734732
RL
7905#if ARCH_SIZE == 64
7906 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
7907 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSGD_MOVW_G0_NC));
7908 BFD_ASSERT (rel->r_offset + 12 == rel[2].r_offset);
7909 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (CALL26));
7910
7911 if (is_local)
7912 {
7913 /* Large GD->LE relaxation:
07d6d2b8 7914 movz x0, #:tlsgd_g1:var => movz x0, #:tprel_g2:var, lsl #32
ac734732 7915 movk x0, #:tlsgd_g0_nc:var => movk x0, #:tprel_g1_nc:var, lsl #16
07d6d2b8
AM
7916 add x0, gp, x0 => movk x0, #:tprel_g0_nc:var
7917 bl __tls_get_addr => mrs x1, tpidr_el0
7918 nop => add x0, x0, x1
ac734732
RL
7919 */
7920 rel[2].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7921 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
7922 rel[2].r_offset = rel->r_offset + 8;
7923
2d0ca824
YN
7924 bfd_putl32 (movz_hw_R0, contents + rel->r_offset + 0);
7925 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset + 4);
7926 bfd_putl32 (movk_R0, contents + rel->r_offset + 8);
ac734732 7927 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 7928 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL
7929 }
7930 else
7931 {
7932 /* Large GD->IE relaxation:
07d6d2b8 7933 movz x0, #:tlsgd_g1:var => movz x0, #:gottprel_g1:var, lsl #16
ac734732 7934 movk x0, #:tlsgd_g0_nc:var => movk x0, #:gottprel_g0_nc:var
07d6d2b8
AM
7935 add x0, gp, x0 => ldr x0, [gp, x0]
7936 bl __tls_get_addr => mrs x1, tpidr_el0
7937 nop => add x0, x0, x1
ac734732
RL
7938 */
7939 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7940 bfd_putl32 (0xd2a80000, contents + rel->r_offset + 0);
2d0ca824 7941 bfd_putl32 (ldr_R0, contents + rel->r_offset + 8);
ac734732 7942 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 7943 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL
7944 }
7945 return bfd_reloc_continue;
7946
7947 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
7948 return bfd_reloc_continue;
7949#endif
7950
043bf05a
MS
7951 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
7952 return bfd_reloc_continue;
7953
4ca9b406
SP
7954 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
7955 if (is_local || !bfd_link_pic (info))
7956 {
7957 /* GD->LE relaxation:
7958 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var */
7959 bfd_putl32 (movk_R0, contents + rel->r_offset);
7960 return bfd_reloc_continue;
7961 }
7962 else
7963 {
7964 /* GD->IE relaxation: not implemented. */
7965 return bfd_reloc_continue;
7966 }
a6bb11b2 7967 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
a06ea964
NC
7968 if (is_local)
7969 {
7970 /* GD->LE relaxation:
7971 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var
2d0ca824
YN
7972
7973 Where R is x for lp64 mode, and w for ILP32 mode. */
7974 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964
NC
7975 return bfd_reloc_continue;
7976 }
7977 else
7978 {
7979 /* GD->IE relaxation:
2d0ca824
YN
7980 ldr xd, [x0, #:tlsdesc_lo12:var] => ldr R0, [x0, #:gottprel_lo12:var]
7981
7982 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964 7983 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 7984 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
a06ea964
NC
7985 return bfd_reloc_continue;
7986 }
7987
a6bb11b2 7988 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a06ea964
NC
7989 if (is_local)
7990 {
7991 /* GD->LE relaxation
07d6d2b8
AM
7992 add x0, #:tlsgd_lo12:var => movk R0, :tprel_g0_nc:var
7993 bl __tls_get_addr => mrs x1, tpidr_el0
7994 nop => add R0, R1, R0
2d0ca824
YN
7995
7996 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC
7997
7998 /* First kill the tls_get_addr reloc on the bl instruction. */
7999 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
cec5225b 8000 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 8001
2d0ca824 8002 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964 8003 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 8004 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
a06ea964
NC
8005 return bfd_reloc_continue;
8006 }
8007 else
8008 {
8009 /* GD->IE relaxation
07d6d2b8
AM
8010 ADD x0, #:tlsgd_lo12:var => ldr R0, [x0, #:gottprel_lo12:var]
8011 BL __tls_get_addr => mrs x1, tpidr_el0
a06ea964 8012 R_AARCH64_CALL26
07d6d2b8 8013 NOP => add R0, R1, R0
5cd1d8bc
YN
8014
8015 Where R is x for lp64 mode, and w for ilp32 mode. */
a06ea964 8016
a6bb11b2 8017 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
a06ea964
NC
8018
8019 /* Remove the relocation on the BL instruction. */
cec5225b 8020 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 8021
a06ea964
NC
8022 /* We choose to fixup the BL and NOP instructions using the
8023 offset from the second relocation to allow flexibility in
8024 scheduling instructions between the ADD and BL. */
2d0ca824 8025 bfd_putl32 (ldr_R0_x0, contents + rel->r_offset);
5cd1d8bc 8026 bfd_putl32 (0xd53bd041, contents + rel[1].r_offset);
2d0ca824 8027 bfd_putl32 (add_R0_R0_R1, contents + rel[1].r_offset + 4);
a06ea964
NC
8028 return bfd_reloc_continue;
8029 }
8030
4ca9b406
SP
8031 case BFD_RELOC_MORELLO_TLSDESC_CALL:
8032 /* GD->LE relaxation:
8033 blr cd => add c0, c2, x0 */
8034 if (is_local || !bfd_link_pic (info))
8035 {
8036 bfd_putl32 (0xc2a06040, contents + rel->r_offset);
8037 return bfd_reloc_ok;
8038 }
8039 else
8040 goto set_nop;
8041
f955cccf 8042 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406
SP
8043 /* GD->LE relaxation:
8044 ldr cd, [c0, #:tlsdesc_lo12:var] => movk x1, objsize_lo16 */
8045 if ((is_local || !bfd_link_pic (info))
8046 && ELFNN_R_TYPE (rel[1].r_info) == MORELLO_R (TLSDESC_CALL))
8047 {
8048 bfd_putl32 (BUILD_MOVK(1, sym_size), contents + rel->r_offset);
8049 return bfd_reloc_continue;
8050 }
8051
8052 /* Fall through. */
8053 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 8054 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a06ea964 8055 /* GD->IE/LE relaxation:
07d6d2b8
AM
8056 add x0, x0, #:tlsdesc_lo12:var => nop
8057 blr xd => nop
a06ea964 8058 */
4ca9b406 8059set_nop:
a06ea964
NC
8060 bfd_putl32 (INSN_NOP, contents + rel->r_offset);
8061 return bfd_reloc_ok;
8062
0484b454
RL
8063 case BFD_RELOC_AARCH64_TLSDESC_LDR:
8064 if (is_local)
8065 {
8066 /* GD->LE relaxation:
2d0ca824
YN
8067 ldr xd, [gp, xn] => movk R0, #:tprel_g0_nc:var
8068
8069 Where R is x for lp64 mode, and w for ILP32 mode. */
8070 bfd_putl32 (movk_R0, contents + rel->r_offset);
0484b454
RL
8071 return bfd_reloc_continue;
8072 }
8073 else
8074 {
8075 /* GD->IE relaxation:
2d0ca824
YN
8076 ldr xd, [gp, xn] => ldr R0, [gp, xn]
8077
8078 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8079 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8080 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
0484b454
RL
8081 return bfd_reloc_ok;
8082 }
8083
8084 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8085 /* GD->LE relaxation:
2d0ca824 8086 movk xd, #:tlsdesc_off_g0_nc:var => movk R0, #:tprel_g1_nc:var, lsl #16
0484b454 8087 GD->IE relaxation:
2d0ca824
YN
8088 movk xd, #:tlsdesc_off_g0_nc:var => movk Rd, #:gottprel_g0_nc:var
8089
8090 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8091 if (is_local)
2d0ca824 8092 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset);
0484b454
RL
8093 return bfd_reloc_continue;
8094
8095 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
8096 if (is_local)
8097 {
8098 /* GD->LE relaxation:
2d0ca824
YN
8099 movz xd, #:tlsdesc_off_g1:var => movz R0, #:tprel_g2:var, lsl #32
8100
8101 Where R is x for lp64 mode, and w for ILP32 mode. */
8102 bfd_putl32 (movz_hw_R0, contents + rel->r_offset);
0484b454
RL
8103 return bfd_reloc_continue;
8104 }
8105 else
8106 {
8107 /* GD->IE relaxation:
2d0ca824
YN
8108 movz xd, #:tlsdesc_off_g1:var => movz Rd, #:gottprel_g1:var, lsl #16
8109
8110 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8111 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8112 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
0484b454
RL
8113 return bfd_reloc_continue;
8114 }
8115
a6bb11b2 8116 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a06ea964 8117 /* IE->LE relaxation:
07d6d2b8 8118 adrp xd, :gottprel:var => movz Rd, :tprel_g1:var
2d0ca824
YN
8119
8120 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC
8121 if (is_local)
8122 {
8123 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8124 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
9fca35fc
TC
8125 /* We have relaxed the adrp into a mov, we may have to clear any
8126 pending erratum fixes. */
8127 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC
8128 }
8129 return bfd_reloc_continue;
8130
a6bb11b2 8131 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
a06ea964 8132 /* IE->LE relaxation:
07d6d2b8 8133 ldr xd, [xm, #:gottprel_lo12:var] => movk Rd, :tprel_g0_nc:var
2d0ca824
YN
8134
8135 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC
8136 if (is_local)
8137 {
8138 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8139 bfd_putl32 (movk_R0 | (insn & 0x1f), contents + rel->r_offset);
a06ea964
NC
8140 }
8141 return bfd_reloc_continue;
8142
259364ad
JW
8143 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
8144 /* LD->LE relaxation (tiny):
8145 adr x0, :tlsldm:x => mrs x0, tpidr_el0
c1fc2d7e
YN
8146 bl __tls_get_addr => add R0, R0, TCB_SIZE
8147
8148 Where R is x for lp64 mode, and w for ilp32 mode. */
259364ad
JW
8149 if (is_local)
8150 {
8151 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8152 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8153 /* No need of CALL26 relocation for tls_get_addr. */
8154 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8155 bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
2d0ca824
YN
8156 bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
8157 contents + rel->r_offset + 4);
259364ad
JW
8158 return bfd_reloc_ok;
8159 }
8160 return bfd_reloc_continue;
8161
8162 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
8163 /* LD->LE relaxation (small):
8164 adrp x0, :tlsldm:x => mrs x0, tpidr_el0
8165 */
8166 if (is_local)
8167 {
8168 bfd_putl32 (0xd53bd040, contents + rel->r_offset);
8169 return bfd_reloc_ok;
8170 }
8171 return bfd_reloc_continue;
8172
8173 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
8174 /* LD->LE relaxation (small):
c1fc2d7e 8175 add x0, #:tlsldm_lo12:x => add R0, R0, TCB_SIZE
259364ad 8176 bl __tls_get_addr => nop
c1fc2d7e
YN
8177
8178 Where R is x for lp64 mode, and w for ilp32 mode. */
259364ad
JW
8179 if (is_local)
8180 {
8181 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8182 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8183 /* No need of CALL26 relocation for tls_get_addr. */
8184 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
2d0ca824
YN
8185 bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
8186 contents + rel->r_offset + 0);
c1fc2d7e 8187 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
259364ad
JW
8188 return bfd_reloc_ok;
8189 }
8190 return bfd_reloc_continue;
8191
a06ea964
NC
8192 default:
8193 return bfd_reloc_continue;
8194 }
8195
8196 return bfd_reloc_ok;
8197}
8198
8199/* Relocate an AArch64 ELF section. */
8200
8201static bfd_boolean
cec5225b 8202elfNN_aarch64_relocate_section (bfd *output_bfd,
a06ea964
NC
8203 struct bfd_link_info *info,
8204 bfd *input_bfd,
8205 asection *input_section,
8206 bfd_byte *contents,
8207 Elf_Internal_Rela *relocs,
8208 Elf_Internal_Sym *local_syms,
8209 asection **local_sections)
8210{
8211 Elf_Internal_Shdr *symtab_hdr;
8212 struct elf_link_hash_entry **sym_hashes;
8213 Elf_Internal_Rela *rel;
8214 Elf_Internal_Rela *relend;
8215 const char *name;
cec5225b 8216 struct elf_aarch64_link_hash_table *globals;
a06ea964
NC
8217 bfd_boolean save_addend = FALSE;
8218 bfd_vma addend = 0;
8219
cec5225b 8220 globals = elf_aarch64_hash_table (info);
a06ea964
NC
8221
8222 symtab_hdr = &elf_symtab_hdr (input_bfd);
8223 sym_hashes = elf_sym_hashes (input_bfd);
8224
8225 rel = relocs;
8226 relend = relocs + input_section->reloc_count;
8227 for (; rel < relend; rel++)
8228 {
8229 unsigned int r_type;
a6bb11b2
YZ
8230 bfd_reloc_code_real_type bfd_r_type;
8231 bfd_reloc_code_real_type relaxed_bfd_r_type;
a06ea964
NC
8232 reloc_howto_type *howto;
8233 unsigned long r_symndx;
8234 Elf_Internal_Sym *sym;
8235 asection *sec;
8236 struct elf_link_hash_entry *h;
8237 bfd_vma relocation;
8238 bfd_reloc_status_type r;
8239 arelent bfd_reloc;
8240 char sym_type;
8241 bfd_boolean unresolved_reloc = FALSE;
8242 char *error_message = NULL;
8243
cec5225b
YZ
8244 r_symndx = ELFNN_R_SYM (rel->r_info);
8245 r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 8246
0aa13fee
AM
8247 bfd_reloc.howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
8248 howto = bfd_reloc.howto;
a06ea964 8249
7fcfd62d 8250 if (howto == NULL)
47aeb64c
NC
8251 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
8252
a6bb11b2 8253 bfd_r_type = elfNN_aarch64_bfd_reloc_from_howto (howto);
7fcfd62d 8254
a06ea964
NC
8255 h = NULL;
8256 sym = NULL;
8257 sec = NULL;
8258
8259 if (r_symndx < symtab_hdr->sh_info)
8260 {
8261 sym = local_syms + r_symndx;
cec5225b 8262 sym_type = ELFNN_ST_TYPE (sym->st_info);
a06ea964
NC
8263 sec = local_sections[r_symndx];
8264
8265 /* An object file might have a reference to a local
8266 undefined symbol. This is a daft object file, but we
8267 should at least do something about it. */
8268 if (r_type != R_AARCH64_NONE && r_type != R_AARCH64_NULL
8269 && bfd_is_und_section (sec)
8270 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
1a72702b
AM
8271 (*info->callbacks->undefined_symbol)
8272 (info, bfd_elf_string_from_elf_section
8273 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8274 input_bfd, input_section, rel->r_offset, TRUE);
a06ea964 8275
a06ea964 8276 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1419bbe5
WN
8277
8278 /* Relocate against local STT_GNU_IFUNC symbol. */
0e1862bb 8279 if (!bfd_link_relocatable (info)
1419bbe5
WN
8280 && ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)
8281 {
8282 h = elfNN_aarch64_get_local_sym_hash (globals, input_bfd,
8283 rel, FALSE);
8284 if (h == NULL)
8285 abort ();
8286
8287 /* Set STT_GNU_IFUNC symbol value. */
8288 h->root.u.def.value = sym->st_value;
8289 h->root.u.def.section = sec;
8290 }
a06ea964
NC
8291 }
8292 else
8293 {
62d887d4 8294 bfd_boolean warned, ignored;
a06ea964
NC
8295
8296 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8297 r_symndx, symtab_hdr, sym_hashes,
8298 h, sec, relocation,
62d887d4 8299 unresolved_reloc, warned, ignored);
a06ea964
NC
8300
8301 sym_type = h->type;
8302 }
8303
8304 if (sec != NULL && discarded_section (sec))
8305 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
8306 rel, 1, relend, howto, 0, contents);
8307
0e1862bb 8308 if (bfd_link_relocatable (info))
2e0488d3 8309 continue;
a06ea964
NC
8310
8311 if (h != NULL)
8312 name = h->root.root.string;
8313 else
8314 {
8315 name = (bfd_elf_string_from_elf_section
8316 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8317 if (name == NULL || *name == '\0')
fd361982 8318 name = bfd_section_name (sec);
a06ea964
NC
8319 }
8320
8321 if (r_symndx != 0
8322 && r_type != R_AARCH64_NONE
8323 && r_type != R_AARCH64_NULL
8324 && (h == NULL
8325 || h->root.type == bfd_link_hash_defined
8326 || h->root.type == bfd_link_hash_defweak)
a6bb11b2 8327 && IS_AARCH64_TLS_RELOC (bfd_r_type) != (sym_type == STT_TLS))
a06ea964 8328 {
4eca0228 8329 _bfd_error_handler
a06ea964 8330 ((sym_type == STT_TLS
695344c0 8331 /* xgettext:c-format */
2dcf00ce 8332 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
695344c0 8333 /* xgettext:c-format */
2dcf00ce 8334 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
a06ea964 8335 input_bfd,
2dcf00ce 8336 input_section, (uint64_t) rel->r_offset, howto->name, name);
a06ea964
NC
8337 }
8338
f3ecc5c8
AC
8339 if (r_symndx
8340 && h
8341 && IS_AARCH64_TLS_RELOC (bfd_r_type)
8342 && h->root.type == bfd_link_hash_undefweak)
8343 /* We have already warned about these in aarch64_check_relocs,
8344 so just skip over them. */
8345 continue;
8346
a06ea964 8347 /* We relax only if we can see that there can be a valid transition
07d6d2b8
AM
8348 from a reloc type to another.
8349 We call elfNN_aarch64_final_link_relocate unless we're completely
8350 done, i.e., the relaxation produced the final output we want. */
a06ea964 8351
4ca9b406 8352 relaxed_bfd_r_type = aarch64_tls_transition (input_bfd, info, rel,
a6bb11b2
YZ
8353 h, r_symndx);
8354 if (relaxed_bfd_r_type != bfd_r_type)
a06ea964 8355 {
a6bb11b2
YZ
8356 bfd_r_type = relaxed_bfd_r_type;
8357 howto = elfNN_aarch64_howto_from_bfd_reloc (bfd_r_type);
8358 BFD_ASSERT (howto != NULL);
8359 r_type = howto->type;
4ca9b406
SP
8360 r = elfNN_aarch64_tls_relax (input_bfd, info, input_section,
8361 contents, rel, h, r_symndx);
a06ea964
NC
8362 unresolved_reloc = 0;
8363 }
8364 else
8365 r = bfd_reloc_continue;
8366
8367 /* There may be multiple consecutive relocations for the
07d6d2b8
AM
8368 same offset. In that case we are supposed to treat the
8369 output of each relocation as the addend for the next. */
a06ea964
NC
8370 if (rel + 1 < relend
8371 && rel->r_offset == rel[1].r_offset
cec5225b
YZ
8372 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NONE
8373 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NULL)
a06ea964
NC
8374 save_addend = TRUE;
8375 else
8376 save_addend = FALSE;
8377
8378 if (r == bfd_reloc_continue)
cec5225b 8379 r = elfNN_aarch64_final_link_relocate (howto, input_bfd, output_bfd,
a06ea964
NC
8380 input_section, contents, rel,
8381 relocation, info, sec,
8382 h, &unresolved_reloc,
1419bbe5 8383 save_addend, &addend, sym);
a06ea964 8384
4ca9b406
SP
8385 bfd_boolean c64_rtype = FALSE;
8386
0aa13fee 8387 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 8388 {
ce336788 8389 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 8390 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 8391 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 8392 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 8393 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 8394 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 8395 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 8396 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
8397 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8398 {
8399 bfd_boolean need_relocs = FALSE;
8400 bfd_byte *loc;
8401 int indx;
8402 bfd_vma off;
8403
8404 off = symbol_got_offset (input_bfd, h, r_symndx);
8405 indx = h && h->dynindx != -1 ? h->dynindx : 0;
8406
8407 need_relocs =
6dda7875 8408 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC
8409 (h == NULL
8410 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8411 || h->root.type != bfd_link_hash_undefweak);
8412
8413 BFD_ASSERT (globals->root.srelgot != NULL);
8414
8415 if (need_relocs)
8416 {
8417 Elf_Internal_Rela rela;
a6bb11b2 8418 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPMOD));
a06ea964
NC
8419 rela.r_addend = 0;
8420 rela.r_offset = globals->root.sgot->output_section->vma +
8421 globals->root.sgot->output_offset + off;
8422
8423
8424 loc = globals->root.srelgot->contents;
8425 loc += globals->root.srelgot->reloc_count++
8426 * RELOC_SIZE (htab);
cec5225b 8427 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8428
f69e4920 8429 bfd_reloc_code_real_type real_type =
0aa13fee 8430 elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
f69e4920
JW
8431
8432 if (real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
73f925cc
JW
8433 || real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
8434 || real_type == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC)
77a69ff8
JW
8435 {
8436 /* For local dynamic, don't generate DTPREL in any case.
8437 Initialize the DTPREL slot into zero, so we get module
8438 base address when invoke runtime TLS resolver. */
8439 bfd_put_NN (output_bfd, 0,
8440 globals->root.sgot->contents + off
a1bdea65 8441 + GOT_ENTRY_SIZE (globals));
77a69ff8
JW
8442 }
8443 else if (indx == 0)
a06ea964 8444 {
cec5225b 8445 bfd_put_NN (output_bfd,
a06ea964
NC
8446 relocation - dtpoff_base (info),
8447 globals->root.sgot->contents + off
a1bdea65 8448 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8449 }
8450 else
8451 {
8452 /* This TLS symbol is global. We emit a
8453 relocation to fixup the tls offset at load
8454 time. */
8455 rela.r_info =
a6bb11b2 8456 ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPREL));
a06ea964
NC
8457 rela.r_addend = 0;
8458 rela.r_offset =
8459 (globals->root.sgot->output_section->vma
8460 + globals->root.sgot->output_offset + off
a1bdea65 8461 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8462
8463 loc = globals->root.srelgot->contents;
8464 loc += globals->root.srelgot->reloc_count++
8465 * RELOC_SIZE (globals);
cec5225b
YZ
8466 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
8467 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 8468 globals->root.sgot->contents + off
a1bdea65 8469 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8470 }
8471 }
8472 else
8473 {
cec5225b 8474 bfd_put_NN (output_bfd, (bfd_vma) 1,
a06ea964 8475 globals->root.sgot->contents + off);
cec5225b 8476 bfd_put_NN (output_bfd,
a06ea964
NC
8477 relocation - dtpoff_base (info),
8478 globals->root.sgot->contents + off
a1bdea65 8479 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8480 }
8481
8482 symbol_got_offset_mark (input_bfd, h, r_symndx);
8483 }
8484 break;
8485
a6bb11b2
YZ
8486 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
8487 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
043bf05a 8488 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL
8489 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
8490 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC
8491 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8492 {
8493 bfd_boolean need_relocs = FALSE;
8494 bfd_byte *loc;
8495 int indx;
8496 bfd_vma off;
8497
8498 off = symbol_got_offset (input_bfd, h, r_symndx);
8499
8500 indx = h && h->dynindx != -1 ? h->dynindx : 0;
8501
8502 need_relocs =
6dda7875 8503 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC
8504 (h == NULL
8505 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8506 || h->root.type != bfd_link_hash_undefweak);
8507
8508 BFD_ASSERT (globals->root.srelgot != NULL);
8509
8510 if (need_relocs)
8511 {
8512 Elf_Internal_Rela rela;
8513
8514 if (indx == 0)
8515 rela.r_addend = relocation - dtpoff_base (info);
8516 else
8517 rela.r_addend = 0;
8518
a6bb11b2 8519 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_TPREL));
a06ea964
NC
8520 rela.r_offset = globals->root.sgot->output_section->vma +
8521 globals->root.sgot->output_offset + off;
8522
8523 loc = globals->root.srelgot->contents;
8524 loc += globals->root.srelgot->reloc_count++
8525 * RELOC_SIZE (htab);
8526
cec5225b 8527 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8528
cec5225b 8529 bfd_put_NN (output_bfd, rela.r_addend,
a06ea964
NC
8530 globals->root.sgot->contents + off);
8531 }
8532 else
cec5225b 8533 bfd_put_NN (output_bfd, relocation - tpoff_base (info),
a06ea964
NC
8534 globals->root.sgot->contents + off);
8535
8536 symbol_got_offset_mark (input_bfd, h, r_symndx);
8537 }
8538 break;
8539
4ca9b406
SP
8540 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
8541 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
8542 c64_rtype = TRUE;
8543 /* Fall through. */
8544
f955cccf 8545 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 8546 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 8547 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 8548 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
1ada945d 8549 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL
8550 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8551 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC
8552 if (! symbol_tlsdesc_got_offset_mark_p (input_bfd, h, r_symndx))
8553 {
8554 bfd_boolean need_relocs = FALSE;
8555 int indx = h && h->dynindx != -1 ? h->dynindx : 0;
8556 bfd_vma off = symbol_tlsdesc_got_offset (input_bfd, h, r_symndx);
8557
8558 need_relocs = (h == NULL
8559 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8560 || h->root.type != bfd_link_hash_undefweak);
8561
8562 BFD_ASSERT (globals->root.srelgot != NULL);
8563 BFD_ASSERT (globals->root.sgot != NULL);
8564
8565 if (need_relocs)
8566 {
8567 bfd_byte *loc;
8568 Elf_Internal_Rela rela;
4ca9b406
SP
8569
8570 rela.r_info = ELFNN_R_INFO (indx,
8571 (c64_rtype ? MORELLO_R (TLSDESC)
8572 : AARCH64_R (TLSDESC)));
a6bb11b2 8573
a06ea964
NC
8574 rela.r_addend = 0;
8575 rela.r_offset = (globals->root.sgotplt->output_section->vma
8576 + globals->root.sgotplt->output_offset
8577 + off + globals->sgotplt_jump_table_size);
8578
8579 if (indx == 0)
8580 rela.r_addend = relocation - dtpoff_base (info);
8581
8582 /* Allocate the next available slot in the PLT reloc
8583 section to hold our R_AARCH64_TLSDESC, the next
8584 available slot is determined from reloc_count,
8585 which we step. But note, reloc_count was
8586 artifically moved down while allocating slots for
8587 real PLT relocs such that all of the PLT relocs
8588 will fit above the initial reloc_count and the
8589 extra stuff will fit below. */
8590 loc = globals->root.srelplt->contents;
8591 loc += globals->root.srelplt->reloc_count++
8592 * RELOC_SIZE (globals);
8593
cec5225b 8594 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8595
cec5225b 8596 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964
NC
8597 globals->root.sgotplt->contents + off +
8598 globals->sgotplt_jump_table_size);
cec5225b 8599 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964
NC
8600 globals->root.sgotplt->contents + off +
8601 globals->sgotplt_jump_table_size +
a1bdea65 8602 GOT_ENTRY_SIZE (globals));
a06ea964
NC
8603 }
8604
8605 symbol_tlsdesc_got_offset_mark (input_bfd, h, r_symndx);
8606 }
8607 break;
a6bb11b2
YZ
8608 default:
8609 break;
a06ea964
NC
8610 }
8611
a06ea964 8612 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
07d6d2b8
AM
8613 because such sections are not SEC_ALLOC and thus ld.so will
8614 not process them. */
a06ea964
NC
8615 if (unresolved_reloc
8616 && !((input_section->flags & SEC_DEBUGGING) != 0
8617 && h->def_dynamic)
8618 && _bfd_elf_section_offset (output_bfd, info, input_section,
8619 +rel->r_offset) != (bfd_vma) - 1)
8620 {
4eca0228 8621 _bfd_error_handler
695344c0 8622 /* xgettext:c-format */
2dcf00ce
AM
8623 (_("%pB(%pA+%#" PRIx64 "): "
8624 "unresolvable %s relocation against symbol `%s'"),
8625 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name,
a06ea964
NC
8626 h->root.root.string);
8627 return FALSE;
8628 }
8629
8630 if (r != bfd_reloc_ok && r != bfd_reloc_continue)
8631 {
c674f5cd 8632 bfd_reloc_code_real_type real_r_type
0aa13fee 8633 = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
c674f5cd 8634
a06ea964
NC
8635 switch (r)
8636 {
8637 case bfd_reloc_overflow:
1a72702b
AM
8638 (*info->callbacks->reloc_overflow)
8639 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
8640 input_bfd, input_section, rel->r_offset);
c674f5cd
JW
8641 if (real_r_type == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
8642 || real_r_type == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14)
8643 {
8644 (*info->callbacks->warning)
8645 (info,
90b6238f 8646 _("too many GOT entries for -fpic, "
c674f5cd
JW
8647 "please recompile with -fPIC"),
8648 name, input_bfd, input_section, rel->r_offset);
8649 return FALSE;
8650 }
027e9c75
NC
8651 /* Overflow can occur when a variable is referenced with a type
8652 that has a larger alignment than the type with which it was
8653 declared. eg:
8654 file1.c: extern int foo; int a (void) { return foo; }
8655 file2.c: char bar, foo, baz;
8656 If the variable is placed into a data section at an offset
8657 that is incompatible with the larger alignment requirement
8658 overflow will occur. (Strictly speaking this is not overflow
8659 but rather an alignment problem, but the bfd_reloc_ error
8660 enum does not have a value to cover that situation).
8661
8662 Try to catch this situation here and provide a more helpful
8663 error message to the user. */
26009aa7 8664 if (addend & (((bfd_vma) 1 << howto->rightshift) - 1)
027e9c75
NC
8665 /* FIXME: Are we testing all of the appropriate reloc
8666 types here ? */
8667 && (real_r_type == BFD_RELOC_AARCH64_LD_LO19_PCREL
8668 || real_r_type == BFD_RELOC_AARCH64_LDST16_LO12
8669 || real_r_type == BFD_RELOC_AARCH64_LDST32_LO12
8670 || real_r_type == BFD_RELOC_AARCH64_LDST64_LO12
8671 || real_r_type == BFD_RELOC_AARCH64_LDST128_LO12))
8672 {
8673 info->callbacks->warning
90b6238f 8674 (info, _("one possible cause of this error is that the \
027e9c75 8675symbol is being referenced in the indicated code as if it had a larger \
90b6238f 8676alignment than was declared where it was defined"),
027e9c75
NC
8677 name, input_bfd, input_section, rel->r_offset);
8678 }
40bbb79e
SP
8679
8680 if (real_r_type == BFD_RELOC_MORELLO_CAPINIT)
8681 info->callbacks->warning
8682 (info, _("relocation offset must be capability aligned"),
8683 name, input_bfd, input_section, rel->r_offset);
a06ea964
NC
8684 break;
8685
8686 case bfd_reloc_undefined:
1a72702b
AM
8687 (*info->callbacks->undefined_symbol)
8688 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
a06ea964
NC
8689 break;
8690
8691 case bfd_reloc_outofrange:
8692 error_message = _("out of range");
8693 goto common_error;
8694
8695 case bfd_reloc_notsupported:
8696 error_message = _("unsupported relocation");
8697 goto common_error;
8698
8699 case bfd_reloc_dangerous:
8700 /* error_message should already be set. */
8701 goto common_error;
8702
8703 default:
8704 error_message = _("unknown error");
8705 /* Fall through. */
8706
8707 common_error:
8708 BFD_ASSERT (error_message != NULL);
1a72702b
AM
8709 (*info->callbacks->reloc_dangerous)
8710 (info, error_message, input_bfd, input_section, rel->r_offset);
a06ea964
NC
8711 break;
8712 }
8713 }
027e9c75
NC
8714
8715 if (!save_addend)
8716 addend = 0;
a06ea964
NC
8717 }
8718
8719 return TRUE;
8720}
8721
8722/* Set the right machine number. */
8723
8724static bfd_boolean
cec5225b 8725elfNN_aarch64_object_p (bfd *abfd)
a06ea964 8726{
cec5225b
YZ
8727#if ARCH_SIZE == 32
8728 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64_ilp32);
8729#else
a06ea964 8730 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64);
cec5225b 8731#endif
a06ea964
NC
8732 return TRUE;
8733}
8734
8735/* Function to keep AArch64 specific flags in the ELF header. */
8736
8737static bfd_boolean
cec5225b 8738elfNN_aarch64_set_private_flags (bfd *abfd, flagword flags)
a06ea964
NC
8739{
8740 if (elf_flags_init (abfd) && elf_elfheader (abfd)->e_flags != flags)
8741 {
8742 }
8743 else
8744 {
8745 elf_elfheader (abfd)->e_flags = flags;
8746 elf_flags_init (abfd) = TRUE;
8747 }
8748
8749 return TRUE;
8750}
8751
a06ea964
NC
8752/* Merge backend specific data from an object file to the output
8753 object file when linking. */
8754
8755static bfd_boolean
50e03d47 8756elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
a06ea964 8757{
50e03d47 8758 bfd *obfd = info->output_bfd;
a06ea964
NC
8759 flagword out_flags;
8760 flagword in_flags;
f8180c20 8761 bfd_boolean flags_compatible = FALSE;
a06ea964
NC
8762 asection *sec;
8763
8764 /* Check if we have the same endianess. */
50e03d47 8765 if (!_bfd_generic_verify_endian_match (ibfd, info))
a06ea964
NC
8766 return FALSE;
8767
8768 if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
8769 return TRUE;
8770
8771 /* The input BFD must have had its flags initialised. */
8772 /* The following seems bogus to me -- The flags are initialized in
8773 the assembler but I don't think an elf_flags_init field is
8774 written into the object. */
8775 /* BFD_ASSERT (elf_flags_init (ibfd)); */
8776
8777 in_flags = elf_elfheader (ibfd)->e_flags;
8778 out_flags = elf_elfheader (obfd)->e_flags;
8779
8780 if (!elf_flags_init (obfd))
8781 {
f8180c20
MM
8782 elf_flags_init (obfd) = TRUE;
8783
a06ea964 8784 /* If the input is the default architecture and had the default
07d6d2b8
AM
8785 flags then do not bother setting the flags for the output
8786 architecture, instead allow future merges to do this. If no
8787 future merges ever set these flags then they will retain their
8788 uninitialised values, which surprise surprise, correspond
8789 to the default values. */
a06ea964
NC
8790 if (bfd_get_arch_info (ibfd)->the_default
8791 && elf_elfheader (ibfd)->e_flags == 0)
8792 return TRUE;
8793
a06ea964
NC
8794 elf_elfheader (obfd)->e_flags = in_flags;
8795
8796 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
8797 && bfd_get_arch_info (obfd)->the_default)
8798 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
8799 bfd_get_mach (ibfd));
8800
8801 return TRUE;
8802 }
8803
8804 /* Identical flags must be compatible. */
8805 if (in_flags == out_flags)
8806 return TRUE;
8807
8808 /* Check to see if the input BFD actually contains any sections. If
8809 not, its flags may not have been initialised either, but it
8810 cannot actually cause any incompatiblity. Do not short-circuit
8811 dynamic objects; their section list may be emptied by
8812 elf_link_add_object_symbols.
8813
8814 Also check to see if there are no code sections in the input.
8815 In this case there is no need to check for code specific flags.
8816 XXX - do we need to worry about floating-point format compatability
f8180c20
MM
8817 in data sections ?
8818
8819 We definitely need to check for data sections if one set of flags is
8820 targetting the PURECAP abi and another is not. Pointers being
8821 capabilities in data sections can not be glossed over. */
a06ea964
NC
8822 if (!(ibfd->flags & DYNAMIC))
8823 {
8824 bfd_boolean null_input_bfd = TRUE;
f8180c20
MM
8825 bfd_boolean only_data_sections
8826 = !(in_flags & EF_AARCH64_CHERI_PURECAP
8827 || out_flags & EF_AARCH64_CHERI_PURECAP);
a06ea964
NC
8828
8829 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
8830 {
fd361982 8831 if ((bfd_section_flags (sec)
a06ea964
NC
8832 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
8833 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
8834 only_data_sections = FALSE;
8835
8836 null_input_bfd = FALSE;
8837 break;
8838 }
8839
8840 if (null_input_bfd || only_data_sections)
8841 return TRUE;
8842 }
8843
8844 return flags_compatible;
8845}
8846
8847/* Display the flags field. */
8848
8849static bfd_boolean
cec5225b 8850elfNN_aarch64_print_private_bfd_data (bfd *abfd, void *ptr)
a06ea964
NC
8851{
8852 FILE *file = (FILE *) ptr;
8853 unsigned long flags;
8854
8855 BFD_ASSERT (abfd != NULL && ptr != NULL);
8856
8857 /* Print normal ELF private data. */
8858 _bfd_elf_print_private_bfd_data (abfd, ptr);
8859
8860 flags = elf_elfheader (abfd)->e_flags;
8861 /* Ignore init flag - it may not be set, despite the flags field
8862 containing valid data. */
8863
8864 /* xgettext:c-format */
8865 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
8866
8867 if (flags)
8868 fprintf (file, _("<Unrecognised flag bits set>"));
8869
8870 fputc ('\n', file);
8871
8872 return TRUE;
8873}
8874
6353d82b
JW
8875/* Return true if we need copy relocation against EH. */
8876
8877static bfd_boolean
8878need_copy_relocation_p (struct elf_aarch64_link_hash_entry *eh)
8879{
8880 struct elf_dyn_relocs *p;
8881 asection *s;
8882
190eb1dd 8883 for (p = eh->root.dyn_relocs; p != NULL; p = p->next)
6353d82b
JW
8884 {
8885 /* If there is any pc-relative reference, we need to keep copy relocation
8886 to avoid propagating the relocation into runtime that current glibc
8887 does not support. */
8888 if (p->pc_count)
8889 return TRUE;
8890
8891 s = p->sec->output_section;
8892 /* Need copy relocation if it's against read-only section. */
8893 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8894 return TRUE;
8895 }
8896
8897 return FALSE;
8898}
8899
a06ea964
NC
8900/* Adjust a symbol defined by a dynamic object and referenced by a
8901 regular object. The current definition is in some section of the
8902 dynamic object, but we're not including those sections. We have to
8903 change the definition to something the rest of the link can
8904 understand. */
8905
8906static bfd_boolean
cec5225b 8907elfNN_aarch64_adjust_dynamic_symbol (struct bfd_link_info *info,
a06ea964
NC
8908 struct elf_link_hash_entry *h)
8909{
cec5225b 8910 struct elf_aarch64_link_hash_table *htab;
5474d94f 8911 asection *s, *srel;
a06ea964
NC
8912
8913 /* If this is a function, put it in the procedure linkage table. We
8914 will fill in the contents of the procedure linkage table later,
8915 when we know the address of the .got section. */
1419bbe5 8916 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
a06ea964
NC
8917 {
8918 if (h->plt.refcount <= 0
1419bbe5
WN
8919 || (h->type != STT_GNU_IFUNC
8920 && (SYMBOL_CALLS_LOCAL (info, h)
8921 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8922 && h->root.type == bfd_link_hash_undefweak))))
a06ea964
NC
8923 {
8924 /* This case can occur if we saw a CALL26 reloc in
8925 an input file, but the symbol wasn't referred to
8926 by a dynamic object or all references were
8927 garbage collected. In which case we can end up
8928 resolving. */
8929 h->plt.offset = (bfd_vma) - 1;
8930 h->needs_plt = 0;
8931 }
8932
8933 return TRUE;
8934 }
8935 else
80de0c6d 8936 /* Otherwise, reset to -1. */
a06ea964
NC
8937 h->plt.offset = (bfd_vma) - 1;
8938
8939
8940 /* If this is a weak symbol, and there is a real definition, the
8941 processor independent code will have arranged for us to see the
8942 real definition first, and we can just use the same value. */
60d67dc8 8943 if (h->is_weakalias)
a06ea964 8944 {
60d67dc8
AM
8945 struct elf_link_hash_entry *def = weakdef (h);
8946 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
8947 h->root.u.def.section = def->root.u.def.section;
8948 h->root.u.def.value = def->root.u.def.value;
a06ea964 8949 if (ELIMINATE_COPY_RELOCS || info->nocopyreloc)
60d67dc8 8950 h->non_got_ref = def->non_got_ref;
a06ea964
NC
8951 return TRUE;
8952 }
8953
8954 /* If we are creating a shared library, we must presume that the
8955 only references to the symbol are via the global offset table.
8956 For such cases we need not do anything here; the relocations will
8957 be handled correctly by relocate_section. */
0e1862bb 8958 if (bfd_link_pic (info))
a06ea964
NC
8959 return TRUE;
8960
8961 /* If there are no references to this symbol that do not use the
8962 GOT, we don't need to generate a copy reloc. */
8963 if (!h->non_got_ref)
8964 return TRUE;
8965
8966 /* If -z nocopyreloc was given, we won't generate them either. */
8967 if (info->nocopyreloc)
8968 {
8969 h->non_got_ref = 0;
8970 return TRUE;
8971 }
8972
6353d82b
JW
8973 if (ELIMINATE_COPY_RELOCS)
8974 {
8975 struct elf_aarch64_link_hash_entry *eh;
dce2246a 8976 /* If we don't find any dynamic relocs in read-only sections, then
6353d82b
JW
8977 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
8978 eh = (struct elf_aarch64_link_hash_entry *) h;
8979 if (!need_copy_relocation_p (eh))
8980 {
8981 h->non_got_ref = 0;
8982 return TRUE;
8983 }
8984 }
8985
a06ea964
NC
8986 /* We must allocate the symbol in our .dynbss section, which will
8987 become part of the .bss section of the executable. There will be
8988 an entry for this symbol in the .dynsym section. The dynamic
8989 object will contain position independent code, so all references
8990 from the dynamic object to this symbol will go through the global
8991 offset table. The dynamic linker will use the .dynsym entry to
8992 determine the address it must put in the global offset table, so
8993 both the dynamic object and the regular object will refer to the
8994 same memory location for the variable. */
8995
cec5225b 8996 htab = elf_aarch64_hash_table (info);
a06ea964
NC
8997
8998 /* We must generate a R_AARCH64_COPY reloc to tell the dynamic linker
8999 to copy the initial value out of the dynamic object and into the
9000 runtime process image. */
5474d94f
AM
9001 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
9002 {
9003 s = htab->root.sdynrelro;
9004 srel = htab->root.sreldynrelro;
9005 }
9006 else
9007 {
9008 s = htab->root.sdynbss;
9009 srel = htab->root.srelbss;
9010 }
a06ea964
NC
9011 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
9012 {
5474d94f 9013 srel->size += RELOC_SIZE (htab);
a06ea964
NC
9014 h->needs_copy = 1;
9015 }
9016
6cabe1ea 9017 return _bfd_elf_adjust_dynamic_copy (info, h, s);
a06ea964
NC
9018
9019}
9020
9021static bfd_boolean
cec5225b 9022elfNN_aarch64_allocate_local_symbols (bfd *abfd, unsigned number)
a06ea964
NC
9023{
9024 struct elf_aarch64_local_symbol *locals;
cec5225b 9025 locals = elf_aarch64_locals (abfd);
a06ea964
NC
9026 if (locals == NULL)
9027 {
9028 locals = (struct elf_aarch64_local_symbol *)
9029 bfd_zalloc (abfd, number * sizeof (struct elf_aarch64_local_symbol));
9030 if (locals == NULL)
9031 return FALSE;
cec5225b 9032 elf_aarch64_locals (abfd) = locals;
a06ea964
NC
9033 }
9034 return TRUE;
9035}
9036
a1bdea65
SP
9037/* Initialise the .got section to hold the global offset table. */
9038
9039static void
9040aarch64_elf_init_got_section (bfd *abfd, struct bfd_link_info *info)
9041{
9042 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9043 asection *s;
9044 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
9045 unsigned int align = bed->s->log_file_align + globals->c64_rel;
9046
9047 if (globals->root.sgot != NULL)
9048 {
9049 bfd_set_section_alignment (globals->root.srelgot,
9050 bed->s->log_file_align);
9051 bfd_set_section_alignment (globals->root.sgot, align);
9052 globals->root.sgot->size += GOT_ENTRY_SIZE (globals);
9053 }
9054
8d4edc5f
SP
9055 /* Track capability initialisation for static non-PIE binaries. */
9056 if (bfd_link_executable (info) && !bfd_link_pic (info)
9057 && globals->srelcaps == NULL)
9058 globals->srelcaps = globals->root.srelgot;
9059
a1bdea65
SP
9060 if (globals->root.igotplt != NULL)
9061 bfd_set_section_alignment (globals->root.igotplt, align);
9062
9063 s = globals->root.sgot;
9064
9065 if (globals->root.sgotplt != NULL)
9066 {
9067 bfd_set_section_alignment (globals->root.sgotplt, align);
9068 s = globals->root.sgotplt;
9069 }
9070
9071 /* The first bit of the global offset table is the header. */
9072 if (s != NULL)
9073 s->size += bed->got_header_size (info);
9074}
9075
cc0efaa8
MS
9076/* Create the .got section to hold the global offset table. */
9077
9078static bfd_boolean
9079aarch64_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
9080{
9081 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9082 flagword flags;
9083 asection *s;
9084 struct elf_link_hash_entry *h;
9085 struct elf_link_hash_table *htab = elf_hash_table (info);
9086
9087 /* This function may be called more than once. */
ce558b89 9088 if (htab->sgot != NULL)
cc0efaa8
MS
9089 return TRUE;
9090
9091 flags = bed->dynamic_sec_flags;
9092
9093 s = bfd_make_section_anyway_with_flags (abfd,
9094 (bed->rela_plts_and_copies_p
9095 ? ".rela.got" : ".rel.got"),
9096 (bed->dynamic_sec_flags
9097 | SEC_READONLY));
a1bdea65 9098 if (s == NULL)
cc0efaa8
MS
9099 return FALSE;
9100 htab->srelgot = s;
9101
9102 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
a1bdea65 9103 if (s == NULL)
cc0efaa8
MS
9104 return FALSE;
9105 htab->sgot = s;
cc0efaa8
MS
9106
9107 if (bed->want_got_sym)
9108 {
9109 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
9110 (or .got.plt) section. We don't do this in the linker script
9111 because we don't want to define the symbol if we are not creating
9112 a global offset table. */
9113 h = _bfd_elf_define_linkage_sym (abfd, info, s,
9114 "_GLOBAL_OFFSET_TABLE_");
9115 elf_hash_table (info)->hgot = h;
9116 if (h == NULL)
9117 return FALSE;
9118 }
9119
9120 if (bed->want_got_plt)
9121 {
9122 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
a1bdea65 9123 if (s == NULL)
cc0efaa8
MS
9124 return FALSE;
9125 htab->sgotplt = s;
9126 }
9127
cc0efaa8
MS
9128 return TRUE;
9129}
9130
a06ea964
NC
9131/* Look through the relocs for a section during the first phase. */
9132
9133static bfd_boolean
cec5225b 9134elfNN_aarch64_check_relocs (bfd *abfd, struct bfd_link_info *info,
a06ea964
NC
9135 asection *sec, const Elf_Internal_Rela *relocs)
9136{
9137 Elf_Internal_Shdr *symtab_hdr;
9138 struct elf_link_hash_entry **sym_hashes;
9139 const Elf_Internal_Rela *rel;
9140 const Elf_Internal_Rela *rel_end;
9141 asection *sreloc;
9142
cec5225b 9143 struct elf_aarch64_link_hash_table *htab;
a06ea964 9144
0e1862bb 9145 if (bfd_link_relocatable (info))
a06ea964
NC
9146 return TRUE;
9147
9148 BFD_ASSERT (is_aarch64_elf (abfd));
9149
cec5225b 9150 htab = elf_aarch64_hash_table (info);
a06ea964
NC
9151 sreloc = NULL;
9152
9153 symtab_hdr = &elf_symtab_hdr (abfd);
9154 sym_hashes = elf_sym_hashes (abfd);
a06ea964 9155
7ff36d1a 9156 bfd_elfNN_aarch64_init_maps (abfd, info);
f0070c1e 9157
a06ea964
NC
9158 rel_end = relocs + sec->reloc_count;
9159 for (rel = relocs; rel < rel_end; rel++)
9160 {
9161 struct elf_link_hash_entry *h;
f3ecc5c8 9162 unsigned int r_symndx, r_type;
a6bb11b2 9163 bfd_reloc_code_real_type bfd_r_type;
1419bbe5 9164 Elf_Internal_Sym *isym;
a06ea964 9165
cec5225b 9166 r_symndx = ELFNN_R_SYM (rel->r_info);
f3ecc5c8
AC
9167 r_type = ELFNN_R_TYPE (rel->r_info);
9168 bfd_r_type = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a06ea964
NC
9169
9170 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
9171 {
695344c0 9172 /* xgettext:c-format */
871b3ab2 9173 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx);
a06ea964
NC
9174 return FALSE;
9175 }
9176
ed5acf27 9177 if (r_symndx < symtab_hdr->sh_info)
1419bbe5
WN
9178 {
9179 /* A local symbol. */
f1dfbfdb 9180 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
1419bbe5
WN
9181 abfd, r_symndx);
9182 if (isym == NULL)
9183 return FALSE;
9184
9185 /* Check relocation against local STT_GNU_IFUNC symbol. */
9186 if (ELF_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
9187 {
9188 h = elfNN_aarch64_get_local_sym_hash (htab, abfd, rel,
9189 TRUE);
9190 if (h == NULL)
9191 return FALSE;
9192
9193 /* Fake a STT_GNU_IFUNC symbol. */
9194 h->type = STT_GNU_IFUNC;
9195 h->def_regular = 1;
9196 h->ref_regular = 1;
9197 h->forced_local = 1;
9198 h->root.type = bfd_link_hash_defined;
9199 }
9200 else
9201 h = NULL;
9202 }
a06ea964
NC
9203 else
9204 {
9205 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9206 while (h->root.type == bfd_link_hash_indirect
9207 || h->root.type == bfd_link_hash_warning)
9208 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9209 }
9210
f3ecc5c8
AC
9211 /* Ignore TLS relocations against weak undef symbols and warn about them.
9212 The behaviour of weak TLS variables is not well defined. Since making
9213 these well behaved is not a priority for Morello, we simply ignore
9214 TLS relocations against such symbols here to avoid the linker crashing
9215 on these and to enable making progress in other areas. */
9216 if (r_symndx
9217 && h
9218 && IS_AARCH64_TLS_RELOC (bfd_r_type)
9219 && h->root.type == bfd_link_hash_undefweak)
9220 {
9221 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9222 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): ignoring TLS relocation "
9223 "%s against undef weak symbol %s"),
9224 abfd, sec,
9225 (uint64_t) rel->r_offset,
9226 elfNN_aarch64_howto_table[howto_index].name,
9227 h->root.root.string);
9228 continue;
9229 }
9230
a06ea964 9231 /* Could be done earlier, if h were already available. */
4ca9b406 9232 bfd_r_type = aarch64_tls_transition (abfd, info, rel, h, r_symndx);
a06ea964 9233
1419bbe5
WN
9234 if (h != NULL)
9235 {
18f822a0
JW
9236 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
9237 This shows up in particular in an R_AARCH64_PREL64 in large model
9238 when calculating the pc-relative address to .got section which is
9239 used to initialize the gp register. */
9240 if (h->root.root.string
9241 && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
9242 {
9243 if (htab->root.dynobj == NULL)
9244 htab->root.dynobj = abfd;
9245
9246 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
9247 return FALSE;
9248
9249 BFD_ASSERT (h == htab->root.hgot);
9250 }
9251
1419bbe5
WN
9252 /* Create the ifunc sections for static executables. If we
9253 never see an indirect function symbol nor we are building
9254 a static executable, those sections will be empty and
9255 won't appear in output. */
9256 switch (bfd_r_type)
9257 {
9258 default:
9259 break;
9260
e19e9199
SP
9261 case BFD_RELOC_MORELLO_CALL26:
9262 case BFD_RELOC_MORELLO_JUMP26:
9263 /* For dynamic symbols record caller information so that we can
9264 decide what kind of PLT stubs to emit. */
9265 if (h != NULL)
9266 elf_aarch64_hash_entry (h)->got_type = GOT_CAP;
9267 /* Fall through. */
9268
ce336788
JW
9269 case BFD_RELOC_AARCH64_ADD_LO12:
9270 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 9271 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
ce336788 9272 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 9273 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5 9274 case BFD_RELOC_AARCH64_CALL26:
ce336788 9275 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
1419bbe5 9276 case BFD_RELOC_AARCH64_JUMP26:
7018c030 9277 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
1419bbe5 9278 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 9279 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 9280 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
1419bbe5 9281 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 9282 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
dc8008f5 9283 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 9284 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
ce336788 9285 case BFD_RELOC_AARCH64_NN:
1419bbe5
WN
9286 if (htab->root.dynobj == NULL)
9287 htab->root.dynobj = abfd;
9288 if (!_bfd_elf_create_ifunc_sections (htab->root.dynobj, info))
9289 return FALSE;
9290 break;
9291 }
9292
2d0ca824 9293 /* It is referenced by a non-shared object. */
1419bbe5 9294 h->ref_regular = 1;
1419bbe5
WN
9295 }
9296
a6bb11b2 9297 switch (bfd_r_type)
a06ea964 9298 {
79e74192
RL
9299 case BFD_RELOC_AARCH64_16:
9300#if ARCH_SIZE == 64
9301 case BFD_RELOC_AARCH64_32:
9302#endif
279b2f94 9303 if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0)
79e74192 9304 {
279b2f94
RL
9305 if (h != NULL
9306 /* This is an absolute symbol. It represents a value instead
9307 of an address. */
c691de6a 9308 && (bfd_is_abs_symbol (&h->root)
279b2f94
RL
9309 /* This is an undefined symbol. */
9310 || h->root.type == bfd_link_hash_undefined))
9311 break;
9312
9313 /* For local symbols, defined global symbols in a non-ABS section,
9314 it is assumed that the value is an address. */
79e74192
RL
9315 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9316 _bfd_error_handler
9317 /* xgettext:c-format */
871b3ab2 9318 (_("%pB: relocation %s against `%s' can not be used when making "
79e74192
RL
9319 "a shared object"),
9320 abfd, elfNN_aarch64_howto_table[howto_index].name,
9321 (h) ? h->root.root.string : "a local symbol");
9322 bfd_set_error (bfd_error_bad_value);
9323 return FALSE;
9324 }
9325 else
9326 break;
9327
6353d82b
JW
9328 case BFD_RELOC_AARCH64_MOVW_G0_NC:
9329 case BFD_RELOC_AARCH64_MOVW_G1_NC:
9330 case BFD_RELOC_AARCH64_MOVW_G2_NC:
9331 case BFD_RELOC_AARCH64_MOVW_G3:
9332 if (bfd_link_pic (info))
9333 {
9334 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9335 _bfd_error_handler
9336 /* xgettext:c-format */
871b3ab2 9337 (_("%pB: relocation %s against `%s' can not be used when making "
6353d82b
JW
9338 "a shared object; recompile with -fPIC"),
9339 abfd, elfNN_aarch64_howto_table[howto_index].name,
9340 (h) ? h->root.root.string : "a local symbol");
9341 bfd_set_error (bfd_error_bad_value);
9342 return FALSE;
9343 }
9344 /* Fall through. */
9345
9346 case BFD_RELOC_AARCH64_16_PCREL:
9347 case BFD_RELOC_AARCH64_32_PCREL:
9348 case BFD_RELOC_AARCH64_64_PCREL:
9349 case BFD_RELOC_AARCH64_ADD_LO12:
9350 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
9351 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP
9352 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
9353 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
6353d82b
JW
9354 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
9355 case BFD_RELOC_AARCH64_LDST128_LO12:
9356 case BFD_RELOC_AARCH64_LDST16_LO12:
9357 case BFD_RELOC_AARCH64_LDST32_LO12:
9358 case BFD_RELOC_AARCH64_LDST64_LO12:
9359 case BFD_RELOC_AARCH64_LDST8_LO12:
9360 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 9361 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
6353d82b
JW
9362 if (h == NULL || bfd_link_pic (info))
9363 break;
9364 /* Fall through. */
9365
a6bb11b2 9366 case BFD_RELOC_AARCH64_NN:
a06ea964
NC
9367
9368 /* We don't need to handle relocs into sections not going into
9369 the "real" output. */
9370 if ((sec->flags & SEC_ALLOC) == 0)
9371 break;
9372
9373 if (h != NULL)
9374 {
0e1862bb 9375 if (!bfd_link_pic (info))
a06ea964
NC
9376 h->non_got_ref = 1;
9377
9378 h->plt.refcount += 1;
9379 h->pointer_equality_needed = 1;
9380 }
9381
9382 /* No need to do anything if we're not creating a shared
9383 object. */
6353d82b
JW
9384 if (!(bfd_link_pic (info)
9385 /* If on the other hand, we are creating an executable, we
9386 may need to keep relocations for symbols satisfied by a
9387 dynamic library if we manage to avoid copy relocs for the
9388 symbol.
9389
9390 NOTE: Currently, there is no support of copy relocs
9391 elimination on pc-relative relocation types, because there is
9392 no dynamic relocation support for them in glibc. We still
9393 record the dynamic symbol reference for them. This is
9394 because one symbol may be referenced by both absolute
9395 relocation (for example, BFD_RELOC_AARCH64_NN) and
9396 pc-relative relocation. We need full symbol reference
9397 information to make correct decision later in
9398 elfNN_aarch64_adjust_dynamic_symbol. */
9399 || (ELIMINATE_COPY_RELOCS
9400 && !bfd_link_pic (info)
9401 && h != NULL
9402 && (h->root.type == bfd_link_hash_defweak
9403 || !h->def_regular))))
a06ea964
NC
9404 break;
9405
9406 {
9407 struct elf_dyn_relocs *p;
9408 struct elf_dyn_relocs **head;
6353d82b 9409 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
a06ea964
NC
9410
9411 /* We must copy these reloc types into the output file.
9412 Create a reloc section in dynobj and make room for
9413 this reloc. */
9414 if (sreloc == NULL)
9415 {
9416 if (htab->root.dynobj == NULL)
9417 htab->root.dynobj = abfd;
9418
9419 sreloc = _bfd_elf_make_dynamic_reloc_section
0608afa7 9420 (sec, htab->root.dynobj, LOG_FILE_ALIGN, abfd, /*rela? */ TRUE);
a06ea964
NC
9421
9422 if (sreloc == NULL)
9423 return FALSE;
9424 }
9425
9426 /* If this is a global symbol, we count the number of
9427 relocations we need for this symbol. */
9428 if (h != NULL)
9429 {
190eb1dd 9430 head = &h->dyn_relocs;
a06ea964
NC
9431 }
9432 else
9433 {
9434 /* Track dynamic relocs needed for local syms too.
9435 We really need local syms available to do this
9436 easily. Oh well. */
9437
9438 asection *s;
9439 void **vpp;
a06ea964 9440
f1dfbfdb 9441 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
a06ea964
NC
9442 abfd, r_symndx);
9443 if (isym == NULL)
9444 return FALSE;
9445
9446 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
9447 if (s == NULL)
9448 s = sec;
9449
9450 /* Beware of type punned pointers vs strict aliasing
9451 rules. */
9452 vpp = &(elf_section_data (s)->local_dynrel);
9453 head = (struct elf_dyn_relocs **) vpp;
9454 }
9455
9456 p = *head;
9457 if (p == NULL || p->sec != sec)
9458 {
986f0783 9459 size_t amt = sizeof *p;
a06ea964
NC
9460 p = ((struct elf_dyn_relocs *)
9461 bfd_zalloc (htab->root.dynobj, amt));
9462 if (p == NULL)
9463 return FALSE;
9464 p->next = *head;
9465 *head = p;
9466 p->sec = sec;
9467 }
9468
9469 p->count += 1;
9470
6353d82b
JW
9471 if (elfNN_aarch64_howto_table[howto_index].pc_relative)
9472 p->pc_count += 1;
a06ea964
NC
9473 }
9474 break;
9475
9476 /* RR: We probably want to keep a consistency check that
9477 there are no dangling GOT_PAGE relocs. */
92504105 9478 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a1bdea65 9479 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
4ca9b406
SP
9480 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
9481 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a1bdea65
SP
9482 htab->c64_rel = 1;
9483 /* Fall through. */
9484
9485 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
7bcccb57 9486 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 9487 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
7bcccb57 9488 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 9489 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 9490 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
7bcccb57 9491 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 9492 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 9493 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
f955cccf 9494 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
7bcccb57 9495 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 9496 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7bcccb57 9497 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 9498 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 9499 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL
9500 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
9501 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a6bb11b2 9502 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
7bcccb57 9503 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 9504 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 9505 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 9506 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
a6bb11b2 9507 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 9508 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
7bcccb57 9509 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 9510 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL
9511 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
9512 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
73f925cc 9513 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 9514 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 9515 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
9516 {
9517 unsigned got_type;
9518 unsigned old_got_type;
9519
a6bb11b2 9520 got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC
9521
9522 if (h)
9523 {
9524 h->got.refcount += 1;
cec5225b 9525 old_got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC
9526 }
9527 else
9528 {
9529 struct elf_aarch64_local_symbol *locals;
9530
cec5225b 9531 if (!elfNN_aarch64_allocate_local_symbols
a06ea964
NC
9532 (abfd, symtab_hdr->sh_info))
9533 return FALSE;
9534
cec5225b 9535 locals = elf_aarch64_locals (abfd);
a06ea964
NC
9536 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
9537 locals[r_symndx].got_refcount += 1;
9538 old_got_type = locals[r_symndx].got_type;
9539 }
9540
9541 /* If a variable is accessed with both general dynamic TLS
9542 methods, two slots may be created. */
9543 if (GOT_TLS_GD_ANY_P (old_got_type) && GOT_TLS_GD_ANY_P (got_type))
9544 got_type |= old_got_type;
9545
9546 /* We will already have issued an error message if there
9547 is a TLS/non-TLS mismatch, based on the symbol type.
9548 So just combine any TLS types needed. */
9549 if (old_got_type != GOT_UNKNOWN && old_got_type != GOT_NORMAL
a1bdea65
SP
9550 && got_type != GOT_NORMAL && old_got_type != GOT_CAP
9551 && got_type != GOT_CAP)
a06ea964
NC
9552 got_type |= old_got_type;
9553
9554 /* If the symbol is accessed by both IE and GD methods, we
9555 are able to relax. Turn off the GD flag, without
9556 messing up with any other kind of TLS types that may be
9557 involved. */
9558 if ((got_type & GOT_TLS_IE) && GOT_TLS_GD_ANY_P (got_type))
9559 got_type &= ~ (GOT_TLSDESC_GD | GOT_TLS_GD);
9560
4ca9b406
SP
9561 /* Prefer the capability reference. */
9562 if ((old_got_type & GOT_CAP) && (got_type & GOT_NORMAL))
9563 {
9564 got_type &= ~GOT_NORMAL;
9565 got_type |= GOT_CAP;
9566 }
9567
9568 if (old_got_type != got_type)
a06ea964
NC
9569 {
9570 if (h != NULL)
cec5225b 9571 elf_aarch64_hash_entry (h)->got_type = got_type;
a06ea964
NC
9572 else
9573 {
9574 struct elf_aarch64_local_symbol *locals;
cec5225b 9575 locals = elf_aarch64_locals (abfd);
a06ea964
NC
9576 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
9577 locals[r_symndx].got_type = got_type;
9578 }
9579 }
9580
cc0efaa8
MS
9581 if (htab->root.dynobj == NULL)
9582 htab->root.dynobj = abfd;
9583 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
9584 return FALSE;
a06ea964
NC
9585 break;
9586 }
9587
e19e9199
SP
9588 case BFD_RELOC_MORELLO_CALL26:
9589 case BFD_RELOC_MORELLO_JUMP26:
9590 htab->c64_rel = 1;
9591 if (h != NULL)
9592 elf_aarch64_hash_entry (h)->got_type = GOT_CAP;
9593
9594 /* Fall through. */
a6bb11b2
YZ
9595 case BFD_RELOC_AARCH64_CALL26:
9596 case BFD_RELOC_AARCH64_JUMP26:
a06ea964 9597 if (h == NULL)
f0070c1e
SP
9598 {
9599 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, abfd,
9600 r_symndx);
9601 if (isym == NULL)
9602 return FALSE;
9603
9604 asection *s = bfd_section_from_elf_index (abfd, isym->st_shndx);
9605
9606 if (s == NULL)
9607 s = sec;
9608
9609 if (c64_value_p (s, isym->st_value))
9610 isym->st_target_internal |= ST_BRANCH_TO_C64;
9611
9612 /* If this is a local symbol then we resolve it
9613 directly without creating a PLT entry. */
9614 continue;
9615 }
9616
9617 if (h->root.type == bfd_link_hash_defined
9618 || h->root.type == bfd_link_hash_defweak)
9619 {
9620 asection *sym_sec = h->root.u.def.section;
9621 bfd_vma sym_value = h->root.u.def.value;
9622
9623 if (sym_sec != NULL && c64_value_p (sym_sec, sym_value))
9624 h->target_internal |= ST_BRANCH_TO_C64;
9625 }
a06ea964
NC
9626
9627 h->needs_plt = 1;
1419bbe5
WN
9628 if (h->plt.refcount <= 0)
9629 h->plt.refcount = 1;
9630 else
9631 h->plt.refcount += 1;
a06ea964 9632 break;
a6bb11b2 9633
40bbb79e
SP
9634 case BFD_RELOC_MORELLO_CAPINIT:
9635 if (htab->srelcaps == NULL)
9636 {
9637 if (htab->root.dynobj == NULL)
9638 htab->root.dynobj = abfd;
9639
9640 sreloc = _bfd_elf_make_dynamic_reloc_section
9641 (sec, htab->root.dynobj, LOG_FILE_ALIGN,
9642 abfd, /*rela? */ TRUE);
9643
9644 if (sreloc == NULL)
9645 return FALSE;
9646
9647 htab->srelcaps = sreloc;
9648 }
9649 htab->srelcaps->size += RELOC_SIZE (htab);
9650
9651 break;
9652
a6bb11b2
YZ
9653 default:
9654 break;
a06ea964
NC
9655 }
9656 }
a6bb11b2 9657
a06ea964
NC
9658 return TRUE;
9659}
9660
9661/* Treat mapping symbols as special target symbols. */
9662
9663static bfd_boolean
cec5225b 9664elfNN_aarch64_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC
9665 asymbol *sym)
9666{
9667 return bfd_is_aarch64_special_symbol_name (sym->name,
9668 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY);
9669}
9670
e7679060
AM
9671/* If the ELF symbol SYM might be a function in SEC, return the
9672 function size and set *CODE_OFF to the function's entry point,
9673 otherwise return zero. */
a06ea964 9674
e7679060
AM
9675static bfd_size_type
9676elfNN_aarch64_maybe_function_sym (const asymbol *sym, asection *sec,
9677 bfd_vma *code_off)
9678{
9679 bfd_size_type size;
a06ea964 9680
e7679060
AM
9681 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
9682 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
9683 || sym->section != sec)
9684 return 0;
a06ea964 9685
e7679060
AM
9686 if (!(sym->flags & BSF_SYNTHETIC))
9687 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
9688 {
a06ea964
NC
9689 case STT_FUNC:
9690 case STT_NOTYPE:
a06ea964 9691 break;
e7679060
AM
9692 default:
9693 return 0;
9694 }
a06ea964 9695
e7679060
AM
9696 if ((sym->flags & BSF_LOCAL)
9697 && bfd_is_aarch64_special_symbol_name (sym->name,
9698 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY))
9699 return 0;
a06ea964 9700
e7679060
AM
9701 *code_off = sym->value;
9702 size = 0;
9703 if (!(sym->flags & BSF_SYNTHETIC))
9704 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
9705 if (size == 0)
9706 size = 1;
9707 return size;
a06ea964
NC
9708}
9709
9710static bfd_boolean
cec5225b 9711elfNN_aarch64_find_inliner_info (bfd *abfd,
a06ea964
NC
9712 const char **filename_ptr,
9713 const char **functionname_ptr,
9714 unsigned int *line_ptr)
9715{
9716 bfd_boolean found;
9717 found = _bfd_dwarf2_find_inliner_info
9718 (abfd, filename_ptr,
9719 functionname_ptr, line_ptr, &elf_tdata (abfd)->dwarf2_find_line_info);
9720 return found;
9721}
9722
9723
ed7e9d0b
AM
9724static bfd_boolean
9725elfNN_aarch64_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
a06ea964
NC
9726{
9727 Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */
9728
ed7e9d0b
AM
9729 if (!_bfd_elf_init_file_header (abfd, link_info))
9730 return FALSE;
9731
a06ea964 9732 i_ehdrp = elf_elfheader (abfd);
a06ea964 9733 i_ehdrp->e_ident[EI_ABIVERSION] = AARCH64_ELF_ABI_VERSION;
ed7e9d0b 9734 return TRUE;
a06ea964
NC
9735}
9736
9737static enum elf_reloc_type_class
cec5225b 9738elfNN_aarch64_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
7e612e98
AM
9739 const asection *rel_sec ATTRIBUTE_UNUSED,
9740 const Elf_Internal_Rela *rela)
a06ea964 9741{
f2e6a843
SN
9742 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
9743
9744 if (htab->root.dynsym != NULL
9745 && htab->root.dynsym->contents != NULL)
9746 {
9747 /* Check relocation against STT_GNU_IFUNC symbol if there are
9748 dynamic symbols. */
9749 bfd *abfd = info->output_bfd;
9750 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9751 unsigned long r_symndx = ELFNN_R_SYM (rela->r_info);
9752 if (r_symndx != STN_UNDEF)
9753 {
9754 Elf_Internal_Sym sym;
9755 if (!bed->s->swap_symbol_in (abfd,
9756 (htab->root.dynsym->contents
9757 + r_symndx * bed->s->sizeof_sym),
9758 0, &sym))
9759 {
9760 /* xgettext:c-format */
871b3ab2 9761 _bfd_error_handler (_("%pB symbol number %lu references"
f2e6a843
SN
9762 " nonexistent SHT_SYMTAB_SHNDX section"),
9763 abfd, r_symndx);
9764 /* Ideally an error class should be returned here. */
9765 }
9766 else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
9767 return reloc_class_ifunc;
9768 }
9769 }
9770
cec5225b 9771 switch ((int) ELFNN_R_TYPE (rela->r_info))
a06ea964 9772 {
f2e6a843 9773 case AARCH64_R (IRELATIVE):
e19e9199 9774 case MORELLO_R (IRELATIVE):
f2e6a843 9775 return reloc_class_ifunc;
a6bb11b2 9776 case AARCH64_R (RELATIVE):
e19e9199 9777 case MORELLO_R (RELATIVE):
a06ea964 9778 return reloc_class_relative;
a6bb11b2 9779 case AARCH64_R (JUMP_SLOT):
e19e9199 9780 case MORELLO_R (JUMP_SLOT):
a06ea964 9781 return reloc_class_plt;
a6bb11b2 9782 case AARCH64_R (COPY):
a06ea964
NC
9783 return reloc_class_copy;
9784 default:
9785 return reloc_class_normal;
9786 }
9787}
9788
a06ea964
NC
9789/* Handle an AArch64 specific section when reading an object file. This is
9790 called when bfd_section_from_shdr finds a section with an unknown
9791 type. */
9792
9793static bfd_boolean
cec5225b 9794elfNN_aarch64_section_from_shdr (bfd *abfd,
a06ea964
NC
9795 Elf_Internal_Shdr *hdr,
9796 const char *name, int shindex)
9797{
9798 /* There ought to be a place to keep ELF backend specific flags, but
9799 at the moment there isn't one. We just keep track of the
9800 sections by their name, instead. Fortunately, the ABI gives
9801 names for all the AArch64 specific sections, so we will probably get
9802 away with this. */
9803 switch (hdr->sh_type)
9804 {
9805 case SHT_AARCH64_ATTRIBUTES:
9806 break;
9807
9808 default:
9809 return FALSE;
9810 }
9811
9812 if (!_bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
9813 return FALSE;
9814
9815 return TRUE;
9816}
9817
a06ea964
NC
9818typedef struct
9819{
9820 void *finfo;
9821 struct bfd_link_info *info;
9822 asection *sec;
9823 int sec_shndx;
9824 int (*func) (void *, const char *, Elf_Internal_Sym *,
9825 asection *, struct elf_link_hash_entry *);
9826} output_arch_syminfo;
9827
9828enum map_symbol_type
9829{
9830 AARCH64_MAP_INSN,
e19e9199
SP
9831 AARCH64_MAP_DATA,
9832 AARCH64_MAP_C64,
a06ea964
NC
9833};
9834
9835
9836/* Output a single mapping symbol. */
9837
9838static bfd_boolean
cec5225b 9839elfNN_aarch64_output_map_sym (output_arch_syminfo *osi,
a06ea964
NC
9840 enum map_symbol_type type, bfd_vma offset)
9841{
3979cf50 9842 static const char *names[3] = { "$x", "$d", "$c" };
a06ea964
NC
9843 Elf_Internal_Sym sym;
9844
9845 sym.st_value = (osi->sec->output_section->vma
9846 + osi->sec->output_offset + offset);
9847 sym.st_size = 0;
9848 sym.st_other = 0;
9849 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
9850 sym.st_shndx = osi->sec_shndx;
8b21361b 9851 sym.st_target_internal = 0;
a06ea964
NC
9852 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
9853}
9854
a06ea964
NC
9855/* Output a single local symbol for a generated stub. */
9856
9857static bfd_boolean
cec5225b 9858elfNN_aarch64_output_stub_sym (output_arch_syminfo *osi, const char *name,
a06ea964
NC
9859 bfd_vma offset, bfd_vma size)
9860{
9861 Elf_Internal_Sym sym;
9862
9863 sym.st_value = (osi->sec->output_section->vma
9864 + osi->sec->output_offset + offset);
9865 sym.st_size = size;
9866 sym.st_other = 0;
9867 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
9868 sym.st_shndx = osi->sec_shndx;
8b21361b 9869 sym.st_target_internal = 0;
a06ea964
NC
9870 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
9871}
9872
9873static bfd_boolean
9874aarch64_map_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
9875{
cec5225b 9876 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC
9877 asection *stub_sec;
9878 bfd_vma addr;
9879 char *stub_name;
9880 output_arch_syminfo *osi;
9881
9882 /* Massage our args to the form they really have. */
cec5225b 9883 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964
NC
9884 osi = (output_arch_syminfo *) in_arg;
9885
9886 stub_sec = stub_entry->stub_sec;
9887
9888 /* Ensure this stub is attached to the current section being
9889 processed. */
9890 if (stub_sec != osi->sec)
9891 return TRUE;
9892
9893 addr = (bfd_vma) stub_entry->stub_offset;
9894
9895 stub_name = stub_entry->output_name;
9896
9897 switch (stub_entry->stub_type)
9898 {
9899 case aarch64_stub_adrp_branch:
cec5225b 9900 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
a06ea964
NC
9901 sizeof (aarch64_adrp_branch_stub)))
9902 return FALSE;
cec5225b 9903 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964
NC
9904 return FALSE;
9905 break;
9906 case aarch64_stub_long_branch:
cec5225b 9907 if (!elfNN_aarch64_output_stub_sym
a06ea964
NC
9908 (osi, stub_name, addr, sizeof (aarch64_long_branch_stub)))
9909 return FALSE;
cec5225b 9910 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964 9911 return FALSE;
cec5225b 9912 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_DATA, addr + 16))
a06ea964
NC
9913 return FALSE;
9914 break;
68fcca92
JW
9915 case aarch64_stub_erratum_835769_veneer:
9916 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9917 sizeof (aarch64_erratum_835769_stub)))
9918 return FALSE;
9919 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
9920 return FALSE;
9921 break;
4106101c
MS
9922 case aarch64_stub_erratum_843419_veneer:
9923 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9924 sizeof (aarch64_erratum_843419_stub)))
9925 return FALSE;
9926 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
9927 return FALSE;
9928 break;
50e192f0
SP
9929 case aarch64_stub_branch_c64:
9930 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9931 sizeof (aarch64_c64_branch_stub)))
9932 return FALSE;
9933 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
9934 return FALSE;
9935 break;
9936 case c64_stub_branch_aarch64:
9937 case c64_stub_branch_c64:
9938 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9939 sizeof (c64_aarch64_branch_stub)))
9940 return FALSE;
9941 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
9942 return FALSE;
9943 break;
9fca35fc
TC
9944 case aarch64_stub_none:
9945 break;
4106101c 9946
a06ea964 9947 default:
8e2fe09f 9948 abort ();
a06ea964
NC
9949 }
9950
9951 return TRUE;
9952}
9953
9954/* Output mapping symbols for linker generated sections. */
9955
9956static bfd_boolean
cec5225b 9957elfNN_aarch64_output_arch_local_syms (bfd *output_bfd,
a06ea964
NC
9958 struct bfd_link_info *info,
9959 void *finfo,
9960 int (*func) (void *, const char *,
9961 Elf_Internal_Sym *,
9962 asection *,
9963 struct elf_link_hash_entry
9964 *))
9965{
9966 output_arch_syminfo osi;
cec5225b 9967 struct elf_aarch64_link_hash_table *htab;
a06ea964 9968
cec5225b 9969 htab = elf_aarch64_hash_table (info);
a06ea964
NC
9970
9971 osi.finfo = finfo;
9972 osi.info = info;
9973 osi.func = func;
9974
9975 /* Long calls stubs. */
9976 if (htab->stub_bfd && htab->stub_bfd->sections)
9977 {
9978 asection *stub_sec;
9979
9980 for (stub_sec = htab->stub_bfd->sections;
9981 stub_sec != NULL; stub_sec = stub_sec->next)
9982 {
9983 /* Ignore non-stub sections. */
9984 if (!strstr (stub_sec->name, STUB_SUFFIX))
9985 continue;
9986
9987 osi.sec = stub_sec;
9988
9989 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9990 (output_bfd, osi.sec->output_section);
9991
61865519
MS
9992 /* The first instruction in a stub is always a branch. */
9993 if (!elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0))
9994 return FALSE;
9995
a06ea964
NC
9996 bfd_hash_traverse (&htab->stub_hash_table, aarch64_map_one_stub,
9997 &osi);
9998 }
9999 }
10000
10001 /* Finally, output mapping symbols for the PLT. */
10002 if (!htab->root.splt || htab->root.splt->size == 0)
10003 return TRUE;
10004
a06ea964
NC
10005 osi.sec_shndx = _bfd_elf_section_from_bfd_section
10006 (output_bfd, htab->root.splt->output_section);
10007 osi.sec = htab->root.splt;
10008
e19e9199
SP
10009 elfNN_aarch64_output_map_sym (&osi, (htab->c64_rel ? AARCH64_MAP_C64
10010 : AARCH64_MAP_INSN), 0);
a06ea964
NC
10011
10012 return TRUE;
10013
10014}
10015
10016/* Allocate target specific section data. */
10017
10018static bfd_boolean
cec5225b 10019elfNN_aarch64_new_section_hook (bfd *abfd, asection *sec)
a06ea964
NC
10020{
10021 if (!sec->used_by_bfd)
10022 {
10023 _aarch64_elf_section_data *sdata;
986f0783 10024 size_t amt = sizeof (*sdata);
a06ea964
NC
10025
10026 sdata = bfd_zalloc (abfd, amt);
10027 if (sdata == NULL)
10028 return FALSE;
f0070c1e 10029 sdata->elf.is_target_section_data = TRUE;
a06ea964
NC
10030 sec->used_by_bfd = sdata;
10031 }
10032
a06ea964
NC
10033 return _bfd_elf_new_section_hook (abfd, sec);
10034}
10035
10036
a06ea964
NC
10037/* Create dynamic sections. This is different from the ARM backend in that
10038 the got, plt, gotplt and their relocation sections are all created in the
10039 standard part of the bfd elf backend. */
10040
10041static bfd_boolean
cec5225b 10042elfNN_aarch64_create_dynamic_sections (bfd *dynobj,
a06ea964
NC
10043 struct bfd_link_info *info)
10044{
cc0efaa8
MS
10045 /* We need to create .got section. */
10046 if (!aarch64_elf_create_got_section (dynobj, info))
10047 return FALSE;
a06ea964 10048
9d19e4fd 10049 return _bfd_elf_create_dynamic_sections (dynobj, info);
a06ea964
NC
10050}
10051
10052
10053/* Allocate space in .plt, .got and associated reloc sections for
10054 dynamic relocs. */
10055
10056static bfd_boolean
cec5225b 10057elfNN_aarch64_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
a06ea964
NC
10058{
10059 struct bfd_link_info *info;
cec5225b
YZ
10060 struct elf_aarch64_link_hash_table *htab;
10061 struct elf_aarch64_link_hash_entry *eh;
a06ea964
NC
10062 struct elf_dyn_relocs *p;
10063
10064 /* An example of a bfd_link_hash_indirect symbol is versioned
10065 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
10066 -> __gxx_personality_v0(bfd_link_hash_defined)
10067
10068 There is no need to process bfd_link_hash_indirect symbols here
10069 because we will also be presented with the concrete instance of
cec5225b 10070 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
a06ea964 10071 called to copy all relevant data from the generic to the concrete
2d0ca824 10072 symbol instance. */
a06ea964
NC
10073 if (h->root.type == bfd_link_hash_indirect)
10074 return TRUE;
10075
10076 if (h->root.type == bfd_link_hash_warning)
10077 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10078
10079 info = (struct bfd_link_info *) inf;
cec5225b 10080 htab = elf_aarch64_hash_table (info);
a06ea964 10081
1419bbe5
WN
10082 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
10083 here if it is defined and referenced in a non-shared object. */
10084 if (h->type == STT_GNU_IFUNC
10085 && h->def_regular)
10086 return TRUE;
10087 else if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
a06ea964
NC
10088 {
10089 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 10090 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW
10091 if (h->dynindx == -1 && !h->forced_local
10092 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC
10093 {
10094 if (!bfd_elf_link_record_dynamic_symbol (info, h))
10095 return FALSE;
10096 }
10097
0e1862bb 10098 if (bfd_link_pic (info) || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
a06ea964
NC
10099 {
10100 asection *s = htab->root.splt;
10101
10102 /* If this is the first .plt entry, make room for the special
10103 first entry. */
10104 if (s->size == 0)
10105 s->size += htab->plt_header_size;
10106
10107 h->plt.offset = s->size;
10108
10109 /* If this symbol is not defined in a regular file, and we are
10110 not generating a shared library, then set the symbol to this
10111 location in the .plt. This is required to make function
10112 pointers compare as equal between the normal executable and
10113 the shared library. */
0e1862bb 10114 if (!bfd_link_pic (info) && !h->def_regular)
a06ea964
NC
10115 {
10116 h->root.u.def.section = s;
10117 h->root.u.def.value = h->plt.offset;
10118 }
10119
10120 /* Make room for this entry. For now we only create the
10121 small model PLT entries. We later need to find a way
10122 of relaxing into these from the large model PLT entries. */
37c18eed 10123 s->size += htab->plt_entry_size;
a06ea964
NC
10124
10125 /* We also need to make an entry in the .got.plt section, which
10126 will be placed in the .got section by the linker script. */
a1bdea65 10127 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10128
10129 /* We also need to make an entry in the .rela.plt section. */
10130 htab->root.srelplt->size += RELOC_SIZE (htab);
10131
10132 /* We need to ensure that all GOT entries that serve the PLT
10133 are consecutive with the special GOT slots [0] [1] and
10134 [2]. Any addtional relocations, such as
10135 R_AARCH64_TLSDESC, must be placed after the PLT related
10136 entries. We abuse the reloc_count such that during
10137 sizing we adjust reloc_count to indicate the number of
10138 PLT related reserved entries. In subsequent phases when
10139 filling in the contents of the reloc entries, PLT related
10140 entries are placed by computing their PLT index (0
10141 .. reloc_count). While other none PLT relocs are placed
10142 at the slot indicated by reloc_count and reloc_count is
10143 updated. */
10144
10145 htab->root.srelplt->reloc_count++;
823710d5
SN
10146
10147 /* Mark the DSO in case R_<CLS>_JUMP_SLOT relocs against
10148 variant PCS symbols are present. */
10149 if (h->other & STO_AARCH64_VARIANT_PCS)
10150 htab->variant_pcs = 1;
10151
a06ea964
NC
10152 }
10153 else
10154 {
10155 h->plt.offset = (bfd_vma) - 1;
10156 h->needs_plt = 0;
10157 }
10158 }
10159 else
10160 {
10161 h->plt.offset = (bfd_vma) - 1;
10162 h->needs_plt = 0;
10163 }
10164
cec5225b 10165 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC
10166 eh->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
10167
10168 if (h->got.refcount > 0)
10169 {
10170 bfd_boolean dyn;
cec5225b 10171 unsigned got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC
10172
10173 h->got.offset = (bfd_vma) - 1;
10174
10175 dyn = htab->root.dynamic_sections_created;
10176
10177 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 10178 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW
10179 if (dyn && h->dynindx == -1 && !h->forced_local
10180 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC
10181 {
10182 if (!bfd_elf_link_record_dynamic_symbol (info, h))
10183 return FALSE;
10184 }
10185
10186 if (got_type == GOT_UNKNOWN)
10187 {
10188 }
a1bdea65
SP
10189 else if (got_type == GOT_NORMAL
10190 || got_type == GOT_CAP)
a06ea964
NC
10191 {
10192 h->got.offset = htab->root.sgot->size;
a1bdea65 10193 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10194 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10195 || h->root.type != bfd_link_hash_undefweak)
0e1862bb 10196 && (bfd_link_pic (info)
a377ae2a
SN
10197 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))
10198 /* Undefined weak symbol in static PIE resolves to 0 without
10199 any dynamic relocations. */
10200 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC
10201 {
10202 htab->root.srelgot->size += RELOC_SIZE (htab);
10203 }
8d4edc5f
SP
10204 else if (bfd_link_executable (info) && !bfd_link_pic (info))
10205 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC
10206 }
10207 else
10208 {
10209 int indx;
10210 if (got_type & GOT_TLSDESC_GD)
10211 {
10212 eh->tlsdesc_got_jump_table_offset =
10213 (htab->root.sgotplt->size
10214 - aarch64_compute_jump_table_size (htab));
a1bdea65 10215 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10216 h->got.offset = (bfd_vma) - 2;
10217 }
10218
10219 if (got_type & GOT_TLS_GD)
10220 {
10221 h->got.offset = htab->root.sgot->size;
a1bdea65 10222 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10223 }
10224
10225 if (got_type & GOT_TLS_IE)
10226 {
10227 h->got.offset = htab->root.sgot->size;
a1bdea65 10228 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10229 }
10230
10231 indx = h && h->dynindx != -1 ? h->dynindx : 0;
10232 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10233 || h->root.type != bfd_link_hash_undefweak)
6dda7875 10234 && (!bfd_link_executable (info)
a06ea964 10235 || indx != 0
4ca9b406
SP
10236 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)
10237 /* On Morello support only TLSDESC_GD to TLSLE relaxation;
10238 for everything else we must emit a dynamic relocation. */
10239 || got_type & GOT_CAP))
a06ea964
NC
10240 {
10241 if (got_type & GOT_TLSDESC_GD)
10242 {
10243 htab->root.srelplt->size += RELOC_SIZE (htab);
10244 /* Note reloc_count not incremented here! We have
10245 already adjusted reloc_count for this relocation
10246 type. */
10247
10248 /* TLSDESC PLT is now needed, but not yet determined. */
9bcc30e4 10249 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC
10250 }
10251
10252 if (got_type & GOT_TLS_GD)
10253 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
10254
10255 if (got_type & GOT_TLS_IE)
10256 htab->root.srelgot->size += RELOC_SIZE (htab);
10257 }
10258 }
10259 }
10260 else
10261 {
10262 h->got.offset = (bfd_vma) - 1;
10263 }
10264
190eb1dd 10265 if (h->dyn_relocs == NULL)
a06ea964
NC
10266 return TRUE;
10267
10268 /* In the shared -Bsymbolic case, discard space allocated for
10269 dynamic pc-relative relocs against symbols which turn out to be
10270 defined in regular objects. For the normal shared case, discard
10271 space for pc-relative relocs that have become local due to symbol
10272 visibility changes. */
10273
0e1862bb 10274 if (bfd_link_pic (info))
a06ea964
NC
10275 {
10276 /* Relocs that use pc_count are those that appear on a call
07d6d2b8
AM
10277 insn, or certain REL relocs that can generated via assembly.
10278 We want calls to protected symbols to resolve directly to the
10279 function rather than going via the plt. If people want
10280 function pointer comparisons to work as expected then they
10281 should avoid writing weird assembly. */
a06ea964
NC
10282 if (SYMBOL_CALLS_LOCAL (info, h))
10283 {
10284 struct elf_dyn_relocs **pp;
10285
190eb1dd 10286 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
a06ea964
NC
10287 {
10288 p->count -= p->pc_count;
10289 p->pc_count = 0;
10290 if (p->count == 0)
10291 *pp = p->next;
10292 else
10293 pp = &p->next;
10294 }
10295 }
10296
10297 /* Also discard relocs on undefined weak syms with non-default
07d6d2b8 10298 visibility. */
190eb1dd 10299 if (h->dyn_relocs != NULL && h->root.type == bfd_link_hash_undefweak)
a06ea964 10300 {
ddb7fd0f
L
10301 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
10302 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
190eb1dd 10303 h->dyn_relocs = NULL;
a06ea964
NC
10304
10305 /* Make sure undefined weak symbols are output as a dynamic
10306 symbol in PIEs. */
10307 else if (h->dynindx == -1
10308 && !h->forced_local
ff07562f 10309 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC
10310 && !bfd_elf_link_record_dynamic_symbol (info, h))
10311 return FALSE;
10312 }
10313
10314 }
10315 else if (ELIMINATE_COPY_RELOCS)
10316 {
10317 /* For the non-shared case, discard space for relocs against
07d6d2b8
AM
10318 symbols which turn out to need copy relocs or are not
10319 dynamic. */
a06ea964
NC
10320
10321 if (!h->non_got_ref
10322 && ((h->def_dynamic
10323 && !h->def_regular)
10324 || (htab->root.dynamic_sections_created
10325 && (h->root.type == bfd_link_hash_undefweak
10326 || h->root.type == bfd_link_hash_undefined))))
10327 {
10328 /* Make sure this symbol is output as a dynamic symbol.
10329 Undefined weak syms won't yet be marked as dynamic. */
10330 if (h->dynindx == -1
10331 && !h->forced_local
ff07562f 10332 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC
10333 && !bfd_elf_link_record_dynamic_symbol (info, h))
10334 return FALSE;
10335
10336 /* If that succeeded, we know we'll be keeping all the
10337 relocs. */
10338 if (h->dynindx != -1)
10339 goto keep;
10340 }
10341
190eb1dd 10342 h->dyn_relocs = NULL;
a06ea964
NC
10343
10344 keep:;
10345 }
10346
10347 /* Finally, allocate space. */
190eb1dd 10348 for (p = h->dyn_relocs; p != NULL; p = p->next)
a06ea964
NC
10349 {
10350 asection *sreloc;
10351
10352 sreloc = elf_section_data (p->sec)->sreloc;
10353
10354 BFD_ASSERT (sreloc != NULL);
10355
10356 sreloc->size += p->count * RELOC_SIZE (htab);
10357 }
10358
10359 return TRUE;
10360}
10361
1419bbe5
WN
10362/* Allocate space in .plt, .got and associated reloc sections for
10363 ifunc dynamic relocs. */
10364
10365static bfd_boolean
10366elfNN_aarch64_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h,
10367 void *inf)
10368{
10369 struct bfd_link_info *info;
10370 struct elf_aarch64_link_hash_table *htab;
1419bbe5
WN
10371
10372 /* An example of a bfd_link_hash_indirect symbol is versioned
10373 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
10374 -> __gxx_personality_v0(bfd_link_hash_defined)
10375
10376 There is no need to process bfd_link_hash_indirect symbols here
10377 because we will also be presented with the concrete instance of
10378 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
10379 called to copy all relevant data from the generic to the concrete
2d0ca824 10380 symbol instance. */
1419bbe5
WN
10381 if (h->root.type == bfd_link_hash_indirect)
10382 return TRUE;
10383
10384 if (h->root.type == bfd_link_hash_warning)
10385 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10386
10387 info = (struct bfd_link_info *) inf;
10388 htab = elf_aarch64_hash_table (info);
10389
1419bbe5
WN
10390 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
10391 here if it is defined and referenced in a non-shared object. */
10392 if (h->type == STT_GNU_IFUNC
10393 && h->def_regular)
10394 return _bfd_elf_allocate_ifunc_dyn_relocs (info, h,
190eb1dd 10395 &h->dyn_relocs,
1419bbe5
WN
10396 htab->plt_entry_size,
10397 htab->plt_header_size,
a1bdea65 10398 GOT_ENTRY_SIZE (htab),
233cc9c1 10399 FALSE);
1419bbe5
WN
10400 return TRUE;
10401}
10402
1419bbe5
WN
10403/* Allocate space in .plt, .got and associated reloc sections for
10404 local ifunc dynamic relocs. */
10405
10406static bfd_boolean
10407elfNN_aarch64_allocate_local_ifunc_dynrelocs (void **slot, void *inf)
10408{
10409 struct elf_link_hash_entry *h
10410 = (struct elf_link_hash_entry *) *slot;
10411
10412 if (h->type != STT_GNU_IFUNC
10413 || !h->def_regular
10414 || !h->ref_regular
10415 || !h->forced_local
10416 || h->root.type != bfd_link_hash_defined)
10417 abort ();
10418
10419 return elfNN_aarch64_allocate_ifunc_dynrelocs (h, inf);
10420}
a06ea964 10421
a06ea964
NC
10422/* This is the most important function of all . Innocuosly named
10423 though ! */
2d0ca824 10424
a06ea964 10425static bfd_boolean
a1bdea65 10426elfNN_aarch64_size_dynamic_sections (bfd *output_bfd,
a06ea964
NC
10427 struct bfd_link_info *info)
10428{
cec5225b 10429 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC
10430 bfd *dynobj;
10431 asection *s;
10432 bfd_boolean relocs;
10433 bfd *ibfd;
10434
cec5225b 10435 htab = elf_aarch64_hash_table ((info));
a06ea964
NC
10436 dynobj = htab->root.dynobj;
10437
10438 BFD_ASSERT (dynobj != NULL);
10439
10440 if (htab->root.dynamic_sections_created)
10441 {
9b8b325a 10442 if (bfd_link_executable (info) && !info->nointerp)
a06ea964
NC
10443 {
10444 s = bfd_get_linker_section (dynobj, ".interp");
10445 if (s == NULL)
10446 abort ();
10447 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
10448 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
10449 }
10450 }
10451
a1bdea65
SP
10452 aarch64_elf_init_got_section (output_bfd, info);
10453
e19e9199
SP
10454 setup_plt_values (info, elf_aarch64_tdata (output_bfd)->plt_type);
10455
a06ea964
NC
10456 /* Set up .got offsets for local syms, and space for local dynamic
10457 relocs. */
c72f2fb2 10458 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
a06ea964
NC
10459 {
10460 struct elf_aarch64_local_symbol *locals = NULL;
10461 Elf_Internal_Shdr *symtab_hdr;
10462 asection *srel;
10463 unsigned int i;
10464
10465 if (!is_aarch64_elf (ibfd))
10466 continue;
10467
10468 for (s = ibfd->sections; s != NULL; s = s->next)
10469 {
10470 struct elf_dyn_relocs *p;
10471
10472 for (p = (struct elf_dyn_relocs *)
10473 (elf_section_data (s)->local_dynrel); p != NULL; p = p->next)
10474 {
10475 if (!bfd_is_abs_section (p->sec)
10476 && bfd_is_abs_section (p->sec->output_section))
10477 {
10478 /* Input section has been discarded, either because
10479 it is a copy of a linkonce section or due to
10480 linker script /DISCARD/, so we'll be discarding
10481 the relocs too. */
10482 }
10483 else if (p->count != 0)
10484 {
10485 srel = elf_section_data (p->sec)->sreloc;
10486 srel->size += p->count * RELOC_SIZE (htab);
10487 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
10488 info->flags |= DF_TEXTREL;
10489 }
10490 }
10491 }
10492
cec5225b 10493 locals = elf_aarch64_locals (ibfd);
a06ea964
NC
10494 if (!locals)
10495 continue;
10496
10497 symtab_hdr = &elf_symtab_hdr (ibfd);
10498 srel = htab->root.srelgot;
10499 for (i = 0; i < symtab_hdr->sh_info; i++)
10500 {
10501 locals[i].got_offset = (bfd_vma) - 1;
10502 locals[i].tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
10503 if (locals[i].got_refcount > 0)
10504 {
10505 unsigned got_type = locals[i].got_type;
10506 if (got_type & GOT_TLSDESC_GD)
10507 {
10508 locals[i].tlsdesc_got_jump_table_offset =
10509 (htab->root.sgotplt->size
10510 - aarch64_compute_jump_table_size (htab));
a1bdea65 10511 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10512 locals[i].got_offset = (bfd_vma) - 2;
10513 }
10514
10515 if (got_type & GOT_TLS_GD)
10516 {
10517 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 10518 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10519 }
10520
b53b1bed 10521 if (got_type & GOT_TLS_IE
a1bdea65
SP
10522 || got_type & GOT_NORMAL
10523 || got_type & GOT_CAP)
a06ea964
NC
10524 {
10525 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 10526 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10527 }
10528
10529 if (got_type == GOT_UNKNOWN)
10530 {
10531 }
10532
0e1862bb 10533 if (bfd_link_pic (info))
a06ea964
NC
10534 {
10535 if (got_type & GOT_TLSDESC_GD)
10536 {
10537 htab->root.srelplt->size += RELOC_SIZE (htab);
10538 /* Note RELOC_COUNT not incremented here! */
9bcc30e4 10539 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC
10540 }
10541
10542 if (got_type & GOT_TLS_GD)
10543 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
10544
b53b1bed 10545 if (got_type & GOT_TLS_IE
a1bdea65
SP
10546 || got_type & GOT_NORMAL
10547 || got_type & GOT_CAP)
a06ea964
NC
10548 htab->root.srelgot->size += RELOC_SIZE (htab);
10549 }
8d4edc5f
SP
10550 /* Static binary; put relocs into srelcaps. */
10551 else if (bfd_link_executable (info) && (got_type & GOT_CAP))
10552 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC
10553 }
10554 else
10555 {
10556 locals[i].got_refcount = (bfd_vma) - 1;
10557 }
10558 }
10559 }
10560
10561
10562 /* Allocate global sym .plt and .got entries, and space for global
10563 sym dynamic relocs. */
cec5225b 10564 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_dynrelocs,
a06ea964
NC
10565 info);
10566
1419bbe5
WN
10567 /* Allocate global ifunc sym .plt and .got entries, and space for global
10568 ifunc sym dynamic relocs. */
10569 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_ifunc_dynrelocs,
10570 info);
10571
1419bbe5
WN
10572 /* Allocate .plt and .got entries, and space for local ifunc symbols. */
10573 htab_traverse (htab->loc_hash_table,
10574 elfNN_aarch64_allocate_local_ifunc_dynrelocs,
10575 info);
a06ea964 10576
d6cf562a
MM
10577 if (bfd_link_executable (info)
10578 && !bfd_link_pic (info)
10579 && htab->srelcaps
10580 && htab->srelcaps->size > 0)
10581 {
10582 struct elf_link_hash_entry *h;
10583
10584 h = _bfd_elf_define_linkage_sym (output_bfd, info,
10585 htab->srelcaps,
10586 "__rela_dyn_start");
10587 h = _bfd_elf_define_linkage_sym (output_bfd, info,
10588 htab->srelcaps,
10589 "__rela_dyn_end");
10590
10591 h->root.u.def.value = htab->srelcaps->vma + htab->srelcaps->size;
10592 }
10593
a06ea964
NC
10594 /* For every jump slot reserved in the sgotplt, reloc_count is
10595 incremented. However, when we reserve space for TLS descriptors,
10596 it's not incremented, so in order to compute the space reserved
10597 for them, it suffices to multiply the reloc count by the jump
10598 slot size. */
10599
10600 if (htab->root.srelplt)
8847944f 10601 htab->sgotplt_jump_table_size = aarch64_compute_jump_table_size (htab);
a06ea964 10602
9bcc30e4 10603 if (htab->root.tlsdesc_plt)
a06ea964
NC
10604 {
10605 if (htab->root.splt->size == 0)
37c18eed 10606 htab->root.splt->size += htab->plt_header_size;
a06ea964 10607
a06ea964 10608 /* If we're not using lazy TLS relocations, don't generate the
ce12121b 10609 GOT and PLT entry required. */
9bcc30e4
L
10610 if ((info->flags & DF_BIND_NOW))
10611 htab->root.tlsdesc_plt = 0;
10612 else
a06ea964 10613 {
9bcc30e4 10614 htab->root.tlsdesc_plt = htab->root.splt->size;
ce12121b
TC
10615 htab->root.splt->size += htab->tlsdesc_plt_entry_size;
10616
9bcc30e4 10617 htab->root.tlsdesc_got = htab->root.sgot->size;
a1bdea65 10618 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10619 }
10620 }
10621
68fcca92 10622 /* Init mapping symbols information to use later to distingush between
4106101c
MS
10623 code and data while scanning for errata. */
10624 if (htab->fix_erratum_835769 || htab->fix_erratum_843419)
68fcca92
JW
10625 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
10626 {
10627 if (!is_aarch64_elf (ibfd))
10628 continue;
7ff36d1a 10629 bfd_elfNN_aarch64_init_maps (ibfd, info);
68fcca92
JW
10630 }
10631
a06ea964
NC
10632 /* We now have determined the sizes of the various dynamic sections.
10633 Allocate memory for them. */
10634 relocs = FALSE;
10635 for (s = dynobj->sections; s != NULL; s = s->next)
10636 {
10637 if ((s->flags & SEC_LINKER_CREATED) == 0)
10638 continue;
10639
10640 if (s == htab->root.splt
10641 || s == htab->root.sgot
10642 || s == htab->root.sgotplt
10643 || s == htab->root.iplt
9d19e4fd 10644 || s == htab->root.igotplt
5474d94f
AM
10645 || s == htab->root.sdynbss
10646 || s == htab->root.sdynrelro)
a06ea964
NC
10647 {
10648 /* Strip this section if we don't need it; see the
10649 comment below. */
10650 }
fd361982 10651 else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
a06ea964
NC
10652 {
10653 if (s->size != 0 && s != htab->root.srelplt)
10654 relocs = TRUE;
10655
10656 /* We use the reloc_count field as a counter if we need
10657 to copy relocs into the output file. */
10658 if (s != htab->root.srelplt)
10659 s->reloc_count = 0;
10660 }
10661 else
10662 {
10663 /* It's not one of our sections, so don't allocate space. */
10664 continue;
10665 }
10666
10667 if (s->size == 0)
10668 {
10669 /* If we don't need this section, strip it from the
10670 output file. This is mostly to handle .rela.bss and
10671 .rela.plt. We must create both sections in
10672 create_dynamic_sections, because they must be created
10673 before the linker maps input sections to output
10674 sections. The linker does that before
10675 adjust_dynamic_symbol is called, and it is that
10676 function which decides whether anything needs to go
10677 into these sections. */
a06ea964
NC
10678 s->flags |= SEC_EXCLUDE;
10679 continue;
10680 }
10681
10682 if ((s->flags & SEC_HAS_CONTENTS) == 0)
10683 continue;
10684
10685 /* Allocate memory for the section contents. We use bfd_zalloc
07d6d2b8
AM
10686 here in case unused entries are not reclaimed before the
10687 section's contents are written out. This should not happen,
10688 but this way if it does, we get a R_AARCH64_NONE reloc instead
10689 of garbage. */
a06ea964
NC
10690 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
10691 if (s->contents == NULL)
10692 return FALSE;
10693 }
10694
10695 if (htab->root.dynamic_sections_created)
10696 {
10697 /* Add some entries to the .dynamic section. We fill in the
07d6d2b8
AM
10698 values later, in elfNN_aarch64_finish_dynamic_sections, but we
10699 must add the entries now so that we get the correct size for
10700 the .dynamic section. The DT_DEBUG entry is filled in by the
10701 dynamic linker and used by the debugger. */
a06ea964
NC
10702#define add_dynamic_entry(TAG, VAL) \
10703 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
10704
3084d7a2
L
10705 if (!_bfd_elf_add_dynamic_tags (output_bfd, info, relocs))
10706 return FALSE;
a06ea964
NC
10707
10708 if (htab->root.splt->size != 0)
10709 {
823710d5
SN
10710 if (htab->variant_pcs
10711 && !add_dynamic_entry (DT_AARCH64_VARIANT_PCS, 0))
10712 return FALSE;
10713
1dbade74
SD
10714 if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI_PAC)
10715 && (!add_dynamic_entry (DT_AARCH64_BTI_PLT, 0)
10716 || !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0)))
10717 return FALSE;
10718
10719 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI)
10720 && !add_dynamic_entry (DT_AARCH64_BTI_PLT, 0))
10721 return FALSE;
10722
10723 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_PAC)
10724 && !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0))
37c18eed 10725 return FALSE;
a06ea964 10726 }
a06ea964
NC
10727 }
10728#undef add_dynamic_entry
10729
10730 return TRUE;
a06ea964
NC
10731}
10732
10733static inline void
caed7120
YZ
10734elf_aarch64_update_plt_entry (bfd *output_bfd,
10735 bfd_reloc_code_real_type r_type,
10736 bfd_byte *plt_entry, bfd_vma value)
a06ea964 10737{
caed7120
YZ
10738 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (r_type);
10739
1d75a8e2
NC
10740 /* FIXME: We should check the return value from this function call. */
10741 (void) _bfd_aarch64_elf_put_addend (output_bfd, plt_entry, r_type, howto, value);
a06ea964
NC
10742}
10743
e19e9199
SP
10744static void
10745aarch64_update_c64_plt_entry (bfd *output_bfd, bfd_byte *plt_entry,
10746 bfd_vma plt_base, bfd_vma plt_got_ent)
10747{
10748 /* Fill in the top 20 bits for this: ADRP c16, PLT_GOT + n * 16.
10749 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
10750 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_MORELLO_ADR_HI20_PCREL,
10751 plt_entry,
10752 PG (plt_got_ent) - PG (plt_base));
10753
10754 elf_aarch64_update_plt_entry (output_bfd,
10755 BFD_RELOC_AARCH64_LDST128_LO12,
10756 plt_entry + 4,
10757 PG_OFFSET (plt_got_ent));
10758
10759 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
10760 plt_entry + 8,
10761 PG_OFFSET (plt_got_ent));
10762}
10763
a06ea964 10764static void
cec5225b
YZ
10765elfNN_aarch64_create_small_pltn_entry (struct elf_link_hash_entry *h,
10766 struct elf_aarch64_link_hash_table
1419bbe5
WN
10767 *htab, bfd *output_bfd,
10768 struct bfd_link_info *info)
a06ea964
NC
10769{
10770 bfd_byte *plt_entry;
10771 bfd_vma plt_index;
10772 bfd_vma got_offset;
10773 bfd_vma gotplt_entry_address;
10774 bfd_vma plt_entry_address;
10775 Elf_Internal_Rela rela;
10776 bfd_byte *loc;
1419bbe5
WN
10777 asection *plt, *gotplt, *relplt;
10778
10779 /* When building a static executable, use .iplt, .igot.plt and
10780 .rela.iplt sections for STT_GNU_IFUNC symbols. */
10781 if (htab->root.splt != NULL)
10782 {
10783 plt = htab->root.splt;
10784 gotplt = htab->root.sgotplt;
10785 relplt = htab->root.srelplt;
10786 }
10787 else
10788 {
10789 plt = htab->root.iplt;
10790 gotplt = htab->root.igotplt;
10791 relplt = htab->root.irelplt;
10792 }
10793
10794 /* Get the index in the procedure linkage table which
10795 corresponds to this symbol. This is the index of this symbol
10796 in all the symbols for which we are making plt entries. The
10797 first entry in the procedure linkage table is reserved.
a06ea964 10798
1419bbe5
WN
10799 Get the offset into the .got table of the entry that
10800 corresponds to this function. Each .got entry is GOT_ENTRY_SIZE
10801 bytes. The first three are reserved for the dynamic linker.
692e2b8b 10802
1419bbe5
WN
10803 For static executables, we don't reserve anything. */
10804
10805 if (plt == htab->root.splt)
10806 {
10807 plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
a1bdea65 10808 got_offset = (plt_index + 3) * GOT_ENTRY_SIZE (htab);
1419bbe5
WN
10809 }
10810 else
10811 {
10812 plt_index = h->plt.offset / htab->plt_entry_size;
a1bdea65 10813 got_offset = plt_index * GOT_ENTRY_SIZE (htab);
1419bbe5
WN
10814 }
10815
10816 plt_entry = plt->contents + h->plt.offset;
10817 plt_entry_address = plt->output_section->vma
f44a1f8e 10818 + plt->output_offset + h->plt.offset;
1419bbe5
WN
10819 gotplt_entry_address = gotplt->output_section->vma +
10820 gotplt->output_offset + got_offset;
a06ea964
NC
10821
10822 /* Copy in the boiler-plate for the PLTn entry. */
37c18eed
SD
10823 memcpy (plt_entry, htab->plt_entry, htab->plt_entry_size);
10824
e19e9199
SP
10825 if (htab->c64_rel)
10826 aarch64_update_c64_plt_entry (output_bfd, plt_entry, plt_entry_address,
10827 gotplt_entry_address);
10828 else
10829 {
a06ea964 10830
e19e9199
SP
10831 /* First instruction in BTI enabled PLT stub is a BTI
10832 instruction so skip it. */
10833 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI
10834 && elf_elfheader (output_bfd)->e_type == ET_EXEC)
10835 plt_entry = plt_entry + 4;
a06ea964 10836
e19e9199
SP
10837 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
10838 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
10839 elf_aarch64_update_plt_entry (output_bfd,
10840 BFD_RELOC_AARCH64_ADR_HI21_PCREL,
10841 plt_entry,
10842 PG (gotplt_entry_address) -
10843 PG (plt_entry_address));
a06ea964 10844
e19e9199
SP
10845 /* Fill in the lo12 bits for the load from the pltgot. */
10846 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
10847 plt_entry + 4,
10848 PG_OFFSET (gotplt_entry_address));
a06ea964 10849
e19e9199
SP
10850 /* Fill in the lo12 bits for the add from the pltgot entry. */
10851 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
10852 plt_entry + 8,
10853 PG_OFFSET (gotplt_entry_address));
10854 }
10855
10856 /* All the GOTPLT Entries are essentially initialized to PLT0. Set LSB if
10857 the PLT is C64. */
10858 bfd_vma plt0 = ((plt->output_section->vma + plt->output_offset)
10859 | htab->c64_rel);
10860 bfd_put_NN (output_bfd, plt0, gotplt->contents + got_offset);
a06ea964 10861
a06ea964 10862 rela.r_offset = gotplt_entry_address;
1419bbe5
WN
10863
10864 if (h->dynindx == -1
0e1862bb 10865 || ((bfd_link_executable (info)
1419bbe5
WN
10866 || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
10867 && h->def_regular
10868 && h->type == STT_GNU_IFUNC))
10869 {
10870 /* If an STT_GNU_IFUNC symbol is locally defined, generate
10871 R_AARCH64_IRELATIVE instead of R_AARCH64_JUMP_SLOT. */
e19e9199
SP
10872 rela.r_info = (elf_aarch64_hash_entry (h)->got_type == GOT_CAP
10873 ? ELFNN_R_INFO (0, MORELLO_R (IRELATIVE))
10874 : ELFNN_R_INFO (0, AARCH64_R (IRELATIVE)));
1419bbe5
WN
10875 rela.r_addend = (h->root.u.def.value
10876 + h->root.u.def.section->output_section->vma
10877 + h->root.u.def.section->output_offset);
10878 }
10879 else
10880 {
10881 /* Fill in the entry in the .rela.plt section. */
e19e9199
SP
10882 rela.r_info = (elf_aarch64_hash_entry (h)->got_type == GOT_CAP
10883 ? ELFNN_R_INFO (h->dynindx, MORELLO_R (JUMP_SLOT))
10884 : ELFNN_R_INFO (h->dynindx, AARCH64_R (JUMP_SLOT)));
1419bbe5
WN
10885 rela.r_addend = 0;
10886 }
a06ea964
NC
10887
10888 /* Compute the relocation entry to used based on PLT index and do
10889 not adjust reloc_count. The reloc_count has already been adjusted
10890 to account for this entry. */
1419bbe5 10891 loc = relplt->contents + plt_index * RELOC_SIZE (htab);
cec5225b 10892 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC
10893}
10894
10895/* Size sections even though they're not dynamic. We use it to setup
10896 _TLS_MODULE_BASE_, if needed. */
10897
10898static bfd_boolean
cec5225b 10899elfNN_aarch64_always_size_sections (bfd *output_bfd,
a06ea964
NC
10900 struct bfd_link_info *info)
10901{
10902 asection *tls_sec;
10903
0e1862bb 10904 if (bfd_link_relocatable (info))
a06ea964
NC
10905 return TRUE;
10906
10907 tls_sec = elf_hash_table (info)->tls_sec;
10908
10909 if (tls_sec)
10910 {
10911 struct elf_link_hash_entry *tlsbase;
10912
10913 tlsbase = elf_link_hash_lookup (elf_hash_table (info),
10914 "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
10915
10916 if (tlsbase)
10917 {
10918 struct bfd_link_hash_entry *h = NULL;
10919 const struct elf_backend_data *bed =
10920 get_elf_backend_data (output_bfd);
10921
10922 if (!(_bfd_generic_link_add_one_symbol
10923 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
10924 tls_sec, 0, NULL, FALSE, bed->collect, &h)))
10925 return FALSE;
10926
10927 tlsbase->type = STT_TLS;
10928 tlsbase = (struct elf_link_hash_entry *) h;
10929 tlsbase->def_regular = 1;
10930 tlsbase->other = STV_HIDDEN;
10931 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
10932 }
10933 }
10934
10935 return TRUE;
10936}
10937
10938/* Finish up dynamic symbol handling. We set the contents of various
10939 dynamic sections here. */
2d0ca824 10940
a06ea964 10941static bfd_boolean
cec5225b 10942elfNN_aarch64_finish_dynamic_symbol (bfd *output_bfd,
a06ea964
NC
10943 struct bfd_link_info *info,
10944 struct elf_link_hash_entry *h,
10945 Elf_Internal_Sym *sym)
10946{
cec5225b
YZ
10947 struct elf_aarch64_link_hash_table *htab;
10948 htab = elf_aarch64_hash_table (info);
a06ea964
NC
10949
10950 if (h->plt.offset != (bfd_vma) - 1)
10951 {
1419bbe5
WN
10952 asection *plt, *gotplt, *relplt;
10953
a06ea964 10954 /* This symbol has an entry in the procedure linkage table. Set
07d6d2b8 10955 it up. */
a06ea964 10956
1419bbe5
WN
10957 /* When building a static executable, use .iplt, .igot.plt and
10958 .rela.iplt sections for STT_GNU_IFUNC symbols. */
10959 if (htab->root.splt != NULL)
10960 {
10961 plt = htab->root.splt;
10962 gotplt = htab->root.sgotplt;
10963 relplt = htab->root.srelplt;
10964 }
10965 else
10966 {
10967 plt = htab->root.iplt;
10968 gotplt = htab->root.igotplt;
10969 relplt = htab->root.irelplt;
10970 }
10971
10972 /* This symbol has an entry in the procedure linkage table. Set
10973 it up. */
10974 if ((h->dynindx == -1
0e1862bb 10975 && !((h->forced_local || bfd_link_executable (info))
1419bbe5
WN
10976 && h->def_regular
10977 && h->type == STT_GNU_IFUNC))
10978 || plt == NULL
10979 || gotplt == NULL
10980 || relplt == NULL)
f955cccf 10981 return FALSE;
a06ea964 10982
1419bbe5 10983 elfNN_aarch64_create_small_pltn_entry (h, htab, output_bfd, info);
a06ea964
NC
10984 if (!h->def_regular)
10985 {
10986 /* Mark the symbol as undefined, rather than as defined in
46b87d49 10987 the .plt section. */
a06ea964 10988 sym->st_shndx = SHN_UNDEF;
46b87d49
WN
10989 /* If the symbol is weak we need to clear the value.
10990 Otherwise, the PLT entry would provide a definition for
10991 the symbol even if the symbol wasn't defined anywhere,
10992 and so the symbol would never be NULL. Leave the value if
10993 there were any relocations where pointer equality matters
10994 (this is a clue for the dynamic linker, to make function
10995 pointer comparisons work between an application and shared
10996 library). */
10997 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
10998 sym->st_value = 0;
a06ea964
NC
10999 }
11000 }
11001
a1bdea65
SP
11002 bfd_boolean is_c64 = elf_aarch64_hash_entry (h)->got_type == GOT_CAP;
11003
a06ea964 11004 if (h->got.offset != (bfd_vma) - 1
a1bdea65
SP
11005 && (elf_aarch64_hash_entry (h)->got_type == GOT_NORMAL
11006 || elf_aarch64_hash_entry (h)->got_type == GOT_CAP)
a377ae2a
SN
11007 /* Undefined weak symbol in static PIE resolves to 0 without
11008 any dynamic relocations. */
11009 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC
11010 {
11011 Elf_Internal_Rela rela;
11012 bfd_byte *loc;
11013
11014 /* This symbol has an entry in the global offset table. Set it
07d6d2b8 11015 up. */
a06ea964
NC
11016 if (htab->root.sgot == NULL || htab->root.srelgot == NULL)
11017 abort ();
11018
11019 rela.r_offset = (htab->root.sgot->output_section->vma
11020 + htab->root.sgot->output_offset
11021 + (h->got.offset & ~(bfd_vma) 1));
11022
49206388
WN
11023 if (h->def_regular
11024 && h->type == STT_GNU_IFUNC)
11025 {
0e1862bb 11026 if (bfd_link_pic (info))
49206388
WN
11027 {
11028 /* Generate R_AARCH64_GLOB_DAT. */
11029 goto do_glob_dat;
11030 }
11031 else
11032 {
11033 asection *plt;
11034
11035 if (!h->pointer_equality_needed)
11036 abort ();
11037
11038 /* For non-shared object, we can't use .got.plt, which
11039 contains the real function address if we need pointer
11040 equality. We load the GOT entry with the PLT entry. */
11041 plt = htab->root.splt ? htab->root.splt : htab->root.iplt;
11042 bfd_put_NN (output_bfd, (plt->output_section->vma
11043 + plt->output_offset
11044 + h->plt.offset),
11045 htab->root.sgot->contents
11046 + (h->got.offset & ~(bfd_vma) 1));
11047 return TRUE;
11048 }
11049 }
0e1862bb 11050 else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h))
a06ea964 11051 {
0ee3a6db 11052 if (!(h->def_regular || ELF_COMMON_DEF_P (h)))
a06ea964
NC
11053 return FALSE;
11054
11055 BFD_ASSERT ((h->got.offset & 1) != 0);
a1bdea65
SP
11056 if (is_c64)
11057 {
11058 rela.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
11059 rela.r_addend = 0;
11060 }
11061 else
11062 {
11063 rela.r_info = ELFNN_R_INFO (0, AARCH64_R (RELATIVE));
11064 rela.r_addend = (h->root.u.def.value
11065 + h->root.u.def.section->output_section->vma
11066 + h->root.u.def.section->output_offset);
11067 }
a06ea964
NC
11068 }
11069 else
11070 {
dc1e8a47 11071 do_glob_dat:
a06ea964 11072 BFD_ASSERT ((h->got.offset & 1) == 0);
cec5225b 11073 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 11074 htab->root.sgot->contents + h->got.offset);
a1bdea65
SP
11075 rela.r_info = ELFNN_R_INFO (h->dynindx,
11076 (is_c64 ? MORELLO_R (GLOB_DAT)
11077 : AARCH64_R (GLOB_DAT)));
a06ea964
NC
11078 rela.r_addend = 0;
11079 }
11080
11081 loc = htab->root.srelgot->contents;
11082 loc += htab->root.srelgot->reloc_count++ * RELOC_SIZE (htab);
cec5225b 11083 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC
11084 }
11085
11086 if (h->needs_copy)
11087 {
11088 Elf_Internal_Rela rela;
5474d94f 11089 asection *s;
a06ea964
NC
11090 bfd_byte *loc;
11091
11092 /* This symbol needs a copy reloc. Set it up. */
a06ea964
NC
11093 if (h->dynindx == -1
11094 || (h->root.type != bfd_link_hash_defined
11095 && h->root.type != bfd_link_hash_defweak)
9d19e4fd 11096 || htab->root.srelbss == NULL)
a06ea964
NC
11097 abort ();
11098
11099 rela.r_offset = (h->root.u.def.value
11100 + h->root.u.def.section->output_section->vma
11101 + h->root.u.def.section->output_offset);
a6bb11b2 11102 rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (COPY));
a06ea964 11103 rela.r_addend = 0;
afbf7e8e 11104 if (h->root.u.def.section == htab->root.sdynrelro)
5474d94f
AM
11105 s = htab->root.sreldynrelro;
11106 else
11107 s = htab->root.srelbss;
11108 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
cec5225b 11109 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC
11110 }
11111
11112 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
11113 be NULL for local symbols. */
11114 if (sym != NULL
9637f6ef 11115 && (h == elf_hash_table (info)->hdynamic
a06ea964
NC
11116 || h == elf_hash_table (info)->hgot))
11117 sym->st_shndx = SHN_ABS;
11118
11119 return TRUE;
11120}
11121
1419bbe5
WN
11122/* Finish up local dynamic symbol handling. We set the contents of
11123 various dynamic sections here. */
11124
11125static bfd_boolean
11126elfNN_aarch64_finish_local_dynamic_symbol (void **slot, void *inf)
11127{
11128 struct elf_link_hash_entry *h
11129 = (struct elf_link_hash_entry *) *slot;
11130 struct bfd_link_info *info
11131 = (struct bfd_link_info *) inf;
11132
11133 return elfNN_aarch64_finish_dynamic_symbol (info->output_bfd,
11134 info, h, NULL);
11135}
11136
a06ea964 11137static void
cec5225b
YZ
11138elfNN_aarch64_init_small_plt0_entry (bfd *output_bfd ATTRIBUTE_UNUSED,
11139 struct elf_aarch64_link_hash_table
a06ea964
NC
11140 *htab)
11141{
11142 /* Fill in PLT0. Fixme:RR Note this doesn't distinguish between
11143 small and large plts and at the minute just generates
11144 the small PLT. */
11145
cec5225b 11146 /* PLT0 of the small PLT looks like this in ELF64 -
a06ea964
NC
11147 stp x16, x30, [sp, #-16]! // Save the reloc and lr on stack.
11148 adrp x16, PLT_GOT + 16 // Get the page base of the GOTPLT
11149 ldr x17, [x16, #:lo12:PLT_GOT+16] // Load the address of the
11150 // symbol resolver
11151 add x16, x16, #:lo12:PLT_GOT+16 // Load the lo12 bits of the
11152 // GOTPLT entry for this.
11153 br x17
cec5225b 11154 PLT0 will be slightly different in ELF32 due to different got entry
2d0ca824 11155 size. */
caed7120 11156 bfd_vma plt_got_2nd_ent; /* Address of GOT[2]. */
a06ea964
NC
11157 bfd_vma plt_base;
11158
11159
37c18eed
SD
11160 memcpy (htab->root.splt->contents, htab->plt0_entry,
11161 htab->plt_header_size);
4d3bb356
SN
11162
11163 /* PR 26312: Explicitly set the sh_entsize to 0 so that
11164 consumers do not think that the section contains fixed
11165 sized objects. */
11166 elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize = 0;
a06ea964 11167
caed7120
YZ
11168 plt_got_2nd_ent = (htab->root.sgotplt->output_section->vma
11169 + htab->root.sgotplt->output_offset
a1bdea65 11170 + GOT_ENTRY_SIZE (htab) * 2);
a06ea964
NC
11171
11172 plt_base = htab->root.splt->output_section->vma +
f44a1f8e 11173 htab->root.splt->output_offset;
a06ea964 11174
e19e9199
SP
11175 bfd_byte *plt0_entry = htab->root.splt->contents;
11176
11177 if (htab->c64_rel)
11178 {
11179 aarch64_update_c64_plt_entry (output_bfd, plt0_entry + 4,
11180 plt_base + 4, plt_got_2nd_ent);
11181 return;
11182 }
11183
37c18eed
SD
11184 /* First instruction in BTI enabled PLT stub is a BTI
11185 instruction so skip it. */
37c18eed
SD
11186 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI)
11187 plt0_entry = plt0_entry + 4;
11188
a06ea964
NC
11189 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
11190 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
caed7120 11191 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADR_HI21_PCREL,
37c18eed 11192 plt0_entry + 4,
caed7120 11193 PG (plt_got_2nd_ent) - PG (plt_base + 4));
a06ea964 11194
caed7120 11195 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
37c18eed 11196 plt0_entry + 8,
caed7120 11197 PG_OFFSET (plt_got_2nd_ent));
a06ea964 11198
caed7120 11199 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
37c18eed 11200 plt0_entry + 12,
caed7120 11201 PG_OFFSET (plt_got_2nd_ent));
a06ea964
NC
11202}
11203
11204static bfd_boolean
cec5225b 11205elfNN_aarch64_finish_dynamic_sections (bfd *output_bfd,
a06ea964
NC
11206 struct bfd_link_info *info)
11207{
cec5225b 11208 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC
11209 bfd *dynobj;
11210 asection *sdyn;
11211
cec5225b 11212 htab = elf_aarch64_hash_table (info);
a06ea964
NC
11213 dynobj = htab->root.dynobj;
11214 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
11215
11216 if (htab->root.dynamic_sections_created)
11217 {
cec5225b 11218 ElfNN_External_Dyn *dyncon, *dynconend;
a06ea964
NC
11219
11220 if (sdyn == NULL || htab->root.sgot == NULL)
11221 abort ();
11222
cec5225b
YZ
11223 dyncon = (ElfNN_External_Dyn *) sdyn->contents;
11224 dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size);
a06ea964
NC
11225 for (; dyncon < dynconend; dyncon++)
11226 {
11227 Elf_Internal_Dyn dyn;
11228 asection *s;
11229
cec5225b 11230 bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn);
a06ea964
NC
11231
11232 switch (dyn.d_tag)
11233 {
11234 default:
11235 continue;
11236
11237 case DT_PLTGOT:
11238 s = htab->root.sgotplt;
11239 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
11240 break;
11241
11242 case DT_JMPREL:
4ade44b7
AM
11243 s = htab->root.srelplt;
11244 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
a06ea964
NC
11245 break;
11246
11247 case DT_PLTRELSZ:
c955de36 11248 s = htab->root.srelplt;
a06ea964
NC
11249 dyn.d_un.d_val = s->size;
11250 break;
11251
a06ea964
NC
11252 case DT_TLSDESC_PLT:
11253 s = htab->root.splt;
11254 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 11255 + htab->root.tlsdesc_plt;
a06ea964
NC
11256 break;
11257
11258 case DT_TLSDESC_GOT:
11259 s = htab->root.sgot;
9bcc30e4 11260 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
a06ea964 11261 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 11262 + htab->root.tlsdesc_got;
a06ea964
NC
11263 break;
11264 }
11265
cec5225b 11266 bfd_elfNN_swap_dyn_out (output_bfd, &dyn, dyncon);
a06ea964
NC
11267 }
11268
11269 }
11270
11271 /* Fill in the special first entry in the procedure linkage table. */
11272 if (htab->root.splt && htab->root.splt->size > 0)
11273 {
cec5225b 11274 elfNN_aarch64_init_small_plt0_entry (output_bfd, htab);
a06ea964 11275
9bcc30e4 11276 if (htab->root.tlsdesc_plt && !(info->flags & DF_BIND_NOW))
a06ea964 11277 {
9bcc30e4 11278 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
cec5225b 11279 bfd_put_NN (output_bfd, (bfd_vma) 0,
9bcc30e4 11280 htab->root.sgot->contents + htab->root.tlsdesc_got);
a06ea964 11281
37c18eed
SD
11282 const bfd_byte *entry = elfNN_aarch64_tlsdesc_small_plt_entry;
11283 htab->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
11284
4ca9b406
SP
11285 unsigned adrp_rtype = BFD_RELOC_AARCH64_ADR_HI21_PCREL;
11286 unsigned ldr_rtype = BFD_RELOC_AARCH64_LDSTNN_LO12;
11287
37c18eed 11288 aarch64_plt_type type = elf_aarch64_tdata (output_bfd)->plt_type;
4ca9b406
SP
11289 if (htab->c64_rel)
11290 {
11291 entry = elfNN_aarch64_tlsdesc_small_plt_c64_entry;
11292 adrp_rtype = BFD_RELOC_MORELLO_ADR_HI20_PCREL;
11293 ldr_rtype = BFD_RELOC_AARCH64_LDST128_LO12;
11294 }
11295 else if (type == PLT_BTI || type == PLT_BTI_PAC)
37c18eed
SD
11296 {
11297 entry = elfNN_aarch64_tlsdesc_small_plt_bti_entry;
37c18eed
SD
11298 }
11299
9bcc30e4 11300 memcpy (htab->root.splt->contents + htab->root.tlsdesc_plt,
37c18eed 11301 entry, htab->tlsdesc_plt_entry_size);
a06ea964
NC
11302
11303 {
11304 bfd_vma adrp1_addr =
11305 htab->root.splt->output_section->vma
9bcc30e4
L
11306 + htab->root.splt->output_offset
11307 + htab->root.tlsdesc_plt + 4;
a06ea964 11308
caed7120 11309 bfd_vma adrp2_addr = adrp1_addr + 4;
a06ea964
NC
11310
11311 bfd_vma got_addr =
11312 htab->root.sgot->output_section->vma
11313 + htab->root.sgot->output_offset;
11314
11315 bfd_vma pltgot_addr =
11316 htab->root.sgotplt->output_section->vma
11317 + htab->root.sgotplt->output_offset;
11318
9bcc30e4 11319 bfd_vma dt_tlsdesc_got = got_addr + htab->root.tlsdesc_got;
caed7120
YZ
11320
11321 bfd_byte *plt_entry =
9bcc30e4 11322 htab->root.splt->contents + htab->root.tlsdesc_plt;
a06ea964 11323
37c18eed
SD
11324 /* First instruction in BTI enabled PLT stub is a BTI
11325 instruction so skip it. */
11326 if (type & PLT_BTI)
11327 {
11328 plt_entry = plt_entry + 4;
11329 adrp1_addr = adrp1_addr + 4;
11330 adrp2_addr = adrp2_addr + 4;
11331 }
11332
a06ea964 11333 /* adrp x2, DT_TLSDESC_GOT */
caed7120 11334 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11335 adrp_rtype,
caed7120
YZ
11336 plt_entry + 4,
11337 (PG (dt_tlsdesc_got)
11338 - PG (adrp1_addr)));
a06ea964
NC
11339
11340 /* adrp x3, 0 */
caed7120 11341 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11342 adrp_rtype,
caed7120
YZ
11343 plt_entry + 8,
11344 (PG (pltgot_addr)
11345 - PG (adrp2_addr)));
a06ea964
NC
11346
11347 /* ldr x2, [x2, #0] */
caed7120 11348 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11349 ldr_rtype,
caed7120
YZ
11350 plt_entry + 12,
11351 PG_OFFSET (dt_tlsdesc_got));
a06ea964
NC
11352
11353 /* add x3, x3, 0 */
caed7120
YZ
11354 elf_aarch64_update_plt_entry (output_bfd,
11355 BFD_RELOC_AARCH64_ADD_LO12,
11356 plt_entry + 16,
11357 PG_OFFSET (pltgot_addr));
a06ea964
NC
11358 }
11359 }
11360 }
11361
11362 if (htab->root.sgotplt)
11363 {
11364 if (bfd_is_abs_section (htab->root.sgotplt->output_section))
11365 {
4eca0228 11366 _bfd_error_handler
871b3ab2 11367 (_("discarded output section: `%pA'"), htab->root.sgotplt);
a06ea964
NC
11368 return FALSE;
11369 }
11370
11371 /* Fill in the first three entries in the global offset table. */
11372 if (htab->root.sgotplt->size > 0)
11373 {
8db339a6
MS
11374 bfd_put_NN (output_bfd, (bfd_vma) 0, htab->root.sgotplt->contents);
11375
a06ea964 11376 /* Write GOT[1] and GOT[2], needed for the dynamic linker. */
cec5225b 11377 bfd_put_NN (output_bfd,
a06ea964 11378 (bfd_vma) 0,
a1bdea65 11379 htab->root.sgotplt->contents + GOT_ENTRY_SIZE (htab));
cec5225b 11380 bfd_put_NN (output_bfd,
a06ea964 11381 (bfd_vma) 0,
a1bdea65
SP
11382 (htab->root.sgotplt->contents
11383 + GOT_ENTRY_SIZE (htab) * 2));
a06ea964
NC
11384 }
11385
8db339a6
MS
11386 if (htab->root.sgot)
11387 {
11388 if (htab->root.sgot->size > 0)
11389 {
11390 bfd_vma addr =
11391 sdyn ? sdyn->output_section->vma + sdyn->output_offset : 0;
11392 bfd_put_NN (output_bfd, addr, htab->root.sgot->contents);
11393 }
11394 }
11395
a06ea964 11396 elf_section_data (htab->root.sgotplt->output_section)->
a1bdea65 11397 this_hdr.sh_entsize = GOT_ENTRY_SIZE (htab);
a06ea964
NC
11398 }
11399
11400 if (htab->root.sgot && htab->root.sgot->size > 0)
11401 elf_section_data (htab->root.sgot->output_section)->this_hdr.sh_entsize
a1bdea65 11402 = GOT_ENTRY_SIZE (htab);
a06ea964 11403
1419bbe5
WN
11404 /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
11405 htab_traverse (htab->loc_hash_table,
11406 elfNN_aarch64_finish_local_dynamic_symbol,
11407 info);
11408
a06ea964
NC
11409 return TRUE;
11410}
11411
37c18eed
SD
11412/* Check if BTI enabled PLTs are needed. Returns the type needed. */
11413static aarch64_plt_type
11414get_plt_type (bfd *abfd)
11415{
11416 aarch64_plt_type ret = PLT_NORMAL;
11417 bfd_byte *contents, *extdyn, *extdynend;
11418 asection *sec = bfd_get_section_by_name (abfd, ".dynamic");
11419 if (!sec || !bfd_malloc_and_get_section (abfd, sec, &contents))
11420 return ret;
11421 extdyn = contents;
11422 extdynend = contents + sec->size;
11423 for (; extdyn < extdynend; extdyn += sizeof (ElfNN_External_Dyn))
11424 {
11425 Elf_Internal_Dyn dyn;
11426 bfd_elfNN_swap_dyn_in (abfd, extdyn, &dyn);
11427
11428 /* Let's check the processor specific dynamic array tags. */
11429 bfd_vma tag = dyn.d_tag;
11430 if (tag < DT_LOPROC || tag > DT_HIPROC)
11431 continue;
11432
11433 switch (tag)
11434 {
11435 case DT_AARCH64_BTI_PLT:
1dbade74
SD
11436 ret |= PLT_BTI;
11437 break;
11438
11439 case DT_AARCH64_PAC_PLT:
11440 ret |= PLT_PAC;
37c18eed
SD
11441 break;
11442
11443 default: break;
11444 }
11445 }
11446 free (contents);
11447 return ret;
11448}
11449
11450static long
11451elfNN_aarch64_get_synthetic_symtab (bfd *abfd,
11452 long symcount,
11453 asymbol **syms,
11454 long dynsymcount,
11455 asymbol **dynsyms,
11456 asymbol **ret)
11457{
11458 elf_aarch64_tdata (abfd)->plt_type = get_plt_type (abfd);
11459 return _bfd_elf_get_synthetic_symtab (abfd, symcount, syms,
11460 dynsymcount, dynsyms, ret);
11461}
11462
a06ea964
NC
11463/* Return address for Ith PLT stub in section PLT, for relocation REL
11464 or (bfd_vma) -1 if it should not be included. */
11465
11466static bfd_vma
cec5225b 11467elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
a06ea964
NC
11468 const arelent *rel ATTRIBUTE_UNUSED)
11469{
37c18eed
SD
11470 size_t plt0_size = PLT_ENTRY_SIZE;
11471 size_t pltn_size = PLT_SMALL_ENTRY_SIZE;
11472
1dbade74
SD
11473 if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI_PAC)
11474 {
1dbade74
SD
11475 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
11476 pltn_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
11477 else
11478 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
11479 }
11480 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI)
37c18eed 11481 {
37c18eed
SD
11482 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
11483 pltn_size = PLT_BTI_SMALL_ENTRY_SIZE;
11484 }
1dbade74
SD
11485 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_PAC)
11486 {
1dbade74
SD
11487 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
11488 }
11489
37c18eed 11490 return plt->vma + plt0_size + i * pltn_size;
a06ea964
NC
11491}
11492
d691934d
NC
11493/* Returns TRUE if NAME is an AArch64 mapping symbol.
11494 The ARM ELF standard defines $x (for A64 code) and $d (for data).
11495 It also allows a period initiated suffix to be added to the symbol, ie:
11496 "$[adtx]\.[:sym_char]+". */
11497
11498static bfd_boolean
11499is_aarch64_mapping_symbol (const char * name)
11500{
11501 return name != NULL /* Paranoia. */
11502 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
11503 the mapping symbols could have acquired a prefix.
11504 We do not support this here, since such symbols no
11505 longer conform to the ARM ELF ABI. */
3979cf50 11506 && (name[1] == 'd' || name[1] == 'x' || name[1] == 'c')
d691934d
NC
11507 && (name[2] == 0 || name[2] == '.');
11508 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
11509 any characters that follow the period are legal characters for the body
11510 of a symbol's name. For now we just assume that this is the case. */
11511}
11512
11513/* Make sure that mapping symbols in object files are not removed via the
11514 "strip --strip-unneeded" tool. These symbols might needed in order to
11515 correctly generate linked files. Once an object file has been linked,
11516 it should be safe to remove them. */
11517
11518static void
11519elfNN_aarch64_backend_symbol_processing (bfd *abfd, asymbol *sym)
11520{
11521 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
11522 && sym->section != bfd_abs_section_ptr
11523 && is_aarch64_mapping_symbol (sym->name))
11524 sym->flags |= BSF_KEEP;
11525}
11526
cd702818
SD
11527/* Implement elf_backend_setup_gnu_properties for AArch64. It serves as a
11528 wrapper function for _bfd_aarch64_elf_link_setup_gnu_properties to account
11529 for the effect of GNU properties of the output_bfd. */
11530static bfd *
11531elfNN_aarch64_link_setup_gnu_properties (struct bfd_link_info *info)
11532{
11533 uint32_t prop = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
11534 bfd *pbfd = _bfd_aarch64_elf_link_setup_gnu_properties (info, &prop);
11535 elf_aarch64_tdata (info->output_bfd)->gnu_and_prop = prop;
37c18eed
SD
11536 elf_aarch64_tdata (info->output_bfd)->plt_type
11537 |= (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) ? PLT_BTI : 0;
cd702818
SD
11538 return pbfd;
11539}
11540
11541/* Implement elf_backend_merge_gnu_properties for AArch64. It serves as a
11542 wrapper function for _bfd_aarch64_elf_merge_gnu_properties to account
11543 for the effect of GNU properties of the output_bfd. */
11544static bfd_boolean
11545elfNN_aarch64_merge_gnu_properties (struct bfd_link_info *info,
4e539114 11546 bfd *abfd, bfd *bbfd,
cd702818
SD
11547 elf_property *aprop,
11548 elf_property *bprop)
11549{
11550 uint32_t prop
11551 = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
37c18eed
SD
11552
11553 /* If output has been marked with BTI using command line argument, give out
11554 warning if necessary. */
4e539114
SD
11555 /* Properties are merged per type, hence only check for warnings when merging
11556 GNU_PROPERTY_AARCH64_FEATURE_1_AND. */
11557 if (((aprop && aprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND)
11558 || (bprop && bprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND))
11559 && (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
37c18eed
SD
11560 && (!elf_aarch64_tdata (info->output_bfd)->no_bti_warn))
11561 {
11562 if ((aprop && !(aprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
4e539114 11563 || !aprop)
37c18eed 11564 {
8bf6d176 11565 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD
11566 "all inputs do not have BTI in NOTE section."),
11567 abfd);
11568 }
11569 if ((bprop && !(bprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
11570 || !bprop)
11571 {
8bf6d176 11572 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD
11573 "all inputs do not have BTI in NOTE section."),
11574 bbfd);
37c18eed
SD
11575 }
11576 }
11577
cd702818
SD
11578 return _bfd_aarch64_elf_merge_gnu_properties (info, abfd, aprop,
11579 bprop, prop);
11580}
a06ea964 11581
8b21361b
SP
11582/* Demangle c64 function symbols as we read them in. */
11583
11584static bfd_boolean
11585aarch64_elfNN_swap_symbol_in (bfd * abfd,
11586 const void *psrc,
11587 const void *pshn,
11588 Elf_Internal_Sym *dst)
11589{
11590 if (!bfd_elfNN_swap_symbol_in (abfd, psrc, pshn, dst))
11591 return FALSE;
11592
11593 dst->st_target_internal = 0;
11594
11595 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
11596 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
11597 {
11598 dst->st_target_internal = dst->st_value & ST_BRANCH_TO_C64;
11599 dst->st_value &= ~(bfd_vma) ST_BRANCH_TO_C64;
11600 }
11601
11602 return TRUE;
11603}
11604
11605
11606/* Mangle c64 function symbols as we write them out. */
11607
11608static void
11609aarch64_elfNN_swap_symbol_out (bfd *abfd,
11610 const Elf_Internal_Sym *src,
11611 void *cdst,
11612 void *shndx)
11613{
11614 Elf_Internal_Sym newsym = *src;
11615
11616 if ((ELF_ST_TYPE (newsym.st_info) == STT_FUNC
11617 || ELF_ST_TYPE (newsym.st_info) == STT_GNU_IFUNC)
11618 && newsym.st_shndx != SHN_UNDEF)
11619 newsym.st_value |= newsym.st_target_internal;
11620
11621 bfd_elfNN_swap_symbol_out (abfd, &newsym, cdst, shndx);
11622}
11623
a1bdea65
SP
11624/* Define the size of a GOT element for the generic mid-end. */
11625
11626static bfd_vma
11627elfNN_aarch64_got_elt_size (bfd *abfd ATTRIBUTE_UNUSED,
11628 struct bfd_link_info *info,
11629 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED,
11630 bfd *ibfd ATTRIBUTE_UNUSED,
11631 unsigned long symndx ATTRIBUTE_UNUSED)
11632{
11633 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11634
11635 return GOT_ENTRY_SIZE (htab);
11636}
11637
f938669f
SP
11638/* Define the size of a GOT header, which is the minimum size of the GOT section
11639 when one is needed. */
11640
11641static bfd_vma
a1bdea65 11642elfNN_aarch64_got_header_size (struct bfd_link_info *info)
f938669f 11643{
a1bdea65
SP
11644 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11645
11646 return GOT_ENTRY_SIZE (htab) * GOT_RESERVED_HEADER_SLOTS;
f938669f
SP
11647}
11648
fa6ca5e2
SP
11649/* Identify the 'C' in the CIE augmentation string. */
11650
11651static bfd_boolean
11652elf64_aarch64_eh_frame_augmentation_char (const char aug)
11653{
11654 return aug == 'C';
11655}
11656
a06ea964
NC
11657/* We use this so we can override certain functions
11658 (though currently we don't). */
11659
cec5225b 11660const struct elf_size_info elfNN_aarch64_size_info =
a06ea964 11661{
cec5225b
YZ
11662 sizeof (ElfNN_External_Ehdr),
11663 sizeof (ElfNN_External_Phdr),
11664 sizeof (ElfNN_External_Shdr),
11665 sizeof (ElfNN_External_Rel),
11666 sizeof (ElfNN_External_Rela),
11667 sizeof (ElfNN_External_Sym),
11668 sizeof (ElfNN_External_Dyn),
a06ea964
NC
11669 sizeof (Elf_External_Note),
11670 4, /* Hash table entry size. */
11671 1, /* Internal relocs per external relocs. */
cec5225b
YZ
11672 ARCH_SIZE, /* Arch size. */
11673 LOG_FILE_ALIGN, /* Log_file_align. */
11674 ELFCLASSNN, EV_CURRENT,
11675 bfd_elfNN_write_out_phdrs,
11676 bfd_elfNN_write_shdrs_and_ehdr,
11677 bfd_elfNN_checksum_contents,
11678 bfd_elfNN_write_relocs,
8b21361b
SP
11679 aarch64_elfNN_swap_symbol_in,
11680 aarch64_elfNN_swap_symbol_out,
cec5225b
YZ
11681 bfd_elfNN_slurp_reloc_table,
11682 bfd_elfNN_slurp_symbol_table,
11683 bfd_elfNN_swap_dyn_in,
11684 bfd_elfNN_swap_dyn_out,
11685 bfd_elfNN_swap_reloc_in,
11686 bfd_elfNN_swap_reloc_out,
11687 bfd_elfNN_swap_reloca_in,
11688 bfd_elfNN_swap_reloca_out
a06ea964
NC
11689};
11690
11691#define ELF_ARCH bfd_arch_aarch64
11692#define ELF_MACHINE_CODE EM_AARCH64
11693#define ELF_MAXPAGESIZE 0x10000
11694#define ELF_MINPAGESIZE 0x1000
11695#define ELF_COMMONPAGESIZE 0x1000
11696
cec5225b
YZ
11697#define bfd_elfNN_bfd_is_target_special_symbol \
11698 elfNN_aarch64_is_target_special_symbol
a06ea964 11699
07d6d2b8 11700#define bfd_elfNN_bfd_link_hash_table_create \
cec5225b 11701 elfNN_aarch64_link_hash_table_create
a06ea964 11702
cec5225b
YZ
11703#define bfd_elfNN_bfd_merge_private_bfd_data \
11704 elfNN_aarch64_merge_private_bfd_data
a06ea964 11705
cec5225b
YZ
11706#define bfd_elfNN_bfd_print_private_bfd_data \
11707 elfNN_aarch64_print_private_bfd_data
a06ea964 11708
cec5225b
YZ
11709#define bfd_elfNN_bfd_reloc_type_lookup \
11710 elfNN_aarch64_reloc_type_lookup
a06ea964 11711
cec5225b
YZ
11712#define bfd_elfNN_bfd_reloc_name_lookup \
11713 elfNN_aarch64_reloc_name_lookup
a06ea964 11714
cec5225b
YZ
11715#define bfd_elfNN_bfd_set_private_flags \
11716 elfNN_aarch64_set_private_flags
a06ea964 11717
cec5225b
YZ
11718#define bfd_elfNN_find_inliner_info \
11719 elfNN_aarch64_find_inliner_info
a06ea964 11720
37c18eed
SD
11721#define bfd_elfNN_get_synthetic_symtab \
11722 elfNN_aarch64_get_synthetic_symtab
11723
cec5225b
YZ
11724#define bfd_elfNN_mkobject \
11725 elfNN_aarch64_mkobject
a06ea964 11726
cec5225b
YZ
11727#define bfd_elfNN_new_section_hook \
11728 elfNN_aarch64_new_section_hook
a06ea964
NC
11729
11730#define elf_backend_adjust_dynamic_symbol \
cec5225b 11731 elfNN_aarch64_adjust_dynamic_symbol
a06ea964
NC
11732
11733#define elf_backend_always_size_sections \
cec5225b 11734 elfNN_aarch64_always_size_sections
a06ea964
NC
11735
11736#define elf_backend_check_relocs \
cec5225b 11737 elfNN_aarch64_check_relocs
a06ea964
NC
11738
11739#define elf_backend_copy_indirect_symbol \
cec5225b 11740 elfNN_aarch64_copy_indirect_symbol
a06ea964 11741
823710d5
SN
11742#define elf_backend_merge_symbol_attribute \
11743 elfNN_aarch64_merge_symbol_attribute
11744
a06ea964
NC
11745/* Create .dynbss, and .rela.bss sections in DYNOBJ, and set up shortcuts
11746 to them in our hash. */
11747#define elf_backend_create_dynamic_sections \
cec5225b 11748 elfNN_aarch64_create_dynamic_sections
a06ea964
NC
11749
11750#define elf_backend_init_index_section \
11751 _bfd_elf_init_2_index_sections
11752
a06ea964 11753#define elf_backend_finish_dynamic_sections \
cec5225b 11754 elfNN_aarch64_finish_dynamic_sections
a06ea964
NC
11755
11756#define elf_backend_finish_dynamic_symbol \
cec5225b 11757 elfNN_aarch64_finish_dynamic_symbol
a06ea964 11758
a06ea964 11759#define elf_backend_object_p \
cec5225b 11760 elfNN_aarch64_object_p
a06ea964 11761
07d6d2b8 11762#define elf_backend_output_arch_local_syms \
cec5225b 11763 elfNN_aarch64_output_arch_local_syms
a06ea964 11764
e7679060
AM
11765#define elf_backend_maybe_function_sym \
11766 elfNN_aarch64_maybe_function_sym
11767
a06ea964 11768#define elf_backend_plt_sym_val \
cec5225b 11769 elfNN_aarch64_plt_sym_val
a06ea964 11770
ed7e9d0b
AM
11771#define elf_backend_init_file_header \
11772 elfNN_aarch64_init_file_header
a06ea964
NC
11773
11774#define elf_backend_relocate_section \
cec5225b 11775 elfNN_aarch64_relocate_section
a06ea964
NC
11776
11777#define elf_backend_reloc_type_class \
cec5225b 11778 elfNN_aarch64_reloc_type_class
a06ea964 11779
a06ea964 11780#define elf_backend_section_from_shdr \
cec5225b 11781 elfNN_aarch64_section_from_shdr
a06ea964
NC
11782
11783#define elf_backend_size_dynamic_sections \
cec5225b 11784 elfNN_aarch64_size_dynamic_sections
a06ea964
NC
11785
11786#define elf_backend_size_info \
cec5225b 11787 elfNN_aarch64_size_info
a06ea964 11788
68fcca92
JW
11789#define elf_backend_write_section \
11790 elfNN_aarch64_write_section
11791
d691934d
NC
11792#define elf_backend_symbol_processing \
11793 elfNN_aarch64_backend_symbol_processing
11794
cd702818
SD
11795#define elf_backend_setup_gnu_properties \
11796 elfNN_aarch64_link_setup_gnu_properties
11797
11798#define elf_backend_merge_gnu_properties \
11799 elfNN_aarch64_merge_gnu_properties
11800
f938669f
SP
11801#define elf_backend_got_header_size \
11802 elfNN_aarch64_got_header_size
11803
a1bdea65
SP
11804#define elf_backend_got_elt_size \
11805 elfNN_aarch64_got_elt_size
11806
fa6ca5e2
SP
11807#define elf_backend_eh_frame_augmentation_char \
11808 elf64_aarch64_eh_frame_augmentation_char
11809
a06ea964 11810#define elf_backend_can_refcount 1
59c108f7 11811#define elf_backend_can_gc_sections 1
a06ea964
NC
11812#define elf_backend_plt_readonly 1
11813#define elf_backend_want_got_plt 1
11814#define elf_backend_want_plt_sym 0
5474d94f 11815#define elf_backend_want_dynrelro 1
a06ea964
NC
11816#define elf_backend_may_use_rel_p 0
11817#define elf_backend_may_use_rela_p 1
11818#define elf_backend_default_use_rela_p 1
07d6d2b8 11819#define elf_backend_rela_normal 1
64f52338 11820#define elf_backend_dtrel_excludes_plt 1
c495064d 11821#define elf_backend_default_execstack 0
32f573bc 11822#define elf_backend_extern_protected_data 1
7f784814 11823#define elf_backend_hash_symbol elf_aarch64_hash_symbol
a06ea964 11824
07d6d2b8 11825#undef elf_backend_obj_attrs_section
a06ea964
NC
11826#define elf_backend_obj_attrs_section ".ARM.attributes"
11827
cec5225b 11828#include "elfNN-target.h"
a75cf613
ES
11829
11830/* CloudABI support. */
11831
11832#undef TARGET_LITTLE_SYM
11833#define TARGET_LITTLE_SYM aarch64_elfNN_le_cloudabi_vec
11834#undef TARGET_LITTLE_NAME
11835#define TARGET_LITTLE_NAME "elfNN-littleaarch64-cloudabi"
11836#undef TARGET_BIG_SYM
11837#define TARGET_BIG_SYM aarch64_elfNN_be_cloudabi_vec
11838#undef TARGET_BIG_NAME
11839#define TARGET_BIG_NAME "elfNN-bigaarch64-cloudabi"
11840
11841#undef ELF_OSABI
11842#define ELF_OSABI ELFOSABI_CLOUDABI
11843
11844#undef elfNN_bed
11845#define elfNN_bed elfNN_aarch64_cloudabi_bed
11846
11847#include "elfNN-target.h"