]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - bfd/elfnn-aarch64.c
Only warn on badly sized symbols
[thirdparty/binutils-gdb.git] / bfd / elfnn-aarch64.c
CommitLineData
cec5225b 1/* AArch64-specific support for NN-bit ELF.
b3adc24a 2 Copyright (C) 2009-2020 Free Software Foundation, Inc.
a06ea964
NC
3 Contributed by ARM Ltd.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21/* Notes on implementation:
22
23 Thread Local Store (TLS)
24
25 Overview:
26
27 The implementation currently supports both traditional TLS and TLS
28 descriptors, but only general dynamic (GD).
29
30 For traditional TLS the assembler will present us with code
31 fragments of the form:
32
33 adrp x0, :tlsgd:foo
07d6d2b8 34 R_AARCH64_TLSGD_ADR_PAGE21(foo)
a06ea964 35 add x0, :tlsgd_lo12:foo
07d6d2b8 36 R_AARCH64_TLSGD_ADD_LO12_NC(foo)
a06ea964
NC
37 bl __tls_get_addr
38 nop
39
40 For TLS descriptors the assembler will present us with code
41 fragments of the form:
42
07d6d2b8
AM
43 adrp x0, :tlsdesc:foo R_AARCH64_TLSDESC_ADR_PAGE21(foo)
44 ldr x1, [x0, #:tlsdesc_lo12:foo] R_AARCH64_TLSDESC_LD64_LO12(foo)
45 add x0, x0, #:tlsdesc_lo12:foo R_AARCH64_TLSDESC_ADD_LO12(foo)
a06ea964 46 .tlsdesccall foo
07d6d2b8 47 blr x1 R_AARCH64_TLSDESC_CALL(foo)
a06ea964
NC
48
49 The relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} against foo
50 indicate that foo is thread local and should be accessed via the
51 traditional TLS mechanims.
52
a6bb11b2 53 The relocations R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC}
a06ea964
NC
54 against foo indicate that 'foo' is thread local and should be accessed
55 via a TLS descriptor mechanism.
56
57 The precise instruction sequence is only relevant from the
58 perspective of linker relaxation which is currently not implemented.
59
60 The static linker must detect that 'foo' is a TLS object and
61 allocate a double GOT entry. The GOT entry must be created for both
62 global and local TLS symbols. Note that this is different to none
63 TLS local objects which do not need a GOT entry.
64
65 In the traditional TLS mechanism, the double GOT entry is used to
66 provide the tls_index structure, containing module and offset
a6bb11b2 67 entries. The static linker places the relocation R_AARCH64_TLS_DTPMOD
a06ea964
NC
68 on the module entry. The loader will subsequently fixup this
69 relocation with the module identity.
70
71 For global traditional TLS symbols the static linker places an
a6bb11b2 72 R_AARCH64_TLS_DTPREL relocation on the offset entry. The loader
a06ea964
NC
73 will subsequently fixup the offset. For local TLS symbols the static
74 linker fixes up offset.
75
76 In the TLS descriptor mechanism the double GOT entry is used to
77 provide the descriptor. The static linker places the relocation
78 R_AARCH64_TLSDESC on the first GOT slot. The loader will
79 subsequently fix this up.
80
81 Implementation:
82
83 The handling of TLS symbols is implemented across a number of
84 different backend functions. The following is a top level view of
85 what processing is performed where.
86
87 The TLS implementation maintains state information for each TLS
88 symbol. The state information for local and global symbols is kept
89 in different places. Global symbols use generic BFD structures while
90 local symbols use backend specific structures that are allocated and
91 maintained entirely by the backend.
92
93 The flow:
94
cec5225b 95 elfNN_aarch64_check_relocs()
a06ea964
NC
96
97 This function is invoked for each relocation.
98
99 The TLS relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} and
a6bb11b2 100 R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC} are
a06ea964
NC
101 spotted. One time creation of local symbol data structures are
102 created when the first local symbol is seen.
103
104 The reference count for a symbol is incremented. The GOT type for
105 each symbol is marked as general dynamic.
106
cec5225b 107 elfNN_aarch64_allocate_dynrelocs ()
a06ea964
NC
108
109 For each global with positive reference count we allocate a double
110 GOT slot. For a traditional TLS symbol we allocate space for two
111 relocation entries on the GOT, for a TLS descriptor symbol we
112 allocate space for one relocation on the slot. Record the GOT offset
113 for this symbol.
114
cec5225b 115 elfNN_aarch64_size_dynamic_sections ()
a06ea964
NC
116
117 Iterate all input BFDS, look for in the local symbol data structure
118 constructed earlier for local TLS symbols and allocate them double
119 GOT slots along with space for a single GOT relocation. Update the
120 local symbol structure to record the GOT offset allocated.
121
cec5225b 122 elfNN_aarch64_relocate_section ()
a06ea964 123
cec5225b 124 Calls elfNN_aarch64_final_link_relocate ()
a06ea964
NC
125
126 Emit the relevant TLS relocations against the GOT for each TLS
127 symbol. For local TLS symbols emit the GOT offset directly. The GOT
128 relocations are emitted once the first time a TLS symbol is
129 encountered. The implementation uses the LSB of the GOT offset to
130 flag that the relevant GOT relocations for a symbol have been
131 emitted. All of the TLS code that uses the GOT offset needs to take
132 care to mask out this flag bit before using the offset.
133
cec5225b 134 elfNN_aarch64_final_link_relocate ()
a06ea964
NC
135
136 Fixup the R_AARCH64_TLSGD_{ADR_PREL21, ADD_LO12_NC} relocations. */
137
138#include "sysdep.h"
139#include "bfd.h"
140#include "libiberty.h"
141#include "libbfd.h"
a06ea964
NC
142#include "elf-bfd.h"
143#include "bfdlink.h"
1419bbe5 144#include "objalloc.h"
a06ea964 145#include "elf/aarch64.h"
caed7120 146#include "elfxx-aarch64.h"
a8bfaadb 147#include "cpu-aarch64.h"
a06ea964 148
cec5225b
YZ
149#define ARCH_SIZE NN
150
151#if ARCH_SIZE == 64
152#define AARCH64_R(NAME) R_AARCH64_ ## NAME
153#define AARCH64_R_STR(NAME) "R_AARCH64_" #NAME
a6bb11b2
YZ
154#define HOWTO64(...) HOWTO (__VA_ARGS__)
155#define HOWTO32(...) EMPTY_HOWTO (0)
cec5225b 156#define LOG_FILE_ALIGN 3
f955cccf 157#define BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
cec5225b
YZ
158#endif
159
f7d2c675
SP
160#define MORELLO_R(NAME) R_MORELLO_ ## NAME
161#define MORELLO_R_STR(NAME) "R_MORELLO_" #NAME
162
cec5225b
YZ
163#if ARCH_SIZE == 32
164#define AARCH64_R(NAME) R_AARCH64_P32_ ## NAME
165#define AARCH64_R_STR(NAME) "R_AARCH64_P32_" #NAME
a6bb11b2
YZ
166#define HOWTO64(...) EMPTY_HOWTO (0)
167#define HOWTO32(...) HOWTO (__VA_ARGS__)
cec5225b 168#define LOG_FILE_ALIGN 2
07d6d2b8
AM
169#define BFD_RELOC_AARCH64_TLSDESC_LD32_LO12 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
170#define R_AARCH64_P32_TLSDESC_ADD_LO12 R_AARCH64_P32_TLSDESC_ADD_LO12_NC
cec5225b
YZ
171#endif
172
a6bb11b2 173#define IS_AARCH64_TLS_RELOC(R_TYPE) \
4c0a9a6f
JW
174 ((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
175 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
3c12b054 176 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
3e8286c0 177 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
1aa66fb1 178 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
a6bb11b2 179 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
a6bb11b2 180 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
4c0a9a6f 181 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC \
a6bb11b2 182 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
4c0a9a6f
JW
183 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC \
184 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1 \
6ffe9a1b 185 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12 \
40fbed84 186 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 \
753999c1 187 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC \
73f925cc 188 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
f69e4920 189 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
77a69ff8 190 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 \
07c9aa07
JW
191 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12 \
192 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC \
193 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12 \
194 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC \
195 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12 \
196 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC \
197 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12 \
198 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC \
6ffe9a1b
JW
199 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0 \
200 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC \
201 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1 \
202 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC \
203 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2 \
a6bb11b2 204 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
4c0a9a6f 205 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
a6bb11b2 206 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
e04ef022
RL
207 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
208 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
209 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
210 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
211 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
212 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
213 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
214 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
a6bb11b2
YZ
215 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
216 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
4c0a9a6f
JW
217 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
218 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC \
219 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2 \
a6bb11b2
YZ
220 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPMOD \
221 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPREL \
222 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_TPREL \
a06ea964
NC
223 || IS_AARCH64_TLSDESC_RELOC ((R_TYPE)))
224
9331eea1 225#define IS_AARCH64_TLS_RELAX_RELOC(R_TYPE) \
f955cccf
NC
226 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
227 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
4ca9b406 228 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
4af68b9c
JW
229 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
230 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4ca9b406 231 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
4af68b9c
JW
232 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
233 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
4ca9b406 234 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
4af68b9c 235 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC \
0484b454
RL
236 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
237 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
238 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1 \
239 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4af68b9c 240 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
9331eea1
JW
241 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
242 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
ac734732
RL
243 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
244 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
9331eea1
JW
245 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
246 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
247 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC \
259364ad
JW
248 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
249 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
4af68b9c 250 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21)
9331eea1 251
a6bb11b2 252#define IS_AARCH64_TLSDESC_RELOC(R_TYPE) \
4c0a9a6f
JW
253 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC \
254 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
f955cccf 255 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
a6bb11b2 256 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
4ca9b406 257 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
389b8029 258 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4c0a9a6f 259 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
4ca9b406 260 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
a6bb11b2 261 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC \
f955cccf 262 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD64_LO12 \
4ca9b406 263 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
a6bb11b2 264 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4c0a9a6f
JW
265 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
266 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
267 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1)
a06ea964 268
6353d82b 269#define ELIMINATE_COPY_RELOCS 1
a06ea964 270
a06ea964 271/* Return size of a relocation entry. HTAB is the bfd's
cec5225b
YZ
272 elf_aarch64_link_hash_entry. */
273#define RELOC_SIZE(HTAB) (sizeof (ElfNN_External_Rela))
a06ea964 274
a1bdea65
SP
275/* GOT Entry size - 16 bytes in C64, 8 bytes in ELF64 and 4 bytes in ELF32. */
276#define GOT_ENTRY_SIZE(htab) (ARCH_SIZE >> (3 - htab->c64_rel))
277#define GOT_RESERVED_HEADER_SLOTS (3)
07d6d2b8
AM
278#define PLT_ENTRY_SIZE (32)
279#define PLT_SMALL_ENTRY_SIZE (16)
280#define PLT_TLSDESC_ENTRY_SIZE (32)
37c18eed 281/* PLT sizes with BTI insn. */
68bb0359 282#define PLT_BTI_SMALL_ENTRY_SIZE (24)
1dbade74 283/* PLT sizes with PAC insn. */
68bb0359 284#define PLT_PAC_SMALL_ENTRY_SIZE (24)
1dbade74 285/* PLT sizes with BTI and PAC insn. */
1dbade74 286#define PLT_BTI_PAC_SMALL_ENTRY_SIZE (24)
a06ea964 287
2d0ca824 288/* Encoding of the nop instruction. */
a06ea964
NC
289#define INSN_NOP 0xd503201f
290
291#define aarch64_compute_jump_table_size(htab) \
292 (((htab)->root.srelplt == NULL) ? 0 \
a1bdea65 293 : (htab)->root.srelplt->reloc_count * GOT_ENTRY_SIZE (htab))
a06ea964
NC
294
295/* The first entry in a procedure linkage table looks like this
296 if the distance between the PLTGOT and the PLT is < 4GB use
297 these PLT entries. Note that the dynamic linker gets &PLTGOT[2]
298 in x16 and needs to work out PLTGOT[1] by using an address of
cec5225b
YZ
299 [x16,#-GOT_ENTRY_SIZE]. */
300static const bfd_byte elfNN_aarch64_small_plt0_entry[PLT_ENTRY_SIZE] =
a06ea964
NC
301{
302 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
303 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
caed7120 304#if ARCH_SIZE == 64
a06ea964
NC
305 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
306 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
caed7120
YZ
307#else
308 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
309 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
310#endif
a06ea964
NC
311 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
312 0x1f, 0x20, 0x03, 0xd5, /* nop */
313 0x1f, 0x20, 0x03, 0xd5, /* nop */
314 0x1f, 0x20, 0x03, 0xd5, /* nop */
315};
316
68bb0359 317static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_ENTRY_SIZE] =
37c18eed
SD
318{
319 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
320 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
321 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
322#if ARCH_SIZE == 64
323 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
324 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
325#else
326 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
327 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
328#endif
329 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
330 0x1f, 0x20, 0x03, 0xd5, /* nop */
331 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD
332};
333
e19e9199
SP
334/* The C64 PLT0. */
335static const bfd_byte elfNN_c64_small_plt0_entry[PLT_ENTRY_SIZE] =
336{
337 0xf0, 0x7b, 0xbf, 0x62, /* stp c16, c30, [csp, #-32]! */
338 0x10, 0x00, 0x80, 0x90, /* adrp c16, (GOT+16) */
339 0x11, 0x0a, 0x40, 0xc2, /* ldr c17, [c16, #PLT_GOT+0x10] */
340 0x10, 0x02, 0x00, 0x02, /* add c16, c16,#PLT_GOT+0x10 */
341 0x20, 0x12, 0xc2, 0xc2, /* br c17 */
342 0x1f, 0x20, 0x03, 0xd5, /* nop */
343 0x1f, 0x20, 0x03, 0xd5, /* nop */
344 0x1f, 0x20, 0x03, 0xd5, /* nop */
345};
346
a06ea964
NC
347/* Per function entry in a procedure linkage table looks like this
348 if the distance between the PLTGOT and the PLT is < 4GB use
37c18eed 349 these PLT entries. Use BTI versions of the PLTs when enabled. */
cec5225b 350static const bfd_byte elfNN_aarch64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
a06ea964
NC
351{
352 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
caed7120 353#if ARCH_SIZE == 64
a06ea964
NC
354 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
355 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
caed7120
YZ
356#else
357 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
358 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
359#endif
a06ea964
NC
360 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
361};
362
e19e9199
SP
363/* The C64 PLT. */
364static const bfd_byte elfNN_c64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
365{
366 0x10, 0x00, 0x80, 0x90, /* adrp c16, PLTGOT + offset */
367 0x11, 0x02, 0x40, 0xc2, /* ldr c17, [c16, PLTGOT + offset] */
368 0x10, 0x02, 0x00, 0x02, /* add c16, c16, :lo12:PLTGOT + offset */
369 0x20, 0x12, 0xc2, 0xc2, /* br c17. */
370};
371
37c18eed
SD
372static const bfd_byte
373elfNN_aarch64_small_plt_bti_entry[PLT_BTI_SMALL_ENTRY_SIZE] =
374{
375 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
376 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
377#if ARCH_SIZE == 64
378 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
379 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
380#else
381 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
382 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
383#endif
384 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 385 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD
386};
387
1dbade74
SD
388static const bfd_byte
389elfNN_aarch64_small_plt_pac_entry[PLT_PAC_SMALL_ENTRY_SIZE] =
390{
391 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
392#if ARCH_SIZE == 64
393 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
394 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
395#else
396 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
397 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
398#endif
399 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
400 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 401 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD
402};
403
404static const bfd_byte
405elfNN_aarch64_small_plt_bti_pac_entry[PLT_BTI_PAC_SMALL_ENTRY_SIZE] =
406{
407 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
408 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
409#if ARCH_SIZE == 64
410 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
411 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
412#else
413 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
414 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
415#endif
416 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
417 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
418};
419
a06ea964 420static const bfd_byte
cec5225b 421elfNN_aarch64_tlsdesc_small_plt_entry[PLT_TLSDESC_ENTRY_SIZE] =
a06ea964
NC
422{
423 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
424 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
425 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
caed7120
YZ
426#if ARCH_SIZE == 64
427 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
a06ea964 428 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
caed7120
YZ
429#else
430 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
431 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
432#endif
433 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
a06ea964
NC
434 0x1f, 0x20, 0x03, 0xd5, /* nop */
435 0x1f, 0x20, 0x03, 0xd5, /* nop */
436};
437
37c18eed 438static const bfd_byte
68bb0359 439elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_TLSDESC_ENTRY_SIZE] =
37c18eed
SD
440{
441 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
442 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
443 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
444 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
445#if ARCH_SIZE == 64
446 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
447 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
448#else
449 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
450 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
451#endif
452 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
453 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD
454};
455
4ca9b406
SP
456static const bfd_byte
457elfNN_aarch64_tlsdesc_small_plt_c64_entry[PLT_TLSDESC_ENTRY_SIZE] =
458{
459 0xe2, 0x8f, 0xbf, 0x62, /* stp c2, c3, [sp, #-16]! */
460 0x02, 0x00, 0x80, 0x90, /* adrp c2, 0 */
461 0x03, 0x00, 0x80, 0x90, /* adrp c3, 0 */
462 0x42, 0x00, 0x40, 0xc2, /* ldr c2, [c2, #0] */
463 0x63, 0x00, 0x00, 0x02, /* add c3, c3, 0 */
464 0x40, 0x10, 0xc2, 0xc2, /* br c2 */
465 0x1f, 0x20, 0x03, 0xd5, /* nop */
466 0x1f, 0x20, 0x03, 0xd5, /* nop */
467};
468
07d6d2b8
AM
469#define elf_info_to_howto elfNN_aarch64_info_to_howto
470#define elf_info_to_howto_rel elfNN_aarch64_info_to_howto
a06ea964
NC
471
472#define AARCH64_ELF_ABI_VERSION 0
a06ea964
NC
473
474/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
475#define ALL_ONES (~ (bfd_vma) 0)
476
a6bb11b2
YZ
477/* Indexed by the bfd interal reloc enumerators.
478 Therefore, the table needs to be synced with BFD_RELOC_AARCH64_*
479 in reloc.c. */
a06ea964 480
a6bb11b2 481static reloc_howto_type elfNN_aarch64_howto_table[] =
a06ea964 482{
a6bb11b2 483 EMPTY_HOWTO (0),
a06ea964 484
a6bb11b2 485 /* Basic data relocations. */
a06ea964 486
b7f28d87
JW
487 /* Deprecated, but retained for backwards compatibility. */
488 HOWTO64 (R_AARCH64_NULL, /* type */
a06ea964 489 0, /* rightshift */
6346d5ca 490 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2 491 0, /* bitsize */
a06ea964
NC
492 FALSE, /* pc_relative */
493 0, /* bitpos */
494 complain_overflow_dont, /* complain_on_overflow */
495 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 496 "R_AARCH64_NULL", /* name */
a06ea964
NC
497 FALSE, /* partial_inplace */
498 0, /* src_mask */
a6bb11b2 499 0, /* dst_mask */
a06ea964 500 FALSE), /* pcrel_offset */
a6bb11b2 501 HOWTO (R_AARCH64_NONE, /* type */
a06ea964 502 0, /* rightshift */
6346d5ca 503 3, /* size (0 = byte, 1 = short, 2 = long) */
a06ea964
NC
504 0, /* bitsize */
505 FALSE, /* pc_relative */
506 0, /* bitpos */
507 complain_overflow_dont, /* complain_on_overflow */
508 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 509 "R_AARCH64_NONE", /* name */
a06ea964
NC
510 FALSE, /* partial_inplace */
511 0, /* src_mask */
512 0, /* dst_mask */
513 FALSE), /* pcrel_offset */
514
515 /* .xword: (S+A) */
a6bb11b2 516 HOWTO64 (AARCH64_R (ABS64), /* type */
a06ea964
NC
517 0, /* rightshift */
518 4, /* size (4 = long long) */
519 64, /* bitsize */
520 FALSE, /* pc_relative */
521 0, /* bitpos */
522 complain_overflow_unsigned, /* complain_on_overflow */
523 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 524 AARCH64_R_STR (ABS64), /* name */
a06ea964
NC
525 FALSE, /* partial_inplace */
526 ALL_ONES, /* src_mask */
527 ALL_ONES, /* dst_mask */
528 FALSE), /* pcrel_offset */
529
530 /* .word: (S+A) */
a6bb11b2 531 HOWTO (AARCH64_R (ABS32), /* type */
a06ea964
NC
532 0, /* rightshift */
533 2, /* size (0 = byte, 1 = short, 2 = long) */
534 32, /* bitsize */
535 FALSE, /* pc_relative */
536 0, /* bitpos */
537 complain_overflow_unsigned, /* complain_on_overflow */
538 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 539 AARCH64_R_STR (ABS32), /* name */
a06ea964
NC
540 FALSE, /* partial_inplace */
541 0xffffffff, /* src_mask */
542 0xffffffff, /* dst_mask */
543 FALSE), /* pcrel_offset */
544
545 /* .half: (S+A) */
a6bb11b2 546 HOWTO (AARCH64_R (ABS16), /* type */
a06ea964
NC
547 0, /* rightshift */
548 1, /* size (0 = byte, 1 = short, 2 = long) */
549 16, /* bitsize */
550 FALSE, /* pc_relative */
551 0, /* bitpos */
552 complain_overflow_unsigned, /* complain_on_overflow */
553 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 554 AARCH64_R_STR (ABS16), /* name */
a06ea964
NC
555 FALSE, /* partial_inplace */
556 0xffff, /* src_mask */
557 0xffff, /* dst_mask */
558 FALSE), /* pcrel_offset */
559
560 /* .xword: (S+A-P) */
a6bb11b2 561 HOWTO64 (AARCH64_R (PREL64), /* type */
a06ea964
NC
562 0, /* rightshift */
563 4, /* size (4 = long long) */
564 64, /* bitsize */
565 TRUE, /* pc_relative */
566 0, /* bitpos */
567 complain_overflow_signed, /* complain_on_overflow */
568 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 569 AARCH64_R_STR (PREL64), /* name */
a06ea964
NC
570 FALSE, /* partial_inplace */
571 ALL_ONES, /* src_mask */
572 ALL_ONES, /* dst_mask */
573 TRUE), /* pcrel_offset */
574
575 /* .word: (S+A-P) */
a6bb11b2 576 HOWTO (AARCH64_R (PREL32), /* type */
a06ea964
NC
577 0, /* rightshift */
578 2, /* size (0 = byte, 1 = short, 2 = long) */
579 32, /* bitsize */
580 TRUE, /* pc_relative */
581 0, /* bitpos */
582 complain_overflow_signed, /* complain_on_overflow */
583 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 584 AARCH64_R_STR (PREL32), /* name */
a06ea964
NC
585 FALSE, /* partial_inplace */
586 0xffffffff, /* src_mask */
587 0xffffffff, /* dst_mask */
588 TRUE), /* pcrel_offset */
589
590 /* .half: (S+A-P) */
a6bb11b2 591 HOWTO (AARCH64_R (PREL16), /* type */
a06ea964
NC
592 0, /* rightshift */
593 1, /* size (0 = byte, 1 = short, 2 = long) */
594 16, /* bitsize */
595 TRUE, /* pc_relative */
596 0, /* bitpos */
597 complain_overflow_signed, /* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 599 AARCH64_R_STR (PREL16), /* name */
a06ea964
NC
600 FALSE, /* partial_inplace */
601 0xffff, /* src_mask */
602 0xffff, /* dst_mask */
603 TRUE), /* pcrel_offset */
604
605 /* Group relocations to create a 16, 32, 48 or 64 bit
606 unsigned data or abs address inline. */
607
608 /* MOVZ: ((S+A) >> 0) & 0xffff */
a6bb11b2 609 HOWTO (AARCH64_R (MOVW_UABS_G0), /* type */
a06ea964
NC
610 0, /* rightshift */
611 2, /* size (0 = byte, 1 = short, 2 = long) */
612 16, /* bitsize */
613 FALSE, /* pc_relative */
614 0, /* bitpos */
615 complain_overflow_unsigned, /* complain_on_overflow */
616 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 617 AARCH64_R_STR (MOVW_UABS_G0), /* name */
a06ea964
NC
618 FALSE, /* partial_inplace */
619 0xffff, /* src_mask */
620 0xffff, /* dst_mask */
621 FALSE), /* pcrel_offset */
622
623 /* MOVK: ((S+A) >> 0) & 0xffff [no overflow check] */
a6bb11b2 624 HOWTO (AARCH64_R (MOVW_UABS_G0_NC), /* type */
a06ea964
NC
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 16, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont, /* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 632 AARCH64_R_STR (MOVW_UABS_G0_NC), /* name */
a06ea964
NC
633 FALSE, /* partial_inplace */
634 0xffff, /* src_mask */
635 0xffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 /* MOVZ: ((S+A) >> 16) & 0xffff */
a6bb11b2 639 HOWTO (AARCH64_R (MOVW_UABS_G1), /* type */
a06ea964
NC
640 16, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 16, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_unsigned, /* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 647 AARCH64_R_STR (MOVW_UABS_G1), /* name */
a06ea964
NC
648 FALSE, /* partial_inplace */
649 0xffff, /* src_mask */
650 0xffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 /* MOVK: ((S+A) >> 16) & 0xffff [no overflow check] */
a6bb11b2 654 HOWTO64 (AARCH64_R (MOVW_UABS_G1_NC), /* type */
a06ea964
NC
655 16, /* rightshift */
656 2, /* size (0 = byte, 1 = short, 2 = long) */
657 16, /* bitsize */
658 FALSE, /* pc_relative */
659 0, /* bitpos */
660 complain_overflow_dont, /* complain_on_overflow */
661 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 662 AARCH64_R_STR (MOVW_UABS_G1_NC), /* name */
a06ea964
NC
663 FALSE, /* partial_inplace */
664 0xffff, /* src_mask */
665 0xffff, /* dst_mask */
666 FALSE), /* pcrel_offset */
667
668 /* MOVZ: ((S+A) >> 32) & 0xffff */
a6bb11b2 669 HOWTO64 (AARCH64_R (MOVW_UABS_G2), /* type */
a06ea964
NC
670 32, /* rightshift */
671 2, /* size (0 = byte, 1 = short, 2 = long) */
672 16, /* bitsize */
673 FALSE, /* pc_relative */
674 0, /* bitpos */
675 complain_overflow_unsigned, /* complain_on_overflow */
676 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 677 AARCH64_R_STR (MOVW_UABS_G2), /* name */
a06ea964
NC
678 FALSE, /* partial_inplace */
679 0xffff, /* src_mask */
680 0xffff, /* dst_mask */
681 FALSE), /* pcrel_offset */
682
683 /* MOVK: ((S+A) >> 32) & 0xffff [no overflow check] */
a6bb11b2 684 HOWTO64 (AARCH64_R (MOVW_UABS_G2_NC), /* type */
a06ea964
NC
685 32, /* rightshift */
686 2, /* size (0 = byte, 1 = short, 2 = long) */
687 16, /* bitsize */
688 FALSE, /* pc_relative */
689 0, /* bitpos */
690 complain_overflow_dont, /* complain_on_overflow */
691 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 692 AARCH64_R_STR (MOVW_UABS_G2_NC), /* name */
a06ea964
NC
693 FALSE, /* partial_inplace */
694 0xffff, /* src_mask */
695 0xffff, /* dst_mask */
696 FALSE), /* pcrel_offset */
697
698 /* MOVZ: ((S+A) >> 48) & 0xffff */
a6bb11b2 699 HOWTO64 (AARCH64_R (MOVW_UABS_G3), /* type */
a06ea964
NC
700 48, /* rightshift */
701 2, /* size (0 = byte, 1 = short, 2 = long) */
702 16, /* bitsize */
703 FALSE, /* pc_relative */
704 0, /* bitpos */
705 complain_overflow_unsigned, /* complain_on_overflow */
706 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 707 AARCH64_R_STR (MOVW_UABS_G3), /* name */
a06ea964
NC
708 FALSE, /* partial_inplace */
709 0xffff, /* src_mask */
710 0xffff, /* dst_mask */
711 FALSE), /* pcrel_offset */
712
713 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
714 signed data or abs address inline. Will change instruction
715 to MOVN or MOVZ depending on sign of calculated value. */
716
717 /* MOV[ZN]: ((S+A) >> 0) & 0xffff */
a6bb11b2 718 HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
a06ea964
NC
719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 721 17, /* bitsize */
a06ea964
NC
722 FALSE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_signed, /* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 726 AARCH64_R_STR (MOVW_SABS_G0), /* name */
a06ea964
NC
727 FALSE, /* partial_inplace */
728 0xffff, /* src_mask */
729 0xffff, /* dst_mask */
730 FALSE), /* pcrel_offset */
731
732 /* MOV[ZN]: ((S+A) >> 16) & 0xffff */
a6bb11b2 733 HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
a06ea964
NC
734 16, /* rightshift */
735 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 736 17, /* bitsize */
a06ea964
NC
737 FALSE, /* pc_relative */
738 0, /* bitpos */
739 complain_overflow_signed, /* complain_on_overflow */
740 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 741 AARCH64_R_STR (MOVW_SABS_G1), /* name */
a06ea964
NC
742 FALSE, /* partial_inplace */
743 0xffff, /* src_mask */
744 0xffff, /* dst_mask */
745 FALSE), /* pcrel_offset */
746
747 /* MOV[ZN]: ((S+A) >> 32) & 0xffff */
a6bb11b2 748 HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
a06ea964
NC
749 32, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 751 17, /* bitsize */
a06ea964
NC
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_signed, /* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 756 AARCH64_R_STR (MOVW_SABS_G2), /* name */
a06ea964
NC
757 FALSE, /* partial_inplace */
758 0xffff, /* src_mask */
759 0xffff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
32247401
RL
762 /* Group relocations to create a 16, 32, 48 or 64 bit
763 PC relative address inline. */
764
765 /* MOV[NZ]: ((S+A-P) >> 0) & 0xffff */
e30d1fa1 766 HOWTO (AARCH64_R (MOVW_PREL_G0), /* type */
32247401
RL
767 0, /* rightshift */
768 2, /* size (0 = byte, 1 = short, 2 = long) */
769 17, /* bitsize */
770 TRUE, /* pc_relative */
771 0, /* bitpos */
772 complain_overflow_signed, /* complain_on_overflow */
773 bfd_elf_generic_reloc, /* special_function */
774 AARCH64_R_STR (MOVW_PREL_G0), /* name */
775 FALSE, /* partial_inplace */
776 0xffff, /* src_mask */
777 0xffff, /* dst_mask */
778 TRUE), /* pcrel_offset */
779
780 /* MOVK: ((S+A-P) >> 0) & 0xffff [no overflow check] */
e30d1fa1 781 HOWTO (AARCH64_R (MOVW_PREL_G0_NC), /* type */
32247401
RL
782 0, /* rightshift */
783 2, /* size (0 = byte, 1 = short, 2 = long) */
784 16, /* bitsize */
785 TRUE, /* pc_relative */
786 0, /* bitpos */
787 complain_overflow_dont, /* complain_on_overflow */
788 bfd_elf_generic_reloc, /* special_function */
789 AARCH64_R_STR (MOVW_PREL_G0_NC), /* name */
790 FALSE, /* partial_inplace */
791 0xffff, /* src_mask */
792 0xffff, /* dst_mask */
793 TRUE), /* pcrel_offset */
794
795 /* MOV[NZ]: ((S+A-P) >> 16) & 0xffff */
e30d1fa1 796 HOWTO (AARCH64_R (MOVW_PREL_G1), /* type */
32247401
RL
797 16, /* rightshift */
798 2, /* size (0 = byte, 1 = short, 2 = long) */
799 17, /* bitsize */
800 TRUE, /* pc_relative */
801 0, /* bitpos */
802 complain_overflow_signed, /* complain_on_overflow */
803 bfd_elf_generic_reloc, /* special_function */
804 AARCH64_R_STR (MOVW_PREL_G1), /* name */
805 FALSE, /* partial_inplace */
806 0xffff, /* src_mask */
807 0xffff, /* dst_mask */
808 TRUE), /* pcrel_offset */
809
810 /* MOVK: ((S+A-P) >> 16) & 0xffff [no overflow check] */
811 HOWTO64 (AARCH64_R (MOVW_PREL_G1_NC), /* type */
812 16, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 16, /* bitsize */
815 TRUE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_dont, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 AARCH64_R_STR (MOVW_PREL_G1_NC), /* name */
820 FALSE, /* partial_inplace */
821 0xffff, /* src_mask */
822 0xffff, /* dst_mask */
823 TRUE), /* pcrel_offset */
824
825 /* MOV[NZ]: ((S+A-P) >> 32) & 0xffff */
826 HOWTO64 (AARCH64_R (MOVW_PREL_G2), /* type */
827 32, /* rightshift */
828 2, /* size (0 = byte, 1 = short, 2 = long) */
829 17, /* bitsize */
830 TRUE, /* pc_relative */
831 0, /* bitpos */
832 complain_overflow_signed, /* complain_on_overflow */
833 bfd_elf_generic_reloc, /* special_function */
834 AARCH64_R_STR (MOVW_PREL_G2), /* name */
835 FALSE, /* partial_inplace */
836 0xffff, /* src_mask */
837 0xffff, /* dst_mask */
838 TRUE), /* pcrel_offset */
839
840 /* MOVK: ((S+A-P) >> 32) & 0xffff [no overflow check] */
841 HOWTO64 (AARCH64_R (MOVW_PREL_G2_NC), /* type */
842 32, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 16, /* bitsize */
845 TRUE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_dont, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 AARCH64_R_STR (MOVW_PREL_G2_NC), /* name */
850 FALSE, /* partial_inplace */
851 0xffff, /* src_mask */
852 0xffff, /* dst_mask */
853 TRUE), /* pcrel_offset */
854
855 /* MOV[NZ]: ((S+A-P) >> 48) & 0xffff */
856 HOWTO64 (AARCH64_R (MOVW_PREL_G3), /* type */
857 48, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 16, /* bitsize */
860 TRUE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont, /* complain_on_overflow */
863 bfd_elf_generic_reloc, /* special_function */
864 AARCH64_R_STR (MOVW_PREL_G3), /* name */
865 FALSE, /* partial_inplace */
866 0xffff, /* src_mask */
867 0xffff, /* dst_mask */
868 TRUE), /* pcrel_offset */
869
a06ea964
NC
870/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
871 addresses: PG(x) is (x & ~0xfff). */
872
f7d2c675
SP
873 /* LD-lit: ((S+A-P) >> 4) & 0x1ffff */
874 HOWTO64 (MORELLO_R (LD_PREL_LO17), /* type */
875 4, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 17, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_signed, /* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 MORELLO_R_STR (LD_PREL_LO17), /* name */
883 FALSE, /* partial_inplace */
884 0x1ffff, /* src_mask */
885 0x1ffff, /* dst_mask */
886 TRUE), /* pcrel_offset */
887
a06ea964 888 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 889 HOWTO (AARCH64_R (LD_PREL_LO19), /* type */
a06ea964
NC
890 2, /* rightshift */
891 2, /* size (0 = byte, 1 = short, 2 = long) */
892 19, /* bitsize */
893 TRUE, /* pc_relative */
894 0, /* bitpos */
895 complain_overflow_signed, /* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 897 AARCH64_R_STR (LD_PREL_LO19), /* name */
a06ea964
NC
898 FALSE, /* partial_inplace */
899 0x7ffff, /* src_mask */
900 0x7ffff, /* dst_mask */
901 TRUE), /* pcrel_offset */
902
92504105
SP
903 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
904 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20), /* type */
905 12, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 20, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_signed, /* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 MORELLO_R_STR (ADR_PREL_PG_HI20), /* name */
913 FALSE, /* partial_inplace */
914 0xfffff, /* src_mask */
915 0xfffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff [no overflow check] */
919 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20_NC), /* type */
920 12, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 20, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont, /* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 MORELLO_R_STR (ADR_PREL_PG_HI20_NC), /* name */
928 FALSE, /* partial_inplace */
929 0xfffff, /* src_mask */
930 0xfffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
a06ea964 933 /* ADR: (S+A-P) & 0x1fffff */
a6bb11b2 934 HOWTO (AARCH64_R (ADR_PREL_LO21), /* type */
a06ea964
NC
935 0, /* rightshift */
936 2, /* size (0 = byte, 1 = short, 2 = long) */
937 21, /* bitsize */
938 TRUE, /* pc_relative */
939 0, /* bitpos */
940 complain_overflow_signed, /* complain_on_overflow */
941 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 942 AARCH64_R_STR (ADR_PREL_LO21), /* name */
a06ea964
NC
943 FALSE, /* partial_inplace */
944 0x1fffff, /* src_mask */
945 0x1fffff, /* dst_mask */
946 TRUE), /* pcrel_offset */
947
948 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
a6bb11b2 949 HOWTO (AARCH64_R (ADR_PREL_PG_HI21), /* type */
a06ea964
NC
950 12, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 21, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_signed, /* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 957 AARCH64_R_STR (ADR_PREL_PG_HI21), /* name */
a06ea964
NC
958 FALSE, /* partial_inplace */
959 0x1fffff, /* src_mask */
960 0x1fffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff [no overflow check] */
a6bb11b2 964 HOWTO64 (AARCH64_R (ADR_PREL_PG_HI21_NC), /* type */
a06ea964
NC
965 12, /* rightshift */
966 2, /* size (0 = byte, 1 = short, 2 = long) */
967 21, /* bitsize */
968 TRUE, /* pc_relative */
969 0, /* bitpos */
970 complain_overflow_dont, /* complain_on_overflow */
971 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 972 AARCH64_R_STR (ADR_PREL_PG_HI21_NC), /* name */
a06ea964
NC
973 FALSE, /* partial_inplace */
974 0x1fffff, /* src_mask */
975 0x1fffff, /* dst_mask */
976 TRUE), /* pcrel_offset */
977
978 /* ADD: (S+A) & 0xfff [no overflow check] */
a6bb11b2 979 HOWTO (AARCH64_R (ADD_ABS_LO12_NC), /* type */
a06ea964
NC
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 12, /* bitsize */
983 FALSE, /* pc_relative */
984 10, /* bitpos */
985 complain_overflow_dont, /* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 987 AARCH64_R_STR (ADD_ABS_LO12_NC), /* name */
a06ea964
NC
988 FALSE, /* partial_inplace */
989 0x3ffc00, /* src_mask */
990 0x3ffc00, /* dst_mask */
991 FALSE), /* pcrel_offset */
992
993 /* LD/ST8: (S+A) & 0xfff */
a6bb11b2 994 HOWTO (AARCH64_R (LDST8_ABS_LO12_NC), /* type */
a06ea964
NC
995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 12, /* bitsize */
998 FALSE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont, /* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1002 AARCH64_R_STR (LDST8_ABS_LO12_NC), /* name */
a06ea964
NC
1003 FALSE, /* partial_inplace */
1004 0xfff, /* src_mask */
1005 0xfff, /* dst_mask */
1006 FALSE), /* pcrel_offset */
1007
1008 /* Relocations for control-flow instructions. */
1009
1010 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
a6bb11b2 1011 HOWTO (AARCH64_R (TSTBR14), /* type */
a06ea964
NC
1012 2, /* rightshift */
1013 2, /* size (0 = byte, 1 = short, 2 = long) */
1014 14, /* bitsize */
1015 TRUE, /* pc_relative */
1016 0, /* bitpos */
1017 complain_overflow_signed, /* complain_on_overflow */
1018 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1019 AARCH64_R_STR (TSTBR14), /* name */
a06ea964
NC
1020 FALSE, /* partial_inplace */
1021 0x3fff, /* src_mask */
1022 0x3fff, /* dst_mask */
1023 TRUE), /* pcrel_offset */
1024
1025 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 1026 HOWTO (AARCH64_R (CONDBR19), /* type */
a06ea964
NC
1027 2, /* rightshift */
1028 2, /* size (0 = byte, 1 = short, 2 = long) */
1029 19, /* bitsize */
1030 TRUE, /* pc_relative */
1031 0, /* bitpos */
1032 complain_overflow_signed, /* complain_on_overflow */
1033 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1034 AARCH64_R_STR (CONDBR19), /* name */
a06ea964
NC
1035 FALSE, /* partial_inplace */
1036 0x7ffff, /* src_mask */
1037 0x7ffff, /* dst_mask */
1038 TRUE), /* pcrel_offset */
1039
a06ea964 1040 /* B: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1041 HOWTO (AARCH64_R (JUMP26), /* type */
a06ea964
NC
1042 2, /* rightshift */
1043 2, /* size (0 = byte, 1 = short, 2 = long) */
1044 26, /* bitsize */
1045 TRUE, /* pc_relative */
1046 0, /* bitpos */
1047 complain_overflow_signed, /* complain_on_overflow */
1048 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1049 AARCH64_R_STR (JUMP26), /* name */
a06ea964
NC
1050 FALSE, /* partial_inplace */
1051 0x3ffffff, /* src_mask */
1052 0x3ffffff, /* dst_mask */
1053 TRUE), /* pcrel_offset */
1054
1055 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1056 HOWTO (AARCH64_R (CALL26), /* type */
a06ea964
NC
1057 2, /* rightshift */
1058 2, /* size (0 = byte, 1 = short, 2 = long) */
1059 26, /* bitsize */
1060 TRUE, /* pc_relative */
1061 0, /* bitpos */
1062 complain_overflow_signed, /* complain_on_overflow */
1063 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1064 AARCH64_R_STR (CALL26), /* name */
a06ea964
NC
1065 FALSE, /* partial_inplace */
1066 0x3ffffff, /* src_mask */
1067 0x3ffffff, /* dst_mask */
1068 TRUE), /* pcrel_offset */
1069
e19e9199
SP
1070 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
1071 HOWTO64 (MORELLO_R (TSTBR14), /* type */
1072 2, /* rightshift */
1073 2, /* size (0 = byte, 1 = short, 2 = long) */
1074 14, /* bitsize */
1075 TRUE, /* pc_relative */
1076 0, /* bitpos */
1077 complain_overflow_signed, /* complain_on_overflow */
1078 bfd_elf_generic_reloc, /* special_function */
1079 MORELLO_R_STR (TSTBR14), /* name */
1080 FALSE, /* partial_inplace */
1081 0x3fff, /* src_mask */
1082 0x3fff, /* dst_mask */
1083 TRUE), /* pcrel_offset */
1084
1085 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
1086 HOWTO64 (MORELLO_R (CONDBR19), /* type */
1087 2, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 19, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_signed, /* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 MORELLO_R_STR (CONDBR19), /* name */
1095 FALSE, /* partial_inplace */
1096 0x7ffff, /* src_mask */
1097 0x7ffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 /* B: ((S+A-P) >> 2) & 0x3ffffff */
1101 HOWTO64 (MORELLO_R (JUMP26), /* type */
1102 2, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 26, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_signed, /* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 MORELLO_R_STR (JUMP26), /* name */
1110 FALSE, /* partial_inplace */
1111 0x3ffffff, /* src_mask */
1112 0x3ffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
1116 HOWTO64 (MORELLO_R (CALL26), /* type */
1117 2, /* rightshift */
1118 2, /* size (0 = byte, 1 = short, 2 = long) */
1119 26, /* bitsize */
1120 TRUE, /* pc_relative */
1121 0, /* bitpos */
1122 complain_overflow_signed, /* complain_on_overflow */
1123 bfd_elf_generic_reloc, /* special_function */
1124 MORELLO_R_STR (CALL26), /* name */
1125 FALSE, /* partial_inplace */
1126 0x3ffffff, /* src_mask */
1127 0x3ffffff, /* dst_mask */
1128 TRUE), /* pcrel_offset */
1129
a06ea964 1130 /* LD/ST16: (S+A) & 0xffe */
a6bb11b2 1131 HOWTO (AARCH64_R (LDST16_ABS_LO12_NC), /* type */
a06ea964
NC
1132 1, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 12, /* bitsize */
1135 FALSE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont, /* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1139 AARCH64_R_STR (LDST16_ABS_LO12_NC), /* name */
a06ea964
NC
1140 FALSE, /* partial_inplace */
1141 0xffe, /* src_mask */
1142 0xffe, /* dst_mask */
1143 FALSE), /* pcrel_offset */
1144
1145 /* LD/ST32: (S+A) & 0xffc */
a6bb11b2 1146 HOWTO (AARCH64_R (LDST32_ABS_LO12_NC), /* type */
a06ea964
NC
1147 2, /* rightshift */
1148 2, /* size (0 = byte, 1 = short, 2 = long) */
1149 12, /* bitsize */
1150 FALSE, /* pc_relative */
1151 0, /* bitpos */
1152 complain_overflow_dont, /* complain_on_overflow */
1153 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1154 AARCH64_R_STR (LDST32_ABS_LO12_NC), /* name */
a06ea964
NC
1155 FALSE, /* partial_inplace */
1156 0xffc, /* src_mask */
1157 0xffc, /* dst_mask */
1158 FALSE), /* pcrel_offset */
1159
1160 /* LD/ST64: (S+A) & 0xff8 */
a6bb11b2 1161 HOWTO (AARCH64_R (LDST64_ABS_LO12_NC), /* type */
a06ea964
NC
1162 3, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 12, /* bitsize */
1165 FALSE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont, /* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1169 AARCH64_R_STR (LDST64_ABS_LO12_NC), /* name */
a06ea964
NC
1170 FALSE, /* partial_inplace */
1171 0xff8, /* src_mask */
1172 0xff8, /* dst_mask */
1173 FALSE), /* pcrel_offset */
1174
a06ea964 1175 /* LD/ST128: (S+A) & 0xff0 */
a6bb11b2 1176 HOWTO (AARCH64_R (LDST128_ABS_LO12_NC), /* type */
a06ea964
NC
1177 4, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 12, /* bitsize */
1180 FALSE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont, /* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1184 AARCH64_R_STR (LDST128_ABS_LO12_NC), /* name */
a06ea964
NC
1185 FALSE, /* partial_inplace */
1186 0xff0, /* src_mask */
1187 0xff0, /* dst_mask */
1188 FALSE), /* pcrel_offset */
1189
f41aef5f
RE
1190 /* Set a load-literal immediate field to bits
1191 0x1FFFFC of G(S)-P */
a6bb11b2 1192 HOWTO (AARCH64_R (GOT_LD_PREL19), /* type */
f41aef5f
RE
1193 2, /* rightshift */
1194 2, /* size (0 = byte,1 = short,2 = long) */
1195 19, /* bitsize */
1196 TRUE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_signed, /* complain_on_overflow */
1199 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1200 AARCH64_R_STR (GOT_LD_PREL19), /* name */
f41aef5f
RE
1201 FALSE, /* partial_inplace */
1202 0xffffe0, /* src_mask */
1203 0xffffe0, /* dst_mask */
1204 TRUE), /* pcrel_offset */
1205
a06ea964
NC
1206 /* Get to the page for the GOT entry for the symbol
1207 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1208 HOWTO (AARCH64_R (ADR_GOT_PAGE), /* type */
a06ea964
NC
1209 12, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 21, /* bitsize */
1212 TRUE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont, /* complain_on_overflow */
1215 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1216 AARCH64_R_STR (ADR_GOT_PAGE), /* name */
a06ea964
NC
1217 FALSE, /* partial_inplace */
1218 0x1fffff, /* src_mask */
1219 0x1fffff, /* dst_mask */
1220 TRUE), /* pcrel_offset */
1221
92504105
SP
1222 /* Get to the page for the GOT entry for the symbol
1223 (G(S) - P) using a C64 ADRP instruction. */
1224 HOWTO64 (MORELLO_R (ADR_GOT_PAGE), /* type */
1225 12, /* rightshift */
1226 2, /* size (0 = byte, 1 = short, 2 = long) */
1227 20, /* bitsize */
1228 TRUE, /* pc_relative */
1229 0, /* bitpos */
1230 complain_overflow_dont, /* complain_on_overflow */
1231 bfd_elf_generic_reloc, /* special_function */
1232 MORELLO_R_STR (ADR_GOT_PAGE), /* name */
1233 FALSE, /* partial_inplace */
1234 0xfffff, /* src_mask */
1235 0xfffff, /* dst_mask */
1236 TRUE), /* pcrel_offset */
1237
a6bb11b2
YZ
1238 /* LD64: GOT offset G(S) & 0xff8 */
1239 HOWTO64 (AARCH64_R (LD64_GOT_LO12_NC), /* type */
a06ea964
NC
1240 3, /* rightshift */
1241 2, /* size (0 = byte, 1 = short, 2 = long) */
1242 12, /* bitsize */
1243 FALSE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont, /* complain_on_overflow */
1246 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1247 AARCH64_R_STR (LD64_GOT_LO12_NC), /* name */
a06ea964
NC
1248 FALSE, /* partial_inplace */
1249 0xff8, /* src_mask */
1250 0xff8, /* dst_mask */
a6bb11b2 1251 FALSE), /* pcrel_offset */
a06ea964 1252
a1bdea65
SP
1253 /* LD128: GOT offset G(S) & 0xff0 */
1254 HOWTO64 (MORELLO_R (LD128_GOT_LO12_NC), /* type */
1255 4, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 12, /* bitsize */
1258 FALSE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont, /* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 MORELLO_R_STR (LD128_GOT_LO12_NC), /* name */
1263 FALSE, /* partial_inplace */
1264 0xff0, /* src_mask */
1265 0xff0, /* dst_mask */
1266 FALSE), /* pcrel_offset */
1267
a6bb11b2
YZ
1268 /* LD32: GOT offset G(S) & 0xffc */
1269 HOWTO32 (AARCH64_R (LD32_GOT_LO12_NC), /* type */
1270 2, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 12, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont, /* complain_on_overflow */
1276 bfd_elf_generic_reloc, /* special_function */
1277 AARCH64_R_STR (LD32_GOT_LO12_NC), /* name */
1278 FALSE, /* partial_inplace */
1279 0xffc, /* src_mask */
1280 0xffc, /* dst_mask */
1281 FALSE), /* pcrel_offset */
a06ea964 1282
ca632371
RL
1283 /* Lower 16 bits of GOT offset for the symbol. */
1284 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G0_NC), /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_dont, /* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 AARCH64_R_STR (MOVW_GOTOFF_G0_NC), /* name */
1293 FALSE, /* partial_inplace */
1294 0xffff, /* src_mask */
1295 0xffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
654248e7
RL
1298 /* Higher 16 bits of GOT offset for the symbol. */
1299 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G1), /* type */
1300 16, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_unsigned, /* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 AARCH64_R_STR (MOVW_GOTOFF_G1), /* name */
1308 FALSE, /* partial_inplace */
1309 0xffff, /* src_mask */
1310 0xffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
87f5fbcc
RL
1313 /* LD64: GOT offset for the symbol. */
1314 HOWTO64 (AARCH64_R (LD64_GOTOFF_LO15), /* type */
1315 3, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 12, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_unsigned, /* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 AARCH64_R_STR (LD64_GOTOFF_LO15), /* name */
1323 FALSE, /* partial_inplace */
1324 0x7ff8, /* src_mask */
1325 0x7ff8, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
3d715ce4
JW
1328 /* LD32: GOT offset to the page address of GOT table.
1329 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x5ffc. */
1330 HOWTO32 (AARCH64_R (LD32_GOTPAGE_LO14), /* type */
1331 2, /* rightshift */
1332 2, /* size (0 = byte, 1 = short, 2 = long) */
1333 12, /* bitsize */
1334 FALSE, /* pc_relative */
1335 0, /* bitpos */
1336 complain_overflow_unsigned, /* complain_on_overflow */
1337 bfd_elf_generic_reloc, /* special_function */
1338 AARCH64_R_STR (LD32_GOTPAGE_LO14), /* name */
1339 FALSE, /* partial_inplace */
1340 0x5ffc, /* src_mask */
1341 0x5ffc, /* dst_mask */
1342 FALSE), /* pcrel_offset */
1343
a921b5bd
JW
1344 /* LD64: GOT offset to the page address of GOT table.
1345 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x7ff8. */
1346 HOWTO64 (AARCH64_R (LD64_GOTPAGE_LO15), /* type */
1347 3, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 12, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_unsigned, /* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 AARCH64_R_STR (LD64_GOTPAGE_LO15), /* name */
1355 FALSE, /* partial_inplace */
1356 0x7ff8, /* src_mask */
1357 0x7ff8, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
a06ea964
NC
1360 /* Get to the page for the GOT entry for the symbol
1361 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1362 HOWTO (AARCH64_R (TLSGD_ADR_PAGE21), /* type */
a06ea964
NC
1363 12, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 21, /* bitsize */
1366 TRUE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont, /* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1370 AARCH64_R_STR (TLSGD_ADR_PAGE21), /* name */
a06ea964
NC
1371 FALSE, /* partial_inplace */
1372 0x1fffff, /* src_mask */
1373 0x1fffff, /* dst_mask */
1374 TRUE), /* pcrel_offset */
1375
3c12b054
MS
1376 HOWTO (AARCH64_R (TLSGD_ADR_PREL21), /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 21, /* bitsize */
1380 TRUE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont, /* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 AARCH64_R_STR (TLSGD_ADR_PREL21), /* name */
1385 FALSE, /* partial_inplace */
1386 0x1fffff, /* src_mask */
1387 0x1fffff, /* dst_mask */
1388 TRUE), /* pcrel_offset */
1389
a06ea964 1390 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
a6bb11b2 1391 HOWTO (AARCH64_R (TLSGD_ADD_LO12_NC), /* type */
a06ea964
NC
1392 0, /* rightshift */
1393 2, /* size (0 = byte, 1 = short, 2 = long) */
1394 12, /* bitsize */
1395 FALSE, /* pc_relative */
1396 0, /* bitpos */
1397 complain_overflow_dont, /* complain_on_overflow */
1398 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1399 AARCH64_R_STR (TLSGD_ADD_LO12_NC), /* name */
a06ea964
NC
1400 FALSE, /* partial_inplace */
1401 0xfff, /* src_mask */
1402 0xfff, /* dst_mask */
1403 FALSE), /* pcrel_offset */
1404
3e8286c0
RL
1405 /* Lower 16 bits of GOT offset to tls_index. */
1406 HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
1407 0, /* rightshift */
1408 2, /* size (0 = byte, 1 = short, 2 = long) */
1409 16, /* bitsize */
1410 FALSE, /* pc_relative */
1411 0, /* bitpos */
1412 complain_overflow_dont, /* complain_on_overflow */
1413 bfd_elf_generic_reloc, /* special_function */
1414 AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
1415 FALSE, /* partial_inplace */
1416 0xffff, /* src_mask */
1417 0xffff, /* dst_mask */
1418 FALSE), /* pcrel_offset */
1419
1aa66fb1
RL
1420 /* Higher 16 bits of GOT offset to tls_index. */
1421 HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
1422 16, /* rightshift */
1423 2, /* size (0 = byte, 1 = short, 2 = long) */
1424 16, /* bitsize */
1425 FALSE, /* pc_relative */
1426 0, /* bitpos */
1427 complain_overflow_unsigned, /* complain_on_overflow */
1428 bfd_elf_generic_reloc, /* special_function */
1429 AARCH64_R_STR (TLSGD_MOVW_G1), /* name */
1430 FALSE, /* partial_inplace */
1431 0xffff, /* src_mask */
1432 0xffff, /* dst_mask */
1433 FALSE), /* pcrel_offset */
1434
a6bb11b2 1435 HOWTO (AARCH64_R (TLSIE_ADR_GOTTPREL_PAGE21), /* type */
a06ea964
NC
1436 12, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
1438 21, /* bitsize */
1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
1441 complain_overflow_dont, /* complain_on_overflow */
1442 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1443 AARCH64_R_STR (TLSIE_ADR_GOTTPREL_PAGE21), /* name */
a06ea964
NC
1444 FALSE, /* partial_inplace */
1445 0x1fffff, /* src_mask */
1446 0x1fffff, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
a6bb11b2 1449 HOWTO64 (AARCH64_R (TLSIE_LD64_GOTTPREL_LO12_NC), /* type */
a06ea964
NC
1450 3, /* rightshift */
1451 2, /* size (0 = byte, 1 = short, 2 = long) */
1452 12, /* bitsize */
1453 FALSE, /* pc_relative */
1454 0, /* bitpos */
1455 complain_overflow_dont, /* complain_on_overflow */
1456 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1457 AARCH64_R_STR (TLSIE_LD64_GOTTPREL_LO12_NC), /* name */
a06ea964
NC
1458 FALSE, /* partial_inplace */
1459 0xff8, /* src_mask */
1460 0xff8, /* dst_mask */
1461 FALSE), /* pcrel_offset */
1462
a6bb11b2
YZ
1463 HOWTO32 (AARCH64_R (TLSIE_LD32_GOTTPREL_LO12_NC), /* type */
1464 2, /* rightshift */
1465 2, /* size (0 = byte, 1 = short, 2 = long) */
1466 12, /* bitsize */
1467 FALSE, /* pc_relative */
1468 0, /* bitpos */
1469 complain_overflow_dont, /* complain_on_overflow */
1470 bfd_elf_generic_reloc, /* special_function */
1471 AARCH64_R_STR (TLSIE_LD32_GOTTPREL_LO12_NC), /* name */
1472 FALSE, /* partial_inplace */
1473 0xffc, /* src_mask */
1474 0xffc, /* dst_mask */
1475 FALSE), /* pcrel_offset */
1476
1477 HOWTO (AARCH64_R (TLSIE_LD_GOTTPREL_PREL19), /* type */
bb3f9ed8 1478 2, /* rightshift */
a06ea964 1479 2, /* size (0 = byte, 1 = short, 2 = long) */
043bf05a 1480 19, /* bitsize */
a06ea964
NC
1481 FALSE, /* pc_relative */
1482 0, /* bitpos */
1483 complain_overflow_dont, /* complain_on_overflow */
1484 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1485 AARCH64_R_STR (TLSIE_LD_GOTTPREL_PREL19), /* name */
a06ea964
NC
1486 FALSE, /* partial_inplace */
1487 0x1ffffc, /* src_mask */
1488 0x1ffffc, /* dst_mask */
1489 FALSE), /* pcrel_offset */
1490
3b957e5b
RL
1491 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G0_NC), /* type */
1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 16, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_dont, /* complain_on_overflow */
1498 bfd_elf_generic_reloc, /* special_function */
1499 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G0_NC), /* name */
1500 FALSE, /* partial_inplace */
1501 0xffff, /* src_mask */
1502 0xffff, /* dst_mask */
1503 FALSE), /* pcrel_offset */
1504
1505 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G1), /* type */
1506 16, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 16, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_unsigned, /* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G1), /* name */
1514 FALSE, /* partial_inplace */
1515 0xffff, /* src_mask */
1516 0xffff, /* dst_mask */
1517 FALSE), /* pcrel_offset */
1518
49df5539
JW
1519 /* ADD: bit[23:12] of byte offset to module TLS base address. */
1520 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12), /* type */
1521 12, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 12, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_unsigned, /* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12), /* name */
1529 FALSE, /* partial_inplace */
1530 0xfff, /* src_mask */
1531 0xfff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533
70151fb5
JW
1534 /* Unsigned 12 bit byte offset to module TLS base address. */
1535 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 12, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_unsigned, /* complain_on_overflow */
1542 bfd_elf_generic_reloc, /* special_function */
1543 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */
1544 FALSE, /* partial_inplace */
1545 0xfff, /* src_mask */
1546 0xfff, /* dst_mask */
1547 FALSE), /* pcrel_offset */
13289c10
JW
1548
1549 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
1550 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC), /* type */
1551 0, /* rightshift */
1552 2, /* size (0 = byte, 1 = short, 2 = long) */
1553 12, /* bitsize */
1554 FALSE, /* pc_relative */
1555 0, /* bitpos */
1556 complain_overflow_dont, /* complain_on_overflow */
1557 bfd_elf_generic_reloc, /* special_function */
1558 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC), /* name */
1559 FALSE, /* partial_inplace */
1560 0xfff, /* src_mask */
1561 0xfff, /* dst_mask */
1562 FALSE), /* pcrel_offset */
70151fb5 1563
a12fad50
JW
1564 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
1565 HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
1566 0, /* rightshift */
1567 2, /* size (0 = byte, 1 = short, 2 = long) */
1568 12, /* bitsize */
1569 FALSE, /* pc_relative */
1570 0, /* bitpos */
1571 complain_overflow_dont, /* complain_on_overflow */
1572 bfd_elf_generic_reloc, /* special_function */
1573 AARCH64_R_STR (TLSLD_ADD_LO12_NC), /* name */
1574 FALSE, /* partial_inplace */
1575 0xfff, /* src_mask */
1576 0xfff, /* dst_mask */
1577 FALSE), /* pcrel_offset */
1578
1107e076
JW
1579 /* Get to the page for the GOT entry for the symbol
1580 (G(S) - P) using an ADRP instruction. */
1581 HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */
1582 12, /* rightshift */
1583 2, /* size (0 = byte, 1 = short, 2 = long) */
1584 21, /* bitsize */
1585 TRUE, /* pc_relative */
1586 0, /* bitpos */
1587 complain_overflow_signed, /* complain_on_overflow */
1588 bfd_elf_generic_reloc, /* special_function */
1589 AARCH64_R_STR (TLSLD_ADR_PAGE21), /* name */
1590 FALSE, /* partial_inplace */
1591 0x1fffff, /* src_mask */
1592 0x1fffff, /* dst_mask */
1593 TRUE), /* pcrel_offset */
1594
6c37fedc
JW
1595 HOWTO (AARCH64_R (TLSLD_ADR_PREL21), /* type */
1596 0, /* rightshift */
1597 2, /* size (0 = byte, 1 = short, 2 = long) */
1598 21, /* bitsize */
1599 TRUE, /* pc_relative */
1600 0, /* bitpos */
1601 complain_overflow_signed, /* complain_on_overflow */
1602 bfd_elf_generic_reloc, /* special_function */
1603 AARCH64_R_STR (TLSLD_ADR_PREL21), /* name */
1604 FALSE, /* partial_inplace */
1605 0x1fffff, /* src_mask */
1606 0x1fffff, /* dst_mask */
1607 TRUE), /* pcrel_offset */
1608
4c562523
JW
1609 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1610 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12), /* type */
1611 1, /* rightshift */
1612 2, /* size (0 = byte, 1 = short, 2 = long) */
1613 11, /* bitsize */
1614 FALSE, /* pc_relative */
1615 10, /* bitpos */
1616 complain_overflow_unsigned, /* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12), /* name */
1619 FALSE, /* partial_inplace */
1620 0x1ffc00, /* src_mask */
1621 0x1ffc00, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623
1624 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check. */
1625 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC), /* type */
1626 1, /* rightshift */
1627 2, /* size (0 = byte, 1 = short, 2 = long) */
1628 11, /* bitsize */
1629 FALSE, /* pc_relative */
1630 10, /* bitpos */
1631 complain_overflow_dont, /* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC), /* name */
1634 FALSE, /* partial_inplace */
1635 0x1ffc00, /* src_mask */
1636 0x1ffc00, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1640 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12), /* type */
1641 2, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 10, /* bitsize */
1644 FALSE, /* pc_relative */
1645 10, /* bitpos */
1646 complain_overflow_unsigned, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12), /* name */
1649 FALSE, /* partial_inplace */
1650 0x3ffc00, /* src_mask */
1651 0x3ffc00, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check. */
1655 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC), /* type */
1656 2, /* rightshift */
1657 2, /* size (0 = byte, 1 = short, 2 = long) */
1658 10, /* bitsize */
1659 FALSE, /* pc_relative */
1660 10, /* bitpos */
1661 complain_overflow_dont, /* complain_on_overflow */
1662 bfd_elf_generic_reloc, /* special_function */
1663 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC), /* name */
1664 FALSE, /* partial_inplace */
1665 0xffc00, /* src_mask */
1666 0xffc00, /* dst_mask */
1667 FALSE), /* pcrel_offset */
1668
1669 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1670 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12), /* type */
1671 3, /* rightshift */
1672 2, /* size (0 = byte, 1 = short, 2 = long) */
1673 9, /* bitsize */
1674 FALSE, /* pc_relative */
1675 10, /* bitpos */
1676 complain_overflow_unsigned, /* complain_on_overflow */
1677 bfd_elf_generic_reloc, /* special_function */
1678 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12), /* name */
1679 FALSE, /* partial_inplace */
1680 0x3ffc00, /* src_mask */
1681 0x3ffc00, /* dst_mask */
1682 FALSE), /* pcrel_offset */
1683
1684 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check. */
1685 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC), /* type */
1686 3, /* rightshift */
1687 2, /* size (0 = byte, 1 = short, 2 = long) */
1688 9, /* bitsize */
1689 FALSE, /* pc_relative */
1690 10, /* bitpos */
1691 complain_overflow_dont, /* complain_on_overflow */
1692 bfd_elf_generic_reloc, /* special_function */
1693 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC), /* name */
1694 FALSE, /* partial_inplace */
1695 0x7fc00, /* src_mask */
1696 0x7fc00, /* dst_mask */
1697 FALSE), /* pcrel_offset */
1698
1699 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
1700 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12), /* type */
1701 0, /* rightshift */
1702 2, /* size (0 = byte, 1 = short, 2 = long) */
1703 12, /* bitsize */
1704 FALSE, /* pc_relative */
1705 10, /* bitpos */
1706 complain_overflow_unsigned, /* complain_on_overflow */
1707 bfd_elf_generic_reloc, /* special_function */
1708 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12), /* name */
1709 FALSE, /* partial_inplace */
1710 0x3ffc00, /* src_mask */
1711 0x3ffc00, /* dst_mask */
1712 FALSE), /* pcrel_offset */
1713
1714 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check. */
1715 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC), /* type */
1716 0, /* rightshift */
1717 2, /* size (0 = byte, 1 = short, 2 = long) */
1718 12, /* bitsize */
1719 FALSE, /* pc_relative */
1720 10, /* bitpos */
1721 complain_overflow_dont, /* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC), /* name */
1724 FALSE, /* partial_inplace */
1725 0x3ffc00, /* src_mask */
1726 0x3ffc00, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
49df5539
JW
1729 /* MOVZ: bit[15:0] of byte offset to module TLS base address. */
1730 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0), /* type */
1731 0, /* rightshift */
1732 2, /* size (0 = byte, 1 = short, 2 = long) */
1733 16, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_unsigned, /* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0), /* name */
1739 FALSE, /* partial_inplace */
1740 0xffff, /* src_mask */
1741 0xffff, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0. */
1745 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC), /* type */
1746 0, /* rightshift */
1747 2, /* size (0 = byte, 1 = short, 2 = long) */
1748 16, /* bitsize */
1749 FALSE, /* pc_relative */
1750 0, /* bitpos */
1751 complain_overflow_dont, /* complain_on_overflow */
1752 bfd_elf_generic_reloc, /* special_function */
1753 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC), /* name */
1754 FALSE, /* partial_inplace */
1755 0xffff, /* src_mask */
1756 0xffff, /* dst_mask */
1757 FALSE), /* pcrel_offset */
1758
1759 /* MOVZ: bit[31:16] of byte offset to module TLS base address. */
1760 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1), /* type */
1761 16, /* rightshift */
1762 2, /* size (0 = byte, 1 = short, 2 = long) */
1763 16, /* bitsize */
1764 FALSE, /* pc_relative */
1765 0, /* bitpos */
1766 complain_overflow_unsigned, /* complain_on_overflow */
1767 bfd_elf_generic_reloc, /* special_function */
1768 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1), /* name */
1769 FALSE, /* partial_inplace */
1770 0xffff, /* src_mask */
1771 0xffff, /* dst_mask */
1772 FALSE), /* pcrel_offset */
1773
1774 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1. */
1775 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC), /* type */
1776 16, /* rightshift */
1777 2, /* size (0 = byte, 1 = short, 2 = long) */
1778 16, /* bitsize */
1779 FALSE, /* pc_relative */
1780 0, /* bitpos */
1781 complain_overflow_dont, /* complain_on_overflow */
1782 bfd_elf_generic_reloc, /* special_function */
1783 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC), /* name */
1784 FALSE, /* partial_inplace */
1785 0xffff, /* src_mask */
1786 0xffff, /* dst_mask */
1787 FALSE), /* pcrel_offset */
1788
1789 /* MOVZ: bit[47:32] of byte offset to module TLS base address. */
1790 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2), /* type */
1791 32, /* rightshift */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1793 16, /* bitsize */
1794 FALSE, /* pc_relative */
1795 0, /* bitpos */
1796 complain_overflow_unsigned, /* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2), /* name */
1799 FALSE, /* partial_inplace */
1800 0xffff, /* src_mask */
1801 0xffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803
a6bb11b2 1804 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2), /* type */
bb3f9ed8 1805 32, /* rightshift */
a06ea964 1806 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1807 16, /* bitsize */
a06ea964
NC
1808 FALSE, /* pc_relative */
1809 0, /* bitpos */
0172429c 1810 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1811 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1812 AARCH64_R_STR (TLSLE_MOVW_TPREL_G2), /* name */
a06ea964
NC
1813 FALSE, /* partial_inplace */
1814 0xffff, /* src_mask */
1815 0xffff, /* dst_mask */
1816 FALSE), /* pcrel_offset */
1817
a6bb11b2 1818 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G1), /* type */
bb3f9ed8 1819 16, /* rightshift */
a06ea964 1820 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1821 16, /* bitsize */
a06ea964
NC
1822 FALSE, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_dont, /* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1826 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1), /* name */
a06ea964
NC
1827 FALSE, /* partial_inplace */
1828 0xffff, /* src_mask */
1829 0xffff, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831
a6bb11b2 1832 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G1_NC), /* type */
bb3f9ed8 1833 16, /* rightshift */
a06ea964 1834 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1835 16, /* bitsize */
a06ea964
NC
1836 FALSE, /* pc_relative */
1837 0, /* bitpos */
1838 complain_overflow_dont, /* complain_on_overflow */
1839 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1840 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1_NC), /* name */
a06ea964
NC
1841 FALSE, /* partial_inplace */
1842 0xffff, /* src_mask */
1843 0xffff, /* dst_mask */
1844 FALSE), /* pcrel_offset */
1845
a6bb11b2 1846 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0), /* type */
a06ea964
NC
1847 0, /* rightshift */
1848 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1849 16, /* bitsize */
a06ea964
NC
1850 FALSE, /* pc_relative */
1851 0, /* bitpos */
1852 complain_overflow_dont, /* complain_on_overflow */
1853 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1854 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0), /* name */
a06ea964
NC
1855 FALSE, /* partial_inplace */
1856 0xffff, /* src_mask */
1857 0xffff, /* dst_mask */
1858 FALSE), /* pcrel_offset */
1859
a6bb11b2 1860 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0_NC), /* type */
a06ea964
NC
1861 0, /* rightshift */
1862 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1863 16, /* bitsize */
a06ea964
NC
1864 FALSE, /* pc_relative */
1865 0, /* bitpos */
1866 complain_overflow_dont, /* complain_on_overflow */
1867 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1868 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0_NC), /* name */
a06ea964
NC
1869 FALSE, /* partial_inplace */
1870 0xffff, /* src_mask */
1871 0xffff, /* dst_mask */
1872 FALSE), /* pcrel_offset */
1873
a6bb11b2 1874 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_HI12), /* type */
bb3f9ed8 1875 12, /* rightshift */
a06ea964
NC
1876 2, /* size (0 = byte, 1 = short, 2 = long) */
1877 12, /* bitsize */
1878 FALSE, /* pc_relative */
1879 0, /* bitpos */
bab91cce 1880 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1881 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1882 AARCH64_R_STR (TLSLE_ADD_TPREL_HI12), /* name */
a06ea964
NC
1883 FALSE, /* partial_inplace */
1884 0xfff, /* src_mask */
1885 0xfff, /* dst_mask */
1886 FALSE), /* pcrel_offset */
1887
a6bb11b2 1888 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12), /* type */
a06ea964
NC
1889 0, /* rightshift */
1890 2, /* size (0 = byte, 1 = short, 2 = long) */
1891 12, /* bitsize */
1892 FALSE, /* pc_relative */
1893 0, /* bitpos */
36e6c140 1894 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1895 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1896 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12), /* name */
a06ea964
NC
1897 FALSE, /* partial_inplace */
1898 0xfff, /* src_mask */
1899 0xfff, /* dst_mask */
1900 FALSE), /* pcrel_offset */
1901
a6bb11b2 1902 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12_NC), /* type */
a06ea964
NC
1903 0, /* rightshift */
1904 2, /* size (0 = byte, 1 = short, 2 = long) */
1905 12, /* bitsize */
1906 FALSE, /* pc_relative */
1907 0, /* bitpos */
1908 complain_overflow_dont, /* complain_on_overflow */
1909 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1910 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12_NC), /* name */
a06ea964
NC
1911 FALSE, /* partial_inplace */
1912 0xfff, /* src_mask */
1913 0xfff, /* dst_mask */
1914 FALSE), /* pcrel_offset */
a06ea964 1915
84f1b9fb
RL
1916 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1917 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12), /* type */
1918 1, /* rightshift */
1919 2, /* size (0 = byte, 1 = short, 2 = long) */
1920 11, /* bitsize */
1921 FALSE, /* pc_relative */
1922 10, /* bitpos */
1923 complain_overflow_unsigned, /* complain_on_overflow */
1924 bfd_elf_generic_reloc, /* special_function */
1925 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12), /* name */
1926 FALSE, /* partial_inplace */
1927 0x1ffc00, /* src_mask */
1928 0x1ffc00, /* dst_mask */
1929 FALSE), /* pcrel_offset */
1930
1931 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check. */
1932 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12_NC), /* type */
1933 1, /* rightshift */
1934 2, /* size (0 = byte, 1 = short, 2 = long) */
1935 11, /* bitsize */
1936 FALSE, /* pc_relative */
1937 10, /* bitpos */
1938 complain_overflow_dont, /* complain_on_overflow */
1939 bfd_elf_generic_reloc, /* special_function */
1940 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12_NC), /* name */
1941 FALSE, /* partial_inplace */
1942 0x1ffc00, /* src_mask */
1943 0x1ffc00, /* dst_mask */
1944 FALSE), /* pcrel_offset */
1945
1946 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1947 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12), /* type */
1948 2, /* rightshift */
1949 2, /* size (0 = byte, 1 = short, 2 = long) */
1950 10, /* bitsize */
1951 FALSE, /* pc_relative */
1952 10, /* bitpos */
1953 complain_overflow_unsigned, /* complain_on_overflow */
1954 bfd_elf_generic_reloc, /* special_function */
1955 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12), /* name */
1956 FALSE, /* partial_inplace */
1957 0xffc00, /* src_mask */
1958 0xffc00, /* dst_mask */
1959 FALSE), /* pcrel_offset */
1960
1961 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check. */
1962 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12_NC), /* type */
1963 2, /* rightshift */
1964 2, /* size (0 = byte, 1 = short, 2 = long) */
1965 10, /* bitsize */
1966 FALSE, /* pc_relative */
1967 10, /* bitpos */
1968 complain_overflow_dont, /* complain_on_overflow */
1969 bfd_elf_generic_reloc, /* special_function */
1970 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12_NC), /* name */
1971 FALSE, /* partial_inplace */
1972 0xffc00, /* src_mask */
1973 0xffc00, /* dst_mask */
1974 FALSE), /* pcrel_offset */
1975
1976 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1977 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12), /* type */
1978 3, /* rightshift */
1979 2, /* size (0 = byte, 1 = short, 2 = long) */
1980 9, /* bitsize */
1981 FALSE, /* pc_relative */
1982 10, /* bitpos */
1983 complain_overflow_unsigned, /* complain_on_overflow */
1984 bfd_elf_generic_reloc, /* special_function */
1985 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12), /* name */
1986 FALSE, /* partial_inplace */
1987 0x7fc00, /* src_mask */
1988 0x7fc00, /* dst_mask */
1989 FALSE), /* pcrel_offset */
1990
1991 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check. */
1992 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12_NC), /* type */
1993 3, /* rightshift */
1994 2, /* size (0 = byte, 1 = short, 2 = long) */
1995 9, /* bitsize */
1996 FALSE, /* pc_relative */
1997 10, /* bitpos */
1998 complain_overflow_dont, /* complain_on_overflow */
1999 bfd_elf_generic_reloc, /* special_function */
2000 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12_NC), /* name */
2001 FALSE, /* partial_inplace */
2002 0x7fc00, /* src_mask */
2003 0x7fc00, /* dst_mask */
2004 FALSE), /* pcrel_offset */
2005
2006 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
2007 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12), /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 12, /* bitsize */
2011 FALSE, /* pc_relative */
2012 10, /* bitpos */
2013 complain_overflow_unsigned, /* complain_on_overflow */
2014 bfd_elf_generic_reloc, /* special_function */
2015 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12), /* name */
2016 FALSE, /* partial_inplace */
2017 0x3ffc00, /* src_mask */
2018 0x3ffc00, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020
2021 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check. */
2022 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12_NC), /* type */
2023 0, /* rightshift */
2024 2, /* size (0 = byte, 1 = short, 2 = long) */
2025 12, /* bitsize */
2026 FALSE, /* pc_relative */
2027 10, /* bitpos */
2028 complain_overflow_dont, /* complain_on_overflow */
2029 bfd_elf_generic_reloc, /* special_function */
2030 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12_NC), /* name */
2031 FALSE, /* partial_inplace */
2032 0x3ffc00, /* src_mask */
2033 0x3ffc00, /* dst_mask */
2034 FALSE), /* pcrel_offset */
2035
a6bb11b2 2036 HOWTO (AARCH64_R (TLSDESC_LD_PREL19), /* type */
bb3f9ed8 2037 2, /* rightshift */
a06ea964 2038 2, /* size (0 = byte, 1 = short, 2 = long) */
1ada945d 2039 19, /* bitsize */
a06ea964
NC
2040 TRUE, /* pc_relative */
2041 0, /* bitpos */
2042 complain_overflow_dont, /* complain_on_overflow */
2043 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2044 AARCH64_R_STR (TLSDESC_LD_PREL19), /* name */
a06ea964 2045 FALSE, /* partial_inplace */
1ada945d
MS
2046 0x0ffffe0, /* src_mask */
2047 0x0ffffe0, /* dst_mask */
a06ea964
NC
2048 TRUE), /* pcrel_offset */
2049
a6bb11b2 2050 HOWTO (AARCH64_R (TLSDESC_ADR_PREL21), /* type */
a06ea964
NC
2051 0, /* rightshift */
2052 2, /* size (0 = byte, 1 = short, 2 = long) */
2053 21, /* bitsize */
2054 TRUE, /* pc_relative */
2055 0, /* bitpos */
2056 complain_overflow_dont, /* complain_on_overflow */
2057 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2058 AARCH64_R_STR (TLSDESC_ADR_PREL21), /* name */
a06ea964
NC
2059 FALSE, /* partial_inplace */
2060 0x1fffff, /* src_mask */
2061 0x1fffff, /* dst_mask */
2062 TRUE), /* pcrel_offset */
2063
2064 /* Get to the page for the GOT entry for the symbol
2065 (G(S) - P) using an ADRP instruction. */
a6bb11b2 2066 HOWTO (AARCH64_R (TLSDESC_ADR_PAGE21), /* type */
a06ea964
NC
2067 12, /* rightshift */
2068 2, /* size (0 = byte, 1 = short, 2 = long) */
2069 21, /* bitsize */
2070 TRUE, /* pc_relative */
2071 0, /* bitpos */
2072 complain_overflow_dont, /* complain_on_overflow */
2073 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2074 AARCH64_R_STR (TLSDESC_ADR_PAGE21), /* name */
a06ea964
NC
2075 FALSE, /* partial_inplace */
2076 0x1fffff, /* src_mask */
2077 0x1fffff, /* dst_mask */
2078 TRUE), /* pcrel_offset */
2079
a6bb11b2 2080 /* LD64: GOT offset G(S) & 0xff8. */
f955cccf 2081 HOWTO64 (AARCH64_R (TLSDESC_LD64_LO12), /* type */
a06ea964
NC
2082 3, /* rightshift */
2083 2, /* size (0 = byte, 1 = short, 2 = long) */
2084 12, /* bitsize */
2085 FALSE, /* pc_relative */
2086 0, /* bitpos */
2087 complain_overflow_dont, /* complain_on_overflow */
2088 bfd_elf_generic_reloc, /* special_function */
f955cccf 2089 AARCH64_R_STR (TLSDESC_LD64_LO12), /* name */
a06ea964 2090 FALSE, /* partial_inplace */
a6bb11b2
YZ
2091 0xff8, /* src_mask */
2092 0xff8, /* dst_mask */
2093 FALSE), /* pcrel_offset */
2094
2095 /* LD32: GOT offset G(S) & 0xffc. */
2096 HOWTO32 (AARCH64_R (TLSDESC_LD32_LO12_NC), /* type */
2097 2, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 12, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont, /* complain_on_overflow */
2103 bfd_elf_generic_reloc, /* special_function */
2104 AARCH64_R_STR (TLSDESC_LD32_LO12_NC), /* name */
2105 FALSE, /* partial_inplace */
2106 0xffc, /* src_mask */
2107 0xffc, /* dst_mask */
a06ea964
NC
2108 FALSE), /* pcrel_offset */
2109
2110 /* ADD: GOT offset G(S) & 0xfff. */
f955cccf 2111 HOWTO (AARCH64_R (TLSDESC_ADD_LO12), /* type */
a06ea964
NC
2112 0, /* rightshift */
2113 2, /* size (0 = byte, 1 = short, 2 = long) */
2114 12, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
f955cccf 2117 complain_overflow_dont,/* complain_on_overflow */
a06ea964 2118 bfd_elf_generic_reloc, /* special_function */
f955cccf 2119 AARCH64_R_STR (TLSDESC_ADD_LO12), /* name */
a06ea964
NC
2120 FALSE, /* partial_inplace */
2121 0xfff, /* src_mask */
2122 0xfff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124
a6bb11b2 2125 HOWTO64 (AARCH64_R (TLSDESC_OFF_G1), /* type */
bb3f9ed8 2126 16, /* rightshift */
a06ea964
NC
2127 2, /* size (0 = byte, 1 = short, 2 = long) */
2128 12, /* bitsize */
2129 FALSE, /* pc_relative */
2130 0, /* bitpos */
43a357f9 2131 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 2132 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2133 AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
a06ea964
NC
2134 FALSE, /* partial_inplace */
2135 0xffff, /* src_mask */
2136 0xffff, /* dst_mask */
2137 FALSE), /* pcrel_offset */
2138
a6bb11b2 2139 HOWTO64 (AARCH64_R (TLSDESC_OFF_G0_NC), /* type */
a06ea964
NC
2140 0, /* rightshift */
2141 2, /* size (0 = byte, 1 = short, 2 = long) */
2142 12, /* bitsize */
2143 FALSE, /* pc_relative */
2144 0, /* bitpos */
2145 complain_overflow_dont, /* complain_on_overflow */
2146 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2147 AARCH64_R_STR (TLSDESC_OFF_G0_NC), /* name */
a06ea964
NC
2148 FALSE, /* partial_inplace */
2149 0xffff, /* src_mask */
2150 0xffff, /* dst_mask */
2151 FALSE), /* pcrel_offset */
2152
a6bb11b2 2153 HOWTO64 (AARCH64_R (TLSDESC_LDR), /* type */
a06ea964
NC
2154 0, /* rightshift */
2155 2, /* size (0 = byte, 1 = short, 2 = long) */
2156 12, /* bitsize */
2157 FALSE, /* pc_relative */
2158 0, /* bitpos */
2159 complain_overflow_dont, /* complain_on_overflow */
2160 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2161 AARCH64_R_STR (TLSDESC_LDR), /* name */
a06ea964
NC
2162 FALSE, /* partial_inplace */
2163 0x0, /* src_mask */
2164 0x0, /* dst_mask */
2165 FALSE), /* pcrel_offset */
2166
a6bb11b2 2167 HOWTO64 (AARCH64_R (TLSDESC_ADD), /* type */
a06ea964
NC
2168 0, /* rightshift */
2169 2, /* size (0 = byte, 1 = short, 2 = long) */
2170 12, /* bitsize */
2171 FALSE, /* pc_relative */
2172 0, /* bitpos */
2173 complain_overflow_dont, /* complain_on_overflow */
2174 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2175 AARCH64_R_STR (TLSDESC_ADD), /* name */
a06ea964
NC
2176 FALSE, /* partial_inplace */
2177 0x0, /* src_mask */
2178 0x0, /* dst_mask */
2179 FALSE), /* pcrel_offset */
2180
a6bb11b2 2181 HOWTO (AARCH64_R (TLSDESC_CALL), /* type */
a06ea964
NC
2182 0, /* rightshift */
2183 2, /* size (0 = byte, 1 = short, 2 = long) */
7366006f 2184 0, /* bitsize */
a06ea964
NC
2185 FALSE, /* pc_relative */
2186 0, /* bitpos */
2187 complain_overflow_dont, /* complain_on_overflow */
2188 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2189 AARCH64_R_STR (TLSDESC_CALL), /* name */
a06ea964
NC
2190 FALSE, /* partial_inplace */
2191 0x0, /* src_mask */
2192 0x0, /* dst_mask */
2193 FALSE), /* pcrel_offset */
a6bb11b2 2194
4ca9b406
SP
2195 /* Get to the page for the GOT entry for the symbol
2196 (G(S) - P) using an ADRP instruction. */
2197 HOWTO64 (MORELLO_R (TLSDESC_ADR_PAGE20), /* type */
2198 12, /* rightshift */
2199 2, /* size (0 = byte, 1 = short, 2 = long) */
2200 20, /* bitsize */
2201 TRUE, /* pc_relative */
2202 0, /* bitpos */
2203 complain_overflow_dont, /* complain_on_overflow */
2204 bfd_elf_generic_reloc, /* special_function */
2205 MORELLO_R_STR (TLSDESC_ADR_PAGE20), /* name */
2206 FALSE, /* partial_inplace */
2207 0xfffff, /* src_mask */
2208 0xfffff, /* dst_mask */
2209 TRUE), /* pcrel_offset */
2210
2211 /* LD128: GOT offset G(S) & 0xff0. */
2212 HOWTO64 (MORELLO_R (TLSDESC_LD128_LO12), /* type */
2213 4, /* rightshift */
2214 2, /* size (0 = byte, 1 = short, 2 = long) */
2215 12, /* bitsize */
2216 FALSE, /* pc_relative */
2217 0, /* bitpos */
2218 complain_overflow_dont, /* complain_on_overflow */
2219 bfd_elf_generic_reloc, /* special_function */
2220 MORELLO_R_STR (TLSDESC_LD128_LO12), /* name */
2221 FALSE, /* partial_inplace */
2222 0xff0, /* src_mask */
2223 0xff0, /* dst_mask */
2224 FALSE), /* pcrel_offset */
2225
2226 HOWTO64 (MORELLO_R (TLSDESC_CALL), /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 0, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont, /* complain_on_overflow */
2233 bfd_elf_generic_reloc, /* special_function */
2234 MORELLO_R_STR (TLSDESC_CALL), /* name */
2235 FALSE, /* partial_inplace */
2236 0x0, /* src_mask */
2237 0x0, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239
a6bb11b2
YZ
2240 HOWTO (AARCH64_R (COPY), /* type */
2241 0, /* rightshift */
2242 2, /* size (0 = byte, 1 = short, 2 = long) */
2243 64, /* bitsize */
2244 FALSE, /* pc_relative */
2245 0, /* bitpos */
2246 complain_overflow_bitfield, /* complain_on_overflow */
2247 bfd_elf_generic_reloc, /* special_function */
2248 AARCH64_R_STR (COPY), /* name */
2249 TRUE, /* partial_inplace */
2250 0xffffffff, /* src_mask */
2251 0xffffffff, /* dst_mask */
2252 FALSE), /* pcrel_offset */
2253
2254 HOWTO (AARCH64_R (GLOB_DAT), /* type */
2255 0, /* rightshift */
2256 2, /* size (0 = byte, 1 = short, 2 = long) */
2257 64, /* bitsize */
2258 FALSE, /* pc_relative */
2259 0, /* bitpos */
2260 complain_overflow_bitfield, /* complain_on_overflow */
2261 bfd_elf_generic_reloc, /* special_function */
2262 AARCH64_R_STR (GLOB_DAT), /* name */
2263 TRUE, /* partial_inplace */
2264 0xffffffff, /* src_mask */
2265 0xffffffff, /* dst_mask */
2266 FALSE), /* pcrel_offset */
2267
2268 HOWTO (AARCH64_R (JUMP_SLOT), /* type */
2269 0, /* rightshift */
2270 2, /* size (0 = byte, 1 = short, 2 = long) */
2271 64, /* bitsize */
2272 FALSE, /* pc_relative */
2273 0, /* bitpos */
2274 complain_overflow_bitfield, /* complain_on_overflow */
2275 bfd_elf_generic_reloc, /* special_function */
2276 AARCH64_R_STR (JUMP_SLOT), /* name */
2277 TRUE, /* partial_inplace */
2278 0xffffffff, /* src_mask */
2279 0xffffffff, /* dst_mask */
2280 FALSE), /* pcrel_offset */
2281
2282 HOWTO (AARCH64_R (RELATIVE), /* type */
2283 0, /* rightshift */
2284 2, /* size (0 = byte, 1 = short, 2 = long) */
2285 64, /* bitsize */
2286 FALSE, /* pc_relative */
2287 0, /* bitpos */
2288 complain_overflow_bitfield, /* complain_on_overflow */
2289 bfd_elf_generic_reloc, /* special_function */
2290 AARCH64_R_STR (RELATIVE), /* name */
2291 TRUE, /* partial_inplace */
2292 ALL_ONES, /* src_mask */
2293 ALL_ONES, /* dst_mask */
2294 FALSE), /* pcrel_offset */
2295
2296 HOWTO (AARCH64_R (TLS_DTPMOD), /* type */
2297 0, /* rightshift */
2298 2, /* size (0 = byte, 1 = short, 2 = long) */
2299 64, /* bitsize */
2300 FALSE, /* pc_relative */
2301 0, /* bitpos */
2302 complain_overflow_dont, /* complain_on_overflow */
2303 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ
2304#if ARCH_SIZE == 64
2305 AARCH64_R_STR (TLS_DTPMOD64), /* name */
2306#else
a6bb11b2 2307 AARCH64_R_STR (TLS_DTPMOD), /* name */
da0781dc 2308#endif
a6bb11b2
YZ
2309 FALSE, /* partial_inplace */
2310 0, /* src_mask */
2311 ALL_ONES, /* dst_mask */
2312 FALSE), /* pc_reloffset */
2313
2314 HOWTO (AARCH64_R (TLS_DTPREL), /* type */
2315 0, /* rightshift */
2316 2, /* size (0 = byte, 1 = short, 2 = long) */
2317 64, /* bitsize */
2318 FALSE, /* pc_relative */
2319 0, /* bitpos */
2320 complain_overflow_dont, /* complain_on_overflow */
2321 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ
2322#if ARCH_SIZE == 64
2323 AARCH64_R_STR (TLS_DTPREL64), /* name */
2324#else
a6bb11b2 2325 AARCH64_R_STR (TLS_DTPREL), /* name */
da0781dc 2326#endif
a6bb11b2
YZ
2327 FALSE, /* partial_inplace */
2328 0, /* src_mask */
2329 ALL_ONES, /* dst_mask */
2330 FALSE), /* pcrel_offset */
2331
2332 HOWTO (AARCH64_R (TLS_TPREL), /* type */
2333 0, /* rightshift */
2334 2, /* size (0 = byte, 1 = short, 2 = long) */
2335 64, /* bitsize */
2336 FALSE, /* pc_relative */
2337 0, /* bitpos */
2338 complain_overflow_dont, /* complain_on_overflow */
2339 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ
2340#if ARCH_SIZE == 64
2341 AARCH64_R_STR (TLS_TPREL64), /* name */
2342#else
a6bb11b2 2343 AARCH64_R_STR (TLS_TPREL), /* name */
da0781dc 2344#endif
a6bb11b2
YZ
2345 FALSE, /* partial_inplace */
2346 0, /* src_mask */
2347 ALL_ONES, /* dst_mask */
2348 FALSE), /* pcrel_offset */
2349
2350 HOWTO (AARCH64_R (TLSDESC), /* type */
2351 0, /* rightshift */
2352 2, /* size (0 = byte, 1 = short, 2 = long) */
2353 64, /* bitsize */
2354 FALSE, /* pc_relative */
2355 0, /* bitpos */
2356 complain_overflow_dont, /* complain_on_overflow */
2357 bfd_elf_generic_reloc, /* special_function */
2358 AARCH64_R_STR (TLSDESC), /* name */
2359 FALSE, /* partial_inplace */
2360 0, /* src_mask */
2361 ALL_ONES, /* dst_mask */
2362 FALSE), /* pcrel_offset */
2363
2364 HOWTO (AARCH64_R (IRELATIVE), /* type */
2365 0, /* rightshift */
2366 2, /* size (0 = byte, 1 = short, 2 = long) */
2367 64, /* bitsize */
2368 FALSE, /* pc_relative */
2369 0, /* bitpos */
2370 complain_overflow_bitfield, /* complain_on_overflow */
2371 bfd_elf_generic_reloc, /* special_function */
2372 AARCH64_R_STR (IRELATIVE), /* name */
2373 FALSE, /* partial_inplace */
2374 0, /* src_mask */
2375 ALL_ONES, /* dst_mask */
2376 FALSE), /* pcrel_offset */
2377
40bbb79e
SP
2378 HOWTO64 (MORELLO_R (CAPINIT), /* type */
2379 0, /* rightshift */
2380 4, /* size (0 = byte, 1 = short, 2 = long) */
2381 0, /* bitsize */
2382 FALSE, /* pc_relative */
2383 0, /* bitpos */
2384 complain_overflow_dont, /* complain_on_overflow */
2385 bfd_elf_generic_reloc, /* special_function */
2386 MORELLO_R_STR (CAPINIT), /* name */
2387 FALSE, /* partial_inplace */
2388 ALL_ONES, /* src_mask */
2389 ALL_ONES, /* dst_mask */
2390 FALSE), /* pcrel_offset */
2391
a1bdea65
SP
2392 HOWTO64 (MORELLO_R (GLOB_DAT),/* type */
2393 0, /* rightshift */
2394 2, /* size (0 = byte, 1 = short, 2 = long) */
2395 64, /* bitsize */
2396 FALSE, /* pc_relative */
2397 0, /* bitpos */
2398 complain_overflow_bitfield, /* complain_on_overflow */
2399 bfd_elf_generic_reloc, /* special_function */
2400 MORELLO_R_STR (GLOB_DAT), /* name */
2401 TRUE, /* partial_inplace */
2402 0xffffffff, /* src_mask */
2403 0xffffffff, /* dst_mask */
2404 FALSE), /* pcrel_offset */
2405
e19e9199
SP
2406 HOWTO64 (MORELLO_R (JUMP_SLOT), /* type */
2407 0, /* rightshift */
2408 2, /* size (0 = byte, 1 = short, 2 = long) */
2409 64, /* bitsize */
2410 FALSE, /* pc_relative */
2411 0, /* bitpos */
2412 complain_overflow_bitfield, /* complain_on_overflow */
2413 bfd_elf_generic_reloc, /* special_function */
2414 MORELLO_R_STR (JUMP_SLOT), /* name */
2415 TRUE, /* partial_inplace */
2416 0xffffffff, /* src_mask */
2417 0xffffffff, /* dst_mask */
2418 FALSE), /* pcrel_offset */
2419
2420 HOWTO64 (MORELLO_R (RELATIVE), /* type */
40bbb79e
SP
2421 0, /* rightshift */
2422 2, /* size (0 = byte, 1 = short, 2 = long) */
2423 64, /* bitsize */
2424 FALSE, /* pc_relative */
2425 0, /* bitpos */
2426 complain_overflow_bitfield, /* complain_on_overflow */
2427 bfd_elf_generic_reloc, /* special_function */
2428 MORELLO_R_STR (RELATIVE), /* name */
2429 TRUE, /* partial_inplace */
2430 ALL_ONES, /* src_mask */
2431 ALL_ONES, /* dst_mask */
2432 FALSE), /* pcrel_offset */
2433
e19e9199
SP
2434 HOWTO64 (MORELLO_R (IRELATIVE), /* type */
2435 0, /* rightshift */
2436 2, /* size (0 = byte, 1 = short, 2 = long) */
2437 64, /* bitsize */
2438 FALSE, /* pc_relative */
2439 0, /* bitpos */
2440 complain_overflow_bitfield, /* complain_on_overflow */
2441 bfd_elf_generic_reloc, /* special_function */
2442 MORELLO_R_STR (IRELATIVE), /* name */
2443 FALSE, /* partial_inplace */
2444 0, /* src_mask */
2445 ALL_ONES, /* dst_mask */
2446 FALSE), /* pcrel_offset */
2447
4ca9b406
SP
2448 HOWTO64 (MORELLO_R (TLSDESC), /* type */
2449 0, /* rightshift */
2450 2, /* size (0 = byte, 1 = short, 2 = long) */
2451 64, /* bitsize */
2452 FALSE, /* pc_relative */
2453 0, /* bitpos */
2454 complain_overflow_dont, /* complain_on_overflow */
2455 bfd_elf_generic_reloc, /* special_function */
2456 MORELLO_R_STR (TLSDESC), /* name */
2457 FALSE, /* partial_inplace */
2458 0, /* src_mask */
2459 ALL_ONES, /* dst_mask */
2460 FALSE), /* pcrel_offset */
2461
a6bb11b2 2462 EMPTY_HOWTO (0),
a06ea964
NC
2463};
2464
a6bb11b2
YZ
2465static reloc_howto_type elfNN_aarch64_howto_none =
2466 HOWTO (R_AARCH64_NONE, /* type */
2467 0, /* rightshift */
6346d5ca 2468 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2
YZ
2469 0, /* bitsize */
2470 FALSE, /* pc_relative */
2471 0, /* bitpos */
2472 complain_overflow_dont,/* complain_on_overflow */
2473 bfd_elf_generic_reloc, /* special_function */
2474 "R_AARCH64_NONE", /* name */
2475 FALSE, /* partial_inplace */
2476 0, /* src_mask */
2477 0, /* dst_mask */
2478 FALSE); /* pcrel_offset */
2479
2480/* Given HOWTO, return the bfd internal relocation enumerator. */
2481
2482static bfd_reloc_code_real_type
2483elfNN_aarch64_bfd_reloc_from_howto (reloc_howto_type *howto)
2484{
2485 const int size
2486 = (int) ARRAY_SIZE (elfNN_aarch64_howto_table);
2487 const ptrdiff_t offset
2488 = howto - elfNN_aarch64_howto_table;
2489
2490 if (offset > 0 && offset < size - 1)
2491 return BFD_RELOC_AARCH64_RELOC_START + offset;
2492
2493 if (howto == &elfNN_aarch64_howto_none)
2494 return BFD_RELOC_AARCH64_NONE;
2495
2496 return BFD_RELOC_AARCH64_RELOC_START;
2497}
2498
2499/* Given R_TYPE, return the bfd internal relocation enumerator. */
2500
2501static bfd_reloc_code_real_type
0aa13fee 2502elfNN_aarch64_bfd_reloc_from_type (bfd *abfd, unsigned int r_type)
a6bb11b2
YZ
2503{
2504 static bfd_boolean initialized_p = FALSE;
2505 /* Indexed by R_TYPE, values are offsets in the howto_table. */
2506 static unsigned int offsets[R_AARCH64_end];
2507
535b785f 2508 if (!initialized_p)
a6bb11b2
YZ
2509 {
2510 unsigned int i;
2511
2512 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2513 if (elfNN_aarch64_howto_table[i].type != 0)
2514 offsets[elfNN_aarch64_howto_table[i].type] = i;
2515
2516 initialized_p = TRUE;
2517 }
2518
2519 if (r_type == R_AARCH64_NONE || r_type == R_AARCH64_NULL)
2520 return BFD_RELOC_AARCH64_NONE;
2521
5860e3f8
NC
2522 /* PR 17512: file: b371e70a. */
2523 if (r_type >= R_AARCH64_end)
2524 {
0aa13fee
AM
2525 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2526 abfd, r_type);
5860e3f8
NC
2527 bfd_set_error (bfd_error_bad_value);
2528 return BFD_RELOC_AARCH64_NONE;
2529 }
2530
a6bb11b2
YZ
2531 return BFD_RELOC_AARCH64_RELOC_START + offsets[r_type];
2532}
2533
2534struct elf_aarch64_reloc_map
2535{
2536 bfd_reloc_code_real_type from;
2537 bfd_reloc_code_real_type to;
2538};
2539
2540/* Map bfd generic reloc to AArch64-specific reloc. */
2541static const struct elf_aarch64_reloc_map elf_aarch64_reloc_map[] =
2542{
2543 {BFD_RELOC_NONE, BFD_RELOC_AARCH64_NONE},
2544
2545 /* Basic data relocations. */
2546 {BFD_RELOC_CTOR, BFD_RELOC_AARCH64_NN},
2547 {BFD_RELOC_64, BFD_RELOC_AARCH64_64},
2548 {BFD_RELOC_32, BFD_RELOC_AARCH64_32},
2549 {BFD_RELOC_16, BFD_RELOC_AARCH64_16},
2550 {BFD_RELOC_64_PCREL, BFD_RELOC_AARCH64_64_PCREL},
2551 {BFD_RELOC_32_PCREL, BFD_RELOC_AARCH64_32_PCREL},
2552 {BFD_RELOC_16_PCREL, BFD_RELOC_AARCH64_16_PCREL},
2553};
2554
2555/* Given the bfd internal relocation enumerator in CODE, return the
2556 corresponding howto entry. */
2557
2558static reloc_howto_type *
2559elfNN_aarch64_howto_from_bfd_reloc (bfd_reloc_code_real_type code)
2560{
2561 unsigned int i;
2562
2563 /* Convert bfd generic reloc to AArch64-specific reloc. */
2564 if (code < BFD_RELOC_AARCH64_RELOC_START
2565 || code > BFD_RELOC_AARCH64_RELOC_END)
2566 for (i = 0; i < ARRAY_SIZE (elf_aarch64_reloc_map); i++)
2567 if (elf_aarch64_reloc_map[i].from == code)
2568 {
2569 code = elf_aarch64_reloc_map[i].to;
2570 break;
2571 }
2572
2573 if (code > BFD_RELOC_AARCH64_RELOC_START
2574 && code < BFD_RELOC_AARCH64_RELOC_END)
2575 if (elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START].type)
2576 return &elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START];
2577
54757ed1
AP
2578 if (code == BFD_RELOC_AARCH64_NONE)
2579 return &elfNN_aarch64_howto_none;
2580
a6bb11b2
YZ
2581 return NULL;
2582}
2583
a06ea964 2584static reloc_howto_type *
0aa13fee 2585elfNN_aarch64_howto_from_type (bfd *abfd, unsigned int r_type)
a06ea964 2586{
a6bb11b2
YZ
2587 bfd_reloc_code_real_type val;
2588 reloc_howto_type *howto;
2589
cec5225b
YZ
2590#if ARCH_SIZE == 32
2591 if (r_type > 256)
2592 {
2593 bfd_set_error (bfd_error_bad_value);
2594 return NULL;
2595 }
2596#endif
2597
a6bb11b2
YZ
2598 if (r_type == R_AARCH64_NONE)
2599 return &elfNN_aarch64_howto_none;
a06ea964 2600
0aa13fee 2601 val = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a6bb11b2 2602 howto = elfNN_aarch64_howto_from_bfd_reloc (val);
a06ea964 2603
a6bb11b2
YZ
2604 if (howto != NULL)
2605 return howto;
a06ea964 2606
a06ea964
NC
2607 bfd_set_error (bfd_error_bad_value);
2608 return NULL;
2609}
2610
f3185997 2611static bfd_boolean
0aa13fee 2612elfNN_aarch64_info_to_howto (bfd *abfd, arelent *bfd_reloc,
a06ea964
NC
2613 Elf_Internal_Rela *elf_reloc)
2614{
2615 unsigned int r_type;
2616
cec5225b 2617 r_type = ELFNN_R_TYPE (elf_reloc->r_info);
0aa13fee 2618 bfd_reloc->howto = elfNN_aarch64_howto_from_type (abfd, r_type);
f3185997
NC
2619
2620 if (bfd_reloc->howto == NULL)
2621 {
2622 /* xgettext:c-format */
2623 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2624 return FALSE;
2625 }
2626 return TRUE;
a06ea964
NC
2627}
2628
a06ea964 2629static reloc_howto_type *
cec5225b 2630elfNN_aarch64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC
2631 bfd_reloc_code_real_type code)
2632{
a6bb11b2 2633 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (code);
a06ea964 2634
a6bb11b2
YZ
2635 if (howto != NULL)
2636 return howto;
a06ea964
NC
2637
2638 bfd_set_error (bfd_error_bad_value);
2639 return NULL;
2640}
2641
2642static reloc_howto_type *
cec5225b 2643elfNN_aarch64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC
2644 const char *r_name)
2645{
2646 unsigned int i;
2647
a6bb11b2
YZ
2648 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2649 if (elfNN_aarch64_howto_table[i].name != NULL
2650 && strcasecmp (elfNN_aarch64_howto_table[i].name, r_name) == 0)
2651 return &elfNN_aarch64_howto_table[i];
a06ea964
NC
2652
2653 return NULL;
2654}
2655
07d6d2b8
AM
2656#define TARGET_LITTLE_SYM aarch64_elfNN_le_vec
2657#define TARGET_LITTLE_NAME "elfNN-littleaarch64"
2658#define TARGET_BIG_SYM aarch64_elfNN_be_vec
2659#define TARGET_BIG_NAME "elfNN-bigaarch64"
a06ea964 2660
a06ea964
NC
2661/* The linker script knows the section names for placement.
2662 The entry_names are used to do simple name mangling on the stubs.
2663 Given a function name, and its type, the stub can be found. The
2664 name can be changed. The only requirement is the %s be present. */
50e192f0 2665#define STUB_ENTRY_NAME "__%s%s_veneer"
a06ea964
NC
2666
2667/* The name of the dynamic interpreter. This is put in the .interp
2668 section. */
2669#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so.1"
2670
2671#define AARCH64_MAX_FWD_BRANCH_OFFSET \
2672 (((1 << 25) - 1) << 2)
2673#define AARCH64_MAX_BWD_BRANCH_OFFSET \
2674 (-((1 << 25) << 2))
2675
2676#define AARCH64_MAX_ADRP_IMM ((1 << 20) - 1)
2677#define AARCH64_MIN_ADRP_IMM (-(1 << 20))
2678
50e192f0
SP
2679#define C64_MAX_ADRP_IMM ((1 << 19) - 1)
2680#define C64_MIN_ADRP_IMM (-(1 << 19))
2681
2682static bfd_boolean
2683aarch64_branch_reloc_p (unsigned int r_type)
2684{
2685 switch (r_type)
2686 {
2687 case MORELLO_R (JUMP26):
2688 case MORELLO_R (CALL26):
2689 case AARCH64_R (JUMP26):
2690 case AARCH64_R (CALL26):
2691 return TRUE;
2692
2693 default: break;
2694 }
2695
2696 return FALSE;
2697}
2698
a06ea964
NC
2699static int
2700aarch64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2701{
2702 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2703 return offset <= AARCH64_MAX_ADRP_IMM && offset >= AARCH64_MIN_ADRP_IMM;
2704}
2705
50e192f0
SP
2706static bfd_boolean
2707c64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2708{
2709 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2710 return offset <= C64_MAX_ADRP_IMM && offset >= C64_MIN_ADRP_IMM;
2711}
2712
a06ea964
NC
2713static int
2714aarch64_valid_branch_p (bfd_vma value, bfd_vma place)
2715{
2716 bfd_signed_vma offset = (bfd_signed_vma) (value - place);
2717 return (offset <= AARCH64_MAX_FWD_BRANCH_OFFSET
2718 && offset >= AARCH64_MAX_BWD_BRANCH_OFFSET);
2719}
2720
2721static const uint32_t aarch64_adrp_branch_stub [] =
2722{
2723 0x90000010, /* adrp ip0, X */
2724 /* R_AARCH64_ADR_HI21_PCREL(X) */
2725 0x91000210, /* add ip0, ip0, :lo12:X */
2726 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2727 0xd61f0200, /* br ip0 */
2728};
2729
2730static const uint32_t aarch64_long_branch_stub[] =
2731{
cec5225b 2732#if ARCH_SIZE == 64
a06ea964 2733 0x58000090, /* ldr ip0, 1f */
cec5225b
YZ
2734#else
2735 0x18000090, /* ldr wip0, 1f */
2736#endif
a06ea964
NC
2737 0x10000011, /* adr ip1, #0 */
2738 0x8b110210, /* add ip0, ip0, ip1 */
2739 0xd61f0200, /* br ip0 */
cec5225b
YZ
2740 0x00000000, /* 1: .xword or .word
2741 R_AARCH64_PRELNN(X) + 12
a06ea964
NC
2742 */
2743 0x00000000,
2744};
2745
68fcca92
JW
2746static const uint32_t aarch64_erratum_835769_stub[] =
2747{
2748 0x00000000, /* Placeholder for multiply accumulate. */
2749 0x14000000, /* b <label> */
2750};
2751
4106101c
MS
2752static const uint32_t aarch64_erratum_843419_stub[] =
2753{
2754 0x00000000, /* Placeholder for LDR instruction. */
2755 0x14000000, /* b <label> */
2756};
2757
50e192f0
SP
2758static const uint32_t aarch64_c64_branch_stub [] =
2759{
2760 0xc2c273e0, /* bx #4 */
2761 0x90800010, /* adrp c16, X */
2762 /* R_MORELLO_ADR_HI20_PCREL(X) */
2763 0x02000210, /* add c16, c16, :lo12:X */
2764 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2765 0xc2c21200, /* br c16 */
2766};
2767
2768static const uint32_t c64_aarch64_branch_stub [] =
2769{
2770 0x90800010, /* adrp c16, X */
2771 /* R_MORELLO_ADR_HI20_PCREL(X) */
2772 0x02000210, /* add c16, c16, :lo12:X */
2773 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2774 0xc2c21200, /* br c16 */
2775};
2776
a06ea964
NC
2777/* Section name for stubs is the associated section name plus this
2778 string. */
2779#define STUB_SUFFIX ".stub"
2780
cec5225b 2781enum elf_aarch64_stub_type
a06ea964
NC
2782{
2783 aarch64_stub_none,
2784 aarch64_stub_adrp_branch,
2785 aarch64_stub_long_branch,
68fcca92 2786 aarch64_stub_erratum_835769_veneer,
4106101c 2787 aarch64_stub_erratum_843419_veneer,
50e192f0
SP
2788 aarch64_stub_branch_c64,
2789 c64_stub_branch_aarch64,
2790 c64_stub_branch_c64,
a06ea964
NC
2791};
2792
cec5225b 2793struct elf_aarch64_stub_hash_entry
a06ea964
NC
2794{
2795 /* Base hash table entry structure. */
2796 struct bfd_hash_entry root;
2797
2798 /* The stub section. */
2799 asection *stub_sec;
2800
2801 /* Offset within stub_sec of the beginning of this stub. */
2802 bfd_vma stub_offset;
2803
2804 /* Given the symbol's value and its section we can determine its final
2805 value when building the stubs (so the stub knows where to jump). */
2806 bfd_vma target_value;
2807 asection *target_section;
2808
cec5225b 2809 enum elf_aarch64_stub_type stub_type;
a06ea964
NC
2810
2811 /* The symbol table entry, if any, that this was derived from. */
cec5225b 2812 struct elf_aarch64_link_hash_entry *h;
a06ea964
NC
2813
2814 /* Destination symbol type */
2815 unsigned char st_type;
2816
2817 /* Where this stub is being called from, or, in the case of combined
2818 stub sections, the first input section in the group. */
2819 asection *id_sec;
2820
2821 /* The name for the local symbol at the start of this stub. The
2822 stub name in the hash table has to be unique; this does not, so
2823 it can be friendlier. */
2824 char *output_name;
68fcca92
JW
2825
2826 /* The instruction which caused this stub to be generated (only valid for
2827 erratum 835769 workaround stubs at present). */
2828 uint32_t veneered_insn;
4106101c
MS
2829
2830 /* In an erratum 843419 workaround stub, the ADRP instruction offset. */
2831 bfd_vma adrp_offset;
a06ea964
NC
2832};
2833
2834/* Used to build a map of a section. This is required for mixed-endian
2835 code/data. */
2836
cec5225b 2837typedef struct elf_elf_section_map
a06ea964
NC
2838{
2839 bfd_vma vma;
2840 char type;
2841}
cec5225b 2842elf_aarch64_section_map;
a06ea964
NC
2843
2844
2845typedef struct _aarch64_elf_section_data
2846{
2847 struct bfd_elf_section_data elf;
2848 unsigned int mapcount;
2849 unsigned int mapsize;
cec5225b 2850 elf_aarch64_section_map *map;
f0070c1e 2851 bfd_boolean sorted;
a06ea964
NC
2852}
2853_aarch64_elf_section_data;
2854
cec5225b 2855#define elf_aarch64_section_data(sec) \
a06ea964
NC
2856 ((_aarch64_elf_section_data *) elf_section_data (sec))
2857
f0070c1e
SP
2858/* Used to order a list of mapping symbols by address. */
2859
2860static int
2861elf_aarch64_compare_mapping (const void *a, const void *b)
2862{
2863 const elf_aarch64_section_map *amap = (const elf_aarch64_section_map *) a;
2864 const elf_aarch64_section_map *bmap = (const elf_aarch64_section_map *) b;
2865
2866 if (amap->vma > bmap->vma)
2867 return 1;
2868 else if (amap->vma < bmap->vma)
2869 return -1;
2870 else if (amap->type > bmap->type)
2871 /* Ensure results do not depend on the host qsort for objects with
2872 multiple mapping symbols at the same address by sorting on type
2873 after vma. */
2874 return 1;
2875 else if (amap->type < bmap->type)
2876 return -1;
2877 else
2878 return 0;
2879}
2880
2881static _aarch64_elf_section_data *
2882elf_aarch64_section_data_get (asection *sec)
2883{
2884 _aarch64_elf_section_data *sec_data = elf_aarch64_section_data(sec);
2885
2886 /* A section that does not have aarch64 section data, so it does not have any
2887 map information. Assume A64. */
2888 if (sec_data == NULL || !sec_data->elf.is_target_section_data)
2889 return NULL;
2890
2891 if (sec_data->sorted)
2892 goto done;
2893
2894 qsort (sec_data->map, sec_data->mapcount, sizeof (elf_aarch64_section_map),
2895 elf_aarch64_compare_mapping);
2896
2897 sec_data->sorted = TRUE;
2898
2899done:
2900 return sec_data;
2901}
2902
2903/* Returns TRUE if the label with st_value as VALUE is within a C64 code
2904 section or not. */
2905
2906static bfd_boolean
2907c64_value_p (asection *section, unsigned int value)
2908{
2909 struct _aarch64_elf_section_data *sec_data =
2910 elf_aarch64_section_data_get (section);
2911
2912 if (sec_data == NULL)
2913 return FALSE;
2914
2915 unsigned int span;
2916
2917 for (span = 0; span < sec_data->mapcount; span++)
2918 {
2919 unsigned int span_start = sec_data->map[span].vma;
2920 unsigned int span_end = ((span == sec_data->mapcount - 1)
2921 ? sec_data->map[0].vma + section->size
2922 : sec_data->map[span + 1].vma);
2923 char span_type = sec_data->map[span].type;
2924
2925 if (span_start <= value && value < span_end && span_type == 'c')
2926 return TRUE;
2927 }
2928 return FALSE;
2929}
2930
4e8516b2
AP
2931/* The size of the thread control block which is defined to be two pointers. */
2932#define TCB_SIZE (ARCH_SIZE/8)*2
a06ea964
NC
2933
2934struct elf_aarch64_local_symbol
2935{
2936 unsigned int got_type;
2937 bfd_signed_vma got_refcount;
2938 bfd_vma got_offset;
2939
2940 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The
2941 offset is from the end of the jump table and reserved entries
2942 within the PLTGOT.
2943
2944 The magic value (bfd_vma) -1 indicates that an offset has not be
2945 allocated. */
2946 bfd_vma tlsdesc_got_jump_table_offset;
2947};
2948
2949struct elf_aarch64_obj_tdata
2950{
2951 struct elf_obj_tdata root;
2952
2953 /* local symbol descriptors */
2954 struct elf_aarch64_local_symbol *locals;
2955
2956 /* Zero to warn when linking objects with incompatible enum sizes. */
2957 int no_enum_size_warning;
2958
2959 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2960 int no_wchar_size_warning;
cd702818
SD
2961
2962 /* All GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. */
2963 uint32_t gnu_and_prop;
37c18eed
SD
2964
2965 /* Zero to warn when linking objects with incompatible
2966 GNU_PROPERTY_AARCH64_FEATURE_1_BTI. */
2967 int no_bti_warn;
2968
2969 /* PLT type based on security. */
2970 aarch64_plt_type plt_type;
f0070c1e
SP
2971
2972 /* Flag to check if section maps have been initialised for all sections in
2973 this object. */
2974 bfd_boolean secmaps_initialised;
a06ea964
NC
2975};
2976
2977#define elf_aarch64_tdata(bfd) \
2978 ((struct elf_aarch64_obj_tdata *) (bfd)->tdata.any)
2979
cec5225b 2980#define elf_aarch64_locals(bfd) (elf_aarch64_tdata (bfd)->locals)
a06ea964
NC
2981
2982#define is_aarch64_elf(bfd) \
2983 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2984 && elf_tdata (bfd) != NULL \
2985 && elf_object_id (bfd) == AARCH64_ELF_DATA)
2986
2987static bfd_boolean
cec5225b 2988elfNN_aarch64_mkobject (bfd *abfd)
a06ea964
NC
2989{
2990 return bfd_elf_allocate_object (abfd, sizeof (struct elf_aarch64_obj_tdata),
2991 AARCH64_ELF_DATA);
2992}
2993
cec5225b
YZ
2994#define elf_aarch64_hash_entry(ent) \
2995 ((struct elf_aarch64_link_hash_entry *)(ent))
a06ea964
NC
2996
2997#define GOT_UNKNOWN 0
2998#define GOT_NORMAL 1
2999#define GOT_TLS_GD 2
3000#define GOT_TLS_IE 4
3001#define GOT_TLSDESC_GD 8
a1bdea65 3002#define GOT_CAP 16
a06ea964
NC
3003
3004#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLSDESC_GD))
3005
3006/* AArch64 ELF linker hash entry. */
cec5225b 3007struct elf_aarch64_link_hash_entry
a06ea964
NC
3008{
3009 struct elf_link_hash_entry root;
3010
a06ea964
NC
3011 /* Since PLT entries have variable size, we need to record the
3012 index into .got.plt instead of recomputing it from the PLT
3013 offset. */
3014 bfd_signed_vma plt_got_offset;
3015
3016 /* Bit mask representing the type of GOT entry(s) if any required by
3017 this symbol. */
3018 unsigned int got_type;
3019
3020 /* A pointer to the most recently used stub hash entry against this
3021 symbol. */
cec5225b 3022 struct elf_aarch64_stub_hash_entry *stub_cache;
a06ea964
NC
3023
3024 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The offset
3025 is from the end of the jump table and reserved entries within the PLTGOT.
3026
3027 The magic value (bfd_vma) -1 indicates that an offset has not
3028 be allocated. */
3029 bfd_vma tlsdesc_got_jump_table_offset;
3030};
3031
3032static unsigned int
cec5225b 3033elfNN_aarch64_symbol_got_type (struct elf_link_hash_entry *h,
a06ea964
NC
3034 bfd *abfd,
3035 unsigned long r_symndx)
3036{
3037 if (h)
cec5225b 3038 return elf_aarch64_hash_entry (h)->got_type;
a06ea964 3039
cec5225b 3040 if (! elf_aarch64_locals (abfd))
a06ea964
NC
3041 return GOT_UNKNOWN;
3042
cec5225b 3043 return elf_aarch64_locals (abfd)[r_symndx].got_type;
a06ea964
NC
3044}
3045
a06ea964 3046/* Get the AArch64 elf linker hash table from a link_info structure. */
cec5225b
YZ
3047#define elf_aarch64_hash_table(info) \
3048 ((struct elf_aarch64_link_hash_table *) ((info)->hash))
a06ea964
NC
3049
3050#define aarch64_stub_hash_lookup(table, string, create, copy) \
cec5225b 3051 ((struct elf_aarch64_stub_hash_entry *) \
a06ea964
NC
3052 bfd_hash_lookup ((table), (string), (create), (copy)))
3053
3054/* AArch64 ELF linker hash table. */
cec5225b 3055struct elf_aarch64_link_hash_table
a06ea964
NC
3056{
3057 /* The main hash table. */
3058 struct elf_link_hash_table root;
3059
3060 /* Nonzero to force PIC branch veneers. */
3061 int pic_veneer;
3062
68fcca92
JW
3063 /* Fix erratum 835769. */
3064 int fix_erratum_835769;
3065
4106101c 3066 /* Fix erratum 843419. */
739b5c9c 3067 erratum_84319_opts fix_erratum_843419;
4106101c 3068
1f56df9d
JW
3069 /* Don't apply link-time values for dynamic relocations. */
3070 int no_apply_dynamic_relocs;
3071
a06ea964
NC
3072 /* The number of bytes in the initial entry in the PLT. */
3073 bfd_size_type plt_header_size;
3074
37c18eed
SD
3075 /* The bytes of the initial PLT entry. */
3076 const bfd_byte *plt0_entry;
3077
3078 /* The number of bytes in the subsequent PLT entries. */
a06ea964
NC
3079 bfd_size_type plt_entry_size;
3080
37c18eed
SD
3081 /* The bytes of the subsequent PLT entry. */
3082 const bfd_byte *plt_entry;
3083
a06ea964
NC
3084 /* For convenience in allocate_dynrelocs. */
3085 bfd *obfd;
3086
3087 /* The amount of space used by the reserved portion of the sgotplt
3088 section, plus whatever space is used by the jump slots. */
3089 bfd_vma sgotplt_jump_table_size;
3090
3091 /* The stub hash table. */
3092 struct bfd_hash_table stub_hash_table;
3093
3094 /* Linker stub bfd. */
3095 bfd *stub_bfd;
3096
3097 /* Linker call-backs. */
3098 asection *(*add_stub_section) (const char *, asection *);
3099 void (*layout_sections_again) (void);
3100
3101 /* Array to keep track of which stub sections have been created, and
3102 information on stub grouping. */
3103 struct map_stub
3104 {
3105 /* This is the section to which stubs in the group will be
3106 attached. */
3107 asection *link_sec;
3108 /* The stub section. */
3109 asection *stub_sec;
3110 } *stub_group;
3111
cec5225b 3112 /* Assorted information used by elfNN_aarch64_size_stubs. */
a06ea964 3113 unsigned int bfd_count;
7292b3ac 3114 unsigned int top_index;
a06ea964
NC
3115 asection **input_list;
3116
823710d5
SN
3117 /* JUMP_SLOT relocs for variant PCS symbols may be present. */
3118 int variant_pcs;
3119
37c18eed
SD
3120 /* The number of bytes in the PLT enty for the TLS descriptor. */
3121 bfd_size_type tlsdesc_plt_entry_size;
3122
1419bbe5
WN
3123 /* Used by local STT_GNU_IFUNC symbols. */
3124 htab_t loc_hash_table;
3125 void * loc_hash_memory;
40bbb79e
SP
3126
3127 /* Used for capability relocations. */
3128 asection *srelcaps;
a1bdea65 3129 int c64_rel;
7ff36d1a 3130 bfd_boolean c64_output;
a06ea964
NC
3131};
3132
a06ea964
NC
3133/* Create an entry in an AArch64 ELF linker hash table. */
3134
3135static struct bfd_hash_entry *
cec5225b 3136elfNN_aarch64_link_hash_newfunc (struct bfd_hash_entry *entry,
a06ea964
NC
3137 struct bfd_hash_table *table,
3138 const char *string)
3139{
cec5225b
YZ
3140 struct elf_aarch64_link_hash_entry *ret =
3141 (struct elf_aarch64_link_hash_entry *) entry;
a06ea964
NC
3142
3143 /* Allocate the structure if it has not already been allocated by a
3144 subclass. */
3145 if (ret == NULL)
3146 ret = bfd_hash_allocate (table,
cec5225b 3147 sizeof (struct elf_aarch64_link_hash_entry));
a06ea964
NC
3148 if (ret == NULL)
3149 return (struct bfd_hash_entry *) ret;
3150
3151 /* Call the allocation method of the superclass. */
cec5225b 3152 ret = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC
3153 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3154 table, string));
3155 if (ret != NULL)
3156 {
a06ea964
NC
3157 ret->got_type = GOT_UNKNOWN;
3158 ret->plt_got_offset = (bfd_vma) - 1;
3159 ret->stub_cache = NULL;
3160 ret->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
3161 }
3162
3163 return (struct bfd_hash_entry *) ret;
3164}
3165
3166/* Initialize an entry in the stub hash table. */
3167
3168static struct bfd_hash_entry *
3169stub_hash_newfunc (struct bfd_hash_entry *entry,
3170 struct bfd_hash_table *table, const char *string)
3171{
3172 /* Allocate the structure if it has not already been allocated by a
3173 subclass. */
3174 if (entry == NULL)
3175 {
3176 entry = bfd_hash_allocate (table,
3177 sizeof (struct
cec5225b 3178 elf_aarch64_stub_hash_entry));
a06ea964
NC
3179 if (entry == NULL)
3180 return entry;
3181 }
3182
3183 /* Call the allocation method of the superclass. */
3184 entry = bfd_hash_newfunc (entry, table, string);
3185 if (entry != NULL)
3186 {
cec5225b 3187 struct elf_aarch64_stub_hash_entry *eh;
a06ea964
NC
3188
3189 /* Initialize the local fields. */
cec5225b 3190 eh = (struct elf_aarch64_stub_hash_entry *) entry;
4106101c 3191 eh->adrp_offset = 0;
a06ea964
NC
3192 eh->stub_sec = NULL;
3193 eh->stub_offset = 0;
3194 eh->target_value = 0;
3195 eh->target_section = NULL;
3196 eh->stub_type = aarch64_stub_none;
3197 eh->h = NULL;
3198 eh->id_sec = NULL;
3199 }
3200
3201 return entry;
3202}
3203
1419bbe5
WN
3204/* Compute a hash of a local hash entry. We use elf_link_hash_entry
3205 for local symbol so that we can handle local STT_GNU_IFUNC symbols
3206 as global symbol. We reuse indx and dynstr_index for local symbol
3207 hash since they aren't used by global symbols in this backend. */
3208
3209static hashval_t
3210elfNN_aarch64_local_htab_hash (const void *ptr)
3211{
3212 struct elf_link_hash_entry *h
3213 = (struct elf_link_hash_entry *) ptr;
3214 return ELF_LOCAL_SYMBOL_HASH (h->indx, h->dynstr_index);
3215}
3216
3217/* Compare local hash entries. */
3218
3219static int
3220elfNN_aarch64_local_htab_eq (const void *ptr1, const void *ptr2)
3221{
3222 struct elf_link_hash_entry *h1
3223 = (struct elf_link_hash_entry *) ptr1;
3224 struct elf_link_hash_entry *h2
3225 = (struct elf_link_hash_entry *) ptr2;
3226
3227 return h1->indx == h2->indx && h1->dynstr_index == h2->dynstr_index;
3228}
3229
3230/* Find and/or create a hash entry for local symbol. */
3231
3232static struct elf_link_hash_entry *
3233elfNN_aarch64_get_local_sym_hash (struct elf_aarch64_link_hash_table *htab,
3234 bfd *abfd, const Elf_Internal_Rela *rel,
3235 bfd_boolean create)
3236{
3237 struct elf_aarch64_link_hash_entry e, *ret;
3238 asection *sec = abfd->sections;
3239 hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id,
3240 ELFNN_R_SYM (rel->r_info));
3241 void **slot;
3242
3243 e.root.indx = sec->id;
3244 e.root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3245 slot = htab_find_slot_with_hash (htab->loc_hash_table, &e, h,
3246 create ? INSERT : NO_INSERT);
3247
3248 if (!slot)
3249 return NULL;
3250
3251 if (*slot)
3252 {
3253 ret = (struct elf_aarch64_link_hash_entry *) *slot;
3254 return &ret->root;
3255 }
3256
3257 ret = (struct elf_aarch64_link_hash_entry *)
3258 objalloc_alloc ((struct objalloc *) htab->loc_hash_memory,
3259 sizeof (struct elf_aarch64_link_hash_entry));
3260 if (ret)
3261 {
3262 memset (ret, 0, sizeof (*ret));
3263 ret->root.indx = sec->id;
3264 ret->root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3265 ret->root.dynindx = -1;
3266 *slot = ret;
3267 }
3268 return &ret->root;
3269}
a06ea964
NC
3270
3271/* Copy the extra info we tack onto an elf_link_hash_entry. */
3272
3273static void
cec5225b 3274elfNN_aarch64_copy_indirect_symbol (struct bfd_link_info *info,
a06ea964
NC
3275 struct elf_link_hash_entry *dir,
3276 struct elf_link_hash_entry *ind)
3277{
cec5225b 3278 struct elf_aarch64_link_hash_entry *edir, *eind;
a06ea964 3279
cec5225b
YZ
3280 edir = (struct elf_aarch64_link_hash_entry *) dir;
3281 eind = (struct elf_aarch64_link_hash_entry *) ind;
a06ea964 3282
a06ea964
NC
3283 if (ind->root.type == bfd_link_hash_indirect)
3284 {
3285 /* Copy over PLT info. */
3286 if (dir->got.refcount <= 0)
3287 {
3288 edir->got_type = eind->got_type;
3289 eind->got_type = GOT_UNKNOWN;
3290 }
3291 }
3292
3293 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3294}
3295
823710d5
SN
3296/* Merge non-visibility st_other attributes. */
3297
3298static void
3299elfNN_aarch64_merge_symbol_attribute (struct elf_link_hash_entry *h,
3300 const Elf_Internal_Sym *isym,
3301 bfd_boolean definition ATTRIBUTE_UNUSED,
3302 bfd_boolean dynamic ATTRIBUTE_UNUSED)
3303{
3304 unsigned int isym_sto = isym->st_other & ~ELF_ST_VISIBILITY (-1);
3305 unsigned int h_sto = h->other & ~ELF_ST_VISIBILITY (-1);
3306
3307 if (isym_sto == h_sto)
3308 return;
3309
3310 if (isym_sto & ~STO_AARCH64_VARIANT_PCS)
3311 /* Not fatal, this callback cannot fail. */
3312 _bfd_error_handler (_("unknown attribute for symbol `%s': 0x%02x"),
3313 h->root.root.string, isym_sto);
3314
3315 /* Note: Ideally we would warn about any attribute mismatch, but
3316 this api does not allow that without substantial changes. */
3317 if (isym_sto & STO_AARCH64_VARIANT_PCS)
3318 h->other |= STO_AARCH64_VARIANT_PCS;
3319}
3320
68faa637
AM
3321/* Destroy an AArch64 elf linker hash table. */
3322
3323static void
d495ab0d 3324elfNN_aarch64_link_hash_table_free (bfd *obfd)
68faa637
AM
3325{
3326 struct elf_aarch64_link_hash_table *ret
d495ab0d 3327 = (struct elf_aarch64_link_hash_table *) obfd->link.hash;
68faa637
AM
3328
3329 if (ret->loc_hash_table)
3330 htab_delete (ret->loc_hash_table);
3331 if (ret->loc_hash_memory)
3332 objalloc_free ((struct objalloc *) ret->loc_hash_memory);
3333
3334 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3335 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM
3336}
3337
a06ea964
NC
3338/* Create an AArch64 elf linker hash table. */
3339
3340static struct bfd_link_hash_table *
cec5225b 3341elfNN_aarch64_link_hash_table_create (bfd *abfd)
a06ea964 3342{
cec5225b 3343 struct elf_aarch64_link_hash_table *ret;
986f0783 3344 size_t amt = sizeof (struct elf_aarch64_link_hash_table);
a06ea964 3345
7bf52ea2 3346 ret = bfd_zmalloc (amt);
a06ea964
NC
3347 if (ret == NULL)
3348 return NULL;
3349
3350 if (!_bfd_elf_link_hash_table_init
cec5225b
YZ
3351 (&ret->root, abfd, elfNN_aarch64_link_hash_newfunc,
3352 sizeof (struct elf_aarch64_link_hash_entry), AARCH64_ELF_DATA))
a06ea964
NC
3353 {
3354 free (ret);
3355 return NULL;
3356 }
3357
a06ea964 3358 ret->plt_header_size = PLT_ENTRY_SIZE;
37c18eed 3359 ret->plt0_entry = elfNN_aarch64_small_plt0_entry;
a06ea964 3360 ret->plt_entry_size = PLT_SMALL_ENTRY_SIZE;
37c18eed
SD
3361 ret->plt_entry = elfNN_aarch64_small_plt_entry;
3362 ret->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
a06ea964 3363 ret->obfd = abfd;
9bcc30e4 3364 ret->root.tlsdesc_got = (bfd_vma) - 1;
a06ea964
NC
3365
3366 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
cec5225b 3367 sizeof (struct elf_aarch64_stub_hash_entry)))
a06ea964 3368 {
d495ab0d 3369 _bfd_elf_link_hash_table_free (abfd);
a06ea964
NC
3370 return NULL;
3371 }
3372
1419bbe5
WN
3373 ret->loc_hash_table = htab_try_create (1024,
3374 elfNN_aarch64_local_htab_hash,
3375 elfNN_aarch64_local_htab_eq,
3376 NULL);
3377 ret->loc_hash_memory = objalloc_create ();
3378 if (!ret->loc_hash_table || !ret->loc_hash_memory)
3379 {
d495ab0d 3380 elfNN_aarch64_link_hash_table_free (abfd);
1419bbe5
WN
3381 return NULL;
3382 }
d495ab0d 3383 ret->root.root.hash_table_free = elfNN_aarch64_link_hash_table_free;
1419bbe5 3384
a06ea964
NC
3385 return &ret->root.root;
3386}
3387
1d75a8e2
NC
3388/* Perform relocation R_TYPE. Returns TRUE upon success, FALSE otherwise. */
3389
a06ea964
NC
3390static bfd_boolean
3391aarch64_relocate (unsigned int r_type, bfd *input_bfd, asection *input_section,
3392 bfd_vma offset, bfd_vma value)
3393{
3394 reloc_howto_type *howto;
3395 bfd_vma place;
3396
0aa13fee 3397 howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
a06ea964
NC
3398 place = (input_section->output_section->vma + input_section->output_offset
3399 + offset);
caed7120 3400
0aa13fee 3401 r_type = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
652afeef
TC
3402 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, r_type, place,
3403 value, 0, FALSE);
caed7120
YZ
3404 return _bfd_aarch64_elf_put_addend (input_bfd,
3405 input_section->contents + offset, r_type,
1d75a8e2 3406 howto, value) == bfd_reloc_ok;
a06ea964
NC
3407}
3408
50e192f0
SP
3409/* Return interworking stub for a relocation. */
3410
3411static enum elf_aarch64_stub_type
3412aarch64_interwork_stub (unsigned int r_type,
3413 bfd_boolean branch_to_c64)
3414{
3415 switch (r_type)
3416 {
3417 case MORELLO_R (JUMP26):
3418 case MORELLO_R (CALL26):
3419 if (!branch_to_c64)
3420 return c64_stub_branch_aarch64;
3421 break;
3422 case AARCH64_R (JUMP26):
3423 case AARCH64_R (CALL26):
3424 if (branch_to_c64)
3425 return aarch64_stub_branch_c64;
3426 break;
3427 default:
3428 break;
3429 }
3430
3431 return aarch64_stub_none;
3432}
3433
cec5225b 3434static enum elf_aarch64_stub_type
a06ea964
NC
3435aarch64_select_branch_stub (bfd_vma value, bfd_vma place)
3436{
3437 if (aarch64_valid_for_adrp_p (value, place))
3438 return aarch64_stub_adrp_branch;
3439 return aarch64_stub_long_branch;
3440}
3441
3442/* Determine the type of stub needed, if any, for a call. */
3443
cec5225b 3444static enum elf_aarch64_stub_type
9a228467 3445aarch64_type_of_stub (asection *input_sec,
a06ea964 3446 const Elf_Internal_Rela *rel,
f678ded7 3447 asection *sym_sec,
a06ea964 3448 unsigned char st_type,
a06ea964
NC
3449 bfd_vma destination)
3450{
3451 bfd_vma location;
3452 bfd_signed_vma branch_offset;
50e192f0 3453 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
cec5225b 3454 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
a06ea964 3455
f678ded7 3456 if (st_type != STT_FUNC
2f340668 3457 && (sym_sec == input_sec))
a06ea964
NC
3458 return stub_type;
3459
a06ea964
NC
3460 /* Determine where the call point is. */
3461 location = (input_sec->output_offset
3462 + input_sec->output_section->vma + rel->r_offset);
3463
3464 branch_offset = (bfd_signed_vma) (destination - location);
3465
50e192f0
SP
3466 /* For A64 <-> C64 branches we only come here for jumps to PLT. Treat them
3467 as regular branches and leave the interworking to PLT. */
3468 if (branch_offset > AARCH64_MAX_FWD_BRANCH_OFFSET
3469 || branch_offset < AARCH64_MAX_BWD_BRANCH_OFFSET)
a06ea964 3470 {
50e192f0
SP
3471 switch (r_type)
3472 {
3473 /* We don't want to redirect any old unconditional jump in this way,
3474 only one which is being used for a sibcall, where it is
3475 acceptable for the IP0 and IP1 registers to be clobbered. */
3476 case AARCH64_R (CALL26):
3477 case AARCH64_R (JUMP26):
3478 return aarch64_stub_long_branch;
3479 case MORELLO_R (CALL26):
3480 case MORELLO_R (JUMP26):
3481 return c64_stub_branch_c64;
3482 default:
3483 break;
3484 }
a06ea964
NC
3485 }
3486
50e192f0
SP
3487 return aarch64_stub_none;
3488}
3489
3490/* Return a string to add as suffix to a veneer name. */
3491
3492static const char *
3493aarch64_lookup_stub_type_suffix (enum elf_aarch64_stub_type stub_type)
3494{
3495 switch (stub_type)
3496 {
3497 case aarch64_stub_branch_c64:
3498 return "_a64c64";
3499 case c64_stub_branch_aarch64:
3500 return "_c64a64";
3501 break;
3502 default:
3503 return "";
3504 }
a06ea964
NC
3505}
3506
3507/* Build a name for an entry in the stub hash table. */
3508
3509static char *
cec5225b 3510elfNN_aarch64_stub_name (const asection *input_section,
a06ea964 3511 const asection *sym_sec,
cec5225b 3512 const struct elf_aarch64_link_hash_entry *hash,
50e192f0
SP
3513 const Elf_Internal_Rela *rel,
3514 enum elf_aarch64_stub_type stub_type)
a06ea964
NC
3515{
3516 char *stub_name;
3517 bfd_size_type len;
50e192f0 3518 const char *suffix = aarch64_lookup_stub_type_suffix (stub_type);;
a06ea964
NC
3519
3520 if (hash)
3521 {
3522 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 16 + 1;
3523 stub_name = bfd_malloc (len);
3524 if (stub_name != NULL)
50e192f0 3525 snprintf (stub_name, len, "%08x_%s%s+%" BFD_VMA_FMT "x",
a06ea964
NC
3526 (unsigned int) input_section->id,
3527 hash->root.root.root.string,
50e192f0 3528 suffix, rel->r_addend);
a06ea964
NC
3529 }
3530 else
3531 {
3532 len = 8 + 1 + 8 + 1 + 8 + 1 + 16 + 1;
3533 stub_name = bfd_malloc (len);
3534 if (stub_name != NULL)
50e192f0 3535 snprintf (stub_name, len, "%08x_%x:%x%s+%" BFD_VMA_FMT "x",
a06ea964
NC
3536 (unsigned int) input_section->id,
3537 (unsigned int) sym_sec->id,
cec5225b 3538 (unsigned int) ELFNN_R_SYM (rel->r_info),
50e192f0 3539 suffix, rel->r_addend);
a06ea964
NC
3540 }
3541
3542 return stub_name;
3543}
3544
7f784814
JW
3545/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For
3546 executable PLT slots where the executable never takes the address of those
3547 functions, the function symbols are not added to the hash table. */
3548
3549static bfd_boolean
3550elf_aarch64_hash_symbol (struct elf_link_hash_entry *h)
3551{
3552 if (h->plt.offset != (bfd_vma) -1
3553 && !h->def_regular
3554 && !h->pointer_equality_needed)
3555 return FALSE;
3556
3557 return _bfd_elf_hash_symbol (h);
3558}
3559
a06ea964
NC
3560/* Look up an entry in the stub hash. Stub entries are cached because
3561 creating the stub name takes a bit of time. */
3562
cec5225b
YZ
3563static struct elf_aarch64_stub_hash_entry *
3564elfNN_aarch64_get_stub_entry (const asection *input_section,
a06ea964
NC
3565 const asection *sym_sec,
3566 struct elf_link_hash_entry *hash,
3567 const Elf_Internal_Rela *rel,
50e192f0
SP
3568 struct elf_aarch64_link_hash_table *htab,
3569 enum elf_aarch64_stub_type stub_type)
a06ea964 3570{
cec5225b
YZ
3571 struct elf_aarch64_stub_hash_entry *stub_entry;
3572 struct elf_aarch64_link_hash_entry *h =
3573 (struct elf_aarch64_link_hash_entry *) hash;
a06ea964
NC
3574 const asection *id_sec;
3575
3576 if ((input_section->flags & SEC_CODE) == 0)
3577 return NULL;
3578
3579 /* If this input section is part of a group of sections sharing one
3580 stub section, then use the id of the first section in the group.
3581 Stub names need to include a section id, as there may well be
3582 more than one stub used to reach say, printf, and we need to
3583 distinguish between them. */
3584 id_sec = htab->stub_group[input_section->id].link_sec;
3585
3586 if (h != NULL && h->stub_cache != NULL
3587 && h->stub_cache->h == h && h->stub_cache->id_sec == id_sec)
3588 {
3589 stub_entry = h->stub_cache;
3590 }
3591 else
3592 {
3593 char *stub_name;
3594
50e192f0 3595 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, h, rel, stub_type);
a06ea964
NC
3596 if (stub_name == NULL)
3597 return NULL;
3598
3599 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table,
3600 stub_name, FALSE, FALSE);
3601 if (h != NULL)
3602 h->stub_cache = stub_entry;
3603
3604 free (stub_name);
3605 }
3606
3607 return stub_entry;
3608}
3609
a06ea964 3610
66585675
MS
3611/* Create a stub section. */
3612
3613static asection *
3614_bfd_aarch64_create_stub_section (asection *section,
3615 struct elf_aarch64_link_hash_table *htab)
3616{
3617 size_t namelen;
3618 bfd_size_type len;
3619 char *s_name;
3620
3621 namelen = strlen (section->name);
3622 len = namelen + sizeof (STUB_SUFFIX);
3623 s_name = bfd_alloc (htab->stub_bfd, len);
3624 if (s_name == NULL)
3625 return NULL;
3626
3627 memcpy (s_name, section->name, namelen);
3628 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3629 return (*htab->add_stub_section) (s_name, section);
3630}
3631
3632
fc6d53be
MS
3633/* Find or create a stub section for a link section.
3634
3635 Fix or create the stub section used to collect stubs attached to
3636 the specified link section. */
3637
3638static asection *
3639_bfd_aarch64_get_stub_for_link_section (asection *link_section,
3640 struct elf_aarch64_link_hash_table *htab)
3641{
3642 if (htab->stub_group[link_section->id].stub_sec == NULL)
3643 htab->stub_group[link_section->id].stub_sec
3644 = _bfd_aarch64_create_stub_section (link_section, htab);
3645 return htab->stub_group[link_section->id].stub_sec;
3646}
3647
3648
ef857521
MS
3649/* Find or create a stub section in the stub group for an input
3650 section. */
3651
3652static asection *
3653_bfd_aarch64_create_or_find_stub_sec (asection *section,
3654 struct elf_aarch64_link_hash_table *htab)
a06ea964 3655{
fc6d53be
MS
3656 asection *link_sec = htab->stub_group[section->id].link_sec;
3657 return _bfd_aarch64_get_stub_for_link_section (link_sec, htab);
ef857521
MS
3658}
3659
3660
3661/* Add a new stub entry in the stub group associated with an input
3662 section to the stub hash. Not all fields of the new stub entry are
3663 initialised. */
3664
3665static struct elf_aarch64_stub_hash_entry *
3666_bfd_aarch64_add_stub_entry_in_group (const char *stub_name,
3667 asection *section,
3668 struct elf_aarch64_link_hash_table *htab)
3669{
3670 asection *link_sec;
3671 asection *stub_sec;
3672 struct elf_aarch64_stub_hash_entry *stub_entry;
3673
3674 link_sec = htab->stub_group[section->id].link_sec;
3675 stub_sec = _bfd_aarch64_create_or_find_stub_sec (section, htab);
3676
a06ea964
NC
3677 /* Enter this entry into the linker stub hash table. */
3678 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3679 TRUE, FALSE);
3680 if (stub_entry == NULL)
3681 {
695344c0 3682 /* xgettext:c-format */
871b3ab2 3683 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4eca0228 3684 section->owner, stub_name);
a06ea964
NC
3685 return NULL;
3686 }
3687
3688 stub_entry->stub_sec = stub_sec;
3689 stub_entry->stub_offset = 0;
3690 stub_entry->id_sec = link_sec;
3691
3692 return stub_entry;
3693}
3694
4106101c
MS
3695/* Add a new stub entry in the final stub section to the stub hash.
3696 Not all fields of the new stub entry are initialised. */
3697
3698static struct elf_aarch64_stub_hash_entry *
3699_bfd_aarch64_add_stub_entry_after (const char *stub_name,
3700 asection *link_section,
3701 struct elf_aarch64_link_hash_table *htab)
3702{
3703 asection *stub_sec;
3704 struct elf_aarch64_stub_hash_entry *stub_entry;
3705
739b5c9c
TC
3706 stub_sec = NULL;
3707 /* Only create the actual stub if we will end up needing it. */
3708 if (htab->fix_erratum_843419 & ERRAT_ADRP)
3709 stub_sec = _bfd_aarch64_get_stub_for_link_section (link_section, htab);
4106101c
MS
3710 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3711 TRUE, FALSE);
3712 if (stub_entry == NULL)
3713 {
4eca0228 3714 _bfd_error_handler (_("cannot create stub entry %s"), stub_name);
4106101c
MS
3715 return NULL;
3716 }
3717
3718 stub_entry->stub_sec = stub_sec;
3719 stub_entry->stub_offset = 0;
3720 stub_entry->id_sec = link_section;
3721
3722 return stub_entry;
3723}
3724
3725
a06ea964
NC
3726static bfd_boolean
3727aarch64_build_one_stub (struct bfd_hash_entry *gen_entry,
abf874aa 3728 void *in_arg)
a06ea964 3729{
cec5225b 3730 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC
3731 asection *stub_sec;
3732 bfd *stub_bfd;
3733 bfd_byte *loc;
3734 bfd_vma sym_value;
68fcca92
JW
3735 bfd_vma veneered_insn_loc;
3736 bfd_vma veneer_entry_loc;
3737 bfd_signed_vma branch_offset = 0;
a06ea964
NC
3738 unsigned int template_size;
3739 const uint32_t *template;
3740 unsigned int i;
abf874aa 3741 struct bfd_link_info *info;
a06ea964
NC
3742
3743 /* Massage our args to the form they really have. */
cec5225b 3744 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964 3745
abf874aa
CL
3746 info = (struct bfd_link_info *) in_arg;
3747
3748 /* Fail if the target section could not be assigned to an output
3749 section. The user should fix his linker script. */
3750 if (stub_entry->target_section->output_section == NULL
3751 && info->non_contiguous_regions)
53215f21
CL
3752 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
3753 "Retry without "
3754 "--enable-non-contiguous-regions.\n"),
3755 stub_entry->target_section);
abf874aa 3756
a06ea964
NC
3757 stub_sec = stub_entry->stub_sec;
3758
3759 /* Make a note of the offset within the stubs for this entry. */
3760 stub_entry->stub_offset = stub_sec->size;
3761 loc = stub_sec->contents + stub_entry->stub_offset;
3762
3763 stub_bfd = stub_sec->owner;
3764
3765 /* This is the address of the stub destination. */
3766 sym_value = (stub_entry->target_value
3767 + stub_entry->target_section->output_offset
3768 + stub_entry->target_section->output_section->vma);
3769
50e192f0
SP
3770 bfd_vma place = (stub_entry->stub_offset + stub_sec->output_section->vma
3771 + stub_sec->output_offset);
3772
a06ea964
NC
3773 if (stub_entry->stub_type == aarch64_stub_long_branch)
3774 {
a06ea964
NC
3775 /* See if we can relax the stub. */
3776 if (aarch64_valid_for_adrp_p (sym_value, place))
3777 stub_entry->stub_type = aarch64_select_branch_stub (sym_value, place);
3778 }
3779
50e192f0
SP
3780 if ((stub_entry->stub_type == aarch64_stub_branch_c64
3781 || stub_entry->stub_type == c64_stub_branch_aarch64
3782 || stub_entry->stub_type == c64_stub_branch_c64)
3783 && !c64_valid_for_adrp_p (sym_value, place))
3784 {
3785 _bfd_error_handler
3786 (_("%s: stub target out of range for %s branch"),
3787 stub_entry->output_name,
3788 (stub_entry->stub_type == aarch64_stub_branch_c64
3789 ? "A64 to C64" : "C64 to A64"));
3790 bfd_set_error (bfd_error_bad_value);
3791 return FALSE;
3792 }
3793
a06ea964
NC
3794 switch (stub_entry->stub_type)
3795 {
3796 case aarch64_stub_adrp_branch:
3797 template = aarch64_adrp_branch_stub;
3798 template_size = sizeof (aarch64_adrp_branch_stub);
3799 break;
3800 case aarch64_stub_long_branch:
3801 template = aarch64_long_branch_stub;
3802 template_size = sizeof (aarch64_long_branch_stub);
3803 break;
68fcca92
JW
3804 case aarch64_stub_erratum_835769_veneer:
3805 template = aarch64_erratum_835769_stub;
3806 template_size = sizeof (aarch64_erratum_835769_stub);
3807 break;
4106101c
MS
3808 case aarch64_stub_erratum_843419_veneer:
3809 template = aarch64_erratum_843419_stub;
3810 template_size = sizeof (aarch64_erratum_843419_stub);
3811 break;
50e192f0
SP
3812 case aarch64_stub_branch_c64:
3813 template = aarch64_c64_branch_stub;
3814 template_size = sizeof (aarch64_c64_branch_stub);
3815 break;
3816 case c64_stub_branch_aarch64:
3817 case c64_stub_branch_c64:
3818 template = c64_aarch64_branch_stub;
3819 template_size = sizeof (c64_aarch64_branch_stub);
3820 break;
a06ea964 3821 default:
8e2fe09f 3822 abort ();
a06ea964
NC
3823 }
3824
3825 for (i = 0; i < (template_size / sizeof template[0]); i++)
3826 {
3827 bfd_putl32 (template[i], loc);
3828 loc += 4;
3829 }
3830
3831 template_size = (template_size + 7) & ~7;
3832 stub_sec->size += template_size;
3833
50e192f0
SP
3834 bfd_vma stub_offset = stub_entry->stub_offset;
3835
a06ea964
NC
3836 switch (stub_entry->stub_type)
3837 {
3838 case aarch64_stub_adrp_branch:
1d75a8e2
NC
3839 if (!aarch64_relocate (AARCH64_R (ADR_PREL_PG_HI21), stub_bfd, stub_sec,
3840 stub_entry->stub_offset, sym_value))
a06ea964
NC
3841 /* The stub would not have been relaxed if the offset was out
3842 of range. */
3843 BFD_FAIL ();
3844
1d75a8e2
NC
3845 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
3846 stub_entry->stub_offset + 4, sym_value))
93ca8569 3847 BFD_FAIL ();
a06ea964
NC
3848 break;
3849
3850 case aarch64_stub_long_branch:
3851 /* We want the value relative to the address 12 bytes back from the
07d6d2b8 3852 value itself. */
1d75a8e2
NC
3853 if (!aarch64_relocate (AARCH64_R (PRELNN), stub_bfd, stub_sec,
3854 stub_entry->stub_offset + 16, sym_value + 12))
93ca8569 3855 BFD_FAIL ();
a06ea964 3856 break;
68fcca92
JW
3857
3858 case aarch64_stub_erratum_835769_veneer:
3859 veneered_insn_loc = stub_entry->target_section->output_section->vma
3860 + stub_entry->target_section->output_offset
3861 + stub_entry->target_value;
3862 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
3863 + stub_entry->stub_sec->output_offset
3864 + stub_entry->stub_offset;
3865 branch_offset = veneered_insn_loc - veneer_entry_loc;
3866 branch_offset >>= 2;
3867 branch_offset &= 0x3ffffff;
3868 bfd_putl32 (stub_entry->veneered_insn,
3869 stub_sec->contents + stub_entry->stub_offset);
3870 bfd_putl32 (template[1] | branch_offset,
3871 stub_sec->contents + stub_entry->stub_offset + 4);
3872 break;
3873
4106101c 3874 case aarch64_stub_erratum_843419_veneer:
1d75a8e2
NC
3875 if (!aarch64_relocate (AARCH64_R (JUMP26), stub_bfd, stub_sec,
3876 stub_entry->stub_offset + 4, sym_value + 4))
4106101c
MS
3877 BFD_FAIL ();
3878 break;
3879
50e192f0
SP
3880 case aarch64_stub_branch_c64:
3881 stub_offset += 4;
3882 /* Fall through. */
3883 case c64_stub_branch_aarch64:
3884 case c64_stub_branch_c64:
3885 if (!aarch64_relocate (R_MORELLO_ADR_PREL_PG_HI20, stub_bfd, stub_sec,
3886 stub_offset, sym_value))
3887 /* We fail early if offset is out of range. */
3888 BFD_FAIL ();
3889
3890 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
3891 stub_offset + 4, sym_value))
3892 BFD_FAIL ();
3893 break;
3894
a06ea964 3895 default:
8e2fe09f 3896 abort ();
a06ea964
NC
3897 }
3898
3899 return TRUE;
3900}
3901
3902/* As above, but don't actually build the stub. Just bump offset so
3903 we know stub section sizes. */
3904
3905static bfd_boolean
739b5c9c 3906aarch64_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
a06ea964 3907{
cec5225b 3908 struct elf_aarch64_stub_hash_entry *stub_entry;
739b5c9c 3909 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC
3910 int size;
3911
3912 /* Massage our args to the form they really have. */
cec5225b 3913 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
739b5c9c 3914 htab = (struct elf_aarch64_link_hash_table *) in_arg;
a06ea964
NC
3915
3916 switch (stub_entry->stub_type)
3917 {
3918 case aarch64_stub_adrp_branch:
3919 size = sizeof (aarch64_adrp_branch_stub);
3920 break;
3921 case aarch64_stub_long_branch:
3922 size = sizeof (aarch64_long_branch_stub);
3923 break;
68fcca92
JW
3924 case aarch64_stub_erratum_835769_veneer:
3925 size = sizeof (aarch64_erratum_835769_stub);
3926 break;
4106101c 3927 case aarch64_stub_erratum_843419_veneer:
739b5c9c
TC
3928 {
3929 if (htab->fix_erratum_843419 == ERRAT_ADR)
3930 return TRUE;
3931 size = sizeof (aarch64_erratum_843419_stub);
3932 }
4106101c 3933 break;
50e192f0
SP
3934 case aarch64_stub_branch_c64:
3935 size = sizeof (aarch64_c64_branch_stub);
3936 break;
3937 case c64_stub_branch_aarch64:
3938 case c64_stub_branch_c64:
3939 size = sizeof (c64_aarch64_branch_stub);
3940 break;
a06ea964 3941 default:
8e2fe09f 3942 abort ();
a06ea964
NC
3943 }
3944
3945 size = (size + 7) & ~7;
3946 stub_entry->stub_sec->size += size;
3947 return TRUE;
3948}
3949
3950/* External entry points for sizing and building linker stubs. */
3951
3952/* Set up various things so that we can make a list of input sections
3953 for each output section included in the link. Returns -1 on error,
3954 0 when no stubs will be needed, and 1 on success. */
3955
3956int
cec5225b 3957elfNN_aarch64_setup_section_lists (bfd *output_bfd,
a06ea964
NC
3958 struct bfd_link_info *info)
3959{
3960 bfd *input_bfd;
3961 unsigned int bfd_count;
7292b3ac 3962 unsigned int top_id, top_index;
a06ea964
NC
3963 asection *section;
3964 asection **input_list, **list;
986f0783 3965 size_t amt;
cec5225b
YZ
3966 struct elf_aarch64_link_hash_table *htab =
3967 elf_aarch64_hash_table (info);
a06ea964
NC
3968
3969 if (!is_elf_hash_table (htab))
3970 return 0;
3971
3972 /* Count the number of input BFDs and find the top input section id. */
3973 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
c72f2fb2 3974 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC
3975 {
3976 bfd_count += 1;
3977 for (section = input_bfd->sections;
3978 section != NULL; section = section->next)
3979 {
3980 if (top_id < section->id)
3981 top_id = section->id;
3982 }
3983 }
3984 htab->bfd_count = bfd_count;
3985
3986 amt = sizeof (struct map_stub) * (top_id + 1);
3987 htab->stub_group = bfd_zmalloc (amt);
3988 if (htab->stub_group == NULL)
3989 return -1;
3990
3991 /* We can't use output_bfd->section_count here to find the top output
3992 section index as some sections may have been removed, and
3993 _bfd_strip_section_from_output doesn't renumber the indices. */
3994 for (section = output_bfd->sections, top_index = 0;
3995 section != NULL; section = section->next)
3996 {
3997 if (top_index < section->index)
3998 top_index = section->index;
3999 }
4000
4001 htab->top_index = top_index;
4002 amt = sizeof (asection *) * (top_index + 1);
4003 input_list = bfd_malloc (amt);
4004 htab->input_list = input_list;
4005 if (input_list == NULL)
4006 return -1;
4007
4008 /* For sections we aren't interested in, mark their entries with a
4009 value we can check later. */
4010 list = input_list + top_index;
4011 do
4012 *list = bfd_abs_section_ptr;
4013 while (list-- != input_list);
4014
4015 for (section = output_bfd->sections;
4016 section != NULL; section = section->next)
4017 {
4018 if ((section->flags & SEC_CODE) != 0)
4019 input_list[section->index] = NULL;
4020 }
4021
4022 return 1;
4023}
4024
cec5225b 4025/* Used by elfNN_aarch64_next_input_section and group_sections. */
a06ea964
NC
4026#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4027
4028/* The linker repeatedly calls this function for each input section,
4029 in the order that input sections are linked into output sections.
4030 Build lists of input sections to determine groupings between which
4031 we may insert linker stubs. */
4032
4033void
cec5225b 4034elfNN_aarch64_next_input_section (struct bfd_link_info *info, asection *isec)
a06ea964 4035{
cec5225b
YZ
4036 struct elf_aarch64_link_hash_table *htab =
4037 elf_aarch64_hash_table (info);
a06ea964
NC
4038
4039 if (isec->output_section->index <= htab->top_index)
4040 {
4041 asection **list = htab->input_list + isec->output_section->index;
4042
cff69cf4 4043 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
a06ea964
NC
4044 {
4045 /* Steal the link_sec pointer for our list. */
4046 /* This happens to make the list in reverse order,
4047 which is what we want. */
4048 PREV_SEC (isec) = *list;
4049 *list = isec;
4050 }
4051 }
4052}
4053
4054/* See whether we can group stub sections together. Grouping stub
4055 sections may result in fewer stubs. More importantly, we need to
4056 put all .init* and .fini* stubs at the beginning of the .init or
4057 .fini output sections respectively, because glibc splits the
4058 _init and _fini functions into multiple parts. Putting a stub in
4059 the middle of a function is not a good idea. */
4060
4061static void
cec5225b 4062group_sections (struct elf_aarch64_link_hash_table *htab,
a06ea964 4063 bfd_size_type stub_group_size,
cff69cf4 4064 bfd_boolean stubs_always_after_branch)
a06ea964 4065{
cff69cf4 4066 asection **list = htab->input_list;
a06ea964
NC
4067
4068 do
4069 {
4070 asection *tail = *list;
cff69cf4 4071 asection *head;
a06ea964
NC
4072
4073 if (tail == bfd_abs_section_ptr)
4074 continue;
4075
cff69cf4
WD
4076 /* Reverse the list: we must avoid placing stubs at the
4077 beginning of the section because the beginning of the text
4078 section may be required for an interrupt vector in bare metal
4079 code. */
4080#define NEXT_SEC PREV_SEC
4081 head = NULL;
a06ea964 4082 while (tail != NULL)
cff69cf4
WD
4083 {
4084 /* Pop from tail. */
4085 asection *item = tail;
4086 tail = PREV_SEC (item);
4087
4088 /* Push on head. */
4089 NEXT_SEC (item) = head;
4090 head = item;
4091 }
4092
4093 while (head != NULL)
a06ea964
NC
4094 {
4095 asection *curr;
cff69cf4
WD
4096 asection *next;
4097 bfd_vma stub_group_start = head->output_offset;
4098 bfd_vma end_of_next;
a06ea964 4099
cff69cf4
WD
4100 curr = head;
4101 while (NEXT_SEC (curr) != NULL)
4102 {
4103 next = NEXT_SEC (curr);
4104 end_of_next = next->output_offset + next->size;
4105 if (end_of_next - stub_group_start >= stub_group_size)
4106 /* End of NEXT is too far from start, so stop. */
4107 break;
4108 /* Add NEXT to the group. */
4109 curr = next;
4110 }
a06ea964 4111
cff69cf4 4112 /* OK, the size from the start to the start of CURR is less
a06ea964 4113 than stub_group_size and thus can be handled by one stub
cff69cf4 4114 section. (Or the head section is itself larger than
a06ea964
NC
4115 stub_group_size, in which case we may be toast.)
4116 We should really be keeping track of the total size of
4117 stubs added here, as stubs contribute to the final output
4118 section size. */
4119 do
4120 {
cff69cf4 4121 next = NEXT_SEC (head);
a06ea964 4122 /* Set up this stub group. */
cff69cf4 4123 htab->stub_group[head->id].link_sec = curr;
a06ea964 4124 }
cff69cf4 4125 while (head != curr && (head = next) != NULL);
a06ea964
NC
4126
4127 /* But wait, there's more! Input sections up to stub_group_size
cff69cf4
WD
4128 bytes after the stub section can be handled by it too. */
4129 if (!stubs_always_after_branch)
a06ea964 4130 {
cff69cf4
WD
4131 stub_group_start = curr->output_offset + curr->size;
4132
4133 while (next != NULL)
a06ea964 4134 {
cff69cf4
WD
4135 end_of_next = next->output_offset + next->size;
4136 if (end_of_next - stub_group_start >= stub_group_size)
4137 /* End of NEXT is too far from stubs, so stop. */
4138 break;
4139 /* Add NEXT to the stub group. */
4140 head = next;
4141 next = NEXT_SEC (head);
4142 htab->stub_group[head->id].link_sec = curr;
a06ea964
NC
4143 }
4144 }
cff69cf4 4145 head = next;
a06ea964
NC
4146 }
4147 }
cff69cf4 4148 while (list++ != htab->input_list + htab->top_index);
a06ea964
NC
4149
4150 free (htab->input_list);
4151}
4152
cff69cf4 4153#undef PREV_SEC
a06ea964
NC
4154#undef PREV_SEC
4155
68fcca92
JW
4156#define AARCH64_BITS(x, pos, n) (((x) >> (pos)) & ((1 << (n)) - 1))
4157
4158#define AARCH64_RT(insn) AARCH64_BITS (insn, 0, 5)
4159#define AARCH64_RT2(insn) AARCH64_BITS (insn, 10, 5)
4160#define AARCH64_RA(insn) AARCH64_BITS (insn, 10, 5)
4161#define AARCH64_RD(insn) AARCH64_BITS (insn, 0, 5)
4162#define AARCH64_RN(insn) AARCH64_BITS (insn, 5, 5)
4163#define AARCH64_RM(insn) AARCH64_BITS (insn, 16, 5)
4164
4165#define AARCH64_MAC(insn) (((insn) & 0xff000000) == 0x9b000000)
4166#define AARCH64_BIT(insn, n) AARCH64_BITS (insn, n, 1)
4167#define AARCH64_OP31(insn) AARCH64_BITS (insn, 21, 3)
4168#define AARCH64_ZR 0x1f
4169
4170/* All ld/st ops. See C4-182 of the ARM ARM. The encoding space for
4171 LD_PCREL, LDST_RO, LDST_UI and LDST_UIMM cover prefetch ops. */
4172
4173#define AARCH64_LD(insn) (AARCH64_BIT (insn, 22) == 1)
4174#define AARCH64_LDST(insn) (((insn) & 0x0a000000) == 0x08000000)
4175#define AARCH64_LDST_EX(insn) (((insn) & 0x3f000000) == 0x08000000)
4176#define AARCH64_LDST_PCREL(insn) (((insn) & 0x3b000000) == 0x18000000)
4177#define AARCH64_LDST_NAP(insn) (((insn) & 0x3b800000) == 0x28000000)
4178#define AARCH64_LDSTP_PI(insn) (((insn) & 0x3b800000) == 0x28800000)
4179#define AARCH64_LDSTP_O(insn) (((insn) & 0x3b800000) == 0x29000000)
4180#define AARCH64_LDSTP_PRE(insn) (((insn) & 0x3b800000) == 0x29800000)
4181#define AARCH64_LDST_UI(insn) (((insn) & 0x3b200c00) == 0x38000000)
4182#define AARCH64_LDST_PIIMM(insn) (((insn) & 0x3b200c00) == 0x38000400)
4183#define AARCH64_LDST_U(insn) (((insn) & 0x3b200c00) == 0x38000800)
4184#define AARCH64_LDST_PREIMM(insn) (((insn) & 0x3b200c00) == 0x38000c00)
4185#define AARCH64_LDST_RO(insn) (((insn) & 0x3b200c00) == 0x38200800)
4186#define AARCH64_LDST_UIMM(insn) (((insn) & 0x3b000000) == 0x39000000)
4187#define AARCH64_LDST_SIMD_M(insn) (((insn) & 0xbfbf0000) == 0x0c000000)
4188#define AARCH64_LDST_SIMD_M_PI(insn) (((insn) & 0xbfa00000) == 0x0c800000)
4189#define AARCH64_LDST_SIMD_S(insn) (((insn) & 0xbf9f0000) == 0x0d000000)
4190#define AARCH64_LDST_SIMD_S_PI(insn) (((insn) & 0xbf800000) == 0x0d800000)
4191
3d14faea
MS
4192/* Classify an INSN if it is indeed a load/store.
4193
4194 Return TRUE if INSN is a LD/ST instruction otherwise return FALSE.
4195
4196 For scalar LD/ST instructions PAIR is FALSE, RT is returned and RT2
4197 is set equal to RT.
4198
2d0ca824 4199 For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned. */
68fcca92
JW
4200
4201static bfd_boolean
3d14faea 4202aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
68fcca92
JW
4203 bfd_boolean *pair, bfd_boolean *load)
4204{
4205 uint32_t opcode;
4206 unsigned int r;
4207 uint32_t opc = 0;
4208 uint32_t v = 0;
4209 uint32_t opc_v = 0;
4210
de194d85 4211 /* Bail out quickly if INSN doesn't fall into the load-store
68fcca92
JW
4212 encoding space. */
4213 if (!AARCH64_LDST (insn))
4214 return FALSE;
4215
4216 *pair = FALSE;
4217 *load = FALSE;
4218 if (AARCH64_LDST_EX (insn))
4219 {
4220 *rt = AARCH64_RT (insn);
3d14faea 4221 *rt2 = *rt;
68fcca92 4222 if (AARCH64_BIT (insn, 21) == 1)
07d6d2b8 4223 {
68fcca92 4224 *pair = TRUE;
3d14faea 4225 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW
4226 }
4227 *load = AARCH64_LD (insn);
4228 return TRUE;
4229 }
4230 else if (AARCH64_LDST_NAP (insn)
4231 || AARCH64_LDSTP_PI (insn)
4232 || AARCH64_LDSTP_O (insn)
4233 || AARCH64_LDSTP_PRE (insn))
4234 {
4235 *pair = TRUE;
4236 *rt = AARCH64_RT (insn);
3d14faea 4237 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW
4238 *load = AARCH64_LD (insn);
4239 return TRUE;
4240 }
4241 else if (AARCH64_LDST_PCREL (insn)
4242 || AARCH64_LDST_UI (insn)
4243 || AARCH64_LDST_PIIMM (insn)
4244 || AARCH64_LDST_U (insn)
4245 || AARCH64_LDST_PREIMM (insn)
4246 || AARCH64_LDST_RO (insn)
4247 || AARCH64_LDST_UIMM (insn))
4248 {
4249 *rt = AARCH64_RT (insn);
3d14faea 4250 *rt2 = *rt;
68fcca92
JW
4251 if (AARCH64_LDST_PCREL (insn))
4252 *load = TRUE;
4253 opc = AARCH64_BITS (insn, 22, 2);
4254 v = AARCH64_BIT (insn, 26);
4255 opc_v = opc | (v << 2);
4256 *load = (opc_v == 1 || opc_v == 2 || opc_v == 3
4257 || opc_v == 5 || opc_v == 7);
4258 return TRUE;
4259 }
4260 else if (AARCH64_LDST_SIMD_M (insn)
4261 || AARCH64_LDST_SIMD_M_PI (insn))
4262 {
4263 *rt = AARCH64_RT (insn);
4264 *load = AARCH64_BIT (insn, 22);
4265 opcode = (insn >> 12) & 0xf;
4266 switch (opcode)
4267 {
4268 case 0:
4269 case 2:
3d14faea 4270 *rt2 = *rt + 3;
68fcca92
JW
4271 break;
4272
4273 case 4:
4274 case 6:
3d14faea 4275 *rt2 = *rt + 2;
68fcca92
JW
4276 break;
4277
4278 case 7:
3d14faea 4279 *rt2 = *rt;
68fcca92
JW
4280 break;
4281
4282 case 8:
4283 case 10:
3d14faea 4284 *rt2 = *rt + 1;
68fcca92
JW
4285 break;
4286
4287 default:
4288 return FALSE;
4289 }
4290 return TRUE;
4291 }
4292 else if (AARCH64_LDST_SIMD_S (insn)
4293 || AARCH64_LDST_SIMD_S_PI (insn))
4294 {
4295 *rt = AARCH64_RT (insn);
4296 r = (insn >> 21) & 1;
4297 *load = AARCH64_BIT (insn, 22);
4298 opcode = (insn >> 13) & 0x7;
4299 switch (opcode)
4300 {
4301 case 0:
4302 case 2:
4303 case 4:
3d14faea 4304 *rt2 = *rt + r;
68fcca92
JW
4305 break;
4306
4307 case 1:
4308 case 3:
4309 case 5:
3d14faea 4310 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW
4311 break;
4312
4313 case 6:
3d14faea 4314 *rt2 = *rt + r;
68fcca92
JW
4315 break;
4316
4317 case 7:
3d14faea 4318 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW
4319 break;
4320
4321 default:
4322 return FALSE;
4323 }
4324 return TRUE;
4325 }
4326
4327 return FALSE;
4328}
4329
4330/* Return TRUE if INSN is multiply-accumulate. */
4331
4332static bfd_boolean
4333aarch64_mlxl_p (uint32_t insn)
4334{
4335 uint32_t op31 = AARCH64_OP31 (insn);
4336
4337 if (AARCH64_MAC (insn)
4338 && (op31 == 0 || op31 == 1 || op31 == 5)
4339 /* Exclude MUL instructions which are encoded as a multiple accumulate
4340 with RA = XZR. */
4341 && AARCH64_RA (insn) != AARCH64_ZR)
4342 return TRUE;
4343
4344 return FALSE;
4345}
4346
4347/* Some early revisions of the Cortex-A53 have an erratum (835769) whereby
4348 it is possible for a 64-bit multiply-accumulate instruction to generate an
4349 incorrect result. The details are quite complex and hard to
4350 determine statically, since branches in the code may exist in some
4351 circumstances, but all cases end with a memory (load, store, or
4352 prefetch) instruction followed immediately by the multiply-accumulate
4353 operation. We employ a linker patching technique, by moving the potentially
4354 affected multiply-accumulate instruction into a patch region and replacing
4355 the original instruction with a branch to the patch. This function checks
4356 if INSN_1 is the memory operation followed by a multiply-accumulate
4357 operation (INSN_2). Return TRUE if an erratum sequence is found, FALSE
4358 if INSN_1 and INSN_2 are safe. */
4359
4360static bfd_boolean
4361aarch64_erratum_sequence (uint32_t insn_1, uint32_t insn_2)
4362{
4363 uint32_t rt;
3d14faea 4364 uint32_t rt2;
68fcca92
JW
4365 uint32_t rn;
4366 uint32_t rm;
4367 uint32_t ra;
4368 bfd_boolean pair;
4369 bfd_boolean load;
4370
4371 if (aarch64_mlxl_p (insn_2)
3d14faea 4372 && aarch64_mem_op_p (insn_1, &rt, &rt2, &pair, &load))
68fcca92
JW
4373 {
4374 /* Any SIMD memory op is independent of the subsequent MLA
4375 by definition of the erratum. */
4376 if (AARCH64_BIT (insn_1, 26))
4377 return TRUE;
4378
4379 /* If not SIMD, check for integer memory ops and MLA relationship. */
4380 rn = AARCH64_RN (insn_2);
4381 ra = AARCH64_RA (insn_2);
4382 rm = AARCH64_RM (insn_2);
4383
4384 /* If this is a load and there's a true(RAW) dependency, we are safe
4385 and this is not an erratum sequence. */
4386 if (load &&
4387 (rt == rn || rt == rm || rt == ra
3d14faea 4388 || (pair && (rt2 == rn || rt2 == rm || rt2 == ra))))
68fcca92
JW
4389 return FALSE;
4390
4391 /* We conservatively put out stubs for all other cases (including
4392 writebacks). */
4393 return TRUE;
4394 }
4395
4396 return FALSE;
4397}
4398
2144188d 4399
35fee8b7
MS
4400static char *
4401_bfd_aarch64_erratum_835769_stub_name (unsigned num_fixes)
4402{
4403 char *stub_name = (char *) bfd_malloc
4404 (strlen ("__erratum_835769_veneer_") + 16);
bb69498c
NC
4405 if (stub_name != NULL)
4406 sprintf (stub_name,"__erratum_835769_veneer_%d", num_fixes);
35fee8b7
MS
4407 return stub_name;
4408}
4409
4106101c 4410/* Scan for Cortex-A53 erratum 835769 sequence.
2144188d
MS
4411
4412 Return TRUE else FALSE on abnormal termination. */
4413
68fcca92 4414static bfd_boolean
5421cc6e
MS
4415_bfd_aarch64_erratum_835769_scan (bfd *input_bfd,
4416 struct bfd_link_info *info,
4417 unsigned int *num_fixes_p)
68fcca92
JW
4418{
4419 asection *section;
4420 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 4421 unsigned int num_fixes = *num_fixes_p;
68fcca92
JW
4422
4423 if (htab == NULL)
2144188d 4424 return TRUE;
68fcca92
JW
4425
4426 for (section = input_bfd->sections;
4427 section != NULL;
4428 section = section->next)
4429 {
4430 bfd_byte *contents = NULL;
4431 struct _aarch64_elf_section_data *sec_data;
4432 unsigned int span;
4433
4434 if (elf_section_type (section) != SHT_PROGBITS
4435 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4436 || (section->flags & SEC_EXCLUDE) != 0
4437 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4438 || (section->output_section == bfd_abs_section_ptr))
4439 continue;
4440
4441 if (elf_section_data (section)->this_hdr.contents != NULL)
4442 contents = elf_section_data (section)->this_hdr.contents;
4443 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
2144188d 4444 return FALSE;
68fcca92
JW
4445
4446 sec_data = elf_aarch64_section_data (section);
520c7b56 4447
ccf61261
NC
4448 if (sec_data->mapcount)
4449 qsort (sec_data->map, sec_data->mapcount,
4450 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
520c7b56 4451
68fcca92
JW
4452 for (span = 0; span < sec_data->mapcount; span++)
4453 {
4454 unsigned int span_start = sec_data->map[span].vma;
4455 unsigned int span_end = ((span == sec_data->mapcount - 1)
4456 ? sec_data->map[0].vma + section->size
4457 : sec_data->map[span + 1].vma);
4458 unsigned int i;
4459 char span_type = sec_data->map[span].type;
4460
4461 if (span_type == 'd')
4462 continue;
4463
4464 for (i = span_start; i + 4 < span_end; i += 4)
4465 {
4466 uint32_t insn_1 = bfd_getl32 (contents + i);
4467 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4468
4469 if (aarch64_erratum_sequence (insn_1, insn_2))
4470 {
5421cc6e 4471 struct elf_aarch64_stub_hash_entry *stub_entry;
35fee8b7
MS
4472 char *stub_name = _bfd_aarch64_erratum_835769_stub_name (num_fixes);
4473 if (! stub_name)
2144188d 4474 return FALSE;
68fcca92 4475
5421cc6e
MS
4476 stub_entry = _bfd_aarch64_add_stub_entry_in_group (stub_name,
4477 section,
4478 htab);
4479 if (! stub_entry)
4480 return FALSE;
68fcca92 4481
5421cc6e
MS
4482 stub_entry->stub_type = aarch64_stub_erratum_835769_veneer;
4483 stub_entry->target_section = section;
4484 stub_entry->target_value = i + 4;
4485 stub_entry->veneered_insn = insn_2;
4486 stub_entry->output_name = stub_name;
68fcca92
JW
4487 num_fixes++;
4488 }
4489 }
4490 }
4491 if (elf_section_data (section)->this_hdr.contents == NULL)
4492 free (contents);
4493 }
4494
357d1523
MS
4495 *num_fixes_p = num_fixes;
4496
2144188d 4497 return TRUE;
68fcca92
JW
4498}
4499
13f622ec 4500
4106101c
MS
4501/* Test if instruction INSN is ADRP. */
4502
4503static bfd_boolean
4504_bfd_aarch64_adrp_p (uint32_t insn)
4505{
9fca35fc 4506 return ((insn & AARCH64_ADRP_OP_MASK) == AARCH64_ADRP_OP);
4106101c
MS
4507}
4508
4509
4510/* Helper predicate to look for cortex-a53 erratum 843419 sequence 1. */
4511
4512static bfd_boolean
4513_bfd_aarch64_erratum_843419_sequence_p (uint32_t insn_1, uint32_t insn_2,
4514 uint32_t insn_3)
4515{
4516 uint32_t rt;
4517 uint32_t rt2;
4518 bfd_boolean pair;
4519 bfd_boolean load;
4520
4521 return (aarch64_mem_op_p (insn_2, &rt, &rt2, &pair, &load)
4522 && (!pair
4523 || (pair && !load))
4524 && AARCH64_LDST_UIMM (insn_3)
4525 && AARCH64_RN (insn_3) == AARCH64_RD (insn_1));
4526}
4527
4528
4529/* Test for the presence of Cortex-A53 erratum 843419 instruction sequence.
4530
4531 Return TRUE if section CONTENTS at offset I contains one of the
4532 erratum 843419 sequences, otherwise return FALSE. If a sequence is
4533 seen set P_VENEER_I to the offset of the final LOAD/STORE
4534 instruction in the sequence.
4535 */
4536
4537static bfd_boolean
4538_bfd_aarch64_erratum_843419_p (bfd_byte *contents, bfd_vma vma,
4539 bfd_vma i, bfd_vma span_end,
4540 bfd_vma *p_veneer_i)
4541{
4542 uint32_t insn_1 = bfd_getl32 (contents + i);
4543
4544 if (!_bfd_aarch64_adrp_p (insn_1))
4545 return FALSE;
4546
4547 if (span_end < i + 12)
4548 return FALSE;
4549
4550 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4551 uint32_t insn_3 = bfd_getl32 (contents + i + 8);
4552
4553 if ((vma & 0xfff) != 0xff8 && (vma & 0xfff) != 0xffc)
4554 return FALSE;
4555
4556 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_3))
4557 {
4558 *p_veneer_i = i + 8;
4559 return TRUE;
4560 }
4561
4562 if (span_end < i + 16)
4563 return FALSE;
4564
4565 uint32_t insn_4 = bfd_getl32 (contents + i + 12);
4566
4567 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_4))
4568 {
4569 *p_veneer_i = i + 12;
4570 return TRUE;
4571 }
4572
4573 return FALSE;
4574}
4575
4576
13f622ec
MS
4577/* Resize all stub sections. */
4578
4579static void
4580_bfd_aarch64_resize_stubs (struct elf_aarch64_link_hash_table *htab)
4581{
4582 asection *section;
4583
4584 /* OK, we've added some stubs. Find out the new size of the
4585 stub sections. */
4586 for (section = htab->stub_bfd->sections;
4587 section != NULL; section = section->next)
4588 {
4589 /* Ignore non-stub sections. */
4590 if (!strstr (section->name, STUB_SUFFIX))
4591 continue;
4592 section->size = 0;
4593 }
4594
4595 bfd_hash_traverse (&htab->stub_hash_table, aarch64_size_one_stub, htab);
13f622ec 4596
61865519
MS
4597 for (section = htab->stub_bfd->sections;
4598 section != NULL; section = section->next)
4599 {
4600 if (!strstr (section->name, STUB_SUFFIX))
4601 continue;
4602
9a2ebffd
JW
4603 /* Add space for a branch. Add 8 bytes to keep section 8 byte aligned,
4604 as long branch stubs contain a 64-bit address. */
61865519 4605 if (section->size)
9a2ebffd 4606 section->size += 8;
4106101c
MS
4607
4608 /* Ensure all stub sections have a size which is a multiple of
4609 4096. This is important in order to ensure that the insertion
4610 of stub sections does not in itself move existing code around
739b5c9c
TC
4611 in such a way that new errata sequences are created. We only do this
4612 when the ADRP workaround is enabled. If only the ADR workaround is
4613 enabled then the stubs workaround won't ever be used. */
4614 if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS
4615 if (section->size)
4616 section->size = BFD_ALIGN (section->size, 0x1000);
4617 }
4618}
4619
9a2ebffd 4620/* Construct an erratum 843419 workaround stub name. */
4106101c
MS
4621
4622static char *
4623_bfd_aarch64_erratum_843419_stub_name (asection *input_section,
4624 bfd_vma offset)
4625{
4626 const bfd_size_type len = 8 + 4 + 1 + 8 + 1 + 16 + 1;
4627 char *stub_name = bfd_malloc (len);
4628
4629 if (stub_name != NULL)
4630 snprintf (stub_name, len, "e843419@%04x_%08x_%" BFD_VMA_FMT "x",
4631 input_section->owner->id,
4632 input_section->id,
4633 offset);
4634 return stub_name;
4635}
4636
4637/* Build a stub_entry structure describing an 843419 fixup.
4638
4639 The stub_entry constructed is populated with the bit pattern INSN
4640 of the instruction located at OFFSET within input SECTION.
4641
4642 Returns TRUE on success. */
4643
4644static bfd_boolean
4645_bfd_aarch64_erratum_843419_fixup (uint32_t insn,
4646 bfd_vma adrp_offset,
4647 bfd_vma ldst_offset,
4648 asection *section,
4649 struct bfd_link_info *info)
4650{
4651 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4652 char *stub_name;
4653 struct elf_aarch64_stub_hash_entry *stub_entry;
4654
4655 stub_name = _bfd_aarch64_erratum_843419_stub_name (section, ldst_offset);
bb69498c
NC
4656 if (stub_name == NULL)
4657 return FALSE;
4106101c
MS
4658 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4659 FALSE, FALSE);
4660 if (stub_entry)
4661 {
4662 free (stub_name);
4663 return TRUE;
4664 }
4665
4666 /* We always place an 843419 workaround veneer in the stub section
4667 attached to the input section in which an erratum sequence has
4668 been found. This ensures that later in the link process (in
4669 elfNN_aarch64_write_section) when we copy the veneered
4670 instruction from the input section into the stub section the
4671 copied instruction will have had any relocations applied to it.
4672 If we placed workaround veneers in any other stub section then we
4673 could not assume that all relocations have been processed on the
4674 corresponding input section at the point we output the stub
bb69498c 4675 section. */
4106101c
MS
4676
4677 stub_entry = _bfd_aarch64_add_stub_entry_after (stub_name, section, htab);
4678 if (stub_entry == NULL)
4679 {
4680 free (stub_name);
4681 return FALSE;
4682 }
4683
4684 stub_entry->adrp_offset = adrp_offset;
4685 stub_entry->target_value = ldst_offset;
4686 stub_entry->target_section = section;
4687 stub_entry->stub_type = aarch64_stub_erratum_843419_veneer;
4688 stub_entry->veneered_insn = insn;
4689 stub_entry->output_name = stub_name;
4690
4691 return TRUE;
4692}
4693
4694
4695/* Scan an input section looking for the signature of erratum 843419.
4696
4697 Scans input SECTION in INPUT_BFD looking for erratum 843419
4698 signatures, for each signature found a stub_entry is created
4699 describing the location of the erratum for subsequent fixup.
4700
4701 Return TRUE on successful scan, FALSE on failure to scan.
4702 */
4703
4704static bfd_boolean
4705_bfd_aarch64_erratum_843419_scan (bfd *input_bfd, asection *section,
4706 struct bfd_link_info *info)
4707{
4708 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4709
4710 if (htab == NULL)
4711 return TRUE;
4712
4713 if (elf_section_type (section) != SHT_PROGBITS
4714 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4715 || (section->flags & SEC_EXCLUDE) != 0
4716 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4717 || (section->output_section == bfd_abs_section_ptr))
4718 return TRUE;
4719
4720 do
4721 {
4722 bfd_byte *contents = NULL;
4723 struct _aarch64_elf_section_data *sec_data;
4724 unsigned int span;
4725
4726 if (elf_section_data (section)->this_hdr.contents != NULL)
4727 contents = elf_section_data (section)->this_hdr.contents;
4728 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4729 return FALSE;
4730
4731 sec_data = elf_aarch64_section_data (section);
4732
ccf61261
NC
4733 if (sec_data->mapcount)
4734 qsort (sec_data->map, sec_data->mapcount,
4735 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
4106101c
MS
4736
4737 for (span = 0; span < sec_data->mapcount; span++)
4738 {
4739 unsigned int span_start = sec_data->map[span].vma;
4740 unsigned int span_end = ((span == sec_data->mapcount - 1)
4741 ? sec_data->map[0].vma + section->size
4742 : sec_data->map[span + 1].vma);
4743 unsigned int i;
4744 char span_type = sec_data->map[span].type;
4745
4746 if (span_type == 'd')
4747 continue;
4748
4749 for (i = span_start; i + 8 < span_end; i += 4)
4750 {
4751 bfd_vma vma = (section->output_section->vma
4752 + section->output_offset
4753 + i);
4754 bfd_vma veneer_i;
4755
4756 if (_bfd_aarch64_erratum_843419_p
4757 (contents, vma, i, span_end, &veneer_i))
4758 {
4759 uint32_t insn = bfd_getl32 (contents + veneer_i);
4760
4761 if (!_bfd_aarch64_erratum_843419_fixup (insn, i, veneer_i,
4762 section, info))
4763 return FALSE;
4764 }
4765 }
4766 }
4767
4768 if (elf_section_data (section)->this_hdr.contents == NULL)
4769 free (contents);
61865519 4770 }
4106101c
MS
4771 while (0);
4772
4773 return TRUE;
61865519 4774}
13f622ec 4775
7ff36d1a
SP
4776static bfd_boolean
4777section_start_symbol (bfd *abfd ATTRIBUTE_UNUSED, asection *section,
4778 void *valp)
4779{
4780 return section->vma == *(bfd_vma *)valp;
4781}
4782
4783/* Capability format functions. */
4784
4785static unsigned
4786exponent (uint64_t len)
4787{
4788#define CAP_MAX_EXPONENT 50
4789 /* Size is a 65 bit value, so there's an implicit 0 MSB. */
4790 unsigned zeroes = __builtin_clzl (len) + 1;
4791
4792 /* All bits up to and including CAP_MW - 2 are zero. */
4793 if (CAP_MAX_EXPONENT < zeroes)
4794 return (unsigned) -1;
4795 else
4796 return CAP_MAX_EXPONENT - zeroes;
4797#undef CAP_MAX_EXPONENT
4798}
4799
dbd880c7 4800#define ONES(x) ((1ULL << (x)) - 1)
7ff36d1a
SP
4801#define ALIGN_UP(x, a) (((x) + ONES (a)) & (~ONES (a)))
4802
4803static bfd_boolean
4804c64_valid_cap_range (bfd_vma *basep, bfd_vma *limitp)
4805{
4806 bfd_vma base = *basep, size = *limitp - *basep;
4807
4808 unsigned e, old_e;
4809
4810 if ((e = exponent (size)) == (unsigned) -1)
4811 return TRUE;
4812
4813 size = ALIGN_UP (size, e + 3);
4814 old_e = e;
4815 e = exponent (size);
4816 if (old_e != e)
4817 size = ALIGN_UP (size, e + 3);
4818
4819 base = ALIGN_UP (base, e + 3);
4820
4821 if (base == *basep && *limitp == base + size)
4822 return TRUE;
4823
4824 *basep = base;
4825 *limitp = base + size;
4826 return FALSE;
4827}
4828
4829struct sec_change_queue
4830{
4831 asection *sec;
4832 struct sec_change_queue *next;
4833};
4834
4835/* Queue up the change, sorted in order of the output section vma. */
4836
4837static void
4838queue_section_padding (struct sec_change_queue **queue, asection *sec)
4839{
4840 struct sec_change_queue *q = *queue, *last_q = NULL, *n;
4841
4842 while (q != NULL)
4843 {
4844 if (q->sec->vma > sec->vma)
4845 break;
4846 last_q = q;
4847 q = q->next;
4848 }
4849
4850 n = bfd_zmalloc (sizeof (struct sec_change_queue));
4851
4852 if (last_q == NULL)
4853 *queue = n;
4854 else
4855 {
4856 n->next = q;
4857 last_q->next = n;
4858 }
4859
4860 n->sec = sec;
4861}
4862
4863/* Check if the bounds covering all sections between LOW_SEC and HIGH_SEC will
4864 get rounded off in the Morello capability format and if it does, queue up a
4865 change to fix up the section layout. */
4866static inline void
4867record_section_change (asection *sec, struct sec_change_queue **queue)
4868{
4869 bfd_vma low = sec->vma;
4870 bfd_vma high = sec->vma + sec->size;
4871
4872 if (!c64_valid_cap_range (&low, &high))
4873 queue_section_padding (queue, sec);
4874}
4875
4876/* Make sure that all capabilities that refer to sections have bounds that
4877 won't overlap with neighbouring sections. This is needed in two specific
4878 cases. The first case is that of PCC, which needs to span across all
4879 executable sections as well as the GOT and PLT sections in the output
4880 binary. The second case is that of linker and ldscript defined symbols that
4881 indicate start and/or end of sections.
4882
4883 In both cases, overlap of capability bounds are avoided by aligning the base
4884 of the section and if necessary, adding a pad at the end of the section so
4885 that the section following it starts only after the pad. */
4886
5fa80905
AC
4887static bfd_vma pcc_low;
4888static bfd_vma pcc_high;
7ff36d1a
SP
4889void
4890elfNN_c64_resize_sections (bfd *output_bfd, struct bfd_link_info *info,
4891 void (*c64_pad_section) (asection *, bfd_vma),
4892 void (*layout_sections_again) (void))
4893{
4894 asection *sec, *pcc_low_sec = NULL, *pcc_high_sec = NULL;
4895 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4896 bfd_vma low = (bfd_vma) -1, high = 0;
2d99dff6 4897 bfd *input_bfd;
7ff36d1a
SP
4898
4899 htab->layout_sections_again = layout_sections_again;
4900
4901 if (!htab->c64_output)
4902 return;
4903
4904 struct sec_change_queue *queue = NULL;
4905
4906 /* First, walk through all the relocations to find those referring to linker
4907 defined and ldscript defined symbols since we set their range to their
4908 output sections. */
2d99dff6 4909 for (input_bfd = info->input_bfds;
7ff36d1a
SP
4910 htab->c64_rel && input_bfd != NULL; input_bfd = input_bfd->link.next)
4911 {
4912 Elf_Internal_Shdr *symtab_hdr;
4913
4914 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4915 if (symtab_hdr->sh_info == 0)
4916 continue;
4917
4918 for (sec = input_bfd->sections; sec != NULL; sec = sec->next)
4919 {
4920 Elf_Internal_Rela *irelaend, *irela;
4921
4922 /* If there aren't any relocs, then there's nothing more to do. */
4923 if ((sec->flags & SEC_RELOC) == 0 || sec->reloc_count == 0)
4924 continue;
4925
4926 irela = _bfd_elf_link_read_relocs (input_bfd, sec, NULL, NULL,
4927 info->keep_memory);
4928 if (irela == NULL)
4929 continue;
4930
4931 /* Now examine each relocation. */
4932 irelaend = irela + sec->reloc_count;
4933 for (; irela < irelaend; irela++)
4934 {
4935 unsigned int r_indx;
4936 struct elf_link_hash_entry *h;
4937 int e_indx;
4938 asection *os;
4939
4940 r_indx = ELFNN_R_SYM (irela->r_info);
4941
4942 /* Linker defined or linker script defined symbols are always in
4943 the symbol hash. */
4944 if (r_indx < symtab_hdr->sh_info)
4945 continue;
4946
4947 e_indx = r_indx - symtab_hdr->sh_info;
4948 h = elf_sym_hashes (input_bfd)[e_indx];
4949
4950 /* XXX Does this ever happen? */
4951 if (h == NULL)
4952 continue;
4953
4954 os = h->root.u.def.section->output_section;
4955
4956 if (h->root.linker_def)
4957 record_section_change (os, &queue);
4958 else if (h->root.ldscript_def)
4959 {
4960 const char *name = h->root.root.string;
4961 size_t len = strlen (name);
4962
4963 if (len > 8 && name[0] == '_' && name[1] == '_'
4964 && (!strncmp (name + 2, "start_", 6)
4965 || !strcmp (name + len - 6, "_start")))
4966
4967 {
4968 bfd_vma value = os->vma + os->size;
4969
4970 os = bfd_sections_find_if (info->output_bfd,
4971 section_start_symbol, &value);
4972
4973 if (os != NULL)
4974 record_section_change (os, &queue);
4975 }
4976 /* XXX We're overfitting here because the offset of H within
4977 the output section is not yet resolved and ldscript
4978 defined symbols do not have input section information. */
4979 else
4980 record_section_change (os, &queue);
4981 }
4982 }
4983 }
4984 }
4985
4986 /* Next, walk through output sections to find the PCC span and add a padding
4987 at the end to ensure that PCC bounds don't bleed into neighbouring
4988 sections. For now PCC needs to encompass all code sections, .got, .plt
4989 and .got.plt. */
4990 for (sec = output_bfd->sections; sec != NULL; sec = sec->next)
4991 {
4992 /* XXX This is a good place to figure out if there are any readable or
4993 writable sections in the PCC range that are not in the list of
4994 sections we want the PCC to span and then warn the user of it. */
4995
4996#define NOT_OP_SECTION(s) ((s) == NULL || (s)->output_section != sec)
4997
4998 if ((sec->flags & SEC_CODE) == 0
4999 && NOT_OP_SECTION (htab->root.sgotplt)
5000 && NOT_OP_SECTION (htab->root.igotplt)
5001 && NOT_OP_SECTION (htab->root.sgot)
5002 && NOT_OP_SECTION (htab->root.splt)
5003 && NOT_OP_SECTION (htab->root.iplt))
5004 continue;
5005
5006 if (sec->vma < low)
5007 {
5008 low = sec->vma;
5009 pcc_low_sec = sec;
5010 }
5011 if (sec->vma + sec->size > high)
5012 {
5013 high = sec->vma + sec->size;
5014 pcc_high_sec = sec;
5015 }
5016
5017#undef NOT_OP_SECTION
5018 }
5019
5020 /* Sequentially add alignment and padding as required. We also need to
5021 account for the PCC-related alignment and padding here since its
5022 requirements could change based on the range of sections it encompasses
5023 and whether they need to be padded or aligned. */
5024 while (queue)
5025 {
5026 unsigned align = 0;
5027 bfd_vma padding = 0;
5028
5029 low = queue->sec->vma;
5030 high = queue->sec->vma + queue->sec->size;
5031
5032 if (!c64_valid_cap_range (&low, &high))
5033 {
5034 align = __builtin_ctzl (low);
5035
5036 if (queue->sec->alignment_power < align)
5037 queue->sec->alignment_power = align;
5038
5039 padding = high - queue->sec->vma - queue->sec->size;
5040
5041 if (queue->sec != pcc_high_sec)
5042 {
5043 c64_pad_section (queue->sec, padding);
5044 padding = 0;
5045 }
5046 }
5047
5048 /* If we have crossed all sections within the PCC range, set up alignment
5049 and padding for the PCC range. */
5050 if (pcc_high_sec != NULL && pcc_low_sec != NULL
5051 && (queue->next == NULL
5052 || queue->next->sec->vma > pcc_high_sec->vma))
5053 {
5054 /* Layout sections since it affects the final range of PCC. */
5055 (*htab->layout_sections_again) ();
5056
5fa80905
AC
5057 pcc_low = pcc_low_sec->vma;
5058 pcc_high = pcc_high_sec->vma + pcc_high_sec->size + padding;
7ff36d1a
SP
5059
5060 if (!c64_valid_cap_range (&pcc_low, &pcc_high))
5061 {
5062 align = __builtin_ctzl (pcc_low);
5063 if (pcc_low_sec->alignment_power < align)
5064 pcc_low_sec->alignment_power = align;
5065
5066 padding = pcc_high - pcc_high_sec->vma - pcc_high_sec->size;
5067 c64_pad_section (pcc_high_sec, padding);
5068 }
5069 }
5070
5071 (*htab->layout_sections_again) ();
5072
5073 struct sec_change_queue *queue_free = queue;
5074
5075 queue = queue->next;
5076 free (queue_free);
5077 }
5fa80905
AC
5078
5079 if (pcc_low_sec)
5080 {
5081 if (!pcc_high_sec)
5082 abort ();
5083 pcc_low = pcc_low_sec->vma;
5084 pcc_high = pcc_high_sec->vma + pcc_high_sec->size;
5085 }
7ff36d1a 5086}
4106101c 5087
a06ea964
NC
5088/* Determine and set the size of the stub section for a final link.
5089
5090 The basic idea here is to examine all the relocations looking for
50e192f0
SP
5091 PC-relative calls to a target that either needs a PE state change (A64 to
5092 C64 or vice versa) or in case of unconditional branches (B/BL), is
5093 unreachable. */
a06ea964
NC
5094
5095bfd_boolean
cec5225b 5096elfNN_aarch64_size_stubs (bfd *output_bfd,
a06ea964
NC
5097 bfd *stub_bfd,
5098 struct bfd_link_info *info,
5099 bfd_signed_vma group_size,
5100 asection * (*add_stub_section) (const char *,
5101 asection *),
5102 void (*layout_sections_again) (void))
5103{
5104 bfd_size_type stub_group_size;
5105 bfd_boolean stubs_always_before_branch;
5421cc6e 5106 bfd_boolean stub_changed = FALSE;
cec5225b 5107 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 5108 unsigned int num_erratum_835769_fixes = 0;
a06ea964
NC
5109
5110 /* Propagate mach to stub bfd, because it may not have been
5111 finalized when we created stub_bfd. */
5112 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5113 bfd_get_mach (output_bfd));
5114
5115 /* Stash our params away. */
5116 htab->stub_bfd = stub_bfd;
5117 htab->add_stub_section = add_stub_section;
5118 htab->layout_sections_again = layout_sections_again;
5119 stubs_always_before_branch = group_size < 0;
5120 if (group_size < 0)
5121 stub_group_size = -group_size;
5122 else
5123 stub_group_size = group_size;
5124
5125 if (stub_group_size == 1)
5126 {
5127 /* Default values. */
b9eead84 5128 /* AArch64 branch range is +-128MB. The value used is 1MB less. */
a06ea964
NC
5129 stub_group_size = 127 * 1024 * 1024;
5130 }
5131
5132 group_sections (htab, stub_group_size, stubs_always_before_branch);
5133
4106101c
MS
5134 (*htab->layout_sections_again) ();
5135
5421cc6e
MS
5136 if (htab->fix_erratum_835769)
5137 {
5138 bfd *input_bfd;
5139
5140 for (input_bfd = info->input_bfds;
5141 input_bfd != NULL; input_bfd = input_bfd->link.next)
8c803a2d
AM
5142 {
5143 if (!is_aarch64_elf (input_bfd)
5144 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5145 continue;
5146
5147 if (!_bfd_aarch64_erratum_835769_scan (input_bfd, info,
5148 &num_erratum_835769_fixes))
5149 return FALSE;
5150 }
5421cc6e 5151
4106101c
MS
5152 _bfd_aarch64_resize_stubs (htab);
5153 (*htab->layout_sections_again) ();
5154 }
5155
739b5c9c 5156 if (htab->fix_erratum_843419 != ERRAT_NONE)
4106101c
MS
5157 {
5158 bfd *input_bfd;
5159
5160 for (input_bfd = info->input_bfds;
5161 input_bfd != NULL;
5162 input_bfd = input_bfd->link.next)
5163 {
5164 asection *section;
5165
8c803a2d
AM
5166 if (!is_aarch64_elf (input_bfd)
5167 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5168 continue;
5169
4106101c
MS
5170 for (section = input_bfd->sections;
5171 section != NULL;
5172 section = section->next)
5173 if (!_bfd_aarch64_erratum_843419_scan (input_bfd, section, info))
5174 return FALSE;
5175 }
5176
5177 _bfd_aarch64_resize_stubs (htab);
5178 (*htab->layout_sections_again) ();
5421cc6e
MS
5179 }
5180
a06ea964
NC
5181 while (1)
5182 {
5183 bfd *input_bfd;
a06ea964 5184
9b9971aa
MS
5185 for (input_bfd = info->input_bfds;
5186 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC
5187 {
5188 Elf_Internal_Shdr *symtab_hdr;
5189 asection *section;
a06ea964 5190
8c803a2d
AM
5191 if (!is_aarch64_elf (input_bfd)
5192 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5193 continue;
5194
a06ea964
NC
5195 /* We'll need the symbol table in a second. */
5196 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5197 if (symtab_hdr->sh_info == 0)
5198 continue;
5199
5200 /* Walk over each section attached to the input bfd. */
5201 for (section = input_bfd->sections;
5202 section != NULL; section = section->next)
5203 {
5204 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5205
5206 /* If there aren't any relocs, then there's nothing more
5207 to do. */
5208 if ((section->flags & SEC_RELOC) == 0
5209 || section->reloc_count == 0
5210 || (section->flags & SEC_CODE) == 0)
5211 continue;
5212
5213 /* If this section is a link-once section that will be
5214 discarded, then don't create any stubs. */
5215 if (section->output_section == NULL
5216 || section->output_section->owner != output_bfd)
5217 continue;
5218
5219 /* Get the relocs. */
5220 internal_relocs
5221 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5222 NULL, info->keep_memory);
5223 if (internal_relocs == NULL)
5224 goto error_ret_free_local;
5225
5226 /* Now examine each relocation. */
5227 irela = internal_relocs;
5228 irelaend = irela + section->reloc_count;
5229 for (; irela < irelaend; irela++)
5230 {
5231 unsigned int r_type, r_indx;
50e192f0 5232 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
cec5225b 5233 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC
5234 asection *sym_sec;
5235 bfd_vma sym_value;
5236 bfd_vma destination;
cec5225b 5237 struct elf_aarch64_link_hash_entry *hash;
a06ea964
NC
5238 const char *sym_name;
5239 char *stub_name;
5240 const asection *id_sec;
5241 unsigned char st_type;
5242 bfd_size_type len;
50e192f0
SP
5243 unsigned branch_to_c64 = FALSE;
5244 const char *suffix;
a06ea964 5245
cec5225b
YZ
5246 r_type = ELFNN_R_TYPE (irela->r_info);
5247 r_indx = ELFNN_R_SYM (irela->r_info);
a06ea964
NC
5248
5249 if (r_type >= (unsigned int) R_AARCH64_end)
5250 {
5251 bfd_set_error (bfd_error_bad_value);
5252 error_ret_free_internal:
5253 if (elf_section_data (section)->relocs == NULL)
5254 free (internal_relocs);
5255 goto error_ret_free_local;
5256 }
5257
5258 /* Only look for stubs on unconditional branch and
5259 branch and link instructions. */
50e192f0 5260 if (!aarch64_branch_reloc_p (r_type))
a06ea964
NC
5261 continue;
5262
5263 /* Now determine the call target, its name, value,
5264 section. */
5265 sym_sec = NULL;
5266 sym_value = 0;
5267 destination = 0;
5268 hash = NULL;
5269 sym_name = NULL;
5270 if (r_indx < symtab_hdr->sh_info)
5271 {
5272 /* It's a local symbol. */
f0070c1e
SP
5273 Elf_Internal_Sym *sym =
5274 bfd_sym_from_r_symndx (&htab->root.sym_cache,
5275 input_bfd, r_indx);
5276 if (sym == NULL)
5277 goto error_ret_free_internal;
a06ea964 5278
50e192f0
SP
5279 branch_to_c64 |= (sym->st_target_internal
5280 & ST_BRANCH_TO_C64);
5281
f0070c1e
SP
5282 Elf_Internal_Shdr *hdr =
5283 elf_elfsections (input_bfd)[sym->st_shndx];
a06ea964 5284
a06ea964
NC
5285 sym_sec = hdr->bfd_section;
5286 if (!sym_sec)
5287 /* This is an undefined symbol. It can never
5288 be resolved. */
5289 continue;
5290
5291 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5292 sym_value = sym->st_value;
5293 destination = (sym_value + irela->r_addend
5294 + sym_sec->output_offset
5295 + sym_sec->output_section->vma);
5296 st_type = ELF_ST_TYPE (sym->st_info);
5297 sym_name
5298 = bfd_elf_string_from_elf_section (input_bfd,
5299 symtab_hdr->sh_link,
5300 sym->st_name);
50e192f0
SP
5301
5302 /* Get the interworking stub if needed. */
5303 stub_type = aarch64_interwork_stub (r_type,
5304 branch_to_c64);
a06ea964
NC
5305 }
5306 else
5307 {
5308 int e_indx;
50e192f0
SP
5309 struct elf_aarch64_link_hash_table *globals =
5310 elf_aarch64_hash_table (info);
a06ea964
NC
5311
5312 e_indx = r_indx - symtab_hdr->sh_info;
cec5225b 5313 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC
5314 elf_sym_hashes (input_bfd)[e_indx]);
5315
5316 while (hash->root.root.type == bfd_link_hash_indirect
5317 || hash->root.root.type == bfd_link_hash_warning)
cec5225b 5318 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC
5319 hash->root.root.u.i.link);
5320
50e192f0
SP
5321 /* Static executable. */
5322 if (globals->root.splt == NULL || hash == NULL
5323 || hash->root.plt.offset == (bfd_vma) - 1)
5324 {
5325 branch_to_c64 |= (hash->root.target_internal
5326 & ST_BRANCH_TO_C64);
5327 stub_type = aarch64_interwork_stub (r_type,
5328 branch_to_c64);
5329 }
5330
a06ea964
NC
5331 if (hash->root.root.type == bfd_link_hash_defined
5332 || hash->root.root.type == bfd_link_hash_defweak)
5333 {
a06ea964
NC
5334 sym_sec = hash->root.root.u.def.section;
5335 sym_value = hash->root.root.u.def.value;
5336 /* For a destination in a shared library,
5337 use the PLT stub as target address to
5338 decide whether a branch stub is
5339 needed. */
5340 if (globals->root.splt != NULL && hash != NULL
5341 && hash->root.plt.offset != (bfd_vma) - 1)
5342 {
5343 sym_sec = globals->root.splt;
5344 sym_value = hash->root.plt.offset;
5345 if (sym_sec->output_section != NULL)
5346 destination = (sym_value
5347 + sym_sec->output_offset
5348 +
5349 sym_sec->output_section->vma);
5350 }
5351 else if (sym_sec->output_section != NULL)
5352 destination = (sym_value + irela->r_addend
5353 + sym_sec->output_offset
5354 + sym_sec->output_section->vma);
5355 }
5356 else if (hash->root.root.type == bfd_link_hash_undefined
5357 || (hash->root.root.type
5358 == bfd_link_hash_undefweak))
5359 {
5360 /* For a shared library, use the PLT stub as
5361 target address to decide whether a long
5362 branch stub is needed.
5363 For absolute code, they cannot be handled. */
a06ea964
NC
5364
5365 if (globals->root.splt != NULL && hash != NULL
5366 && hash->root.plt.offset != (bfd_vma) - 1)
5367 {
5368 sym_sec = globals->root.splt;
5369 sym_value = hash->root.plt.offset;
5370 if (sym_sec->output_section != NULL)
5371 destination = (sym_value
5372 + sym_sec->output_offset
5373 +
5374 sym_sec->output_section->vma);
5375 }
5376 else
5377 continue;
5378 }
5379 else
5380 {
5381 bfd_set_error (bfd_error_bad_value);
5382 goto error_ret_free_internal;
5383 }
5384 st_type = ELF_ST_TYPE (hash->root.type);
5385 sym_name = hash->root.root.root.string;
5386 }
5387
5388 /* Determine what (if any) linker stub is needed. */
50e192f0
SP
5389 if (stub_type == aarch64_stub_none)
5390 stub_type = aarch64_type_of_stub (section, irela, sym_sec,
5391 st_type, destination);
5392
a06ea964
NC
5393 if (stub_type == aarch64_stub_none)
5394 continue;
5395
5396 /* Support for grouping stub sections. */
5397 id_sec = htab->stub_group[section->id].link_sec;
5398
5399 /* Get the name of this stub. */
cec5225b 5400 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, hash,
50e192f0 5401 irela, stub_type);
a06ea964
NC
5402 if (!stub_name)
5403 goto error_ret_free_internal;
5404
5405 stub_entry =
5406 aarch64_stub_hash_lookup (&htab->stub_hash_table,
5407 stub_name, FALSE, FALSE);
5408 if (stub_entry != NULL)
5409 {
5410 /* The proper stub has already been created. */
5411 free (stub_name);
3da64fe4
RA
5412 /* Always update this stub's target since it may have
5413 changed after layout. */
5414 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP
5415
5416 /* Set LSB for A64 to C64 branch. */
5417 if (branch_to_c64)
5418 stub_entry->target_value |= 1;
5419
a06ea964
NC
5420 continue;
5421 }
5422
ef857521
MS
5423 stub_entry = _bfd_aarch64_add_stub_entry_in_group
5424 (stub_name, section, htab);
a06ea964
NC
5425 if (stub_entry == NULL)
5426 {
5427 free (stub_name);
5428 goto error_ret_free_internal;
5429 }
5430
2f340668 5431 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP
5432 /* Set LSB for A64 to C64 branch. */
5433 if (branch_to_c64)
5434 stub_entry->target_value |= 1;
5435
a06ea964
NC
5436 stub_entry->target_section = sym_sec;
5437 stub_entry->stub_type = stub_type;
5438 stub_entry->h = hash;
5439 stub_entry->st_type = st_type;
5440
50e192f0
SP
5441 suffix = aarch64_lookup_stub_type_suffix (stub_type);
5442
a06ea964
NC
5443 if (sym_name == NULL)
5444 sym_name = "unnamed";
50e192f0
SP
5445 len = (sizeof (STUB_ENTRY_NAME) + strlen (sym_name)
5446 + strlen (suffix));
a06ea964
NC
5447 stub_entry->output_name = bfd_alloc (htab->stub_bfd, len);
5448 if (stub_entry->output_name == NULL)
5449 {
5450 free (stub_name);
5451 goto error_ret_free_internal;
5452 }
5453
5454 snprintf (stub_entry->output_name, len, STUB_ENTRY_NAME,
50e192f0 5455 sym_name, suffix);
a06ea964
NC
5456
5457 stub_changed = TRUE;
5458 }
5459
5460 /* We're done with the internal relocs, free them. */
5461 if (elf_section_data (section)->relocs == NULL)
5462 free (internal_relocs);
5463 }
5464 }
5465
5466 if (!stub_changed)
5467 break;
5468
13f622ec 5469 _bfd_aarch64_resize_stubs (htab);
a06ea964
NC
5470
5471 /* Ask the linker to do its stuff. */
5472 (*htab->layout_sections_again) ();
5473 stub_changed = FALSE;
5474 }
5475
5476 return TRUE;
5477
dc1e8a47 5478 error_ret_free_local:
a06ea964
NC
5479 return FALSE;
5480}
5481
5482/* Build all the stubs associated with the current output file. The
5483 stubs are kept in a hash table attached to the main linker hash
5484 table. We also set up the .plt entries for statically linked PIC
5485 functions here. This function is called via aarch64_elf_finish in the
5486 linker. */
5487
5488bfd_boolean
cec5225b 5489elfNN_aarch64_build_stubs (struct bfd_link_info *info)
a06ea964
NC
5490{
5491 asection *stub_sec;
5492 struct bfd_hash_table *table;
cec5225b 5493 struct elf_aarch64_link_hash_table *htab;
a06ea964 5494
cec5225b 5495 htab = elf_aarch64_hash_table (info);
a06ea964
NC
5496
5497 for (stub_sec = htab->stub_bfd->sections;
5498 stub_sec != NULL; stub_sec = stub_sec->next)
5499 {
5500 bfd_size_type size;
5501
5502 /* Ignore non-stub sections. */
5503 if (!strstr (stub_sec->name, STUB_SUFFIX))
5504 continue;
5505
5506 /* Allocate memory to hold the linker stubs. */
5507 size = stub_sec->size;
5508 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
5509 if (stub_sec->contents == NULL && size != 0)
5510 return FALSE;
5511 stub_sec->size = 0;
61865519 5512
9a2ebffd
JW
5513 /* Add a branch around the stub section, and a nop, to keep it 8 byte
5514 aligned, as long branch stubs contain a 64-bit address. */
61865519 5515 bfd_putl32 (0x14000000 | (size >> 2), stub_sec->contents);
9a2ebffd
JW
5516 bfd_putl32 (INSN_NOP, stub_sec->contents + 4);
5517 stub_sec->size += 8;
a06ea964
NC
5518 }
5519
5520 /* Build the stubs as directed by the stub hash table. */
5521 table = &htab->stub_hash_table;
50e192f0
SP
5522
5523 bfd_error_type save_error = bfd_get_error ();
5524 bfd_set_error (bfd_error_no_error);
a06ea964
NC
5525 bfd_hash_traverse (table, aarch64_build_one_stub, info);
5526
50e192f0
SP
5527 if (bfd_get_error () != bfd_error_no_error)
5528 return FALSE;
5529
5530 bfd_set_error (save_error);
5531
a06ea964
NC
5532 return TRUE;
5533}
5534
5535
5536/* Add an entry to the code/data map for section SEC. */
5537
5538static void
f0070c1e
SP
5539elfNN_aarch64_section_map_add (bfd *abfd, asection *sec, char type,
5540 bfd_vma vma)
a06ea964
NC
5541{
5542 struct _aarch64_elf_section_data *sec_data =
cec5225b 5543 elf_aarch64_section_data (sec);
a06ea964
NC
5544 unsigned int newidx;
5545
f0070c1e
SP
5546 /* The aarch64 section hook was not called for this section. */
5547 if (!sec_data->elf.is_target_section_data)
5548 {
5549 struct _aarch64_elf_section_data *newdata =
5550 bfd_zalloc (abfd, sizeof (*newdata));
5551
5552 if (newdata == NULL)
5553 return;
5554
5555 newdata->elf = sec_data->elf;
5556 newdata->elf.is_target_section_data = TRUE;
5557 free (sec_data);
5558 sec->used_by_bfd = sec_data = newdata;
5559 }
5560
a06ea964
NC
5561 if (sec_data->map == NULL)
5562 {
cec5225b 5563 sec_data->map = bfd_malloc (sizeof (elf_aarch64_section_map));
a06ea964
NC
5564 sec_data->mapcount = 0;
5565 sec_data->mapsize = 1;
5566 }
5567
5568 newidx = sec_data->mapcount++;
5569
5570 if (sec_data->mapcount > sec_data->mapsize)
5571 {
5572 sec_data->mapsize *= 2;
5573 sec_data->map = bfd_realloc_or_free
cec5225b 5574 (sec_data->map, sec_data->mapsize * sizeof (elf_aarch64_section_map));
a06ea964
NC
5575 }
5576
5577 if (sec_data->map)
5578 {
5579 sec_data->map[newidx].vma = vma;
5580 sec_data->map[newidx].type = type;
5581 }
5582}
5583
5584
5585/* Initialise maps of insn/data for input BFDs. */
5586void
7ff36d1a 5587bfd_elfNN_aarch64_init_maps (bfd *abfd, struct bfd_link_info *info)
a06ea964
NC
5588{
5589 Elf_Internal_Sym *isymbuf;
5590 Elf_Internal_Shdr *hdr;
5591 unsigned int i, localsyms;
5592
5593 /* Make sure that we are dealing with an AArch64 elf binary. */
5594 if (!is_aarch64_elf (abfd))
5595 return;
5596
f0070c1e
SP
5597 if (elf_aarch64_tdata (abfd)->secmaps_initialised)
5598 return;
5599
a06ea964 5600 if ((abfd->flags & DYNAMIC) != 0)
68fcca92 5601 return;
a06ea964
NC
5602
5603 hdr = &elf_symtab_hdr (abfd);
5604 localsyms = hdr->sh_info;
5605
5606 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5607 should contain the number of local symbols, which should come before any
5608 global symbols. Mapping symbols are always local. */
5609 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, NULL);
5610
5611 /* No internal symbols read? Skip this BFD. */
5612 if (isymbuf == NULL)
5613 return;
5614
7ff36d1a
SP
5615 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table ((info));
5616
a06ea964
NC
5617 for (i = 0; i < localsyms; i++)
5618 {
5619 Elf_Internal_Sym *isym = &isymbuf[i];
5620 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5621 const char *name;
5622
5623 if (sec != NULL && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5624 {
5625 name = bfd_elf_string_from_elf_section (abfd,
5626 hdr->sh_link,
5627 isym->st_name);
5628
5629 if (bfd_is_aarch64_special_symbol_name
5630 (name, BFD_AARCH64_SPECIAL_SYM_TYPE_MAP))
7ff36d1a
SP
5631 {
5632 elfNN_aarch64_section_map_add (abfd, sec, name[1],
5633 isym->st_value);
5634 if (!htab->c64_output && name[1] == 'c')
5635 htab->c64_output = TRUE;
5636 }
a06ea964
NC
5637 }
5638 }
f0070c1e 5639 elf_aarch64_tdata (abfd)->secmaps_initialised = TRUE;
a06ea964
NC
5640}
5641
37c18eed
SD
5642static void
5643setup_plt_values (struct bfd_link_info *link_info,
5644 aarch64_plt_type plt_type)
5645{
5646 struct elf_aarch64_link_hash_table *globals;
5647 globals = elf_aarch64_hash_table (link_info);
5648
e19e9199
SP
5649 /* Set up plt stubs in case we need C64 PLT. Override BTI/PAC since they're
5650 not compatible. PLT stub sizes are the same as the default ones. */
5651 if (globals->c64_rel)
5652 {
5653 if (plt_type != PLT_NORMAL)
5654 _bfd_error_handler
5655 (_("ignoring C64-incompatible extensions: %s"),
5656 (plt_type == PLT_BTI_PAC ? "BTI, PAC"
5657 : plt_type == PLT_BTI ? "BTI" : "PAC"));
5658
5659 globals->plt0_entry = elfNN_c64_small_plt0_entry;
5660 globals->plt_entry = elfNN_c64_small_plt_entry;
5661 return;
5662 }
5663
1dbade74
SD
5664 if (plt_type == PLT_BTI_PAC)
5665 {
68bb0359 5666 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
1dbade74
SD
5667
5668 /* Only in ET_EXEC we need PLTn with BTI. */
5669 if (bfd_link_pde (link_info))
5670 {
5671 globals->plt_entry_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
5672 globals->plt_entry = elfNN_aarch64_small_plt_bti_pac_entry;
5673 }
5674 else
5675 {
5676 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
5677 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
5678 }
5679 }
5680 else if (plt_type == PLT_BTI)
37c18eed 5681 {
37c18eed 5682 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
37c18eed
SD
5683
5684 /* Only in ET_EXEC we need PLTn with BTI. */
5685 if (bfd_link_pde (link_info))
5686 {
5687 globals->plt_entry_size = PLT_BTI_SMALL_ENTRY_SIZE;
5688 globals->plt_entry = elfNN_aarch64_small_plt_bti_entry;
5689 }
5690 }
1dbade74
SD
5691 else if (plt_type == PLT_PAC)
5692 {
1dbade74
SD
5693 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
5694 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
5695 }
37c18eed
SD
5696}
5697
a06ea964
NC
5698/* Set option values needed during linking. */
5699void
cec5225b 5700bfd_elfNN_aarch64_set_options (struct bfd *output_bfd,
a06ea964
NC
5701 struct bfd_link_info *link_info,
5702 int no_enum_warn,
68fcca92 5703 int no_wchar_warn, int pic_veneer,
4106101c 5704 int fix_erratum_835769,
739b5c9c 5705 erratum_84319_opts fix_erratum_843419,
37c18eed
SD
5706 int no_apply_dynamic_relocs,
5707 aarch64_bti_pac_info bp_info)
a06ea964 5708{
cec5225b 5709 struct elf_aarch64_link_hash_table *globals;
a06ea964 5710
cec5225b 5711 globals = elf_aarch64_hash_table (link_info);
a06ea964 5712 globals->pic_veneer = pic_veneer;
68fcca92 5713 globals->fix_erratum_835769 = fix_erratum_835769;
739b5c9c
TC
5714 /* If the default options are used, then ERRAT_ADR will be set by default
5715 which will enable the ADRP->ADR workaround for the erratum 843419
5716 workaround. */
4106101c 5717 globals->fix_erratum_843419 = fix_erratum_843419;
1f56df9d 5718 globals->no_apply_dynamic_relocs = no_apply_dynamic_relocs;
a1bdea65 5719 globals->c64_rel = 0;
a06ea964
NC
5720
5721 BFD_ASSERT (is_aarch64_elf (output_bfd));
5722 elf_aarch64_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
5723 elf_aarch64_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
37c18eed
SD
5724
5725 switch (bp_info.bti_type)
5726 {
5727 case BTI_WARN:
5728 elf_aarch64_tdata (output_bfd)->no_bti_warn = 0;
5729 elf_aarch64_tdata (output_bfd)->gnu_and_prop
5730 |= GNU_PROPERTY_AARCH64_FEATURE_1_BTI;
5731 break;
5732
5733 default:
5734 break;
5735 }
5736 elf_aarch64_tdata (output_bfd)->plt_type = bp_info.plt_type;
f0070c1e 5737 elf_aarch64_tdata (output_bfd)->secmaps_initialised = FALSE;
a06ea964
NC
5738}
5739
a06ea964
NC
5740static bfd_vma
5741aarch64_calculate_got_entry_vma (struct elf_link_hash_entry *h,
cec5225b 5742 struct elf_aarch64_link_hash_table
a06ea964
NC
5743 *globals, struct bfd_link_info *info,
5744 bfd_vma value, bfd *output_bfd,
5745 bfd_boolean *unresolved_reloc_p)
5746{
5747 bfd_vma off = (bfd_vma) - 1;
5748 asection *basegot = globals->root.sgot;
5749 bfd_boolean dyn = globals->root.dynamic_sections_created;
5750
5751 if (h != NULL)
5752 {
a6bb11b2 5753 BFD_ASSERT (basegot != NULL);
a06ea964
NC
5754 off = h->got.offset;
5755 BFD_ASSERT (off != (bfd_vma) - 1);
0e1862bb
L
5756 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5757 || (bfd_link_pic (info)
a06ea964
NC
5758 && SYMBOL_REFERENCES_LOCAL (info, h))
5759 || (ELF_ST_VISIBILITY (h->other)
5760 && h->root.type == bfd_link_hash_undefweak))
5761 {
5762 /* This is actually a static link, or it is a -Bsymbolic link
5763 and the symbol is defined locally. We must initialize this
5764 entry in the global offset table. Since the offset must
a6bb11b2
YZ
5765 always be a multiple of 8 (4 in the case of ILP32), we use
5766 the least significant bit to record whether we have
5767 initialized it already.
a06ea964
NC
5768 When doing a dynamic link, we create a .rel(a).got relocation
5769 entry to initialize the value. This is done in the
5770 finish_dynamic_symbol routine. */
5771 if ((off & 1) != 0)
5772 off &= ~1;
5773 else
5774 {
cec5225b 5775 bfd_put_NN (output_bfd, value, basegot->contents + off);
a06ea964
NC
5776 h->got.offset |= 1;
5777 }
5778 }
5779 else
5780 *unresolved_reloc_p = FALSE;
5781
5782 off = off + basegot->output_section->vma + basegot->output_offset;
5783 }
5784
5785 return off;
5786}
5787
5788/* Change R_TYPE to a more efficient access model where possible,
5789 return the new reloc type. */
5790
a6bb11b2
YZ
5791static bfd_reloc_code_real_type
5792aarch64_tls_transition_without_check (bfd_reloc_code_real_type r_type,
4ca9b406
SP
5793 struct bfd_link_info *info,
5794 struct elf_link_hash_entry *h,
5795 bfd_boolean morello_reloc)
a06ea964
NC
5796{
5797 bfd_boolean is_local = h == NULL;
a6bb11b2 5798
a06ea964
NC
5799 switch (r_type)
5800 {
4ca9b406
SP
5801 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
5802 return (is_local || !bfd_link_pic (info)
5803 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5804 : r_type);
5805
a6bb11b2 5806 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 5807 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
a6bb11b2
YZ
5808 return (is_local
5809 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5810 : BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21);
5811
389b8029
MS
5812 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
5813 return (is_local
5814 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5815 : r_type);
5816
1ada945d
MS
5817 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
5818 return (is_local
5819 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5820 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
5821
0484b454
RL
5822 case BFD_RELOC_AARCH64_TLSDESC_LDR:
5823 return (is_local
5824 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5825 : BFD_RELOC_AARCH64_NONE);
5826
5827 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
5828 return (is_local
5829 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
5830 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC);
5831
5832 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
5833 return (is_local
5834 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
5835 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1);
5836
4ca9b406
SP
5837 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
5838 return ((is_local || !bfd_link_pie (info)
5839 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type));
5840
a6bb11b2 5841 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
ce336788 5842 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2
YZ
5843 return (is_local
5844 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5845 : BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC);
5846
5847 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
5848 return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 : r_type;
5849
5850 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
5851 return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type;
5852
043bf05a
MS
5853 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
5854 return r_type;
5855
3c12b054
MS
5856 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
5857 return (is_local
5858 ? BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
5859 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
5860
4ca9b406
SP
5861 case BFD_RELOC_MORELLO_TLSDESC_CALL:
5862 return ((is_local || !bfd_link_pie (info))
5863 ? BFD_RELOC_AARCH64_NONE : r_type);
5864
f955cccf 5865 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406
SP
5866 if (morello_reloc && !is_local && bfd_link_pie (info))
5867 return r_type;
5868 /* Fall through. */
5869 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 5870 case BFD_RELOC_AARCH64_TLSDESC_CALL:
4ca9b406
SP
5871 /* Instructions with these relocations will be fully resolved during the
5872 transition into either a NOP in the A64 case or movk and add in
5873 C64. */
a6bb11b2
YZ
5874 return BFD_RELOC_AARCH64_NONE;
5875
259364ad
JW
5876 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
5877 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
5878 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
5879 return is_local ? BFD_RELOC_AARCH64_NONE : r_type;
5880
ac734732
RL
5881#if ARCH_SIZE == 64
5882 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
5883 return is_local
5884 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
5885 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
5886
5887 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
5888 return is_local
5889 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
5890 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
5891#endif
5892
a6bb11b2
YZ
5893 default:
5894 break;
a06ea964
NC
5895 }
5896
5897 return r_type;
5898}
5899
5900static unsigned int
a6bb11b2 5901aarch64_reloc_got_type (bfd_reloc_code_real_type r_type)
a06ea964
NC
5902{
5903 switch (r_type)
5904 {
a6bb11b2
YZ
5905 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
5906 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 5907 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 5908 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 5909 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 5910 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 5911 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 5912 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 5913 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a06ea964
NC
5914 return GOT_NORMAL;
5915
a1bdea65
SP
5916 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
5917 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
5918 return GOT_CAP;
5919
ce336788 5920 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 5921 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 5922 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 5923 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 5924 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 5925 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 5926 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 5927 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
5928 return GOT_TLS_GD;
5929
4ca9b406
SP
5930 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
5931 case BFD_RELOC_MORELLO_TLSDESC_CALL:
5932 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
5933 return GOT_TLSDESC_GD | GOT_CAP;
5934
0484b454 5935 case BFD_RELOC_AARCH64_TLSDESC_ADD:
f955cccf 5936 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 5937 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 5938 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 5939 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a6bb11b2 5940 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 5941 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 5942 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL
5943 case BFD_RELOC_AARCH64_TLSDESC_LDR:
5944 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
5945 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC
5946 return GOT_TLSDESC_GD;
5947
a6bb11b2 5948 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 5949 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 5950 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 5951 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL
5952 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
5953 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC
5954 return GOT_TLS_IE;
5955
a6bb11b2
YZ
5956 default:
5957 break;
a06ea964
NC
5958 }
5959 return GOT_UNKNOWN;
5960}
5961
5962static bfd_boolean
5963aarch64_can_relax_tls (bfd *input_bfd,
5964 struct bfd_link_info *info,
4ca9b406 5965 const Elf_Internal_Rela *rel,
a06ea964
NC
5966 struct elf_link_hash_entry *h,
5967 unsigned long r_symndx)
5968{
5969 unsigned int symbol_got_type;
5970 unsigned int reloc_got_type;
5971
4ca9b406
SP
5972 bfd_reloc_code_real_type bfd_r_type
5973 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
5974 ELFNN_R_TYPE (rel->r_info));
5975
5976 if (! IS_AARCH64_TLS_RELAX_RELOC (bfd_r_type))
a06ea964
NC
5977 return FALSE;
5978
cec5225b 5979 symbol_got_type = elfNN_aarch64_symbol_got_type (h, input_bfd, r_symndx);
4ca9b406 5980 reloc_got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC
5981
5982 if (symbol_got_type == GOT_TLS_IE && GOT_TLS_GD_ANY_P (reloc_got_type))
5983 return TRUE;
5984
6dda7875 5985 if (!bfd_link_executable (info))
a06ea964
NC
5986 return FALSE;
5987
5988 if (h && h->root.type == bfd_link_hash_undefweak)
5989 return FALSE;
5990
5991 return TRUE;
5992}
5993
a6bb11b2
YZ
5994/* Given the relocation code R_TYPE, return the relaxed bfd reloc
5995 enumerator. */
5996
5997static bfd_reloc_code_real_type
a06ea964
NC
5998aarch64_tls_transition (bfd *input_bfd,
5999 struct bfd_link_info *info,
4ca9b406 6000 const Elf_Internal_Rela *rel,
a06ea964
NC
6001 struct elf_link_hash_entry *h,
6002 unsigned long r_symndx)
6003{
a6bb11b2 6004 bfd_reloc_code_real_type bfd_r_type
4ca9b406
SP
6005 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
6006 ELFNN_R_TYPE (rel->r_info));
6007
6008 if (! aarch64_can_relax_tls (input_bfd, info, rel, h, r_symndx))
6009 return bfd_r_type;
a06ea964 6010
4ca9b406
SP
6011 bfd_boolean morello_reloc = (bfd_r_type == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
6012 && (ELFNN_R_TYPE (rel[1].r_info)
6013 == MORELLO_R (TLSDESC_CALL)));
6014
6015 /* GD -> IE is not supported for Morello TLSDESC yet. We do however allow
6016 lowering of GD -> LE for static non-pie executables. XXX It ought to be
6017 safe to do this for A64 as well but it is not implemented yet. */
6018 if (h != NULL && morello_reloc && bfd_link_pie (info))
a6bb11b2
YZ
6019 return bfd_r_type;
6020
4ca9b406
SP
6021 return aarch64_tls_transition_without_check (bfd_r_type, info, h,
6022 morello_reloc);
a06ea964
NC
6023}
6024
6025/* Return the base VMA address which should be subtracted from real addresses
a6bb11b2 6026 when resolving R_AARCH64_TLS_DTPREL relocation. */
a06ea964
NC
6027
6028static bfd_vma
6029dtpoff_base (struct bfd_link_info *info)
6030{
6031 /* If tls_sec is NULL, we should have signalled an error already. */
6032 BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL);
6033 return elf_hash_table (info)->tls_sec->vma;
6034}
6035
a06ea964
NC
6036/* Return the base VMA address which should be subtracted from real addresses
6037 when resolving R_AARCH64_TLS_GOTTPREL64 relocations. */
6038
6039static bfd_vma
6040tpoff_base (struct bfd_link_info *info)
6041{
6042 struct elf_link_hash_table *htab = elf_hash_table (info);
6043
6044 /* If tls_sec is NULL, we should have signalled an error already. */
ac21917f 6045 BFD_ASSERT (htab->tls_sec != NULL);
a06ea964
NC
6046
6047 bfd_vma base = align_power ((bfd_vma) TCB_SIZE,
6048 htab->tls_sec->alignment_power);
6049 return htab->tls_sec->vma - base;
6050}
6051
6052static bfd_vma *
6053symbol_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6054 unsigned long r_symndx)
6055{
6056 /* Calculate the address of the GOT entry for symbol
6057 referred to in h. */
6058 if (h != NULL)
6059 return &h->got.offset;
6060 else
6061 {
6062 /* local symbol */
6063 struct elf_aarch64_local_symbol *l;
6064
cec5225b 6065 l = elf_aarch64_locals (input_bfd);
a06ea964
NC
6066 return &l[r_symndx].got_offset;
6067 }
6068}
6069
6070static void
6071symbol_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6072 unsigned long r_symndx)
6073{
6074 bfd_vma *p;
6075 p = symbol_got_offset_ref (input_bfd, h, r_symndx);
6076 *p |= 1;
6077}
6078
6079static int
6080symbol_got_offset_mark_p (bfd *input_bfd, struct elf_link_hash_entry *h,
6081 unsigned long r_symndx)
6082{
6083 bfd_vma value;
6084 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6085 return value & 1;
6086}
6087
6088static bfd_vma
6089symbol_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6090 unsigned long r_symndx)
6091{
6092 bfd_vma value;
6093 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6094 value &= ~1;
6095 return value;
6096}
6097
6098static bfd_vma *
6099symbol_tlsdesc_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6100 unsigned long r_symndx)
6101{
6102 /* Calculate the address of the GOT entry for symbol
6103 referred to in h. */
6104 if (h != NULL)
6105 {
cec5225b
YZ
6106 struct elf_aarch64_link_hash_entry *eh;
6107 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC
6108 return &eh->tlsdesc_got_jump_table_offset;
6109 }
6110 else
6111 {
6112 /* local symbol */
6113 struct elf_aarch64_local_symbol *l;
6114
cec5225b 6115 l = elf_aarch64_locals (input_bfd);
a06ea964
NC
6116 return &l[r_symndx].tlsdesc_got_jump_table_offset;
6117 }
6118}
6119
6120static void
6121symbol_tlsdesc_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6122 unsigned long r_symndx)
6123{
6124 bfd_vma *p;
6125 p = symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6126 *p |= 1;
6127}
6128
6129static int
6130symbol_tlsdesc_got_offset_mark_p (bfd *input_bfd,
6131 struct elf_link_hash_entry *h,
6132 unsigned long r_symndx)
6133{
6134 bfd_vma value;
6135 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6136 return value & 1;
6137}
6138
6139static bfd_vma
6140symbol_tlsdesc_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6141 unsigned long r_symndx)
6142{
6143 bfd_vma value;
6144 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6145 value &= ~1;
6146 return value;
6147}
6148
68fcca92
JW
6149/* Data for make_branch_to_erratum_835769_stub(). */
6150
6151struct erratum_835769_branch_to_stub_data
6152{
4106101c 6153 struct bfd_link_info *info;
68fcca92
JW
6154 asection *output_section;
6155 bfd_byte *contents;
6156};
6157
6158/* Helper to insert branches to erratum 835769 stubs in the right
6159 places for a particular section. */
6160
6161static bfd_boolean
6162make_branch_to_erratum_835769_stub (struct bfd_hash_entry *gen_entry,
6163 void *in_arg)
6164{
6165 struct elf_aarch64_stub_hash_entry *stub_entry;
6166 struct erratum_835769_branch_to_stub_data *data;
6167 bfd_byte *contents;
6168 unsigned long branch_insn = 0;
6169 bfd_vma veneered_insn_loc, veneer_entry_loc;
6170 bfd_signed_vma branch_offset;
6171 unsigned int target;
6172 bfd *abfd;
6173
6174 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6175 data = (struct erratum_835769_branch_to_stub_data *) in_arg;
6176
6177 if (stub_entry->target_section != data->output_section
6178 || stub_entry->stub_type != aarch64_stub_erratum_835769_veneer)
6179 return TRUE;
6180
6181 contents = data->contents;
6182 veneered_insn_loc = stub_entry->target_section->output_section->vma
6183 + stub_entry->target_section->output_offset
6184 + stub_entry->target_value;
6185 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6186 + stub_entry->stub_sec->output_offset
6187 + stub_entry->stub_offset;
6188 branch_offset = veneer_entry_loc - veneered_insn_loc;
6189
6190 abfd = stub_entry->target_section->owner;
6191 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6192 _bfd_error_handler
90b6238f 6193 (_("%pB: error: erratum 835769 stub out "
4eca0228 6194 "of range (input file too large)"), abfd);
68fcca92
JW
6195
6196 target = stub_entry->target_value;
6197 branch_insn = 0x14000000;
6198 branch_offset >>= 2;
6199 branch_offset &= 0x3ffffff;
6200 branch_insn |= branch_offset;
6201 bfd_putl32 (branch_insn, &contents[target]);
6202
6203 return TRUE;
6204}
6205
4106101c
MS
6206
6207static bfd_boolean
6208_bfd_aarch64_erratum_843419_branch_to_stub (struct bfd_hash_entry *gen_entry,
6209 void *in_arg)
6210{
6211 struct elf_aarch64_stub_hash_entry *stub_entry
6212 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6213 struct erratum_835769_branch_to_stub_data *data
6214 = (struct erratum_835769_branch_to_stub_data *) in_arg;
6215 struct bfd_link_info *info;
6216 struct elf_aarch64_link_hash_table *htab;
6217 bfd_byte *contents;
6218 asection *section;
6219 bfd *abfd;
6220 bfd_vma place;
6221 uint32_t insn;
6222
6223 info = data->info;
6224 contents = data->contents;
6225 section = data->output_section;
6226
6227 htab = elf_aarch64_hash_table (info);
6228
6229 if (stub_entry->target_section != section
6230 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer)
6231 return TRUE;
6232
739b5c9c
TC
6233 BFD_ASSERT (((htab->fix_erratum_843419 & ERRAT_ADRP) && stub_entry->stub_sec)
6234 || (htab->fix_erratum_843419 & ERRAT_ADR));
6235
6236 /* Only update the stub section if we have one. We should always have one if
6237 we're allowed to use the ADRP errata workaround, otherwise it is not
6238 required. */
6239 if (stub_entry->stub_sec)
6240 {
6241 insn = bfd_getl32 (contents + stub_entry->target_value);
6242 bfd_putl32 (insn,
6243 stub_entry->stub_sec->contents + stub_entry->stub_offset);
6244 }
4106101c
MS
6245
6246 place = (section->output_section->vma + section->output_offset
6247 + stub_entry->adrp_offset);
6248 insn = bfd_getl32 (contents + stub_entry->adrp_offset);
6249
9fca35fc 6250 if (!_bfd_aarch64_adrp_p (insn))
4106101c
MS
6251 abort ();
6252
6253 bfd_signed_vma imm =
6254 (_bfd_aarch64_sign_extend
6255 ((bfd_vma) _bfd_aarch64_decode_adrp_imm (insn) << 12, 33)
6256 - (place & 0xfff));
6257
739b5c9c 6258 if ((htab->fix_erratum_843419 & ERRAT_ADR)
4106101c
MS
6259 && (imm >= AARCH64_MIN_ADRP_IMM && imm <= AARCH64_MAX_ADRP_IMM))
6260 {
92504105 6261 insn = (_bfd_aarch64_reencode_adr_imm (AARCH64_ADR_OP, imm, 0)
4106101c
MS
6262 | AARCH64_RT (insn));
6263 bfd_putl32 (insn, contents + stub_entry->adrp_offset);
739b5c9c
TC
6264 /* Stub is not needed, don't map it out. */
6265 stub_entry->stub_type = aarch64_stub_none;
4106101c 6266 }
739b5c9c 6267 else if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS
6268 {
6269 bfd_vma veneered_insn_loc;
6270 bfd_vma veneer_entry_loc;
6271 bfd_signed_vma branch_offset;
6272 uint32_t branch_insn;
6273
6274 veneered_insn_loc = stub_entry->target_section->output_section->vma
6275 + stub_entry->target_section->output_offset
6276 + stub_entry->target_value;
6277 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6278 + stub_entry->stub_sec->output_offset
6279 + stub_entry->stub_offset;
6280 branch_offset = veneer_entry_loc - veneered_insn_loc;
6281
6282 abfd = stub_entry->target_section->owner;
6283 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6284 _bfd_error_handler
90b6238f 6285 (_("%pB: error: erratum 843419 stub out "
4106101c
MS
6286 "of range (input file too large)"), abfd);
6287
6288 branch_insn = 0x14000000;
6289 branch_offset >>= 2;
6290 branch_offset &= 0x3ffffff;
6291 branch_insn |= branch_offset;
6292 bfd_putl32 (branch_insn, contents + stub_entry->target_value);
6293 }
739b5c9c
TC
6294 else
6295 {
6296 abfd = stub_entry->target_section->owner;
6297 _bfd_error_handler
64672071 6298 (_("%pB: error: erratum 843419 immediate 0x%" BFD_VMA_FMT "x "
739b5c9c
TC
6299 "out of range for ADR (input file too large) and "
6300 "--fix-cortex-a53-843419=adr used. Run the linker with "
6301 "--fix-cortex-a53-843419=full instead"), abfd, imm);
6302 bfd_set_error (bfd_error_bad_value);
6303 /* This function is called inside a hashtable traversal and the error
6304 handlers called above turn into non-fatal errors. Which means this
6305 case ld returns an exit code 0 and also produces a broken object file.
6306 To prevent this, issue a hard abort. */
6307 BFD_FAIL ();
6308 }
4106101c
MS
6309 return TRUE;
6310}
6311
6312
68fcca92
JW
6313static bfd_boolean
6314elfNN_aarch64_write_section (bfd *output_bfd ATTRIBUTE_UNUSED,
6315 struct bfd_link_info *link_info,
6316 asection *sec,
6317 bfd_byte *contents)
6318
6319{
6320 struct elf_aarch64_link_hash_table *globals =
f872121a 6321 elf_aarch64_hash_table (link_info);
68fcca92
JW
6322
6323 if (globals == NULL)
6324 return FALSE;
6325
6326 /* Fix code to point to erratum 835769 stubs. */
6327 if (globals->fix_erratum_835769)
6328 {
6329 struct erratum_835769_branch_to_stub_data data;
6330
4106101c 6331 data.info = link_info;
68fcca92
JW
6332 data.output_section = sec;
6333 data.contents = contents;
6334 bfd_hash_traverse (&globals->stub_hash_table,
6335 make_branch_to_erratum_835769_stub, &data);
6336 }
6337
4106101c
MS
6338 if (globals->fix_erratum_843419)
6339 {
6340 struct erratum_835769_branch_to_stub_data data;
6341
6342 data.info = link_info;
6343 data.output_section = sec;
6344 data.contents = contents;
6345 bfd_hash_traverse (&globals->stub_hash_table,
6346 _bfd_aarch64_erratum_843419_branch_to_stub, &data);
6347 }
6348
68fcca92
JW
6349 return FALSE;
6350}
6351
2aff25ba
JW
6352/* Return TRUE if RELOC is a relocation against the base of GOT table. */
6353
6354static bfd_boolean
6355aarch64_relocation_aginst_gp_p (bfd_reloc_code_real_type reloc)
6356{
6357 return (reloc == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
6358 || reloc == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
6359 || reloc == BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
6360 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
6361 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G1);
6362}
6363
40bbb79e
SP
6364/* Build capability meta data, i.e. size and permissions for a capability. */
6365
6366static bfd_vma
6367cap_meta (size_t size, const asection *sec)
6368{
6369
6370 if (size >= (1ULL << 56))
6371 return (bfd_vma) -1;
6372
b235f0e0
MM
6373 /* N.b. We are only ever using this function for Morello.
6374 Morello is little-endian.
6375 We are returning a 64bit sized integer.
6376 The format this metadata is supposed to fit is
6377 | 56 bit length | 8 bit permissions |
6378 This means that (in little endian layout) we need to put the 56 bit size
6379 in the *lower* bits of the uint64_t. */
6380 uint64_t flags = 0;
40bbb79e 6381 if (sec->flags & SEC_CODE)
b235f0e0
MM
6382 flags = 4;
6383 else if (sec->flags & SEC_READONLY
6384 || sec->flags & SEC_ROM)
6385 flags = 1;
6386 else if (sec->flags & SEC_ALLOC)
6387 flags = 2;
40bbb79e
SP
6388
6389 /* We should always be able to derive a valid set of permissions
6390 from the section flags. */
b235f0e0
MM
6391 if (flags == 0)
6392 abort ();
6393 return size | (flags << 56);
40bbb79e
SP
6394}
6395
5fa80905
AC
6396enum c64_section_perm_type {
6397 C64_SYM_UNKNOWN = 0,
6398 C64_SYM_STANDARD,
6399 C64_SYM_LINKER_DEF,
6400 C64_SYM_LDSCRIPT_DEF,
6401 C64_SYM_LDSCRIPT_START,
6402};
6403
6404static enum c64_section_perm_type
6405c64_symbol_section_adjustment (struct elf_link_hash_entry *h, bfd_vma value,
6406 asection *sym_sec, asection **ret_sec,
6407 struct bfd_link_info *info)
6408{
6409 if (!sym_sec)
6410 return C64_SYM_UNKNOWN;
6411
6412 *ret_sec = sym_sec;
6413 if (!h)
6414 return C64_SYM_STANDARD;
6415
6416 /* Linker defined symbols are always at the start of the section they
6417 track. */
6418 if (h->root.linker_def)
6419 return C64_SYM_LINKER_DEF;
6420 else if (h->root.ldscript_def)
6421 {
6422 const char *name = h->root.root.string;
6423 size_t len = strlen (name);
6424
6425 bfd_vma size = sym_sec->size - (value - sym_sec->vma);
6426 /* The special case: the symbol is at the end of the section.
6427 This could either mean that it is an end symbol or it is the
6428 start of the output section following the symbol. We try to
6429 guess if it is a start of the next section by reading its
6430 name. This is a compatibility hack, ideally linker scripts
6431 should be written such that start symbols are defined within
6432 the output section it intends to track. */
6433 if (size == 0
6434 && (len > 8 && name[0] == '_' && name[1] == '_'
6435 && (!strncmp (name + 2, "start_", 6)
6436 || !strcmp (name + len - 6, "_start"))))
6437 {
6438 asection *s = bfd_sections_find_if (info->output_bfd,
6439 section_start_symbol,
6440 &value);
6441 if (s != NULL)
6442 {
6443 *ret_sec = s;
6444 return C64_SYM_LDSCRIPT_START;
6445 }
6446 }
6447 return C64_SYM_LDSCRIPT_DEF;
6448 }
6449 return C64_SYM_STANDARD;
6450}
6451
40bbb79e
SP
6452static bfd_reloc_status_type
6453c64_fixup_frag (bfd *input_bfd, struct bfd_link_info *info,
5fa80905
AC
6454 Elf_Internal_Sym *sym, struct elf_link_hash_entry *h,
6455 asection *sym_sec, bfd_byte *frag_loc, bfd_vma value,
6456 bfd_signed_vma addend)
40bbb79e 6457{
5fa80905
AC
6458 BFD_ASSERT (h || sym);
6459 bfd_vma size = sym ? sym->st_size : h->size;
40bbb79e
SP
6460 asection *perm_sec = sym_sec;
6461 bfd_boolean bounds_ok = FALSE;
6462
7401203c
MM
6463 const char *sym_name;
6464
6465 if (sym)
6466 {
6467 Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (input_bfd);
6468 sym_name = (bfd_elf_string_from_elf_section (input_bfd,
6469 symtab_hdr->sh_link,
6470 sym->st_name));
6471 }
6472 else
6473 sym_name = h->root.root.string;
6474
5fa80905 6475 if (size == 0 && sym_sec)
40bbb79e 6476 {
5fa80905
AC
6477 bounds_ok = TRUE;
6478 enum c64_section_perm_type type
6479 = c64_symbol_section_adjustment (h, value, sym_sec, &perm_sec, info);
40bbb79e 6480
5fa80905 6481 switch (type)
40bbb79e 6482 {
5fa80905
AC
6483 case C64_SYM_STANDARD:
6484 break;
6485 case C64_SYM_LINKER_DEF:
6486 size = perm_sec->output_section->size;
6487 break;
6488 case C64_SYM_LDSCRIPT_DEF:
6489 size = perm_sec->size - (value - perm_sec->vma);
6490 break;
6491 case C64_SYM_LDSCRIPT_START:
6492 size = perm_sec->size;
6493 break;
6494 default:
6495 abort ();
40bbb79e
SP
6496 }
6497 }
6498
6499 /* Negative addends are not allowed for capability symbols. */
6500 if (addend < 0 || (bfd_vma) addend > size)
6501 return bfd_reloc_outofrange;
6502
5fa80905 6503 bfd_vma base = value, limit = value + size;
40bbb79e
SP
6504
6505 if (!bounds_ok && !c64_valid_cap_range (&base, &limit))
6506 {
7401203c
MM
6507 /* Just warn about this. It's not a requirement that bounds on
6508 objects should be precise, so there's no reason to error out on
6509 such an object. */
40bbb79e 6510 /* xgettext:c-format */
7401203c
MM
6511 _bfd_error_handler
6512 (_("%pB: capability range for '%s' may exceed object bounds"),
6513 input_bfd, sym_name);
40bbb79e
SP
6514 }
6515
5fa80905
AC
6516 if (perm_sec && perm_sec->flags & SEC_CODE)
6517 {
6518 /* Any symbol pointing into an executable section gets bounds according
6519 to PCC. In this case the relocation is set up so that the value is
6520 the base of the PCC, the addend is the offset from the PCC base to the
6521 VA that we want, and the size is the length of the PCC range.
6522 In this function we only use `value` to check the bounds make sense,
6523 which is somewhat superfluous when we're using pcc_high and pcc_low
6524 since we already enforced that in elfNN_c64_resize_sections. No harm
6525 in instead checking that the bounds on the object that were requested
6526 made sense even if they were overridden because this symbol points
6527 into an executable section.
6528
6529 `size` on the other hand is part of the fragment that we output to and
6530 we need to change it in order to have functions that can access global
6531 data or jump to other functions. */
6532 size = pcc_high - pcc_low;
6533 }
6534
40bbb79e
SP
6535 if (perm_sec != NULL)
6536 {
6537 bfd_vma frag = cap_meta (size, perm_sec);
6538
6539 if (frag == (bfd_vma) -1)
6540 return bfd_reloc_outofrange;
6541
6542 bfd_put_64 (input_bfd, frag, frag_loc);
6543 }
6544
6545 return bfd_reloc_continue;
5fa80905 6546}
40bbb79e 6547
5fa80905
AC
6548/* Given either a local symbol SYM or global symbol H, do we need to adjust
6549 capability relocations against the symbol due to the fact that it points to
6550 a code section? */
6551static bfd_boolean
6552c64_symbol_adjust (struct elf_link_hash_entry *h,
6553 bfd_vma value, asection *sym_sec, struct bfd_link_info *info,
6554 bfd_vma *adjust_addr)
6555{
6556 asection *tmp_sec;
6557 enum c64_section_perm_type type
6558 = c64_symbol_section_adjustment (h, value, sym_sec, &tmp_sec, info);
6559
6560 if (type == C64_SYM_UNKNOWN)
6561 return FALSE;
6562
6563 if (tmp_sec->flags & SEC_CODE)
40bbb79e 6564 {
5fa80905
AC
6565 *adjust_addr = pcc_low;
6566 return TRUE;
40bbb79e 6567 }
5fa80905
AC
6568
6569 return FALSE;
40bbb79e
SP
6570}
6571
4e7fbb34
JW
6572/* Perform a relocation as part of a final link. The input relocation type
6573 should be TLS relaxed. */
6574
a06ea964 6575static bfd_reloc_status_type
cec5225b 6576elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
a06ea964
NC
6577 bfd *input_bfd,
6578 bfd *output_bfd,
6579 asection *input_section,
6580 bfd_byte *contents,
6581 Elf_Internal_Rela *rel,
6582 bfd_vma value,
6583 struct bfd_link_info *info,
6584 asection *sym_sec,
6585 struct elf_link_hash_entry *h,
6586 bfd_boolean *unresolved_reloc_p,
6587 bfd_boolean save_addend,
1419bbe5
WN
6588 bfd_vma *saved_addend,
6589 Elf_Internal_Sym *sym)
a06ea964 6590{
1419bbe5 6591 Elf_Internal_Shdr *symtab_hdr;
a06ea964 6592 unsigned int r_type = howto->type;
a6bb11b2
YZ
6593 bfd_reloc_code_real_type bfd_r_type
6594 = elfNN_aarch64_bfd_reloc_from_howto (howto);
a06ea964
NC
6595 unsigned long r_symndx;
6596 bfd_byte *hit_data = contents + rel->r_offset;
96d01d93 6597 bfd_vma place, off, got_entry_addr = 0;
a06ea964 6598 bfd_signed_vma signed_addend;
cec5225b 6599 struct elf_aarch64_link_hash_table *globals;
a06ea964 6600 bfd_boolean weak_undef_p;
ff07562f 6601 bfd_boolean relative_reloc;
b53b1bed 6602 asection *base_got;
ff07562f 6603 bfd_vma orig_value = value;
ddb7fd0f 6604 bfd_boolean resolved_to_zero;
0c1ded8d 6605 bfd_boolean abs_symbol_p;
f0070c1e 6606 Elf_Internal_Sym *isym = NULL;
50e192f0
SP
6607 bfd_boolean c64_rtype = FALSE;
6608 bfd_boolean to_c64 = FALSE;
a06ea964 6609
cec5225b 6610 globals = elf_aarch64_hash_table (info);
a06ea964 6611
1419bbe5
WN
6612 symtab_hdr = &elf_symtab_hdr (input_bfd);
6613
a06ea964
NC
6614 BFD_ASSERT (is_aarch64_elf (input_bfd));
6615
cec5225b 6616 r_symndx = ELFNN_R_SYM (rel->r_info);
a06ea964 6617
a06ea964
NC
6618 place = input_section->output_section->vma
6619 + input_section->output_offset + rel->r_offset;
6620
6621 /* Get addend, accumulating the addend for consecutive relocs
6622 which refer to the same offset. */
6623 signed_addend = saved_addend ? *saved_addend : 0;
6624 signed_addend += rel->r_addend;
6625
6626 weak_undef_p = (h ? h->root.type == bfd_link_hash_undefweak
6627 : bfd_is_und_section (sym_sec));
c691de6a 6628 abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
0c1ded8d 6629
f0070c1e 6630 if (sym)
50e192f0
SP
6631 {
6632 isym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
6633 r_symndx);
6634 BFD_ASSERT (isym != NULL);
6635 to_c64 = (isym->st_target_internal & ST_BRANCH_TO_C64) != 0;
6636 }
6637 else
6638 to_c64 = (h->target_internal & ST_BRANCH_TO_C64) != 0;
f0070c1e 6639
a6bb11b2 6640
1419bbe5
WN
6641 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle
6642 it here if it is defined in a non-shared object. */
6643 if (h != NULL
6644 && h->type == STT_GNU_IFUNC
6645 && h->def_regular)
6646 {
6647 asection *plt;
6648 const char *name;
99ad26cb 6649 bfd_vma addend = 0;
1419bbe5 6650
545bc2b3
SN
6651 if ((input_section->flags & SEC_ALLOC) == 0)
6652 {
f657f8c4
NC
6653 /* If this is a SHT_NOTE section without SHF_ALLOC, treat
6654 STT_GNU_IFUNC symbol as STT_FUNC. */
6655 if (elf_section_type (input_section) == SHT_NOTE)
6656 goto skip_ifunc;
6657
545bc2b3
SN
6658 /* Dynamic relocs are not propagated for SEC_DEBUGGING
6659 sections because such sections are not SEC_ALLOC and
6660 thus ld.so will not process them. */
6661 if ((input_section->flags & SEC_DEBUGGING) != 0)
6662 return bfd_reloc_ok;
6663
6664 if (h->root.root.string)
6665 name = h->root.root.string;
6666 else
6667 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, NULL);
6668 _bfd_error_handler
6669 /* xgettext:c-format */
2dcf00ce
AM
6670 (_("%pB(%pA+%#" PRIx64 "): "
6671 "unresolvable %s relocation against symbol `%s'"),
6672 input_bfd, input_section, (uint64_t) rel->r_offset,
6673 howto->name, name);
545bc2b3 6674 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6675 return bfd_reloc_notsupported;
545bc2b3
SN
6676 }
6677 else if (h->plt.offset == (bfd_vma) -1)
6678 goto bad_ifunc_reloc;
1419bbe5
WN
6679
6680 /* STT_GNU_IFUNC symbol must go through PLT. */
6681 plt = globals->root.splt ? globals->root.splt : globals->root.iplt;
6682 value = (plt->output_section->vma + plt->output_offset + h->plt.offset);
6683
6684 switch (bfd_r_type)
6685 {
6686 default:
dc1e8a47 6687 bad_ifunc_reloc:
1419bbe5
WN
6688 if (h->root.root.string)
6689 name = h->root.root.string;
6690 else
6691 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
6692 NULL);
4eca0228 6693 _bfd_error_handler
695344c0 6694 /* xgettext:c-format */
871b3ab2 6695 (_("%pB: relocation %s against STT_GNU_IFUNC "
1419bbe5
WN
6696 "symbol `%s' isn't handled by %s"), input_bfd,
6697 howto->name, name, __FUNCTION__);
6698 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6699 return bfd_reloc_notsupported;
1419bbe5
WN
6700
6701 case BFD_RELOC_AARCH64_NN:
6702 if (rel->r_addend != 0)
6703 {
6704 if (h->root.root.string)
6705 name = h->root.root.string;
6706 else
6707 name = bfd_elf_sym_name (input_bfd, symtab_hdr,
6708 sym, NULL);
4eca0228 6709 _bfd_error_handler
695344c0 6710 /* xgettext:c-format */
871b3ab2 6711 (_("%pB: relocation %s against STT_GNU_IFUNC "
2dcf00ce
AM
6712 "symbol `%s' has non-zero addend: %" PRId64),
6713 input_bfd, howto->name, name, (int64_t) rel->r_addend);
1419bbe5 6714 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6715 return bfd_reloc_notsupported;
1419bbe5
WN
6716 }
6717
6718 /* Generate dynamic relocation only when there is a
6719 non-GOT reference in a shared object. */
0e1862bb 6720 if (bfd_link_pic (info) && h->non_got_ref)
1419bbe5
WN
6721 {
6722 Elf_Internal_Rela outrel;
6723 asection *sreloc;
6724
6725 /* Need a dynamic relocation to get the real function
6726 address. */
6727 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
6728 info,
6729 input_section,
6730 rel->r_offset);
6731 if (outrel.r_offset == (bfd_vma) -1
6732 || outrel.r_offset == (bfd_vma) -2)
6733 abort ();
6734
6735 outrel.r_offset += (input_section->output_section->vma
6736 + input_section->output_offset);
6737
6738 if (h->dynindx == -1
6739 || h->forced_local
0e1862bb 6740 || bfd_link_executable (info))
1419bbe5
WN
6741 {
6742 /* This symbol is resolved locally. */
e19e9199
SP
6743 outrel.r_info = (elf_aarch64_hash_entry (h)->got_type
6744 == GOT_CAP
6745 ? ELFNN_R_INFO (0, MORELLO_R (IRELATIVE))
6746 : ELFNN_R_INFO (0, AARCH64_R (IRELATIVE)));
1419bbe5
WN
6747 outrel.r_addend = (h->root.u.def.value
6748 + h->root.u.def.section->output_section->vma
6749 + h->root.u.def.section->output_offset);
6750 }
6751 else
6752 {
6753 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
6754 outrel.r_addend = 0;
6755 }
6756
6757 sreloc = globals->root.irelifunc;
6758 elf_append_rela (output_bfd, sreloc, &outrel);
6759
6760 /* If this reloc is against an external symbol, we
6761 do not want to fiddle with the addend. Otherwise,
6762 we need to include the symbol value so that it
6763 becomes an addend for the dynamic reloc. For an
6764 internal symbol, we have updated addend. */
6765 return bfd_reloc_ok;
6766 }
6767 /* FALLTHROUGH */
e19e9199
SP
6768 case BFD_RELOC_MORELLO_CALL26:
6769 case BFD_RELOC_MORELLO_JUMP26:
1419bbe5 6770 case BFD_RELOC_AARCH64_CALL26:
ce336788 6771 case BFD_RELOC_AARCH64_JUMP26:
652afeef
TC
6772 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
6773 place, value,
1419bbe5
WN
6774 signed_addend,
6775 weak_undef_p);
6776 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
6777 howto, value);
1419bbe5 6778 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 6779 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
1419bbe5 6780 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 6781 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 6782 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 6783 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
dc8008f5 6784 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 6785 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a2e1db00 6786 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
ce336788 6787 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 6788 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
1419bbe5
WN
6789 base_got = globals->root.sgot;
6790 off = h->got.offset;
6791
6792 if (base_got == NULL)
6793 abort ();
6794
6795 if (off == (bfd_vma) -1)
6796 {
6797 bfd_vma plt_index;
6798
6799 /* We can't use h->got.offset here to save state, or
6800 even just remember the offset, as finish_dynamic_symbol
6801 would use that as offset into .got. */
6802
6803 if (globals->root.splt != NULL)
6804 {
b1ee0cc4
WN
6805 plt_index = ((h->plt.offset - globals->plt_header_size) /
6806 globals->plt_entry_size);
a1bdea65 6807 off = (plt_index + 3) * GOT_ENTRY_SIZE (globals);
1419bbe5
WN
6808 base_got = globals->root.sgotplt;
6809 }
6810 else
6811 {
6812 plt_index = h->plt.offset / globals->plt_entry_size;
a1bdea65 6813 off = plt_index * GOT_ENTRY_SIZE (globals);
1419bbe5
WN
6814 base_got = globals->root.igotplt;
6815 }
6816
6817 if (h->dynindx == -1
6818 || h->forced_local
6819 || info->symbolic)
6820 {
6821 /* This references the local definition. We must
6822 initialize this entry in the global offset table.
6823 Since the offset must always be a multiple of 8,
6824 we use the least significant bit to record
6825 whether we have initialized it already.
6826
6827 When doing a dynamic link, we create a .rela.got
6828 relocation entry to initialize the value. This
6829 is done in the finish_dynamic_symbol routine. */
6830 if ((off & 1) != 0)
6831 off &= ~1;
6832 else
6833 {
6834 bfd_put_NN (output_bfd, value,
6835 base_got->contents + off);
6836 /* Note that this is harmless as -1 | 1 still is -1. */
6837 h->got.offset |= 1;
6838 }
6839 }
6840 value = (base_got->output_section->vma
6841 + base_got->output_offset + off);
6842 }
6843 else
6844 value = aarch64_calculate_got_entry_vma (h, globals, info,
6845 value, output_bfd,
6846 unresolved_reloc_p);
a0becb89 6847
2aff25ba
JW
6848 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
6849 addend = (globals->root.sgot->output_section->vma
6850 + globals->root.sgot->output_offset);
a0becb89 6851
652afeef
TC
6852 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
6853 place, value,
99ad26cb 6854 addend, weak_undef_p);
1419bbe5 6855 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type, howto, value);
1419bbe5 6856 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 6857 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 6858 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5
WN
6859 break;
6860 }
6861 }
6862
f657f8c4 6863 skip_ifunc:
ddb7fd0f
L
6864 resolved_to_zero = (h != NULL
6865 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
6866
a6bb11b2 6867 switch (bfd_r_type)
a06ea964 6868 {
a6bb11b2 6869 case BFD_RELOC_AARCH64_NONE:
0484b454 6870 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 6871 case BFD_RELOC_AARCH64_TLSDESC_CALL:
0484b454 6872 case BFD_RELOC_AARCH64_TLSDESC_LDR:
4ca9b406 6873 case BFD_RELOC_MORELLO_TLSDESC_CALL:
a06ea964
NC
6874 *unresolved_reloc_p = FALSE;
6875 return bfd_reloc_ok;
6876
a6bb11b2 6877 case BFD_RELOC_AARCH64_NN:
a06ea964
NC
6878
6879 /* When generating a shared object or relocatable executable, these
07d6d2b8
AM
6880 relocations are copied into the output file to be resolved at
6881 run time. */
6353d82b
JW
6882 if (((bfd_link_pic (info)
6883 || globals->root.is_relocatable_executable)
6884 && (input_section->flags & SEC_ALLOC)
6885 && (h == NULL
ddb7fd0f
L
6886 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6887 && !resolved_to_zero)
6353d82b
JW
6888 || h->root.type != bfd_link_hash_undefweak))
6889 /* Or we are creating an executable, we may need to keep relocations
6890 for symbols satisfied by a dynamic library if we manage to avoid
6891 copy relocs for the symbol. */
6892 || (ELIMINATE_COPY_RELOCS
6893 && !bfd_link_pic (info)
6894 && h != NULL
6895 && (input_section->flags & SEC_ALLOC)
6896 && h->dynindx != -1
6897 && !h->non_got_ref
6898 && ((h->def_dynamic
6899 && !h->def_regular)
6900 || h->root.type == bfd_link_hash_undefweak
6901 || h->root.type == bfd_link_hash_undefined)))
a06ea964
NC
6902 {
6903 Elf_Internal_Rela outrel;
6904 bfd_byte *loc;
6905 bfd_boolean skip, relocate;
6906 asection *sreloc;
6907
6908 *unresolved_reloc_p = FALSE;
6909
a06ea964
NC
6910 skip = FALSE;
6911 relocate = FALSE;
6912
6913 outrel.r_addend = signed_addend;
6914 outrel.r_offset =
6915 _bfd_elf_section_offset (output_bfd, info, input_section,
6916 rel->r_offset);
6917 if (outrel.r_offset == (bfd_vma) - 1)
6918 skip = TRUE;
6919 else if (outrel.r_offset == (bfd_vma) - 2)
6920 {
6921 skip = TRUE;
6922 relocate = TRUE;
6923 }
0c1ded8d
RL
6924 else if (abs_symbol_p)
6925 {
6926 /* Local absolute symbol. */
6927 skip = (h->forced_local || (h->dynindx == -1));
6928 relocate = skip;
6929 }
a06ea964
NC
6930
6931 outrel.r_offset += (input_section->output_section->vma
6932 + input_section->output_offset);
6933
6934 if (skip)
6935 memset (&outrel, 0, sizeof outrel);
6936 else if (h != NULL
6937 && h->dynindx != -1
0e1862bb 6938 && (!bfd_link_pic (info)
0c1ded8d 6939 || !(bfd_link_pie (info) || SYMBOLIC_BIND (info, h))
0e1862bb 6940 || !h->def_regular))
cec5225b 6941 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
a06ea964
NC
6942 else
6943 {
6944 int symbol;
6945
6946 /* On SVR4-ish systems, the dynamic loader cannot
6947 relocate the text and data segments independently,
6948 so the symbol does not matter. */
6949 symbol = 0;
1f56df9d 6950 relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE;
a6bb11b2 6951 outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE));
a06ea964
NC
6952 outrel.r_addend += value;
6953 }
6954
1419bbe5
WN
6955 sreloc = elf_section_data (input_section)->sreloc;
6956 if (sreloc == NULL || sreloc->contents == NULL)
6957 return bfd_reloc_notsupported;
6958
6959 loc = sreloc->contents + sreloc->reloc_count++ * RELOC_SIZE (globals);
cec5225b 6960 bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc);
a06ea964 6961
1419bbe5 6962 if (sreloc->reloc_count * RELOC_SIZE (globals) > sreloc->size)
a06ea964
NC
6963 {
6964 /* Sanity to check that we have previously allocated
6965 sufficient space in the relocation section for the
6966 number of relocations we actually want to emit. */
6967 abort ();
6968 }
6969
6970 /* If this reloc is against an external symbol, we do not want to
6971 fiddle with the addend. Otherwise, we need to include the symbol
6972 value so that it becomes an addend for the dynamic reloc. */
6973 if (!relocate)
6974 return bfd_reloc_ok;
6975
6976 return _bfd_final_link_relocate (howto, input_bfd, input_section,
6977 contents, rel->r_offset, value,
6978 signed_addend);
6979 }
6980 else
6981 value += signed_addend;
6982 break;
6983
e19e9199
SP
6984 case BFD_RELOC_MORELLO_CALL26:
6985 case BFD_RELOC_MORELLO_JUMP26:
a6bb11b2 6986 case BFD_RELOC_AARCH64_CALL26:
ce336788 6987 case BFD_RELOC_AARCH64_JUMP26:
a06ea964
NC
6988 {
6989 asection *splt = globals->root.splt;
c7cd2917
SP
6990 bfd_boolean via_plt_p =
6991 splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1;
a06ea964
NC
6992
6993 /* A call to an undefined weak symbol is converted to a jump to
6994 the next instruction unless a PLT entry will be created.
6995 The jump to the next instruction is optimized as a NOP.
6996 Do the same for local undefined symbols. */
6997 if (weak_undef_p && ! via_plt_p)
6998 {
6999 bfd_putl32 (INSN_NOP, hit_data);
7000 return bfd_reloc_ok;
7001 }
7002
7003 /* If the call goes through a PLT entry, make sure to
7004 check distance to the right destination address. */
7005 if (via_plt_p)
07f9ddfe
JW
7006 value = (splt->output_section->vma
7007 + splt->output_offset + h->plt.offset);
7008
7009 /* Check if a stub has to be inserted because the destination
7010 is too far away. */
7011 struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
2f340668 7012
50e192f0
SP
7013 enum elf_aarch64_stub_type c64_stub = aarch64_stub_none;
7014
7015 /* Figure out if we need an interworking stub and if yes, what
7016 kind. */
7017 if (!via_plt_p)
7018 c64_stub = aarch64_interwork_stub (r_type, to_c64);
7019
2f340668
JW
7020 /* If the branch destination is directed to plt stub, "value" will be
7021 the final destination, otherwise we should plus signed_addend, it may
7022 contain non-zero value, for example call to local function symbol
7023 which are turned into "sec_sym + sec_off", and sec_off is kept in
7024 signed_addend. */
50e192f0
SP
7025 if (c64_stub != aarch64_stub_none
7026 || (aarch64_branch_reloc_p (r_type)
7027 && !aarch64_valid_branch_p ((via_plt_p ? value
7028 : value + signed_addend), place)))
7029 {
7030 /* The target is out of reach, so redirect the branch to
7031 the local stub for this function. */
7032 stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec,
7033 h, rel, globals,
7034 c64_stub);
7035 }
7036
07f9ddfe 7037 if (stub_entry != NULL)
2f340668
JW
7038 {
7039 value = (stub_entry->stub_offset
7040 + stub_entry->stub_sec->output_offset
7041 + stub_entry->stub_sec->output_section->vma);
7042
7043 /* We have redirected the destination to stub entry address,
7044 so ignore any addend record in the original rela entry. */
7045 signed_addend = 0;
7046 }
a06ea964 7047 }
652afeef
TC
7048 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7049 place, value,
caed7120 7050 signed_addend, weak_undef_p);
07f9ddfe 7051 *unresolved_reloc_p = FALSE;
a06ea964
NC
7052 break;
7053
dcbd20eb
JW
7054 case BFD_RELOC_AARCH64_16_PCREL:
7055 case BFD_RELOC_AARCH64_32_PCREL:
7056 case BFD_RELOC_AARCH64_64_PCREL:
ce336788
JW
7057 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
7058 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP
7059 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
7060 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
ce336788
JW
7061 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
7062 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 7063 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
1daf502a
RL
7064 case BFD_RELOC_AARCH64_MOVW_PREL_G0:
7065 case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
7066 case BFD_RELOC_AARCH64_MOVW_PREL_G1:
7067 case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
7068 case BFD_RELOC_AARCH64_MOVW_PREL_G2:
7069 case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
7070 case BFD_RELOC_AARCH64_MOVW_PREL_G3:
0e1862bb 7071 if (bfd_link_pic (info)
dcbd20eb
JW
7072 && (input_section->flags & SEC_ALLOC) != 0
7073 && (input_section->flags & SEC_READONLY) != 0
d68f1976 7074 && !SYMBOL_REFERENCES_LOCAL (info, h))
dcbd20eb
JW
7075 {
7076 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7077
4eca0228 7078 _bfd_error_handler
695344c0 7079 /* xgettext:c-format */
871b3ab2 7080 (_("%pB: relocation %s against symbol `%s' which may bind "
d68f1976
JW
7081 "externally can not be used when making a shared object; "
7082 "recompile with -fPIC"),
dcbd20eb
JW
7083 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7084 h->root.root.string);
7085 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7086 return bfd_reloc_notsupported;
dcbd20eb 7087 }
c7cd2917
SP
7088 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7089 place, value,
7090 signed_addend,
7091 weak_undef_p);
8b21361b 7092
f0070c1e
SP
7093 if (bfd_r_type == BFD_RELOC_AARCH64_ADR_LO21_PCREL && isym != NULL
7094 && isym->st_target_internal & ST_BRANCH_TO_C64)
8b21361b 7095 value |= 1;
c7cd2917
SP
7096 break;
7097
e19e9199
SP
7098 case BFD_RELOC_MORELLO_BRANCH19:
7099 case BFD_RELOC_MORELLO_TSTBR14:
50e192f0
SP
7100 c64_rtype = TRUE;
7101 /* Fall through. */
c7cd2917
SP
7102 case BFD_RELOC_AARCH64_BRANCH19:
7103 case BFD_RELOC_AARCH64_TSTBR14:
7104 if (h && h->root.type == bfd_link_hash_undefined)
7105 {
7106 _bfd_error_handler
7107 /* xgettext:c-format */
7108 (_("%pB: conditional branch to undefined symbol `%s' "
7109 "not allowed"), input_bfd, h->root.root.string);
7110 bfd_set_error (bfd_error_bad_value);
7111 return bfd_reloc_notsupported;
7112 }
50e192f0
SP
7113 {
7114 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7115
7116 if ((c64_rtype && !to_c64) || (!c64_rtype && to_c64))
7117 {
7118 _bfd_error_handler
7119 /* xgettext:c-format */
7120 (_("%pB: interworking not supported on relocation %s"),
7121 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7122 return bfd_reloc_notsupported;
7123 }
7124 }
1a0670f3 7125 /* Fall through. */
dcbd20eb 7126
a6bb11b2 7127 case BFD_RELOC_AARCH64_16:
92d77487
RL
7128#if ARCH_SIZE == 64
7129 case BFD_RELOC_AARCH64_32:
7130#endif
a6bb11b2 7131 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 7132 case BFD_RELOC_AARCH64_LDST128_LO12:
a6bb11b2
YZ
7133 case BFD_RELOC_AARCH64_LDST16_LO12:
7134 case BFD_RELOC_AARCH64_LDST32_LO12:
7135 case BFD_RELOC_AARCH64_LDST64_LO12:
ce336788 7136 case BFD_RELOC_AARCH64_LDST8_LO12:
a6bb11b2
YZ
7137 case BFD_RELOC_AARCH64_MOVW_G0:
7138 case BFD_RELOC_AARCH64_MOVW_G0_NC:
ce336788 7139 case BFD_RELOC_AARCH64_MOVW_G0_S:
a6bb11b2
YZ
7140 case BFD_RELOC_AARCH64_MOVW_G1:
7141 case BFD_RELOC_AARCH64_MOVW_G1_NC:
ce336788 7142 case BFD_RELOC_AARCH64_MOVW_G1_S:
a6bb11b2
YZ
7143 case BFD_RELOC_AARCH64_MOVW_G2:
7144 case BFD_RELOC_AARCH64_MOVW_G2_NC:
ce336788 7145 case BFD_RELOC_AARCH64_MOVW_G2_S:
a6bb11b2 7146 case BFD_RELOC_AARCH64_MOVW_G3:
652afeef
TC
7147 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7148 place, value,
caed7120 7149 signed_addend, weak_undef_p);
f0070c1e
SP
7150 if (bfd_r_type == BFD_RELOC_AARCH64_ADD_LO12 && isym != NULL
7151 && isym->st_target_internal & ST_BRANCH_TO_C64)
8b21361b
SP
7152 value |= 1;
7153
a06ea964
NC
7154 break;
7155
a6bb11b2 7156 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 7157 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a6bb11b2 7158 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 7159 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 7160 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 7161 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 7162 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 7163 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
2aff25ba
JW
7164 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
7165 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
7166 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
8d4edc5f
SP
7167 off = symbol_got_offset (input_bfd, h, r_symndx);
7168 base_got = globals->root.sgot;
5fa80905 7169
c50aec72
MM
7170 bfd_boolean c64_reloc =
7171 (bfd_r_type == BFD_RELOC_MORELLO_LD128_GOT_LO12_NC
7172 || bfd_r_type == BFD_RELOC_MORELLO_ADR_GOT_PAGE);
8d4edc5f 7173
5fa80905
AC
7174 if (signed_addend != 0)
7175 {
7176 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7177 _bfd_error_handler
7178 /* xgettext:c-format */
7179 (_("%pB: symbol plus addend can not be placed into the GOT "
7180 "for relocation %s"),
7181 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7182 abort ();
7183 }
7184
8d4edc5f 7185 if (base_got == NULL)
a06ea964
NC
7186 BFD_ASSERT (h != NULL);
7187
ff07562f 7188 relative_reloc = FALSE;
a06ea964
NC
7189 if (h != NULL)
7190 {
99ad26cb 7191 bfd_vma addend = 0;
5fa80905 7192 bfd_vma frag_value;
ff07562f
JW
7193
7194 /* If a symbol is not dynamic and is not undefined weak, bind it
7195 locally and generate a RELATIVE relocation under PIC mode.
7196
7197 NOTE: one symbol may be referenced by several relocations, we
7198 should only generate one RELATIVE relocation for that symbol.
8d4edc5f
SP
7199 Therefore, check GOT offset mark first.
7200
7201 NOTE2: Symbol references via GOT in C64 static binaries without
7202 PIC should always have relative relocations, so we do that here
7203 early. */
7204 if (((h->dynindx == -1
7205 && !h->forced_local
7206 && h->root.type != bfd_link_hash_undefweak
7207 && bfd_link_pic (info))
7208 || (!bfd_link_pic (info) && bfd_link_executable (info)
7209 && c64_reloc))
ff07562f
JW
7210 && !symbol_got_offset_mark_p (input_bfd, h, r_symndx))
7211 relative_reloc = TRUE;
7212
5fa80905
AC
7213 if (c64_reloc
7214 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
7215 signed_addend = (value | h->target_internal) - frag_value;
7216 else
7217 frag_value = value | h->target_internal;
7218
c50aec72 7219 value = aarch64_calculate_got_entry_vma (h, globals, info,
5fa80905 7220 frag_value,
a06ea964
NC
7221 output_bfd,
7222 unresolved_reloc_p);
ff07562f
JW
7223 /* Record the GOT entry address which will be used when generating
7224 RELATIVE relocation. */
7225 if (relative_reloc)
8d4edc5f 7226 got_entry_addr = value;
ff07562f 7227
2aff25ba 7228 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW
7229 addend = (globals->root.sgot->output_section->vma
7230 + globals->root.sgot->output_offset);
652afeef
TC
7231 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7232 place, value,
99ad26cb 7233 addend, weak_undef_p);
a06ea964 7234 }
b53b1bed
JW
7235 else
7236 {
99ad26cb 7237 bfd_vma addend = 0;
b53b1bed
JW
7238 struct elf_aarch64_local_symbol *locals
7239 = elf_aarch64_locals (input_bfd);
7240
7241 if (locals == NULL)
7242 {
7243 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
4eca0228 7244 _bfd_error_handler
695344c0 7245 /* xgettext:c-format */
90b6238f 7246 (_("%pB: local symbol descriptor table be NULL when applying "
b53b1bed
JW
7247 "relocation %s against local symbol"),
7248 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7249 abort ();
7250 }
7251
ff07562f
JW
7252 got_entry_addr = (base_got->output_section->vma
7253 + base_got->output_offset + off);
b53b1bed
JW
7254
7255 if (!symbol_got_offset_mark_p (input_bfd, h, r_symndx))
7256 {
5fa80905
AC
7257 bfd_vma frag_value;
7258
7259 if (c64_reloc
7260 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
7261 signed_addend = (value | sym->st_target_internal) - frag_value;
7262 else
7263 frag_value = value | sym->st_target_internal;
7264
7265 bfd_put_64 (output_bfd, frag_value, base_got->contents + off);
b53b1bed 7266
ff07562f
JW
7267 /* For local symbol, we have done absolute relocation in static
7268 linking stage. While for shared library, we need to update the
7269 content of GOT entry according to the shared object's runtime
7270 base address. So, we need to generate a R_AARCH64_RELATIVE reloc
7271 for dynamic linker. */
c50aec72
MM
7272 if (bfd_link_pic (info)
7273 || (!bfd_link_pic (info) && bfd_link_executable (info)
7274 && c64_reloc))
ff07562f 7275 relative_reloc = TRUE;
b53b1bed
JW
7276
7277 symbol_got_offset_mark (input_bfd, h, r_symndx);
7278 }
7279
7280 /* Update the relocation value to GOT entry addr as we have transformed
7281 the direct data access into indirect data access through GOT. */
7282 value = got_entry_addr;
99ad26cb 7283
2aff25ba 7284 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW
7285 addend = base_got->output_section->vma + base_got->output_offset;
7286
652afeef
TC
7287 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7288 place, value,
99ad26cb 7289 addend, weak_undef_p);
b53b1bed 7290 }
ff07562f
JW
7291
7292 if (relative_reloc)
7293 {
7294 asection *s;
7295 Elf_Internal_Rela outrel;
7296
a1bdea65
SP
7297 enum elf_aarch64_reloc_type rtype = AARCH64_R (RELATIVE);
7298
8d4edc5f
SP
7299 s = globals->root.srelgot;
7300
a1bdea65
SP
7301 /* For a C64 relative relocation, also add size and permissions into
7302 the frag. */
c50aec72 7303 if (c64_reloc)
a1bdea65
SP
7304 {
7305 bfd_reloc_status_type ret;
7306
5fa80905 7307 ret = c64_fixup_frag (input_bfd, info, sym, h,
a1bdea65
SP
7308 sym_sec, base_got->contents + off + 8,
7309 orig_value, 0);
7310
7311 if (ret != bfd_reloc_continue)
7312 return ret;
7313
7314 rtype = MORELLO_R (RELATIVE);
8d4edc5f
SP
7315
7316 if (bfd_link_executable (info) && !bfd_link_pic (info))
7317 s = globals->srelcaps;
7318
5fa80905 7319 outrel.r_addend = signed_addend;
a1bdea65
SP
7320 }
7321 else
7322 outrel.r_addend = orig_value;
7323
ff07562f
JW
7324 if (s == NULL)
7325 abort ();
7326
7327 outrel.r_offset = got_entry_addr;
a1bdea65 7328 outrel.r_info = ELFNN_R_INFO (0, rtype);
ff07562f
JW
7329 elf_append_rela (output_bfd, s, &outrel);
7330 }
a2e1db00
RL
7331 break;
7332
ce336788 7333 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 7334 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 7335 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
a6bb11b2 7336 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 7337 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 7338 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 7339 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
73f925cc 7340 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 7341 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 7342 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
7343 if (globals->root.sgot == NULL)
7344 return bfd_reloc_notsupported;
7345
7346 value = (symbol_got_offset (input_bfd, h, r_symndx)
7347 + globals->root.sgot->output_section->vma
f44a1f8e 7348 + globals->root.sgot->output_offset);
a06ea964 7349
652afeef
TC
7350 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7351 place, value,
caed7120 7352 0, weak_undef_p);
a06ea964
NC
7353 *unresolved_reloc_p = FALSE;
7354 break;
7355
7ba7cfe4 7356 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 7357 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
3b957e5b
RL
7358 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
7359 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
94facae3
RL
7360 if (globals->root.sgot == NULL)
7361 return bfd_reloc_notsupported;
7362
7363 value = symbol_got_offset (input_bfd, h, r_symndx);
652afeef
TC
7364 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7365 place, value,
94facae3
RL
7366 0, weak_undef_p);
7367 *unresolved_reloc_p = FALSE;
7368 break;
7369
6ffe9a1b 7370 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
40fbed84 7371 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
753999c1 7372 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
07c9aa07
JW
7373 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
7374 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
7375 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
7376 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
7377 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
7378 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
7379 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
7380 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
6ffe9a1b
JW
7381 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
7382 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
7383 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
7384 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
7385 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
652afeef
TC
7386 {
7387 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
7388 {
7389 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7390 _bfd_error_handler
7391 /* xgettext:c-format */
7392 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
7393 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7394 h->root.root.string);
7395 bfd_set_error (bfd_error_bad_value);
7396 return bfd_reloc_notsupported;
7397 }
7398
7399 bfd_vma def_value
7400 = weak_undef_p ? 0 : signed_addend - dtpoff_base (info);
7401 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7402 place, value,
7403 def_value, weak_undef_p);
7404 break;
7405 }
40fbed84 7406
a6bb11b2
YZ
7407 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
7408 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
7409 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
e04ef022
RL
7410 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
7411 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
7412 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
7413 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
7414 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
7415 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
7416 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
7417 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
a6bb11b2
YZ
7418 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
7419 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
7420 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
7421 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
7422 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
652afeef
TC
7423 {
7424 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
7425 {
7426 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7427 _bfd_error_handler
7428 /* xgettext:c-format */
7429 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
7430 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7431 h->root.root.string);
7432 bfd_set_error (bfd_error_bad_value);
7433 return bfd_reloc_notsupported;
7434 }
7435
7436 bfd_vma def_value
7437 = weak_undef_p ? 0 : signed_addend - tpoff_base (info);
7438 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7439 place, value,
7440 def_value, weak_undef_p);
7441 *unresolved_reloc_p = FALSE;
7442 break;
7443 }
a06ea964 7444
f955cccf 7445 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 7446 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
4ca9b406 7447 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
389b8029 7448 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 7449 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 7450 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 7451 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
4ca9b406 7452 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a06ea964
NC
7453 if (globals->root.sgot == NULL)
7454 return bfd_reloc_notsupported;
a06ea964
NC
7455 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
7456 + globals->root.sgotplt->output_section->vma
f44a1f8e 7457 + globals->root.sgotplt->output_offset
a06ea964
NC
7458 + globals->sgotplt_jump_table_size);
7459
652afeef
TC
7460 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7461 place, value,
caed7120 7462 0, weak_undef_p);
a06ea964
NC
7463 *unresolved_reloc_p = FALSE;
7464 break;
7465
0484b454
RL
7466 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
7467 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
7468 if (globals->root.sgot == NULL)
7469 return bfd_reloc_notsupported;
7470
7471 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
7472 + globals->root.sgotplt->output_section->vma
7473 + globals->root.sgotplt->output_offset
7474 + globals->sgotplt_jump_table_size);
7475
7476 value -= (globals->root.sgot->output_section->vma
7477 + globals->root.sgot->output_offset);
7478
652afeef
TC
7479 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7480 place, value,
0484b454
RL
7481 0, weak_undef_p);
7482 *unresolved_reloc_p = FALSE;
7483 break;
7484
40bbb79e
SP
7485 case BFD_RELOC_MORELLO_CAPINIT:
7486 {
7487 Elf_Internal_Rela outrel;
7488
7489 if (input_section->flags & SEC_READONLY)
7490 {
7491 _bfd_error_handler
7492 /* xgettext:c-format */
7493 (_("%pB: capability relocation section must be writable"),
7494 input_bfd);
7495 bfd_set_error (bfd_error_bad_value);
7496 return bfd_reloc_notsupported;
7497 }
7498
7499 outrel.r_offset = _bfd_elf_section_offset (output_bfd, info,
7500 input_section,
7501 rel->r_offset);
7502
7503 outrel.r_offset += (input_section->output_section->vma
7504 + input_section->output_offset);
7505
7506 /* Capability-aligned. */
7507 if (outrel.r_offset & 0xf)
7508 return bfd_reloc_overflow;
7509
7510 bfd_reloc_status_type ret;
7511
5fa80905 7512 ret = c64_fixup_frag (input_bfd, info, sym, h, sym_sec,
40bbb79e
SP
7513 hit_data + 8, value, signed_addend);
7514
7515 if (ret != bfd_reloc_continue)
7516 return ret;
7517
7518 outrel.r_addend = signed_addend;
5fa80905 7519 value |= (h != NULL ? h->target_internal : sym->st_target_internal);
40bbb79e
SP
7520
7521 /* Emit a dynamic relocation if we are building PIC. */
7522 if (h != NULL
7523 && h->dynindx != -1
7524 && bfd_link_pic (info)
7525 && !SYMBOL_REFERENCES_LOCAL (info, h))
7526 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
7527 else
7528 outrel.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
7529
5fa80905
AC
7530 /* Symbols without size information get bounds to the
7531 whole section: adjust the base of the capability to the
7532 start of the section and set the addend to obtain the
7533 correct address for the symbol. */
7534 bfd_vma new_value;
7535 if (c64_symbol_adjust (h, value, sym_sec, info, &new_value))
7536 {
7537 outrel.r_addend += (value - new_value);
7538 value = new_value;
7539 }
40bbb79e
SP
7540
7541 asection *s = globals->srelcaps;
7542
7543 elf_append_rela (output_bfd, s, &outrel);
7544 *unresolved_reloc_p = FALSE;
7545 }
7546 break;
7547
a06ea964
NC
7548 default:
7549 return bfd_reloc_notsupported;
7550 }
7551
7552 if (saved_addend)
7553 *saved_addend = value;
7554
7555 /* Only apply the final relocation in a sequence. */
7556 if (save_addend)
7557 return bfd_reloc_continue;
7558
caed7120
YZ
7559 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
7560 howto, value);
a06ea964
NC
7561}
7562
2d0ca824
YN
7563/* LP64 and ILP32 operates on x- and w-registers respectively.
7564 Next definitions take into account the difference between
7565 corresponding machine codes. R means x-register if the target
7566 arch is LP64, and w-register if the target is ILP32. */
7567
7568#if ARCH_SIZE == 64
7569# define add_R0_R0 (0x91000000)
7570# define add_R0_R0_R1 (0x8b000020)
7571# define add_R0_R1 (0x91400020)
7572# define ldr_R0 (0x58000000)
7573# define ldr_R0_mask(i) (i & 0xffffffe0)
7574# define ldr_R0_x0 (0xf9400000)
7575# define ldr_hw_R0 (0xf2a00000)
7576# define movk_R0 (0xf2800000)
7577# define movz_R0 (0xd2a00000)
7578# define movz_hw_R0 (0xd2c00000)
7579#else /*ARCH_SIZE == 32 */
7580# define add_R0_R0 (0x11000000)
7581# define add_R0_R0_R1 (0x0b000020)
7582# define add_R0_R1 (0x11400020)
7583# define ldr_R0 (0x18000000)
7584# define ldr_R0_mask(i) (i & 0xbfffffe0)
7585# define ldr_R0_x0 (0xb9400000)
7586# define ldr_hw_R0 (0x72a00000)
7587# define movk_R0 (0x72800000)
7588# define movz_R0 (0x52a00000)
7589# define movz_hw_R0 (0x52c00000)
7590#endif
7591
9fca35fc
TC
7592/* Structure to hold payload for _bfd_aarch64_erratum_843419_clear_stub,
7593 it is used to identify the stub information to reset. */
7594
7595struct erratum_843419_branch_to_stub_clear_data
7596{
7597 bfd_vma adrp_offset;
7598 asection *output_section;
7599};
7600
7601/* Clear the erratum information for GEN_ENTRY if the ADRP_OFFSET and
7602 section inside IN_ARG matches. The clearing is done by setting the
7603 stub_type to none. */
7604
7605static bfd_boolean
7606_bfd_aarch64_erratum_843419_clear_stub (struct bfd_hash_entry *gen_entry,
7607 void *in_arg)
7608{
7609 struct elf_aarch64_stub_hash_entry *stub_entry
7610 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
7611 struct erratum_843419_branch_to_stub_clear_data *data
7612 = (struct erratum_843419_branch_to_stub_clear_data *) in_arg;
7613
7614 if (stub_entry->target_section != data->output_section
7615 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer
7616 || stub_entry->adrp_offset != data->adrp_offset)
7617 return TRUE;
7618
7619 /* Change the stub type instead of removing the entry, removing from the hash
7620 table would be slower and we have already reserved the memory for the entry
7621 so there wouldn't be much gain. Changing the stub also keeps around a
7622 record of what was there before. */
7623 stub_entry->stub_type = aarch64_stub_none;
7624
7625 /* We're done and there could have been only one matching stub at that
7626 particular offset, so abort further traversal. */
7627 return FALSE;
7628}
7629
7630/* TLS Relaxations may relax an adrp sequence that matches the erratum 843419
7631 sequence. In this case the erratum no longer applies and we need to remove
7632 the entry from the pending stub generation. This clears matching adrp insn
7633 at ADRP_OFFSET in INPUT_SECTION in the stub table defined in GLOBALS. */
7634
7635static void
7636clear_erratum_843419_entry (struct elf_aarch64_link_hash_table *globals,
7637 bfd_vma adrp_offset, asection *input_section)
7638{
739b5c9c 7639 if (globals->fix_erratum_843419 & ERRAT_ADRP)
9fca35fc
TC
7640 {
7641 struct erratum_843419_branch_to_stub_clear_data data;
7642 data.adrp_offset = adrp_offset;
7643 data.output_section = input_section;
7644
7645 bfd_hash_traverse (&globals->stub_hash_table,
7646 _bfd_aarch64_erratum_843419_clear_stub, &data);
7647 }
7648}
7649
4ca9b406
SP
7650#define BUILD_MOVZ(_reg, _imm) (movz_R0 \
7651 | ((((_imm) >> 16) & 0xffff) << 5) \
7652 | (_reg))
7653#define BUILD_MOVK(_reg, _imm) (movk_R0 | (((_imm) & 0xffff) << 5) | (_reg))
7654
a06ea964
NC
7655/* Handle TLS relaxations. Relaxing is possible for symbols that use
7656 R_AARCH64_TLSDESC_ADR_{PAGE, LD64_LO12_NC, ADD_LO12_NC} during a static
7657 link.
7658
7659 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7660 is to then call final_link_relocate. Return other values in the
7661 case of error. */
7662
7663static bfd_reloc_status_type
4ca9b406
SP
7664elfNN_aarch64_tls_relax (bfd *input_bfd, struct bfd_link_info *info,
7665 asection *input_section,
9fca35fc 7666 bfd_byte *contents, Elf_Internal_Rela *rel,
4ca9b406 7667 struct elf_link_hash_entry *h, unsigned long r_symndx)
a06ea964
NC
7668{
7669 bfd_boolean is_local = h == NULL;
4ca9b406 7670
cec5225b 7671 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 7672 unsigned long insn;
4ca9b406
SP
7673 bfd_vma sym_size = 0;
7674 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
a06ea964
NC
7675
7676 BFD_ASSERT (globals && input_bfd && contents && rel);
7677
4ca9b406
SP
7678 if (is_local)
7679 {
7680 if (h != NULL)
7681 sym_size = h->size;
7682 else
7683 {
7684 Elf_Internal_Sym *sym;
7685
7686 sym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
7687 r_symndx);
7688 BFD_ASSERT (sym != NULL);
7689 sym_size = sym->st_size;
7690 }
7691 }
7692
0aa13fee 7693 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 7694 {
4ca9b406
SP
7695 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
7696 if (is_local || !bfd_link_pic (info))
7697 {
7698 /* GD->LE relaxation:
7699 nop => movz x1, objsize_hi16
7700 adrp x0, :tlsdesc:var => movz x0, :tprel_g1:var */
7701 bfd_putl32 (BUILD_MOVZ(1, sym_size), contents + rel->r_offset - 4);
7702 bfd_putl32 (movz_R0, contents + rel->r_offset);
7703
7704 /* We have relaxed the adrp into a mov, we may have to clear any
7705 pending erratum fixes. */
7706 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
7707 return bfd_reloc_continue;
7708 }
7709 else
7710 {
7711 /* GD->IE relaxation: Not implemented. */
7712 return bfd_reloc_continue;
7713 }
a6bb11b2 7714 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 7715 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
a06ea964
NC
7716 if (is_local)
7717 {
7718 /* GD->LE relaxation:
2d0ca824 7719 adrp x0, :tlsgd:var => movz R0, :tprel_g1:var
a06ea964 7720 or
2d0ca824
YN
7721 adrp x0, :tlsdesc:var => movz R0, :tprel_g1:var
7722
7723 Where R is x for LP64, and w for ILP32. */
7724 bfd_putl32 (movz_R0, contents + rel->r_offset);
9fca35fc
TC
7725 /* We have relaxed the adrp into a mov, we may have to clear any
7726 pending erratum fixes. */
7727 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC
7728 return bfd_reloc_continue;
7729 }
7730 else
7731 {
7732 /* GD->IE relaxation:
7733 adrp x0, :tlsgd:var => adrp x0, :gottprel:var
7734 or
7735 adrp x0, :tlsdesc:var => adrp x0, :gottprel:var
7736 */
a06ea964
NC
7737 return bfd_reloc_continue;
7738 }
7739
389b8029
MS
7740 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7741 BFD_ASSERT (0);
7742 break;
7743
1ada945d
MS
7744 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
7745 if (is_local)
7746 {
7747 /* Tiny TLSDESC->LE relaxation:
07d6d2b8
AM
7748 ldr x1, :tlsdesc:var => movz R0, #:tprel_g1:var
7749 adr x0, :tlsdesc:var => movk R0, #:tprel_g0_nc:var
1ada945d 7750 .tlsdesccall var
07d6d2b8 7751 blr x1 => nop
2d0ca824
YN
7752
7753 Where R is x for LP64, and w for ILP32. */
1ada945d
MS
7754 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
7755 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
7756
7757 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7758 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
7759 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7760
2d0ca824
YN
7761 bfd_putl32 (movz_R0, contents + rel->r_offset);
7762 bfd_putl32 (movk_R0, contents + rel->r_offset + 4);
1ada945d
MS
7763 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
7764 return bfd_reloc_continue;
7765 }
7766 else
7767 {
7768 /* Tiny TLSDESC->IE relaxation:
07d6d2b8
AM
7769 ldr x1, :tlsdesc:var => ldr x0, :gottprel:var
7770 adr x0, :tlsdesc:var => nop
1ada945d 7771 .tlsdesccall var
07d6d2b8 7772 blr x1 => nop
1ada945d
MS
7773 */
7774 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
7775 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
7776
7777 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7778 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7779
2d0ca824 7780 bfd_putl32 (ldr_R0, contents + rel->r_offset);
1ada945d
MS
7781 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
7782 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
7783 return bfd_reloc_continue;
7784 }
7785
3c12b054
MS
7786 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7787 if (is_local)
7788 {
7789 /* Tiny GD->LE relaxation:
07d6d2b8
AM
7790 adr x0, :tlsgd:var => mrs x1, tpidr_el0
7791 bl __tls_get_addr => add R0, R1, #:tprel_hi12:x, lsl #12
7792 nop => add R0, R0, #:tprel_lo12_nc:x
2d0ca824
YN
7793
7794 Where R is x for LP64, and x for Ilp32. */
3c12b054
MS
7795
7796 /* First kill the tls_get_addr reloc on the bl instruction. */
7797 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
7798
7799 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 0);
2d0ca824
YN
7800 bfd_putl32 (add_R0_R1, contents + rel->r_offset + 4);
7801 bfd_putl32 (add_R0_R0, contents + rel->r_offset + 8);
3c12b054
MS
7802
7803 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7804 AARCH64_R (TLSLE_ADD_TPREL_LO12_NC));
7805 rel[1].r_offset = rel->r_offset + 8;
7806
7807 /* Move the current relocation to the second instruction in
7808 the sequence. */
7809 rel->r_offset += 4;
7810 rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7811 AARCH64_R (TLSLE_ADD_TPREL_HI12));
7812 return bfd_reloc_continue;
7813 }
7814 else
7815 {
7816 /* Tiny GD->IE relaxation:
07d6d2b8
AM
7817 adr x0, :tlsgd:var => ldr R0, :gottprel:var
7818 bl __tls_get_addr => mrs x1, tpidr_el0
7819 nop => add R0, R0, R1
2d0ca824
YN
7820
7821 Where R is x for LP64, and w for Ilp32. */
3c12b054
MS
7822
7823 /* First kill the tls_get_addr reloc on the bl instruction. */
7824 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
7825 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7826
2d0ca824 7827 bfd_putl32 (ldr_R0, contents + rel->r_offset);
3c12b054 7828 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 7829 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
3c12b054
MS
7830 return bfd_reloc_continue;
7831 }
7832
ac734732
RL
7833#if ARCH_SIZE == 64
7834 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
7835 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSGD_MOVW_G0_NC));
7836 BFD_ASSERT (rel->r_offset + 12 == rel[2].r_offset);
7837 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (CALL26));
7838
7839 if (is_local)
7840 {
7841 /* Large GD->LE relaxation:
07d6d2b8 7842 movz x0, #:tlsgd_g1:var => movz x0, #:tprel_g2:var, lsl #32
ac734732 7843 movk x0, #:tlsgd_g0_nc:var => movk x0, #:tprel_g1_nc:var, lsl #16
07d6d2b8
AM
7844 add x0, gp, x0 => movk x0, #:tprel_g0_nc:var
7845 bl __tls_get_addr => mrs x1, tpidr_el0
7846 nop => add x0, x0, x1
ac734732
RL
7847 */
7848 rel[2].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7849 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
7850 rel[2].r_offset = rel->r_offset + 8;
7851
2d0ca824
YN
7852 bfd_putl32 (movz_hw_R0, contents + rel->r_offset + 0);
7853 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset + 4);
7854 bfd_putl32 (movk_R0, contents + rel->r_offset + 8);
ac734732 7855 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 7856 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL
7857 }
7858 else
7859 {
7860 /* Large GD->IE relaxation:
07d6d2b8 7861 movz x0, #:tlsgd_g1:var => movz x0, #:gottprel_g1:var, lsl #16
ac734732 7862 movk x0, #:tlsgd_g0_nc:var => movk x0, #:gottprel_g0_nc:var
07d6d2b8
AM
7863 add x0, gp, x0 => ldr x0, [gp, x0]
7864 bl __tls_get_addr => mrs x1, tpidr_el0
7865 nop => add x0, x0, x1
ac734732
RL
7866 */
7867 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7868 bfd_putl32 (0xd2a80000, contents + rel->r_offset + 0);
2d0ca824 7869 bfd_putl32 (ldr_R0, contents + rel->r_offset + 8);
ac734732 7870 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 7871 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL
7872 }
7873 return bfd_reloc_continue;
7874
7875 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
7876 return bfd_reloc_continue;
7877#endif
7878
043bf05a
MS
7879 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
7880 return bfd_reloc_continue;
7881
4ca9b406
SP
7882 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
7883 if (is_local || !bfd_link_pic (info))
7884 {
7885 /* GD->LE relaxation:
7886 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var */
7887 bfd_putl32 (movk_R0, contents + rel->r_offset);
7888 return bfd_reloc_continue;
7889 }
7890 else
7891 {
7892 /* GD->IE relaxation: not implemented. */
7893 return bfd_reloc_continue;
7894 }
a6bb11b2 7895 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
a06ea964
NC
7896 if (is_local)
7897 {
7898 /* GD->LE relaxation:
7899 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var
2d0ca824
YN
7900
7901 Where R is x for lp64 mode, and w for ILP32 mode. */
7902 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964
NC
7903 return bfd_reloc_continue;
7904 }
7905 else
7906 {
7907 /* GD->IE relaxation:
2d0ca824
YN
7908 ldr xd, [x0, #:tlsdesc_lo12:var] => ldr R0, [x0, #:gottprel_lo12:var]
7909
7910 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964 7911 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 7912 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
a06ea964
NC
7913 return bfd_reloc_continue;
7914 }
7915
a6bb11b2 7916 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a06ea964
NC
7917 if (is_local)
7918 {
7919 /* GD->LE relaxation
07d6d2b8
AM
7920 add x0, #:tlsgd_lo12:var => movk R0, :tprel_g0_nc:var
7921 bl __tls_get_addr => mrs x1, tpidr_el0
7922 nop => add R0, R1, R0
2d0ca824
YN
7923
7924 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC
7925
7926 /* First kill the tls_get_addr reloc on the bl instruction. */
7927 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
cec5225b 7928 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 7929
2d0ca824 7930 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964 7931 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 7932 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
a06ea964
NC
7933 return bfd_reloc_continue;
7934 }
7935 else
7936 {
7937 /* GD->IE relaxation
07d6d2b8
AM
7938 ADD x0, #:tlsgd_lo12:var => ldr R0, [x0, #:gottprel_lo12:var]
7939 BL __tls_get_addr => mrs x1, tpidr_el0
a06ea964 7940 R_AARCH64_CALL26
07d6d2b8 7941 NOP => add R0, R1, R0
5cd1d8bc
YN
7942
7943 Where R is x for lp64 mode, and w for ilp32 mode. */
a06ea964 7944
a6bb11b2 7945 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
a06ea964
NC
7946
7947 /* Remove the relocation on the BL instruction. */
cec5225b 7948 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 7949
a06ea964
NC
7950 /* We choose to fixup the BL and NOP instructions using the
7951 offset from the second relocation to allow flexibility in
7952 scheduling instructions between the ADD and BL. */
2d0ca824 7953 bfd_putl32 (ldr_R0_x0, contents + rel->r_offset);
5cd1d8bc 7954 bfd_putl32 (0xd53bd041, contents + rel[1].r_offset);
2d0ca824 7955 bfd_putl32 (add_R0_R0_R1, contents + rel[1].r_offset + 4);
a06ea964
NC
7956 return bfd_reloc_continue;
7957 }
7958
4ca9b406
SP
7959 case BFD_RELOC_MORELLO_TLSDESC_CALL:
7960 /* GD->LE relaxation:
7961 blr cd => add c0, c2, x0 */
7962 if (is_local || !bfd_link_pic (info))
7963 {
7964 bfd_putl32 (0xc2a06040, contents + rel->r_offset);
7965 return bfd_reloc_ok;
7966 }
7967 else
7968 goto set_nop;
7969
f955cccf 7970 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406
SP
7971 /* GD->LE relaxation:
7972 ldr cd, [c0, #:tlsdesc_lo12:var] => movk x1, objsize_lo16 */
7973 if ((is_local || !bfd_link_pic (info))
7974 && ELFNN_R_TYPE (rel[1].r_info) == MORELLO_R (TLSDESC_CALL))
7975 {
7976 bfd_putl32 (BUILD_MOVK(1, sym_size), contents + rel->r_offset);
7977 return bfd_reloc_continue;
7978 }
7979
7980 /* Fall through. */
7981 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 7982 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a06ea964 7983 /* GD->IE/LE relaxation:
07d6d2b8
AM
7984 add x0, x0, #:tlsdesc_lo12:var => nop
7985 blr xd => nop
a06ea964 7986 */
4ca9b406 7987set_nop:
a06ea964
NC
7988 bfd_putl32 (INSN_NOP, contents + rel->r_offset);
7989 return bfd_reloc_ok;
7990
0484b454
RL
7991 case BFD_RELOC_AARCH64_TLSDESC_LDR:
7992 if (is_local)
7993 {
7994 /* GD->LE relaxation:
2d0ca824
YN
7995 ldr xd, [gp, xn] => movk R0, #:tprel_g0_nc:var
7996
7997 Where R is x for lp64 mode, and w for ILP32 mode. */
7998 bfd_putl32 (movk_R0, contents + rel->r_offset);
0484b454
RL
7999 return bfd_reloc_continue;
8000 }
8001 else
8002 {
8003 /* GD->IE relaxation:
2d0ca824
YN
8004 ldr xd, [gp, xn] => ldr R0, [gp, xn]
8005
8006 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8007 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8008 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
0484b454
RL
8009 return bfd_reloc_ok;
8010 }
8011
8012 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8013 /* GD->LE relaxation:
2d0ca824 8014 movk xd, #:tlsdesc_off_g0_nc:var => movk R0, #:tprel_g1_nc:var, lsl #16
0484b454 8015 GD->IE relaxation:
2d0ca824
YN
8016 movk xd, #:tlsdesc_off_g0_nc:var => movk Rd, #:gottprel_g0_nc:var
8017
8018 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8019 if (is_local)
2d0ca824 8020 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset);
0484b454
RL
8021 return bfd_reloc_continue;
8022
8023 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
8024 if (is_local)
8025 {
8026 /* GD->LE relaxation:
2d0ca824
YN
8027 movz xd, #:tlsdesc_off_g1:var => movz R0, #:tprel_g2:var, lsl #32
8028
8029 Where R is x for lp64 mode, and w for ILP32 mode. */
8030 bfd_putl32 (movz_hw_R0, contents + rel->r_offset);
0484b454
RL
8031 return bfd_reloc_continue;
8032 }
8033 else
8034 {
8035 /* GD->IE relaxation:
2d0ca824
YN
8036 movz xd, #:tlsdesc_off_g1:var => movz Rd, #:gottprel_g1:var, lsl #16
8037
8038 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8039 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8040 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
0484b454
RL
8041 return bfd_reloc_continue;
8042 }
8043
a6bb11b2 8044 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a06ea964 8045 /* IE->LE relaxation:
07d6d2b8 8046 adrp xd, :gottprel:var => movz Rd, :tprel_g1:var
2d0ca824
YN
8047
8048 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC
8049 if (is_local)
8050 {
8051 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8052 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
9fca35fc
TC
8053 /* We have relaxed the adrp into a mov, we may have to clear any
8054 pending erratum fixes. */
8055 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC
8056 }
8057 return bfd_reloc_continue;
8058
a6bb11b2 8059 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
a06ea964 8060 /* IE->LE relaxation:
07d6d2b8 8061 ldr xd, [xm, #:gottprel_lo12:var] => movk Rd, :tprel_g0_nc:var
2d0ca824
YN
8062
8063 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC
8064 if (is_local)
8065 {
8066 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8067 bfd_putl32 (movk_R0 | (insn & 0x1f), contents + rel->r_offset);
a06ea964
NC
8068 }
8069 return bfd_reloc_continue;
8070
259364ad
JW
8071 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
8072 /* LD->LE relaxation (tiny):
8073 adr x0, :tlsldm:x => mrs x0, tpidr_el0
c1fc2d7e
YN
8074 bl __tls_get_addr => add R0, R0, TCB_SIZE
8075
8076 Where R is x for lp64 mode, and w for ilp32 mode. */
259364ad
JW
8077 if (is_local)
8078 {
8079 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8080 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8081 /* No need of CALL26 relocation for tls_get_addr. */
8082 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8083 bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
2d0ca824
YN
8084 bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
8085 contents + rel->r_offset + 4);
259364ad
JW
8086 return bfd_reloc_ok;
8087 }
8088 return bfd_reloc_continue;
8089
8090 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
8091 /* LD->LE relaxation (small):
8092 adrp x0, :tlsldm:x => mrs x0, tpidr_el0
8093 */
8094 if (is_local)
8095 {
8096 bfd_putl32 (0xd53bd040, contents + rel->r_offset);
8097 return bfd_reloc_ok;
8098 }
8099 return bfd_reloc_continue;
8100
8101 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
8102 /* LD->LE relaxation (small):
c1fc2d7e 8103 add x0, #:tlsldm_lo12:x => add R0, R0, TCB_SIZE
259364ad 8104 bl __tls_get_addr => nop
c1fc2d7e
YN
8105
8106 Where R is x for lp64 mode, and w for ilp32 mode. */
259364ad
JW
8107 if (is_local)
8108 {
8109 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8110 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8111 /* No need of CALL26 relocation for tls_get_addr. */
8112 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
2d0ca824
YN
8113 bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
8114 contents + rel->r_offset + 0);
c1fc2d7e 8115 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
259364ad
JW
8116 return bfd_reloc_ok;
8117 }
8118 return bfd_reloc_continue;
8119
a06ea964
NC
8120 default:
8121 return bfd_reloc_continue;
8122 }
8123
8124 return bfd_reloc_ok;
8125}
8126
8127/* Relocate an AArch64 ELF section. */
8128
8129static bfd_boolean
cec5225b 8130elfNN_aarch64_relocate_section (bfd *output_bfd,
a06ea964
NC
8131 struct bfd_link_info *info,
8132 bfd *input_bfd,
8133 asection *input_section,
8134 bfd_byte *contents,
8135 Elf_Internal_Rela *relocs,
8136 Elf_Internal_Sym *local_syms,
8137 asection **local_sections)
8138{
8139 Elf_Internal_Shdr *symtab_hdr;
8140 struct elf_link_hash_entry **sym_hashes;
8141 Elf_Internal_Rela *rel;
8142 Elf_Internal_Rela *relend;
8143 const char *name;
cec5225b 8144 struct elf_aarch64_link_hash_table *globals;
a06ea964
NC
8145 bfd_boolean save_addend = FALSE;
8146 bfd_vma addend = 0;
8147
cec5225b 8148 globals = elf_aarch64_hash_table (info);
a06ea964
NC
8149
8150 symtab_hdr = &elf_symtab_hdr (input_bfd);
8151 sym_hashes = elf_sym_hashes (input_bfd);
8152
8153 rel = relocs;
8154 relend = relocs + input_section->reloc_count;
8155 for (; rel < relend; rel++)
8156 {
8157 unsigned int r_type;
a6bb11b2
YZ
8158 bfd_reloc_code_real_type bfd_r_type;
8159 bfd_reloc_code_real_type relaxed_bfd_r_type;
a06ea964
NC
8160 reloc_howto_type *howto;
8161 unsigned long r_symndx;
8162 Elf_Internal_Sym *sym;
8163 asection *sec;
8164 struct elf_link_hash_entry *h;
8165 bfd_vma relocation;
8166 bfd_reloc_status_type r;
8167 arelent bfd_reloc;
8168 char sym_type;
8169 bfd_boolean unresolved_reloc = FALSE;
8170 char *error_message = NULL;
8171
cec5225b
YZ
8172 r_symndx = ELFNN_R_SYM (rel->r_info);
8173 r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 8174
0aa13fee
AM
8175 bfd_reloc.howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
8176 howto = bfd_reloc.howto;
a06ea964 8177
7fcfd62d 8178 if (howto == NULL)
47aeb64c
NC
8179 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
8180
a6bb11b2 8181 bfd_r_type = elfNN_aarch64_bfd_reloc_from_howto (howto);
7fcfd62d 8182
a06ea964
NC
8183 h = NULL;
8184 sym = NULL;
8185 sec = NULL;
8186
8187 if (r_symndx < symtab_hdr->sh_info)
8188 {
8189 sym = local_syms + r_symndx;
cec5225b 8190 sym_type = ELFNN_ST_TYPE (sym->st_info);
a06ea964
NC
8191 sec = local_sections[r_symndx];
8192
8193 /* An object file might have a reference to a local
8194 undefined symbol. This is a daft object file, but we
8195 should at least do something about it. */
8196 if (r_type != R_AARCH64_NONE && r_type != R_AARCH64_NULL
8197 && bfd_is_und_section (sec)
8198 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
1a72702b
AM
8199 (*info->callbacks->undefined_symbol)
8200 (info, bfd_elf_string_from_elf_section
8201 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8202 input_bfd, input_section, rel->r_offset, TRUE);
a06ea964 8203
a06ea964 8204 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1419bbe5
WN
8205
8206 /* Relocate against local STT_GNU_IFUNC symbol. */
0e1862bb 8207 if (!bfd_link_relocatable (info)
1419bbe5
WN
8208 && ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)
8209 {
8210 h = elfNN_aarch64_get_local_sym_hash (globals, input_bfd,
8211 rel, FALSE);
8212 if (h == NULL)
8213 abort ();
8214
8215 /* Set STT_GNU_IFUNC symbol value. */
8216 h->root.u.def.value = sym->st_value;
8217 h->root.u.def.section = sec;
8218 }
a06ea964
NC
8219 }
8220 else
8221 {
62d887d4 8222 bfd_boolean warned, ignored;
a06ea964
NC
8223
8224 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8225 r_symndx, symtab_hdr, sym_hashes,
8226 h, sec, relocation,
62d887d4 8227 unresolved_reloc, warned, ignored);
a06ea964
NC
8228
8229 sym_type = h->type;
8230 }
8231
8232 if (sec != NULL && discarded_section (sec))
8233 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
8234 rel, 1, relend, howto, 0, contents);
8235
0e1862bb 8236 if (bfd_link_relocatable (info))
2e0488d3 8237 continue;
a06ea964
NC
8238
8239 if (h != NULL)
8240 name = h->root.root.string;
8241 else
8242 {
8243 name = (bfd_elf_string_from_elf_section
8244 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8245 if (name == NULL || *name == '\0')
fd361982 8246 name = bfd_section_name (sec);
a06ea964
NC
8247 }
8248
8249 if (r_symndx != 0
8250 && r_type != R_AARCH64_NONE
8251 && r_type != R_AARCH64_NULL
8252 && (h == NULL
8253 || h->root.type == bfd_link_hash_defined
8254 || h->root.type == bfd_link_hash_defweak)
a6bb11b2 8255 && IS_AARCH64_TLS_RELOC (bfd_r_type) != (sym_type == STT_TLS))
a06ea964 8256 {
4eca0228 8257 _bfd_error_handler
a06ea964 8258 ((sym_type == STT_TLS
695344c0 8259 /* xgettext:c-format */
2dcf00ce 8260 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
695344c0 8261 /* xgettext:c-format */
2dcf00ce 8262 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
a06ea964 8263 input_bfd,
2dcf00ce 8264 input_section, (uint64_t) rel->r_offset, howto->name, name);
a06ea964
NC
8265 }
8266
f3ecc5c8
AC
8267 if (r_symndx
8268 && h
8269 && IS_AARCH64_TLS_RELOC (bfd_r_type)
8270 && h->root.type == bfd_link_hash_undefweak)
8271 /* We have already warned about these in aarch64_check_relocs,
8272 so just skip over them. */
8273 continue;
8274
a06ea964 8275 /* We relax only if we can see that there can be a valid transition
07d6d2b8
AM
8276 from a reloc type to another.
8277 We call elfNN_aarch64_final_link_relocate unless we're completely
8278 done, i.e., the relaxation produced the final output we want. */
a06ea964 8279
4ca9b406 8280 relaxed_bfd_r_type = aarch64_tls_transition (input_bfd, info, rel,
a6bb11b2
YZ
8281 h, r_symndx);
8282 if (relaxed_bfd_r_type != bfd_r_type)
a06ea964 8283 {
a6bb11b2
YZ
8284 bfd_r_type = relaxed_bfd_r_type;
8285 howto = elfNN_aarch64_howto_from_bfd_reloc (bfd_r_type);
8286 BFD_ASSERT (howto != NULL);
8287 r_type = howto->type;
4ca9b406
SP
8288 r = elfNN_aarch64_tls_relax (input_bfd, info, input_section,
8289 contents, rel, h, r_symndx);
a06ea964
NC
8290 unresolved_reloc = 0;
8291 }
8292 else
8293 r = bfd_reloc_continue;
8294
8295 /* There may be multiple consecutive relocations for the
07d6d2b8
AM
8296 same offset. In that case we are supposed to treat the
8297 output of each relocation as the addend for the next. */
a06ea964
NC
8298 if (rel + 1 < relend
8299 && rel->r_offset == rel[1].r_offset
cec5225b
YZ
8300 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NONE
8301 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NULL)
a06ea964
NC
8302 save_addend = TRUE;
8303 else
8304 save_addend = FALSE;
8305
8306 if (r == bfd_reloc_continue)
cec5225b 8307 r = elfNN_aarch64_final_link_relocate (howto, input_bfd, output_bfd,
a06ea964
NC
8308 input_section, contents, rel,
8309 relocation, info, sec,
8310 h, &unresolved_reloc,
1419bbe5 8311 save_addend, &addend, sym);
a06ea964 8312
4ca9b406
SP
8313 bfd_boolean c64_rtype = FALSE;
8314
0aa13fee 8315 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 8316 {
ce336788 8317 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 8318 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 8319 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 8320 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 8321 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 8322 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 8323 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 8324 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
8325 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8326 {
8327 bfd_boolean need_relocs = FALSE;
8328 bfd_byte *loc;
8329 int indx;
8330 bfd_vma off;
8331
8332 off = symbol_got_offset (input_bfd, h, r_symndx);
8333 indx = h && h->dynindx != -1 ? h->dynindx : 0;
8334
8335 need_relocs =
6dda7875 8336 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC
8337 (h == NULL
8338 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8339 || h->root.type != bfd_link_hash_undefweak);
8340
8341 BFD_ASSERT (globals->root.srelgot != NULL);
8342
8343 if (need_relocs)
8344 {
8345 Elf_Internal_Rela rela;
a6bb11b2 8346 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPMOD));
a06ea964
NC
8347 rela.r_addend = 0;
8348 rela.r_offset = globals->root.sgot->output_section->vma +
8349 globals->root.sgot->output_offset + off;
8350
8351
8352 loc = globals->root.srelgot->contents;
8353 loc += globals->root.srelgot->reloc_count++
8354 * RELOC_SIZE (htab);
cec5225b 8355 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8356
f69e4920 8357 bfd_reloc_code_real_type real_type =
0aa13fee 8358 elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
f69e4920
JW
8359
8360 if (real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
73f925cc
JW
8361 || real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
8362 || real_type == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC)
77a69ff8
JW
8363 {
8364 /* For local dynamic, don't generate DTPREL in any case.
8365 Initialize the DTPREL slot into zero, so we get module
8366 base address when invoke runtime TLS resolver. */
8367 bfd_put_NN (output_bfd, 0,
8368 globals->root.sgot->contents + off
a1bdea65 8369 + GOT_ENTRY_SIZE (globals));
77a69ff8
JW
8370 }
8371 else if (indx == 0)
a06ea964 8372 {
cec5225b 8373 bfd_put_NN (output_bfd,
a06ea964
NC
8374 relocation - dtpoff_base (info),
8375 globals->root.sgot->contents + off
a1bdea65 8376 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8377 }
8378 else
8379 {
8380 /* This TLS symbol is global. We emit a
8381 relocation to fixup the tls offset at load
8382 time. */
8383 rela.r_info =
a6bb11b2 8384 ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPREL));
a06ea964
NC
8385 rela.r_addend = 0;
8386 rela.r_offset =
8387 (globals->root.sgot->output_section->vma
8388 + globals->root.sgot->output_offset + off
a1bdea65 8389 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8390
8391 loc = globals->root.srelgot->contents;
8392 loc += globals->root.srelgot->reloc_count++
8393 * RELOC_SIZE (globals);
cec5225b
YZ
8394 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
8395 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 8396 globals->root.sgot->contents + off
a1bdea65 8397 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8398 }
8399 }
8400 else
8401 {
cec5225b 8402 bfd_put_NN (output_bfd, (bfd_vma) 1,
a06ea964 8403 globals->root.sgot->contents + off);
cec5225b 8404 bfd_put_NN (output_bfd,
a06ea964
NC
8405 relocation - dtpoff_base (info),
8406 globals->root.sgot->contents + off
a1bdea65 8407 + GOT_ENTRY_SIZE (globals));
a06ea964
NC
8408 }
8409
8410 symbol_got_offset_mark (input_bfd, h, r_symndx);
8411 }
8412 break;
8413
a6bb11b2
YZ
8414 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
8415 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
043bf05a 8416 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL
8417 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
8418 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC
8419 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8420 {
8421 bfd_boolean need_relocs = FALSE;
8422 bfd_byte *loc;
8423 int indx;
8424 bfd_vma off;
8425
8426 off = symbol_got_offset (input_bfd, h, r_symndx);
8427
8428 indx = h && h->dynindx != -1 ? h->dynindx : 0;
8429
8430 need_relocs =
6dda7875 8431 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC
8432 (h == NULL
8433 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8434 || h->root.type != bfd_link_hash_undefweak);
8435
8436 BFD_ASSERT (globals->root.srelgot != NULL);
8437
8438 if (need_relocs)
8439 {
8440 Elf_Internal_Rela rela;
8441
8442 if (indx == 0)
8443 rela.r_addend = relocation - dtpoff_base (info);
8444 else
8445 rela.r_addend = 0;
8446
a6bb11b2 8447 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_TPREL));
a06ea964
NC
8448 rela.r_offset = globals->root.sgot->output_section->vma +
8449 globals->root.sgot->output_offset + off;
8450
8451 loc = globals->root.srelgot->contents;
8452 loc += globals->root.srelgot->reloc_count++
8453 * RELOC_SIZE (htab);
8454
cec5225b 8455 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8456
cec5225b 8457 bfd_put_NN (output_bfd, rela.r_addend,
a06ea964
NC
8458 globals->root.sgot->contents + off);
8459 }
8460 else
cec5225b 8461 bfd_put_NN (output_bfd, relocation - tpoff_base (info),
a06ea964
NC
8462 globals->root.sgot->contents + off);
8463
8464 symbol_got_offset_mark (input_bfd, h, r_symndx);
8465 }
8466 break;
8467
4ca9b406
SP
8468 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
8469 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
8470 c64_rtype = TRUE;
8471 /* Fall through. */
8472
f955cccf 8473 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 8474 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 8475 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 8476 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
1ada945d 8477 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL
8478 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8479 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC
8480 if (! symbol_tlsdesc_got_offset_mark_p (input_bfd, h, r_symndx))
8481 {
8482 bfd_boolean need_relocs = FALSE;
8483 int indx = h && h->dynindx != -1 ? h->dynindx : 0;
8484 bfd_vma off = symbol_tlsdesc_got_offset (input_bfd, h, r_symndx);
8485
8486 need_relocs = (h == NULL
8487 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8488 || h->root.type != bfd_link_hash_undefweak);
8489
8490 BFD_ASSERT (globals->root.srelgot != NULL);
8491 BFD_ASSERT (globals->root.sgot != NULL);
8492
8493 if (need_relocs)
8494 {
8495 bfd_byte *loc;
8496 Elf_Internal_Rela rela;
4ca9b406
SP
8497
8498 rela.r_info = ELFNN_R_INFO (indx,
8499 (c64_rtype ? MORELLO_R (TLSDESC)
8500 : AARCH64_R (TLSDESC)));
a6bb11b2 8501
a06ea964
NC
8502 rela.r_addend = 0;
8503 rela.r_offset = (globals->root.sgotplt->output_section->vma
8504 + globals->root.sgotplt->output_offset
8505 + off + globals->sgotplt_jump_table_size);
8506
8507 if (indx == 0)
8508 rela.r_addend = relocation - dtpoff_base (info);
8509
8510 /* Allocate the next available slot in the PLT reloc
8511 section to hold our R_AARCH64_TLSDESC, the next
8512 available slot is determined from reloc_count,
8513 which we step. But note, reloc_count was
8514 artifically moved down while allocating slots for
8515 real PLT relocs such that all of the PLT relocs
8516 will fit above the initial reloc_count and the
8517 extra stuff will fit below. */
8518 loc = globals->root.srelplt->contents;
8519 loc += globals->root.srelplt->reloc_count++
8520 * RELOC_SIZE (globals);
8521
cec5225b 8522 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8523
cec5225b 8524 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964
NC
8525 globals->root.sgotplt->contents + off +
8526 globals->sgotplt_jump_table_size);
cec5225b 8527 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964
NC
8528 globals->root.sgotplt->contents + off +
8529 globals->sgotplt_jump_table_size +
a1bdea65 8530 GOT_ENTRY_SIZE (globals));
a06ea964
NC
8531 }
8532
8533 symbol_tlsdesc_got_offset_mark (input_bfd, h, r_symndx);
8534 }
8535 break;
a6bb11b2
YZ
8536 default:
8537 break;
a06ea964
NC
8538 }
8539
a06ea964 8540 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
07d6d2b8
AM
8541 because such sections are not SEC_ALLOC and thus ld.so will
8542 not process them. */
a06ea964
NC
8543 if (unresolved_reloc
8544 && !((input_section->flags & SEC_DEBUGGING) != 0
8545 && h->def_dynamic)
8546 && _bfd_elf_section_offset (output_bfd, info, input_section,
8547 +rel->r_offset) != (bfd_vma) - 1)
8548 {
4eca0228 8549 _bfd_error_handler
695344c0 8550 /* xgettext:c-format */
2dcf00ce
AM
8551 (_("%pB(%pA+%#" PRIx64 "): "
8552 "unresolvable %s relocation against symbol `%s'"),
8553 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name,
a06ea964
NC
8554 h->root.root.string);
8555 return FALSE;
8556 }
8557
8558 if (r != bfd_reloc_ok && r != bfd_reloc_continue)
8559 {
c674f5cd 8560 bfd_reloc_code_real_type real_r_type
0aa13fee 8561 = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
c674f5cd 8562
a06ea964
NC
8563 switch (r)
8564 {
8565 case bfd_reloc_overflow:
1a72702b
AM
8566 (*info->callbacks->reloc_overflow)
8567 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
8568 input_bfd, input_section, rel->r_offset);
c674f5cd
JW
8569 if (real_r_type == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
8570 || real_r_type == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14)
8571 {
8572 (*info->callbacks->warning)
8573 (info,
90b6238f 8574 _("too many GOT entries for -fpic, "
c674f5cd
JW
8575 "please recompile with -fPIC"),
8576 name, input_bfd, input_section, rel->r_offset);
8577 return FALSE;
8578 }
027e9c75
NC
8579 /* Overflow can occur when a variable is referenced with a type
8580 that has a larger alignment than the type with which it was
8581 declared. eg:
8582 file1.c: extern int foo; int a (void) { return foo; }
8583 file2.c: char bar, foo, baz;
8584 If the variable is placed into a data section at an offset
8585 that is incompatible with the larger alignment requirement
8586 overflow will occur. (Strictly speaking this is not overflow
8587 but rather an alignment problem, but the bfd_reloc_ error
8588 enum does not have a value to cover that situation).
8589
8590 Try to catch this situation here and provide a more helpful
8591 error message to the user. */
26009aa7 8592 if (addend & (((bfd_vma) 1 << howto->rightshift) - 1)
027e9c75
NC
8593 /* FIXME: Are we testing all of the appropriate reloc
8594 types here ? */
8595 && (real_r_type == BFD_RELOC_AARCH64_LD_LO19_PCREL
8596 || real_r_type == BFD_RELOC_AARCH64_LDST16_LO12
8597 || real_r_type == BFD_RELOC_AARCH64_LDST32_LO12
8598 || real_r_type == BFD_RELOC_AARCH64_LDST64_LO12
8599 || real_r_type == BFD_RELOC_AARCH64_LDST128_LO12))
8600 {
8601 info->callbacks->warning
90b6238f 8602 (info, _("one possible cause of this error is that the \
027e9c75 8603symbol is being referenced in the indicated code as if it had a larger \
90b6238f 8604alignment than was declared where it was defined"),
027e9c75
NC
8605 name, input_bfd, input_section, rel->r_offset);
8606 }
40bbb79e
SP
8607
8608 if (real_r_type == BFD_RELOC_MORELLO_CAPINIT)
8609 info->callbacks->warning
8610 (info, _("relocation offset must be capability aligned"),
8611 name, input_bfd, input_section, rel->r_offset);
a06ea964
NC
8612 break;
8613
8614 case bfd_reloc_undefined:
1a72702b
AM
8615 (*info->callbacks->undefined_symbol)
8616 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
a06ea964
NC
8617 break;
8618
8619 case bfd_reloc_outofrange:
8620 error_message = _("out of range");
8621 goto common_error;
8622
8623 case bfd_reloc_notsupported:
8624 error_message = _("unsupported relocation");
8625 goto common_error;
8626
8627 case bfd_reloc_dangerous:
8628 /* error_message should already be set. */
8629 goto common_error;
8630
8631 default:
8632 error_message = _("unknown error");
8633 /* Fall through. */
8634
8635 common_error:
8636 BFD_ASSERT (error_message != NULL);
1a72702b
AM
8637 (*info->callbacks->reloc_dangerous)
8638 (info, error_message, input_bfd, input_section, rel->r_offset);
a06ea964
NC
8639 break;
8640 }
8641 }
027e9c75
NC
8642
8643 if (!save_addend)
8644 addend = 0;
a06ea964
NC
8645 }
8646
8647 return TRUE;
8648}
8649
8650/* Set the right machine number. */
8651
8652static bfd_boolean
cec5225b 8653elfNN_aarch64_object_p (bfd *abfd)
a06ea964 8654{
cec5225b
YZ
8655#if ARCH_SIZE == 32
8656 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64_ilp32);
8657#else
a06ea964 8658 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64);
cec5225b 8659#endif
a06ea964
NC
8660 return TRUE;
8661}
8662
8663/* Function to keep AArch64 specific flags in the ELF header. */
8664
8665static bfd_boolean
cec5225b 8666elfNN_aarch64_set_private_flags (bfd *abfd, flagword flags)
a06ea964
NC
8667{
8668 if (elf_flags_init (abfd) && elf_elfheader (abfd)->e_flags != flags)
8669 {
8670 }
8671 else
8672 {
8673 elf_elfheader (abfd)->e_flags = flags;
8674 elf_flags_init (abfd) = TRUE;
8675 }
8676
8677 return TRUE;
8678}
8679
a06ea964
NC
8680/* Merge backend specific data from an object file to the output
8681 object file when linking. */
8682
8683static bfd_boolean
50e03d47 8684elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
a06ea964 8685{
50e03d47 8686 bfd *obfd = info->output_bfd;
a06ea964
NC
8687 flagword out_flags;
8688 flagword in_flags;
8689 bfd_boolean flags_compatible = TRUE;
8690 asection *sec;
8691
8692 /* Check if we have the same endianess. */
50e03d47 8693 if (!_bfd_generic_verify_endian_match (ibfd, info))
a06ea964
NC
8694 return FALSE;
8695
8696 if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
8697 return TRUE;
8698
8699 /* The input BFD must have had its flags initialised. */
8700 /* The following seems bogus to me -- The flags are initialized in
8701 the assembler but I don't think an elf_flags_init field is
8702 written into the object. */
8703 /* BFD_ASSERT (elf_flags_init (ibfd)); */
8704
8705 in_flags = elf_elfheader (ibfd)->e_flags;
8706 out_flags = elf_elfheader (obfd)->e_flags;
8707
8708 if (!elf_flags_init (obfd))
8709 {
8710 /* If the input is the default architecture and had the default
07d6d2b8
AM
8711 flags then do not bother setting the flags for the output
8712 architecture, instead allow future merges to do this. If no
8713 future merges ever set these flags then they will retain their
8714 uninitialised values, which surprise surprise, correspond
8715 to the default values. */
a06ea964
NC
8716 if (bfd_get_arch_info (ibfd)->the_default
8717 && elf_elfheader (ibfd)->e_flags == 0)
8718 return TRUE;
8719
8720 elf_flags_init (obfd) = TRUE;
8721 elf_elfheader (obfd)->e_flags = in_flags;
8722
8723 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
8724 && bfd_get_arch_info (obfd)->the_default)
8725 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
8726 bfd_get_mach (ibfd));
8727
8728 return TRUE;
8729 }
8730
8731 /* Identical flags must be compatible. */
8732 if (in_flags == out_flags)
8733 return TRUE;
8734
8735 /* Check to see if the input BFD actually contains any sections. If
8736 not, its flags may not have been initialised either, but it
8737 cannot actually cause any incompatiblity. Do not short-circuit
8738 dynamic objects; their section list may be emptied by
8739 elf_link_add_object_symbols.
8740
8741 Also check to see if there are no code sections in the input.
8742 In this case there is no need to check for code specific flags.
8743 XXX - do we need to worry about floating-point format compatability
8744 in data sections ? */
8745 if (!(ibfd->flags & DYNAMIC))
8746 {
8747 bfd_boolean null_input_bfd = TRUE;
8748 bfd_boolean only_data_sections = TRUE;
8749
8750 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
8751 {
fd361982 8752 if ((bfd_section_flags (sec)
a06ea964
NC
8753 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
8754 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
8755 only_data_sections = FALSE;
8756
8757 null_input_bfd = FALSE;
8758 break;
8759 }
8760
8761 if (null_input_bfd || only_data_sections)
8762 return TRUE;
8763 }
8764
8765 return flags_compatible;
8766}
8767
8768/* Display the flags field. */
8769
8770static bfd_boolean
cec5225b 8771elfNN_aarch64_print_private_bfd_data (bfd *abfd, void *ptr)
a06ea964
NC
8772{
8773 FILE *file = (FILE *) ptr;
8774 unsigned long flags;
8775
8776 BFD_ASSERT (abfd != NULL && ptr != NULL);
8777
8778 /* Print normal ELF private data. */
8779 _bfd_elf_print_private_bfd_data (abfd, ptr);
8780
8781 flags = elf_elfheader (abfd)->e_flags;
8782 /* Ignore init flag - it may not be set, despite the flags field
8783 containing valid data. */
8784
8785 /* xgettext:c-format */
8786 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
8787
8788 if (flags)
8789 fprintf (file, _("<Unrecognised flag bits set>"));
8790
8791 fputc ('\n', file);
8792
8793 return TRUE;
8794}
8795
6353d82b
JW
8796/* Return true if we need copy relocation against EH. */
8797
8798static bfd_boolean
8799need_copy_relocation_p (struct elf_aarch64_link_hash_entry *eh)
8800{
8801 struct elf_dyn_relocs *p;
8802 asection *s;
8803
190eb1dd 8804 for (p = eh->root.dyn_relocs; p != NULL; p = p->next)
6353d82b
JW
8805 {
8806 /* If there is any pc-relative reference, we need to keep copy relocation
8807 to avoid propagating the relocation into runtime that current glibc
8808 does not support. */
8809 if (p->pc_count)
8810 return TRUE;
8811
8812 s = p->sec->output_section;
8813 /* Need copy relocation if it's against read-only section. */
8814 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8815 return TRUE;
8816 }
8817
8818 return FALSE;
8819}
8820
a06ea964
NC
8821/* Adjust a symbol defined by a dynamic object and referenced by a
8822 regular object. The current definition is in some section of the
8823 dynamic object, but we're not including those sections. We have to
8824 change the definition to something the rest of the link can
8825 understand. */
8826
8827static bfd_boolean
cec5225b 8828elfNN_aarch64_adjust_dynamic_symbol (struct bfd_link_info *info,
a06ea964
NC
8829 struct elf_link_hash_entry *h)
8830{
cec5225b 8831 struct elf_aarch64_link_hash_table *htab;
5474d94f 8832 asection *s, *srel;
a06ea964
NC
8833
8834 /* If this is a function, put it in the procedure linkage table. We
8835 will fill in the contents of the procedure linkage table later,
8836 when we know the address of the .got section. */
1419bbe5 8837 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
a06ea964
NC
8838 {
8839 if (h->plt.refcount <= 0
1419bbe5
WN
8840 || (h->type != STT_GNU_IFUNC
8841 && (SYMBOL_CALLS_LOCAL (info, h)
8842 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8843 && h->root.type == bfd_link_hash_undefweak))))
a06ea964
NC
8844 {
8845 /* This case can occur if we saw a CALL26 reloc in
8846 an input file, but the symbol wasn't referred to
8847 by a dynamic object or all references were
8848 garbage collected. In which case we can end up
8849 resolving. */
8850 h->plt.offset = (bfd_vma) - 1;
8851 h->needs_plt = 0;
8852 }
8853
8854 return TRUE;
8855 }
8856 else
80de0c6d 8857 /* Otherwise, reset to -1. */
a06ea964
NC
8858 h->plt.offset = (bfd_vma) - 1;
8859
8860
8861 /* If this is a weak symbol, and there is a real definition, the
8862 processor independent code will have arranged for us to see the
8863 real definition first, and we can just use the same value. */
60d67dc8 8864 if (h->is_weakalias)
a06ea964 8865 {
60d67dc8
AM
8866 struct elf_link_hash_entry *def = weakdef (h);
8867 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
8868 h->root.u.def.section = def->root.u.def.section;
8869 h->root.u.def.value = def->root.u.def.value;
a06ea964 8870 if (ELIMINATE_COPY_RELOCS || info->nocopyreloc)
60d67dc8 8871 h->non_got_ref = def->non_got_ref;
a06ea964
NC
8872 return TRUE;
8873 }
8874
8875 /* If we are creating a shared library, we must presume that the
8876 only references to the symbol are via the global offset table.
8877 For such cases we need not do anything here; the relocations will
8878 be handled correctly by relocate_section. */
0e1862bb 8879 if (bfd_link_pic (info))
a06ea964
NC
8880 return TRUE;
8881
8882 /* If there are no references to this symbol that do not use the
8883 GOT, we don't need to generate a copy reloc. */
8884 if (!h->non_got_ref)
8885 return TRUE;
8886
8887 /* If -z nocopyreloc was given, we won't generate them either. */
8888 if (info->nocopyreloc)
8889 {
8890 h->non_got_ref = 0;
8891 return TRUE;
8892 }
8893
6353d82b
JW
8894 if (ELIMINATE_COPY_RELOCS)
8895 {
8896 struct elf_aarch64_link_hash_entry *eh;
dce2246a 8897 /* If we don't find any dynamic relocs in read-only sections, then
6353d82b
JW
8898 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
8899 eh = (struct elf_aarch64_link_hash_entry *) h;
8900 if (!need_copy_relocation_p (eh))
8901 {
8902 h->non_got_ref = 0;
8903 return TRUE;
8904 }
8905 }
8906
a06ea964
NC
8907 /* We must allocate the symbol in our .dynbss section, which will
8908 become part of the .bss section of the executable. There will be
8909 an entry for this symbol in the .dynsym section. The dynamic
8910 object will contain position independent code, so all references
8911 from the dynamic object to this symbol will go through the global
8912 offset table. The dynamic linker will use the .dynsym entry to
8913 determine the address it must put in the global offset table, so
8914 both the dynamic object and the regular object will refer to the
8915 same memory location for the variable. */
8916
cec5225b 8917 htab = elf_aarch64_hash_table (info);
a06ea964
NC
8918
8919 /* We must generate a R_AARCH64_COPY reloc to tell the dynamic linker
8920 to copy the initial value out of the dynamic object and into the
8921 runtime process image. */
5474d94f
AM
8922 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
8923 {
8924 s = htab->root.sdynrelro;
8925 srel = htab->root.sreldynrelro;
8926 }
8927 else
8928 {
8929 s = htab->root.sdynbss;
8930 srel = htab->root.srelbss;
8931 }
a06ea964
NC
8932 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
8933 {
5474d94f 8934 srel->size += RELOC_SIZE (htab);
a06ea964
NC
8935 h->needs_copy = 1;
8936 }
8937
6cabe1ea 8938 return _bfd_elf_adjust_dynamic_copy (info, h, s);
a06ea964
NC
8939
8940}
8941
8942static bfd_boolean
cec5225b 8943elfNN_aarch64_allocate_local_symbols (bfd *abfd, unsigned number)
a06ea964
NC
8944{
8945 struct elf_aarch64_local_symbol *locals;
cec5225b 8946 locals = elf_aarch64_locals (abfd);
a06ea964
NC
8947 if (locals == NULL)
8948 {
8949 locals = (struct elf_aarch64_local_symbol *)
8950 bfd_zalloc (abfd, number * sizeof (struct elf_aarch64_local_symbol));
8951 if (locals == NULL)
8952 return FALSE;
cec5225b 8953 elf_aarch64_locals (abfd) = locals;
a06ea964
NC
8954 }
8955 return TRUE;
8956}
8957
a1bdea65
SP
8958/* Initialise the .got section to hold the global offset table. */
8959
8960static void
8961aarch64_elf_init_got_section (bfd *abfd, struct bfd_link_info *info)
8962{
8963 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
8964 asection *s;
8965 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
8966 unsigned int align = bed->s->log_file_align + globals->c64_rel;
8967
8968 if (globals->root.sgot != NULL)
8969 {
8970 bfd_set_section_alignment (globals->root.srelgot,
8971 bed->s->log_file_align);
8972 bfd_set_section_alignment (globals->root.sgot, align);
8973 globals->root.sgot->size += GOT_ENTRY_SIZE (globals);
8974 }
8975
8d4edc5f
SP
8976 /* Track capability initialisation for static non-PIE binaries. */
8977 if (bfd_link_executable (info) && !bfd_link_pic (info)
8978 && globals->srelcaps == NULL)
8979 globals->srelcaps = globals->root.srelgot;
8980
a1bdea65
SP
8981 if (globals->root.igotplt != NULL)
8982 bfd_set_section_alignment (globals->root.igotplt, align);
8983
8984 s = globals->root.sgot;
8985
8986 if (globals->root.sgotplt != NULL)
8987 {
8988 bfd_set_section_alignment (globals->root.sgotplt, align);
8989 s = globals->root.sgotplt;
8990 }
8991
8992 /* The first bit of the global offset table is the header. */
8993 if (s != NULL)
8994 s->size += bed->got_header_size (info);
8995}
8996
cc0efaa8
MS
8997/* Create the .got section to hold the global offset table. */
8998
8999static bfd_boolean
9000aarch64_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
9001{
9002 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9003 flagword flags;
9004 asection *s;
9005 struct elf_link_hash_entry *h;
9006 struct elf_link_hash_table *htab = elf_hash_table (info);
9007
9008 /* This function may be called more than once. */
ce558b89 9009 if (htab->sgot != NULL)
cc0efaa8
MS
9010 return TRUE;
9011
9012 flags = bed->dynamic_sec_flags;
9013
9014 s = bfd_make_section_anyway_with_flags (abfd,
9015 (bed->rela_plts_and_copies_p
9016 ? ".rela.got" : ".rel.got"),
9017 (bed->dynamic_sec_flags
9018 | SEC_READONLY));
a1bdea65 9019 if (s == NULL)
cc0efaa8
MS
9020 return FALSE;
9021 htab->srelgot = s;
9022
9023 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
a1bdea65 9024 if (s == NULL)
cc0efaa8
MS
9025 return FALSE;
9026 htab->sgot = s;
cc0efaa8
MS
9027
9028 if (bed->want_got_sym)
9029 {
9030 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
9031 (or .got.plt) section. We don't do this in the linker script
9032 because we don't want to define the symbol if we are not creating
9033 a global offset table. */
9034 h = _bfd_elf_define_linkage_sym (abfd, info, s,
9035 "_GLOBAL_OFFSET_TABLE_");
9036 elf_hash_table (info)->hgot = h;
9037 if (h == NULL)
9038 return FALSE;
9039 }
9040
9041 if (bed->want_got_plt)
9042 {
9043 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
a1bdea65 9044 if (s == NULL)
cc0efaa8
MS
9045 return FALSE;
9046 htab->sgotplt = s;
9047 }
9048
cc0efaa8
MS
9049 return TRUE;
9050}
9051
a06ea964
NC
9052/* Look through the relocs for a section during the first phase. */
9053
9054static bfd_boolean
cec5225b 9055elfNN_aarch64_check_relocs (bfd *abfd, struct bfd_link_info *info,
a06ea964
NC
9056 asection *sec, const Elf_Internal_Rela *relocs)
9057{
9058 Elf_Internal_Shdr *symtab_hdr;
9059 struct elf_link_hash_entry **sym_hashes;
9060 const Elf_Internal_Rela *rel;
9061 const Elf_Internal_Rela *rel_end;
9062 asection *sreloc;
9063
cec5225b 9064 struct elf_aarch64_link_hash_table *htab;
a06ea964 9065
0e1862bb 9066 if (bfd_link_relocatable (info))
a06ea964
NC
9067 return TRUE;
9068
9069 BFD_ASSERT (is_aarch64_elf (abfd));
9070
cec5225b 9071 htab = elf_aarch64_hash_table (info);
a06ea964
NC
9072 sreloc = NULL;
9073
9074 symtab_hdr = &elf_symtab_hdr (abfd);
9075 sym_hashes = elf_sym_hashes (abfd);
a06ea964 9076
7ff36d1a 9077 bfd_elfNN_aarch64_init_maps (abfd, info);
f0070c1e 9078
a06ea964
NC
9079 rel_end = relocs + sec->reloc_count;
9080 for (rel = relocs; rel < rel_end; rel++)
9081 {
9082 struct elf_link_hash_entry *h;
f3ecc5c8 9083 unsigned int r_symndx, r_type;
a6bb11b2 9084 bfd_reloc_code_real_type bfd_r_type;
1419bbe5 9085 Elf_Internal_Sym *isym;
a06ea964 9086
cec5225b 9087 r_symndx = ELFNN_R_SYM (rel->r_info);
f3ecc5c8
AC
9088 r_type = ELFNN_R_TYPE (rel->r_info);
9089 bfd_r_type = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a06ea964
NC
9090
9091 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
9092 {
695344c0 9093 /* xgettext:c-format */
871b3ab2 9094 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx);
a06ea964
NC
9095 return FALSE;
9096 }
9097
ed5acf27 9098 if (r_symndx < symtab_hdr->sh_info)
1419bbe5
WN
9099 {
9100 /* A local symbol. */
f1dfbfdb 9101 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
1419bbe5
WN
9102 abfd, r_symndx);
9103 if (isym == NULL)
9104 return FALSE;
9105
9106 /* Check relocation against local STT_GNU_IFUNC symbol. */
9107 if (ELF_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
9108 {
9109 h = elfNN_aarch64_get_local_sym_hash (htab, abfd, rel,
9110 TRUE);
9111 if (h == NULL)
9112 return FALSE;
9113
9114 /* Fake a STT_GNU_IFUNC symbol. */
9115 h->type = STT_GNU_IFUNC;
9116 h->def_regular = 1;
9117 h->ref_regular = 1;
9118 h->forced_local = 1;
9119 h->root.type = bfd_link_hash_defined;
9120 }
9121 else
9122 h = NULL;
9123 }
a06ea964
NC
9124 else
9125 {
9126 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9127 while (h->root.type == bfd_link_hash_indirect
9128 || h->root.type == bfd_link_hash_warning)
9129 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9130 }
9131
f3ecc5c8
AC
9132 /* Ignore TLS relocations against weak undef symbols and warn about them.
9133 The behaviour of weak TLS variables is not well defined. Since making
9134 these well behaved is not a priority for Morello, we simply ignore
9135 TLS relocations against such symbols here to avoid the linker crashing
9136 on these and to enable making progress in other areas. */
9137 if (r_symndx
9138 && h
9139 && IS_AARCH64_TLS_RELOC (bfd_r_type)
9140 && h->root.type == bfd_link_hash_undefweak)
9141 {
9142 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9143 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): ignoring TLS relocation "
9144 "%s against undef weak symbol %s"),
9145 abfd, sec,
9146 (uint64_t) rel->r_offset,
9147 elfNN_aarch64_howto_table[howto_index].name,
9148 h->root.root.string);
9149 continue;
9150 }
9151
a06ea964 9152 /* Could be done earlier, if h were already available. */
4ca9b406 9153 bfd_r_type = aarch64_tls_transition (abfd, info, rel, h, r_symndx);
a06ea964 9154
1419bbe5
WN
9155 if (h != NULL)
9156 {
18f822a0
JW
9157 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
9158 This shows up in particular in an R_AARCH64_PREL64 in large model
9159 when calculating the pc-relative address to .got section which is
9160 used to initialize the gp register. */
9161 if (h->root.root.string
9162 && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
9163 {
9164 if (htab->root.dynobj == NULL)
9165 htab->root.dynobj = abfd;
9166
9167 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
9168 return FALSE;
9169
9170 BFD_ASSERT (h == htab->root.hgot);
9171 }
9172
1419bbe5
WN
9173 /* Create the ifunc sections for static executables. If we
9174 never see an indirect function symbol nor we are building
9175 a static executable, those sections will be empty and
9176 won't appear in output. */
9177 switch (bfd_r_type)
9178 {
9179 default:
9180 break;
9181
e19e9199
SP
9182 case BFD_RELOC_MORELLO_CALL26:
9183 case BFD_RELOC_MORELLO_JUMP26:
9184 /* For dynamic symbols record caller information so that we can
9185 decide what kind of PLT stubs to emit. */
9186 if (h != NULL)
9187 elf_aarch64_hash_entry (h)->got_type = GOT_CAP;
9188 /* Fall through. */
9189
ce336788
JW
9190 case BFD_RELOC_AARCH64_ADD_LO12:
9191 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 9192 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
ce336788 9193 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 9194 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5 9195 case BFD_RELOC_AARCH64_CALL26:
ce336788 9196 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
1419bbe5 9197 case BFD_RELOC_AARCH64_JUMP26:
7018c030 9198 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
1419bbe5 9199 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 9200 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 9201 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
1419bbe5 9202 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 9203 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
dc8008f5 9204 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 9205 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
ce336788 9206 case BFD_RELOC_AARCH64_NN:
1419bbe5
WN
9207 if (htab->root.dynobj == NULL)
9208 htab->root.dynobj = abfd;
9209 if (!_bfd_elf_create_ifunc_sections (htab->root.dynobj, info))
9210 return FALSE;
9211 break;
9212 }
9213
2d0ca824 9214 /* It is referenced by a non-shared object. */
1419bbe5 9215 h->ref_regular = 1;
1419bbe5
WN
9216 }
9217
a6bb11b2 9218 switch (bfd_r_type)
a06ea964 9219 {
79e74192
RL
9220 case BFD_RELOC_AARCH64_16:
9221#if ARCH_SIZE == 64
9222 case BFD_RELOC_AARCH64_32:
9223#endif
279b2f94 9224 if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0)
79e74192 9225 {
279b2f94
RL
9226 if (h != NULL
9227 /* This is an absolute symbol. It represents a value instead
9228 of an address. */
c691de6a 9229 && (bfd_is_abs_symbol (&h->root)
279b2f94
RL
9230 /* This is an undefined symbol. */
9231 || h->root.type == bfd_link_hash_undefined))
9232 break;
9233
9234 /* For local symbols, defined global symbols in a non-ABS section,
9235 it is assumed that the value is an address. */
79e74192
RL
9236 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9237 _bfd_error_handler
9238 /* xgettext:c-format */
871b3ab2 9239 (_("%pB: relocation %s against `%s' can not be used when making "
79e74192
RL
9240 "a shared object"),
9241 abfd, elfNN_aarch64_howto_table[howto_index].name,
9242 (h) ? h->root.root.string : "a local symbol");
9243 bfd_set_error (bfd_error_bad_value);
9244 return FALSE;
9245 }
9246 else
9247 break;
9248
6353d82b
JW
9249 case BFD_RELOC_AARCH64_MOVW_G0_NC:
9250 case BFD_RELOC_AARCH64_MOVW_G1_NC:
9251 case BFD_RELOC_AARCH64_MOVW_G2_NC:
9252 case BFD_RELOC_AARCH64_MOVW_G3:
9253 if (bfd_link_pic (info))
9254 {
9255 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9256 _bfd_error_handler
9257 /* xgettext:c-format */
871b3ab2 9258 (_("%pB: relocation %s against `%s' can not be used when making "
6353d82b
JW
9259 "a shared object; recompile with -fPIC"),
9260 abfd, elfNN_aarch64_howto_table[howto_index].name,
9261 (h) ? h->root.root.string : "a local symbol");
9262 bfd_set_error (bfd_error_bad_value);
9263 return FALSE;
9264 }
9265 /* Fall through. */
9266
9267 case BFD_RELOC_AARCH64_16_PCREL:
9268 case BFD_RELOC_AARCH64_32_PCREL:
9269 case BFD_RELOC_AARCH64_64_PCREL:
9270 case BFD_RELOC_AARCH64_ADD_LO12:
9271 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
9272 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP
9273 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
9274 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
6353d82b
JW
9275 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
9276 case BFD_RELOC_AARCH64_LDST128_LO12:
9277 case BFD_RELOC_AARCH64_LDST16_LO12:
9278 case BFD_RELOC_AARCH64_LDST32_LO12:
9279 case BFD_RELOC_AARCH64_LDST64_LO12:
9280 case BFD_RELOC_AARCH64_LDST8_LO12:
9281 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 9282 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
6353d82b
JW
9283 if (h == NULL || bfd_link_pic (info))
9284 break;
9285 /* Fall through. */
9286
a6bb11b2 9287 case BFD_RELOC_AARCH64_NN:
a06ea964
NC
9288
9289 /* We don't need to handle relocs into sections not going into
9290 the "real" output. */
9291 if ((sec->flags & SEC_ALLOC) == 0)
9292 break;
9293
9294 if (h != NULL)
9295 {
0e1862bb 9296 if (!bfd_link_pic (info))
a06ea964
NC
9297 h->non_got_ref = 1;
9298
9299 h->plt.refcount += 1;
9300 h->pointer_equality_needed = 1;
9301 }
9302
9303 /* No need to do anything if we're not creating a shared
9304 object. */
6353d82b
JW
9305 if (!(bfd_link_pic (info)
9306 /* If on the other hand, we are creating an executable, we
9307 may need to keep relocations for symbols satisfied by a
9308 dynamic library if we manage to avoid copy relocs for the
9309 symbol.
9310
9311 NOTE: Currently, there is no support of copy relocs
9312 elimination on pc-relative relocation types, because there is
9313 no dynamic relocation support for them in glibc. We still
9314 record the dynamic symbol reference for them. This is
9315 because one symbol may be referenced by both absolute
9316 relocation (for example, BFD_RELOC_AARCH64_NN) and
9317 pc-relative relocation. We need full symbol reference
9318 information to make correct decision later in
9319 elfNN_aarch64_adjust_dynamic_symbol. */
9320 || (ELIMINATE_COPY_RELOCS
9321 && !bfd_link_pic (info)
9322 && h != NULL
9323 && (h->root.type == bfd_link_hash_defweak
9324 || !h->def_regular))))
a06ea964
NC
9325 break;
9326
9327 {
9328 struct elf_dyn_relocs *p;
9329 struct elf_dyn_relocs **head;
6353d82b 9330 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
a06ea964
NC
9331
9332 /* We must copy these reloc types into the output file.
9333 Create a reloc section in dynobj and make room for
9334 this reloc. */
9335 if (sreloc == NULL)
9336 {
9337 if (htab->root.dynobj == NULL)
9338 htab->root.dynobj = abfd;
9339
9340 sreloc = _bfd_elf_make_dynamic_reloc_section
0608afa7 9341 (sec, htab->root.dynobj, LOG_FILE_ALIGN, abfd, /*rela? */ TRUE);
a06ea964
NC
9342
9343 if (sreloc == NULL)
9344 return FALSE;
9345 }
9346
9347 /* If this is a global symbol, we count the number of
9348 relocations we need for this symbol. */
9349 if (h != NULL)
9350 {
190eb1dd 9351 head = &h->dyn_relocs;
a06ea964
NC
9352 }
9353 else
9354 {
9355 /* Track dynamic relocs needed for local syms too.
9356 We really need local syms available to do this
9357 easily. Oh well. */
9358
9359 asection *s;
9360 void **vpp;
a06ea964 9361
f1dfbfdb 9362 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
a06ea964
NC
9363 abfd, r_symndx);
9364 if (isym == NULL)
9365 return FALSE;
9366
9367 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
9368 if (s == NULL)
9369 s = sec;
9370
9371 /* Beware of type punned pointers vs strict aliasing
9372 rules. */
9373 vpp = &(elf_section_data (s)->local_dynrel);
9374 head = (struct elf_dyn_relocs **) vpp;
9375 }
9376
9377 p = *head;
9378 if (p == NULL || p->sec != sec)
9379 {
986f0783 9380 size_t amt = sizeof *p;
a06ea964
NC
9381 p = ((struct elf_dyn_relocs *)
9382 bfd_zalloc (htab->root.dynobj, amt));
9383 if (p == NULL)
9384 return FALSE;
9385 p->next = *head;
9386 *head = p;
9387 p->sec = sec;
9388 }
9389
9390 p->count += 1;
9391
6353d82b
JW
9392 if (elfNN_aarch64_howto_table[howto_index].pc_relative)
9393 p->pc_count += 1;
a06ea964
NC
9394 }
9395 break;
9396
9397 /* RR: We probably want to keep a consistency check that
9398 there are no dangling GOT_PAGE relocs. */
92504105 9399 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a1bdea65 9400 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
4ca9b406
SP
9401 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
9402 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a1bdea65
SP
9403 htab->c64_rel = 1;
9404 /* Fall through. */
9405
9406 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
7bcccb57 9407 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 9408 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
7bcccb57 9409 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 9410 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 9411 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
7bcccb57 9412 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 9413 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 9414 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
f955cccf 9415 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
7bcccb57 9416 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 9417 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7bcccb57 9418 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 9419 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 9420 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL
9421 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
9422 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a6bb11b2 9423 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
7bcccb57 9424 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 9425 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 9426 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 9427 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
a6bb11b2 9428 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 9429 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
7bcccb57 9430 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 9431 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL
9432 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
9433 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
73f925cc 9434 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 9435 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 9436 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC
9437 {
9438 unsigned got_type;
9439 unsigned old_got_type;
9440
a6bb11b2 9441 got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC
9442
9443 if (h)
9444 {
9445 h->got.refcount += 1;
cec5225b 9446 old_got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC
9447 }
9448 else
9449 {
9450 struct elf_aarch64_local_symbol *locals;
9451
cec5225b 9452 if (!elfNN_aarch64_allocate_local_symbols
a06ea964
NC
9453 (abfd, symtab_hdr->sh_info))
9454 return FALSE;
9455
cec5225b 9456 locals = elf_aarch64_locals (abfd);
a06ea964
NC
9457 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
9458 locals[r_symndx].got_refcount += 1;
9459 old_got_type = locals[r_symndx].got_type;
9460 }
9461
9462 /* If a variable is accessed with both general dynamic TLS
9463 methods, two slots may be created. */
9464 if (GOT_TLS_GD_ANY_P (old_got_type) && GOT_TLS_GD_ANY_P (got_type))
9465 got_type |= old_got_type;
9466
9467 /* We will already have issued an error message if there
9468 is a TLS/non-TLS mismatch, based on the symbol type.
9469 So just combine any TLS types needed. */
9470 if (old_got_type != GOT_UNKNOWN && old_got_type != GOT_NORMAL
a1bdea65
SP
9471 && got_type != GOT_NORMAL && old_got_type != GOT_CAP
9472 && got_type != GOT_CAP)
a06ea964
NC
9473 got_type |= old_got_type;
9474
9475 /* If the symbol is accessed by both IE and GD methods, we
9476 are able to relax. Turn off the GD flag, without
9477 messing up with any other kind of TLS types that may be
9478 involved. */
9479 if ((got_type & GOT_TLS_IE) && GOT_TLS_GD_ANY_P (got_type))
9480 got_type &= ~ (GOT_TLSDESC_GD | GOT_TLS_GD);
9481
4ca9b406
SP
9482 /* Prefer the capability reference. */
9483 if ((old_got_type & GOT_CAP) && (got_type & GOT_NORMAL))
9484 {
9485 got_type &= ~GOT_NORMAL;
9486 got_type |= GOT_CAP;
9487 }
9488
9489 if (old_got_type != got_type)
a06ea964
NC
9490 {
9491 if (h != NULL)
cec5225b 9492 elf_aarch64_hash_entry (h)->got_type = got_type;
a06ea964
NC
9493 else
9494 {
9495 struct elf_aarch64_local_symbol *locals;
cec5225b 9496 locals = elf_aarch64_locals (abfd);
a06ea964
NC
9497 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
9498 locals[r_symndx].got_type = got_type;
9499 }
9500 }
9501
cc0efaa8
MS
9502 if (htab->root.dynobj == NULL)
9503 htab->root.dynobj = abfd;
9504 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
9505 return FALSE;
a06ea964
NC
9506 break;
9507 }
9508
e19e9199
SP
9509 case BFD_RELOC_MORELLO_CALL26:
9510 case BFD_RELOC_MORELLO_JUMP26:
9511 htab->c64_rel = 1;
9512 if (h != NULL)
9513 elf_aarch64_hash_entry (h)->got_type = GOT_CAP;
9514
9515 /* Fall through. */
a6bb11b2
YZ
9516 case BFD_RELOC_AARCH64_CALL26:
9517 case BFD_RELOC_AARCH64_JUMP26:
a06ea964 9518 if (h == NULL)
f0070c1e
SP
9519 {
9520 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, abfd,
9521 r_symndx);
9522 if (isym == NULL)
9523 return FALSE;
9524
9525 asection *s = bfd_section_from_elf_index (abfd, isym->st_shndx);
9526
9527 if (s == NULL)
9528 s = sec;
9529
9530 if (c64_value_p (s, isym->st_value))
9531 isym->st_target_internal |= ST_BRANCH_TO_C64;
9532
9533 /* If this is a local symbol then we resolve it
9534 directly without creating a PLT entry. */
9535 continue;
9536 }
9537
9538 if (h->root.type == bfd_link_hash_defined
9539 || h->root.type == bfd_link_hash_defweak)
9540 {
9541 asection *sym_sec = h->root.u.def.section;
9542 bfd_vma sym_value = h->root.u.def.value;
9543
9544 if (sym_sec != NULL && c64_value_p (sym_sec, sym_value))
9545 h->target_internal |= ST_BRANCH_TO_C64;
9546 }
a06ea964
NC
9547
9548 h->needs_plt = 1;
1419bbe5
WN
9549 if (h->plt.refcount <= 0)
9550 h->plt.refcount = 1;
9551 else
9552 h->plt.refcount += 1;
a06ea964 9553 break;
a6bb11b2 9554
40bbb79e
SP
9555 case BFD_RELOC_MORELLO_CAPINIT:
9556 if (htab->srelcaps == NULL)
9557 {
9558 if (htab->root.dynobj == NULL)
9559 htab->root.dynobj = abfd;
9560
9561 sreloc = _bfd_elf_make_dynamic_reloc_section
9562 (sec, htab->root.dynobj, LOG_FILE_ALIGN,
9563 abfd, /*rela? */ TRUE);
9564
9565 if (sreloc == NULL)
9566 return FALSE;
9567
9568 htab->srelcaps = sreloc;
9569 }
9570 htab->srelcaps->size += RELOC_SIZE (htab);
9571
9572 break;
9573
a6bb11b2
YZ
9574 default:
9575 break;
a06ea964
NC
9576 }
9577 }
a6bb11b2 9578
a06ea964
NC
9579 return TRUE;
9580}
9581
9582/* Treat mapping symbols as special target symbols. */
9583
9584static bfd_boolean
cec5225b 9585elfNN_aarch64_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC
9586 asymbol *sym)
9587{
9588 return bfd_is_aarch64_special_symbol_name (sym->name,
9589 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY);
9590}
9591
e7679060
AM
9592/* If the ELF symbol SYM might be a function in SEC, return the
9593 function size and set *CODE_OFF to the function's entry point,
9594 otherwise return zero. */
a06ea964 9595
e7679060
AM
9596static bfd_size_type
9597elfNN_aarch64_maybe_function_sym (const asymbol *sym, asection *sec,
9598 bfd_vma *code_off)
9599{
9600 bfd_size_type size;
a06ea964 9601
e7679060
AM
9602 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
9603 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
9604 || sym->section != sec)
9605 return 0;
a06ea964 9606
e7679060
AM
9607 if (!(sym->flags & BSF_SYNTHETIC))
9608 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
9609 {
a06ea964
NC
9610 case STT_FUNC:
9611 case STT_NOTYPE:
a06ea964 9612 break;
e7679060
AM
9613 default:
9614 return 0;
9615 }
a06ea964 9616
e7679060
AM
9617 if ((sym->flags & BSF_LOCAL)
9618 && bfd_is_aarch64_special_symbol_name (sym->name,
9619 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY))
9620 return 0;
a06ea964 9621
e7679060
AM
9622 *code_off = sym->value;
9623 size = 0;
9624 if (!(sym->flags & BSF_SYNTHETIC))
9625 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
9626 if (size == 0)
9627 size = 1;
9628 return size;
a06ea964
NC
9629}
9630
9631static bfd_boolean
cec5225b 9632elfNN_aarch64_find_inliner_info (bfd *abfd,
a06ea964
NC
9633 const char **filename_ptr,
9634 const char **functionname_ptr,
9635 unsigned int *line_ptr)
9636{
9637 bfd_boolean found;
9638 found = _bfd_dwarf2_find_inliner_info
9639 (abfd, filename_ptr,
9640 functionname_ptr, line_ptr, &elf_tdata (abfd)->dwarf2_find_line_info);
9641 return found;
9642}
9643
9644
ed7e9d0b
AM
9645static bfd_boolean
9646elfNN_aarch64_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
a06ea964
NC
9647{
9648 Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */
9649
ed7e9d0b
AM
9650 if (!_bfd_elf_init_file_header (abfd, link_info))
9651 return FALSE;
9652
a06ea964 9653 i_ehdrp = elf_elfheader (abfd);
a06ea964 9654 i_ehdrp->e_ident[EI_ABIVERSION] = AARCH64_ELF_ABI_VERSION;
ed7e9d0b 9655 return TRUE;
a06ea964
NC
9656}
9657
9658static enum elf_reloc_type_class
cec5225b 9659elfNN_aarch64_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
7e612e98
AM
9660 const asection *rel_sec ATTRIBUTE_UNUSED,
9661 const Elf_Internal_Rela *rela)
a06ea964 9662{
f2e6a843
SN
9663 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
9664
9665 if (htab->root.dynsym != NULL
9666 && htab->root.dynsym->contents != NULL)
9667 {
9668 /* Check relocation against STT_GNU_IFUNC symbol if there are
9669 dynamic symbols. */
9670 bfd *abfd = info->output_bfd;
9671 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9672 unsigned long r_symndx = ELFNN_R_SYM (rela->r_info);
9673 if (r_symndx != STN_UNDEF)
9674 {
9675 Elf_Internal_Sym sym;
9676 if (!bed->s->swap_symbol_in (abfd,
9677 (htab->root.dynsym->contents
9678 + r_symndx * bed->s->sizeof_sym),
9679 0, &sym))
9680 {
9681 /* xgettext:c-format */
871b3ab2 9682 _bfd_error_handler (_("%pB symbol number %lu references"
f2e6a843
SN
9683 " nonexistent SHT_SYMTAB_SHNDX section"),
9684 abfd, r_symndx);
9685 /* Ideally an error class should be returned here. */
9686 }
9687 else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
9688 return reloc_class_ifunc;
9689 }
9690 }
9691
cec5225b 9692 switch ((int) ELFNN_R_TYPE (rela->r_info))
a06ea964 9693 {
f2e6a843 9694 case AARCH64_R (IRELATIVE):
e19e9199 9695 case MORELLO_R (IRELATIVE):
f2e6a843 9696 return reloc_class_ifunc;
a6bb11b2 9697 case AARCH64_R (RELATIVE):
e19e9199 9698 case MORELLO_R (RELATIVE):
a06ea964 9699 return reloc_class_relative;
a6bb11b2 9700 case AARCH64_R (JUMP_SLOT):
e19e9199 9701 case MORELLO_R (JUMP_SLOT):
a06ea964 9702 return reloc_class_plt;
a6bb11b2 9703 case AARCH64_R (COPY):
a06ea964
NC
9704 return reloc_class_copy;
9705 default:
9706 return reloc_class_normal;
9707 }
9708}
9709
a06ea964
NC
9710/* Handle an AArch64 specific section when reading an object file. This is
9711 called when bfd_section_from_shdr finds a section with an unknown
9712 type. */
9713
9714static bfd_boolean
cec5225b 9715elfNN_aarch64_section_from_shdr (bfd *abfd,
a06ea964
NC
9716 Elf_Internal_Shdr *hdr,
9717 const char *name, int shindex)
9718{
9719 /* There ought to be a place to keep ELF backend specific flags, but
9720 at the moment there isn't one. We just keep track of the
9721 sections by their name, instead. Fortunately, the ABI gives
9722 names for all the AArch64 specific sections, so we will probably get
9723 away with this. */
9724 switch (hdr->sh_type)
9725 {
9726 case SHT_AARCH64_ATTRIBUTES:
9727 break;
9728
9729 default:
9730 return FALSE;
9731 }
9732
9733 if (!_bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
9734 return FALSE;
9735
9736 return TRUE;
9737}
9738
a06ea964
NC
9739typedef struct
9740{
9741 void *finfo;
9742 struct bfd_link_info *info;
9743 asection *sec;
9744 int sec_shndx;
9745 int (*func) (void *, const char *, Elf_Internal_Sym *,
9746 asection *, struct elf_link_hash_entry *);
9747} output_arch_syminfo;
9748
9749enum map_symbol_type
9750{
9751 AARCH64_MAP_INSN,
e19e9199
SP
9752 AARCH64_MAP_DATA,
9753 AARCH64_MAP_C64,
a06ea964
NC
9754};
9755
9756
9757/* Output a single mapping symbol. */
9758
9759static bfd_boolean
cec5225b 9760elfNN_aarch64_output_map_sym (output_arch_syminfo *osi,
a06ea964
NC
9761 enum map_symbol_type type, bfd_vma offset)
9762{
3979cf50 9763 static const char *names[3] = { "$x", "$d", "$c" };
a06ea964
NC
9764 Elf_Internal_Sym sym;
9765
9766 sym.st_value = (osi->sec->output_section->vma
9767 + osi->sec->output_offset + offset);
9768 sym.st_size = 0;
9769 sym.st_other = 0;
9770 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
9771 sym.st_shndx = osi->sec_shndx;
8b21361b 9772 sym.st_target_internal = 0;
a06ea964
NC
9773 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
9774}
9775
a06ea964
NC
9776/* Output a single local symbol for a generated stub. */
9777
9778static bfd_boolean
cec5225b 9779elfNN_aarch64_output_stub_sym (output_arch_syminfo *osi, const char *name,
a06ea964
NC
9780 bfd_vma offset, bfd_vma size)
9781{
9782 Elf_Internal_Sym sym;
9783
9784 sym.st_value = (osi->sec->output_section->vma
9785 + osi->sec->output_offset + offset);
9786 sym.st_size = size;
9787 sym.st_other = 0;
9788 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
9789 sym.st_shndx = osi->sec_shndx;
8b21361b 9790 sym.st_target_internal = 0;
a06ea964
NC
9791 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
9792}
9793
9794static bfd_boolean
9795aarch64_map_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
9796{
cec5225b 9797 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC
9798 asection *stub_sec;
9799 bfd_vma addr;
9800 char *stub_name;
9801 output_arch_syminfo *osi;
9802
9803 /* Massage our args to the form they really have. */
cec5225b 9804 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964
NC
9805 osi = (output_arch_syminfo *) in_arg;
9806
9807 stub_sec = stub_entry->stub_sec;
9808
9809 /* Ensure this stub is attached to the current section being
9810 processed. */
9811 if (stub_sec != osi->sec)
9812 return TRUE;
9813
9814 addr = (bfd_vma) stub_entry->stub_offset;
9815
9816 stub_name = stub_entry->output_name;
9817
9818 switch (stub_entry->stub_type)
9819 {
9820 case aarch64_stub_adrp_branch:
cec5225b 9821 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
a06ea964
NC
9822 sizeof (aarch64_adrp_branch_stub)))
9823 return FALSE;
cec5225b 9824 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964
NC
9825 return FALSE;
9826 break;
9827 case aarch64_stub_long_branch:
cec5225b 9828 if (!elfNN_aarch64_output_stub_sym
a06ea964
NC
9829 (osi, stub_name, addr, sizeof (aarch64_long_branch_stub)))
9830 return FALSE;
cec5225b 9831 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964 9832 return FALSE;
cec5225b 9833 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_DATA, addr + 16))
a06ea964
NC
9834 return FALSE;
9835 break;
68fcca92
JW
9836 case aarch64_stub_erratum_835769_veneer:
9837 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9838 sizeof (aarch64_erratum_835769_stub)))
9839 return FALSE;
9840 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
9841 return FALSE;
9842 break;
4106101c
MS
9843 case aarch64_stub_erratum_843419_veneer:
9844 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9845 sizeof (aarch64_erratum_843419_stub)))
9846 return FALSE;
9847 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
9848 return FALSE;
9849 break;
50e192f0
SP
9850 case aarch64_stub_branch_c64:
9851 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9852 sizeof (aarch64_c64_branch_stub)))
9853 return FALSE;
9854 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
9855 return FALSE;
9856 break;
9857 case c64_stub_branch_aarch64:
9858 case c64_stub_branch_c64:
9859 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9860 sizeof (c64_aarch64_branch_stub)))
9861 return FALSE;
9862 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
9863 return FALSE;
9864 break;
9fca35fc
TC
9865 case aarch64_stub_none:
9866 break;
4106101c 9867
a06ea964 9868 default:
8e2fe09f 9869 abort ();
a06ea964
NC
9870 }
9871
9872 return TRUE;
9873}
9874
9875/* Output mapping symbols for linker generated sections. */
9876
9877static bfd_boolean
cec5225b 9878elfNN_aarch64_output_arch_local_syms (bfd *output_bfd,
a06ea964
NC
9879 struct bfd_link_info *info,
9880 void *finfo,
9881 int (*func) (void *, const char *,
9882 Elf_Internal_Sym *,
9883 asection *,
9884 struct elf_link_hash_entry
9885 *))
9886{
9887 output_arch_syminfo osi;
cec5225b 9888 struct elf_aarch64_link_hash_table *htab;
a06ea964 9889
cec5225b 9890 htab = elf_aarch64_hash_table (info);
a06ea964
NC
9891
9892 osi.finfo = finfo;
9893 osi.info = info;
9894 osi.func = func;
9895
9896 /* Long calls stubs. */
9897 if (htab->stub_bfd && htab->stub_bfd->sections)
9898 {
9899 asection *stub_sec;
9900
9901 for (stub_sec = htab->stub_bfd->sections;
9902 stub_sec != NULL; stub_sec = stub_sec->next)
9903 {
9904 /* Ignore non-stub sections. */
9905 if (!strstr (stub_sec->name, STUB_SUFFIX))
9906 continue;
9907
9908 osi.sec = stub_sec;
9909
9910 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9911 (output_bfd, osi.sec->output_section);
9912
61865519
MS
9913 /* The first instruction in a stub is always a branch. */
9914 if (!elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0))
9915 return FALSE;
9916
a06ea964
NC
9917 bfd_hash_traverse (&htab->stub_hash_table, aarch64_map_one_stub,
9918 &osi);
9919 }
9920 }
9921
9922 /* Finally, output mapping symbols for the PLT. */
9923 if (!htab->root.splt || htab->root.splt->size == 0)
9924 return TRUE;
9925
a06ea964
NC
9926 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9927 (output_bfd, htab->root.splt->output_section);
9928 osi.sec = htab->root.splt;
9929
e19e9199
SP
9930 elfNN_aarch64_output_map_sym (&osi, (htab->c64_rel ? AARCH64_MAP_C64
9931 : AARCH64_MAP_INSN), 0);
a06ea964
NC
9932
9933 return TRUE;
9934
9935}
9936
9937/* Allocate target specific section data. */
9938
9939static bfd_boolean
cec5225b 9940elfNN_aarch64_new_section_hook (bfd *abfd, asection *sec)
a06ea964
NC
9941{
9942 if (!sec->used_by_bfd)
9943 {
9944 _aarch64_elf_section_data *sdata;
986f0783 9945 size_t amt = sizeof (*sdata);
a06ea964
NC
9946
9947 sdata = bfd_zalloc (abfd, amt);
9948 if (sdata == NULL)
9949 return FALSE;
f0070c1e 9950 sdata->elf.is_target_section_data = TRUE;
a06ea964
NC
9951 sec->used_by_bfd = sdata;
9952 }
9953
a06ea964
NC
9954 return _bfd_elf_new_section_hook (abfd, sec);
9955}
9956
9957
a06ea964
NC
9958/* Create dynamic sections. This is different from the ARM backend in that
9959 the got, plt, gotplt and their relocation sections are all created in the
9960 standard part of the bfd elf backend. */
9961
9962static bfd_boolean
cec5225b 9963elfNN_aarch64_create_dynamic_sections (bfd *dynobj,
a06ea964
NC
9964 struct bfd_link_info *info)
9965{
cc0efaa8
MS
9966 /* We need to create .got section. */
9967 if (!aarch64_elf_create_got_section (dynobj, info))
9968 return FALSE;
a06ea964 9969
9d19e4fd 9970 return _bfd_elf_create_dynamic_sections (dynobj, info);
a06ea964
NC
9971}
9972
9973
9974/* Allocate space in .plt, .got and associated reloc sections for
9975 dynamic relocs. */
9976
9977static bfd_boolean
cec5225b 9978elfNN_aarch64_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
a06ea964
NC
9979{
9980 struct bfd_link_info *info;
cec5225b
YZ
9981 struct elf_aarch64_link_hash_table *htab;
9982 struct elf_aarch64_link_hash_entry *eh;
a06ea964
NC
9983 struct elf_dyn_relocs *p;
9984
9985 /* An example of a bfd_link_hash_indirect symbol is versioned
9986 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
9987 -> __gxx_personality_v0(bfd_link_hash_defined)
9988
9989 There is no need to process bfd_link_hash_indirect symbols here
9990 because we will also be presented with the concrete instance of
cec5225b 9991 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
a06ea964 9992 called to copy all relevant data from the generic to the concrete
2d0ca824 9993 symbol instance. */
a06ea964
NC
9994 if (h->root.type == bfd_link_hash_indirect)
9995 return TRUE;
9996
9997 if (h->root.type == bfd_link_hash_warning)
9998 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9999
10000 info = (struct bfd_link_info *) inf;
cec5225b 10001 htab = elf_aarch64_hash_table (info);
a06ea964 10002
1419bbe5
WN
10003 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
10004 here if it is defined and referenced in a non-shared object. */
10005 if (h->type == STT_GNU_IFUNC
10006 && h->def_regular)
10007 return TRUE;
10008 else if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
a06ea964
NC
10009 {
10010 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 10011 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW
10012 if (h->dynindx == -1 && !h->forced_local
10013 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC
10014 {
10015 if (!bfd_elf_link_record_dynamic_symbol (info, h))
10016 return FALSE;
10017 }
10018
0e1862bb 10019 if (bfd_link_pic (info) || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
a06ea964
NC
10020 {
10021 asection *s = htab->root.splt;
10022
10023 /* If this is the first .plt entry, make room for the special
10024 first entry. */
10025 if (s->size == 0)
10026 s->size += htab->plt_header_size;
10027
10028 h->plt.offset = s->size;
10029
10030 /* If this symbol is not defined in a regular file, and we are
10031 not generating a shared library, then set the symbol to this
10032 location in the .plt. This is required to make function
10033 pointers compare as equal between the normal executable and
10034 the shared library. */
0e1862bb 10035 if (!bfd_link_pic (info) && !h->def_regular)
a06ea964
NC
10036 {
10037 h->root.u.def.section = s;
10038 h->root.u.def.value = h->plt.offset;
10039 }
10040
10041 /* Make room for this entry. For now we only create the
10042 small model PLT entries. We later need to find a way
10043 of relaxing into these from the large model PLT entries. */
37c18eed 10044 s->size += htab->plt_entry_size;
a06ea964
NC
10045
10046 /* We also need to make an entry in the .got.plt section, which
10047 will be placed in the .got section by the linker script. */
a1bdea65 10048 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10049
10050 /* We also need to make an entry in the .rela.plt section. */
10051 htab->root.srelplt->size += RELOC_SIZE (htab);
10052
10053 /* We need to ensure that all GOT entries that serve the PLT
10054 are consecutive with the special GOT slots [0] [1] and
10055 [2]. Any addtional relocations, such as
10056 R_AARCH64_TLSDESC, must be placed after the PLT related
10057 entries. We abuse the reloc_count such that during
10058 sizing we adjust reloc_count to indicate the number of
10059 PLT related reserved entries. In subsequent phases when
10060 filling in the contents of the reloc entries, PLT related
10061 entries are placed by computing their PLT index (0
10062 .. reloc_count). While other none PLT relocs are placed
10063 at the slot indicated by reloc_count and reloc_count is
10064 updated. */
10065
10066 htab->root.srelplt->reloc_count++;
823710d5
SN
10067
10068 /* Mark the DSO in case R_<CLS>_JUMP_SLOT relocs against
10069 variant PCS symbols are present. */
10070 if (h->other & STO_AARCH64_VARIANT_PCS)
10071 htab->variant_pcs = 1;
10072
a06ea964
NC
10073 }
10074 else
10075 {
10076 h->plt.offset = (bfd_vma) - 1;
10077 h->needs_plt = 0;
10078 }
10079 }
10080 else
10081 {
10082 h->plt.offset = (bfd_vma) - 1;
10083 h->needs_plt = 0;
10084 }
10085
cec5225b 10086 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC
10087 eh->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
10088
10089 if (h->got.refcount > 0)
10090 {
10091 bfd_boolean dyn;
cec5225b 10092 unsigned got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC
10093
10094 h->got.offset = (bfd_vma) - 1;
10095
10096 dyn = htab->root.dynamic_sections_created;
10097
10098 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 10099 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW
10100 if (dyn && h->dynindx == -1 && !h->forced_local
10101 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC
10102 {
10103 if (!bfd_elf_link_record_dynamic_symbol (info, h))
10104 return FALSE;
10105 }
10106
10107 if (got_type == GOT_UNKNOWN)
10108 {
10109 }
a1bdea65
SP
10110 else if (got_type == GOT_NORMAL
10111 || got_type == GOT_CAP)
a06ea964
NC
10112 {
10113 h->got.offset = htab->root.sgot->size;
a1bdea65 10114 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10115 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10116 || h->root.type != bfd_link_hash_undefweak)
0e1862bb 10117 && (bfd_link_pic (info)
a377ae2a
SN
10118 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))
10119 /* Undefined weak symbol in static PIE resolves to 0 without
10120 any dynamic relocations. */
10121 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC
10122 {
10123 htab->root.srelgot->size += RELOC_SIZE (htab);
10124 }
8d4edc5f
SP
10125 else if (bfd_link_executable (info) && !bfd_link_pic (info))
10126 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC
10127 }
10128 else
10129 {
10130 int indx;
10131 if (got_type & GOT_TLSDESC_GD)
10132 {
10133 eh->tlsdesc_got_jump_table_offset =
10134 (htab->root.sgotplt->size
10135 - aarch64_compute_jump_table_size (htab));
a1bdea65 10136 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10137 h->got.offset = (bfd_vma) - 2;
10138 }
10139
10140 if (got_type & GOT_TLS_GD)
10141 {
10142 h->got.offset = htab->root.sgot->size;
a1bdea65 10143 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10144 }
10145
10146 if (got_type & GOT_TLS_IE)
10147 {
10148 h->got.offset = htab->root.sgot->size;
a1bdea65 10149 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10150 }
10151
10152 indx = h && h->dynindx != -1 ? h->dynindx : 0;
10153 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10154 || h->root.type != bfd_link_hash_undefweak)
6dda7875 10155 && (!bfd_link_executable (info)
a06ea964 10156 || indx != 0
4ca9b406
SP
10157 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)
10158 /* On Morello support only TLSDESC_GD to TLSLE relaxation;
10159 for everything else we must emit a dynamic relocation. */
10160 || got_type & GOT_CAP))
a06ea964
NC
10161 {
10162 if (got_type & GOT_TLSDESC_GD)
10163 {
10164 htab->root.srelplt->size += RELOC_SIZE (htab);
10165 /* Note reloc_count not incremented here! We have
10166 already adjusted reloc_count for this relocation
10167 type. */
10168
10169 /* TLSDESC PLT is now needed, but not yet determined. */
9bcc30e4 10170 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC
10171 }
10172
10173 if (got_type & GOT_TLS_GD)
10174 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
10175
10176 if (got_type & GOT_TLS_IE)
10177 htab->root.srelgot->size += RELOC_SIZE (htab);
10178 }
10179 }
10180 }
10181 else
10182 {
10183 h->got.offset = (bfd_vma) - 1;
10184 }
10185
190eb1dd 10186 if (h->dyn_relocs == NULL)
a06ea964
NC
10187 return TRUE;
10188
10189 /* In the shared -Bsymbolic case, discard space allocated for
10190 dynamic pc-relative relocs against symbols which turn out to be
10191 defined in regular objects. For the normal shared case, discard
10192 space for pc-relative relocs that have become local due to symbol
10193 visibility changes. */
10194
0e1862bb 10195 if (bfd_link_pic (info))
a06ea964
NC
10196 {
10197 /* Relocs that use pc_count are those that appear on a call
07d6d2b8
AM
10198 insn, or certain REL relocs that can generated via assembly.
10199 We want calls to protected symbols to resolve directly to the
10200 function rather than going via the plt. If people want
10201 function pointer comparisons to work as expected then they
10202 should avoid writing weird assembly. */
a06ea964
NC
10203 if (SYMBOL_CALLS_LOCAL (info, h))
10204 {
10205 struct elf_dyn_relocs **pp;
10206
190eb1dd 10207 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
a06ea964
NC
10208 {
10209 p->count -= p->pc_count;
10210 p->pc_count = 0;
10211 if (p->count == 0)
10212 *pp = p->next;
10213 else
10214 pp = &p->next;
10215 }
10216 }
10217
10218 /* Also discard relocs on undefined weak syms with non-default
07d6d2b8 10219 visibility. */
190eb1dd 10220 if (h->dyn_relocs != NULL && h->root.type == bfd_link_hash_undefweak)
a06ea964 10221 {
ddb7fd0f
L
10222 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
10223 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
190eb1dd 10224 h->dyn_relocs = NULL;
a06ea964
NC
10225
10226 /* Make sure undefined weak symbols are output as a dynamic
10227 symbol in PIEs. */
10228 else if (h->dynindx == -1
10229 && !h->forced_local
ff07562f 10230 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC
10231 && !bfd_elf_link_record_dynamic_symbol (info, h))
10232 return FALSE;
10233 }
10234
10235 }
10236 else if (ELIMINATE_COPY_RELOCS)
10237 {
10238 /* For the non-shared case, discard space for relocs against
07d6d2b8
AM
10239 symbols which turn out to need copy relocs or are not
10240 dynamic. */
a06ea964
NC
10241
10242 if (!h->non_got_ref
10243 && ((h->def_dynamic
10244 && !h->def_regular)
10245 || (htab->root.dynamic_sections_created
10246 && (h->root.type == bfd_link_hash_undefweak
10247 || h->root.type == bfd_link_hash_undefined))))
10248 {
10249 /* Make sure this symbol is output as a dynamic symbol.
10250 Undefined weak syms won't yet be marked as dynamic. */
10251 if (h->dynindx == -1
10252 && !h->forced_local
ff07562f 10253 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC
10254 && !bfd_elf_link_record_dynamic_symbol (info, h))
10255 return FALSE;
10256
10257 /* If that succeeded, we know we'll be keeping all the
10258 relocs. */
10259 if (h->dynindx != -1)
10260 goto keep;
10261 }
10262
190eb1dd 10263 h->dyn_relocs = NULL;
a06ea964
NC
10264
10265 keep:;
10266 }
10267
10268 /* Finally, allocate space. */
190eb1dd 10269 for (p = h->dyn_relocs; p != NULL; p = p->next)
a06ea964
NC
10270 {
10271 asection *sreloc;
10272
10273 sreloc = elf_section_data (p->sec)->sreloc;
10274
10275 BFD_ASSERT (sreloc != NULL);
10276
10277 sreloc->size += p->count * RELOC_SIZE (htab);
10278 }
10279
10280 return TRUE;
10281}
10282
1419bbe5
WN
10283/* Allocate space in .plt, .got and associated reloc sections for
10284 ifunc dynamic relocs. */
10285
10286static bfd_boolean
10287elfNN_aarch64_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h,
10288 void *inf)
10289{
10290 struct bfd_link_info *info;
10291 struct elf_aarch64_link_hash_table *htab;
1419bbe5
WN
10292
10293 /* An example of a bfd_link_hash_indirect symbol is versioned
10294 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
10295 -> __gxx_personality_v0(bfd_link_hash_defined)
10296
10297 There is no need to process bfd_link_hash_indirect symbols here
10298 because we will also be presented with the concrete instance of
10299 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
10300 called to copy all relevant data from the generic to the concrete
2d0ca824 10301 symbol instance. */
1419bbe5
WN
10302 if (h->root.type == bfd_link_hash_indirect)
10303 return TRUE;
10304
10305 if (h->root.type == bfd_link_hash_warning)
10306 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10307
10308 info = (struct bfd_link_info *) inf;
10309 htab = elf_aarch64_hash_table (info);
10310
1419bbe5
WN
10311 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
10312 here if it is defined and referenced in a non-shared object. */
10313 if (h->type == STT_GNU_IFUNC
10314 && h->def_regular)
10315 return _bfd_elf_allocate_ifunc_dyn_relocs (info, h,
190eb1dd 10316 &h->dyn_relocs,
1419bbe5
WN
10317 htab->plt_entry_size,
10318 htab->plt_header_size,
a1bdea65 10319 GOT_ENTRY_SIZE (htab),
233cc9c1 10320 FALSE);
1419bbe5
WN
10321 return TRUE;
10322}
10323
1419bbe5
WN
10324/* Allocate space in .plt, .got and associated reloc sections for
10325 local ifunc dynamic relocs. */
10326
10327static bfd_boolean
10328elfNN_aarch64_allocate_local_ifunc_dynrelocs (void **slot, void *inf)
10329{
10330 struct elf_link_hash_entry *h
10331 = (struct elf_link_hash_entry *) *slot;
10332
10333 if (h->type != STT_GNU_IFUNC
10334 || !h->def_regular
10335 || !h->ref_regular
10336 || !h->forced_local
10337 || h->root.type != bfd_link_hash_defined)
10338 abort ();
10339
10340 return elfNN_aarch64_allocate_ifunc_dynrelocs (h, inf);
10341}
a06ea964 10342
a06ea964
NC
10343/* This is the most important function of all . Innocuosly named
10344 though ! */
2d0ca824 10345
a06ea964 10346static bfd_boolean
a1bdea65 10347elfNN_aarch64_size_dynamic_sections (bfd *output_bfd,
a06ea964
NC
10348 struct bfd_link_info *info)
10349{
cec5225b 10350 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC
10351 bfd *dynobj;
10352 asection *s;
10353 bfd_boolean relocs;
10354 bfd *ibfd;
10355
cec5225b 10356 htab = elf_aarch64_hash_table ((info));
a06ea964
NC
10357 dynobj = htab->root.dynobj;
10358
10359 BFD_ASSERT (dynobj != NULL);
10360
10361 if (htab->root.dynamic_sections_created)
10362 {
9b8b325a 10363 if (bfd_link_executable (info) && !info->nointerp)
a06ea964
NC
10364 {
10365 s = bfd_get_linker_section (dynobj, ".interp");
10366 if (s == NULL)
10367 abort ();
10368 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
10369 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
10370 }
10371 }
10372
a1bdea65
SP
10373 aarch64_elf_init_got_section (output_bfd, info);
10374
e19e9199
SP
10375 setup_plt_values (info, elf_aarch64_tdata (output_bfd)->plt_type);
10376
a06ea964
NC
10377 /* Set up .got offsets for local syms, and space for local dynamic
10378 relocs. */
c72f2fb2 10379 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
a06ea964
NC
10380 {
10381 struct elf_aarch64_local_symbol *locals = NULL;
10382 Elf_Internal_Shdr *symtab_hdr;
10383 asection *srel;
10384 unsigned int i;
10385
10386 if (!is_aarch64_elf (ibfd))
10387 continue;
10388
10389 for (s = ibfd->sections; s != NULL; s = s->next)
10390 {
10391 struct elf_dyn_relocs *p;
10392
10393 for (p = (struct elf_dyn_relocs *)
10394 (elf_section_data (s)->local_dynrel); p != NULL; p = p->next)
10395 {
10396 if (!bfd_is_abs_section (p->sec)
10397 && bfd_is_abs_section (p->sec->output_section))
10398 {
10399 /* Input section has been discarded, either because
10400 it is a copy of a linkonce section or due to
10401 linker script /DISCARD/, so we'll be discarding
10402 the relocs too. */
10403 }
10404 else if (p->count != 0)
10405 {
10406 srel = elf_section_data (p->sec)->sreloc;
10407 srel->size += p->count * RELOC_SIZE (htab);
10408 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
10409 info->flags |= DF_TEXTREL;
10410 }
10411 }
10412 }
10413
cec5225b 10414 locals = elf_aarch64_locals (ibfd);
a06ea964
NC
10415 if (!locals)
10416 continue;
10417
10418 symtab_hdr = &elf_symtab_hdr (ibfd);
10419 srel = htab->root.srelgot;
10420 for (i = 0; i < symtab_hdr->sh_info; i++)
10421 {
10422 locals[i].got_offset = (bfd_vma) - 1;
10423 locals[i].tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
10424 if (locals[i].got_refcount > 0)
10425 {
10426 unsigned got_type = locals[i].got_type;
10427 if (got_type & GOT_TLSDESC_GD)
10428 {
10429 locals[i].tlsdesc_got_jump_table_offset =
10430 (htab->root.sgotplt->size
10431 - aarch64_compute_jump_table_size (htab));
a1bdea65 10432 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10433 locals[i].got_offset = (bfd_vma) - 2;
10434 }
10435
10436 if (got_type & GOT_TLS_GD)
10437 {
10438 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 10439 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC
10440 }
10441
b53b1bed 10442 if (got_type & GOT_TLS_IE
a1bdea65
SP
10443 || got_type & GOT_NORMAL
10444 || got_type & GOT_CAP)
a06ea964
NC
10445 {
10446 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 10447 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10448 }
10449
10450 if (got_type == GOT_UNKNOWN)
10451 {
10452 }
10453
0e1862bb 10454 if (bfd_link_pic (info))
a06ea964
NC
10455 {
10456 if (got_type & GOT_TLSDESC_GD)
10457 {
10458 htab->root.srelplt->size += RELOC_SIZE (htab);
10459 /* Note RELOC_COUNT not incremented here! */
9bcc30e4 10460 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC
10461 }
10462
10463 if (got_type & GOT_TLS_GD)
10464 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
10465
b53b1bed 10466 if (got_type & GOT_TLS_IE
a1bdea65
SP
10467 || got_type & GOT_NORMAL
10468 || got_type & GOT_CAP)
a06ea964
NC
10469 htab->root.srelgot->size += RELOC_SIZE (htab);
10470 }
8d4edc5f
SP
10471 /* Static binary; put relocs into srelcaps. */
10472 else if (bfd_link_executable (info) && (got_type & GOT_CAP))
10473 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC
10474 }
10475 else
10476 {
10477 locals[i].got_refcount = (bfd_vma) - 1;
10478 }
10479 }
10480 }
10481
10482
10483 /* Allocate global sym .plt and .got entries, and space for global
10484 sym dynamic relocs. */
cec5225b 10485 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_dynrelocs,
a06ea964
NC
10486 info);
10487
1419bbe5
WN
10488 /* Allocate global ifunc sym .plt and .got entries, and space for global
10489 ifunc sym dynamic relocs. */
10490 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_ifunc_dynrelocs,
10491 info);
10492
1419bbe5
WN
10493 /* Allocate .plt and .got entries, and space for local ifunc symbols. */
10494 htab_traverse (htab->loc_hash_table,
10495 elfNN_aarch64_allocate_local_ifunc_dynrelocs,
10496 info);
a06ea964 10497
d6cf562a
MM
10498 if (bfd_link_executable (info)
10499 && !bfd_link_pic (info)
10500 && htab->srelcaps
10501 && htab->srelcaps->size > 0)
10502 {
10503 struct elf_link_hash_entry *h;
10504
10505 h = _bfd_elf_define_linkage_sym (output_bfd, info,
10506 htab->srelcaps,
10507 "__rela_dyn_start");
10508 h = _bfd_elf_define_linkage_sym (output_bfd, info,
10509 htab->srelcaps,
10510 "__rela_dyn_end");
10511
10512 h->root.u.def.value = htab->srelcaps->vma + htab->srelcaps->size;
10513 }
10514
a06ea964
NC
10515 /* For every jump slot reserved in the sgotplt, reloc_count is
10516 incremented. However, when we reserve space for TLS descriptors,
10517 it's not incremented, so in order to compute the space reserved
10518 for them, it suffices to multiply the reloc count by the jump
10519 slot size. */
10520
10521 if (htab->root.srelplt)
8847944f 10522 htab->sgotplt_jump_table_size = aarch64_compute_jump_table_size (htab);
a06ea964 10523
9bcc30e4 10524 if (htab->root.tlsdesc_plt)
a06ea964
NC
10525 {
10526 if (htab->root.splt->size == 0)
37c18eed 10527 htab->root.splt->size += htab->plt_header_size;
a06ea964 10528
a06ea964 10529 /* If we're not using lazy TLS relocations, don't generate the
ce12121b 10530 GOT and PLT entry required. */
9bcc30e4
L
10531 if ((info->flags & DF_BIND_NOW))
10532 htab->root.tlsdesc_plt = 0;
10533 else
a06ea964 10534 {
9bcc30e4 10535 htab->root.tlsdesc_plt = htab->root.splt->size;
ce12121b
TC
10536 htab->root.splt->size += htab->tlsdesc_plt_entry_size;
10537
9bcc30e4 10538 htab->root.tlsdesc_got = htab->root.sgot->size;
a1bdea65 10539 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC
10540 }
10541 }
10542
68fcca92 10543 /* Init mapping symbols information to use later to distingush between
4106101c
MS
10544 code and data while scanning for errata. */
10545 if (htab->fix_erratum_835769 || htab->fix_erratum_843419)
68fcca92
JW
10546 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
10547 {
10548 if (!is_aarch64_elf (ibfd))
10549 continue;
7ff36d1a 10550 bfd_elfNN_aarch64_init_maps (ibfd, info);
68fcca92
JW
10551 }
10552
a06ea964
NC
10553 /* We now have determined the sizes of the various dynamic sections.
10554 Allocate memory for them. */
10555 relocs = FALSE;
10556 for (s = dynobj->sections; s != NULL; s = s->next)
10557 {
10558 if ((s->flags & SEC_LINKER_CREATED) == 0)
10559 continue;
10560
10561 if (s == htab->root.splt
10562 || s == htab->root.sgot
10563 || s == htab->root.sgotplt
10564 || s == htab->root.iplt
9d19e4fd 10565 || s == htab->root.igotplt
5474d94f
AM
10566 || s == htab->root.sdynbss
10567 || s == htab->root.sdynrelro)
a06ea964
NC
10568 {
10569 /* Strip this section if we don't need it; see the
10570 comment below. */
10571 }
fd361982 10572 else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
a06ea964
NC
10573 {
10574 if (s->size != 0 && s != htab->root.srelplt)
10575 relocs = TRUE;
10576
10577 /* We use the reloc_count field as a counter if we need
10578 to copy relocs into the output file. */
10579 if (s != htab->root.srelplt)
10580 s->reloc_count = 0;
10581 }
10582 else
10583 {
10584 /* It's not one of our sections, so don't allocate space. */
10585 continue;
10586 }
10587
10588 if (s->size == 0)
10589 {
10590 /* If we don't need this section, strip it from the
10591 output file. This is mostly to handle .rela.bss and
10592 .rela.plt. We must create both sections in
10593 create_dynamic_sections, because they must be created
10594 before the linker maps input sections to output
10595 sections. The linker does that before
10596 adjust_dynamic_symbol is called, and it is that
10597 function which decides whether anything needs to go
10598 into these sections. */
a06ea964
NC
10599 s->flags |= SEC_EXCLUDE;
10600 continue;
10601 }
10602
10603 if ((s->flags & SEC_HAS_CONTENTS) == 0)
10604 continue;
10605
10606 /* Allocate memory for the section contents. We use bfd_zalloc
07d6d2b8
AM
10607 here in case unused entries are not reclaimed before the
10608 section's contents are written out. This should not happen,
10609 but this way if it does, we get a R_AARCH64_NONE reloc instead
10610 of garbage. */
a06ea964
NC
10611 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
10612 if (s->contents == NULL)
10613 return FALSE;
10614 }
10615
10616 if (htab->root.dynamic_sections_created)
10617 {
10618 /* Add some entries to the .dynamic section. We fill in the
07d6d2b8
AM
10619 values later, in elfNN_aarch64_finish_dynamic_sections, but we
10620 must add the entries now so that we get the correct size for
10621 the .dynamic section. The DT_DEBUG entry is filled in by the
10622 dynamic linker and used by the debugger. */
a06ea964
NC
10623#define add_dynamic_entry(TAG, VAL) \
10624 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
10625
3084d7a2
L
10626 if (!_bfd_elf_add_dynamic_tags (output_bfd, info, relocs))
10627 return FALSE;
a06ea964
NC
10628
10629 if (htab->root.splt->size != 0)
10630 {
823710d5
SN
10631 if (htab->variant_pcs
10632 && !add_dynamic_entry (DT_AARCH64_VARIANT_PCS, 0))
10633 return FALSE;
10634
1dbade74
SD
10635 if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI_PAC)
10636 && (!add_dynamic_entry (DT_AARCH64_BTI_PLT, 0)
10637 || !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0)))
10638 return FALSE;
10639
10640 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI)
10641 && !add_dynamic_entry (DT_AARCH64_BTI_PLT, 0))
10642 return FALSE;
10643
10644 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_PAC)
10645 && !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0))
37c18eed 10646 return FALSE;
a06ea964 10647 }
a06ea964
NC
10648 }
10649#undef add_dynamic_entry
10650
10651 return TRUE;
a06ea964
NC
10652}
10653
10654static inline void
caed7120
YZ
10655elf_aarch64_update_plt_entry (bfd *output_bfd,
10656 bfd_reloc_code_real_type r_type,
10657 bfd_byte *plt_entry, bfd_vma value)
a06ea964 10658{
caed7120
YZ
10659 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (r_type);
10660
1d75a8e2
NC
10661 /* FIXME: We should check the return value from this function call. */
10662 (void) _bfd_aarch64_elf_put_addend (output_bfd, plt_entry, r_type, howto, value);
a06ea964
NC
10663}
10664
e19e9199
SP
10665static void
10666aarch64_update_c64_plt_entry (bfd *output_bfd, bfd_byte *plt_entry,
10667 bfd_vma plt_base, bfd_vma plt_got_ent)
10668{
10669 /* Fill in the top 20 bits for this: ADRP c16, PLT_GOT + n * 16.
10670 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
10671 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_MORELLO_ADR_HI20_PCREL,
10672 plt_entry,
10673 PG (plt_got_ent) - PG (plt_base));
10674
10675 elf_aarch64_update_plt_entry (output_bfd,
10676 BFD_RELOC_AARCH64_LDST128_LO12,
10677 plt_entry + 4,
10678 PG_OFFSET (plt_got_ent));
10679
10680 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
10681 plt_entry + 8,
10682 PG_OFFSET (plt_got_ent));
10683}
10684
a06ea964 10685static void
cec5225b
YZ
10686elfNN_aarch64_create_small_pltn_entry (struct elf_link_hash_entry *h,
10687 struct elf_aarch64_link_hash_table
1419bbe5
WN
10688 *htab, bfd *output_bfd,
10689 struct bfd_link_info *info)
a06ea964
NC
10690{
10691 bfd_byte *plt_entry;
10692 bfd_vma plt_index;
10693 bfd_vma got_offset;
10694 bfd_vma gotplt_entry_address;
10695 bfd_vma plt_entry_address;
10696 Elf_Internal_Rela rela;
10697 bfd_byte *loc;
1419bbe5
WN
10698 asection *plt, *gotplt, *relplt;
10699
10700 /* When building a static executable, use .iplt, .igot.plt and
10701 .rela.iplt sections for STT_GNU_IFUNC symbols. */
10702 if (htab->root.splt != NULL)
10703 {
10704 plt = htab->root.splt;
10705 gotplt = htab->root.sgotplt;
10706 relplt = htab->root.srelplt;
10707 }
10708 else
10709 {
10710 plt = htab->root.iplt;
10711 gotplt = htab->root.igotplt;
10712 relplt = htab->root.irelplt;
10713 }
10714
10715 /* Get the index in the procedure linkage table which
10716 corresponds to this symbol. This is the index of this symbol
10717 in all the symbols for which we are making plt entries. The
10718 first entry in the procedure linkage table is reserved.
a06ea964 10719
1419bbe5
WN
10720 Get the offset into the .got table of the entry that
10721 corresponds to this function. Each .got entry is GOT_ENTRY_SIZE
10722 bytes. The first three are reserved for the dynamic linker.
692e2b8b 10723
1419bbe5
WN
10724 For static executables, we don't reserve anything. */
10725
10726 if (plt == htab->root.splt)
10727 {
10728 plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
a1bdea65 10729 got_offset = (plt_index + 3) * GOT_ENTRY_SIZE (htab);
1419bbe5
WN
10730 }
10731 else
10732 {
10733 plt_index = h->plt.offset / htab->plt_entry_size;
a1bdea65 10734 got_offset = plt_index * GOT_ENTRY_SIZE (htab);
1419bbe5
WN
10735 }
10736
10737 plt_entry = plt->contents + h->plt.offset;
10738 plt_entry_address = plt->output_section->vma
f44a1f8e 10739 + plt->output_offset + h->plt.offset;
1419bbe5
WN
10740 gotplt_entry_address = gotplt->output_section->vma +
10741 gotplt->output_offset + got_offset;
a06ea964
NC
10742
10743 /* Copy in the boiler-plate for the PLTn entry. */
37c18eed
SD
10744 memcpy (plt_entry, htab->plt_entry, htab->plt_entry_size);
10745
e19e9199
SP
10746 if (htab->c64_rel)
10747 aarch64_update_c64_plt_entry (output_bfd, plt_entry, plt_entry_address,
10748 gotplt_entry_address);
10749 else
10750 {
a06ea964 10751
e19e9199
SP
10752 /* First instruction in BTI enabled PLT stub is a BTI
10753 instruction so skip it. */
10754 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI
10755 && elf_elfheader (output_bfd)->e_type == ET_EXEC)
10756 plt_entry = plt_entry + 4;
a06ea964 10757
e19e9199
SP
10758 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
10759 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
10760 elf_aarch64_update_plt_entry (output_bfd,
10761 BFD_RELOC_AARCH64_ADR_HI21_PCREL,
10762 plt_entry,
10763 PG (gotplt_entry_address) -
10764 PG (plt_entry_address));
a06ea964 10765
e19e9199
SP
10766 /* Fill in the lo12 bits for the load from the pltgot. */
10767 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
10768 plt_entry + 4,
10769 PG_OFFSET (gotplt_entry_address));
a06ea964 10770
e19e9199
SP
10771 /* Fill in the lo12 bits for the add from the pltgot entry. */
10772 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
10773 plt_entry + 8,
10774 PG_OFFSET (gotplt_entry_address));
10775 }
10776
10777 /* All the GOTPLT Entries are essentially initialized to PLT0. Set LSB if
10778 the PLT is C64. */
10779 bfd_vma plt0 = ((plt->output_section->vma + plt->output_offset)
10780 | htab->c64_rel);
10781 bfd_put_NN (output_bfd, plt0, gotplt->contents + got_offset);
a06ea964 10782
a06ea964 10783 rela.r_offset = gotplt_entry_address;
1419bbe5
WN
10784
10785 if (h->dynindx == -1
0e1862bb 10786 || ((bfd_link_executable (info)
1419bbe5
WN
10787 || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
10788 && h->def_regular
10789 && h->type == STT_GNU_IFUNC))
10790 {
10791 /* If an STT_GNU_IFUNC symbol is locally defined, generate
10792 R_AARCH64_IRELATIVE instead of R_AARCH64_JUMP_SLOT. */
e19e9199
SP
10793 rela.r_info = (elf_aarch64_hash_entry (h)->got_type == GOT_CAP
10794 ? ELFNN_R_INFO (0, MORELLO_R (IRELATIVE))
10795 : ELFNN_R_INFO (0, AARCH64_R (IRELATIVE)));
1419bbe5
WN
10796 rela.r_addend = (h->root.u.def.value
10797 + h->root.u.def.section->output_section->vma
10798 + h->root.u.def.section->output_offset);
10799 }
10800 else
10801 {
10802 /* Fill in the entry in the .rela.plt section. */
e19e9199
SP
10803 rela.r_info = (elf_aarch64_hash_entry (h)->got_type == GOT_CAP
10804 ? ELFNN_R_INFO (h->dynindx, MORELLO_R (JUMP_SLOT))
10805 : ELFNN_R_INFO (h->dynindx, AARCH64_R (JUMP_SLOT)));
1419bbe5
WN
10806 rela.r_addend = 0;
10807 }
a06ea964
NC
10808
10809 /* Compute the relocation entry to used based on PLT index and do
10810 not adjust reloc_count. The reloc_count has already been adjusted
10811 to account for this entry. */
1419bbe5 10812 loc = relplt->contents + plt_index * RELOC_SIZE (htab);
cec5225b 10813 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC
10814}
10815
10816/* Size sections even though they're not dynamic. We use it to setup
10817 _TLS_MODULE_BASE_, if needed. */
10818
10819static bfd_boolean
cec5225b 10820elfNN_aarch64_always_size_sections (bfd *output_bfd,
a06ea964
NC
10821 struct bfd_link_info *info)
10822{
10823 asection *tls_sec;
10824
0e1862bb 10825 if (bfd_link_relocatable (info))
a06ea964
NC
10826 return TRUE;
10827
10828 tls_sec = elf_hash_table (info)->tls_sec;
10829
10830 if (tls_sec)
10831 {
10832 struct elf_link_hash_entry *tlsbase;
10833
10834 tlsbase = elf_link_hash_lookup (elf_hash_table (info),
10835 "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
10836
10837 if (tlsbase)
10838 {
10839 struct bfd_link_hash_entry *h = NULL;
10840 const struct elf_backend_data *bed =
10841 get_elf_backend_data (output_bfd);
10842
10843 if (!(_bfd_generic_link_add_one_symbol
10844 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
10845 tls_sec, 0, NULL, FALSE, bed->collect, &h)))
10846 return FALSE;
10847
10848 tlsbase->type = STT_TLS;
10849 tlsbase = (struct elf_link_hash_entry *) h;
10850 tlsbase->def_regular = 1;
10851 tlsbase->other = STV_HIDDEN;
10852 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
10853 }
10854 }
10855
10856 return TRUE;
10857}
10858
10859/* Finish up dynamic symbol handling. We set the contents of various
10860 dynamic sections here. */
2d0ca824 10861
a06ea964 10862static bfd_boolean
cec5225b 10863elfNN_aarch64_finish_dynamic_symbol (bfd *output_bfd,
a06ea964
NC
10864 struct bfd_link_info *info,
10865 struct elf_link_hash_entry *h,
10866 Elf_Internal_Sym *sym)
10867{
cec5225b
YZ
10868 struct elf_aarch64_link_hash_table *htab;
10869 htab = elf_aarch64_hash_table (info);
a06ea964
NC
10870
10871 if (h->plt.offset != (bfd_vma) - 1)
10872 {
1419bbe5
WN
10873 asection *plt, *gotplt, *relplt;
10874
a06ea964 10875 /* This symbol has an entry in the procedure linkage table. Set
07d6d2b8 10876 it up. */
a06ea964 10877
1419bbe5
WN
10878 /* When building a static executable, use .iplt, .igot.plt and
10879 .rela.iplt sections for STT_GNU_IFUNC symbols. */
10880 if (htab->root.splt != NULL)
10881 {
10882 plt = htab->root.splt;
10883 gotplt = htab->root.sgotplt;
10884 relplt = htab->root.srelplt;
10885 }
10886 else
10887 {
10888 plt = htab->root.iplt;
10889 gotplt = htab->root.igotplt;
10890 relplt = htab->root.irelplt;
10891 }
10892
10893 /* This symbol has an entry in the procedure linkage table. Set
10894 it up. */
10895 if ((h->dynindx == -1
0e1862bb 10896 && !((h->forced_local || bfd_link_executable (info))
1419bbe5
WN
10897 && h->def_regular
10898 && h->type == STT_GNU_IFUNC))
10899 || plt == NULL
10900 || gotplt == NULL
10901 || relplt == NULL)
f955cccf 10902 return FALSE;
a06ea964 10903
1419bbe5 10904 elfNN_aarch64_create_small_pltn_entry (h, htab, output_bfd, info);
a06ea964
NC
10905 if (!h->def_regular)
10906 {
10907 /* Mark the symbol as undefined, rather than as defined in
46b87d49 10908 the .plt section. */
a06ea964 10909 sym->st_shndx = SHN_UNDEF;
46b87d49
WN
10910 /* If the symbol is weak we need to clear the value.
10911 Otherwise, the PLT entry would provide a definition for
10912 the symbol even if the symbol wasn't defined anywhere,
10913 and so the symbol would never be NULL. Leave the value if
10914 there were any relocations where pointer equality matters
10915 (this is a clue for the dynamic linker, to make function
10916 pointer comparisons work between an application and shared
10917 library). */
10918 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
10919 sym->st_value = 0;
a06ea964
NC
10920 }
10921 }
10922
a1bdea65
SP
10923 bfd_boolean is_c64 = elf_aarch64_hash_entry (h)->got_type == GOT_CAP;
10924
a06ea964 10925 if (h->got.offset != (bfd_vma) - 1
a1bdea65
SP
10926 && (elf_aarch64_hash_entry (h)->got_type == GOT_NORMAL
10927 || elf_aarch64_hash_entry (h)->got_type == GOT_CAP)
a377ae2a
SN
10928 /* Undefined weak symbol in static PIE resolves to 0 without
10929 any dynamic relocations. */
10930 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC
10931 {
10932 Elf_Internal_Rela rela;
10933 bfd_byte *loc;
10934
10935 /* This symbol has an entry in the global offset table. Set it
07d6d2b8 10936 up. */
a06ea964
NC
10937 if (htab->root.sgot == NULL || htab->root.srelgot == NULL)
10938 abort ();
10939
10940 rela.r_offset = (htab->root.sgot->output_section->vma
10941 + htab->root.sgot->output_offset
10942 + (h->got.offset & ~(bfd_vma) 1));
10943
49206388
WN
10944 if (h->def_regular
10945 && h->type == STT_GNU_IFUNC)
10946 {
0e1862bb 10947 if (bfd_link_pic (info))
49206388
WN
10948 {
10949 /* Generate R_AARCH64_GLOB_DAT. */
10950 goto do_glob_dat;
10951 }
10952 else
10953 {
10954 asection *plt;
10955
10956 if (!h->pointer_equality_needed)
10957 abort ();
10958
10959 /* For non-shared object, we can't use .got.plt, which
10960 contains the real function address if we need pointer
10961 equality. We load the GOT entry with the PLT entry. */
10962 plt = htab->root.splt ? htab->root.splt : htab->root.iplt;
10963 bfd_put_NN (output_bfd, (plt->output_section->vma
10964 + plt->output_offset
10965 + h->plt.offset),
10966 htab->root.sgot->contents
10967 + (h->got.offset & ~(bfd_vma) 1));
10968 return TRUE;
10969 }
10970 }
0e1862bb 10971 else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h))
a06ea964 10972 {
0ee3a6db 10973 if (!(h->def_regular || ELF_COMMON_DEF_P (h)))
a06ea964
NC
10974 return FALSE;
10975
10976 BFD_ASSERT ((h->got.offset & 1) != 0);
a1bdea65
SP
10977 if (is_c64)
10978 {
10979 rela.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
10980 rela.r_addend = 0;
10981 }
10982 else
10983 {
10984 rela.r_info = ELFNN_R_INFO (0, AARCH64_R (RELATIVE));
10985 rela.r_addend = (h->root.u.def.value
10986 + h->root.u.def.section->output_section->vma
10987 + h->root.u.def.section->output_offset);
10988 }
a06ea964
NC
10989 }
10990 else
10991 {
dc1e8a47 10992 do_glob_dat:
a06ea964 10993 BFD_ASSERT ((h->got.offset & 1) == 0);
cec5225b 10994 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 10995 htab->root.sgot->contents + h->got.offset);
a1bdea65
SP
10996 rela.r_info = ELFNN_R_INFO (h->dynindx,
10997 (is_c64 ? MORELLO_R (GLOB_DAT)
10998 : AARCH64_R (GLOB_DAT)));
a06ea964
NC
10999 rela.r_addend = 0;
11000 }
11001
11002 loc = htab->root.srelgot->contents;
11003 loc += htab->root.srelgot->reloc_count++ * RELOC_SIZE (htab);
cec5225b 11004 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC
11005 }
11006
11007 if (h->needs_copy)
11008 {
11009 Elf_Internal_Rela rela;
5474d94f 11010 asection *s;
a06ea964
NC
11011 bfd_byte *loc;
11012
11013 /* This symbol needs a copy reloc. Set it up. */
a06ea964
NC
11014 if (h->dynindx == -1
11015 || (h->root.type != bfd_link_hash_defined
11016 && h->root.type != bfd_link_hash_defweak)
9d19e4fd 11017 || htab->root.srelbss == NULL)
a06ea964
NC
11018 abort ();
11019
11020 rela.r_offset = (h->root.u.def.value
11021 + h->root.u.def.section->output_section->vma
11022 + h->root.u.def.section->output_offset);
a6bb11b2 11023 rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (COPY));
a06ea964 11024 rela.r_addend = 0;
afbf7e8e 11025 if (h->root.u.def.section == htab->root.sdynrelro)
5474d94f
AM
11026 s = htab->root.sreldynrelro;
11027 else
11028 s = htab->root.srelbss;
11029 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
cec5225b 11030 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC
11031 }
11032
11033 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
11034 be NULL for local symbols. */
11035 if (sym != NULL
9637f6ef 11036 && (h == elf_hash_table (info)->hdynamic
a06ea964
NC
11037 || h == elf_hash_table (info)->hgot))
11038 sym->st_shndx = SHN_ABS;
11039
11040 return TRUE;
11041}
11042
1419bbe5
WN
11043/* Finish up local dynamic symbol handling. We set the contents of
11044 various dynamic sections here. */
11045
11046static bfd_boolean
11047elfNN_aarch64_finish_local_dynamic_symbol (void **slot, void *inf)
11048{
11049 struct elf_link_hash_entry *h
11050 = (struct elf_link_hash_entry *) *slot;
11051 struct bfd_link_info *info
11052 = (struct bfd_link_info *) inf;
11053
11054 return elfNN_aarch64_finish_dynamic_symbol (info->output_bfd,
11055 info, h, NULL);
11056}
11057
a06ea964 11058static void
cec5225b
YZ
11059elfNN_aarch64_init_small_plt0_entry (bfd *output_bfd ATTRIBUTE_UNUSED,
11060 struct elf_aarch64_link_hash_table
a06ea964
NC
11061 *htab)
11062{
11063 /* Fill in PLT0. Fixme:RR Note this doesn't distinguish between
11064 small and large plts and at the minute just generates
11065 the small PLT. */
11066
cec5225b 11067 /* PLT0 of the small PLT looks like this in ELF64 -
a06ea964
NC
11068 stp x16, x30, [sp, #-16]! // Save the reloc and lr on stack.
11069 adrp x16, PLT_GOT + 16 // Get the page base of the GOTPLT
11070 ldr x17, [x16, #:lo12:PLT_GOT+16] // Load the address of the
11071 // symbol resolver
11072 add x16, x16, #:lo12:PLT_GOT+16 // Load the lo12 bits of the
11073 // GOTPLT entry for this.
11074 br x17
cec5225b 11075 PLT0 will be slightly different in ELF32 due to different got entry
2d0ca824 11076 size. */
caed7120 11077 bfd_vma plt_got_2nd_ent; /* Address of GOT[2]. */
a06ea964
NC
11078 bfd_vma plt_base;
11079
11080
37c18eed
SD
11081 memcpy (htab->root.splt->contents, htab->plt0_entry,
11082 htab->plt_header_size);
4d3bb356
SN
11083
11084 /* PR 26312: Explicitly set the sh_entsize to 0 so that
11085 consumers do not think that the section contains fixed
11086 sized objects. */
11087 elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize = 0;
a06ea964 11088
caed7120
YZ
11089 plt_got_2nd_ent = (htab->root.sgotplt->output_section->vma
11090 + htab->root.sgotplt->output_offset
a1bdea65 11091 + GOT_ENTRY_SIZE (htab) * 2);
a06ea964
NC
11092
11093 plt_base = htab->root.splt->output_section->vma +
f44a1f8e 11094 htab->root.splt->output_offset;
a06ea964 11095
e19e9199
SP
11096 bfd_byte *plt0_entry = htab->root.splt->contents;
11097
11098 if (htab->c64_rel)
11099 {
11100 aarch64_update_c64_plt_entry (output_bfd, plt0_entry + 4,
11101 plt_base + 4, plt_got_2nd_ent);
11102 return;
11103 }
11104
37c18eed
SD
11105 /* First instruction in BTI enabled PLT stub is a BTI
11106 instruction so skip it. */
37c18eed
SD
11107 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI)
11108 plt0_entry = plt0_entry + 4;
11109
a06ea964
NC
11110 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
11111 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
caed7120 11112 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADR_HI21_PCREL,
37c18eed 11113 plt0_entry + 4,
caed7120 11114 PG (plt_got_2nd_ent) - PG (plt_base + 4));
a06ea964 11115
caed7120 11116 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
37c18eed 11117 plt0_entry + 8,
caed7120 11118 PG_OFFSET (plt_got_2nd_ent));
a06ea964 11119
caed7120 11120 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
37c18eed 11121 plt0_entry + 12,
caed7120 11122 PG_OFFSET (plt_got_2nd_ent));
a06ea964
NC
11123}
11124
11125static bfd_boolean
cec5225b 11126elfNN_aarch64_finish_dynamic_sections (bfd *output_bfd,
a06ea964
NC
11127 struct bfd_link_info *info)
11128{
cec5225b 11129 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC
11130 bfd *dynobj;
11131 asection *sdyn;
11132
cec5225b 11133 htab = elf_aarch64_hash_table (info);
a06ea964
NC
11134 dynobj = htab->root.dynobj;
11135 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
11136
11137 if (htab->root.dynamic_sections_created)
11138 {
cec5225b 11139 ElfNN_External_Dyn *dyncon, *dynconend;
a06ea964
NC
11140
11141 if (sdyn == NULL || htab->root.sgot == NULL)
11142 abort ();
11143
cec5225b
YZ
11144 dyncon = (ElfNN_External_Dyn *) sdyn->contents;
11145 dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size);
a06ea964
NC
11146 for (; dyncon < dynconend; dyncon++)
11147 {
11148 Elf_Internal_Dyn dyn;
11149 asection *s;
11150
cec5225b 11151 bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn);
a06ea964
NC
11152
11153 switch (dyn.d_tag)
11154 {
11155 default:
11156 continue;
11157
11158 case DT_PLTGOT:
11159 s = htab->root.sgotplt;
11160 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
11161 break;
11162
11163 case DT_JMPREL:
4ade44b7
AM
11164 s = htab->root.srelplt;
11165 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
a06ea964
NC
11166 break;
11167
11168 case DT_PLTRELSZ:
c955de36 11169 s = htab->root.srelplt;
a06ea964
NC
11170 dyn.d_un.d_val = s->size;
11171 break;
11172
a06ea964
NC
11173 case DT_TLSDESC_PLT:
11174 s = htab->root.splt;
11175 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 11176 + htab->root.tlsdesc_plt;
a06ea964
NC
11177 break;
11178
11179 case DT_TLSDESC_GOT:
11180 s = htab->root.sgot;
9bcc30e4 11181 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
a06ea964 11182 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 11183 + htab->root.tlsdesc_got;
a06ea964
NC
11184 break;
11185 }
11186
cec5225b 11187 bfd_elfNN_swap_dyn_out (output_bfd, &dyn, dyncon);
a06ea964
NC
11188 }
11189
11190 }
11191
11192 /* Fill in the special first entry in the procedure linkage table. */
11193 if (htab->root.splt && htab->root.splt->size > 0)
11194 {
cec5225b 11195 elfNN_aarch64_init_small_plt0_entry (output_bfd, htab);
a06ea964 11196
9bcc30e4 11197 if (htab->root.tlsdesc_plt && !(info->flags & DF_BIND_NOW))
a06ea964 11198 {
9bcc30e4 11199 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
cec5225b 11200 bfd_put_NN (output_bfd, (bfd_vma) 0,
9bcc30e4 11201 htab->root.sgot->contents + htab->root.tlsdesc_got);
a06ea964 11202
37c18eed
SD
11203 const bfd_byte *entry = elfNN_aarch64_tlsdesc_small_plt_entry;
11204 htab->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
11205
4ca9b406
SP
11206 unsigned adrp_rtype = BFD_RELOC_AARCH64_ADR_HI21_PCREL;
11207 unsigned ldr_rtype = BFD_RELOC_AARCH64_LDSTNN_LO12;
11208
37c18eed 11209 aarch64_plt_type type = elf_aarch64_tdata (output_bfd)->plt_type;
4ca9b406
SP
11210 if (htab->c64_rel)
11211 {
11212 entry = elfNN_aarch64_tlsdesc_small_plt_c64_entry;
11213 adrp_rtype = BFD_RELOC_MORELLO_ADR_HI20_PCREL;
11214 ldr_rtype = BFD_RELOC_AARCH64_LDST128_LO12;
11215 }
11216 else if (type == PLT_BTI || type == PLT_BTI_PAC)
37c18eed
SD
11217 {
11218 entry = elfNN_aarch64_tlsdesc_small_plt_bti_entry;
37c18eed
SD
11219 }
11220
9bcc30e4 11221 memcpy (htab->root.splt->contents + htab->root.tlsdesc_plt,
37c18eed 11222 entry, htab->tlsdesc_plt_entry_size);
a06ea964
NC
11223
11224 {
11225 bfd_vma adrp1_addr =
11226 htab->root.splt->output_section->vma
9bcc30e4
L
11227 + htab->root.splt->output_offset
11228 + htab->root.tlsdesc_plt + 4;
a06ea964 11229
caed7120 11230 bfd_vma adrp2_addr = adrp1_addr + 4;
a06ea964
NC
11231
11232 bfd_vma got_addr =
11233 htab->root.sgot->output_section->vma
11234 + htab->root.sgot->output_offset;
11235
11236 bfd_vma pltgot_addr =
11237 htab->root.sgotplt->output_section->vma
11238 + htab->root.sgotplt->output_offset;
11239
9bcc30e4 11240 bfd_vma dt_tlsdesc_got = got_addr + htab->root.tlsdesc_got;
caed7120
YZ
11241
11242 bfd_byte *plt_entry =
9bcc30e4 11243 htab->root.splt->contents + htab->root.tlsdesc_plt;
a06ea964 11244
37c18eed
SD
11245 /* First instruction in BTI enabled PLT stub is a BTI
11246 instruction so skip it. */
11247 if (type & PLT_BTI)
11248 {
11249 plt_entry = plt_entry + 4;
11250 adrp1_addr = adrp1_addr + 4;
11251 adrp2_addr = adrp2_addr + 4;
11252 }
11253
a06ea964 11254 /* adrp x2, DT_TLSDESC_GOT */
caed7120 11255 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11256 adrp_rtype,
caed7120
YZ
11257 plt_entry + 4,
11258 (PG (dt_tlsdesc_got)
11259 - PG (adrp1_addr)));
a06ea964
NC
11260
11261 /* adrp x3, 0 */
caed7120 11262 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11263 adrp_rtype,
caed7120
YZ
11264 plt_entry + 8,
11265 (PG (pltgot_addr)
11266 - PG (adrp2_addr)));
a06ea964
NC
11267
11268 /* ldr x2, [x2, #0] */
caed7120 11269 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11270 ldr_rtype,
caed7120
YZ
11271 plt_entry + 12,
11272 PG_OFFSET (dt_tlsdesc_got));
a06ea964
NC
11273
11274 /* add x3, x3, 0 */
caed7120
YZ
11275 elf_aarch64_update_plt_entry (output_bfd,
11276 BFD_RELOC_AARCH64_ADD_LO12,
11277 plt_entry + 16,
11278 PG_OFFSET (pltgot_addr));
a06ea964
NC
11279 }
11280 }
11281 }
11282
11283 if (htab->root.sgotplt)
11284 {
11285 if (bfd_is_abs_section (htab->root.sgotplt->output_section))
11286 {
4eca0228 11287 _bfd_error_handler
871b3ab2 11288 (_("discarded output section: `%pA'"), htab->root.sgotplt);
a06ea964
NC
11289 return FALSE;
11290 }
11291
11292 /* Fill in the first three entries in the global offset table. */
11293 if (htab->root.sgotplt->size > 0)
11294 {
8db339a6
MS
11295 bfd_put_NN (output_bfd, (bfd_vma) 0, htab->root.sgotplt->contents);
11296
a06ea964 11297 /* Write GOT[1] and GOT[2], needed for the dynamic linker. */
cec5225b 11298 bfd_put_NN (output_bfd,
a06ea964 11299 (bfd_vma) 0,
a1bdea65 11300 htab->root.sgotplt->contents + GOT_ENTRY_SIZE (htab));
cec5225b 11301 bfd_put_NN (output_bfd,
a06ea964 11302 (bfd_vma) 0,
a1bdea65
SP
11303 (htab->root.sgotplt->contents
11304 + GOT_ENTRY_SIZE (htab) * 2));
a06ea964
NC
11305 }
11306
8db339a6
MS
11307 if (htab->root.sgot)
11308 {
11309 if (htab->root.sgot->size > 0)
11310 {
11311 bfd_vma addr =
11312 sdyn ? sdyn->output_section->vma + sdyn->output_offset : 0;
11313 bfd_put_NN (output_bfd, addr, htab->root.sgot->contents);
11314 }
11315 }
11316
a06ea964 11317 elf_section_data (htab->root.sgotplt->output_section)->
a1bdea65 11318 this_hdr.sh_entsize = GOT_ENTRY_SIZE (htab);
a06ea964
NC
11319 }
11320
11321 if (htab->root.sgot && htab->root.sgot->size > 0)
11322 elf_section_data (htab->root.sgot->output_section)->this_hdr.sh_entsize
a1bdea65 11323 = GOT_ENTRY_SIZE (htab);
a06ea964 11324
1419bbe5
WN
11325 /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
11326 htab_traverse (htab->loc_hash_table,
11327 elfNN_aarch64_finish_local_dynamic_symbol,
11328 info);
11329
a06ea964
NC
11330 return TRUE;
11331}
11332
37c18eed
SD
11333/* Check if BTI enabled PLTs are needed. Returns the type needed. */
11334static aarch64_plt_type
11335get_plt_type (bfd *abfd)
11336{
11337 aarch64_plt_type ret = PLT_NORMAL;
11338 bfd_byte *contents, *extdyn, *extdynend;
11339 asection *sec = bfd_get_section_by_name (abfd, ".dynamic");
11340 if (!sec || !bfd_malloc_and_get_section (abfd, sec, &contents))
11341 return ret;
11342 extdyn = contents;
11343 extdynend = contents + sec->size;
11344 for (; extdyn < extdynend; extdyn += sizeof (ElfNN_External_Dyn))
11345 {
11346 Elf_Internal_Dyn dyn;
11347 bfd_elfNN_swap_dyn_in (abfd, extdyn, &dyn);
11348
11349 /* Let's check the processor specific dynamic array tags. */
11350 bfd_vma tag = dyn.d_tag;
11351 if (tag < DT_LOPROC || tag > DT_HIPROC)
11352 continue;
11353
11354 switch (tag)
11355 {
11356 case DT_AARCH64_BTI_PLT:
1dbade74
SD
11357 ret |= PLT_BTI;
11358 break;
11359
11360 case DT_AARCH64_PAC_PLT:
11361 ret |= PLT_PAC;
37c18eed
SD
11362 break;
11363
11364 default: break;
11365 }
11366 }
11367 free (contents);
11368 return ret;
11369}
11370
11371static long
11372elfNN_aarch64_get_synthetic_symtab (bfd *abfd,
11373 long symcount,
11374 asymbol **syms,
11375 long dynsymcount,
11376 asymbol **dynsyms,
11377 asymbol **ret)
11378{
11379 elf_aarch64_tdata (abfd)->plt_type = get_plt_type (abfd);
11380 return _bfd_elf_get_synthetic_symtab (abfd, symcount, syms,
11381 dynsymcount, dynsyms, ret);
11382}
11383
a06ea964
NC
11384/* Return address for Ith PLT stub in section PLT, for relocation REL
11385 or (bfd_vma) -1 if it should not be included. */
11386
11387static bfd_vma
cec5225b 11388elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
a06ea964
NC
11389 const arelent *rel ATTRIBUTE_UNUSED)
11390{
37c18eed
SD
11391 size_t plt0_size = PLT_ENTRY_SIZE;
11392 size_t pltn_size = PLT_SMALL_ENTRY_SIZE;
11393
1dbade74
SD
11394 if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI_PAC)
11395 {
1dbade74
SD
11396 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
11397 pltn_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
11398 else
11399 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
11400 }
11401 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI)
37c18eed 11402 {
37c18eed
SD
11403 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
11404 pltn_size = PLT_BTI_SMALL_ENTRY_SIZE;
11405 }
1dbade74
SD
11406 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_PAC)
11407 {
1dbade74
SD
11408 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
11409 }
11410
37c18eed 11411 return plt->vma + plt0_size + i * pltn_size;
a06ea964
NC
11412}
11413
d691934d
NC
11414/* Returns TRUE if NAME is an AArch64 mapping symbol.
11415 The ARM ELF standard defines $x (for A64 code) and $d (for data).
11416 It also allows a period initiated suffix to be added to the symbol, ie:
11417 "$[adtx]\.[:sym_char]+". */
11418
11419static bfd_boolean
11420is_aarch64_mapping_symbol (const char * name)
11421{
11422 return name != NULL /* Paranoia. */
11423 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
11424 the mapping symbols could have acquired a prefix.
11425 We do not support this here, since such symbols no
11426 longer conform to the ARM ELF ABI. */
3979cf50 11427 && (name[1] == 'd' || name[1] == 'x' || name[1] == 'c')
d691934d
NC
11428 && (name[2] == 0 || name[2] == '.');
11429 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
11430 any characters that follow the period are legal characters for the body
11431 of a symbol's name. For now we just assume that this is the case. */
11432}
11433
11434/* Make sure that mapping symbols in object files are not removed via the
11435 "strip --strip-unneeded" tool. These symbols might needed in order to
11436 correctly generate linked files. Once an object file has been linked,
11437 it should be safe to remove them. */
11438
11439static void
11440elfNN_aarch64_backend_symbol_processing (bfd *abfd, asymbol *sym)
11441{
11442 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
11443 && sym->section != bfd_abs_section_ptr
11444 && is_aarch64_mapping_symbol (sym->name))
11445 sym->flags |= BSF_KEEP;
11446}
11447
cd702818
SD
11448/* Implement elf_backend_setup_gnu_properties for AArch64. It serves as a
11449 wrapper function for _bfd_aarch64_elf_link_setup_gnu_properties to account
11450 for the effect of GNU properties of the output_bfd. */
11451static bfd *
11452elfNN_aarch64_link_setup_gnu_properties (struct bfd_link_info *info)
11453{
11454 uint32_t prop = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
11455 bfd *pbfd = _bfd_aarch64_elf_link_setup_gnu_properties (info, &prop);
11456 elf_aarch64_tdata (info->output_bfd)->gnu_and_prop = prop;
37c18eed
SD
11457 elf_aarch64_tdata (info->output_bfd)->plt_type
11458 |= (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) ? PLT_BTI : 0;
cd702818
SD
11459 return pbfd;
11460}
11461
11462/* Implement elf_backend_merge_gnu_properties for AArch64. It serves as a
11463 wrapper function for _bfd_aarch64_elf_merge_gnu_properties to account
11464 for the effect of GNU properties of the output_bfd. */
11465static bfd_boolean
11466elfNN_aarch64_merge_gnu_properties (struct bfd_link_info *info,
4e539114 11467 bfd *abfd, bfd *bbfd,
cd702818
SD
11468 elf_property *aprop,
11469 elf_property *bprop)
11470{
11471 uint32_t prop
11472 = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
37c18eed
SD
11473
11474 /* If output has been marked with BTI using command line argument, give out
11475 warning if necessary. */
4e539114
SD
11476 /* Properties are merged per type, hence only check for warnings when merging
11477 GNU_PROPERTY_AARCH64_FEATURE_1_AND. */
11478 if (((aprop && aprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND)
11479 || (bprop && bprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND))
11480 && (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
37c18eed
SD
11481 && (!elf_aarch64_tdata (info->output_bfd)->no_bti_warn))
11482 {
11483 if ((aprop && !(aprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
4e539114 11484 || !aprop)
37c18eed 11485 {
8bf6d176 11486 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD
11487 "all inputs do not have BTI in NOTE section."),
11488 abfd);
11489 }
11490 if ((bprop && !(bprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
11491 || !bprop)
11492 {
8bf6d176 11493 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD
11494 "all inputs do not have BTI in NOTE section."),
11495 bbfd);
37c18eed
SD
11496 }
11497 }
11498
cd702818
SD
11499 return _bfd_aarch64_elf_merge_gnu_properties (info, abfd, aprop,
11500 bprop, prop);
11501}
a06ea964 11502
8b21361b
SP
11503/* Demangle c64 function symbols as we read them in. */
11504
11505static bfd_boolean
11506aarch64_elfNN_swap_symbol_in (bfd * abfd,
11507 const void *psrc,
11508 const void *pshn,
11509 Elf_Internal_Sym *dst)
11510{
11511 if (!bfd_elfNN_swap_symbol_in (abfd, psrc, pshn, dst))
11512 return FALSE;
11513
11514 dst->st_target_internal = 0;
11515
11516 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
11517 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
11518 {
11519 dst->st_target_internal = dst->st_value & ST_BRANCH_TO_C64;
11520 dst->st_value &= ~(bfd_vma) ST_BRANCH_TO_C64;
11521 }
11522
11523 return TRUE;
11524}
11525
11526
11527/* Mangle c64 function symbols as we write them out. */
11528
11529static void
11530aarch64_elfNN_swap_symbol_out (bfd *abfd,
11531 const Elf_Internal_Sym *src,
11532 void *cdst,
11533 void *shndx)
11534{
11535 Elf_Internal_Sym newsym = *src;
11536
11537 if ((ELF_ST_TYPE (newsym.st_info) == STT_FUNC
11538 || ELF_ST_TYPE (newsym.st_info) == STT_GNU_IFUNC)
11539 && newsym.st_shndx != SHN_UNDEF)
11540 newsym.st_value |= newsym.st_target_internal;
11541
11542 bfd_elfNN_swap_symbol_out (abfd, &newsym, cdst, shndx);
11543}
11544
a1bdea65
SP
11545/* Define the size of a GOT element for the generic mid-end. */
11546
11547static bfd_vma
11548elfNN_aarch64_got_elt_size (bfd *abfd ATTRIBUTE_UNUSED,
11549 struct bfd_link_info *info,
11550 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED,
11551 bfd *ibfd ATTRIBUTE_UNUSED,
11552 unsigned long symndx ATTRIBUTE_UNUSED)
11553{
11554 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11555
11556 return GOT_ENTRY_SIZE (htab);
11557}
11558
f938669f
SP
11559/* Define the size of a GOT header, which is the minimum size of the GOT section
11560 when one is needed. */
11561
11562static bfd_vma
a1bdea65 11563elfNN_aarch64_got_header_size (struct bfd_link_info *info)
f938669f 11564{
a1bdea65
SP
11565 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11566
11567 return GOT_ENTRY_SIZE (htab) * GOT_RESERVED_HEADER_SLOTS;
f938669f
SP
11568}
11569
fa6ca5e2
SP
11570/* Identify the 'C' in the CIE augmentation string. */
11571
11572static bfd_boolean
11573elf64_aarch64_eh_frame_augmentation_char (const char aug)
11574{
11575 return aug == 'C';
11576}
11577
a06ea964
NC
11578/* We use this so we can override certain functions
11579 (though currently we don't). */
11580
cec5225b 11581const struct elf_size_info elfNN_aarch64_size_info =
a06ea964 11582{
cec5225b
YZ
11583 sizeof (ElfNN_External_Ehdr),
11584 sizeof (ElfNN_External_Phdr),
11585 sizeof (ElfNN_External_Shdr),
11586 sizeof (ElfNN_External_Rel),
11587 sizeof (ElfNN_External_Rela),
11588 sizeof (ElfNN_External_Sym),
11589 sizeof (ElfNN_External_Dyn),
a06ea964
NC
11590 sizeof (Elf_External_Note),
11591 4, /* Hash table entry size. */
11592 1, /* Internal relocs per external relocs. */
cec5225b
YZ
11593 ARCH_SIZE, /* Arch size. */
11594 LOG_FILE_ALIGN, /* Log_file_align. */
11595 ELFCLASSNN, EV_CURRENT,
11596 bfd_elfNN_write_out_phdrs,
11597 bfd_elfNN_write_shdrs_and_ehdr,
11598 bfd_elfNN_checksum_contents,
11599 bfd_elfNN_write_relocs,
8b21361b
SP
11600 aarch64_elfNN_swap_symbol_in,
11601 aarch64_elfNN_swap_symbol_out,
cec5225b
YZ
11602 bfd_elfNN_slurp_reloc_table,
11603 bfd_elfNN_slurp_symbol_table,
11604 bfd_elfNN_swap_dyn_in,
11605 bfd_elfNN_swap_dyn_out,
11606 bfd_elfNN_swap_reloc_in,
11607 bfd_elfNN_swap_reloc_out,
11608 bfd_elfNN_swap_reloca_in,
11609 bfd_elfNN_swap_reloca_out
a06ea964
NC
11610};
11611
11612#define ELF_ARCH bfd_arch_aarch64
11613#define ELF_MACHINE_CODE EM_AARCH64
11614#define ELF_MAXPAGESIZE 0x10000
11615#define ELF_MINPAGESIZE 0x1000
11616#define ELF_COMMONPAGESIZE 0x1000
11617
cec5225b
YZ
11618#define bfd_elfNN_bfd_is_target_special_symbol \
11619 elfNN_aarch64_is_target_special_symbol
a06ea964 11620
07d6d2b8 11621#define bfd_elfNN_bfd_link_hash_table_create \
cec5225b 11622 elfNN_aarch64_link_hash_table_create
a06ea964 11623
cec5225b
YZ
11624#define bfd_elfNN_bfd_merge_private_bfd_data \
11625 elfNN_aarch64_merge_private_bfd_data
a06ea964 11626
cec5225b
YZ
11627#define bfd_elfNN_bfd_print_private_bfd_data \
11628 elfNN_aarch64_print_private_bfd_data
a06ea964 11629
cec5225b
YZ
11630#define bfd_elfNN_bfd_reloc_type_lookup \
11631 elfNN_aarch64_reloc_type_lookup
a06ea964 11632
cec5225b
YZ
11633#define bfd_elfNN_bfd_reloc_name_lookup \
11634 elfNN_aarch64_reloc_name_lookup
a06ea964 11635
cec5225b
YZ
11636#define bfd_elfNN_bfd_set_private_flags \
11637 elfNN_aarch64_set_private_flags
a06ea964 11638
cec5225b
YZ
11639#define bfd_elfNN_find_inliner_info \
11640 elfNN_aarch64_find_inliner_info
a06ea964 11641
37c18eed
SD
11642#define bfd_elfNN_get_synthetic_symtab \
11643 elfNN_aarch64_get_synthetic_symtab
11644
cec5225b
YZ
11645#define bfd_elfNN_mkobject \
11646 elfNN_aarch64_mkobject
a06ea964 11647
cec5225b
YZ
11648#define bfd_elfNN_new_section_hook \
11649 elfNN_aarch64_new_section_hook
a06ea964
NC
11650
11651#define elf_backend_adjust_dynamic_symbol \
cec5225b 11652 elfNN_aarch64_adjust_dynamic_symbol
a06ea964
NC
11653
11654#define elf_backend_always_size_sections \
cec5225b 11655 elfNN_aarch64_always_size_sections
a06ea964
NC
11656
11657#define elf_backend_check_relocs \
cec5225b 11658 elfNN_aarch64_check_relocs
a06ea964
NC
11659
11660#define elf_backend_copy_indirect_symbol \
cec5225b 11661 elfNN_aarch64_copy_indirect_symbol
a06ea964 11662
823710d5
SN
11663#define elf_backend_merge_symbol_attribute \
11664 elfNN_aarch64_merge_symbol_attribute
11665
a06ea964
NC
11666/* Create .dynbss, and .rela.bss sections in DYNOBJ, and set up shortcuts
11667 to them in our hash. */
11668#define elf_backend_create_dynamic_sections \
cec5225b 11669 elfNN_aarch64_create_dynamic_sections
a06ea964
NC
11670
11671#define elf_backend_init_index_section \
11672 _bfd_elf_init_2_index_sections
11673
a06ea964 11674#define elf_backend_finish_dynamic_sections \
cec5225b 11675 elfNN_aarch64_finish_dynamic_sections
a06ea964
NC
11676
11677#define elf_backend_finish_dynamic_symbol \
cec5225b 11678 elfNN_aarch64_finish_dynamic_symbol
a06ea964 11679
a06ea964 11680#define elf_backend_object_p \
cec5225b 11681 elfNN_aarch64_object_p
a06ea964 11682
07d6d2b8 11683#define elf_backend_output_arch_local_syms \
cec5225b 11684 elfNN_aarch64_output_arch_local_syms
a06ea964 11685
e7679060
AM
11686#define elf_backend_maybe_function_sym \
11687 elfNN_aarch64_maybe_function_sym
11688
a06ea964 11689#define elf_backend_plt_sym_val \
cec5225b 11690 elfNN_aarch64_plt_sym_val
a06ea964 11691
ed7e9d0b
AM
11692#define elf_backend_init_file_header \
11693 elfNN_aarch64_init_file_header
a06ea964
NC
11694
11695#define elf_backend_relocate_section \
cec5225b 11696 elfNN_aarch64_relocate_section
a06ea964
NC
11697
11698#define elf_backend_reloc_type_class \
cec5225b 11699 elfNN_aarch64_reloc_type_class
a06ea964 11700
a06ea964 11701#define elf_backend_section_from_shdr \
cec5225b 11702 elfNN_aarch64_section_from_shdr
a06ea964
NC
11703
11704#define elf_backend_size_dynamic_sections \
cec5225b 11705 elfNN_aarch64_size_dynamic_sections
a06ea964
NC
11706
11707#define elf_backend_size_info \
cec5225b 11708 elfNN_aarch64_size_info
a06ea964 11709
68fcca92
JW
11710#define elf_backend_write_section \
11711 elfNN_aarch64_write_section
11712
d691934d
NC
11713#define elf_backend_symbol_processing \
11714 elfNN_aarch64_backend_symbol_processing
11715
cd702818
SD
11716#define elf_backend_setup_gnu_properties \
11717 elfNN_aarch64_link_setup_gnu_properties
11718
11719#define elf_backend_merge_gnu_properties \
11720 elfNN_aarch64_merge_gnu_properties
11721
f938669f
SP
11722#define elf_backend_got_header_size \
11723 elfNN_aarch64_got_header_size
11724
a1bdea65
SP
11725#define elf_backend_got_elt_size \
11726 elfNN_aarch64_got_elt_size
11727
fa6ca5e2
SP
11728#define elf_backend_eh_frame_augmentation_char \
11729 elf64_aarch64_eh_frame_augmentation_char
11730
a06ea964 11731#define elf_backend_can_refcount 1
59c108f7 11732#define elf_backend_can_gc_sections 1
a06ea964
NC
11733#define elf_backend_plt_readonly 1
11734#define elf_backend_want_got_plt 1
11735#define elf_backend_want_plt_sym 0
5474d94f 11736#define elf_backend_want_dynrelro 1
a06ea964
NC
11737#define elf_backend_may_use_rel_p 0
11738#define elf_backend_may_use_rela_p 1
11739#define elf_backend_default_use_rela_p 1
07d6d2b8 11740#define elf_backend_rela_normal 1
64f52338 11741#define elf_backend_dtrel_excludes_plt 1
c495064d 11742#define elf_backend_default_execstack 0
32f573bc 11743#define elf_backend_extern_protected_data 1
7f784814 11744#define elf_backend_hash_symbol elf_aarch64_hash_symbol
a06ea964 11745
07d6d2b8 11746#undef elf_backend_obj_attrs_section
a06ea964
NC
11747#define elf_backend_obj_attrs_section ".ARM.attributes"
11748
cec5225b 11749#include "elfNN-target.h"
a75cf613
ES
11750
11751/* CloudABI support. */
11752
11753#undef TARGET_LITTLE_SYM
11754#define TARGET_LITTLE_SYM aarch64_elfNN_le_cloudabi_vec
11755#undef TARGET_LITTLE_NAME
11756#define TARGET_LITTLE_NAME "elfNN-littleaarch64-cloudabi"
11757#undef TARGET_BIG_SYM
11758#define TARGET_BIG_SYM aarch64_elfNN_be_cloudabi_vec
11759#undef TARGET_BIG_NAME
11760#define TARGET_BIG_NAME "elfNN-bigaarch64-cloudabi"
11761
11762#undef ELF_OSABI
11763#define ELF_OSABI ELFOSABI_CLOUDABI
11764
11765#undef elfNN_bed
11766#define elfNN_bed elfNN_aarch64_cloudabi_bed
11767
11768#include "elfNN-target.h"