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elfNN_c64_resize_section always sets alignment
[thirdparty/binutils-gdb.git] / bfd / elfnn-aarch64.c
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cec5225b 1/* AArch64-specific support for NN-bit ELF.
b3adc24a 2 Copyright (C) 2009-2020 Free Software Foundation, Inc.
a06ea964
NC		 3 Contributed by ARM Ltd.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21/* Notes on implementation:
22
23 Thread Local Store (TLS)
24
25 Overview:
26
27 The implementation currently supports both traditional TLS and TLS
28 descriptors, but only general dynamic (GD).
29
30 For traditional TLS the assembler will present us with code
31 fragments of the form:
32
33 adrp x0, :tlsgd:foo
07d6d2b8 34 R_AARCH64_TLSGD_ADR_PAGE21(foo)
a06ea964 35 add x0, :tlsgd_lo12:foo
07d6d2b8 36 R_AARCH64_TLSGD_ADD_LO12_NC(foo)
a06ea964
NC		 37 bl __tls_get_addr
38 nop
39
40 For TLS descriptors the assembler will present us with code
41 fragments of the form:
42
07d6d2b8
AM		 43 adrp x0, :tlsdesc:foo R_AARCH64_TLSDESC_ADR_PAGE21(foo)
44 ldr x1, [x0, #:tlsdesc_lo12:foo] R_AARCH64_TLSDESC_LD64_LO12(foo)
45 add x0, x0, #:tlsdesc_lo12:foo R_AARCH64_TLSDESC_ADD_LO12(foo)
a06ea964 46 .tlsdesccall foo
07d6d2b8 47 blr x1 R_AARCH64_TLSDESC_CALL(foo)
a06ea964
NC		 48
49 The relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} against foo
50 indicate that foo is thread local and should be accessed via the
51 traditional TLS mechanims.
52
a6bb11b2 53 The relocations R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC}
a06ea964
NC		 54 against foo indicate that 'foo' is thread local and should be accessed
55 via a TLS descriptor mechanism.
56
57 The precise instruction sequence is only relevant from the
58 perspective of linker relaxation which is currently not implemented.
59
60 The static linker must detect that 'foo' is a TLS object and
61 allocate a double GOT entry. The GOT entry must be created for both
62 global and local TLS symbols. Note that this is different to none
63 TLS local objects which do not need a GOT entry.
64
65 In the traditional TLS mechanism, the double GOT entry is used to
66 provide the tls_index structure, containing module and offset
a6bb11b2 67 entries. The static linker places the relocation R_AARCH64_TLS_DTPMOD
a06ea964
NC		 68 on the module entry. The loader will subsequently fixup this
69 relocation with the module identity.
70
71 For global traditional TLS symbols the static linker places an
a6bb11b2 72 R_AARCH64_TLS_DTPREL relocation on the offset entry. The loader
a06ea964
NC		 73 will subsequently fixup the offset. For local TLS symbols the static
74 linker fixes up offset.
75
76 In the TLS descriptor mechanism the double GOT entry is used to
77 provide the descriptor. The static linker places the relocation
78 R_AARCH64_TLSDESC on the first GOT slot. The loader will
79 subsequently fix this up.
80
81 Implementation:
82
83 The handling of TLS symbols is implemented across a number of
84 different backend functions. The following is a top level view of
85 what processing is performed where.
86
87 The TLS implementation maintains state information for each TLS
88 symbol. The state information for local and global symbols is kept
89 in different places. Global symbols use generic BFD structures while
90 local symbols use backend specific structures that are allocated and
91 maintained entirely by the backend.
92
93 The flow:
94
cec5225b 95 elfNN_aarch64_check_relocs()
a06ea964
NC		 96
97 This function is invoked for each relocation.
98
99 The TLS relocations R_AARCH64_TLSGD_{ADR_PREL21,ADD_LO12_NC} and
a6bb11b2 100 R_AARCH64_TLSDESC_{ADR_PAGE21,LD64_LO12_NC,ADD_LO12_NC} are
a06ea964
NC		 101 spotted. One time creation of local symbol data structures are
102 created when the first local symbol is seen.
103
104 The reference count for a symbol is incremented. The GOT type for
105 each symbol is marked as general dynamic.
106
cec5225b 107 elfNN_aarch64_allocate_dynrelocs ()
a06ea964
NC		 108
109 For each global with positive reference count we allocate a double
110 GOT slot. For a traditional TLS symbol we allocate space for two
111 relocation entries on the GOT, for a TLS descriptor symbol we
112 allocate space for one relocation on the slot. Record the GOT offset
113 for this symbol.
114
cec5225b 115 elfNN_aarch64_size_dynamic_sections ()
a06ea964
NC		 116
117 Iterate all input BFDS, look for in the local symbol data structure
118 constructed earlier for local TLS symbols and allocate them double
119 GOT slots along with space for a single GOT relocation. Update the
120 local symbol structure to record the GOT offset allocated.
121
cec5225b 122 elfNN_aarch64_relocate_section ()
a06ea964 123
cec5225b 124 Calls elfNN_aarch64_final_link_relocate ()
a06ea964
NC		 125
126 Emit the relevant TLS relocations against the GOT for each TLS
127 symbol. For local TLS symbols emit the GOT offset directly. The GOT
128 relocations are emitted once the first time a TLS symbol is
129 encountered. The implementation uses the LSB of the GOT offset to
130 flag that the relevant GOT relocations for a symbol have been
131 emitted. All of the TLS code that uses the GOT offset needs to take
132 care to mask out this flag bit before using the offset.
133
cec5225b 134 elfNN_aarch64_final_link_relocate ()
a06ea964
NC		 135
136 Fixup the R_AARCH64_TLSGD_{ADR_PREL21, ADD_LO12_NC} relocations. */
137
138#include "sysdep.h"
139#include "bfd.h"
140#include "libiberty.h"
141#include "libbfd.h"
a06ea964
NC		 142#include "elf-bfd.h"
143#include "bfdlink.h"
1419bbe5 144#include "objalloc.h"
a06ea964 145#include "elf/aarch64.h"
caed7120 146#include "elfxx-aarch64.h"
a8bfaadb 147#include "cpu-aarch64.h"
a06ea964 148
cec5225b
YZ		 149#define ARCH_SIZE NN
150
151#if ARCH_SIZE == 64
152#define AARCH64_R(NAME) R_AARCH64_ ## NAME
153#define AARCH64_R_STR(NAME) "R_AARCH64_" #NAME
a6bb11b2
YZ		 154#define HOWTO64(...) HOWTO (__VA_ARGS__)
155#define HOWTO32(...) EMPTY_HOWTO (0)
cec5225b 156#define LOG_FILE_ALIGN 3
f955cccf 157#define BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
cec5225b
YZ		 158#endif
159
f7d2c675
SP		 160#define MORELLO_R(NAME) R_MORELLO_ ## NAME
161#define MORELLO_R_STR(NAME) "R_MORELLO_" #NAME
162
cec5225b
YZ		 163#if ARCH_SIZE == 32
164#define AARCH64_R(NAME) R_AARCH64_P32_ ## NAME
165#define AARCH64_R_STR(NAME) "R_AARCH64_P32_" #NAME
a6bb11b2
YZ		 166#define HOWTO64(...) EMPTY_HOWTO (0)
167#define HOWTO32(...) HOWTO (__VA_ARGS__)
cec5225b 168#define LOG_FILE_ALIGN 2
07d6d2b8
AM		 169#define BFD_RELOC_AARCH64_TLSDESC_LD32_LO12 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
170#define R_AARCH64_P32_TLSDESC_ADD_LO12 R_AARCH64_P32_TLSDESC_ADD_LO12_NC
cec5225b
YZ		 171#endif
172
a6bb11b2 173#define IS_AARCH64_TLS_RELOC(R_TYPE) \
4c0a9a6f
JW		 174 ((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
175 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
3c12b054 176 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
3e8286c0 177 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
1aa66fb1 178 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
a6bb11b2 179 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
a6bb11b2 180 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
4c0a9a6f 181 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC \
a6bb11b2 182 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
4c0a9a6f
JW		 183 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC \
184 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1 \
6ffe9a1b 185 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12 \
40fbed84 186 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 \
753999c1 187 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC \
73f925cc 188 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
f69e4920 189 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
77a69ff8 190 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 \
07c9aa07
JW		 191 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12 \
192 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC \
193 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12 \
194 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC \
195 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12 \
196 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC \
197 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12 \
198 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC \
6ffe9a1b
JW		 199 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0 \
200 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC \
201 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1 \
202 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC \
203 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2 \
a6bb11b2 204 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12 \
4c0a9a6f 205 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12 \
a6bb11b2 206 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC \
e04ef022
RL		 207 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12 \
208 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC \
209 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12 \
210 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC \
211 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12 \
212 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC \
213 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12 \
214 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC \
a6bb11b2
YZ		 215 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0 \
216 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC \
4c0a9a6f
JW		 217 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 \
218 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC \
219 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2 \
a6bb11b2
YZ		 220 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPMOD \
221 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_DTPREL \
222 || (R_TYPE) == BFD_RELOC_AARCH64_TLS_TPREL \
a06ea964
NC		 223 || IS_AARCH64_TLSDESC_RELOC ((R_TYPE)))
224
9331eea1 225#define IS_AARCH64_TLS_RELAX_RELOC(R_TYPE) \
f955cccf
NC		 226 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
227 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
4ca9b406 228 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
4af68b9c
JW		 229 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
230 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4ca9b406 231 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
4af68b9c
JW		 232 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
233 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
4ca9b406 234 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
4af68b9c 235 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC \
0484b454
RL		 236 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
237 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
238 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1 \
239 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4af68b9c 240 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
9331eea1
JW		 241 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
242 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
ac734732
RL		 243 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
244 || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
9331eea1
JW		 245 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
246 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 \
247 || (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC \
259364ad
JW		 248 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC \
249 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 \
4af68b9c 250 || (R_TYPE) == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21)
9331eea1 251
a6bb11b2 252#define IS_AARCH64_TLSDESC_RELOC(R_TYPE) \
4c0a9a6f
JW		 253 ((R_TYPE) == BFD_RELOC_AARCH64_TLSDESC \
254 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD \
f955cccf 255 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12 \
a6bb11b2 256 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 \
4ca9b406 257 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20 \
389b8029 258 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21 \
4c0a9a6f 259 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_CALL \
4ca9b406 260 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_CALL \
a6bb11b2 261 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC \
f955cccf 262 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD64_LO12 \
4ca9b406 263 || (R_TYPE) == BFD_RELOC_MORELLO_TLSDESC_LD128_LO12 \
a6bb11b2 264 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LDR \
4c0a9a6f
JW		 265 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_LD_PREL19 \
266 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC \
267 || (R_TYPE) == BFD_RELOC_AARCH64_TLSDESC_OFF_G1)
a06ea964 268
6353d82b 269#define ELIMINATE_COPY_RELOCS 1
a06ea964 270
a06ea964 271/* Return size of a relocation entry. HTAB is the bfd's
cec5225b
YZ		 272 elf_aarch64_link_hash_entry. */
273#define RELOC_SIZE(HTAB) (sizeof (ElfNN_External_Rela))
a06ea964 274
a1bdea65
SP		 275/* GOT Entry size - 16 bytes in C64, 8 bytes in ELF64 and 4 bytes in ELF32. */
276#define GOT_ENTRY_SIZE(htab) (ARCH_SIZE >> (3 - htab->c64_rel))
277#define GOT_RESERVED_HEADER_SLOTS (3)
07d6d2b8
AM		 278#define PLT_ENTRY_SIZE (32)
279#define PLT_SMALL_ENTRY_SIZE (16)
280#define PLT_TLSDESC_ENTRY_SIZE (32)
37c18eed 281/* PLT sizes with BTI insn. */
68bb0359 282#define PLT_BTI_SMALL_ENTRY_SIZE (24)
1dbade74 283/* PLT sizes with PAC insn. */
68bb0359 284#define PLT_PAC_SMALL_ENTRY_SIZE (24)
1dbade74 285/* PLT sizes with BTI and PAC insn. */
1dbade74 286#define PLT_BTI_PAC_SMALL_ENTRY_SIZE (24)
a06ea964 287
2d0ca824 288/* Encoding of the nop instruction. */
a06ea964
NC		 289#define INSN_NOP 0xd503201f
290
291#define aarch64_compute_jump_table_size(htab) \
292 (((htab)->root.srelplt == NULL) ? 0 \
a1bdea65 293 : (htab)->root.srelplt->reloc_count * GOT_ENTRY_SIZE (htab))
a06ea964
NC		 294
295/* The first entry in a procedure linkage table looks like this
296 if the distance between the PLTGOT and the PLT is < 4GB use
297 these PLT entries. Note that the dynamic linker gets &PLTGOT[2]
298 in x16 and needs to work out PLTGOT[1] by using an address of
cec5225b
YZ		 299 [x16,#-GOT_ENTRY_SIZE]. */
300static const bfd_byte elfNN_aarch64_small_plt0_entry[PLT_ENTRY_SIZE] =
a06ea964
NC		 301{
302 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
303 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
caed7120 304#if ARCH_SIZE == 64
a06ea964
NC		 305 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
306 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
caed7120
YZ		 307#else
308 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
309 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
310#endif
a06ea964
NC		 311 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
312 0x1f, 0x20, 0x03, 0xd5, /* nop */
313 0x1f, 0x20, 0x03, 0xd5, /* nop */
314 0x1f, 0x20, 0x03, 0xd5, /* nop */
315};
316
68bb0359 317static const bfd_byte elfNN_aarch64_small_plt0_bti_entry[PLT_ENTRY_SIZE] =
37c18eed
SD		 318{
319 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
320 0xf0, 0x7b, 0xbf, 0xa9, /* stp x16, x30, [sp, #-16]! */
321 0x10, 0x00, 0x00, 0x90, /* adrp x16, (GOT+16) */
322#if ARCH_SIZE == 64
323 0x11, 0x0A, 0x40, 0xf9, /* ldr x17, [x16, #PLT_GOT+0x10] */
324 0x10, 0x42, 0x00, 0x91, /* add x16, x16,#PLT_GOT+0x10 */
325#else
326 0x11, 0x0A, 0x40, 0xb9, /* ldr w17, [x16, #PLT_GOT+0x8] */
327 0x10, 0x22, 0x00, 0x11, /* add w16, w16,#PLT_GOT+0x8 */
328#endif
329 0x20, 0x02, 0x1f, 0xd6, /* br x17 */
330 0x1f, 0x20, 0x03, 0xd5, /* nop */
331 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD		 332};
333
e19e9199
SP		 334/* The C64 PLT0. */
335static const bfd_byte elfNN_c64_small_plt0_entry[PLT_ENTRY_SIZE] =
336{
337 0xf0, 0x7b, 0xbf, 0x62, /* stp c16, c30, [csp, #-32]! */
338 0x10, 0x00, 0x80, 0x90, /* adrp c16, (GOT+16) */
339 0x11, 0x0a, 0x40, 0xc2, /* ldr c17, [c16, #PLT_GOT+0x10] */
340 0x10, 0x02, 0x00, 0x02, /* add c16, c16,#PLT_GOT+0x10 */
341 0x20, 0x12, 0xc2, 0xc2, /* br c17 */
342 0x1f, 0x20, 0x03, 0xd5, /* nop */
343 0x1f, 0x20, 0x03, 0xd5, /* nop */
344 0x1f, 0x20, 0x03, 0xd5, /* nop */
345};
346
a06ea964
NC		 347/* Per function entry in a procedure linkage table looks like this
348 if the distance between the PLTGOT and the PLT is < 4GB use
37c18eed 349 these PLT entries. Use BTI versions of the PLTs when enabled. */
cec5225b 350static const bfd_byte elfNN_aarch64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
a06ea964
NC		 351{
352 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
caed7120 353#if ARCH_SIZE == 64
a06ea964
NC		 354 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
355 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
caed7120
YZ		 356#else
357 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
358 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
359#endif
a06ea964
NC		 360 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
361};
362
e19e9199
SP		 363/* The C64 PLT. */
364static const bfd_byte elfNN_c64_small_plt_entry[PLT_SMALL_ENTRY_SIZE] =
365{
366 0x10, 0x00, 0x80, 0x90, /* adrp c16, PLTGOT + offset */
367 0x11, 0x02, 0x40, 0xc2, /* ldr c17, [c16, PLTGOT + offset] */
368 0x10, 0x02, 0x00, 0x02, /* add c16, c16, :lo12:PLTGOT + offset */
369 0x20, 0x12, 0xc2, 0xc2, /* br c17. */
370};
371
37c18eed
SD		 372static const bfd_byte
373elfNN_aarch64_small_plt_bti_entry[PLT_BTI_SMALL_ENTRY_SIZE] =
374{
375 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
376 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
377#if ARCH_SIZE == 64
378 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
379 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
380#else
381 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
382 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
383#endif
384 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 385 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD		 386};
387
1dbade74
SD		 388static const bfd_byte
389elfNN_aarch64_small_plt_pac_entry[PLT_PAC_SMALL_ENTRY_SIZE] =
390{
391 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
392#if ARCH_SIZE == 64
393 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
394 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
395#else
396 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
397 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
398#endif
399 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
400 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
68bb0359 401 0x1f, 0x20, 0x03, 0xd5, /* nop */
1dbade74
SD		 402};
403
404static const bfd_byte
405elfNN_aarch64_small_plt_bti_pac_entry[PLT_BTI_PAC_SMALL_ENTRY_SIZE] =
406{
407 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
408 0x10, 0x00, 0x00, 0x90, /* adrp x16, PLTGOT + n * 8 */
409#if ARCH_SIZE == 64
410 0x11, 0x02, 0x40, 0xf9, /* ldr x17, [x16, PLTGOT + n * 8] */
411 0x10, 0x02, 0x00, 0x91, /* add x16, x16, :lo12:PLTGOT + n * 8 */
412#else
413 0x11, 0x02, 0x40, 0xb9, /* ldr w17, [x16, PLTGOT + n * 4] */
414 0x10, 0x02, 0x00, 0x11, /* add w16, w16, :lo12:PLTGOT + n * 4 */
415#endif
416 0x9f, 0x21, 0x03, 0xd5, /* autia1716 */
417 0x20, 0x02, 0x1f, 0xd6, /* br x17. */
418};
419
a06ea964 420static const bfd_byte
cec5225b 421elfNN_aarch64_tlsdesc_small_plt_entry[PLT_TLSDESC_ENTRY_SIZE] =
a06ea964
NC		 422{
423 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
424 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
425 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
caed7120
YZ		 426#if ARCH_SIZE == 64
427 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
a06ea964 428 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
caed7120
YZ		 429#else
430 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
431 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
432#endif
433 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
a06ea964
NC		 434 0x1f, 0x20, 0x03, 0xd5, /* nop */
435 0x1f, 0x20, 0x03, 0xd5, /* nop */
436};
437
37c18eed 438static const bfd_byte
68bb0359 439elfNN_aarch64_tlsdesc_small_plt_bti_entry[PLT_TLSDESC_ENTRY_SIZE] =
37c18eed
SD		 440{
441 0x5f, 0x24, 0x03, 0xd5, /* bti c. */
442 0xe2, 0x0f, 0xbf, 0xa9, /* stp x2, x3, [sp, #-16]! */
443 0x02, 0x00, 0x00, 0x90, /* adrp x2, 0 */
444 0x03, 0x00, 0x00, 0x90, /* adrp x3, 0 */
445#if ARCH_SIZE == 64
446 0x42, 0x00, 0x40, 0xf9, /* ldr x2, [x2, #0] */
447 0x63, 0x00, 0x00, 0x91, /* add x3, x3, 0 */
448#else
449 0x42, 0x00, 0x40, 0xb9, /* ldr w2, [x2, #0] */
450 0x63, 0x00, 0x00, 0x11, /* add w3, w3, 0 */
451#endif
452 0x40, 0x00, 0x1f, 0xd6, /* br x2 */
453 0x1f, 0x20, 0x03, 0xd5, /* nop */
37c18eed
SD		 454};
455
4ca9b406
SP		 456static const bfd_byte
457elfNN_aarch64_tlsdesc_small_plt_c64_entry[PLT_TLSDESC_ENTRY_SIZE] =
458{
459 0xe2, 0x8f, 0xbf, 0x62, /* stp c2, c3, [sp, #-16]! */
460 0x02, 0x00, 0x80, 0x90, /* adrp c2, 0 */
461 0x03, 0x00, 0x80, 0x90, /* adrp c3, 0 */
462 0x42, 0x00, 0x40, 0xc2, /* ldr c2, [c2, #0] */
463 0x63, 0x00, 0x00, 0x02, /* add c3, c3, 0 */
464 0x40, 0x10, 0xc2, 0xc2, /* br c2 */
465 0x1f, 0x20, 0x03, 0xd5, /* nop */
466 0x1f, 0x20, 0x03, 0xd5, /* nop */
467};
468
07d6d2b8
AM		 469#define elf_info_to_howto elfNN_aarch64_info_to_howto
470#define elf_info_to_howto_rel elfNN_aarch64_info_to_howto
a06ea964
NC		 471
472#define AARCH64_ELF_ABI_VERSION 0
a06ea964
NC		 473
474/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
475#define ALL_ONES (~ (bfd_vma) 0)
476
a6bb11b2
YZ		 477/* Indexed by the bfd interal reloc enumerators.
478 Therefore, the table needs to be synced with BFD_RELOC_AARCH64_*
479 in reloc.c. */
a06ea964 480
a6bb11b2 481static reloc_howto_type elfNN_aarch64_howto_table[] =
a06ea964 482{
a6bb11b2 483 EMPTY_HOWTO (0),
a06ea964 484
a6bb11b2 485 /* Basic data relocations. */
a06ea964 486
b7f28d87
JW		 487 /* Deprecated, but retained for backwards compatibility. */
488 HOWTO64 (R_AARCH64_NULL, /* type */
a06ea964 489 0, /* rightshift */
6346d5ca 490 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2 491 0, /* bitsize */
a06ea964
NC		 492 FALSE, /* pc_relative */
493 0, /* bitpos */
494 complain_overflow_dont, /* complain_on_overflow */
495 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 496 "R_AARCH64_NULL", /* name */
a06ea964
NC		 497 FALSE, /* partial_inplace */
498 0, /* src_mask */
a6bb11b2 499 0, /* dst_mask */
a06ea964 500 FALSE), /* pcrel_offset */
a6bb11b2 501 HOWTO (R_AARCH64_NONE, /* type */
a06ea964 502 0, /* rightshift */
6346d5ca 503 3, /* size (0 = byte, 1 = short, 2 = long) */
a06ea964
NC		 504 0, /* bitsize */
505 FALSE, /* pc_relative */
506 0, /* bitpos */
507 complain_overflow_dont, /* complain_on_overflow */
508 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 509 "R_AARCH64_NONE", /* name */
a06ea964
NC		 510 FALSE, /* partial_inplace */
511 0, /* src_mask */
512 0, /* dst_mask */
513 FALSE), /* pcrel_offset */
514
515 /* .xword: (S+A) */
a6bb11b2 516 HOWTO64 (AARCH64_R (ABS64), /* type */
a06ea964
NC		 517 0, /* rightshift */
518 4, /* size (4 = long long) */
519 64, /* bitsize */
520 FALSE, /* pc_relative */
521 0, /* bitpos */
522 complain_overflow_unsigned, /* complain_on_overflow */
523 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 524 AARCH64_R_STR (ABS64), /* name */
a06ea964
NC		 525 FALSE, /* partial_inplace */
526 ALL_ONES, /* src_mask */
527 ALL_ONES, /* dst_mask */
528 FALSE), /* pcrel_offset */
529
530 /* .word: (S+A) */
a6bb11b2 531 HOWTO (AARCH64_R (ABS32), /* type */
a06ea964
NC		 532 0, /* rightshift */
533 2, /* size (0 = byte, 1 = short, 2 = long) */
534 32, /* bitsize */
535 FALSE, /* pc_relative */
536 0, /* bitpos */
537 complain_overflow_unsigned, /* complain_on_overflow */
538 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 539 AARCH64_R_STR (ABS32), /* name */
a06ea964
NC		 540 FALSE, /* partial_inplace */
541 0xffffffff, /* src_mask */
542 0xffffffff, /* dst_mask */
543 FALSE), /* pcrel_offset */
544
545 /* .half: (S+A) */
a6bb11b2 546 HOWTO (AARCH64_R (ABS16), /* type */
a06ea964
NC		 547 0, /* rightshift */
548 1, /* size (0 = byte, 1 = short, 2 = long) */
549 16, /* bitsize */
550 FALSE, /* pc_relative */
551 0, /* bitpos */
552 complain_overflow_unsigned, /* complain_on_overflow */
553 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 554 AARCH64_R_STR (ABS16), /* name */
a06ea964
NC		 555 FALSE, /* partial_inplace */
556 0xffff, /* src_mask */
557 0xffff, /* dst_mask */
558 FALSE), /* pcrel_offset */
559
560 /* .xword: (S+A-P) */
a6bb11b2 561 HOWTO64 (AARCH64_R (PREL64), /* type */
a06ea964
NC		 562 0, /* rightshift */
563 4, /* size (4 = long long) */
564 64, /* bitsize */
565 TRUE, /* pc_relative */
566 0, /* bitpos */
567 complain_overflow_signed, /* complain_on_overflow */
568 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 569 AARCH64_R_STR (PREL64), /* name */
a06ea964
NC		 570 FALSE, /* partial_inplace */
571 ALL_ONES, /* src_mask */
572 ALL_ONES, /* dst_mask */
573 TRUE), /* pcrel_offset */
574
575 /* .word: (S+A-P) */
a6bb11b2 576 HOWTO (AARCH64_R (PREL32), /* type */
a06ea964
NC		 577 0, /* rightshift */
578 2, /* size (0 = byte, 1 = short, 2 = long) */
579 32, /* bitsize */
580 TRUE, /* pc_relative */
581 0, /* bitpos */
582 complain_overflow_signed, /* complain_on_overflow */
583 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 584 AARCH64_R_STR (PREL32), /* name */
a06ea964
NC		 585 FALSE, /* partial_inplace */
586 0xffffffff, /* src_mask */
587 0xffffffff, /* dst_mask */
588 TRUE), /* pcrel_offset */
589
590 /* .half: (S+A-P) */
a6bb11b2 591 HOWTO (AARCH64_R (PREL16), /* type */
a06ea964
NC		 592 0, /* rightshift */
593 1, /* size (0 = byte, 1 = short, 2 = long) */
594 16, /* bitsize */
595 TRUE, /* pc_relative */
596 0, /* bitpos */
597 complain_overflow_signed, /* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 599 AARCH64_R_STR (PREL16), /* name */
a06ea964
NC		 600 FALSE, /* partial_inplace */
601 0xffff, /* src_mask */
602 0xffff, /* dst_mask */
603 TRUE), /* pcrel_offset */
604
605 /* Group relocations to create a 16, 32, 48 or 64 bit
606 unsigned data or abs address inline. */
607
608 /* MOVZ: ((S+A) >> 0) & 0xffff */
a6bb11b2 609 HOWTO (AARCH64_R (MOVW_UABS_G0), /* type */
a06ea964
NC		 610 0, /* rightshift */
611 2, /* size (0 = byte, 1 = short, 2 = long) */
612 16, /* bitsize */
613 FALSE, /* pc_relative */
614 0, /* bitpos */
615 complain_overflow_unsigned, /* complain_on_overflow */
616 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 617 AARCH64_R_STR (MOVW_UABS_G0), /* name */
a06ea964
NC		 618 FALSE, /* partial_inplace */
619 0xffff, /* src_mask */
620 0xffff, /* dst_mask */
621 FALSE), /* pcrel_offset */
622
623 /* MOVK: ((S+A) >> 0) & 0xffff [no overflow check] */
a6bb11b2 624 HOWTO (AARCH64_R (MOVW_UABS_G0_NC), /* type */
a06ea964
NC		 625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 16, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont, /* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 632 AARCH64_R_STR (MOVW_UABS_G0_NC), /* name */
a06ea964
NC		 633 FALSE, /* partial_inplace */
634 0xffff, /* src_mask */
635 0xffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 /* MOVZ: ((S+A) >> 16) & 0xffff */
a6bb11b2 639 HOWTO (AARCH64_R (MOVW_UABS_G1), /* type */
a06ea964
NC		 640 16, /* rightshift */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
642 16, /* bitsize */
643 FALSE, /* pc_relative */
644 0, /* bitpos */
645 complain_overflow_unsigned, /* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 647 AARCH64_R_STR (MOVW_UABS_G1), /* name */
a06ea964
NC		 648 FALSE, /* partial_inplace */
649 0xffff, /* src_mask */
650 0xffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
652
653 /* MOVK: ((S+A) >> 16) & 0xffff [no overflow check] */
a6bb11b2 654 HOWTO64 (AARCH64_R (MOVW_UABS_G1_NC), /* type */
a06ea964
NC		 655 16, /* rightshift */
656 2, /* size (0 = byte, 1 = short, 2 = long) */
657 16, /* bitsize */
658 FALSE, /* pc_relative */
659 0, /* bitpos */
660 complain_overflow_dont, /* complain_on_overflow */
661 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 662 AARCH64_R_STR (MOVW_UABS_G1_NC), /* name */
a06ea964
NC		 663 FALSE, /* partial_inplace */
664 0xffff, /* src_mask */
665 0xffff, /* dst_mask */
666 FALSE), /* pcrel_offset */
667
668 /* MOVZ: ((S+A) >> 32) & 0xffff */
a6bb11b2 669 HOWTO64 (AARCH64_R (MOVW_UABS_G2), /* type */
a06ea964
NC		 670 32, /* rightshift */
671 2, /* size (0 = byte, 1 = short, 2 = long) */
672 16, /* bitsize */
673 FALSE, /* pc_relative */
674 0, /* bitpos */
675 complain_overflow_unsigned, /* complain_on_overflow */
676 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 677 AARCH64_R_STR (MOVW_UABS_G2), /* name */
a06ea964
NC		 678 FALSE, /* partial_inplace */
679 0xffff, /* src_mask */
680 0xffff, /* dst_mask */
681 FALSE), /* pcrel_offset */
682
683 /* MOVK: ((S+A) >> 32) & 0xffff [no overflow check] */
a6bb11b2 684 HOWTO64 (AARCH64_R (MOVW_UABS_G2_NC), /* type */
a06ea964
NC		 685 32, /* rightshift */
686 2, /* size (0 = byte, 1 = short, 2 = long) */
687 16, /* bitsize */
688 FALSE, /* pc_relative */
689 0, /* bitpos */
690 complain_overflow_dont, /* complain_on_overflow */
691 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 692 AARCH64_R_STR (MOVW_UABS_G2_NC), /* name */
a06ea964
NC		 693 FALSE, /* partial_inplace */
694 0xffff, /* src_mask */
695 0xffff, /* dst_mask */
696 FALSE), /* pcrel_offset */
697
698 /* MOVZ: ((S+A) >> 48) & 0xffff */
a6bb11b2 699 HOWTO64 (AARCH64_R (MOVW_UABS_G3), /* type */
a06ea964
NC		 700 48, /* rightshift */
701 2, /* size (0 = byte, 1 = short, 2 = long) */
702 16, /* bitsize */
703 FALSE, /* pc_relative */
704 0, /* bitpos */
705 complain_overflow_unsigned, /* complain_on_overflow */
706 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 707 AARCH64_R_STR (MOVW_UABS_G3), /* name */
a06ea964
NC		 708 FALSE, /* partial_inplace */
709 0xffff, /* src_mask */
710 0xffff, /* dst_mask */
711 FALSE), /* pcrel_offset */
712
713 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
714 signed data or abs address inline. Will change instruction
715 to MOVN or MOVZ depending on sign of calculated value. */
716
717 /* MOV[ZN]: ((S+A) >> 0) & 0xffff */
a6bb11b2 718 HOWTO (AARCH64_R (MOVW_SABS_G0), /* type */
a06ea964
NC		 719 0, /* rightshift */
720 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 721 17, /* bitsize */
a06ea964
NC		 722 FALSE, /* pc_relative */
723 0, /* bitpos */
724 complain_overflow_signed, /* complain_on_overflow */
725 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 726 AARCH64_R_STR (MOVW_SABS_G0), /* name */
a06ea964
NC		 727 FALSE, /* partial_inplace */
728 0xffff, /* src_mask */
729 0xffff, /* dst_mask */
730 FALSE), /* pcrel_offset */
731
732 /* MOV[ZN]: ((S+A) >> 16) & 0xffff */
a6bb11b2 733 HOWTO64 (AARCH64_R (MOVW_SABS_G1), /* type */
a06ea964
NC		 734 16, /* rightshift */
735 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 736 17, /* bitsize */
a06ea964
NC		 737 FALSE, /* pc_relative */
738 0, /* bitpos */
739 complain_overflow_signed, /* complain_on_overflow */
740 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 741 AARCH64_R_STR (MOVW_SABS_G1), /* name */
a06ea964
NC		 742 FALSE, /* partial_inplace */
743 0xffff, /* src_mask */
744 0xffff, /* dst_mask */
745 FALSE), /* pcrel_offset */
746
747 /* MOV[ZN]: ((S+A) >> 32) & 0xffff */
a6bb11b2 748 HOWTO64 (AARCH64_R (MOVW_SABS_G2), /* type */
a06ea964
NC		 749 32, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
c5e3a364 751 17, /* bitsize */
a06ea964
NC		 752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_signed, /* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 756 AARCH64_R_STR (MOVW_SABS_G2), /* name */
a06ea964
NC		 757 FALSE, /* partial_inplace */
758 0xffff, /* src_mask */
759 0xffff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
32247401
RL		 762 /* Group relocations to create a 16, 32, 48 or 64 bit
763 PC relative address inline. */
764
765 /* MOV[NZ]: ((S+A-P) >> 0) & 0xffff */
e30d1fa1 766 HOWTO (AARCH64_R (MOVW_PREL_G0), /* type */
32247401
RL		 767 0, /* rightshift */
768 2, /* size (0 = byte, 1 = short, 2 = long) */
769 17, /* bitsize */
770 TRUE, /* pc_relative */
771 0, /* bitpos */
772 complain_overflow_signed, /* complain_on_overflow */
773 bfd_elf_generic_reloc, /* special_function */
774 AARCH64_R_STR (MOVW_PREL_G0), /* name */
775 FALSE, /* partial_inplace */
776 0xffff, /* src_mask */
777 0xffff, /* dst_mask */
778 TRUE), /* pcrel_offset */
779
780 /* MOVK: ((S+A-P) >> 0) & 0xffff [no overflow check] */
e30d1fa1 781 HOWTO (AARCH64_R (MOVW_PREL_G0_NC), /* type */
32247401
RL		 782 0, /* rightshift */
783 2, /* size (0 = byte, 1 = short, 2 = long) */
784 16, /* bitsize */
785 TRUE, /* pc_relative */
786 0, /* bitpos */
787 complain_overflow_dont, /* complain_on_overflow */
788 bfd_elf_generic_reloc, /* special_function */
789 AARCH64_R_STR (MOVW_PREL_G0_NC), /* name */
790 FALSE, /* partial_inplace */
791 0xffff, /* src_mask */
792 0xffff, /* dst_mask */
793 TRUE), /* pcrel_offset */
794
795 /* MOV[NZ]: ((S+A-P) >> 16) & 0xffff */
e30d1fa1 796 HOWTO (AARCH64_R (MOVW_PREL_G1), /* type */
32247401
RL		 797 16, /* rightshift */
798 2, /* size (0 = byte, 1 = short, 2 = long) */
799 17, /* bitsize */
800 TRUE, /* pc_relative */
801 0, /* bitpos */
802 complain_overflow_signed, /* complain_on_overflow */
803 bfd_elf_generic_reloc, /* special_function */
804 AARCH64_R_STR (MOVW_PREL_G1), /* name */
805 FALSE, /* partial_inplace */
806 0xffff, /* src_mask */
807 0xffff, /* dst_mask */
808 TRUE), /* pcrel_offset */
809
810 /* MOVK: ((S+A-P) >> 16) & 0xffff [no overflow check] */
811 HOWTO64 (AARCH64_R (MOVW_PREL_G1_NC), /* type */
812 16, /* rightshift */
813 2, /* size (0 = byte, 1 = short, 2 = long) */
814 16, /* bitsize */
815 TRUE, /* pc_relative */
816 0, /* bitpos */
817 complain_overflow_dont, /* complain_on_overflow */
818 bfd_elf_generic_reloc, /* special_function */
819 AARCH64_R_STR (MOVW_PREL_G1_NC), /* name */
820 FALSE, /* partial_inplace */
821 0xffff, /* src_mask */
822 0xffff, /* dst_mask */
823 TRUE), /* pcrel_offset */
824
825 /* MOV[NZ]: ((S+A-P) >> 32) & 0xffff */
826 HOWTO64 (AARCH64_R (MOVW_PREL_G2), /* type */
827 32, /* rightshift */
828 2, /* size (0 = byte, 1 = short, 2 = long) */
829 17, /* bitsize */
830 TRUE, /* pc_relative */
831 0, /* bitpos */
832 complain_overflow_signed, /* complain_on_overflow */
833 bfd_elf_generic_reloc, /* special_function */
834 AARCH64_R_STR (MOVW_PREL_G2), /* name */
835 FALSE, /* partial_inplace */
836 0xffff, /* src_mask */
837 0xffff, /* dst_mask */
838 TRUE), /* pcrel_offset */
839
840 /* MOVK: ((S+A-P) >> 32) & 0xffff [no overflow check] */
841 HOWTO64 (AARCH64_R (MOVW_PREL_G2_NC), /* type */
842 32, /* rightshift */
843 2, /* size (0 = byte, 1 = short, 2 = long) */
844 16, /* bitsize */
845 TRUE, /* pc_relative */
846 0, /* bitpos */
847 complain_overflow_dont, /* complain_on_overflow */
848 bfd_elf_generic_reloc, /* special_function */
849 AARCH64_R_STR (MOVW_PREL_G2_NC), /* name */
850 FALSE, /* partial_inplace */
851 0xffff, /* src_mask */
852 0xffff, /* dst_mask */
853 TRUE), /* pcrel_offset */
854
855 /* MOV[NZ]: ((S+A-P) >> 48) & 0xffff */
856 HOWTO64 (AARCH64_R (MOVW_PREL_G3), /* type */
857 48, /* rightshift */
858 2, /* size (0 = byte, 1 = short, 2 = long) */
859 16, /* bitsize */
860 TRUE, /* pc_relative */
861 0, /* bitpos */
862 complain_overflow_dont, /* complain_on_overflow */
863 bfd_elf_generic_reloc, /* special_function */
864 AARCH64_R_STR (MOVW_PREL_G3), /* name */
865 FALSE, /* partial_inplace */
866 0xffff, /* src_mask */
867 0xffff, /* dst_mask */
868 TRUE), /* pcrel_offset */
869
a06ea964
NC		 870/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
871 addresses: PG(x) is (x & ~0xfff). */
872
f7d2c675
SP		 873 /* LD-lit: ((S+A-P) >> 4) & 0x1ffff */
874 HOWTO64 (MORELLO_R (LD_PREL_LO17), /* type */
875 4, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 17, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_signed, /* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 MORELLO_R_STR (LD_PREL_LO17), /* name */
883 FALSE, /* partial_inplace */
884 0x1ffff, /* src_mask */
885 0x1ffff, /* dst_mask */
886 TRUE), /* pcrel_offset */
887
a06ea964 888 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 889 HOWTO (AARCH64_R (LD_PREL_LO19), /* type */
a06ea964
NC		 890 2, /* rightshift */
891 2, /* size (0 = byte, 1 = short, 2 = long) */
892 19, /* bitsize */
893 TRUE, /* pc_relative */
894 0, /* bitpos */
895 complain_overflow_signed, /* complain_on_overflow */
896 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 897 AARCH64_R_STR (LD_PREL_LO19), /* name */
a06ea964
NC		 898 FALSE, /* partial_inplace */
899 0x7ffff, /* src_mask */
900 0x7ffff, /* dst_mask */
901 TRUE), /* pcrel_offset */
902
92504105
SP		 903 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
904 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20), /* type */
905 12, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 20, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_signed, /* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 MORELLO_R_STR (ADR_PREL_PG_HI20), /* name */
913 FALSE, /* partial_inplace */
914 0xfffff, /* src_mask */
915 0xfffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 /* C64 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff [no overflow check] */
919 HOWTO64 (MORELLO_R (ADR_PREL_PG_HI20_NC), /* type */
920 12, /* rightshift */
921 2, /* size (0 = byte, 1 = short, 2 = long) */
922 20, /* bitsize */
923 TRUE, /* pc_relative */
924 0, /* bitpos */
925 complain_overflow_dont, /* complain_on_overflow */
926 bfd_elf_generic_reloc, /* special_function */
927 MORELLO_R_STR (ADR_PREL_PG_HI20_NC), /* name */
928 FALSE, /* partial_inplace */
929 0xfffff, /* src_mask */
930 0xfffff, /* dst_mask */
931 TRUE), /* pcrel_offset */
932
a06ea964 933 /* ADR: (S+A-P) & 0x1fffff */
a6bb11b2 934 HOWTO (AARCH64_R (ADR_PREL_LO21), /* type */
a06ea964
NC		 935 0, /* rightshift */
936 2, /* size (0 = byte, 1 = short, 2 = long) */
937 21, /* bitsize */
938 TRUE, /* pc_relative */
939 0, /* bitpos */
940 complain_overflow_signed, /* complain_on_overflow */
941 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 942 AARCH64_R_STR (ADR_PREL_LO21), /* name */
a06ea964
NC		 943 FALSE, /* partial_inplace */
944 0x1fffff, /* src_mask */
945 0x1fffff, /* dst_mask */
946 TRUE), /* pcrel_offset */
947
948 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
a6bb11b2 949 HOWTO (AARCH64_R (ADR_PREL_PG_HI21), /* type */
a06ea964
NC		 950 12, /* rightshift */
951 2, /* size (0 = byte, 1 = short, 2 = long) */
952 21, /* bitsize */
953 TRUE, /* pc_relative */
954 0, /* bitpos */
955 complain_overflow_signed, /* complain_on_overflow */
956 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 957 AARCH64_R_STR (ADR_PREL_PG_HI21), /* name */
a06ea964
NC		 958 FALSE, /* partial_inplace */
959 0x1fffff, /* src_mask */
960 0x1fffff, /* dst_mask */
961 TRUE), /* pcrel_offset */
962
963 /* ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff [no overflow check] */
a6bb11b2 964 HOWTO64 (AARCH64_R (ADR_PREL_PG_HI21_NC), /* type */
a06ea964
NC		 965 12, /* rightshift */
966 2, /* size (0 = byte, 1 = short, 2 = long) */
967 21, /* bitsize */
968 TRUE, /* pc_relative */
969 0, /* bitpos */
970 complain_overflow_dont, /* complain_on_overflow */
971 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 972 AARCH64_R_STR (ADR_PREL_PG_HI21_NC), /* name */
a06ea964
NC		 973 FALSE, /* partial_inplace */
974 0x1fffff, /* src_mask */
975 0x1fffff, /* dst_mask */
976 TRUE), /* pcrel_offset */
977
978 /* ADD: (S+A) & 0xfff [no overflow check] */
a6bb11b2 979 HOWTO (AARCH64_R (ADD_ABS_LO12_NC), /* type */
a06ea964
NC		 980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 12, /* bitsize */
983 FALSE, /* pc_relative */
984 10, /* bitpos */
985 complain_overflow_dont, /* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 987 AARCH64_R_STR (ADD_ABS_LO12_NC), /* name */
a06ea964
NC		 988 FALSE, /* partial_inplace */
989 0x3ffc00, /* src_mask */
990 0x3ffc00, /* dst_mask */
991 FALSE), /* pcrel_offset */
992
993 /* LD/ST8: (S+A) & 0xfff */
a6bb11b2 994 HOWTO (AARCH64_R (LDST8_ABS_LO12_NC), /* type */
a06ea964
NC		 995 0, /* rightshift */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
997 12, /* bitsize */
998 FALSE, /* pc_relative */
999 0, /* bitpos */
1000 complain_overflow_dont, /* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1002 AARCH64_R_STR (LDST8_ABS_LO12_NC), /* name */
a06ea964
NC		 1003 FALSE, /* partial_inplace */
1004 0xfff, /* src_mask */
1005 0xfff, /* dst_mask */
1006 FALSE), /* pcrel_offset */
1007
1008 /* Relocations for control-flow instructions. */
1009
1010 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
a6bb11b2 1011 HOWTO (AARCH64_R (TSTBR14), /* type */
a06ea964
NC		 1012 2, /* rightshift */
1013 2, /* size (0 = byte, 1 = short, 2 = long) */
1014 14, /* bitsize */
1015 TRUE, /* pc_relative */
1016 0, /* bitpos */
1017 complain_overflow_signed, /* complain_on_overflow */
1018 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1019 AARCH64_R_STR (TSTBR14), /* name */
a06ea964
NC		 1020 FALSE, /* partial_inplace */
1021 0x3fff, /* src_mask */
1022 0x3fff, /* dst_mask */
1023 TRUE), /* pcrel_offset */
1024
1025 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
a6bb11b2 1026 HOWTO (AARCH64_R (CONDBR19), /* type */
a06ea964
NC		 1027 2, /* rightshift */
1028 2, /* size (0 = byte, 1 = short, 2 = long) */
1029 19, /* bitsize */
1030 TRUE, /* pc_relative */
1031 0, /* bitpos */
1032 complain_overflow_signed, /* complain_on_overflow */
1033 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1034 AARCH64_R_STR (CONDBR19), /* name */
a06ea964
NC		 1035 FALSE, /* partial_inplace */
1036 0x7ffff, /* src_mask */
1037 0x7ffff, /* dst_mask */
1038 TRUE), /* pcrel_offset */
1039
a06ea964 1040 /* B: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1041 HOWTO (AARCH64_R (JUMP26), /* type */
a06ea964
NC		 1042 2, /* rightshift */
1043 2, /* size (0 = byte, 1 = short, 2 = long) */
1044 26, /* bitsize */
1045 TRUE, /* pc_relative */
1046 0, /* bitpos */
1047 complain_overflow_signed, /* complain_on_overflow */
1048 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1049 AARCH64_R_STR (JUMP26), /* name */
a06ea964
NC		 1050 FALSE, /* partial_inplace */
1051 0x3ffffff, /* src_mask */
1052 0x3ffffff, /* dst_mask */
1053 TRUE), /* pcrel_offset */
1054
1055 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
a6bb11b2 1056 HOWTO (AARCH64_R (CALL26), /* type */
a06ea964
NC		 1057 2, /* rightshift */
1058 2, /* size (0 = byte, 1 = short, 2 = long) */
1059 26, /* bitsize */
1060 TRUE, /* pc_relative */
1061 0, /* bitpos */
1062 complain_overflow_signed, /* complain_on_overflow */
1063 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1064 AARCH64_R_STR (CALL26), /* name */
a06ea964
NC		 1065 FALSE, /* partial_inplace */
1066 0x3ffffff, /* src_mask */
1067 0x3ffffff, /* dst_mask */
1068 TRUE), /* pcrel_offset */
1069
e19e9199
SP		 1070 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff */
1071 HOWTO64 (MORELLO_R (TSTBR14), /* type */
1072 2, /* rightshift */
1073 2, /* size (0 = byte, 1 = short, 2 = long) */
1074 14, /* bitsize */
1075 TRUE, /* pc_relative */
1076 0, /* bitpos */
1077 complain_overflow_signed, /* complain_on_overflow */
1078 bfd_elf_generic_reloc, /* special_function */
1079 MORELLO_R_STR (TSTBR14), /* name */
1080 FALSE, /* partial_inplace */
1081 0x3fff, /* src_mask */
1082 0x3fff, /* dst_mask */
1083 TRUE), /* pcrel_offset */
1084
1085 /* B.cond: ((S+A-P) >> 2) & 0x7ffff */
1086 HOWTO64 (MORELLO_R (CONDBR19), /* type */
1087 2, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 19, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_signed, /* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 MORELLO_R_STR (CONDBR19), /* name */
1095 FALSE, /* partial_inplace */
1096 0x7ffff, /* src_mask */
1097 0x7ffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 /* B: ((S+A-P) >> 2) & 0x3ffffff */
1101 HOWTO64 (MORELLO_R (JUMP26), /* type */
1102 2, /* rightshift */
1103 2, /* size (0 = byte, 1 = short, 2 = long) */
1104 26, /* bitsize */
1105 TRUE, /* pc_relative */
1106 0, /* bitpos */
1107 complain_overflow_signed, /* complain_on_overflow */
1108 bfd_elf_generic_reloc, /* special_function */
1109 MORELLO_R_STR (JUMP26), /* name */
1110 FALSE, /* partial_inplace */
1111 0x3ffffff, /* src_mask */
1112 0x3ffffff, /* dst_mask */
1113 TRUE), /* pcrel_offset */
1114
1115 /* BL: ((S+A-P) >> 2) & 0x3ffffff */
1116 HOWTO64 (MORELLO_R (CALL26), /* type */
1117 2, /* rightshift */
1118 2, /* size (0 = byte, 1 = short, 2 = long) */
1119 26, /* bitsize */
1120 TRUE, /* pc_relative */
1121 0, /* bitpos */
1122 complain_overflow_signed, /* complain_on_overflow */
1123 bfd_elf_generic_reloc, /* special_function */
1124 MORELLO_R_STR (CALL26), /* name */
1125 FALSE, /* partial_inplace */
1126 0x3ffffff, /* src_mask */
1127 0x3ffffff, /* dst_mask */
1128 TRUE), /* pcrel_offset */
1129
a06ea964 1130 /* LD/ST16: (S+A) & 0xffe */
a6bb11b2 1131 HOWTO (AARCH64_R (LDST16_ABS_LO12_NC), /* type */
a06ea964
NC		 1132 1, /* rightshift */
1133 2, /* size (0 = byte, 1 = short, 2 = long) */
1134 12, /* bitsize */
1135 FALSE, /* pc_relative */
1136 0, /* bitpos */
1137 complain_overflow_dont, /* complain_on_overflow */
1138 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1139 AARCH64_R_STR (LDST16_ABS_LO12_NC), /* name */
a06ea964
NC		 1140 FALSE, /* partial_inplace */
1141 0xffe, /* src_mask */
1142 0xffe, /* dst_mask */
1143 FALSE), /* pcrel_offset */
1144
1145 /* LD/ST32: (S+A) & 0xffc */
a6bb11b2 1146 HOWTO (AARCH64_R (LDST32_ABS_LO12_NC), /* type */
a06ea964
NC		 1147 2, /* rightshift */
1148 2, /* size (0 = byte, 1 = short, 2 = long) */
1149 12, /* bitsize */
1150 FALSE, /* pc_relative */
1151 0, /* bitpos */
1152 complain_overflow_dont, /* complain_on_overflow */
1153 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1154 AARCH64_R_STR (LDST32_ABS_LO12_NC), /* name */
a06ea964
NC		 1155 FALSE, /* partial_inplace */
1156 0xffc, /* src_mask */
1157 0xffc, /* dst_mask */
1158 FALSE), /* pcrel_offset */
1159
1160 /* LD/ST64: (S+A) & 0xff8 */
a6bb11b2 1161 HOWTO (AARCH64_R (LDST64_ABS_LO12_NC), /* type */
a06ea964
NC		 1162 3, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 12, /* bitsize */
1165 FALSE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont, /* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1169 AARCH64_R_STR (LDST64_ABS_LO12_NC), /* name */
a06ea964
NC		 1170 FALSE, /* partial_inplace */
1171 0xff8, /* src_mask */
1172 0xff8, /* dst_mask */
1173 FALSE), /* pcrel_offset */
1174
a06ea964 1175 /* LD/ST128: (S+A) & 0xff0 */
a6bb11b2 1176 HOWTO (AARCH64_R (LDST128_ABS_LO12_NC), /* type */
a06ea964
NC		 1177 4, /* rightshift */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 12, /* bitsize */
1180 FALSE, /* pc_relative */
1181 0, /* bitpos */
1182 complain_overflow_dont, /* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1184 AARCH64_R_STR (LDST128_ABS_LO12_NC), /* name */
a06ea964
NC		 1185 FALSE, /* partial_inplace */
1186 0xff0, /* src_mask */
1187 0xff0, /* dst_mask */
1188 FALSE), /* pcrel_offset */
1189
f41aef5f
RE		 1190 /* Set a load-literal immediate field to bits
1191 0x1FFFFC of G(S)-P */
a6bb11b2 1192 HOWTO (AARCH64_R (GOT_LD_PREL19), /* type */
f41aef5f
RE		 1193 2, /* rightshift */
1194 2, /* size (0 = byte,1 = short,2 = long) */
1195 19, /* bitsize */
1196 TRUE, /* pc_relative */
1197 0, /* bitpos */
1198 complain_overflow_signed, /* complain_on_overflow */
1199 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1200 AARCH64_R_STR (GOT_LD_PREL19), /* name */
f41aef5f
RE		 1201 FALSE, /* partial_inplace */
1202 0xffffe0, /* src_mask */
1203 0xffffe0, /* dst_mask */
1204 TRUE), /* pcrel_offset */
1205
a06ea964
NC		 1206 /* Get to the page for the GOT entry for the symbol
1207 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1208 HOWTO (AARCH64_R (ADR_GOT_PAGE), /* type */
a06ea964
NC		 1209 12, /* rightshift */
1210 2, /* size (0 = byte, 1 = short, 2 = long) */
1211 21, /* bitsize */
1212 TRUE, /* pc_relative */
1213 0, /* bitpos */
1214 complain_overflow_dont, /* complain_on_overflow */
1215 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1216 AARCH64_R_STR (ADR_GOT_PAGE), /* name */
a06ea964
NC		 1217 FALSE, /* partial_inplace */
1218 0x1fffff, /* src_mask */
1219 0x1fffff, /* dst_mask */
1220 TRUE), /* pcrel_offset */
1221
92504105
SP		 1222 /* Get to the page for the GOT entry for the symbol
1223 (G(S) - P) using a C64 ADRP instruction. */
1224 HOWTO64 (MORELLO_R (ADR_GOT_PAGE), /* type */
1225 12, /* rightshift */
1226 2, /* size (0 = byte, 1 = short, 2 = long) */
1227 20, /* bitsize */
1228 TRUE, /* pc_relative */
1229 0, /* bitpos */
1230 complain_overflow_dont, /* complain_on_overflow */
1231 bfd_elf_generic_reloc, /* special_function */
1232 MORELLO_R_STR (ADR_GOT_PAGE), /* name */
1233 FALSE, /* partial_inplace */
1234 0xfffff, /* src_mask */
1235 0xfffff, /* dst_mask */
1236 TRUE), /* pcrel_offset */
1237
a6bb11b2
YZ		 1238 /* LD64: GOT offset G(S) & 0xff8 */
1239 HOWTO64 (AARCH64_R (LD64_GOT_LO12_NC), /* type */
a06ea964
NC		 1240 3, /* rightshift */
1241 2, /* size (0 = byte, 1 = short, 2 = long) */
1242 12, /* bitsize */
1243 FALSE, /* pc_relative */
1244 0, /* bitpos */
1245 complain_overflow_dont, /* complain_on_overflow */
1246 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1247 AARCH64_R_STR (LD64_GOT_LO12_NC), /* name */
a06ea964
NC		 1248 FALSE, /* partial_inplace */
1249 0xff8, /* src_mask */
1250 0xff8, /* dst_mask */
a6bb11b2 1251 FALSE), /* pcrel_offset */
a06ea964 1252
a1bdea65
SP		 1253 /* LD128: GOT offset G(S) & 0xff0 */
1254 HOWTO64 (MORELLO_R (LD128_GOT_LO12_NC), /* type */
1255 4, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 12, /* bitsize */
1258 FALSE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont, /* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 MORELLO_R_STR (LD128_GOT_LO12_NC), /* name */
1263 FALSE, /* partial_inplace */
1264 0xff0, /* src_mask */
1265 0xff0, /* dst_mask */
1266 FALSE), /* pcrel_offset */
1267
a6bb11b2
YZ		 1268 /* LD32: GOT offset G(S) & 0xffc */
1269 HOWTO32 (AARCH64_R (LD32_GOT_LO12_NC), /* type */
1270 2, /* rightshift */
1271 2, /* size (0 = byte, 1 = short, 2 = long) */
1272 12, /* bitsize */
1273 FALSE, /* pc_relative */
1274 0, /* bitpos */
1275 complain_overflow_dont, /* complain_on_overflow */
1276 bfd_elf_generic_reloc, /* special_function */
1277 AARCH64_R_STR (LD32_GOT_LO12_NC), /* name */
1278 FALSE, /* partial_inplace */
1279 0xffc, /* src_mask */
1280 0xffc, /* dst_mask */
1281 FALSE), /* pcrel_offset */
a06ea964 1282
ca632371
RL		 1283 /* Lower 16 bits of GOT offset for the symbol. */
1284 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G0_NC), /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_dont, /* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 AARCH64_R_STR (MOVW_GOTOFF_G0_NC), /* name */
1293 FALSE, /* partial_inplace */
1294 0xffff, /* src_mask */
1295 0xffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
654248e7
RL		 1298 /* Higher 16 bits of GOT offset for the symbol. */
1299 HOWTO64 (AARCH64_R (MOVW_GOTOFF_G1), /* type */
1300 16, /* rightshift */
1301 2, /* size (0 = byte, 1 = short, 2 = long) */
1302 16, /* bitsize */
1303 FALSE, /* pc_relative */
1304 0, /* bitpos */
1305 complain_overflow_unsigned, /* complain_on_overflow */
1306 bfd_elf_generic_reloc, /* special_function */
1307 AARCH64_R_STR (MOVW_GOTOFF_G1), /* name */
1308 FALSE, /* partial_inplace */
1309 0xffff, /* src_mask */
1310 0xffff, /* dst_mask */
1311 FALSE), /* pcrel_offset */
1312
87f5fbcc
RL		 1313 /* LD64: GOT offset for the symbol. */
1314 HOWTO64 (AARCH64_R (LD64_GOTOFF_LO15), /* type */
1315 3, /* rightshift */
1316 2, /* size (0 = byte, 1 = short, 2 = long) */
1317 12, /* bitsize */
1318 FALSE, /* pc_relative */
1319 0, /* bitpos */
1320 complain_overflow_unsigned, /* complain_on_overflow */
1321 bfd_elf_generic_reloc, /* special_function */
1322 AARCH64_R_STR (LD64_GOTOFF_LO15), /* name */
1323 FALSE, /* partial_inplace */
1324 0x7ff8, /* src_mask */
1325 0x7ff8, /* dst_mask */
1326 FALSE), /* pcrel_offset */
1327
3d715ce4
JW		 1328 /* LD32: GOT offset to the page address of GOT table.
1329 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x5ffc. */
1330 HOWTO32 (AARCH64_R (LD32_GOTPAGE_LO14), /* type */
1331 2, /* rightshift */
1332 2, /* size (0 = byte, 1 = short, 2 = long) */
1333 12, /* bitsize */
1334 FALSE, /* pc_relative */
1335 0, /* bitpos */
1336 complain_overflow_unsigned, /* complain_on_overflow */
1337 bfd_elf_generic_reloc, /* special_function */
1338 AARCH64_R_STR (LD32_GOTPAGE_LO14), /* name */
1339 FALSE, /* partial_inplace */
1340 0x5ffc, /* src_mask */
1341 0x5ffc, /* dst_mask */
1342 FALSE), /* pcrel_offset */
1343
a921b5bd
JW		 1344 /* LD64: GOT offset to the page address of GOT table.
1345 (G(S) - PAGE (_GLOBAL_OFFSET_TABLE_)) & 0x7ff8. */
1346 HOWTO64 (AARCH64_R (LD64_GOTPAGE_LO15), /* type */
1347 3, /* rightshift */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 12, /* bitsize */
1350 FALSE, /* pc_relative */
1351 0, /* bitpos */
1352 complain_overflow_unsigned, /* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 AARCH64_R_STR (LD64_GOTPAGE_LO15), /* name */
1355 FALSE, /* partial_inplace */
1356 0x7ff8, /* src_mask */
1357 0x7ff8, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1359
a06ea964
NC		 1360 /* Get to the page for the GOT entry for the symbol
1361 (G(S) - P) using an ADRP instruction. */
a6bb11b2 1362 HOWTO (AARCH64_R (TLSGD_ADR_PAGE21), /* type */
a06ea964
NC		 1363 12, /* rightshift */
1364 2, /* size (0 = byte, 1 = short, 2 = long) */
1365 21, /* bitsize */
1366 TRUE, /* pc_relative */
1367 0, /* bitpos */
1368 complain_overflow_dont, /* complain_on_overflow */
1369 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1370 AARCH64_R_STR (TLSGD_ADR_PAGE21), /* name */
a06ea964
NC		 1371 FALSE, /* partial_inplace */
1372 0x1fffff, /* src_mask */
1373 0x1fffff, /* dst_mask */
1374 TRUE), /* pcrel_offset */
1375
3c12b054
MS		 1376 HOWTO (AARCH64_R (TLSGD_ADR_PREL21), /* type */
1377 0, /* rightshift */
1378 2, /* size (0 = byte, 1 = short, 2 = long) */
1379 21, /* bitsize */
1380 TRUE, /* pc_relative */
1381 0, /* bitpos */
1382 complain_overflow_dont, /* complain_on_overflow */
1383 bfd_elf_generic_reloc, /* special_function */
1384 AARCH64_R_STR (TLSGD_ADR_PREL21), /* name */
1385 FALSE, /* partial_inplace */
1386 0x1fffff, /* src_mask */
1387 0x1fffff, /* dst_mask */
1388 TRUE), /* pcrel_offset */
1389
a06ea964 1390 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
a6bb11b2 1391 HOWTO (AARCH64_R (TLSGD_ADD_LO12_NC), /* type */
a06ea964
NC		 1392 0, /* rightshift */
1393 2, /* size (0 = byte, 1 = short, 2 = long) */
1394 12, /* bitsize */
1395 FALSE, /* pc_relative */
1396 0, /* bitpos */
1397 complain_overflow_dont, /* complain_on_overflow */
1398 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1399 AARCH64_R_STR (TLSGD_ADD_LO12_NC), /* name */
a06ea964
NC		 1400 FALSE, /* partial_inplace */
1401 0xfff, /* src_mask */
1402 0xfff, /* dst_mask */
1403 FALSE), /* pcrel_offset */
1404
3e8286c0
RL		 1405 /* Lower 16 bits of GOT offset to tls_index. */
1406 HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
1407 0, /* rightshift */
1408 2, /* size (0 = byte, 1 = short, 2 = long) */
1409 16, /* bitsize */
1410 FALSE, /* pc_relative */
1411 0, /* bitpos */
1412 complain_overflow_dont, /* complain_on_overflow */
1413 bfd_elf_generic_reloc, /* special_function */
1414 AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
1415 FALSE, /* partial_inplace */
1416 0xffff, /* src_mask */
1417 0xffff, /* dst_mask */
1418 FALSE), /* pcrel_offset */
1419
1aa66fb1
RL		 1420 /* Higher 16 bits of GOT offset to tls_index. */
1421 HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
1422 16, /* rightshift */
1423 2, /* size (0 = byte, 1 = short, 2 = long) */
1424 16, /* bitsize */
1425 FALSE, /* pc_relative */
1426 0, /* bitpos */
1427 complain_overflow_unsigned, /* complain_on_overflow */
1428 bfd_elf_generic_reloc, /* special_function */
1429 AARCH64_R_STR (TLSGD_MOVW_G1), /* name */
1430 FALSE, /* partial_inplace */
1431 0xffff, /* src_mask */
1432 0xffff, /* dst_mask */
1433 FALSE), /* pcrel_offset */
1434
a6bb11b2 1435 HOWTO (AARCH64_R (TLSIE_ADR_GOTTPREL_PAGE21), /* type */
a06ea964
NC		 1436 12, /* rightshift */
1437 2, /* size (0 = byte, 1 = short, 2 = long) */
1438 21, /* bitsize */
1439 FALSE, /* pc_relative */
1440 0, /* bitpos */
1441 complain_overflow_dont, /* complain_on_overflow */
1442 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1443 AARCH64_R_STR (TLSIE_ADR_GOTTPREL_PAGE21), /* name */
a06ea964
NC		 1444 FALSE, /* partial_inplace */
1445 0x1fffff, /* src_mask */
1446 0x1fffff, /* dst_mask */
1447 FALSE), /* pcrel_offset */
1448
a6bb11b2 1449 HOWTO64 (AARCH64_R (TLSIE_LD64_GOTTPREL_LO12_NC), /* type */
a06ea964
NC		 1450 3, /* rightshift */
1451 2, /* size (0 = byte, 1 = short, 2 = long) */
1452 12, /* bitsize */
1453 FALSE, /* pc_relative */
1454 0, /* bitpos */
1455 complain_overflow_dont, /* complain_on_overflow */
1456 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1457 AARCH64_R_STR (TLSIE_LD64_GOTTPREL_LO12_NC), /* name */
a06ea964
NC		 1458 FALSE, /* partial_inplace */
1459 0xff8, /* src_mask */
1460 0xff8, /* dst_mask */
1461 FALSE), /* pcrel_offset */
1462
a6bb11b2
YZ		 1463 HOWTO32 (AARCH64_R (TLSIE_LD32_GOTTPREL_LO12_NC), /* type */
1464 2, /* rightshift */
1465 2, /* size (0 = byte, 1 = short, 2 = long) */
1466 12, /* bitsize */
1467 FALSE, /* pc_relative */
1468 0, /* bitpos */
1469 complain_overflow_dont, /* complain_on_overflow */
1470 bfd_elf_generic_reloc, /* special_function */
1471 AARCH64_R_STR (TLSIE_LD32_GOTTPREL_LO12_NC), /* name */
1472 FALSE, /* partial_inplace */
1473 0xffc, /* src_mask */
1474 0xffc, /* dst_mask */
1475 FALSE), /* pcrel_offset */
1476
1477 HOWTO (AARCH64_R (TLSIE_LD_GOTTPREL_PREL19), /* type */
bb3f9ed8 1478 2, /* rightshift */
a06ea964 1479 2, /* size (0 = byte, 1 = short, 2 = long) */
043bf05a 1480 19, /* bitsize */
a06ea964
NC		 1481 FALSE, /* pc_relative */
1482 0, /* bitpos */
1483 complain_overflow_dont, /* complain_on_overflow */
1484 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1485 AARCH64_R_STR (TLSIE_LD_GOTTPREL_PREL19), /* name */
a06ea964
NC		 1486 FALSE, /* partial_inplace */
1487 0x1ffffc, /* src_mask */
1488 0x1ffffc, /* dst_mask */
1489 FALSE), /* pcrel_offset */
1490
3b957e5b
RL		 1491 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G0_NC), /* type */
1492 0, /* rightshift */
1493 2, /* size (0 = byte, 1 = short, 2 = long) */
1494 16, /* bitsize */
1495 FALSE, /* pc_relative */
1496 0, /* bitpos */
1497 complain_overflow_dont, /* complain_on_overflow */
1498 bfd_elf_generic_reloc, /* special_function */
1499 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G0_NC), /* name */
1500 FALSE, /* partial_inplace */
1501 0xffff, /* src_mask */
1502 0xffff, /* dst_mask */
1503 FALSE), /* pcrel_offset */
1504
1505 HOWTO64 (AARCH64_R (TLSIE_MOVW_GOTTPREL_G1), /* type */
1506 16, /* rightshift */
1507 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 16, /* bitsize */
1509 FALSE, /* pc_relative */
1510 0, /* bitpos */
1511 complain_overflow_unsigned, /* complain_on_overflow */
1512 bfd_elf_generic_reloc, /* special_function */
1513 AARCH64_R_STR (TLSIE_MOVW_GOTTPREL_G1), /* name */
1514 FALSE, /* partial_inplace */
1515 0xffff, /* src_mask */
1516 0xffff, /* dst_mask */
1517 FALSE), /* pcrel_offset */
1518
49df5539
JW		 1519 /* ADD: bit[23:12] of byte offset to module TLS base address. */
1520 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12), /* type */
1521 12, /* rightshift */
1522 2, /* size (0 = byte, 1 = short, 2 = long) */
1523 12, /* bitsize */
1524 FALSE, /* pc_relative */
1525 0, /* bitpos */
1526 complain_overflow_unsigned, /* complain_on_overflow */
1527 bfd_elf_generic_reloc, /* special_function */
1528 AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12), /* name */
1529 FALSE, /* partial_inplace */
1530 0xfff, /* src_mask */
1531 0xfff, /* dst_mask */
1532 FALSE), /* pcrel_offset */
1533
70151fb5
JW		 1534 /* Unsigned 12 bit byte offset to module TLS base address. */
1535 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */
1536 0, /* rightshift */
1537 2, /* size (0 = byte, 1 = short, 2 = long) */
1538 12, /* bitsize */
1539 FALSE, /* pc_relative */
1540 0, /* bitpos */
1541 complain_overflow_unsigned, /* complain_on_overflow */
1542 bfd_elf_generic_reloc, /* special_function */
1543 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */
1544 FALSE, /* partial_inplace */
1545 0xfff, /* src_mask */
1546 0xfff, /* dst_mask */
1547 FALSE), /* pcrel_offset */
13289c10
JW		 1548
1549 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. */
1550 HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12_NC), /* type */
1551 0, /* rightshift */
1552 2, /* size (0 = byte, 1 = short, 2 = long) */
1553 12, /* bitsize */
1554 FALSE, /* pc_relative */
1555 0, /* bitpos */
1556 complain_overflow_dont, /* complain_on_overflow */
1557 bfd_elf_generic_reloc, /* special_function */
1558 AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12_NC), /* name */
1559 FALSE, /* partial_inplace */
1560 0xfff, /* src_mask */
1561 0xfff, /* dst_mask */
1562 FALSE), /* pcrel_offset */
70151fb5 1563
a12fad50
JW		 1564 /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
1565 HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
1566 0, /* rightshift */
1567 2, /* size (0 = byte, 1 = short, 2 = long) */
1568 12, /* bitsize */
1569 FALSE, /* pc_relative */
1570 0, /* bitpos */
1571 complain_overflow_dont, /* complain_on_overflow */
1572 bfd_elf_generic_reloc, /* special_function */
1573 AARCH64_R_STR (TLSLD_ADD_LO12_NC), /* name */
1574 FALSE, /* partial_inplace */
1575 0xfff, /* src_mask */
1576 0xfff, /* dst_mask */
1577 FALSE), /* pcrel_offset */
1578
1107e076
JW		 1579 /* Get to the page for the GOT entry for the symbol
1580 (G(S) - P) using an ADRP instruction. */
1581 HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */
1582 12, /* rightshift */
1583 2, /* size (0 = byte, 1 = short, 2 = long) */
1584 21, /* bitsize */
1585 TRUE, /* pc_relative */
1586 0, /* bitpos */
1587 complain_overflow_signed, /* complain_on_overflow */
1588 bfd_elf_generic_reloc, /* special_function */
1589 AARCH64_R_STR (TLSLD_ADR_PAGE21), /* name */
1590 FALSE, /* partial_inplace */
1591 0x1fffff, /* src_mask */
1592 0x1fffff, /* dst_mask */
1593 TRUE), /* pcrel_offset */
1594
6c37fedc
JW		 1595 HOWTO (AARCH64_R (TLSLD_ADR_PREL21), /* type */
1596 0, /* rightshift */
1597 2, /* size (0 = byte, 1 = short, 2 = long) */
1598 21, /* bitsize */
1599 TRUE, /* pc_relative */
1600 0, /* bitpos */
1601 complain_overflow_signed, /* complain_on_overflow */
1602 bfd_elf_generic_reloc, /* special_function */
1603 AARCH64_R_STR (TLSLD_ADR_PREL21), /* name */
1604 FALSE, /* partial_inplace */
1605 0x1fffff, /* src_mask */
1606 0x1fffff, /* dst_mask */
1607 TRUE), /* pcrel_offset */
1608
4c562523
JW		 1609 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1610 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12), /* type */
1611 1, /* rightshift */
1612 2, /* size (0 = byte, 1 = short, 2 = long) */
1613 11, /* bitsize */
1614 FALSE, /* pc_relative */
1615 10, /* bitpos */
1616 complain_overflow_unsigned, /* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12), /* name */
1619 FALSE, /* partial_inplace */
1620 0x1ffc00, /* src_mask */
1621 0x1ffc00, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623
1624 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check. */
1625 HOWTO64 (AARCH64_R (TLSLD_LDST16_DTPREL_LO12_NC), /* type */
1626 1, /* rightshift */
1627 2, /* size (0 = byte, 1 = short, 2 = long) */
1628 11, /* bitsize */
1629 FALSE, /* pc_relative */
1630 10, /* bitpos */
1631 complain_overflow_dont, /* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 AARCH64_R_STR (TLSLD_LDST16_DTPREL_LO12_NC), /* name */
1634 FALSE, /* partial_inplace */
1635 0x1ffc00, /* src_mask */
1636 0x1ffc00, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1640 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12), /* type */
1641 2, /* rightshift */
1642 2, /* size (0 = byte, 1 = short, 2 = long) */
1643 10, /* bitsize */
1644 FALSE, /* pc_relative */
1645 10, /* bitpos */
1646 complain_overflow_unsigned, /* complain_on_overflow */
1647 bfd_elf_generic_reloc, /* special_function */
1648 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12), /* name */
1649 FALSE, /* partial_inplace */
1650 0x3ffc00, /* src_mask */
1651 0x3ffc00, /* dst_mask */
1652 FALSE), /* pcrel_offset */
1653
1654 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check. */
1655 HOWTO64 (AARCH64_R (TLSLD_LDST32_DTPREL_LO12_NC), /* type */
1656 2, /* rightshift */
1657 2, /* size (0 = byte, 1 = short, 2 = long) */
1658 10, /* bitsize */
1659 FALSE, /* pc_relative */
1660 10, /* bitpos */
1661 complain_overflow_dont, /* complain_on_overflow */
1662 bfd_elf_generic_reloc, /* special_function */
1663 AARCH64_R_STR (TLSLD_LDST32_DTPREL_LO12_NC), /* name */
1664 FALSE, /* partial_inplace */
1665 0xffc00, /* src_mask */
1666 0xffc00, /* dst_mask */
1667 FALSE), /* pcrel_offset */
1668
1669 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1670 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12), /* type */
1671 3, /* rightshift */
1672 2, /* size (0 = byte, 1 = short, 2 = long) */
1673 9, /* bitsize */
1674 FALSE, /* pc_relative */
1675 10, /* bitpos */
1676 complain_overflow_unsigned, /* complain_on_overflow */
1677 bfd_elf_generic_reloc, /* special_function */
1678 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12), /* name */
1679 FALSE, /* partial_inplace */
1680 0x3ffc00, /* src_mask */
1681 0x3ffc00, /* dst_mask */
1682 FALSE), /* pcrel_offset */
1683
1684 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check. */
1685 HOWTO64 (AARCH64_R (TLSLD_LDST64_DTPREL_LO12_NC), /* type */
1686 3, /* rightshift */
1687 2, /* size (0 = byte, 1 = short, 2 = long) */
1688 9, /* bitsize */
1689 FALSE, /* pc_relative */
1690 10, /* bitpos */
1691 complain_overflow_dont, /* complain_on_overflow */
1692 bfd_elf_generic_reloc, /* special_function */
1693 AARCH64_R_STR (TLSLD_LDST64_DTPREL_LO12_NC), /* name */
1694 FALSE, /* partial_inplace */
1695 0x7fc00, /* src_mask */
1696 0x7fc00, /* dst_mask */
1697 FALSE), /* pcrel_offset */
1698
1699 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
1700 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12), /* type */
1701 0, /* rightshift */
1702 2, /* size (0 = byte, 1 = short, 2 = long) */
1703 12, /* bitsize */
1704 FALSE, /* pc_relative */
1705 10, /* bitpos */
1706 complain_overflow_unsigned, /* complain_on_overflow */
1707 bfd_elf_generic_reloc, /* special_function */
1708 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12), /* name */
1709 FALSE, /* partial_inplace */
1710 0x3ffc00, /* src_mask */
1711 0x3ffc00, /* dst_mask */
1712 FALSE), /* pcrel_offset */
1713
1714 /* Same as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check. */
1715 HOWTO64 (AARCH64_R (TLSLD_LDST8_DTPREL_LO12_NC), /* type */
1716 0, /* rightshift */
1717 2, /* size (0 = byte, 1 = short, 2 = long) */
1718 12, /* bitsize */
1719 FALSE, /* pc_relative */
1720 10, /* bitpos */
1721 complain_overflow_dont, /* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 AARCH64_R_STR (TLSLD_LDST8_DTPREL_LO12_NC), /* name */
1724 FALSE, /* partial_inplace */
1725 0x3ffc00, /* src_mask */
1726 0x3ffc00, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
49df5539
JW		 1729 /* MOVZ: bit[15:0] of byte offset to module TLS base address. */
1730 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0), /* type */
1731 0, /* rightshift */
1732 2, /* size (0 = byte, 1 = short, 2 = long) */
1733 16, /* bitsize */
1734 FALSE, /* pc_relative */
1735 0, /* bitpos */
1736 complain_overflow_unsigned, /* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0), /* name */
1739 FALSE, /* partial_inplace */
1740 0xffff, /* src_mask */
1741 0xffff, /* dst_mask */
1742 FALSE), /* pcrel_offset */
1743
1744 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0. */
1745 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC), /* type */
1746 0, /* rightshift */
1747 2, /* size (0 = byte, 1 = short, 2 = long) */
1748 16, /* bitsize */
1749 FALSE, /* pc_relative */
1750 0, /* bitpos */
1751 complain_overflow_dont, /* complain_on_overflow */
1752 bfd_elf_generic_reloc, /* special_function */
1753 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC), /* name */
1754 FALSE, /* partial_inplace */
1755 0xffff, /* src_mask */
1756 0xffff, /* dst_mask */
1757 FALSE), /* pcrel_offset */
1758
1759 /* MOVZ: bit[31:16] of byte offset to module TLS base address. */
1760 HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1), /* type */
1761 16, /* rightshift */
1762 2, /* size (0 = byte, 1 = short, 2 = long) */
1763 16, /* bitsize */
1764 FALSE, /* pc_relative */
1765 0, /* bitpos */
1766 complain_overflow_unsigned, /* complain_on_overflow */
1767 bfd_elf_generic_reloc, /* special_function */
1768 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1), /* name */
1769 FALSE, /* partial_inplace */
1770 0xffff, /* src_mask */
1771 0xffff, /* dst_mask */
1772 FALSE), /* pcrel_offset */
1773
1774 /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1. */
1775 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC), /* type */
1776 16, /* rightshift */
1777 2, /* size (0 = byte, 1 = short, 2 = long) */
1778 16, /* bitsize */
1779 FALSE, /* pc_relative */
1780 0, /* bitpos */
1781 complain_overflow_dont, /* complain_on_overflow */
1782 bfd_elf_generic_reloc, /* special_function */
1783 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC), /* name */
1784 FALSE, /* partial_inplace */
1785 0xffff, /* src_mask */
1786 0xffff, /* dst_mask */
1787 FALSE), /* pcrel_offset */
1788
1789 /* MOVZ: bit[47:32] of byte offset to module TLS base address. */
1790 HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2), /* type */
1791 32, /* rightshift */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1793 16, /* bitsize */
1794 FALSE, /* pc_relative */
1795 0, /* bitpos */
1796 complain_overflow_unsigned, /* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2), /* name */
1799 FALSE, /* partial_inplace */
1800 0xffff, /* src_mask */
1801 0xffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803
a6bb11b2 1804 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2), /* type */
bb3f9ed8 1805 32, /* rightshift */
a06ea964 1806 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1807 16, /* bitsize */
a06ea964
NC		 1808 FALSE, /* pc_relative */
1809 0, /* bitpos */
0172429c 1810 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1811 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1812 AARCH64_R_STR (TLSLE_MOVW_TPREL_G2), /* name */
a06ea964
NC		 1813 FALSE, /* partial_inplace */
1814 0xffff, /* src_mask */
1815 0xffff, /* dst_mask */
1816 FALSE), /* pcrel_offset */
1817
a6bb11b2 1818 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G1), /* type */
bb3f9ed8 1819 16, /* rightshift */
a06ea964 1820 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1821 16, /* bitsize */
a06ea964
NC		 1822 FALSE, /* pc_relative */
1823 0, /* bitpos */
1824 complain_overflow_dont, /* complain_on_overflow */
1825 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1826 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1), /* name */
a06ea964
NC		 1827 FALSE, /* partial_inplace */
1828 0xffff, /* src_mask */
1829 0xffff, /* dst_mask */
1830 FALSE), /* pcrel_offset */
1831
a6bb11b2 1832 HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G1_NC), /* type */
bb3f9ed8 1833 16, /* rightshift */
a06ea964 1834 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1835 16, /* bitsize */
a06ea964
NC		 1836 FALSE, /* pc_relative */
1837 0, /* bitpos */
1838 complain_overflow_dont, /* complain_on_overflow */
1839 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1840 AARCH64_R_STR (TLSLE_MOVW_TPREL_G1_NC), /* name */
a06ea964
NC		 1841 FALSE, /* partial_inplace */
1842 0xffff, /* src_mask */
1843 0xffff, /* dst_mask */
1844 FALSE), /* pcrel_offset */
1845
a6bb11b2 1846 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0), /* type */
a06ea964
NC		 1847 0, /* rightshift */
1848 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1849 16, /* bitsize */
a06ea964
NC		 1850 FALSE, /* pc_relative */
1851 0, /* bitpos */
1852 complain_overflow_dont, /* complain_on_overflow */
1853 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1854 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0), /* name */
a06ea964
NC		 1855 FALSE, /* partial_inplace */
1856 0xffff, /* src_mask */
1857 0xffff, /* dst_mask */
1858 FALSE), /* pcrel_offset */
1859
a6bb11b2 1860 HOWTO (AARCH64_R (TLSLE_MOVW_TPREL_G0_NC), /* type */
a06ea964
NC		 1861 0, /* rightshift */
1862 2, /* size (0 = byte, 1 = short, 2 = long) */
07875fbc 1863 16, /* bitsize */
a06ea964
NC		 1864 FALSE, /* pc_relative */
1865 0, /* bitpos */
1866 complain_overflow_dont, /* complain_on_overflow */
1867 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1868 AARCH64_R_STR (TLSLE_MOVW_TPREL_G0_NC), /* name */
a06ea964
NC		 1869 FALSE, /* partial_inplace */
1870 0xffff, /* src_mask */
1871 0xffff, /* dst_mask */
1872 FALSE), /* pcrel_offset */
1873
a6bb11b2 1874 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_HI12), /* type */
bb3f9ed8 1875 12, /* rightshift */
a06ea964
NC		 1876 2, /* size (0 = byte, 1 = short, 2 = long) */
1877 12, /* bitsize */
1878 FALSE, /* pc_relative */
1879 0, /* bitpos */
bab91cce 1880 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1881 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1882 AARCH64_R_STR (TLSLE_ADD_TPREL_HI12), /* name */
a06ea964
NC		 1883 FALSE, /* partial_inplace */
1884 0xfff, /* src_mask */
1885 0xfff, /* dst_mask */
1886 FALSE), /* pcrel_offset */
1887
a6bb11b2 1888 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12), /* type */
a06ea964
NC		 1889 0, /* rightshift */
1890 2, /* size (0 = byte, 1 = short, 2 = long) */
1891 12, /* bitsize */
1892 FALSE, /* pc_relative */
1893 0, /* bitpos */
36e6c140 1894 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 1895 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1896 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12), /* name */
a06ea964
NC		 1897 FALSE, /* partial_inplace */
1898 0xfff, /* src_mask */
1899 0xfff, /* dst_mask */
1900 FALSE), /* pcrel_offset */
1901
a6bb11b2 1902 HOWTO (AARCH64_R (TLSLE_ADD_TPREL_LO12_NC), /* type */
a06ea964
NC		 1903 0, /* rightshift */
1904 2, /* size (0 = byte, 1 = short, 2 = long) */
1905 12, /* bitsize */
1906 FALSE, /* pc_relative */
1907 0, /* bitpos */
1908 complain_overflow_dont, /* complain_on_overflow */
1909 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 1910 AARCH64_R_STR (TLSLE_ADD_TPREL_LO12_NC), /* name */
a06ea964
NC		 1911 FALSE, /* partial_inplace */
1912 0xfff, /* src_mask */
1913 0xfff, /* dst_mask */
1914 FALSE), /* pcrel_offset */
a06ea964 1915
84f1b9fb
RL		 1916 /* LD/ST16: bit[11:1] of byte offset to module TLS base address. */
1917 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12), /* type */
1918 1, /* rightshift */
1919 2, /* size (0 = byte, 1 = short, 2 = long) */
1920 11, /* bitsize */
1921 FALSE, /* pc_relative */
1922 10, /* bitpos */
1923 complain_overflow_unsigned, /* complain_on_overflow */
1924 bfd_elf_generic_reloc, /* special_function */
1925 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12), /* name */
1926 FALSE, /* partial_inplace */
1927 0x1ffc00, /* src_mask */
1928 0x1ffc00, /* dst_mask */
1929 FALSE), /* pcrel_offset */
1930
1931 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check. */
1932 HOWTO (AARCH64_R (TLSLE_LDST16_TPREL_LO12_NC), /* type */
1933 1, /* rightshift */
1934 2, /* size (0 = byte, 1 = short, 2 = long) */
1935 11, /* bitsize */
1936 FALSE, /* pc_relative */
1937 10, /* bitpos */
1938 complain_overflow_dont, /* complain_on_overflow */
1939 bfd_elf_generic_reloc, /* special_function */
1940 AARCH64_R_STR (TLSLE_LDST16_TPREL_LO12_NC), /* name */
1941 FALSE, /* partial_inplace */
1942 0x1ffc00, /* src_mask */
1943 0x1ffc00, /* dst_mask */
1944 FALSE), /* pcrel_offset */
1945
1946 /* LD/ST32: bit[11:2] of byte offset to module TLS base address. */
1947 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12), /* type */
1948 2, /* rightshift */
1949 2, /* size (0 = byte, 1 = short, 2 = long) */
1950 10, /* bitsize */
1951 FALSE, /* pc_relative */
1952 10, /* bitpos */
1953 complain_overflow_unsigned, /* complain_on_overflow */
1954 bfd_elf_generic_reloc, /* special_function */
1955 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12), /* name */
1956 FALSE, /* partial_inplace */
1957 0xffc00, /* src_mask */
1958 0xffc00, /* dst_mask */
1959 FALSE), /* pcrel_offset */
1960
1961 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check. */
1962 HOWTO (AARCH64_R (TLSLE_LDST32_TPREL_LO12_NC), /* type */
1963 2, /* rightshift */
1964 2, /* size (0 = byte, 1 = short, 2 = long) */
1965 10, /* bitsize */
1966 FALSE, /* pc_relative */
1967 10, /* bitpos */
1968 complain_overflow_dont, /* complain_on_overflow */
1969 bfd_elf_generic_reloc, /* special_function */
1970 AARCH64_R_STR (TLSLE_LDST32_TPREL_LO12_NC), /* name */
1971 FALSE, /* partial_inplace */
1972 0xffc00, /* src_mask */
1973 0xffc00, /* dst_mask */
1974 FALSE), /* pcrel_offset */
1975
1976 /* LD/ST64: bit[11:3] of byte offset to module TLS base address. */
1977 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12), /* type */
1978 3, /* rightshift */
1979 2, /* size (0 = byte, 1 = short, 2 = long) */
1980 9, /* bitsize */
1981 FALSE, /* pc_relative */
1982 10, /* bitpos */
1983 complain_overflow_unsigned, /* complain_on_overflow */
1984 bfd_elf_generic_reloc, /* special_function */
1985 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12), /* name */
1986 FALSE, /* partial_inplace */
1987 0x7fc00, /* src_mask */
1988 0x7fc00, /* dst_mask */
1989 FALSE), /* pcrel_offset */
1990
1991 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check. */
1992 HOWTO (AARCH64_R (TLSLE_LDST64_TPREL_LO12_NC), /* type */
1993 3, /* rightshift */
1994 2, /* size (0 = byte, 1 = short, 2 = long) */
1995 9, /* bitsize */
1996 FALSE, /* pc_relative */
1997 10, /* bitpos */
1998 complain_overflow_dont, /* complain_on_overflow */
1999 bfd_elf_generic_reloc, /* special_function */
2000 AARCH64_R_STR (TLSLE_LDST64_TPREL_LO12_NC), /* name */
2001 FALSE, /* partial_inplace */
2002 0x7fc00, /* src_mask */
2003 0x7fc00, /* dst_mask */
2004 FALSE), /* pcrel_offset */
2005
2006 /* LD/ST8: bit[11:0] of byte offset to module TLS base address. */
2007 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12), /* type */
2008 0, /* rightshift */
2009 2, /* size (0 = byte, 1 = short, 2 = long) */
2010 12, /* bitsize */
2011 FALSE, /* pc_relative */
2012 10, /* bitpos */
2013 complain_overflow_unsigned, /* complain_on_overflow */
2014 bfd_elf_generic_reloc, /* special_function */
2015 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12), /* name */
2016 FALSE, /* partial_inplace */
2017 0x3ffc00, /* src_mask */
2018 0x3ffc00, /* dst_mask */
2019 FALSE), /* pcrel_offset */
2020
2021 /* Same as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check. */
2022 HOWTO (AARCH64_R (TLSLE_LDST8_TPREL_LO12_NC), /* type */
2023 0, /* rightshift */
2024 2, /* size (0 = byte, 1 = short, 2 = long) */
2025 12, /* bitsize */
2026 FALSE, /* pc_relative */
2027 10, /* bitpos */
2028 complain_overflow_dont, /* complain_on_overflow */
2029 bfd_elf_generic_reloc, /* special_function */
2030 AARCH64_R_STR (TLSLE_LDST8_TPREL_LO12_NC), /* name */
2031 FALSE, /* partial_inplace */
2032 0x3ffc00, /* src_mask */
2033 0x3ffc00, /* dst_mask */
2034 FALSE), /* pcrel_offset */
2035
a6bb11b2 2036 HOWTO (AARCH64_R (TLSDESC_LD_PREL19), /* type */
bb3f9ed8 2037 2, /* rightshift */
a06ea964 2038 2, /* size (0 = byte, 1 = short, 2 = long) */
1ada945d 2039 19, /* bitsize */
a06ea964
NC		 2040 TRUE, /* pc_relative */
2041 0, /* bitpos */
2042 complain_overflow_dont, /* complain_on_overflow */
2043 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2044 AARCH64_R_STR (TLSDESC_LD_PREL19), /* name */
a06ea964 2045 FALSE, /* partial_inplace */
1ada945d
MS		 2046 0x0ffffe0, /* src_mask */
2047 0x0ffffe0, /* dst_mask */
a06ea964
NC		 2048 TRUE), /* pcrel_offset */
2049
a6bb11b2 2050 HOWTO (AARCH64_R (TLSDESC_ADR_PREL21), /* type */
a06ea964
NC		 2051 0, /* rightshift */
2052 2, /* size (0 = byte, 1 = short, 2 = long) */
2053 21, /* bitsize */
2054 TRUE, /* pc_relative */
2055 0, /* bitpos */
2056 complain_overflow_dont, /* complain_on_overflow */
2057 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2058 AARCH64_R_STR (TLSDESC_ADR_PREL21), /* name */
a06ea964
NC		 2059 FALSE, /* partial_inplace */
2060 0x1fffff, /* src_mask */
2061 0x1fffff, /* dst_mask */
2062 TRUE), /* pcrel_offset */
2063
2064 /* Get to the page for the GOT entry for the symbol
2065 (G(S) - P) using an ADRP instruction. */
a6bb11b2 2066 HOWTO (AARCH64_R (TLSDESC_ADR_PAGE21), /* type */
a06ea964
NC		 2067 12, /* rightshift */
2068 2, /* size (0 = byte, 1 = short, 2 = long) */
2069 21, /* bitsize */
2070 TRUE, /* pc_relative */
2071 0, /* bitpos */
2072 complain_overflow_dont, /* complain_on_overflow */
2073 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2074 AARCH64_R_STR (TLSDESC_ADR_PAGE21), /* name */
a06ea964
NC		 2075 FALSE, /* partial_inplace */
2076 0x1fffff, /* src_mask */
2077 0x1fffff, /* dst_mask */
2078 TRUE), /* pcrel_offset */
2079
a6bb11b2 2080 /* LD64: GOT offset G(S) & 0xff8. */
f955cccf 2081 HOWTO64 (AARCH64_R (TLSDESC_LD64_LO12), /* type */
a06ea964
NC		 2082 3, /* rightshift */
2083 2, /* size (0 = byte, 1 = short, 2 = long) */
2084 12, /* bitsize */
2085 FALSE, /* pc_relative */
2086 0, /* bitpos */
2087 complain_overflow_dont, /* complain_on_overflow */
2088 bfd_elf_generic_reloc, /* special_function */
f955cccf 2089 AARCH64_R_STR (TLSDESC_LD64_LO12), /* name */
a06ea964 2090 FALSE, /* partial_inplace */
a6bb11b2
YZ		 2091 0xff8, /* src_mask */
2092 0xff8, /* dst_mask */
2093 FALSE), /* pcrel_offset */
2094
2095 /* LD32: GOT offset G(S) & 0xffc. */
2096 HOWTO32 (AARCH64_R (TLSDESC_LD32_LO12_NC), /* type */
2097 2, /* rightshift */
2098 2, /* size (0 = byte, 1 = short, 2 = long) */
2099 12, /* bitsize */
2100 FALSE, /* pc_relative */
2101 0, /* bitpos */
2102 complain_overflow_dont, /* complain_on_overflow */
2103 bfd_elf_generic_reloc, /* special_function */
2104 AARCH64_R_STR (TLSDESC_LD32_LO12_NC), /* name */
2105 FALSE, /* partial_inplace */
2106 0xffc, /* src_mask */
2107 0xffc, /* dst_mask */
a06ea964
NC		 2108 FALSE), /* pcrel_offset */
2109
2110 /* ADD: GOT offset G(S) & 0xfff. */
f955cccf 2111 HOWTO (AARCH64_R (TLSDESC_ADD_LO12), /* type */
a06ea964
NC		 2112 0, /* rightshift */
2113 2, /* size (0 = byte, 1 = short, 2 = long) */
2114 12, /* bitsize */
2115 FALSE, /* pc_relative */
2116 0, /* bitpos */
f955cccf 2117 complain_overflow_dont,/* complain_on_overflow */
a06ea964 2118 bfd_elf_generic_reloc, /* special_function */
f955cccf 2119 AARCH64_R_STR (TLSDESC_ADD_LO12), /* name */
a06ea964
NC		 2120 FALSE, /* partial_inplace */
2121 0xfff, /* src_mask */
2122 0xfff, /* dst_mask */
2123 FALSE), /* pcrel_offset */
2124
a6bb11b2 2125 HOWTO64 (AARCH64_R (TLSDESC_OFF_G1), /* type */
bb3f9ed8 2126 16, /* rightshift */
a06ea964
NC		 2127 2, /* size (0 = byte, 1 = short, 2 = long) */
2128 12, /* bitsize */
2129 FALSE, /* pc_relative */
2130 0, /* bitpos */
43a357f9 2131 complain_overflow_unsigned, /* complain_on_overflow */
a06ea964 2132 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2133 AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
a06ea964
NC		 2134 FALSE, /* partial_inplace */
2135 0xffff, /* src_mask */
2136 0xffff, /* dst_mask */
2137 FALSE), /* pcrel_offset */
2138
a6bb11b2 2139 HOWTO64 (AARCH64_R (TLSDESC_OFF_G0_NC), /* type */
a06ea964
NC		 2140 0, /* rightshift */
2141 2, /* size (0 = byte, 1 = short, 2 = long) */
2142 12, /* bitsize */
2143 FALSE, /* pc_relative */
2144 0, /* bitpos */
2145 complain_overflow_dont, /* complain_on_overflow */
2146 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2147 AARCH64_R_STR (TLSDESC_OFF_G0_NC), /* name */
a06ea964
NC		 2148 FALSE, /* partial_inplace */
2149 0xffff, /* src_mask */
2150 0xffff, /* dst_mask */
2151 FALSE), /* pcrel_offset */
2152
a6bb11b2 2153 HOWTO64 (AARCH64_R (TLSDESC_LDR), /* type */
a06ea964
NC		 2154 0, /* rightshift */
2155 2, /* size (0 = byte, 1 = short, 2 = long) */
2156 12, /* bitsize */
2157 FALSE, /* pc_relative */
2158 0, /* bitpos */
2159 complain_overflow_dont, /* complain_on_overflow */
2160 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2161 AARCH64_R_STR (TLSDESC_LDR), /* name */
a06ea964
NC		 2162 FALSE, /* partial_inplace */
2163 0x0, /* src_mask */
2164 0x0, /* dst_mask */
2165 FALSE), /* pcrel_offset */
2166
a6bb11b2 2167 HOWTO64 (AARCH64_R (TLSDESC_ADD), /* type */
a06ea964
NC		 2168 0, /* rightshift */
2169 2, /* size (0 = byte, 1 = short, 2 = long) */
2170 12, /* bitsize */
2171 FALSE, /* pc_relative */
2172 0, /* bitpos */
2173 complain_overflow_dont, /* complain_on_overflow */
2174 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2175 AARCH64_R_STR (TLSDESC_ADD), /* name */
a06ea964
NC		 2176 FALSE, /* partial_inplace */
2177 0x0, /* src_mask */
2178 0x0, /* dst_mask */
2179 FALSE), /* pcrel_offset */
2180
a6bb11b2 2181 HOWTO (AARCH64_R (TLSDESC_CALL), /* type */
a06ea964
NC		 2182 0, /* rightshift */
2183 2, /* size (0 = byte, 1 = short, 2 = long) */
7366006f 2184 0, /* bitsize */
a06ea964
NC		 2185 FALSE, /* pc_relative */
2186 0, /* bitpos */
2187 complain_overflow_dont, /* complain_on_overflow */
2188 bfd_elf_generic_reloc, /* special_function */
a6bb11b2 2189 AARCH64_R_STR (TLSDESC_CALL), /* name */
a06ea964
NC		 2190 FALSE, /* partial_inplace */
2191 0x0, /* src_mask */
2192 0x0, /* dst_mask */
2193 FALSE), /* pcrel_offset */
a6bb11b2 2194
4ca9b406
SP		 2195 /* Get to the page for the GOT entry for the symbol
2196 (G(S) - P) using an ADRP instruction. */
2197 HOWTO64 (MORELLO_R (TLSDESC_ADR_PAGE20), /* type */
2198 12, /* rightshift */
2199 2, /* size (0 = byte, 1 = short, 2 = long) */
2200 20, /* bitsize */
2201 TRUE, /* pc_relative */
2202 0, /* bitpos */
2203 complain_overflow_dont, /* complain_on_overflow */
2204 bfd_elf_generic_reloc, /* special_function */
2205 MORELLO_R_STR (TLSDESC_ADR_PAGE20), /* name */
2206 FALSE, /* partial_inplace */
2207 0xfffff, /* src_mask */
2208 0xfffff, /* dst_mask */
2209 TRUE), /* pcrel_offset */
2210
2211 /* LD128: GOT offset G(S) & 0xff0. */
2212 HOWTO64 (MORELLO_R (TLSDESC_LD128_LO12), /* type */
2213 4, /* rightshift */
2214 2, /* size (0 = byte, 1 = short, 2 = long) */
2215 12, /* bitsize */
2216 FALSE, /* pc_relative */
2217 0, /* bitpos */
2218 complain_overflow_dont, /* complain_on_overflow */
2219 bfd_elf_generic_reloc, /* special_function */
2220 MORELLO_R_STR (TLSDESC_LD128_LO12), /* name */
2221 FALSE, /* partial_inplace */
2222 0xff0, /* src_mask */
2223 0xff0, /* dst_mask */
2224 FALSE), /* pcrel_offset */
2225
2226 HOWTO64 (MORELLO_R (TLSDESC_CALL), /* type */
2227 0, /* rightshift */
2228 2, /* size (0 = byte, 1 = short, 2 = long) */
2229 0, /* bitsize */
2230 FALSE, /* pc_relative */
2231 0, /* bitpos */
2232 complain_overflow_dont, /* complain_on_overflow */
2233 bfd_elf_generic_reloc, /* special_function */
2234 MORELLO_R_STR (TLSDESC_CALL), /* name */
2235 FALSE, /* partial_inplace */
2236 0x0, /* src_mask */
2237 0x0, /* dst_mask */
2238 FALSE), /* pcrel_offset */
2239
a6bb11b2
YZ		 2240 HOWTO (AARCH64_R (COPY), /* type */
2241 0, /* rightshift */
2242 2, /* size (0 = byte, 1 = short, 2 = long) */
2243 64, /* bitsize */
2244 FALSE, /* pc_relative */
2245 0, /* bitpos */
2246 complain_overflow_bitfield, /* complain_on_overflow */
2247 bfd_elf_generic_reloc, /* special_function */
2248 AARCH64_R_STR (COPY), /* name */
2249 TRUE, /* partial_inplace */
2250 0xffffffff, /* src_mask */
2251 0xffffffff, /* dst_mask */
2252 FALSE), /* pcrel_offset */
2253
2254 HOWTO (AARCH64_R (GLOB_DAT), /* type */
2255 0, /* rightshift */
2256 2, /* size (0 = byte, 1 = short, 2 = long) */
2257 64, /* bitsize */
2258 FALSE, /* pc_relative */
2259 0, /* bitpos */
2260 complain_overflow_bitfield, /* complain_on_overflow */
2261 bfd_elf_generic_reloc, /* special_function */
2262 AARCH64_R_STR (GLOB_DAT), /* name */
2263 TRUE, /* partial_inplace */
2264 0xffffffff, /* src_mask */
2265 0xffffffff, /* dst_mask */
2266 FALSE), /* pcrel_offset */
2267
2268 HOWTO (AARCH64_R (JUMP_SLOT), /* type */
2269 0, /* rightshift */
2270 2, /* size (0 = byte, 1 = short, 2 = long) */
2271 64, /* bitsize */
2272 FALSE, /* pc_relative */
2273 0, /* bitpos */
2274 complain_overflow_bitfield, /* complain_on_overflow */
2275 bfd_elf_generic_reloc, /* special_function */
2276 AARCH64_R_STR (JUMP_SLOT), /* name */
2277 TRUE, /* partial_inplace */
2278 0xffffffff, /* src_mask */
2279 0xffffffff, /* dst_mask */
2280 FALSE), /* pcrel_offset */
2281
2282 HOWTO (AARCH64_R (RELATIVE), /* type */
2283 0, /* rightshift */
2284 2, /* size (0 = byte, 1 = short, 2 = long) */
2285 64, /* bitsize */
2286 FALSE, /* pc_relative */
2287 0, /* bitpos */
2288 complain_overflow_bitfield, /* complain_on_overflow */
2289 bfd_elf_generic_reloc, /* special_function */
2290 AARCH64_R_STR (RELATIVE), /* name */
2291 TRUE, /* partial_inplace */
2292 ALL_ONES, /* src_mask */
2293 ALL_ONES, /* dst_mask */
2294 FALSE), /* pcrel_offset */
2295
2296 HOWTO (AARCH64_R (TLS_DTPMOD), /* type */
2297 0, /* rightshift */
2298 2, /* size (0 = byte, 1 = short, 2 = long) */
2299 64, /* bitsize */
2300 FALSE, /* pc_relative */
2301 0, /* bitpos */
2302 complain_overflow_dont, /* complain_on_overflow */
2303 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ		 2304#if ARCH_SIZE == 64
2305 AARCH64_R_STR (TLS_DTPMOD64), /* name */
2306#else
a6bb11b2 2307 AARCH64_R_STR (TLS_DTPMOD), /* name */
da0781dc 2308#endif
a6bb11b2
YZ		 2309 FALSE, /* partial_inplace */
2310 0, /* src_mask */
2311 ALL_ONES, /* dst_mask */
2312 FALSE), /* pc_reloffset */
2313
2314 HOWTO (AARCH64_R (TLS_DTPREL), /* type */
2315 0, /* rightshift */
2316 2, /* size (0 = byte, 1 = short, 2 = long) */
2317 64, /* bitsize */
2318 FALSE, /* pc_relative */
2319 0, /* bitpos */
2320 complain_overflow_dont, /* complain_on_overflow */
2321 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ		 2322#if ARCH_SIZE == 64
2323 AARCH64_R_STR (TLS_DTPREL64), /* name */
2324#else
a6bb11b2 2325 AARCH64_R_STR (TLS_DTPREL), /* name */
da0781dc 2326#endif
a6bb11b2
YZ		 2327 FALSE, /* partial_inplace */
2328 0, /* src_mask */
2329 ALL_ONES, /* dst_mask */
2330 FALSE), /* pcrel_offset */
2331
2332 HOWTO (AARCH64_R (TLS_TPREL), /* type */
2333 0, /* rightshift */
2334 2, /* size (0 = byte, 1 = short, 2 = long) */
2335 64, /* bitsize */
2336 FALSE, /* pc_relative */
2337 0, /* bitpos */
2338 complain_overflow_dont, /* complain_on_overflow */
2339 bfd_elf_generic_reloc, /* special_function */
da0781dc
YZ		 2340#if ARCH_SIZE == 64
2341 AARCH64_R_STR (TLS_TPREL64), /* name */
2342#else
a6bb11b2 2343 AARCH64_R_STR (TLS_TPREL), /* name */
da0781dc 2344#endif
a6bb11b2
YZ		 2345 FALSE, /* partial_inplace */
2346 0, /* src_mask */
2347 ALL_ONES, /* dst_mask */
2348 FALSE), /* pcrel_offset */
2349
2350 HOWTO (AARCH64_R (TLSDESC), /* type */
2351 0, /* rightshift */
2352 2, /* size (0 = byte, 1 = short, 2 = long) */
2353 64, /* bitsize */
2354 FALSE, /* pc_relative */
2355 0, /* bitpos */
2356 complain_overflow_dont, /* complain_on_overflow */
2357 bfd_elf_generic_reloc, /* special_function */
2358 AARCH64_R_STR (TLSDESC), /* name */
2359 FALSE, /* partial_inplace */
2360 0, /* src_mask */
2361 ALL_ONES, /* dst_mask */
2362 FALSE), /* pcrel_offset */
2363
2364 HOWTO (AARCH64_R (IRELATIVE), /* type */
2365 0, /* rightshift */
2366 2, /* size (0 = byte, 1 = short, 2 = long) */
2367 64, /* bitsize */
2368 FALSE, /* pc_relative */
2369 0, /* bitpos */
2370 complain_overflow_bitfield, /* complain_on_overflow */
2371 bfd_elf_generic_reloc, /* special_function */
2372 AARCH64_R_STR (IRELATIVE), /* name */
2373 FALSE, /* partial_inplace */
2374 0, /* src_mask */
2375 ALL_ONES, /* dst_mask */
2376 FALSE), /* pcrel_offset */
2377
40bbb79e
SP		 2378 HOWTO64 (MORELLO_R (CAPINIT), /* type */
2379 0, /* rightshift */
2380 4, /* size (0 = byte, 1 = short, 2 = long) */
2381 0, /* bitsize */
2382 FALSE, /* pc_relative */
2383 0, /* bitpos */
2384 complain_overflow_dont, /* complain_on_overflow */
2385 bfd_elf_generic_reloc, /* special_function */
2386 MORELLO_R_STR (CAPINIT), /* name */
2387 FALSE, /* partial_inplace */
2388 ALL_ONES, /* src_mask */
2389 ALL_ONES, /* dst_mask */
2390 FALSE), /* pcrel_offset */
2391
a1bdea65
SP		 2392 HOWTO64 (MORELLO_R (GLOB_DAT),/* type */
2393 0, /* rightshift */
2394 2, /* size (0 = byte, 1 = short, 2 = long) */
2395 64, /* bitsize */
2396 FALSE, /* pc_relative */
2397 0, /* bitpos */
2398 complain_overflow_bitfield, /* complain_on_overflow */
2399 bfd_elf_generic_reloc, /* special_function */
2400 MORELLO_R_STR (GLOB_DAT), /* name */
2401 TRUE, /* partial_inplace */
2402 0xffffffff, /* src_mask */
2403 0xffffffff, /* dst_mask */
2404 FALSE), /* pcrel_offset */
2405
e19e9199
SP		 2406 HOWTO64 (MORELLO_R (JUMP_SLOT), /* type */
2407 0, /* rightshift */
2408 2, /* size (0 = byte, 1 = short, 2 = long) */
2409 64, /* bitsize */
2410 FALSE, /* pc_relative */
2411 0, /* bitpos */
2412 complain_overflow_bitfield, /* complain_on_overflow */
2413 bfd_elf_generic_reloc, /* special_function */
2414 MORELLO_R_STR (JUMP_SLOT), /* name */
2415 TRUE, /* partial_inplace */
2416 0xffffffff, /* src_mask */
2417 0xffffffff, /* dst_mask */
2418 FALSE), /* pcrel_offset */
2419
2420 HOWTO64 (MORELLO_R (RELATIVE), /* type */
40bbb79e
SP		 2421 0, /* rightshift */
2422 2, /* size (0 = byte, 1 = short, 2 = long) */
2423 64, /* bitsize */
2424 FALSE, /* pc_relative */
2425 0, /* bitpos */
2426 complain_overflow_bitfield, /* complain_on_overflow */
2427 bfd_elf_generic_reloc, /* special_function */
2428 MORELLO_R_STR (RELATIVE), /* name */
2429 TRUE, /* partial_inplace */
2430 ALL_ONES, /* src_mask */
2431 ALL_ONES, /* dst_mask */
2432 FALSE), /* pcrel_offset */
2433
e19e9199
SP		 2434 HOWTO64 (MORELLO_R (IRELATIVE), /* type */
2435 0, /* rightshift */
2436 2, /* size (0 = byte, 1 = short, 2 = long) */
2437 64, /* bitsize */
2438 FALSE, /* pc_relative */
2439 0, /* bitpos */
2440 complain_overflow_bitfield, /* complain_on_overflow */
2441 bfd_elf_generic_reloc, /* special_function */
2442 MORELLO_R_STR (IRELATIVE), /* name */
2443 FALSE, /* partial_inplace */
2444 0, /* src_mask */
2445 ALL_ONES, /* dst_mask */
2446 FALSE), /* pcrel_offset */
2447
4ca9b406
SP		 2448 HOWTO64 (MORELLO_R (TLSDESC), /* type */
2449 0, /* rightshift */
2450 2, /* size (0 = byte, 1 = short, 2 = long) */
2451 64, /* bitsize */
2452 FALSE, /* pc_relative */
2453 0, /* bitpos */
2454 complain_overflow_dont, /* complain_on_overflow */
2455 bfd_elf_generic_reloc, /* special_function */
2456 MORELLO_R_STR (TLSDESC), /* name */
2457 FALSE, /* partial_inplace */
2458 0, /* src_mask */
2459 ALL_ONES, /* dst_mask */
2460 FALSE), /* pcrel_offset */
2461
a6bb11b2 2462 EMPTY_HOWTO (0),
a06ea964
NC		 2463};
2464
a6bb11b2
YZ		 2465static reloc_howto_type elfNN_aarch64_howto_none =
2466 HOWTO (R_AARCH64_NONE, /* type */
2467 0, /* rightshift */
6346d5ca 2468 3, /* size (0 = byte, 1 = short, 2 = long) */
a6bb11b2
YZ		 2469 0, /* bitsize */
2470 FALSE, /* pc_relative */
2471 0, /* bitpos */
2472 complain_overflow_dont,/* complain_on_overflow */
2473 bfd_elf_generic_reloc, /* special_function */
2474 "R_AARCH64_NONE", /* name */
2475 FALSE, /* partial_inplace */
2476 0, /* src_mask */
2477 0, /* dst_mask */
2478 FALSE); /* pcrel_offset */
2479
2480/* Given HOWTO, return the bfd internal relocation enumerator. */
2481
2482static bfd_reloc_code_real_type
2483elfNN_aarch64_bfd_reloc_from_howto (reloc_howto_type *howto)
2484{
2485 const int size
2486 = (int) ARRAY_SIZE (elfNN_aarch64_howto_table);
2487 const ptrdiff_t offset
2488 = howto - elfNN_aarch64_howto_table;
2489
2490 if (offset > 0 && offset < size - 1)
2491 return BFD_RELOC_AARCH64_RELOC_START + offset;
2492
2493 if (howto == &elfNN_aarch64_howto_none)
2494 return BFD_RELOC_AARCH64_NONE;
2495
2496 return BFD_RELOC_AARCH64_RELOC_START;
2497}
2498
2499/* Given R_TYPE, return the bfd internal relocation enumerator. */
2500
2501static bfd_reloc_code_real_type
0aa13fee 2502elfNN_aarch64_bfd_reloc_from_type (bfd *abfd, unsigned int r_type)
a6bb11b2
YZ		 2503{
2504 static bfd_boolean initialized_p = FALSE;
2505 /* Indexed by R_TYPE, values are offsets in the howto_table. */
2506 static unsigned int offsets[R_AARCH64_end];
2507
535b785f 2508 if (!initialized_p)
a6bb11b2
YZ		 2509 {
2510 unsigned int i;
2511
2512 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2513 if (elfNN_aarch64_howto_table[i].type != 0)
2514 offsets[elfNN_aarch64_howto_table[i].type] = i;
2515
2516 initialized_p = TRUE;
2517 }
2518
2519 if (r_type == R_AARCH64_NONE || r_type == R_AARCH64_NULL)
2520 return BFD_RELOC_AARCH64_NONE;
2521
5860e3f8
NC		 2522 /* PR 17512: file: b371e70a. */
2523 if (r_type >= R_AARCH64_end)
2524 {
0aa13fee
AM		 2525 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2526 abfd, r_type);
5860e3f8
NC		 2527 bfd_set_error (bfd_error_bad_value);
2528 return BFD_RELOC_AARCH64_NONE;
2529 }
2530
a6bb11b2
YZ		 2531 return BFD_RELOC_AARCH64_RELOC_START + offsets[r_type];
2532}
2533
2534struct elf_aarch64_reloc_map
2535{
2536 bfd_reloc_code_real_type from;
2537 bfd_reloc_code_real_type to;
2538};
2539
2540/* Map bfd generic reloc to AArch64-specific reloc. */
2541static const struct elf_aarch64_reloc_map elf_aarch64_reloc_map[] =
2542{
2543 {BFD_RELOC_NONE, BFD_RELOC_AARCH64_NONE},
2544
2545 /* Basic data relocations. */
2546 {BFD_RELOC_CTOR, BFD_RELOC_AARCH64_NN},
2547 {BFD_RELOC_64, BFD_RELOC_AARCH64_64},
2548 {BFD_RELOC_32, BFD_RELOC_AARCH64_32},
2549 {BFD_RELOC_16, BFD_RELOC_AARCH64_16},
2550 {BFD_RELOC_64_PCREL, BFD_RELOC_AARCH64_64_PCREL},
2551 {BFD_RELOC_32_PCREL, BFD_RELOC_AARCH64_32_PCREL},
2552 {BFD_RELOC_16_PCREL, BFD_RELOC_AARCH64_16_PCREL},
2553};
2554
2555/* Given the bfd internal relocation enumerator in CODE, return the
2556 corresponding howto entry. */
2557
2558static reloc_howto_type *
2559elfNN_aarch64_howto_from_bfd_reloc (bfd_reloc_code_real_type code)
2560{
2561 unsigned int i;
2562
2563 /* Convert bfd generic reloc to AArch64-specific reloc. */
2564 if (code < BFD_RELOC_AARCH64_RELOC_START
2565 || code > BFD_RELOC_AARCH64_RELOC_END)
2566 for (i = 0; i < ARRAY_SIZE (elf_aarch64_reloc_map); i++)
2567 if (elf_aarch64_reloc_map[i].from == code)
2568 {
2569 code = elf_aarch64_reloc_map[i].to;
2570 break;
2571 }
2572
2573 if (code > BFD_RELOC_AARCH64_RELOC_START
2574 && code < BFD_RELOC_AARCH64_RELOC_END)
2575 if (elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START].type)
2576 return &elfNN_aarch64_howto_table[code - BFD_RELOC_AARCH64_RELOC_START];
2577
54757ed1
AP		 2578 if (code == BFD_RELOC_AARCH64_NONE)
2579 return &elfNN_aarch64_howto_none;
2580
a6bb11b2
YZ		 2581 return NULL;
2582}
2583
a06ea964 2584static reloc_howto_type *
0aa13fee 2585elfNN_aarch64_howto_from_type (bfd *abfd, unsigned int r_type)
a06ea964 2586{
a6bb11b2
YZ		 2587 bfd_reloc_code_real_type val;
2588 reloc_howto_type *howto;
2589
cec5225b
YZ		 2590#if ARCH_SIZE == 32
2591 if (r_type > 256)
2592 {
2593 bfd_set_error (bfd_error_bad_value);
2594 return NULL;
2595 }
2596#endif
2597
a6bb11b2
YZ		 2598 if (r_type == R_AARCH64_NONE)
2599 return &elfNN_aarch64_howto_none;
a06ea964 2600
0aa13fee 2601 val = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a6bb11b2 2602 howto = elfNN_aarch64_howto_from_bfd_reloc (val);
a06ea964 2603
a6bb11b2
YZ		 2604 if (howto != NULL)
2605 return howto;
a06ea964 2606
a06ea964
NC		 2607 bfd_set_error (bfd_error_bad_value);
2608 return NULL;
2609}
2610
f3185997 2611static bfd_boolean
0aa13fee 2612elfNN_aarch64_info_to_howto (bfd *abfd, arelent *bfd_reloc,
a06ea964
NC		 2613 Elf_Internal_Rela *elf_reloc)
2614{
2615 unsigned int r_type;
2616
cec5225b 2617 r_type = ELFNN_R_TYPE (elf_reloc->r_info);
0aa13fee 2618 bfd_reloc->howto = elfNN_aarch64_howto_from_type (abfd, r_type);
f3185997
NC		 2619
2620 if (bfd_reloc->howto == NULL)
2621 {
2622 /* xgettext:c-format */
2623 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2624 return FALSE;
2625 }
2626 return TRUE;
a06ea964
NC		 2627}
2628
a06ea964 2629static reloc_howto_type *
cec5225b 2630elfNN_aarch64_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC		 2631 bfd_reloc_code_real_type code)
2632{
a6bb11b2 2633 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (code);
a06ea964 2634
a6bb11b2
YZ		 2635 if (howto != NULL)
2636 return howto;
a06ea964
NC		 2637
2638 bfd_set_error (bfd_error_bad_value);
2639 return NULL;
2640}
2641
2642static reloc_howto_type *
cec5225b 2643elfNN_aarch64_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC		 2644 const char *r_name)
2645{
2646 unsigned int i;
2647
a6bb11b2
YZ		 2648 for (i = 1; i < ARRAY_SIZE (elfNN_aarch64_howto_table) - 1; ++i)
2649 if (elfNN_aarch64_howto_table[i].name != NULL
2650 && strcasecmp (elfNN_aarch64_howto_table[i].name, r_name) == 0)
2651 return &elfNN_aarch64_howto_table[i];
a06ea964
NC		 2652
2653 return NULL;
2654}
2655
07d6d2b8
AM		 2656#define TARGET_LITTLE_SYM aarch64_elfNN_le_vec
2657#define TARGET_LITTLE_NAME "elfNN-littleaarch64"
2658#define TARGET_BIG_SYM aarch64_elfNN_be_vec
2659#define TARGET_BIG_NAME "elfNN-bigaarch64"
a06ea964 2660
a06ea964
NC		 2661/* The linker script knows the section names for placement.
2662 The entry_names are used to do simple name mangling on the stubs.
2663 Given a function name, and its type, the stub can be found. The
2664 name can be changed. The only requirement is the %s be present. */
50e192f0 2665#define STUB_ENTRY_NAME "__%s%s_veneer"
a06ea964
NC		 2666
2667/* The name of the dynamic interpreter. This is put in the .interp
2668 section. */
2669#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so.1"
2670
2671#define AARCH64_MAX_FWD_BRANCH_OFFSET \
2672 (((1 << 25) - 1) << 2)
2673#define AARCH64_MAX_BWD_BRANCH_OFFSET \
2674 (-((1 << 25) << 2))
2675
2676#define AARCH64_MAX_ADRP_IMM ((1 << 20) - 1)
2677#define AARCH64_MIN_ADRP_IMM (-(1 << 20))
2678
50e192f0
SP		 2679#define C64_MAX_ADRP_IMM ((1 << 19) - 1)
2680#define C64_MIN_ADRP_IMM (-(1 << 19))
2681
2682static bfd_boolean
2683aarch64_branch_reloc_p (unsigned int r_type)
2684{
2685 switch (r_type)
2686 {
2687 case MORELLO_R (JUMP26):
2688 case MORELLO_R (CALL26):
2689 case AARCH64_R (JUMP26):
2690 case AARCH64_R (CALL26):
2691 return TRUE;
2692
2693 default: break;
2694 }
2695
2696 return FALSE;
2697}
2698
a06ea964
NC		 2699static int
2700aarch64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2701{
2702 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2703 return offset <= AARCH64_MAX_ADRP_IMM && offset >= AARCH64_MIN_ADRP_IMM;
2704}
2705
50e192f0
SP		 2706static bfd_boolean
2707c64_valid_for_adrp_p (bfd_vma value, bfd_vma place)
2708{
2709 bfd_signed_vma offset = (bfd_signed_vma) (PG (value) - PG (place)) >> 12;
2710 return offset <= C64_MAX_ADRP_IMM && offset >= C64_MIN_ADRP_IMM;
2711}
2712
a06ea964
NC		 2713static int
2714aarch64_valid_branch_p (bfd_vma value, bfd_vma place)
2715{
2716 bfd_signed_vma offset = (bfd_signed_vma) (value - place);
2717 return (offset <= AARCH64_MAX_FWD_BRANCH_OFFSET
2718 && offset >= AARCH64_MAX_BWD_BRANCH_OFFSET);
2719}
2720
2721static const uint32_t aarch64_adrp_branch_stub [] =
2722{
2723 0x90000010, /* adrp ip0, X */
2724 /* R_AARCH64_ADR_HI21_PCREL(X) */
2725 0x91000210, /* add ip0, ip0, :lo12:X */
2726 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2727 0xd61f0200, /* br ip0 */
2728};
2729
2730static const uint32_t aarch64_long_branch_stub[] =
2731{
cec5225b 2732#if ARCH_SIZE == 64
a06ea964 2733 0x58000090, /* ldr ip0, 1f */
cec5225b
YZ		 2734#else
2735 0x18000090, /* ldr wip0, 1f */
2736#endif
a06ea964
NC		 2737 0x10000011, /* adr ip1, #0 */
2738 0x8b110210, /* add ip0, ip0, ip1 */
2739 0xd61f0200, /* br ip0 */
cec5225b
YZ		 2740 0x00000000, /* 1: .xword or .word
2741 R_AARCH64_PRELNN(X) + 12
a06ea964
NC		 2742 */
2743 0x00000000,
2744};
2745
68fcca92
JW		 2746static const uint32_t aarch64_erratum_835769_stub[] =
2747{
2748 0x00000000, /* Placeholder for multiply accumulate. */
2749 0x14000000, /* b <label> */
2750};
2751
4106101c
MS		 2752static const uint32_t aarch64_erratum_843419_stub[] =
2753{
2754 0x00000000, /* Placeholder for LDR instruction. */
2755 0x14000000, /* b <label> */
2756};
2757
50e192f0
SP		 2758static const uint32_t aarch64_c64_branch_stub [] =
2759{
2760 0xc2c273e0, /* bx #4 */
2761 0x90800010, /* adrp c16, X */
2762 /* R_MORELLO_ADR_HI20_PCREL(X) */
2763 0x02000210, /* add c16, c16, :lo12:X */
2764 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2765 0xc2c21200, /* br c16 */
2766};
2767
2768static const uint32_t c64_aarch64_branch_stub [] =
2769{
2770 0x90800010, /* adrp c16, X */
2771 /* R_MORELLO_ADR_HI20_PCREL(X) */
2772 0x02000210, /* add c16, c16, :lo12:X */
2773 /* R_AARCH64_ADD_ABS_LO12_NC(X) */
2774 0xc2c21200, /* br c16 */
2775};
2776
a06ea964
NC		 2777/* Section name for stubs is the associated section name plus this
2778 string. */
2779#define STUB_SUFFIX ".stub"
2780
cec5225b 2781enum elf_aarch64_stub_type
a06ea964
NC		 2782{
2783 aarch64_stub_none,
2784 aarch64_stub_adrp_branch,
2785 aarch64_stub_long_branch,
68fcca92 2786 aarch64_stub_erratum_835769_veneer,
4106101c 2787 aarch64_stub_erratum_843419_veneer,
50e192f0
SP		 2788 aarch64_stub_branch_c64,
2789 c64_stub_branch_aarch64,
2790 c64_stub_branch_c64,
a06ea964
NC		 2791};
2792
cec5225b 2793struct elf_aarch64_stub_hash_entry
a06ea964
NC		 2794{
2795 /* Base hash table entry structure. */
2796 struct bfd_hash_entry root;
2797
2798 /* The stub section. */
2799 asection *stub_sec;
2800
2801 /* Offset within stub_sec of the beginning of this stub. */
2802 bfd_vma stub_offset;
2803
2804 /* Given the symbol's value and its section we can determine its final
2805 value when building the stubs (so the stub knows where to jump). */
2806 bfd_vma target_value;
2807 asection *target_section;
2808
cec5225b 2809 enum elf_aarch64_stub_type stub_type;
a06ea964
NC		 2810
2811 /* The symbol table entry, if any, that this was derived from. */
cec5225b 2812 struct elf_aarch64_link_hash_entry *h;
a06ea964
NC		 2813
2814 /* Destination symbol type */
2815 unsigned char st_type;
2816
2817 /* Where this stub is being called from, or, in the case of combined
2818 stub sections, the first input section in the group. */
2819 asection *id_sec;
2820
2821 /* The name for the local symbol at the start of this stub. The
2822 stub name in the hash table has to be unique; this does not, so
2823 it can be friendlier. */
2824 char *output_name;
68fcca92
JW		 2825
2826 /* The instruction which caused this stub to be generated (only valid for
2827 erratum 835769 workaround stubs at present). */
2828 uint32_t veneered_insn;
4106101c
MS		 2829
2830 /* In an erratum 843419 workaround stub, the ADRP instruction offset. */
2831 bfd_vma adrp_offset;
a06ea964
NC		 2832};
2833
2834/* Used to build a map of a section. This is required for mixed-endian
2835 code/data. */
2836
cec5225b 2837typedef struct elf_elf_section_map
a06ea964
NC		 2838{
2839 bfd_vma vma;
2840 char type;
2841}
cec5225b 2842elf_aarch64_section_map;
a06ea964
NC		 2843
2844
2845typedef struct _aarch64_elf_section_data
2846{
2847 struct bfd_elf_section_data elf;
2848 unsigned int mapcount;
2849 unsigned int mapsize;
cec5225b 2850 elf_aarch64_section_map *map;
f0070c1e 2851 bfd_boolean sorted;
a06ea964
NC		 2852}
2853_aarch64_elf_section_data;
2854
cec5225b 2855#define elf_aarch64_section_data(sec) \
a06ea964
NC		 2856 ((_aarch64_elf_section_data *) elf_section_data (sec))
2857
f0070c1e
SP		 2858/* Used to order a list of mapping symbols by address. */
2859
2860static int
2861elf_aarch64_compare_mapping (const void *a, const void *b)
2862{
2863 const elf_aarch64_section_map *amap = (const elf_aarch64_section_map *) a;
2864 const elf_aarch64_section_map *bmap = (const elf_aarch64_section_map *) b;
2865
2866 if (amap->vma > bmap->vma)
2867 return 1;
2868 else if (amap->vma < bmap->vma)
2869 return -1;
2870 else if (amap->type > bmap->type)
2871 /* Ensure results do not depend on the host qsort for objects with
2872 multiple mapping symbols at the same address by sorting on type
2873 after vma. */
2874 return 1;
2875 else if (amap->type < bmap->type)
2876 return -1;
2877 else
2878 return 0;
2879}
2880
2881static _aarch64_elf_section_data *
2882elf_aarch64_section_data_get (asection *sec)
2883{
2884 _aarch64_elf_section_data *sec_data = elf_aarch64_section_data(sec);
2885
2886 /* A section that does not have aarch64 section data, so it does not have any
2887 map information. Assume A64. */
2888 if (sec_data == NULL || !sec_data->elf.is_target_section_data)
2889 return NULL;
2890
2891 if (sec_data->sorted)
2892 goto done;
2893
2894 qsort (sec_data->map, sec_data->mapcount, sizeof (elf_aarch64_section_map),
2895 elf_aarch64_compare_mapping);
2896
2897 sec_data->sorted = TRUE;
2898
2899done:
2900 return sec_data;
2901}
2902
2903/* Returns TRUE if the label with st_value as VALUE is within a C64 code
2904 section or not. */
2905
2906static bfd_boolean
2907c64_value_p (asection *section, unsigned int value)
2908{
2909 struct _aarch64_elf_section_data *sec_data =
2910 elf_aarch64_section_data_get (section);
2911
2912 if (sec_data == NULL)
2913 return FALSE;
2914
2915 unsigned int span;
2916
2917 for (span = 0; span < sec_data->mapcount; span++)
2918 {
2919 unsigned int span_start = sec_data->map[span].vma;
2920 unsigned int span_end = ((span == sec_data->mapcount - 1)
2921 ? sec_data->map[0].vma + section->size
2922 : sec_data->map[span + 1].vma);
2923 char span_type = sec_data->map[span].type;
2924
2925 if (span_start <= value && value < span_end && span_type == 'c')
2926 return TRUE;
2927 }
2928 return FALSE;
2929}
2930
4e8516b2
AP		 2931/* The size of the thread control block which is defined to be two pointers. */
2932#define TCB_SIZE (ARCH_SIZE/8)*2
a06ea964
NC		 2933
2934struct elf_aarch64_local_symbol
2935{
2936 unsigned int got_type;
2937 bfd_signed_vma got_refcount;
2938 bfd_vma got_offset;
2939
2940 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The
2941 offset is from the end of the jump table and reserved entries
2942 within the PLTGOT.
2943
2944 The magic value (bfd_vma) -1 indicates that an offset has not be
2945 allocated. */
2946 bfd_vma tlsdesc_got_jump_table_offset;
2947};
2948
2949struct elf_aarch64_obj_tdata
2950{
2951 struct elf_obj_tdata root;
2952
2953 /* local symbol descriptors */
2954 struct elf_aarch64_local_symbol *locals;
2955
2956 /* Zero to warn when linking objects with incompatible enum sizes. */
2957 int no_enum_size_warning;
2958
2959 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2960 int no_wchar_size_warning;
cd702818
SD		 2961
2962 /* All GNU_PROPERTY_AARCH64_FEATURE_1_AND properties. */
2963 uint32_t gnu_and_prop;
37c18eed
SD		 2964
2965 /* Zero to warn when linking objects with incompatible
2966 GNU_PROPERTY_AARCH64_FEATURE_1_BTI. */
2967 int no_bti_warn;
2968
2969 /* PLT type based on security. */
2970 aarch64_plt_type plt_type;
f0070c1e
SP		 2971
2972 /* Flag to check if section maps have been initialised for all sections in
2973 this object. */
2974 bfd_boolean secmaps_initialised;
a06ea964
NC		 2975};
2976
2977#define elf_aarch64_tdata(bfd) \
2978 ((struct elf_aarch64_obj_tdata *) (bfd)->tdata.any)
2979
cec5225b 2980#define elf_aarch64_locals(bfd) (elf_aarch64_tdata (bfd)->locals)
a06ea964
NC		 2981
2982#define is_aarch64_elf(bfd) \
2983 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2984 && elf_tdata (bfd) != NULL \
2985 && elf_object_id (bfd) == AARCH64_ELF_DATA)
2986
2987static bfd_boolean
cec5225b 2988elfNN_aarch64_mkobject (bfd *abfd)
a06ea964
NC		 2989{
2990 return bfd_elf_allocate_object (abfd, sizeof (struct elf_aarch64_obj_tdata),
2991 AARCH64_ELF_DATA);
2992}
2993
cec5225b
YZ		 2994#define elf_aarch64_hash_entry(ent) \
2995 ((struct elf_aarch64_link_hash_entry *)(ent))
a06ea964
NC		 2996
2997#define GOT_UNKNOWN 0
2998#define GOT_NORMAL 1
2999#define GOT_TLS_GD 2
3000#define GOT_TLS_IE 4
3001#define GOT_TLSDESC_GD 8
a1bdea65 3002#define GOT_CAP 16
a06ea964
NC		 3003
3004#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLSDESC_GD))
3005
3006/* AArch64 ELF linker hash entry. */
cec5225b 3007struct elf_aarch64_link_hash_entry
a06ea964
NC		 3008{
3009 struct elf_link_hash_entry root;
3010
a06ea964
NC		 3011 /* Since PLT entries have variable size, we need to record the
3012 index into .got.plt instead of recomputing it from the PLT
3013 offset. */
3014 bfd_signed_vma plt_got_offset;
3015
3016 /* Bit mask representing the type of GOT entry(s) if any required by
3017 this symbol. */
3018 unsigned int got_type;
3019
3020 /* A pointer to the most recently used stub hash entry against this
3021 symbol. */
cec5225b 3022 struct elf_aarch64_stub_hash_entry *stub_cache;
a06ea964
NC		 3023
3024 /* Offset of the GOTPLT entry reserved for the TLS descriptor. The offset
3025 is from the end of the jump table and reserved entries within the PLTGOT.
3026
3027 The magic value (bfd_vma) -1 indicates that an offset has not
3028 be allocated. */
3029 bfd_vma tlsdesc_got_jump_table_offset;
3030};
3031
3032static unsigned int
cec5225b 3033elfNN_aarch64_symbol_got_type (struct elf_link_hash_entry *h,
a06ea964
NC		 3034 bfd *abfd,
3035 unsigned long r_symndx)
3036{
3037 if (h)
cec5225b 3038 return elf_aarch64_hash_entry (h)->got_type;
a06ea964 3039
cec5225b 3040 if (! elf_aarch64_locals (abfd))
a06ea964
NC		 3041 return GOT_UNKNOWN;
3042
cec5225b 3043 return elf_aarch64_locals (abfd)[r_symndx].got_type;
a06ea964
NC		 3044}
3045
a06ea964 3046/* Get the AArch64 elf linker hash table from a link_info structure. */
cec5225b
YZ		 3047#define elf_aarch64_hash_table(info) \
3048 ((struct elf_aarch64_link_hash_table *) ((info)->hash))
a06ea964
NC		 3049
3050#define aarch64_stub_hash_lookup(table, string, create, copy) \
cec5225b 3051 ((struct elf_aarch64_stub_hash_entry *) \
a06ea964
NC		 3052 bfd_hash_lookup ((table), (string), (create), (copy)))
3053
3054/* AArch64 ELF linker hash table. */
cec5225b 3055struct elf_aarch64_link_hash_table
a06ea964
NC		 3056{
3057 /* The main hash table. */
3058 struct elf_link_hash_table root;
3059
3060 /* Nonzero to force PIC branch veneers. */
3061 int pic_veneer;
3062
68fcca92
JW		 3063 /* Fix erratum 835769. */
3064 int fix_erratum_835769;
3065
4106101c 3066 /* Fix erratum 843419. */
739b5c9c 3067 erratum_84319_opts fix_erratum_843419;
4106101c 3068
1f56df9d
JW		 3069 /* Don't apply link-time values for dynamic relocations. */
3070 int no_apply_dynamic_relocs;
3071
a06ea964
NC		 3072 /* The number of bytes in the initial entry in the PLT. */
3073 bfd_size_type plt_header_size;
3074
37c18eed
SD		 3075 /* The bytes of the initial PLT entry. */
3076 const bfd_byte *plt0_entry;
3077
3078 /* The number of bytes in the subsequent PLT entries. */
a06ea964
NC		 3079 bfd_size_type plt_entry_size;
3080
37c18eed
SD		 3081 /* The bytes of the subsequent PLT entry. */
3082 const bfd_byte *plt_entry;
3083
a06ea964
NC		 3084 /* For convenience in allocate_dynrelocs. */
3085 bfd *obfd;
3086
3087 /* The amount of space used by the reserved portion of the sgotplt
3088 section, plus whatever space is used by the jump slots. */
3089 bfd_vma sgotplt_jump_table_size;
3090
3091 /* The stub hash table. */
3092 struct bfd_hash_table stub_hash_table;
3093
3094 /* Linker stub bfd. */
3095 bfd *stub_bfd;
3096
3097 /* Linker call-backs. */
3098 asection *(*add_stub_section) (const char *, asection *);
3099 void (*layout_sections_again) (void);
3100
3101 /* Array to keep track of which stub sections have been created, and
3102 information on stub grouping. */
3103 struct map_stub
3104 {
3105 /* This is the section to which stubs in the group will be
3106 attached. */
3107 asection *link_sec;
3108 /* The stub section. */
3109 asection *stub_sec;
3110 } *stub_group;
3111
cec5225b 3112 /* Assorted information used by elfNN_aarch64_size_stubs. */
a06ea964 3113 unsigned int bfd_count;
7292b3ac 3114 unsigned int top_index;
a06ea964
NC		 3115 asection **input_list;
3116
823710d5
SN		 3117 /* JUMP_SLOT relocs for variant PCS symbols may be present. */
3118 int variant_pcs;
3119
37c18eed
SD		 3120 /* The number of bytes in the PLT enty for the TLS descriptor. */
3121 bfd_size_type tlsdesc_plt_entry_size;
3122
1419bbe5
WN		 3123 /* Used by local STT_GNU_IFUNC symbols. */
3124 htab_t loc_hash_table;
3125 void * loc_hash_memory;
40bbb79e
SP		 3126
3127 /* Used for capability relocations. */
3128 asection *srelcaps;
a1bdea65 3129 int c64_rel;
7ff36d1a 3130 bfd_boolean c64_output;
a06ea964
NC		 3131};
3132
a06ea964
NC		 3133/* Create an entry in an AArch64 ELF linker hash table. */
3134
3135static struct bfd_hash_entry *
cec5225b 3136elfNN_aarch64_link_hash_newfunc (struct bfd_hash_entry *entry,
a06ea964
NC		 3137 struct bfd_hash_table *table,
3138 const char *string)
3139{
cec5225b
YZ		 3140 struct elf_aarch64_link_hash_entry *ret =
3141 (struct elf_aarch64_link_hash_entry *) entry;
a06ea964
NC		 3142
3143 /* Allocate the structure if it has not already been allocated by a
3144 subclass. */
3145 if (ret == NULL)
3146 ret = bfd_hash_allocate (table,
cec5225b 3147 sizeof (struct elf_aarch64_link_hash_entry));
a06ea964
NC		 3148 if (ret == NULL)
3149 return (struct bfd_hash_entry *) ret;
3150
3151 /* Call the allocation method of the superclass. */
cec5225b 3152 ret = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC		 3153 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3154 table, string));
3155 if (ret != NULL)
3156 {
a06ea964
NC		 3157 ret->got_type = GOT_UNKNOWN;
3158 ret->plt_got_offset = (bfd_vma) - 1;
3159 ret->stub_cache = NULL;
3160 ret->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
3161 }
3162
3163 return (struct bfd_hash_entry *) ret;
3164}
3165
3166/* Initialize an entry in the stub hash table. */
3167
3168static struct bfd_hash_entry *
3169stub_hash_newfunc (struct bfd_hash_entry *entry,
3170 struct bfd_hash_table *table, const char *string)
3171{
3172 /* Allocate the structure if it has not already been allocated by a
3173 subclass. */
3174 if (entry == NULL)
3175 {
3176 entry = bfd_hash_allocate (table,
3177 sizeof (struct
cec5225b 3178 elf_aarch64_stub_hash_entry));
a06ea964
NC		 3179 if (entry == NULL)
3180 return entry;
3181 }
3182
3183 /* Call the allocation method of the superclass. */
3184 entry = bfd_hash_newfunc (entry, table, string);
3185 if (entry != NULL)
3186 {
cec5225b 3187 struct elf_aarch64_stub_hash_entry *eh;
a06ea964
NC		 3188
3189 /* Initialize the local fields. */
cec5225b 3190 eh = (struct elf_aarch64_stub_hash_entry *) entry;
4106101c 3191 eh->adrp_offset = 0;
a06ea964
NC		 3192 eh->stub_sec = NULL;
3193 eh->stub_offset = 0;
3194 eh->target_value = 0;
3195 eh->target_section = NULL;
3196 eh->stub_type = aarch64_stub_none;
3197 eh->h = NULL;
3198 eh->id_sec = NULL;
3199 }
3200
3201 return entry;
3202}
3203
1419bbe5
WN		 3204/* Compute a hash of a local hash entry. We use elf_link_hash_entry
3205 for local symbol so that we can handle local STT_GNU_IFUNC symbols
3206 as global symbol. We reuse indx and dynstr_index for local symbol
3207 hash since they aren't used by global symbols in this backend. */
3208
3209static hashval_t
3210elfNN_aarch64_local_htab_hash (const void *ptr)
3211{
3212 struct elf_link_hash_entry *h
3213 = (struct elf_link_hash_entry *) ptr;
3214 return ELF_LOCAL_SYMBOL_HASH (h->indx, h->dynstr_index);
3215}
3216
3217/* Compare local hash entries. */
3218
3219static int
3220elfNN_aarch64_local_htab_eq (const void *ptr1, const void *ptr2)
3221{
3222 struct elf_link_hash_entry *h1
3223 = (struct elf_link_hash_entry *) ptr1;
3224 struct elf_link_hash_entry *h2
3225 = (struct elf_link_hash_entry *) ptr2;
3226
3227 return h1->indx == h2->indx && h1->dynstr_index == h2->dynstr_index;
3228}
3229
3230/* Find and/or create a hash entry for local symbol. */
3231
3232static struct elf_link_hash_entry *
3233elfNN_aarch64_get_local_sym_hash (struct elf_aarch64_link_hash_table *htab,
3234 bfd *abfd, const Elf_Internal_Rela *rel,
3235 bfd_boolean create)
3236{
3237 struct elf_aarch64_link_hash_entry e, *ret;
3238 asection *sec = abfd->sections;
3239 hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id,
3240 ELFNN_R_SYM (rel->r_info));
3241 void **slot;
3242
3243 e.root.indx = sec->id;
3244 e.root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3245 slot = htab_find_slot_with_hash (htab->loc_hash_table, &e, h,
3246 create ? INSERT : NO_INSERT);
3247
3248 if (!slot)
3249 return NULL;
3250
3251 if (*slot)
3252 {
3253 ret = (struct elf_aarch64_link_hash_entry *) *slot;
3254 return &ret->root;
3255 }
3256
3257 ret = (struct elf_aarch64_link_hash_entry *)
3258 objalloc_alloc ((struct objalloc *) htab->loc_hash_memory,
3259 sizeof (struct elf_aarch64_link_hash_entry));
3260 if (ret)
3261 {
3262 memset (ret, 0, sizeof (*ret));
3263 ret->root.indx = sec->id;
3264 ret->root.dynstr_index = ELFNN_R_SYM (rel->r_info);
3265 ret->root.dynindx = -1;
3266 *slot = ret;
3267 }
3268 return &ret->root;
3269}
a06ea964
NC		 3270
3271/* Copy the extra info we tack onto an elf_link_hash_entry. */
3272
3273static void
cec5225b 3274elfNN_aarch64_copy_indirect_symbol (struct bfd_link_info *info,
a06ea964
NC		 3275 struct elf_link_hash_entry *dir,
3276 struct elf_link_hash_entry *ind)
3277{
cec5225b 3278 struct elf_aarch64_link_hash_entry *edir, *eind;
a06ea964 3279
cec5225b
YZ		 3280 edir = (struct elf_aarch64_link_hash_entry *) dir;
3281 eind = (struct elf_aarch64_link_hash_entry *) ind;
a06ea964 3282
a06ea964
NC		 3283 if (ind->root.type == bfd_link_hash_indirect)
3284 {
3285 /* Copy over PLT info. */
3286 if (dir->got.refcount <= 0)
3287 {
3288 edir->got_type = eind->got_type;
3289 eind->got_type = GOT_UNKNOWN;
3290 }
3291 }
3292
3293 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3294}
3295
823710d5
SN		 3296/* Merge non-visibility st_other attributes. */
3297
3298static void
3299elfNN_aarch64_merge_symbol_attribute (struct elf_link_hash_entry *h,
3300 const Elf_Internal_Sym *isym,
3301 bfd_boolean definition ATTRIBUTE_UNUSED,
3302 bfd_boolean dynamic ATTRIBUTE_UNUSED)
3303{
3304 unsigned int isym_sto = isym->st_other & ~ELF_ST_VISIBILITY (-1);
3305 unsigned int h_sto = h->other & ~ELF_ST_VISIBILITY (-1);
3306
3307 if (isym_sto == h_sto)
3308 return;
3309
3310 if (isym_sto & ~STO_AARCH64_VARIANT_PCS)
3311 /* Not fatal, this callback cannot fail. */
3312 _bfd_error_handler (_("unknown attribute for symbol `%s': 0x%02x"),
3313 h->root.root.string, isym_sto);
3314
3315 /* Note: Ideally we would warn about any attribute mismatch, but
3316 this api does not allow that without substantial changes. */
3317 if (isym_sto & STO_AARCH64_VARIANT_PCS)
3318 h->other |= STO_AARCH64_VARIANT_PCS;
3319}
3320
68faa637
AM		 3321/* Destroy an AArch64 elf linker hash table. */
3322
3323static void
d495ab0d 3324elfNN_aarch64_link_hash_table_free (bfd *obfd)
68faa637
AM		 3325{
3326 struct elf_aarch64_link_hash_table *ret
d495ab0d 3327 = (struct elf_aarch64_link_hash_table *) obfd->link.hash;
68faa637
AM		 3328
3329 if (ret->loc_hash_table)
3330 htab_delete (ret->loc_hash_table);
3331 if (ret->loc_hash_memory)
3332 objalloc_free ((struct objalloc *) ret->loc_hash_memory);
3333
3334 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3335 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM		 3336}
3337
a06ea964
NC		 3338/* Create an AArch64 elf linker hash table. */
3339
3340static struct bfd_link_hash_table *
cec5225b 3341elfNN_aarch64_link_hash_table_create (bfd *abfd)
a06ea964 3342{
cec5225b 3343 struct elf_aarch64_link_hash_table *ret;
986f0783 3344 size_t amt = sizeof (struct elf_aarch64_link_hash_table);
a06ea964 3345
7bf52ea2 3346 ret = bfd_zmalloc (amt);
a06ea964
NC		 3347 if (ret == NULL)
3348 return NULL;
3349
3350 if (!_bfd_elf_link_hash_table_init
cec5225b
YZ		 3351 (&ret->root, abfd, elfNN_aarch64_link_hash_newfunc,
3352 sizeof (struct elf_aarch64_link_hash_entry), AARCH64_ELF_DATA))
a06ea964
NC		 3353 {
3354 free (ret);
3355 return NULL;
3356 }
3357
a06ea964 3358 ret->plt_header_size = PLT_ENTRY_SIZE;
37c18eed 3359 ret->plt0_entry = elfNN_aarch64_small_plt0_entry;
a06ea964 3360 ret->plt_entry_size = PLT_SMALL_ENTRY_SIZE;
37c18eed
SD		 3361 ret->plt_entry = elfNN_aarch64_small_plt_entry;
3362 ret->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
a06ea964 3363 ret->obfd = abfd;
9bcc30e4 3364 ret->root.tlsdesc_got = (bfd_vma) - 1;
a06ea964
NC		 3365
3366 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
cec5225b 3367 sizeof (struct elf_aarch64_stub_hash_entry)))
a06ea964 3368 {
d495ab0d 3369 _bfd_elf_link_hash_table_free (abfd);
a06ea964
NC		 3370 return NULL;
3371 }
3372
1419bbe5
WN		 3373 ret->loc_hash_table = htab_try_create (1024,
3374 elfNN_aarch64_local_htab_hash,
3375 elfNN_aarch64_local_htab_eq,
3376 NULL);
3377 ret->loc_hash_memory = objalloc_create ();
3378 if (!ret->loc_hash_table || !ret->loc_hash_memory)
3379 {
d495ab0d 3380 elfNN_aarch64_link_hash_table_free (abfd);
1419bbe5
WN		 3381 return NULL;
3382 }
d495ab0d 3383 ret->root.root.hash_table_free = elfNN_aarch64_link_hash_table_free;
1419bbe5 3384
a06ea964
NC		 3385 return &ret->root.root;
3386}
3387
1d75a8e2
NC		 3388/* Perform relocation R_TYPE. Returns TRUE upon success, FALSE otherwise. */
3389
a06ea964
NC		 3390static bfd_boolean
3391aarch64_relocate (unsigned int r_type, bfd *input_bfd, asection *input_section,
3392 bfd_vma offset, bfd_vma value)
3393{
3394 reloc_howto_type *howto;
3395 bfd_vma place;
3396
0aa13fee 3397 howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
a06ea964
NC		 3398 place = (input_section->output_section->vma + input_section->output_offset
3399 + offset);
caed7120 3400
0aa13fee 3401 r_type = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
652afeef
TC		 3402 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, r_type, place,
3403 value, 0, FALSE);
caed7120
YZ		 3404 return _bfd_aarch64_elf_put_addend (input_bfd,
3405 input_section->contents + offset, r_type,
1d75a8e2 3406 howto, value) == bfd_reloc_ok;
a06ea964
NC		 3407}
3408
50e192f0
SP		 3409/* Return interworking stub for a relocation. */
3410
3411static enum elf_aarch64_stub_type
3412aarch64_interwork_stub (unsigned int r_type,
3413 bfd_boolean branch_to_c64)
3414{
3415 switch (r_type)
3416 {
3417 case MORELLO_R (JUMP26):
3418 case MORELLO_R (CALL26):
3419 if (!branch_to_c64)
3420 return c64_stub_branch_aarch64;
3421 break;
3422 case AARCH64_R (JUMP26):
3423 case AARCH64_R (CALL26):
3424 if (branch_to_c64)
3425 return aarch64_stub_branch_c64;
3426 break;
3427 default:
3428 break;
3429 }
3430
3431 return aarch64_stub_none;
3432}
3433
cec5225b 3434static enum elf_aarch64_stub_type
a06ea964
NC		 3435aarch64_select_branch_stub (bfd_vma value, bfd_vma place)
3436{
3437 if (aarch64_valid_for_adrp_p (value, place))
3438 return aarch64_stub_adrp_branch;
3439 return aarch64_stub_long_branch;
3440}
3441
3442/* Determine the type of stub needed, if any, for a call. */
3443
cec5225b 3444static enum elf_aarch64_stub_type
9a228467 3445aarch64_type_of_stub (asection *input_sec,
a06ea964 3446 const Elf_Internal_Rela *rel,
f678ded7 3447 asection *sym_sec,
a06ea964 3448 unsigned char st_type,
a06ea964
NC		 3449 bfd_vma destination)
3450{
3451 bfd_vma location;
3452 bfd_signed_vma branch_offset;
50e192f0 3453 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
cec5225b 3454 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
a06ea964 3455
f678ded7 3456 if (st_type != STT_FUNC
2f340668 3457 && (sym_sec == input_sec))
a06ea964
NC		 3458 return stub_type;
3459
a06ea964
NC		 3460 /* Determine where the call point is. */
3461 location = (input_sec->output_offset
3462 + input_sec->output_section->vma + rel->r_offset);
3463
3464 branch_offset = (bfd_signed_vma) (destination - location);
3465
50e192f0
SP		 3466 /* For A64 <-> C64 branches we only come here for jumps to PLT. Treat them
3467 as regular branches and leave the interworking to PLT. */
3468 if (branch_offset > AARCH64_MAX_FWD_BRANCH_OFFSET
3469 || branch_offset < AARCH64_MAX_BWD_BRANCH_OFFSET)
a06ea964 3470 {
50e192f0
SP		 3471 switch (r_type)
3472 {
3473 /* We don't want to redirect any old unconditional jump in this way,
3474 only one which is being used for a sibcall, where it is
3475 acceptable for the IP0 and IP1 registers to be clobbered. */
3476 case AARCH64_R (CALL26):
3477 case AARCH64_R (JUMP26):
3478 return aarch64_stub_long_branch;
3479 case MORELLO_R (CALL26):
3480 case MORELLO_R (JUMP26):
3481 return c64_stub_branch_c64;
3482 default:
3483 break;
3484 }
a06ea964
NC		 3485 }
3486
50e192f0
SP		 3487 return aarch64_stub_none;
3488}
3489
3490/* Return a string to add as suffix to a veneer name. */
3491
3492static const char *
3493aarch64_lookup_stub_type_suffix (enum elf_aarch64_stub_type stub_type)
3494{
3495 switch (stub_type)
3496 {
3497 case aarch64_stub_branch_c64:
3498 return "_a64c64";
3499 case c64_stub_branch_aarch64:
3500 return "_c64a64";
3501 break;
3502 default:
3503 return "";
3504 }
a06ea964
NC		 3505}
3506
3507/* Build a name for an entry in the stub hash table. */
3508
3509static char *
cec5225b 3510elfNN_aarch64_stub_name (const asection *input_section,
a06ea964 3511 const asection *sym_sec,
cec5225b 3512 const struct elf_aarch64_link_hash_entry *hash,
50e192f0
SP		 3513 const Elf_Internal_Rela *rel,
3514 enum elf_aarch64_stub_type stub_type)
a06ea964
NC		 3515{
3516 char *stub_name;
3517 bfd_size_type len;
50e192f0 3518 const char *suffix = aarch64_lookup_stub_type_suffix (stub_type);;
a06ea964
NC		 3519
3520 if (hash)
3521 {
3522 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 16 + 1;
3523 stub_name = bfd_malloc (len);
3524 if (stub_name != NULL)
50e192f0 3525 snprintf (stub_name, len, "%08x_%s%s+%" BFD_VMA_FMT "x",
a06ea964
NC		 3526 (unsigned int) input_section->id,
3527 hash->root.root.root.string,
50e192f0 3528 suffix, rel->r_addend);
a06ea964
NC		 3529 }
3530 else
3531 {
3532 len = 8 + 1 + 8 + 1 + 8 + 1 + 16 + 1;
3533 stub_name = bfd_malloc (len);
3534 if (stub_name != NULL)
50e192f0 3535 snprintf (stub_name, len, "%08x_%x:%x%s+%" BFD_VMA_FMT "x",
a06ea964
NC		 3536 (unsigned int) input_section->id,
3537 (unsigned int) sym_sec->id,
cec5225b 3538 (unsigned int) ELFNN_R_SYM (rel->r_info),
50e192f0 3539 suffix, rel->r_addend);
a06ea964
NC		 3540 }
3541
3542 return stub_name;
3543}
3544
7f784814
JW		 3545/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For
3546 executable PLT slots where the executable never takes the address of those
3547 functions, the function symbols are not added to the hash table. */
3548
3549static bfd_boolean
3550elf_aarch64_hash_symbol (struct elf_link_hash_entry *h)
3551{
3552 if (h->plt.offset != (bfd_vma) -1
3553 && !h->def_regular
3554 && !h->pointer_equality_needed)
3555 return FALSE;
3556
3557 return _bfd_elf_hash_symbol (h);
3558}
3559
a06ea964
NC		 3560/* Look up an entry in the stub hash. Stub entries are cached because
3561 creating the stub name takes a bit of time. */
3562
cec5225b
YZ		 3563static struct elf_aarch64_stub_hash_entry *
3564elfNN_aarch64_get_stub_entry (const asection *input_section,
a06ea964
NC		 3565 const asection *sym_sec,
3566 struct elf_link_hash_entry *hash,
3567 const Elf_Internal_Rela *rel,
50e192f0
SP		 3568 struct elf_aarch64_link_hash_table *htab,
3569 enum elf_aarch64_stub_type stub_type)
a06ea964 3570{
cec5225b
YZ		 3571 struct elf_aarch64_stub_hash_entry *stub_entry;
3572 struct elf_aarch64_link_hash_entry *h =
3573 (struct elf_aarch64_link_hash_entry *) hash;
a06ea964
NC		 3574 const asection *id_sec;
3575
3576 if ((input_section->flags & SEC_CODE) == 0)
3577 return NULL;
3578
3579 /* If this input section is part of a group of sections sharing one
3580 stub section, then use the id of the first section in the group.
3581 Stub names need to include a section id, as there may well be
3582 more than one stub used to reach say, printf, and we need to
3583 distinguish between them. */
3584 id_sec = htab->stub_group[input_section->id].link_sec;
3585
3586 if (h != NULL && h->stub_cache != NULL
3587 && h->stub_cache->h == h && h->stub_cache->id_sec == id_sec)
3588 {
3589 stub_entry = h->stub_cache;
3590 }
3591 else
3592 {
3593 char *stub_name;
3594
50e192f0 3595 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, h, rel, stub_type);
a06ea964
NC		 3596 if (stub_name == NULL)
3597 return NULL;
3598
3599 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table,
3600 stub_name, FALSE, FALSE);
3601 if (h != NULL)
3602 h->stub_cache = stub_entry;
3603
3604 free (stub_name);
3605 }
3606
3607 return stub_entry;
3608}
3609
a06ea964 3610
66585675
MS		 3611/* Create a stub section. */
3612
3613static asection *
3614_bfd_aarch64_create_stub_section (asection *section,
3615 struct elf_aarch64_link_hash_table *htab)
3616{
3617 size_t namelen;
3618 bfd_size_type len;
3619 char *s_name;
3620
3621 namelen = strlen (section->name);
3622 len = namelen + sizeof (STUB_SUFFIX);
3623 s_name = bfd_alloc (htab->stub_bfd, len);
3624 if (s_name == NULL)
3625 return NULL;
3626
3627 memcpy (s_name, section->name, namelen);
3628 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3629 return (*htab->add_stub_section) (s_name, section);
3630}
3631
3632
fc6d53be
MS		 3633/* Find or create a stub section for a link section.
3634
3635 Fix or create the stub section used to collect stubs attached to
3636 the specified link section. */
3637
3638static asection *
3639_bfd_aarch64_get_stub_for_link_section (asection *link_section,
3640 struct elf_aarch64_link_hash_table *htab)
3641{
3642 if (htab->stub_group[link_section->id].stub_sec == NULL)
3643 htab->stub_group[link_section->id].stub_sec
3644 = _bfd_aarch64_create_stub_section (link_section, htab);
3645 return htab->stub_group[link_section->id].stub_sec;
3646}
3647
3648
ef857521
MS		 3649/* Find or create a stub section in the stub group for an input
3650 section. */
3651
3652static asection *
3653_bfd_aarch64_create_or_find_stub_sec (asection *section,
3654 struct elf_aarch64_link_hash_table *htab)
a06ea964 3655{
fc6d53be
MS		 3656 asection *link_sec = htab->stub_group[section->id].link_sec;
3657 return _bfd_aarch64_get_stub_for_link_section (link_sec, htab);
ef857521
MS		 3658}
3659
3660
3661/* Add a new stub entry in the stub group associated with an input
3662 section to the stub hash. Not all fields of the new stub entry are
3663 initialised. */
3664
3665static struct elf_aarch64_stub_hash_entry *
3666_bfd_aarch64_add_stub_entry_in_group (const char *stub_name,
3667 asection *section,
3668 struct elf_aarch64_link_hash_table *htab)
3669{
3670 asection *link_sec;
3671 asection *stub_sec;
3672 struct elf_aarch64_stub_hash_entry *stub_entry;
3673
3674 link_sec = htab->stub_group[section->id].link_sec;
3675 stub_sec = _bfd_aarch64_create_or_find_stub_sec (section, htab);
3676
a06ea964
NC		 3677 /* Enter this entry into the linker stub hash table. */
3678 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3679 TRUE, FALSE);
3680 if (stub_entry == NULL)
3681 {
695344c0 3682 /* xgettext:c-format */
871b3ab2 3683 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4eca0228 3684 section->owner, stub_name);
a06ea964
NC		 3685 return NULL;
3686 }
3687
3688 stub_entry->stub_sec = stub_sec;
3689 stub_entry->stub_offset = 0;
3690 stub_entry->id_sec = link_sec;
3691
3692 return stub_entry;
3693}
3694
4106101c
MS		 3695/* Add a new stub entry in the final stub section to the stub hash.
3696 Not all fields of the new stub entry are initialised. */
3697
3698static struct elf_aarch64_stub_hash_entry *
3699_bfd_aarch64_add_stub_entry_after (const char *stub_name,
3700 asection *link_section,
3701 struct elf_aarch64_link_hash_table *htab)
3702{
3703 asection *stub_sec;
3704 struct elf_aarch64_stub_hash_entry *stub_entry;
3705
739b5c9c
TC		 3706 stub_sec = NULL;
3707 /* Only create the actual stub if we will end up needing it. */
3708 if (htab->fix_erratum_843419 & ERRAT_ADRP)
3709 stub_sec = _bfd_aarch64_get_stub_for_link_section (link_section, htab);
4106101c
MS		 3710 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3711 TRUE, FALSE);
3712 if (stub_entry == NULL)
3713 {
4eca0228 3714 _bfd_error_handler (_("cannot create stub entry %s"), stub_name);
4106101c
MS		 3715 return NULL;
3716 }
3717
3718 stub_entry->stub_sec = stub_sec;
3719 stub_entry->stub_offset = 0;
3720 stub_entry->id_sec = link_section;
3721
3722 return stub_entry;
3723}
3724
3725
a06ea964
NC		 3726static bfd_boolean
3727aarch64_build_one_stub (struct bfd_hash_entry *gen_entry,
abf874aa 3728 void *in_arg)
a06ea964 3729{
cec5225b 3730 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC		 3731 asection *stub_sec;
3732 bfd *stub_bfd;
3733 bfd_byte *loc;
3734 bfd_vma sym_value;
68fcca92
JW		 3735 bfd_vma veneered_insn_loc;
3736 bfd_vma veneer_entry_loc;
3737 bfd_signed_vma branch_offset = 0;
a06ea964
NC		 3738 unsigned int template_size;
3739 const uint32_t *template;
3740 unsigned int i;
abf874aa 3741 struct bfd_link_info *info;
a06ea964
NC		 3742
3743 /* Massage our args to the form they really have. */
cec5225b 3744 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964 3745
abf874aa
CL		 3746 info = (struct bfd_link_info *) in_arg;
3747
3748 /* Fail if the target section could not be assigned to an output
3749 section. The user should fix his linker script. */
3750 if (stub_entry->target_section->output_section == NULL
3751 && info->non_contiguous_regions)
53215f21
CL		 3752 info->callbacks->einfo (_("%F%P: Could not assign '%pA' to an output section. "
3753 "Retry without "
3754 "--enable-non-contiguous-regions.\n"),
3755 stub_entry->target_section);
abf874aa 3756
a06ea964
NC		 3757 stub_sec = stub_entry->stub_sec;
3758
3759 /* Make a note of the offset within the stubs for this entry. */
3760 stub_entry->stub_offset = stub_sec->size;
3761 loc = stub_sec->contents + stub_entry->stub_offset;
3762
3763 stub_bfd = stub_sec->owner;
3764
3765 /* This is the address of the stub destination. */
3766 sym_value = (stub_entry->target_value
3767 + stub_entry->target_section->output_offset
3768 + stub_entry->target_section->output_section->vma);
3769
50e192f0
SP		 3770 bfd_vma place = (stub_entry->stub_offset + stub_sec->output_section->vma
3771 + stub_sec->output_offset);
3772
a06ea964
NC		 3773 if (stub_entry->stub_type == aarch64_stub_long_branch)
3774 {
a06ea964
NC		 3775 /* See if we can relax the stub. */
3776 if (aarch64_valid_for_adrp_p (sym_value, place))
3777 stub_entry->stub_type = aarch64_select_branch_stub (sym_value, place);
3778 }
3779
50e192f0
SP		 3780 if ((stub_entry->stub_type == aarch64_stub_branch_c64
3781 || stub_entry->stub_type == c64_stub_branch_aarch64
3782 || stub_entry->stub_type == c64_stub_branch_c64)
3783 && !c64_valid_for_adrp_p (sym_value, place))
3784 {
3785 _bfd_error_handler
3786 (_("%s: stub target out of range for %s branch"),
3787 stub_entry->output_name,
3788 (stub_entry->stub_type == aarch64_stub_branch_c64
3789 ? "A64 to C64" : "C64 to A64"));
3790 bfd_set_error (bfd_error_bad_value);
3791 return FALSE;
3792 }
3793
a06ea964
NC		 3794 switch (stub_entry->stub_type)
3795 {
3796 case aarch64_stub_adrp_branch:
3797 template = aarch64_adrp_branch_stub;
3798 template_size = sizeof (aarch64_adrp_branch_stub);
3799 break;
3800 case aarch64_stub_long_branch:
3801 template = aarch64_long_branch_stub;
3802 template_size = sizeof (aarch64_long_branch_stub);
3803 break;
68fcca92
JW		 3804 case aarch64_stub_erratum_835769_veneer:
3805 template = aarch64_erratum_835769_stub;
3806 template_size = sizeof (aarch64_erratum_835769_stub);
3807 break;
4106101c
MS		 3808 case aarch64_stub_erratum_843419_veneer:
3809 template = aarch64_erratum_843419_stub;
3810 template_size = sizeof (aarch64_erratum_843419_stub);
3811 break;
50e192f0
SP		 3812 case aarch64_stub_branch_c64:
3813 template = aarch64_c64_branch_stub;
3814 template_size = sizeof (aarch64_c64_branch_stub);
3815 break;
3816 case c64_stub_branch_aarch64:
3817 case c64_stub_branch_c64:
3818 template = c64_aarch64_branch_stub;
3819 template_size = sizeof (c64_aarch64_branch_stub);
3820 break;
a06ea964 3821 default:
8e2fe09f 3822 abort ();
a06ea964
NC		 3823 }
3824
3825 for (i = 0; i < (template_size / sizeof template[0]); i++)
3826 {
3827 bfd_putl32 (template[i], loc);
3828 loc += 4;
3829 }
3830
3831 template_size = (template_size + 7) & ~7;
3832 stub_sec->size += template_size;
3833
50e192f0
SP		 3834 bfd_vma stub_offset = stub_entry->stub_offset;
3835
a06ea964
NC		 3836 switch (stub_entry->stub_type)
3837 {
3838 case aarch64_stub_adrp_branch:
1d75a8e2
NC		 3839 if (!aarch64_relocate (AARCH64_R (ADR_PREL_PG_HI21), stub_bfd, stub_sec,
3840 stub_entry->stub_offset, sym_value))
a06ea964
NC		 3841 /* The stub would not have been relaxed if the offset was out
3842 of range. */
3843 BFD_FAIL ();
3844
1d75a8e2
NC		 3845 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
3846 stub_entry->stub_offset + 4, sym_value))
93ca8569 3847 BFD_FAIL ();
a06ea964
NC		 3848 break;
3849
3850 case aarch64_stub_long_branch:
3851 /* We want the value relative to the address 12 bytes back from the
07d6d2b8 3852 value itself. */
1d75a8e2
NC		 3853 if (!aarch64_relocate (AARCH64_R (PRELNN), stub_bfd, stub_sec,
3854 stub_entry->stub_offset + 16, sym_value + 12))
93ca8569 3855 BFD_FAIL ();
a06ea964 3856 break;
68fcca92
JW		 3857
3858 case aarch64_stub_erratum_835769_veneer:
3859 veneered_insn_loc = stub_entry->target_section->output_section->vma
3860 + stub_entry->target_section->output_offset
3861 + stub_entry->target_value;
3862 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
3863 + stub_entry->stub_sec->output_offset
3864 + stub_entry->stub_offset;
3865 branch_offset = veneered_insn_loc - veneer_entry_loc;
3866 branch_offset >>= 2;
3867 branch_offset &= 0x3ffffff;
3868 bfd_putl32 (stub_entry->veneered_insn,
3869 stub_sec->contents + stub_entry->stub_offset);
3870 bfd_putl32 (template[1] | branch_offset,
3871 stub_sec->contents + stub_entry->stub_offset + 4);
3872 break;
3873
4106101c 3874 case aarch64_stub_erratum_843419_veneer:
1d75a8e2
NC		 3875 if (!aarch64_relocate (AARCH64_R (JUMP26), stub_bfd, stub_sec,
3876 stub_entry->stub_offset + 4, sym_value + 4))
4106101c
MS		 3877 BFD_FAIL ();
3878 break;
3879
50e192f0
SP		 3880 case aarch64_stub_branch_c64:
3881 stub_offset += 4;
3882 /* Fall through. */
3883 case c64_stub_branch_aarch64:
3884 case c64_stub_branch_c64:
3885 if (!aarch64_relocate (R_MORELLO_ADR_PREL_PG_HI20, stub_bfd, stub_sec,
3886 stub_offset, sym_value))
3887 /* We fail early if offset is out of range. */
3888 BFD_FAIL ();
3889
3890 if (!aarch64_relocate (AARCH64_R (ADD_ABS_LO12_NC), stub_bfd, stub_sec,
3891 stub_offset + 4, sym_value))
3892 BFD_FAIL ();
3893 break;
3894
a06ea964 3895 default:
8e2fe09f 3896 abort ();
a06ea964
NC		 3897 }
3898
3899 return TRUE;
3900}
3901
3902/* As above, but don't actually build the stub. Just bump offset so
3903 we know stub section sizes. */
3904
3905static bfd_boolean
739b5c9c 3906aarch64_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
a06ea964 3907{
cec5225b 3908 struct elf_aarch64_stub_hash_entry *stub_entry;
739b5c9c 3909 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC		 3910 int size;
3911
3912 /* Massage our args to the form they really have. */
cec5225b 3913 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
739b5c9c 3914 htab = (struct elf_aarch64_link_hash_table *) in_arg;
a06ea964
NC		 3915
3916 switch (stub_entry->stub_type)
3917 {
3918 case aarch64_stub_adrp_branch:
3919 size = sizeof (aarch64_adrp_branch_stub);
3920 break;
3921 case aarch64_stub_long_branch:
3922 size = sizeof (aarch64_long_branch_stub);
3923 break;
68fcca92
JW		 3924 case aarch64_stub_erratum_835769_veneer:
3925 size = sizeof (aarch64_erratum_835769_stub);
3926 break;
4106101c 3927 case aarch64_stub_erratum_843419_veneer:
739b5c9c
TC		 3928 {
3929 if (htab->fix_erratum_843419 == ERRAT_ADR)
3930 return TRUE;
3931 size = sizeof (aarch64_erratum_843419_stub);
3932 }
4106101c 3933 break;
50e192f0
SP		 3934 case aarch64_stub_branch_c64:
3935 size = sizeof (aarch64_c64_branch_stub);
3936 break;
3937 case c64_stub_branch_aarch64:
3938 case c64_stub_branch_c64:
3939 size = sizeof (c64_aarch64_branch_stub);
3940 break;
a06ea964 3941 default:
8e2fe09f 3942 abort ();
a06ea964
NC		 3943 }
3944
3945 size = (size + 7) & ~7;
3946 stub_entry->stub_sec->size += size;
3947 return TRUE;
3948}
3949
3950/* External entry points for sizing and building linker stubs. */
3951
3952/* Set up various things so that we can make a list of input sections
3953 for each output section included in the link. Returns -1 on error,
3954 0 when no stubs will be needed, and 1 on success. */
3955
3956int
cec5225b 3957elfNN_aarch64_setup_section_lists (bfd *output_bfd,
a06ea964
NC		 3958 struct bfd_link_info *info)
3959{
3960 bfd *input_bfd;
3961 unsigned int bfd_count;
7292b3ac 3962 unsigned int top_id, top_index;
a06ea964
NC		 3963 asection *section;
3964 asection **input_list, **list;
986f0783 3965 size_t amt;
cec5225b
YZ		 3966 struct elf_aarch64_link_hash_table *htab =
3967 elf_aarch64_hash_table (info);
a06ea964
NC		 3968
3969 if (!is_elf_hash_table (htab))
3970 return 0;
3971
3972 /* Count the number of input BFDs and find the top input section id. */
3973 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
c72f2fb2 3974 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC		 3975 {
3976 bfd_count += 1;
3977 for (section = input_bfd->sections;
3978 section != NULL; section = section->next)
3979 {
3980 if (top_id < section->id)
3981 top_id = section->id;
3982 }
3983 }
3984 htab->bfd_count = bfd_count;
3985
3986 amt = sizeof (struct map_stub) * (top_id + 1);
3987 htab->stub_group = bfd_zmalloc (amt);
3988 if (htab->stub_group == NULL)
3989 return -1;
3990
3991 /* We can't use output_bfd->section_count here to find the top output
3992 section index as some sections may have been removed, and
3993 _bfd_strip_section_from_output doesn't renumber the indices. */
3994 for (section = output_bfd->sections, top_index = 0;
3995 section != NULL; section = section->next)
3996 {
3997 if (top_index < section->index)
3998 top_index = section->index;
3999 }
4000
4001 htab->top_index = top_index;
4002 amt = sizeof (asection *) * (top_index + 1);
4003 input_list = bfd_malloc (amt);
4004 htab->input_list = input_list;
4005 if (input_list == NULL)
4006 return -1;
4007
4008 /* For sections we aren't interested in, mark their entries with a
4009 value we can check later. */
4010 list = input_list + top_index;
4011 do
4012 *list = bfd_abs_section_ptr;
4013 while (list-- != input_list);
4014
4015 for (section = output_bfd->sections;
4016 section != NULL; section = section->next)
4017 {
4018 if ((section->flags & SEC_CODE) != 0)
4019 input_list[section->index] = NULL;
4020 }
4021
4022 return 1;
4023}
4024
cec5225b 4025/* Used by elfNN_aarch64_next_input_section and group_sections. */
a06ea964
NC		 4026#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4027
4028/* The linker repeatedly calls this function for each input section,
4029 in the order that input sections are linked into output sections.
4030 Build lists of input sections to determine groupings between which
4031 we may insert linker stubs. */
4032
4033void
cec5225b 4034elfNN_aarch64_next_input_section (struct bfd_link_info *info, asection *isec)
a06ea964 4035{
cec5225b
YZ		 4036 struct elf_aarch64_link_hash_table *htab =
4037 elf_aarch64_hash_table (info);
a06ea964
NC		 4038
4039 if (isec->output_section->index <= htab->top_index)
4040 {
4041 asection **list = htab->input_list + isec->output_section->index;
4042
cff69cf4 4043 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
a06ea964
NC		 4044 {
4045 /* Steal the link_sec pointer for our list. */
4046 /* This happens to make the list in reverse order,
4047 which is what we want. */
4048 PREV_SEC (isec) = *list;
4049 *list = isec;
4050 }
4051 }
4052}
4053
4054/* See whether we can group stub sections together. Grouping stub
4055 sections may result in fewer stubs. More importantly, we need to
4056 put all .init* and .fini* stubs at the beginning of the .init or
4057 .fini output sections respectively, because glibc splits the
4058 _init and _fini functions into multiple parts. Putting a stub in
4059 the middle of a function is not a good idea. */
4060
4061static void
cec5225b 4062group_sections (struct elf_aarch64_link_hash_table *htab,
a06ea964 4063 bfd_size_type stub_group_size,
cff69cf4 4064 bfd_boolean stubs_always_after_branch)
a06ea964 4065{
cff69cf4 4066 asection **list = htab->input_list;
a06ea964
NC		 4067
4068 do
4069 {
4070 asection *tail = *list;
cff69cf4 4071 asection *head;
a06ea964
NC		 4072
4073 if (tail == bfd_abs_section_ptr)
4074 continue;
4075
cff69cf4
WD		 4076 /* Reverse the list: we must avoid placing stubs at the
4077 beginning of the section because the beginning of the text
4078 section may be required for an interrupt vector in bare metal
4079 code. */
4080#define NEXT_SEC PREV_SEC
4081 head = NULL;
a06ea964 4082 while (tail != NULL)
cff69cf4
WD		 4083 {
4084 /* Pop from tail. */
4085 asection *item = tail;
4086 tail = PREV_SEC (item);
4087
4088 /* Push on head. */
4089 NEXT_SEC (item) = head;
4090 head = item;
4091 }
4092
4093 while (head != NULL)
a06ea964
NC		 4094 {
4095 asection *curr;
cff69cf4
WD		 4096 asection *next;
4097 bfd_vma stub_group_start = head->output_offset;
4098 bfd_vma end_of_next;
a06ea964 4099
cff69cf4
WD		 4100 curr = head;
4101 while (NEXT_SEC (curr) != NULL)
4102 {
4103 next = NEXT_SEC (curr);
4104 end_of_next = next->output_offset + next->size;
4105 if (end_of_next - stub_group_start >= stub_group_size)
4106 /* End of NEXT is too far from start, so stop. */
4107 break;
4108 /* Add NEXT to the group. */
4109 curr = next;
4110 }
a06ea964 4111
cff69cf4 4112 /* OK, the size from the start to the start of CURR is less
a06ea964 4113 than stub_group_size and thus can be handled by one stub
cff69cf4 4114 section. (Or the head section is itself larger than
a06ea964
NC		 4115 stub_group_size, in which case we may be toast.)
4116 We should really be keeping track of the total size of
4117 stubs added here, as stubs contribute to the final output
4118 section size. */
4119 do
4120 {
cff69cf4 4121 next = NEXT_SEC (head);
a06ea964 4122 /* Set up this stub group. */
cff69cf4 4123 htab->stub_group[head->id].link_sec = curr;
a06ea964 4124 }
cff69cf4 4125 while (head != curr && (head = next) != NULL);
a06ea964
NC		 4126
4127 /* But wait, there's more! Input sections up to stub_group_size
cff69cf4
WD		 4128 bytes after the stub section can be handled by it too. */
4129 if (!stubs_always_after_branch)
a06ea964 4130 {
cff69cf4
WD		 4131 stub_group_start = curr->output_offset + curr->size;
4132
4133 while (next != NULL)
a06ea964 4134 {
cff69cf4
WD		 4135 end_of_next = next->output_offset + next->size;
4136 if (end_of_next - stub_group_start >= stub_group_size)
4137 /* End of NEXT is too far from stubs, so stop. */
4138 break;
4139 /* Add NEXT to the stub group. */
4140 head = next;
4141 next = NEXT_SEC (head);
4142 htab->stub_group[head->id].link_sec = curr;
a06ea964
NC		 4143 }
4144 }
cff69cf4 4145 head = next;
a06ea964
NC		 4146 }
4147 }
cff69cf4 4148 while (list++ != htab->input_list + htab->top_index);
a06ea964
NC		 4149
4150 free (htab->input_list);
4151}
4152
cff69cf4 4153#undef PREV_SEC
a06ea964
NC		 4154#undef PREV_SEC
4155
68fcca92
JW		 4156#define AARCH64_BITS(x, pos, n) (((x) >> (pos)) & ((1 << (n)) - 1))
4157
4158#define AARCH64_RT(insn) AARCH64_BITS (insn, 0, 5)
4159#define AARCH64_RT2(insn) AARCH64_BITS (insn, 10, 5)
4160#define AARCH64_RA(insn) AARCH64_BITS (insn, 10, 5)
4161#define AARCH64_RD(insn) AARCH64_BITS (insn, 0, 5)
4162#define AARCH64_RN(insn) AARCH64_BITS (insn, 5, 5)
4163#define AARCH64_RM(insn) AARCH64_BITS (insn, 16, 5)
4164
4165#define AARCH64_MAC(insn) (((insn) & 0xff000000) == 0x9b000000)
4166#define AARCH64_BIT(insn, n) AARCH64_BITS (insn, n, 1)
4167#define AARCH64_OP31(insn) AARCH64_BITS (insn, 21, 3)
4168#define AARCH64_ZR 0x1f
4169
4170/* All ld/st ops. See C4-182 of the ARM ARM. The encoding space for
4171 LD_PCREL, LDST_RO, LDST_UI and LDST_UIMM cover prefetch ops. */
4172
4173#define AARCH64_LD(insn) (AARCH64_BIT (insn, 22) == 1)
4174#define AARCH64_LDST(insn) (((insn) & 0x0a000000) == 0x08000000)
4175#define AARCH64_LDST_EX(insn) (((insn) & 0x3f000000) == 0x08000000)
4176#define AARCH64_LDST_PCREL(insn) (((insn) & 0x3b000000) == 0x18000000)
4177#define AARCH64_LDST_NAP(insn) (((insn) & 0x3b800000) == 0x28000000)
4178#define AARCH64_LDSTP_PI(insn) (((insn) & 0x3b800000) == 0x28800000)
4179#define AARCH64_LDSTP_O(insn) (((insn) & 0x3b800000) == 0x29000000)
4180#define AARCH64_LDSTP_PRE(insn) (((insn) & 0x3b800000) == 0x29800000)
4181#define AARCH64_LDST_UI(insn) (((insn) & 0x3b200c00) == 0x38000000)
4182#define AARCH64_LDST_PIIMM(insn) (((insn) & 0x3b200c00) == 0x38000400)
4183#define AARCH64_LDST_U(insn) (((insn) & 0x3b200c00) == 0x38000800)
4184#define AARCH64_LDST_PREIMM(insn) (((insn) & 0x3b200c00) == 0x38000c00)
4185#define AARCH64_LDST_RO(insn) (((insn) & 0x3b200c00) == 0x38200800)
4186#define AARCH64_LDST_UIMM(insn) (((insn) & 0x3b000000) == 0x39000000)
4187#define AARCH64_LDST_SIMD_M(insn) (((insn) & 0xbfbf0000) == 0x0c000000)
4188#define AARCH64_LDST_SIMD_M_PI(insn) (((insn) & 0xbfa00000) == 0x0c800000)
4189#define AARCH64_LDST_SIMD_S(insn) (((insn) & 0xbf9f0000) == 0x0d000000)
4190#define AARCH64_LDST_SIMD_S_PI(insn) (((insn) & 0xbf800000) == 0x0d800000)
4191
3d14faea
MS		 4192/* Classify an INSN if it is indeed a load/store.
4193
4194 Return TRUE if INSN is a LD/ST instruction otherwise return FALSE.
4195
4196 For scalar LD/ST instructions PAIR is FALSE, RT is returned and RT2
4197 is set equal to RT.
4198
2d0ca824 4199 For LD/ST pair instructions PAIR is TRUE, RT and RT2 are returned. */
68fcca92
JW		 4200
4201static bfd_boolean
3d14faea 4202aarch64_mem_op_p (uint32_t insn, unsigned int *rt, unsigned int *rt2,
68fcca92
JW		 4203 bfd_boolean *pair, bfd_boolean *load)
4204{
4205 uint32_t opcode;
4206 unsigned int r;
4207 uint32_t opc = 0;
4208 uint32_t v = 0;
4209 uint32_t opc_v = 0;
4210
de194d85 4211 /* Bail out quickly if INSN doesn't fall into the load-store
68fcca92
JW		 4212 encoding space. */
4213 if (!AARCH64_LDST (insn))
4214 return FALSE;
4215
4216 *pair = FALSE;
4217 *load = FALSE;
4218 if (AARCH64_LDST_EX (insn))
4219 {
4220 *rt = AARCH64_RT (insn);
3d14faea 4221 *rt2 = *rt;
68fcca92 4222 if (AARCH64_BIT (insn, 21) == 1)
07d6d2b8 4223 {
68fcca92 4224 *pair = TRUE;
3d14faea 4225 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW		 4226 }
4227 *load = AARCH64_LD (insn);
4228 return TRUE;
4229 }
4230 else if (AARCH64_LDST_NAP (insn)
4231 || AARCH64_LDSTP_PI (insn)
4232 || AARCH64_LDSTP_O (insn)
4233 || AARCH64_LDSTP_PRE (insn))
4234 {
4235 *pair = TRUE;
4236 *rt = AARCH64_RT (insn);
3d14faea 4237 *rt2 = AARCH64_RT2 (insn);
68fcca92
JW		 4238 *load = AARCH64_LD (insn);
4239 return TRUE;
4240 }
4241 else if (AARCH64_LDST_PCREL (insn)
4242 || AARCH64_LDST_UI (insn)
4243 || AARCH64_LDST_PIIMM (insn)
4244 || AARCH64_LDST_U (insn)
4245 || AARCH64_LDST_PREIMM (insn)
4246 || AARCH64_LDST_RO (insn)
4247 || AARCH64_LDST_UIMM (insn))
4248 {
4249 *rt = AARCH64_RT (insn);
3d14faea 4250 *rt2 = *rt;
68fcca92
JW		 4251 if (AARCH64_LDST_PCREL (insn))
4252 *load = TRUE;
4253 opc = AARCH64_BITS (insn, 22, 2);
4254 v = AARCH64_BIT (insn, 26);
4255 opc_v = opc | (v << 2);
4256 *load = (opc_v == 1 || opc_v == 2 || opc_v == 3
4257 || opc_v == 5 || opc_v == 7);
4258 return TRUE;
4259 }
4260 else if (AARCH64_LDST_SIMD_M (insn)
4261 || AARCH64_LDST_SIMD_M_PI (insn))
4262 {
4263 *rt = AARCH64_RT (insn);
4264 *load = AARCH64_BIT (insn, 22);
4265 opcode = (insn >> 12) & 0xf;
4266 switch (opcode)
4267 {
4268 case 0:
4269 case 2:
3d14faea 4270 *rt2 = *rt + 3;
68fcca92
JW		 4271 break;
4272
4273 case 4:
4274 case 6:
3d14faea 4275 *rt2 = *rt + 2;
68fcca92
JW		 4276 break;
4277
4278 case 7:
3d14faea 4279 *rt2 = *rt;
68fcca92
JW		 4280 break;
4281
4282 case 8:
4283 case 10:
3d14faea 4284 *rt2 = *rt + 1;
68fcca92
JW		 4285 break;
4286
4287 default:
4288 return FALSE;
4289 }
4290 return TRUE;
4291 }
4292 else if (AARCH64_LDST_SIMD_S (insn)
4293 || AARCH64_LDST_SIMD_S_PI (insn))
4294 {
4295 *rt = AARCH64_RT (insn);
4296 r = (insn >> 21) & 1;
4297 *load = AARCH64_BIT (insn, 22);
4298 opcode = (insn >> 13) & 0x7;
4299 switch (opcode)
4300 {
4301 case 0:
4302 case 2:
4303 case 4:
3d14faea 4304 *rt2 = *rt + r;
68fcca92
JW		 4305 break;
4306
4307 case 1:
4308 case 3:
4309 case 5:
3d14faea 4310 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW		 4311 break;
4312
4313 case 6:
3d14faea 4314 *rt2 = *rt + r;
68fcca92
JW		 4315 break;
4316
4317 case 7:
3d14faea 4318 *rt2 = *rt + (r == 0 ? 2 : 3);
68fcca92
JW		 4319 break;
4320
4321 default:
4322 return FALSE;
4323 }
4324 return TRUE;
4325 }
4326
4327 return FALSE;
4328}
4329
4330/* Return TRUE if INSN is multiply-accumulate. */
4331
4332static bfd_boolean
4333aarch64_mlxl_p (uint32_t insn)
4334{
4335 uint32_t op31 = AARCH64_OP31 (insn);
4336
4337 if (AARCH64_MAC (insn)
4338 && (op31 == 0 || op31 == 1 || op31 == 5)
4339 /* Exclude MUL instructions which are encoded as a multiple accumulate
4340 with RA = XZR. */
4341 && AARCH64_RA (insn) != AARCH64_ZR)
4342 return TRUE;
4343
4344 return FALSE;
4345}
4346
4347/* Some early revisions of the Cortex-A53 have an erratum (835769) whereby
4348 it is possible for a 64-bit multiply-accumulate instruction to generate an
4349 incorrect result. The details are quite complex and hard to
4350 determine statically, since branches in the code may exist in some
4351 circumstances, but all cases end with a memory (load, store, or
4352 prefetch) instruction followed immediately by the multiply-accumulate
4353 operation. We employ a linker patching technique, by moving the potentially
4354 affected multiply-accumulate instruction into a patch region and replacing
4355 the original instruction with a branch to the patch. This function checks
4356 if INSN_1 is the memory operation followed by a multiply-accumulate
4357 operation (INSN_2). Return TRUE if an erratum sequence is found, FALSE
4358 if INSN_1 and INSN_2 are safe. */
4359
4360static bfd_boolean
4361aarch64_erratum_sequence (uint32_t insn_1, uint32_t insn_2)
4362{
4363 uint32_t rt;
3d14faea 4364 uint32_t rt2;
68fcca92
JW		 4365 uint32_t rn;
4366 uint32_t rm;
4367 uint32_t ra;
4368 bfd_boolean pair;
4369 bfd_boolean load;
4370
4371 if (aarch64_mlxl_p (insn_2)
3d14faea 4372 && aarch64_mem_op_p (insn_1, &rt, &rt2, &pair, &load))
68fcca92
JW		 4373 {
4374 /* Any SIMD memory op is independent of the subsequent MLA
4375 by definition of the erratum. */
4376 if (AARCH64_BIT (insn_1, 26))
4377 return TRUE;
4378
4379 /* If not SIMD, check for integer memory ops and MLA relationship. */
4380 rn = AARCH64_RN (insn_2);
4381 ra = AARCH64_RA (insn_2);
4382 rm = AARCH64_RM (insn_2);
4383
4384 /* If this is a load and there's a true(RAW) dependency, we are safe
4385 and this is not an erratum sequence. */
4386 if (load &&
4387 (rt == rn || rt == rm || rt == ra
3d14faea 4388 || (pair && (rt2 == rn || rt2 == rm || rt2 == ra))))
68fcca92
JW		 4389 return FALSE;
4390
4391 /* We conservatively put out stubs for all other cases (including
4392 writebacks). */
4393 return TRUE;
4394 }
4395
4396 return FALSE;
4397}
4398
2144188d 4399
35fee8b7
MS		 4400static char *
4401_bfd_aarch64_erratum_835769_stub_name (unsigned num_fixes)
4402{
4403 char *stub_name = (char *) bfd_malloc
4404 (strlen ("__erratum_835769_veneer_") + 16);
bb69498c
NC		 4405 if (stub_name != NULL)
4406 sprintf (stub_name,"__erratum_835769_veneer_%d", num_fixes);
35fee8b7
MS		 4407 return stub_name;
4408}
4409
4106101c 4410/* Scan for Cortex-A53 erratum 835769 sequence.
2144188d
MS		 4411
4412 Return TRUE else FALSE on abnormal termination. */
4413
68fcca92 4414static bfd_boolean
5421cc6e
MS		 4415_bfd_aarch64_erratum_835769_scan (bfd *input_bfd,
4416 struct bfd_link_info *info,
4417 unsigned int *num_fixes_p)
68fcca92
JW		 4418{
4419 asection *section;
4420 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 4421 unsigned int num_fixes = *num_fixes_p;
68fcca92
JW		 4422
4423 if (htab == NULL)
2144188d 4424 return TRUE;
68fcca92
JW		 4425
4426 for (section = input_bfd->sections;
4427 section != NULL;
4428 section = section->next)
4429 {
4430 bfd_byte *contents = NULL;
4431 struct _aarch64_elf_section_data *sec_data;
4432 unsigned int span;
4433
4434 if (elf_section_type (section) != SHT_PROGBITS
4435 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4436 || (section->flags & SEC_EXCLUDE) != 0
4437 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4438 || (section->output_section == bfd_abs_section_ptr))
4439 continue;
4440
4441 if (elf_section_data (section)->this_hdr.contents != NULL)
4442 contents = elf_section_data (section)->this_hdr.contents;
4443 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
2144188d 4444 return FALSE;
68fcca92
JW		 4445
4446 sec_data = elf_aarch64_section_data (section);
520c7b56 4447
ccf61261
NC		 4448 if (sec_data->mapcount)
4449 qsort (sec_data->map, sec_data->mapcount,
4450 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
520c7b56 4451
68fcca92
JW		 4452 for (span = 0; span < sec_data->mapcount; span++)
4453 {
4454 unsigned int span_start = sec_data->map[span].vma;
4455 unsigned int span_end = ((span == sec_data->mapcount - 1)
4456 ? sec_data->map[0].vma + section->size
4457 : sec_data->map[span + 1].vma);
4458 unsigned int i;
4459 char span_type = sec_data->map[span].type;
4460
4461 if (span_type == 'd')
4462 continue;
4463
4464 for (i = span_start; i + 4 < span_end; i += 4)
4465 {
4466 uint32_t insn_1 = bfd_getl32 (contents + i);
4467 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4468
4469 if (aarch64_erratum_sequence (insn_1, insn_2))
4470 {
5421cc6e 4471 struct elf_aarch64_stub_hash_entry *stub_entry;
35fee8b7
MS		 4472 char *stub_name = _bfd_aarch64_erratum_835769_stub_name (num_fixes);
4473 if (! stub_name)
2144188d 4474 return FALSE;
68fcca92 4475
5421cc6e
MS		 4476 stub_entry = _bfd_aarch64_add_stub_entry_in_group (stub_name,
4477 section,
4478 htab);
4479 if (! stub_entry)
4480 return FALSE;
68fcca92 4481
5421cc6e
MS		 4482 stub_entry->stub_type = aarch64_stub_erratum_835769_veneer;
4483 stub_entry->target_section = section;
4484 stub_entry->target_value = i + 4;
4485 stub_entry->veneered_insn = insn_2;
4486 stub_entry->output_name = stub_name;
68fcca92
JW		 4487 num_fixes++;
4488 }
4489 }
4490 }
4491 if (elf_section_data (section)->this_hdr.contents == NULL)
4492 free (contents);
4493 }
4494
357d1523
MS		 4495 *num_fixes_p = num_fixes;
4496
2144188d 4497 return TRUE;
68fcca92
JW		 4498}
4499
13f622ec 4500
4106101c
MS		 4501/* Test if instruction INSN is ADRP. */
4502
4503static bfd_boolean
4504_bfd_aarch64_adrp_p (uint32_t insn)
4505{
9fca35fc 4506 return ((insn & AARCH64_ADRP_OP_MASK) == AARCH64_ADRP_OP);
4106101c
MS		 4507}
4508
4509
4510/* Helper predicate to look for cortex-a53 erratum 843419 sequence 1. */
4511
4512static bfd_boolean
4513_bfd_aarch64_erratum_843419_sequence_p (uint32_t insn_1, uint32_t insn_2,
4514 uint32_t insn_3)
4515{
4516 uint32_t rt;
4517 uint32_t rt2;
4518 bfd_boolean pair;
4519 bfd_boolean load;
4520
4521 return (aarch64_mem_op_p (insn_2, &rt, &rt2, &pair, &load)
4522 && (!pair
4523 || (pair && !load))
4524 && AARCH64_LDST_UIMM (insn_3)
4525 && AARCH64_RN (insn_3) == AARCH64_RD (insn_1));
4526}
4527
4528
4529/* Test for the presence of Cortex-A53 erratum 843419 instruction sequence.
4530
4531 Return TRUE if section CONTENTS at offset I contains one of the
4532 erratum 843419 sequences, otherwise return FALSE. If a sequence is
4533 seen set P_VENEER_I to the offset of the final LOAD/STORE
4534 instruction in the sequence.
4535 */
4536
4537static bfd_boolean
4538_bfd_aarch64_erratum_843419_p (bfd_byte *contents, bfd_vma vma,
4539 bfd_vma i, bfd_vma span_end,
4540 bfd_vma *p_veneer_i)
4541{
4542 uint32_t insn_1 = bfd_getl32 (contents + i);
4543
4544 if (!_bfd_aarch64_adrp_p (insn_1))
4545 return FALSE;
4546
4547 if (span_end < i + 12)
4548 return FALSE;
4549
4550 uint32_t insn_2 = bfd_getl32 (contents + i + 4);
4551 uint32_t insn_3 = bfd_getl32 (contents + i + 8);
4552
4553 if ((vma & 0xfff) != 0xff8 && (vma & 0xfff) != 0xffc)
4554 return FALSE;
4555
4556 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_3))
4557 {
4558 *p_veneer_i = i + 8;
4559 return TRUE;
4560 }
4561
4562 if (span_end < i + 16)
4563 return FALSE;
4564
4565 uint32_t insn_4 = bfd_getl32 (contents + i + 12);
4566
4567 if (_bfd_aarch64_erratum_843419_sequence_p (insn_1, insn_2, insn_4))
4568 {
4569 *p_veneer_i = i + 12;
4570 return TRUE;
4571 }
4572
4573 return FALSE;
4574}
4575
4576
13f622ec
MS		 4577/* Resize all stub sections. */
4578
4579static void
4580_bfd_aarch64_resize_stubs (struct elf_aarch64_link_hash_table *htab)
4581{
4582 asection *section;
4583
4584 /* OK, we've added some stubs. Find out the new size of the
4585 stub sections. */
4586 for (section = htab->stub_bfd->sections;
4587 section != NULL; section = section->next)
4588 {
4589 /* Ignore non-stub sections. */
4590 if (!strstr (section->name, STUB_SUFFIX))
4591 continue;
4592 section->size = 0;
4593 }
4594
4595 bfd_hash_traverse (&htab->stub_hash_table, aarch64_size_one_stub, htab);
13f622ec 4596
61865519
MS		 4597 for (section = htab->stub_bfd->sections;
4598 section != NULL; section = section->next)
4599 {
4600 if (!strstr (section->name, STUB_SUFFIX))
4601 continue;
4602
9a2ebffd
JW		 4603 /* Add space for a branch. Add 8 bytes to keep section 8 byte aligned,
4604 as long branch stubs contain a 64-bit address. */
61865519 4605 if (section->size)
9a2ebffd 4606 section->size += 8;
4106101c
MS		 4607
4608 /* Ensure all stub sections have a size which is a multiple of
4609 4096. This is important in order to ensure that the insertion
4610 of stub sections does not in itself move existing code around
739b5c9c
TC		 4611 in such a way that new errata sequences are created. We only do this
4612 when the ADRP workaround is enabled. If only the ADR workaround is
4613 enabled then the stubs workaround won't ever be used. */
4614 if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS		 4615 if (section->size)
4616 section->size = BFD_ALIGN (section->size, 0x1000);
4617 }
4618}
4619
9a2ebffd 4620/* Construct an erratum 843419 workaround stub name. */
4106101c
MS		 4621
4622static char *
4623_bfd_aarch64_erratum_843419_stub_name (asection *input_section,
4624 bfd_vma offset)
4625{
4626 const bfd_size_type len = 8 + 4 + 1 + 8 + 1 + 16 + 1;
4627 char *stub_name = bfd_malloc (len);
4628
4629 if (stub_name != NULL)
4630 snprintf (stub_name, len, "e843419@%04x_%08x_%" BFD_VMA_FMT "x",
4631 input_section->owner->id,
4632 input_section->id,
4633 offset);
4634 return stub_name;
4635}
4636
4637/* Build a stub_entry structure describing an 843419 fixup.
4638
4639 The stub_entry constructed is populated with the bit pattern INSN
4640 of the instruction located at OFFSET within input SECTION.
4641
4642 Returns TRUE on success. */
4643
4644static bfd_boolean
4645_bfd_aarch64_erratum_843419_fixup (uint32_t insn,
4646 bfd_vma adrp_offset,
4647 bfd_vma ldst_offset,
4648 asection *section,
4649 struct bfd_link_info *info)
4650{
4651 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4652 char *stub_name;
4653 struct elf_aarch64_stub_hash_entry *stub_entry;
4654
4655 stub_name = _bfd_aarch64_erratum_843419_stub_name (section, ldst_offset);
bb69498c
NC		 4656 if (stub_name == NULL)
4657 return FALSE;
4106101c
MS		 4658 stub_entry = aarch64_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4659 FALSE, FALSE);
4660 if (stub_entry)
4661 {
4662 free (stub_name);
4663 return TRUE;
4664 }
4665
4666 /* We always place an 843419 workaround veneer in the stub section
4667 attached to the input section in which an erratum sequence has
4668 been found. This ensures that later in the link process (in
4669 elfNN_aarch64_write_section) when we copy the veneered
4670 instruction from the input section into the stub section the
4671 copied instruction will have had any relocations applied to it.
4672 If we placed workaround veneers in any other stub section then we
4673 could not assume that all relocations have been processed on the
4674 corresponding input section at the point we output the stub
bb69498c 4675 section. */
4106101c
MS		 4676
4677 stub_entry = _bfd_aarch64_add_stub_entry_after (stub_name, section, htab);
4678 if (stub_entry == NULL)
4679 {
4680 free (stub_name);
4681 return FALSE;
4682 }
4683
4684 stub_entry->adrp_offset = adrp_offset;
4685 stub_entry->target_value = ldst_offset;
4686 stub_entry->target_section = section;
4687 stub_entry->stub_type = aarch64_stub_erratum_843419_veneer;
4688 stub_entry->veneered_insn = insn;
4689 stub_entry->output_name = stub_name;
4690
4691 return TRUE;
4692}
4693
4694
4695/* Scan an input section looking for the signature of erratum 843419.
4696
4697 Scans input SECTION in INPUT_BFD looking for erratum 843419
4698 signatures, for each signature found a stub_entry is created
4699 describing the location of the erratum for subsequent fixup.
4700
4701 Return TRUE on successful scan, FALSE on failure to scan.
4702 */
4703
4704static bfd_boolean
4705_bfd_aarch64_erratum_843419_scan (bfd *input_bfd, asection *section,
4706 struct bfd_link_info *info)
4707{
4708 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4709
4710 if (htab == NULL)
4711 return TRUE;
4712
4713 if (elf_section_type (section) != SHT_PROGBITS
4714 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4715 || (section->flags & SEC_EXCLUDE) != 0
4716 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4717 || (section->output_section == bfd_abs_section_ptr))
4718 return TRUE;
4719
4720 do
4721 {
4722 bfd_byte *contents = NULL;
4723 struct _aarch64_elf_section_data *sec_data;
4724 unsigned int span;
4725
4726 if (elf_section_data (section)->this_hdr.contents != NULL)
4727 contents = elf_section_data (section)->this_hdr.contents;
4728 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4729 return FALSE;
4730
4731 sec_data = elf_aarch64_section_data (section);
4732
ccf61261
NC		 4733 if (sec_data->mapcount)
4734 qsort (sec_data->map, sec_data->mapcount,
4735 sizeof (elf_aarch64_section_map), elf_aarch64_compare_mapping);
4106101c
MS		 4736
4737 for (span = 0; span < sec_data->mapcount; span++)
4738 {
4739 unsigned int span_start = sec_data->map[span].vma;
4740 unsigned int span_end = ((span == sec_data->mapcount - 1)
4741 ? sec_data->map[0].vma + section->size
4742 : sec_data->map[span + 1].vma);
4743 unsigned int i;
4744 char span_type = sec_data->map[span].type;
4745
4746 if (span_type == 'd')
4747 continue;
4748
4749 for (i = span_start; i + 8 < span_end; i += 4)
4750 {
4751 bfd_vma vma = (section->output_section->vma
4752 + section->output_offset
4753 + i);
4754 bfd_vma veneer_i;
4755
4756 if (_bfd_aarch64_erratum_843419_p
4757 (contents, vma, i, span_end, &veneer_i))
4758 {
4759 uint32_t insn = bfd_getl32 (contents + veneer_i);
4760
4761 if (!_bfd_aarch64_erratum_843419_fixup (insn, i, veneer_i,
4762 section, info))
4763 return FALSE;
4764 }
4765 }
4766 }
4767
4768 if (elf_section_data (section)->this_hdr.contents == NULL)
4769 free (contents);
61865519 4770 }
4106101c
MS		 4771 while (0);
4772
4773 return TRUE;
61865519 4774}
13f622ec 4775
7ff36d1a
SP		 4776static bfd_boolean
4777section_start_symbol (bfd *abfd ATTRIBUTE_UNUSED, asection *section,
4778 void *valp)
4779{
4780 return section->vma == *(bfd_vma *)valp;
4781}
4782
4783/* Capability format functions. */
4784
4785static unsigned
4786exponent (uint64_t len)
4787{
4788#define CAP_MAX_EXPONENT 50
4789 /* Size is a 65 bit value, so there's an implicit 0 MSB. */
4790 unsigned zeroes = __builtin_clzl (len) + 1;
4791
4792 /* All bits up to and including CAP_MW - 2 are zero. */
4793 if (CAP_MAX_EXPONENT < zeroes)
4794 return (unsigned) -1;
4795 else
4796 return CAP_MAX_EXPONENT - zeroes;
4797#undef CAP_MAX_EXPONENT
4798}
4799
dbd880c7 4800#define ONES(x) ((1ULL << (x)) - 1)
7ff36d1a
SP		 4801#define ALIGN_UP(x, a) (((x) + ONES (a)) & (~ONES (a)))
4802
4803static bfd_boolean
5a9e7a18 4804c64_valid_cap_range (bfd_vma *basep, bfd_vma *limitp, unsigned *alignmentp)
7ff36d1a
SP		 4805{
4806 bfd_vma base = *basep, size = *limitp - *basep;
4807
4808 unsigned e, old_e;
5a9e7a18 4809 *alignmentp = 1;
7ff36d1a
SP		 4810
4811 if ((e = exponent (size)) == (unsigned) -1)
4812 return TRUE;
4813
4814 size = ALIGN_UP (size, e + 3);
4815 old_e = e;
4816 e = exponent (size);
4817 if (old_e != e)
4818 size = ALIGN_UP (size, e + 3);
4819
4820 base = ALIGN_UP (base, e + 3);
4821
5a9e7a18 4822 *alignmentp = e+3;
7ff36d1a
SP		 4823 if (base == *basep && *limitp == base + size)
4824 return TRUE;
4825
4826 *basep = base;
4827 *limitp = base + size;
4828 return FALSE;
4829}
4830
4831struct sec_change_queue
4832{
4833 asection *sec;
4834 struct sec_change_queue *next;
4835};
4836
4837/* Queue up the change, sorted in order of the output section vma. */
4838
4839static void
4840queue_section_padding (struct sec_change_queue **queue, asection *sec)
4841{
4842 struct sec_change_queue *q = *queue, *last_q = NULL, *n;
4843
4844 while (q != NULL)
4845 {
4846 if (q->sec->vma > sec->vma)
4847 break;
4848 last_q = q;
4849 q = q->next;
4850 }
4851
4852 n = bfd_zmalloc (sizeof (struct sec_change_queue));
4853
4854 if (last_q == NULL)
4855 *queue = n;
4856 else
4857 {
4858 n->next = q;
4859 last_q->next = n;
4860 }
4861
4862 n->sec = sec;
4863}
4864
4865/* Check if the bounds covering all sections between LOW_SEC and HIGH_SEC will
4866 get rounded off in the Morello capability format and if it does, queue up a
4867 change to fix up the section layout. */
4868static inline void
4869record_section_change (asection *sec, struct sec_change_queue **queue)
4870{
4871 bfd_vma low = sec->vma;
4872 bfd_vma high = sec->vma + sec->size;
5a9e7a18 4873 unsigned alignment;
7ff36d1a 4874
b3d71cf9
MM		 4875 if (!c64_valid_cap_range (&low, &high, &alignment)
4876 || sec->alignment_power < alignment)
7ff36d1a
SP		 4877 queue_section_padding (queue, sec);
4878}
4879
4880/* Make sure that all capabilities that refer to sections have bounds that
4881 won't overlap with neighbouring sections. This is needed in two specific
4882 cases. The first case is that of PCC, which needs to span across all
5a9e7a18
MM		 4883 readonly sections as well as the GOT and PLT sections in the output binary.
4884 The second case is that of linker and ldscript defined symbols that indicate
4885 start and/or end of sections and/or zero-sized symbols.
7ff36d1a
SP		 4886
4887 In both cases, overlap of capability bounds are avoided by aligning the base
4888 of the section and if necessary, adding a pad at the end of the section so
4889 that the section following it starts only after the pad. */
4890
5fa80905
AC		 4891static bfd_vma pcc_low;
4892static bfd_vma pcc_high;
7ff36d1a
SP		 4893void
4894elfNN_c64_resize_sections (bfd *output_bfd, struct bfd_link_info *info,
4895 void (*c64_pad_section) (asection *, bfd_vma),
4896 void (*layout_sections_again) (void))
4897{
4898 asection *sec, *pcc_low_sec = NULL, *pcc_high_sec = NULL;
4899 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
4900 bfd_vma low = (bfd_vma) -1, high = 0;
2d99dff6 4901 bfd *input_bfd;
7ff36d1a
SP		 4902
4903 htab->layout_sections_again = layout_sections_again;
4904
4905 if (!htab->c64_output)
4906 return;
4907
4908 struct sec_change_queue *queue = NULL;
4909
4910 /* First, walk through all the relocations to find those referring to linker
4911 defined and ldscript defined symbols since we set their range to their
4912 output sections. */
2d99dff6 4913 for (input_bfd = info->input_bfds;
7ff36d1a
SP		 4914 htab->c64_rel && input_bfd != NULL; input_bfd = input_bfd->link.next)
4915 {
4916 Elf_Internal_Shdr *symtab_hdr;
4917
4918 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4919 if (symtab_hdr->sh_info == 0)
4920 continue;
4921
4922 for (sec = input_bfd->sections; sec != NULL; sec = sec->next)
4923 {
4924 Elf_Internal_Rela *irelaend, *irela;
4925
4926 /* If there aren't any relocs, then there's nothing more to do. */
4927 if ((sec->flags & SEC_RELOC) == 0 || sec->reloc_count == 0)
4928 continue;
4929
4930 irela = _bfd_elf_link_read_relocs (input_bfd, sec, NULL, NULL,
4931 info->keep_memory);
4932 if (irela == NULL)
4933 continue;
4934
4935 /* Now examine each relocation. */
4936 irelaend = irela + sec->reloc_count;
4937 for (; irela < irelaend; irela++)
4938 {
4939 unsigned int r_indx;
4940 struct elf_link_hash_entry *h;
4941 int e_indx;
4942 asection *os;
4943
4944 r_indx = ELFNN_R_SYM (irela->r_info);
4945
4946 /* Linker defined or linker script defined symbols are always in
4947 the symbol hash. */
4948 if (r_indx < symtab_hdr->sh_info)
4949 continue;
4950
4951 e_indx = r_indx - symtab_hdr->sh_info;
4952 h = elf_sym_hashes (input_bfd)[e_indx];
4953
4954 /* XXX Does this ever happen? */
4955 if (h == NULL)
4956 continue;
4957
4958 os = h->root.u.def.section->output_section;
4959
4960 if (h->root.linker_def)
4961 record_section_change (os, &queue);
4962 else if (h->root.ldscript_def)
4963 {
4964 const char *name = h->root.root.string;
4965 size_t len = strlen (name);
4966
4967 if (len > 8 && name[0] == '_' && name[1] == '_'
4968 && (!strncmp (name + 2, "start_", 6)
4969 || !strcmp (name + len - 6, "_start")))
7ff36d1a
SP		 4970 {
4971 bfd_vma value = os->vma + os->size;
4972
4973 os = bfd_sections_find_if (info->output_bfd,
4974 section_start_symbol, &value);
4975
4976 if (os != NULL)
4977 record_section_change (os, &queue);
4978 }
4979 /* XXX We're overfitting here because the offset of H within
4980 the output section is not yet resolved and ldscript
4981 defined symbols do not have input section information. */
4982 else
4983 record_section_change (os, &queue);
4984 }
4985 }
4986 }
4987 }
4988
4989 /* Next, walk through output sections to find the PCC span and add a padding
4990 at the end to ensure that PCC bounds don't bleed into neighbouring
4991 sections. For now PCC needs to encompass all code sections, .got, .plt
4992 and .got.plt. */
4993 for (sec = output_bfd->sections; sec != NULL; sec = sec->next)
4994 {
4995 /* XXX This is a good place to figure out if there are any readable or
4996 writable sections in the PCC range that are not in the list of
4997 sections we want the PCC to span and then warn the user of it. */
4998
4999#define NOT_OP_SECTION(s) ((s) == NULL || (s)->output_section != sec)
5000
0e02111b 5001 if ((sec->flags & SEC_READONLY) == 0
7ff36d1a
SP		 5002 && NOT_OP_SECTION (htab->root.sgotplt)
5003 && NOT_OP_SECTION (htab->root.igotplt)
5004 && NOT_OP_SECTION (htab->root.sgot)
5005 && NOT_OP_SECTION (htab->root.splt)
0e02111b
MM		 5006 && NOT_OP_SECTION (htab->root.iplt)
5007 && (sec->vma < info->relro_start
5008 || sec->vma >= info->relro_end))
5009 continue;
5010 if ((sec->flags & SEC_ALLOC) == 0)
7ff36d1a
SP		 5011 continue;
5012
5013 if (sec->vma < low)
5014 {
5015 low = sec->vma;
5016 pcc_low_sec = sec;
5017 }
5018 if (sec->vma + sec->size > high)
5019 {
5020 high = sec->vma + sec->size;
5021 pcc_high_sec = sec;
5022 }
5023
5024#undef NOT_OP_SECTION
5025 }
5026
5027 /* Sequentially add alignment and padding as required. We also need to
5028 account for the PCC-related alignment and padding here since its
5029 requirements could change based on the range of sections it encompasses
5030 and whether they need to be padded or aligned. */
5031 while (queue)
5032 {
5033 unsigned align = 0;
5034 bfd_vma padding = 0;
5035
5036 low = queue->sec->vma;
5037 high = queue->sec->vma + queue->sec->size;
5038
5a9e7a18 5039 if (!c64_valid_cap_range (&low, &high, &align))
7ff36d1a 5040 {
2d3eb3ca 5041 padding = high - low - queue->sec->size;
7ff36d1a
SP		 5042
5043 if (queue->sec != pcc_high_sec)
5044 {
5045 c64_pad_section (queue->sec, padding);
5046 padding = 0;
5047 }
5048 }
b3d71cf9
MM		 5049 if (queue->sec->alignment_power < align)
5050 queue->sec->alignment_power = align;
7ff36d1a
SP		 5051
5052 /* If we have crossed all sections within the PCC range, set up alignment
5053 and padding for the PCC range. */
5054 if (pcc_high_sec != NULL && pcc_low_sec != NULL
5055 && (queue->next == NULL
5056 || queue->next->sec->vma > pcc_high_sec->vma))
5057 {
5058 /* Layout sections since it affects the final range of PCC. */
5059 (*htab->layout_sections_again) ();
5060
5fa80905
AC		 5061 pcc_low = pcc_low_sec->vma;
5062 pcc_high = pcc_high_sec->vma + pcc_high_sec->size + padding;
7ff36d1a 5063
5a9e7a18 5064 if (!c64_valid_cap_range (&pcc_low, &pcc_high, &align))
7ff36d1a 5065 {
2d3eb3ca
MM		 5066 bfd_vma current_length =
5067 (pcc_high_sec->vma + pcc_high_sec->size) - pcc_low_sec->vma;
5068 bfd_vma desired_length = (pcc_high - pcc_low);
5069 padding = desired_length - current_length;
7ff36d1a
SP		 5070 c64_pad_section (pcc_high_sec, padding);
5071 }
b3d71cf9
MM		 5072 if (pcc_low_sec->alignment_power < align)
5073 pcc_low_sec->alignment_power = align;
7ff36d1a
SP		 5074 }
5075
5076 (*htab->layout_sections_again) ();
5077
5078 struct sec_change_queue *queue_free = queue;
5079
5080 queue = queue->next;
5081 free (queue_free);
5082 }
5fa80905
AC		 5083
5084 if (pcc_low_sec)
5085 {
5086 if (!pcc_high_sec)
5087 abort ();
5088 pcc_low = pcc_low_sec->vma;
5089 pcc_high = pcc_high_sec->vma + pcc_high_sec->size;
5090 }
7ff36d1a 5091}
4106101c 5092
a06ea964
NC		 5093/* Determine and set the size of the stub section for a final link.
5094
5095 The basic idea here is to examine all the relocations looking for
50e192f0
SP		 5096 PC-relative calls to a target that either needs a PE state change (A64 to
5097 C64 or vice versa) or in case of unconditional branches (B/BL), is
5098 unreachable. */
a06ea964
NC		 5099
5100bfd_boolean
cec5225b 5101elfNN_aarch64_size_stubs (bfd *output_bfd,
a06ea964
NC		 5102 bfd *stub_bfd,
5103 struct bfd_link_info *info,
5104 bfd_signed_vma group_size,
5105 asection * (*add_stub_section) (const char *,
5106 asection *),
5107 void (*layout_sections_again) (void))
5108{
5109 bfd_size_type stub_group_size;
5110 bfd_boolean stubs_always_before_branch;
5421cc6e 5111 bfd_boolean stub_changed = FALSE;
cec5225b 5112 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
68fcca92 5113 unsigned int num_erratum_835769_fixes = 0;
a06ea964
NC		 5114
5115 /* Propagate mach to stub bfd, because it may not have been
5116 finalized when we created stub_bfd. */
5117 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5118 bfd_get_mach (output_bfd));
5119
5120 /* Stash our params away. */
5121 htab->stub_bfd = stub_bfd;
5122 htab->add_stub_section = add_stub_section;
5123 htab->layout_sections_again = layout_sections_again;
5124 stubs_always_before_branch = group_size < 0;
5125 if (group_size < 0)
5126 stub_group_size = -group_size;
5127 else
5128 stub_group_size = group_size;
5129
5130 if (stub_group_size == 1)
5131 {
5132 /* Default values. */
b9eead84 5133 /* AArch64 branch range is +-128MB. The value used is 1MB less. */
a06ea964
NC		 5134 stub_group_size = 127 * 1024 * 1024;
5135 }
5136
5137 group_sections (htab, stub_group_size, stubs_always_before_branch);
5138
4106101c
MS		 5139 (*htab->layout_sections_again) ();
5140
5421cc6e
MS		 5141 if (htab->fix_erratum_835769)
5142 {
5143 bfd *input_bfd;
5144
5145 for (input_bfd = info->input_bfds;
5146 input_bfd != NULL; input_bfd = input_bfd->link.next)
8c803a2d
AM		 5147 {
5148 if (!is_aarch64_elf (input_bfd)
5149 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5150 continue;
5151
5152 if (!_bfd_aarch64_erratum_835769_scan (input_bfd, info,
5153 &num_erratum_835769_fixes))
5154 return FALSE;
5155 }
5421cc6e 5156
4106101c
MS		 5157 _bfd_aarch64_resize_stubs (htab);
5158 (*htab->layout_sections_again) ();
5159 }
5160
739b5c9c 5161 if (htab->fix_erratum_843419 != ERRAT_NONE)
4106101c
MS		 5162 {
5163 bfd *input_bfd;
5164
5165 for (input_bfd = info->input_bfds;
5166 input_bfd != NULL;
5167 input_bfd = input_bfd->link.next)
5168 {
5169 asection *section;
5170
8c803a2d
AM		 5171 if (!is_aarch64_elf (input_bfd)
5172 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5173 continue;
5174
4106101c
MS		 5175 for (section = input_bfd->sections;
5176 section != NULL;
5177 section = section->next)
5178 if (!_bfd_aarch64_erratum_843419_scan (input_bfd, section, info))
5179 return FALSE;
5180 }
5181
5182 _bfd_aarch64_resize_stubs (htab);
5183 (*htab->layout_sections_again) ();
5421cc6e
MS		 5184 }
5185
a06ea964
NC		 5186 while (1)
5187 {
5188 bfd *input_bfd;
a06ea964 5189
9b9971aa
MS		 5190 for (input_bfd = info->input_bfds;
5191 input_bfd != NULL; input_bfd = input_bfd->link.next)
a06ea964
NC		 5192 {
5193 Elf_Internal_Shdr *symtab_hdr;
5194 asection *section;
a06ea964 5195
8c803a2d
AM		 5196 if (!is_aarch64_elf (input_bfd)
5197 || (input_bfd->flags & BFD_LINKER_CREATED) != 0)
5198 continue;
5199
a06ea964
NC		 5200 /* We'll need the symbol table in a second. */
5201 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5202 if (symtab_hdr->sh_info == 0)
5203 continue;
5204
5205 /* Walk over each section attached to the input bfd. */
5206 for (section = input_bfd->sections;
5207 section != NULL; section = section->next)
5208 {
5209 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5210
5211 /* If there aren't any relocs, then there's nothing more
5212 to do. */
5213 if ((section->flags & SEC_RELOC) == 0
5214 || section->reloc_count == 0
5215 || (section->flags & SEC_CODE) == 0)
5216 continue;
5217
5218 /* If this section is a link-once section that will be
5219 discarded, then don't create any stubs. */
5220 if (section->output_section == NULL
5221 || section->output_section->owner != output_bfd)
5222 continue;
5223
5224 /* Get the relocs. */
5225 internal_relocs
5226 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5227 NULL, info->keep_memory);
5228 if (internal_relocs == NULL)
5229 goto error_ret_free_local;
5230
5231 /* Now examine each relocation. */
5232 irela = internal_relocs;
5233 irelaend = irela + section->reloc_count;
5234 for (; irela < irelaend; irela++)
5235 {
5236 unsigned int r_type, r_indx;
50e192f0 5237 enum elf_aarch64_stub_type stub_type = aarch64_stub_none;
cec5225b 5238 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC		 5239 asection *sym_sec;
5240 bfd_vma sym_value;
5241 bfd_vma destination;
cec5225b 5242 struct elf_aarch64_link_hash_entry *hash;
a06ea964
NC		 5243 const char *sym_name;
5244 char *stub_name;
5245 const asection *id_sec;
5246 unsigned char st_type;
5247 bfd_size_type len;
50e192f0
SP		 5248 unsigned branch_to_c64 = FALSE;
5249 const char *suffix;
a06ea964 5250
cec5225b
YZ		 5251 r_type = ELFNN_R_TYPE (irela->r_info);
5252 r_indx = ELFNN_R_SYM (irela->r_info);
a06ea964
NC		 5253
5254 if (r_type >= (unsigned int) R_AARCH64_end)
5255 {
5256 bfd_set_error (bfd_error_bad_value);
5257 error_ret_free_internal:
5258 if (elf_section_data (section)->relocs == NULL)
5259 free (internal_relocs);
5260 goto error_ret_free_local;
5261 }
5262
5263 /* Only look for stubs on unconditional branch and
5264 branch and link instructions. */
50e192f0 5265 if (!aarch64_branch_reloc_p (r_type))
a06ea964
NC		 5266 continue;
5267
5268 /* Now determine the call target, its name, value,
5269 section. */
5270 sym_sec = NULL;
5271 sym_value = 0;
5272 destination = 0;
5273 hash = NULL;
5274 sym_name = NULL;
5275 if (r_indx < symtab_hdr->sh_info)
5276 {
5277 /* It's a local symbol. */
f0070c1e
SP		 5278 Elf_Internal_Sym *sym =
5279 bfd_sym_from_r_symndx (&htab->root.sym_cache,
5280 input_bfd, r_indx);
5281 if (sym == NULL)
5282 goto error_ret_free_internal;
a06ea964 5283
50e192f0
SP		 5284 branch_to_c64 |= (sym->st_target_internal
5285 & ST_BRANCH_TO_C64);
5286
f0070c1e
SP		 5287 Elf_Internal_Shdr *hdr =
5288 elf_elfsections (input_bfd)[sym->st_shndx];
a06ea964 5289
a06ea964
NC		 5290 sym_sec = hdr->bfd_section;
5291 if (!sym_sec)
5292 /* This is an undefined symbol. It can never
5293 be resolved. */
5294 continue;
5295
5296 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5297 sym_value = sym->st_value;
5298 destination = (sym_value + irela->r_addend
5299 + sym_sec->output_offset
5300 + sym_sec->output_section->vma);
5301 st_type = ELF_ST_TYPE (sym->st_info);
5302 sym_name
5303 = bfd_elf_string_from_elf_section (input_bfd,
5304 symtab_hdr->sh_link,
5305 sym->st_name);
50e192f0
SP		 5306
5307 /* Get the interworking stub if needed. */
5308 stub_type = aarch64_interwork_stub (r_type,
5309 branch_to_c64);
a06ea964
NC		 5310 }
5311 else
5312 {
5313 int e_indx;
50e192f0
SP		 5314 struct elf_aarch64_link_hash_table *globals =
5315 elf_aarch64_hash_table (info);
a06ea964
NC		 5316
5317 e_indx = r_indx - symtab_hdr->sh_info;
cec5225b 5318 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC		 5319 elf_sym_hashes (input_bfd)[e_indx]);
5320
5321 while (hash->root.root.type == bfd_link_hash_indirect
5322 || hash->root.root.type == bfd_link_hash_warning)
cec5225b 5323 hash = ((struct elf_aarch64_link_hash_entry *)
a06ea964
NC		 5324 hash->root.root.u.i.link);
5325
50e192f0
SP		 5326 /* Static executable. */
5327 if (globals->root.splt == NULL || hash == NULL
5328 || hash->root.plt.offset == (bfd_vma) - 1)
5329 {
5330 branch_to_c64 |= (hash->root.target_internal
5331 & ST_BRANCH_TO_C64);
5332 stub_type = aarch64_interwork_stub (r_type,
5333 branch_to_c64);
5334 }
5335
a06ea964
NC		 5336 if (hash->root.root.type == bfd_link_hash_defined
5337 || hash->root.root.type == bfd_link_hash_defweak)
5338 {
a06ea964
NC		 5339 sym_sec = hash->root.root.u.def.section;
5340 sym_value = hash->root.root.u.def.value;
5341 /* For a destination in a shared library,
5342 use the PLT stub as target address to
5343 decide whether a branch stub is
5344 needed. */
5345 if (globals->root.splt != NULL && hash != NULL
5346 && hash->root.plt.offset != (bfd_vma) - 1)
5347 {
5348 sym_sec = globals->root.splt;
5349 sym_value = hash->root.plt.offset;
5350 if (sym_sec->output_section != NULL)
5351 destination = (sym_value
5352 + sym_sec->output_offset
5353 +
5354 sym_sec->output_section->vma);
5355 }
5356 else if (sym_sec->output_section != NULL)
5357 destination = (sym_value + irela->r_addend
5358 + sym_sec->output_offset
5359 + sym_sec->output_section->vma);
5360 }
5361 else if (hash->root.root.type == bfd_link_hash_undefined
5362 || (hash->root.root.type
5363 == bfd_link_hash_undefweak))
5364 {
5365 /* For a shared library, use the PLT stub as
5366 target address to decide whether a long
5367 branch stub is needed.
5368 For absolute code, they cannot be handled. */
a06ea964
NC		 5369
5370 if (globals->root.splt != NULL && hash != NULL
5371 && hash->root.plt.offset != (bfd_vma) - 1)
5372 {
5373 sym_sec = globals->root.splt;
5374 sym_value = hash->root.plt.offset;
5375 if (sym_sec->output_section != NULL)
5376 destination = (sym_value
5377 + sym_sec->output_offset
5378 +
5379 sym_sec->output_section->vma);
5380 }
5381 else
5382 continue;
5383 }
5384 else
5385 {
5386 bfd_set_error (bfd_error_bad_value);
5387 goto error_ret_free_internal;
5388 }
5389 st_type = ELF_ST_TYPE (hash->root.type);
5390 sym_name = hash->root.root.root.string;
5391 }
5392
5393 /* Determine what (if any) linker stub is needed. */
50e192f0
SP		 5394 if (stub_type == aarch64_stub_none)
5395 stub_type = aarch64_type_of_stub (section, irela, sym_sec,
5396 st_type, destination);
5397
a06ea964
NC		 5398 if (stub_type == aarch64_stub_none)
5399 continue;
5400
5401 /* Support for grouping stub sections. */
5402 id_sec = htab->stub_group[section->id].link_sec;
5403
5404 /* Get the name of this stub. */
cec5225b 5405 stub_name = elfNN_aarch64_stub_name (id_sec, sym_sec, hash,
50e192f0 5406 irela, stub_type);
a06ea964
NC		 5407 if (!stub_name)
5408 goto error_ret_free_internal;
5409
5410 stub_entry =
5411 aarch64_stub_hash_lookup (&htab->stub_hash_table,
5412 stub_name, FALSE, FALSE);
5413 if (stub_entry != NULL)
5414 {
5415 /* The proper stub has already been created. */
5416 free (stub_name);
3da64fe4
RA		 5417 /* Always update this stub's target since it may have
5418 changed after layout. */
5419 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP		 5420
5421 /* Set LSB for A64 to C64 branch. */
5422 if (branch_to_c64)
5423 stub_entry->target_value |= 1;
5424
a06ea964
NC		 5425 continue;
5426 }
5427
ef857521
MS		 5428 stub_entry = _bfd_aarch64_add_stub_entry_in_group
5429 (stub_name, section, htab);
a06ea964
NC		 5430 if (stub_entry == NULL)
5431 {
5432 free (stub_name);
5433 goto error_ret_free_internal;
5434 }
5435
2f340668 5436 stub_entry->target_value = sym_value + irela->r_addend;
50e192f0
SP		 5437 /* Set LSB for A64 to C64 branch. */
5438 if (branch_to_c64)
5439 stub_entry->target_value |= 1;
5440
a06ea964
NC		 5441 stub_entry->target_section = sym_sec;
5442 stub_entry->stub_type = stub_type;
5443 stub_entry->h = hash;
5444 stub_entry->st_type = st_type;
5445
50e192f0
SP		 5446 suffix = aarch64_lookup_stub_type_suffix (stub_type);
5447
a06ea964
NC		 5448 if (sym_name == NULL)
5449 sym_name = "unnamed";
50e192f0
SP		 5450 len = (sizeof (STUB_ENTRY_NAME) + strlen (sym_name)
5451 + strlen (suffix));
a06ea964
NC		 5452 stub_entry->output_name = bfd_alloc (htab->stub_bfd, len);
5453 if (stub_entry->output_name == NULL)
5454 {
5455 free (stub_name);
5456 goto error_ret_free_internal;
5457 }
5458
5459 snprintf (stub_entry->output_name, len, STUB_ENTRY_NAME,
50e192f0 5460 sym_name, suffix);
a06ea964
NC		 5461
5462 stub_changed = TRUE;
5463 }
5464
5465 /* We're done with the internal relocs, free them. */
5466 if (elf_section_data (section)->relocs == NULL)
5467 free (internal_relocs);
5468 }
5469 }
5470
5471 if (!stub_changed)
5472 break;
5473
13f622ec 5474 _bfd_aarch64_resize_stubs (htab);
a06ea964
NC		 5475
5476 /* Ask the linker to do its stuff. */
5477 (*htab->layout_sections_again) ();
5478 stub_changed = FALSE;
5479 }
5480
5481 return TRUE;
5482
dc1e8a47 5483 error_ret_free_local:
a06ea964
NC		 5484 return FALSE;
5485}
5486
5487/* Build all the stubs associated with the current output file. The
5488 stubs are kept in a hash table attached to the main linker hash
5489 table. We also set up the .plt entries for statically linked PIC
5490 functions here. This function is called via aarch64_elf_finish in the
5491 linker. */
5492
5493bfd_boolean
cec5225b 5494elfNN_aarch64_build_stubs (struct bfd_link_info *info)
a06ea964
NC		 5495{
5496 asection *stub_sec;
5497 struct bfd_hash_table *table;
cec5225b 5498 struct elf_aarch64_link_hash_table *htab;
a06ea964 5499
cec5225b 5500 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 5501
5502 for (stub_sec = htab->stub_bfd->sections;
5503 stub_sec != NULL; stub_sec = stub_sec->next)
5504 {
5505 bfd_size_type size;
5506
5507 /* Ignore non-stub sections. */
5508 if (!strstr (stub_sec->name, STUB_SUFFIX))
5509 continue;
5510
5511 /* Allocate memory to hold the linker stubs. */
5512 size = stub_sec->size;
5513 stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
5514 if (stub_sec->contents == NULL && size != 0)
5515 return FALSE;
5516 stub_sec->size = 0;
61865519 5517
9a2ebffd
JW		 5518 /* Add a branch around the stub section, and a nop, to keep it 8 byte
5519 aligned, as long branch stubs contain a 64-bit address. */
61865519 5520 bfd_putl32 (0x14000000 | (size >> 2), stub_sec->contents);
9a2ebffd
JW		 5521 bfd_putl32 (INSN_NOP, stub_sec->contents + 4);
5522 stub_sec->size += 8;
a06ea964
NC		 5523 }
5524
5525 /* Build the stubs as directed by the stub hash table. */
5526 table = &htab->stub_hash_table;
50e192f0
SP		 5527
5528 bfd_error_type save_error = bfd_get_error ();
5529 bfd_set_error (bfd_error_no_error);
a06ea964
NC		 5530 bfd_hash_traverse (table, aarch64_build_one_stub, info);
5531
50e192f0
SP		 5532 if (bfd_get_error () != bfd_error_no_error)
5533 return FALSE;
5534
5535 bfd_set_error (save_error);
5536
a06ea964
NC		 5537 return TRUE;
5538}
5539
5540
5541/* Add an entry to the code/data map for section SEC. */
5542
5543static void
f0070c1e
SP		 5544elfNN_aarch64_section_map_add (bfd *abfd, asection *sec, char type,
5545 bfd_vma vma)
a06ea964
NC		 5546{
5547 struct _aarch64_elf_section_data *sec_data =
cec5225b 5548 elf_aarch64_section_data (sec);
a06ea964
NC		 5549 unsigned int newidx;
5550
f0070c1e
SP		 5551 /* The aarch64 section hook was not called for this section. */
5552 if (!sec_data->elf.is_target_section_data)
5553 {
5554 struct _aarch64_elf_section_data *newdata =
5555 bfd_zalloc (abfd, sizeof (*newdata));
5556
5557 if (newdata == NULL)
5558 return;
5559
5560 newdata->elf = sec_data->elf;
5561 newdata->elf.is_target_section_data = TRUE;
5562 free (sec_data);
5563 sec->used_by_bfd = sec_data = newdata;
5564 }
5565
a06ea964
NC		 5566 if (sec_data->map == NULL)
5567 {
cec5225b 5568 sec_data->map = bfd_malloc (sizeof (elf_aarch64_section_map));
a06ea964
NC		 5569 sec_data->mapcount = 0;
5570 sec_data->mapsize = 1;
5571 }
5572
5573 newidx = sec_data->mapcount++;
5574
5575 if (sec_data->mapcount > sec_data->mapsize)
5576 {
5577 sec_data->mapsize *= 2;
5578 sec_data->map = bfd_realloc_or_free
cec5225b 5579 (sec_data->map, sec_data->mapsize * sizeof (elf_aarch64_section_map));
a06ea964
NC		 5580 }
5581
5582 if (sec_data->map)
5583 {
5584 sec_data->map[newidx].vma = vma;
5585 sec_data->map[newidx].type = type;
5586 }
5587}
5588
5589
5590/* Initialise maps of insn/data for input BFDs. */
5591void
7ff36d1a 5592bfd_elfNN_aarch64_init_maps (bfd *abfd, struct bfd_link_info *info)
a06ea964
NC		 5593{
5594 Elf_Internal_Sym *isymbuf;
5595 Elf_Internal_Shdr *hdr;
5596 unsigned int i, localsyms;
5597
5598 /* Make sure that we are dealing with an AArch64 elf binary. */
5599 if (!is_aarch64_elf (abfd))
5600 return;
5601
f0070c1e
SP		 5602 if (elf_aarch64_tdata (abfd)->secmaps_initialised)
5603 return;
5604
a06ea964 5605 if ((abfd->flags & DYNAMIC) != 0)
68fcca92 5606 return;
a06ea964
NC		 5607
5608 hdr = &elf_symtab_hdr (abfd);
5609 localsyms = hdr->sh_info;
5610
5611 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
5612 should contain the number of local symbols, which should come before any
5613 global symbols. Mapping symbols are always local. */
5614 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, NULL);
5615
5616 /* No internal symbols read? Skip this BFD. */
5617 if (isymbuf == NULL)
5618 return;
5619
7ff36d1a
SP		 5620 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table ((info));
5621
a06ea964
NC		 5622 for (i = 0; i < localsyms; i++)
5623 {
5624 Elf_Internal_Sym *isym = &isymbuf[i];
5625 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
5626 const char *name;
5627
5628 if (sec != NULL && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
5629 {
5630 name = bfd_elf_string_from_elf_section (abfd,
5631 hdr->sh_link,
5632 isym->st_name);
5633
5634 if (bfd_is_aarch64_special_symbol_name
5635 (name, BFD_AARCH64_SPECIAL_SYM_TYPE_MAP))
7ff36d1a
SP		 5636 {
5637 elfNN_aarch64_section_map_add (abfd, sec, name[1],
5638 isym->st_value);
5639 if (!htab->c64_output && name[1] == 'c')
5640 htab->c64_output = TRUE;
5641 }
a06ea964
NC		 5642 }
5643 }
f0070c1e 5644 elf_aarch64_tdata (abfd)->secmaps_initialised = TRUE;
a06ea964
NC		 5645}
5646
37c18eed
SD		 5647static void
5648setup_plt_values (struct bfd_link_info *link_info,
5649 aarch64_plt_type plt_type)
5650{
5651 struct elf_aarch64_link_hash_table *globals;
5652 globals = elf_aarch64_hash_table (link_info);
5653
e19e9199
SP		 5654 /* Set up plt stubs in case we need C64 PLT. Override BTI/PAC since they're
5655 not compatible. PLT stub sizes are the same as the default ones. */
5656 if (globals->c64_rel)
5657 {
5658 if (plt_type != PLT_NORMAL)
5659 _bfd_error_handler
5660 (_("ignoring C64-incompatible extensions: %s"),
5661 (plt_type == PLT_BTI_PAC ? "BTI, PAC"
5662 : plt_type == PLT_BTI ? "BTI" : "PAC"));
5663
5664 globals->plt0_entry = elfNN_c64_small_plt0_entry;
5665 globals->plt_entry = elfNN_c64_small_plt_entry;
5666 return;
5667 }
5668
1dbade74
SD		 5669 if (plt_type == PLT_BTI_PAC)
5670 {
68bb0359 5671 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
1dbade74
SD		 5672
5673 /* Only in ET_EXEC we need PLTn with BTI. */
5674 if (bfd_link_pde (link_info))
5675 {
5676 globals->plt_entry_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
5677 globals->plt_entry = elfNN_aarch64_small_plt_bti_pac_entry;
5678 }
5679 else
5680 {
5681 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
5682 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
5683 }
5684 }
5685 else if (plt_type == PLT_BTI)
37c18eed 5686 {
37c18eed 5687 globals->plt0_entry = elfNN_aarch64_small_plt0_bti_entry;
37c18eed
SD		 5688
5689 /* Only in ET_EXEC we need PLTn with BTI. */
5690 if (bfd_link_pde (link_info))
5691 {
5692 globals->plt_entry_size = PLT_BTI_SMALL_ENTRY_SIZE;
5693 globals->plt_entry = elfNN_aarch64_small_plt_bti_entry;
5694 }
5695 }
1dbade74
SD		 5696 else if (plt_type == PLT_PAC)
5697 {
1dbade74
SD		 5698 globals->plt_entry_size = PLT_PAC_SMALL_ENTRY_SIZE;
5699 globals->plt_entry = elfNN_aarch64_small_plt_pac_entry;
5700 }
37c18eed
SD		 5701}
5702
a06ea964
NC		 5703/* Set option values needed during linking. */
5704void
cec5225b 5705bfd_elfNN_aarch64_set_options (struct bfd *output_bfd,
a06ea964
NC		 5706 struct bfd_link_info *link_info,
5707 int no_enum_warn,
68fcca92 5708 int no_wchar_warn, int pic_veneer,
4106101c 5709 int fix_erratum_835769,
739b5c9c 5710 erratum_84319_opts fix_erratum_843419,
37c18eed
SD		 5711 int no_apply_dynamic_relocs,
5712 aarch64_bti_pac_info bp_info)
a06ea964 5713{
cec5225b 5714 struct elf_aarch64_link_hash_table *globals;
a06ea964 5715
cec5225b 5716 globals = elf_aarch64_hash_table (link_info);
a06ea964 5717 globals->pic_veneer = pic_veneer;
68fcca92 5718 globals->fix_erratum_835769 = fix_erratum_835769;
739b5c9c
TC		 5719 /* If the default options are used, then ERRAT_ADR will be set by default
5720 which will enable the ADRP->ADR workaround for the erratum 843419
5721 workaround. */
4106101c 5722 globals->fix_erratum_843419 = fix_erratum_843419;
1f56df9d 5723 globals->no_apply_dynamic_relocs = no_apply_dynamic_relocs;
a1bdea65 5724 globals->c64_rel = 0;
a06ea964
NC		 5725
5726 BFD_ASSERT (is_aarch64_elf (output_bfd));
5727 elf_aarch64_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
5728 elf_aarch64_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
37c18eed
SD		 5729
5730 switch (bp_info.bti_type)
5731 {
5732 case BTI_WARN:
5733 elf_aarch64_tdata (output_bfd)->no_bti_warn = 0;
5734 elf_aarch64_tdata (output_bfd)->gnu_and_prop
5735 |= GNU_PROPERTY_AARCH64_FEATURE_1_BTI;
5736 break;
5737
5738 default:
5739 break;
5740 }
5741 elf_aarch64_tdata (output_bfd)->plt_type = bp_info.plt_type;
f0070c1e 5742 elf_aarch64_tdata (output_bfd)->secmaps_initialised = FALSE;
a06ea964
NC		 5743}
5744
a06ea964
NC		 5745static bfd_vma
5746aarch64_calculate_got_entry_vma (struct elf_link_hash_entry *h,
cec5225b 5747 struct elf_aarch64_link_hash_table
a06ea964
NC		 5748 *globals, struct bfd_link_info *info,
5749 bfd_vma value, bfd *output_bfd,
5750 bfd_boolean *unresolved_reloc_p)
5751{
5752 bfd_vma off = (bfd_vma) - 1;
5753 asection *basegot = globals->root.sgot;
5754 bfd_boolean dyn = globals->root.dynamic_sections_created;
5755
5756 if (h != NULL)
5757 {
a6bb11b2 5758 BFD_ASSERT (basegot != NULL);
a06ea964
NC		 5759 off = h->got.offset;
5760 BFD_ASSERT (off != (bfd_vma) - 1);
0e1862bb
L		 5761 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5762 || (bfd_link_pic (info)
a06ea964
NC		 5763 && SYMBOL_REFERENCES_LOCAL (info, h))
5764 || (ELF_ST_VISIBILITY (h->other)
5765 && h->root.type == bfd_link_hash_undefweak))
5766 {
5767 /* This is actually a static link, or it is a -Bsymbolic link
5768 and the symbol is defined locally. We must initialize this
5769 entry in the global offset table. Since the offset must
a6bb11b2
YZ		 5770 always be a multiple of 8 (4 in the case of ILP32), we use
5771 the least significant bit to record whether we have
5772 initialized it already.
a06ea964
NC		 5773 When doing a dynamic link, we create a .rel(a).got relocation
5774 entry to initialize the value. This is done in the
5775 finish_dynamic_symbol routine. */
5776 if ((off & 1) != 0)
5777 off &= ~1;
5778 else
5779 {
cec5225b 5780 bfd_put_NN (output_bfd, value, basegot->contents + off);
a06ea964
NC		 5781 h->got.offset |= 1;
5782 }
5783 }
5784 else
5785 *unresolved_reloc_p = FALSE;
5786
5787 off = off + basegot->output_section->vma + basegot->output_offset;
5788 }
5789
5790 return off;
5791}
5792
5793/* Change R_TYPE to a more efficient access model where possible,
5794 return the new reloc type. */
5795
a6bb11b2
YZ		 5796static bfd_reloc_code_real_type
5797aarch64_tls_transition_without_check (bfd_reloc_code_real_type r_type,
4ca9b406
SP		 5798 struct bfd_link_info *info,
5799 struct elf_link_hash_entry *h,
5800 bfd_boolean morello_reloc)
a06ea964
NC		 5801{
5802 bfd_boolean is_local = h == NULL;
a6bb11b2 5803
a06ea964
NC		 5804 switch (r_type)
5805 {
4ca9b406
SP		 5806 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
5807 return (is_local || !bfd_link_pic (info)
5808 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5809 : r_type);
5810
a6bb11b2 5811 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 5812 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
a6bb11b2
YZ		 5813 return (is_local
5814 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5815 : BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21);
5816
389b8029
MS		 5817 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
5818 return (is_local
5819 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5820 : r_type);
5821
1ada945d
MS		 5822 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
5823 return (is_local
5824 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
5825 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
5826
0484b454
RL		 5827 case BFD_RELOC_AARCH64_TLSDESC_LDR:
5828 return (is_local
5829 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5830 : BFD_RELOC_AARCH64_NONE);
5831
5832 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
5833 return (is_local
5834 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
5835 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC);
5836
5837 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
5838 return (is_local
5839 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
5840 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1);
5841
4ca9b406
SP		 5842 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
5843 return ((is_local || !bfd_link_pie (info)
5844 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type));
5845
a6bb11b2 5846 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
ce336788 5847 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2
YZ		 5848 return (is_local
5849 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
5850 : BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC);
5851
5852 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
5853 return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1 : r_type;
5854
5855 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
5856 return is_local ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC : r_type;
5857
043bf05a
MS		 5858 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
5859 return r_type;
5860
3c12b054
MS		 5861 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
5862 return (is_local
5863 ? BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
5864 : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19);
5865
4ca9b406
SP		 5866 case BFD_RELOC_MORELLO_TLSDESC_CALL:
5867 return ((is_local || !bfd_link_pie (info))
5868 ? BFD_RELOC_AARCH64_NONE : r_type);
5869
f955cccf 5870 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406
SP		 5871 if (morello_reloc && !is_local && bfd_link_pie (info))
5872 return r_type;
5873 /* Fall through. */
5874 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 5875 case BFD_RELOC_AARCH64_TLSDESC_CALL:
4ca9b406
SP		 5876 /* Instructions with these relocations will be fully resolved during the
5877 transition into either a NOP in the A64 case or movk and add in
5878 C64. */
a6bb11b2
YZ		 5879 return BFD_RELOC_AARCH64_NONE;
5880
259364ad
JW		 5881 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
5882 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
5883 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
5884 return is_local ? BFD_RELOC_AARCH64_NONE : r_type;
5885
ac734732
RL		 5886#if ARCH_SIZE == 64
5887 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
5888 return is_local
5889 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
5890 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
5891
5892 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
5893 return is_local
5894 ? BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
5895 : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
5896#endif
5897
a6bb11b2
YZ		 5898 default:
5899 break;
a06ea964
NC		 5900 }
5901
5902 return r_type;
5903}
5904
5905static unsigned int
a6bb11b2 5906aarch64_reloc_got_type (bfd_reloc_code_real_type r_type)
a06ea964
NC		 5907{
5908 switch (r_type)
5909 {
a6bb11b2
YZ		 5910 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
5911 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 5912 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 5913 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 5914 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 5915 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 5916 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 5917 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 5918 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a06ea964
NC		 5919 return GOT_NORMAL;
5920
a1bdea65
SP		 5921 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
5922 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
5923 return GOT_CAP;
5924
ce336788 5925 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 5926 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 5927 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 5928 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 5929 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 5930 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 5931 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 5932 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 5933 return GOT_TLS_GD;
5934
4ca9b406
SP		 5935 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
5936 case BFD_RELOC_MORELLO_TLSDESC_CALL:
5937 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
5938 return GOT_TLSDESC_GD | GOT_CAP;
5939
0484b454 5940 case BFD_RELOC_AARCH64_TLSDESC_ADD:
f955cccf 5941 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 5942 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 5943 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 5944 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a6bb11b2 5945 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 5946 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 5947 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL		 5948 case BFD_RELOC_AARCH64_TLSDESC_LDR:
5949 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
5950 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC		 5951 return GOT_TLSDESC_GD;
5952
a6bb11b2 5953 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 5954 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 5955 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 5956 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL		 5957 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
5958 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC		 5959 return GOT_TLS_IE;
5960
a6bb11b2
YZ		 5961 default:
5962 break;
a06ea964
NC		 5963 }
5964 return GOT_UNKNOWN;
5965}
5966
5967static bfd_boolean
5968aarch64_can_relax_tls (bfd *input_bfd,
5969 struct bfd_link_info *info,
4ca9b406 5970 const Elf_Internal_Rela *rel,
a06ea964
NC		 5971 struct elf_link_hash_entry *h,
5972 unsigned long r_symndx)
5973{
5974 unsigned int symbol_got_type;
5975 unsigned int reloc_got_type;
5976
4ca9b406
SP		 5977 bfd_reloc_code_real_type bfd_r_type
5978 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
5979 ELFNN_R_TYPE (rel->r_info));
5980
5981 if (! IS_AARCH64_TLS_RELAX_RELOC (bfd_r_type))
a06ea964
NC		 5982 return FALSE;
5983
cec5225b 5984 symbol_got_type = elfNN_aarch64_symbol_got_type (h, input_bfd, r_symndx);
4ca9b406 5985 reloc_got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC		 5986
5987 if (symbol_got_type == GOT_TLS_IE && GOT_TLS_GD_ANY_P (reloc_got_type))
5988 return TRUE;
5989
6dda7875 5990 if (!bfd_link_executable (info))
a06ea964
NC		 5991 return FALSE;
5992
5993 if (h && h->root.type == bfd_link_hash_undefweak)
5994 return FALSE;
5995
5996 return TRUE;
5997}
5998
a6bb11b2
YZ		 5999/* Given the relocation code R_TYPE, return the relaxed bfd reloc
6000 enumerator. */
6001
6002static bfd_reloc_code_real_type
a06ea964
NC		 6003aarch64_tls_transition (bfd *input_bfd,
6004 struct bfd_link_info *info,
4ca9b406 6005 const Elf_Internal_Rela *rel,
a06ea964
NC		 6006 struct elf_link_hash_entry *h,
6007 unsigned long r_symndx)
6008{
a6bb11b2 6009 bfd_reloc_code_real_type bfd_r_type
4ca9b406
SP		 6010 = elfNN_aarch64_bfd_reloc_from_type (input_bfd,
6011 ELFNN_R_TYPE (rel->r_info));
6012
6013 if (! aarch64_can_relax_tls (input_bfd, info, rel, h, r_symndx))
6014 return bfd_r_type;
a06ea964 6015
4ca9b406
SP		 6016 bfd_boolean morello_reloc = (bfd_r_type == BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
6017 && (ELFNN_R_TYPE (rel[1].r_info)
6018 == MORELLO_R (TLSDESC_CALL)));
6019
6020 /* GD -> IE is not supported for Morello TLSDESC yet. We do however allow
6021 lowering of GD -> LE for static non-pie executables. XXX It ought to be
6022 safe to do this for A64 as well but it is not implemented yet. */
6023 if (h != NULL && morello_reloc && bfd_link_pie (info))
a6bb11b2
YZ		 6024 return bfd_r_type;
6025
4ca9b406
SP		 6026 return aarch64_tls_transition_without_check (bfd_r_type, info, h,
6027 morello_reloc);
a06ea964
NC		 6028}
6029
6030/* Return the base VMA address which should be subtracted from real addresses
a6bb11b2 6031 when resolving R_AARCH64_TLS_DTPREL relocation. */
a06ea964
NC		 6032
6033static bfd_vma
6034dtpoff_base (struct bfd_link_info *info)
6035{
6036 /* If tls_sec is NULL, we should have signalled an error already. */
6037 BFD_ASSERT (elf_hash_table (info)->tls_sec != NULL);
6038 return elf_hash_table (info)->tls_sec->vma;
6039}
6040
a06ea964
NC		 6041/* Return the base VMA address which should be subtracted from real addresses
6042 when resolving R_AARCH64_TLS_GOTTPREL64 relocations. */
6043
6044static bfd_vma
6045tpoff_base (struct bfd_link_info *info)
6046{
6047 struct elf_link_hash_table *htab = elf_hash_table (info);
6048
6049 /* If tls_sec is NULL, we should have signalled an error already. */
ac21917f 6050 BFD_ASSERT (htab->tls_sec != NULL);
a06ea964
NC		 6051
6052 bfd_vma base = align_power ((bfd_vma) TCB_SIZE,
6053 htab->tls_sec->alignment_power);
6054 return htab->tls_sec->vma - base;
6055}
6056
6057static bfd_vma *
6058symbol_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6059 unsigned long r_symndx)
6060{
6061 /* Calculate the address of the GOT entry for symbol
6062 referred to in h. */
6063 if (h != NULL)
6064 return &h->got.offset;
6065 else
6066 {
6067 /* local symbol */
6068 struct elf_aarch64_local_symbol *l;
6069
cec5225b 6070 l = elf_aarch64_locals (input_bfd);
a06ea964
NC		 6071 return &l[r_symndx].got_offset;
6072 }
6073}
6074
6075static void
6076symbol_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6077 unsigned long r_symndx)
6078{
6079 bfd_vma *p;
6080 p = symbol_got_offset_ref (input_bfd, h, r_symndx);
6081 *p |= 1;
6082}
6083
6084static int
6085symbol_got_offset_mark_p (bfd *input_bfd, struct elf_link_hash_entry *h,
6086 unsigned long r_symndx)
6087{
6088 bfd_vma value;
6089 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6090 return value & 1;
6091}
6092
6093static bfd_vma
6094symbol_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6095 unsigned long r_symndx)
6096{
6097 bfd_vma value;
6098 value = * symbol_got_offset_ref (input_bfd, h, r_symndx);
6099 value &= ~1;
6100 return value;
6101}
6102
6103static bfd_vma *
6104symbol_tlsdesc_got_offset_ref (bfd *input_bfd, struct elf_link_hash_entry *h,
6105 unsigned long r_symndx)
6106{
6107 /* Calculate the address of the GOT entry for symbol
6108 referred to in h. */
6109 if (h != NULL)
6110 {
cec5225b
YZ		 6111 struct elf_aarch64_link_hash_entry *eh;
6112 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC		 6113 return &eh->tlsdesc_got_jump_table_offset;
6114 }
6115 else
6116 {
6117 /* local symbol */
6118 struct elf_aarch64_local_symbol *l;
6119
cec5225b 6120 l = elf_aarch64_locals (input_bfd);
a06ea964
NC		 6121 return &l[r_symndx].tlsdesc_got_jump_table_offset;
6122 }
6123}
6124
6125static void
6126symbol_tlsdesc_got_offset_mark (bfd *input_bfd, struct elf_link_hash_entry *h,
6127 unsigned long r_symndx)
6128{
6129 bfd_vma *p;
6130 p = symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6131 *p |= 1;
6132}
6133
6134static int
6135symbol_tlsdesc_got_offset_mark_p (bfd *input_bfd,
6136 struct elf_link_hash_entry *h,
6137 unsigned long r_symndx)
6138{
6139 bfd_vma value;
6140 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6141 return value & 1;
6142}
6143
6144static bfd_vma
6145symbol_tlsdesc_got_offset (bfd *input_bfd, struct elf_link_hash_entry *h,
6146 unsigned long r_symndx)
6147{
6148 bfd_vma value;
6149 value = * symbol_tlsdesc_got_offset_ref (input_bfd, h, r_symndx);
6150 value &= ~1;
6151 return value;
6152}
6153
68fcca92
JW		 6154/* Data for make_branch_to_erratum_835769_stub(). */
6155
6156struct erratum_835769_branch_to_stub_data
6157{
4106101c 6158 struct bfd_link_info *info;
68fcca92
JW		 6159 asection *output_section;
6160 bfd_byte *contents;
6161};
6162
6163/* Helper to insert branches to erratum 835769 stubs in the right
6164 places for a particular section. */
6165
6166static bfd_boolean
6167make_branch_to_erratum_835769_stub (struct bfd_hash_entry *gen_entry,
6168 void *in_arg)
6169{
6170 struct elf_aarch64_stub_hash_entry *stub_entry;
6171 struct erratum_835769_branch_to_stub_data *data;
6172 bfd_byte *contents;
6173 unsigned long branch_insn = 0;
6174 bfd_vma veneered_insn_loc, veneer_entry_loc;
6175 bfd_signed_vma branch_offset;
6176 unsigned int target;
6177 bfd *abfd;
6178
6179 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6180 data = (struct erratum_835769_branch_to_stub_data *) in_arg;
6181
6182 if (stub_entry->target_section != data->output_section
6183 || stub_entry->stub_type != aarch64_stub_erratum_835769_veneer)
6184 return TRUE;
6185
6186 contents = data->contents;
6187 veneered_insn_loc = stub_entry->target_section->output_section->vma
6188 + stub_entry->target_section->output_offset
6189 + stub_entry->target_value;
6190 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6191 + stub_entry->stub_sec->output_offset
6192 + stub_entry->stub_offset;
6193 branch_offset = veneer_entry_loc - veneered_insn_loc;
6194
6195 abfd = stub_entry->target_section->owner;
6196 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6197 _bfd_error_handler
90b6238f 6198 (_("%pB: error: erratum 835769 stub out "
4eca0228 6199 "of range (input file too large)"), abfd);
68fcca92
JW		 6200
6201 target = stub_entry->target_value;
6202 branch_insn = 0x14000000;
6203 branch_offset >>= 2;
6204 branch_offset &= 0x3ffffff;
6205 branch_insn |= branch_offset;
6206 bfd_putl32 (branch_insn, &contents[target]);
6207
6208 return TRUE;
6209}
6210
4106101c
MS		 6211
6212static bfd_boolean
6213_bfd_aarch64_erratum_843419_branch_to_stub (struct bfd_hash_entry *gen_entry,
6214 void *in_arg)
6215{
6216 struct elf_aarch64_stub_hash_entry *stub_entry
6217 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
6218 struct erratum_835769_branch_to_stub_data *data
6219 = (struct erratum_835769_branch_to_stub_data *) in_arg;
6220 struct bfd_link_info *info;
6221 struct elf_aarch64_link_hash_table *htab;
6222 bfd_byte *contents;
6223 asection *section;
6224 bfd *abfd;
6225 bfd_vma place;
6226 uint32_t insn;
6227
6228 info = data->info;
6229 contents = data->contents;
6230 section = data->output_section;
6231
6232 htab = elf_aarch64_hash_table (info);
6233
6234 if (stub_entry->target_section != section
6235 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer)
6236 return TRUE;
6237
739b5c9c
TC		 6238 BFD_ASSERT (((htab->fix_erratum_843419 & ERRAT_ADRP) && stub_entry->stub_sec)
6239 || (htab->fix_erratum_843419 & ERRAT_ADR));
6240
6241 /* Only update the stub section if we have one. We should always have one if
6242 we're allowed to use the ADRP errata workaround, otherwise it is not
6243 required. */
6244 if (stub_entry->stub_sec)
6245 {
6246 insn = bfd_getl32 (contents + stub_entry->target_value);
6247 bfd_putl32 (insn,
6248 stub_entry->stub_sec->contents + stub_entry->stub_offset);
6249 }
4106101c
MS		 6250
6251 place = (section->output_section->vma + section->output_offset
6252 + stub_entry->adrp_offset);
6253 insn = bfd_getl32 (contents + stub_entry->adrp_offset);
6254
9fca35fc 6255 if (!_bfd_aarch64_adrp_p (insn))
4106101c
MS		 6256 abort ();
6257
6258 bfd_signed_vma imm =
6259 (_bfd_aarch64_sign_extend
6260 ((bfd_vma) _bfd_aarch64_decode_adrp_imm (insn) << 12, 33)
6261 - (place & 0xfff));
6262
739b5c9c 6263 if ((htab->fix_erratum_843419 & ERRAT_ADR)
4106101c
MS		 6264 && (imm >= AARCH64_MIN_ADRP_IMM && imm <= AARCH64_MAX_ADRP_IMM))
6265 {
92504105 6266 insn = (_bfd_aarch64_reencode_adr_imm (AARCH64_ADR_OP, imm, 0)
4106101c
MS		 6267 | AARCH64_RT (insn));
6268 bfd_putl32 (insn, contents + stub_entry->adrp_offset);
739b5c9c
TC		 6269 /* Stub is not needed, don't map it out. */
6270 stub_entry->stub_type = aarch64_stub_none;
4106101c 6271 }
739b5c9c 6272 else if (htab->fix_erratum_843419 & ERRAT_ADRP)
4106101c
MS		 6273 {
6274 bfd_vma veneered_insn_loc;
6275 bfd_vma veneer_entry_loc;
6276 bfd_signed_vma branch_offset;
6277 uint32_t branch_insn;
6278
6279 veneered_insn_loc = stub_entry->target_section->output_section->vma
6280 + stub_entry->target_section->output_offset
6281 + stub_entry->target_value;
6282 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
6283 + stub_entry->stub_sec->output_offset
6284 + stub_entry->stub_offset;
6285 branch_offset = veneer_entry_loc - veneered_insn_loc;
6286
6287 abfd = stub_entry->target_section->owner;
6288 if (!aarch64_valid_branch_p (veneer_entry_loc, veneered_insn_loc))
4eca0228 6289 _bfd_error_handler
90b6238f 6290 (_("%pB: error: erratum 843419 stub out "
4106101c
MS		 6291 "of range (input file too large)"), abfd);
6292
6293 branch_insn = 0x14000000;
6294 branch_offset >>= 2;
6295 branch_offset &= 0x3ffffff;
6296 branch_insn |= branch_offset;
6297 bfd_putl32 (branch_insn, contents + stub_entry->target_value);
6298 }
739b5c9c
TC		 6299 else
6300 {
6301 abfd = stub_entry->target_section->owner;
6302 _bfd_error_handler
64672071 6303 (_("%pB: error: erratum 843419 immediate 0x%" BFD_VMA_FMT "x "
739b5c9c
TC		 6304 "out of range for ADR (input file too large) and "
6305 "--fix-cortex-a53-843419=adr used. Run the linker with "
6306 "--fix-cortex-a53-843419=full instead"), abfd, imm);
6307 bfd_set_error (bfd_error_bad_value);
6308 /* This function is called inside a hashtable traversal and the error
6309 handlers called above turn into non-fatal errors. Which means this
6310 case ld returns an exit code 0 and also produces a broken object file.
6311 To prevent this, issue a hard abort. */
6312 BFD_FAIL ();
6313 }
4106101c
MS		 6314 return TRUE;
6315}
6316
6317
68fcca92
JW		 6318static bfd_boolean
6319elfNN_aarch64_write_section (bfd *output_bfd ATTRIBUTE_UNUSED,
6320 struct bfd_link_info *link_info,
6321 asection *sec,
6322 bfd_byte *contents)
6323
6324{
6325 struct elf_aarch64_link_hash_table *globals =
f872121a 6326 elf_aarch64_hash_table (link_info);
68fcca92
JW		 6327
6328 if (globals == NULL)
6329 return FALSE;
6330
6331 /* Fix code to point to erratum 835769 stubs. */
6332 if (globals->fix_erratum_835769)
6333 {
6334 struct erratum_835769_branch_to_stub_data data;
6335
4106101c 6336 data.info = link_info;
68fcca92
JW		 6337 data.output_section = sec;
6338 data.contents = contents;
6339 bfd_hash_traverse (&globals->stub_hash_table,
6340 make_branch_to_erratum_835769_stub, &data);
6341 }
6342
4106101c
MS		 6343 if (globals->fix_erratum_843419)
6344 {
6345 struct erratum_835769_branch_to_stub_data data;
6346
6347 data.info = link_info;
6348 data.output_section = sec;
6349 data.contents = contents;
6350 bfd_hash_traverse (&globals->stub_hash_table,
6351 _bfd_aarch64_erratum_843419_branch_to_stub, &data);
6352 }
6353
68fcca92
JW		 6354 return FALSE;
6355}
6356
2aff25ba
JW		 6357/* Return TRUE if RELOC is a relocation against the base of GOT table. */
6358
6359static bfd_boolean
6360aarch64_relocation_aginst_gp_p (bfd_reloc_code_real_type reloc)
6361{
6362 return (reloc == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
6363 || reloc == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
6364 || reloc == BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
6365 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
6366 || reloc == BFD_RELOC_AARCH64_MOVW_GOTOFF_G1);
6367}
6368
40bbb79e
SP		 6369/* Build capability meta data, i.e. size and permissions for a capability. */
6370
6371static bfd_vma
e10c835d 6372cap_meta (size_t size, const asection *sec, bfd_boolean *guessed)
40bbb79e
SP		 6373{
6374
6375 if (size >= (1ULL << 56))
6376 return (bfd_vma) -1;
6377
b235f0e0
MM		 6378 /* N.b. We are only ever using this function for Morello.
6379 Morello is little-endian.
6380 We are returning a 64bit sized integer.
6381 The format this metadata is supposed to fit is
6382 | 56 bit length | 8 bit permissions |
6383 This means that (in little endian layout) we need to put the 56 bit size
6384 in the *lower* bits of the uint64_t. */
6385 uint64_t flags = 0;
40bbb79e 6386 if (sec->flags & SEC_CODE)
b235f0e0
MM		 6387 flags = 4;
6388 else if (sec->flags & SEC_READONLY
6389 || sec->flags & SEC_ROM)
6390 flags = 1;
6391 else if (sec->flags & SEC_ALLOC)
6392 flags = 2;
40bbb79e 6393
e10c835d
MM		 6394 /* We should usually be able to derive a valid set of permissions
6395 from the section flags. We know that when a relocation is against an
6396 SHN_ABS symbol the section has no associated flags and we must guess.
6397
6398 As it stands we don't know of any other instances where we do not have
6399 permission flags on a section. We choose to allow instances that we do
6400 not know of rather than abort on them so that if the guess is correct we
6401 don't hamper anyone progressing. */
b235f0e0 6402 if (flags == 0)
e10c835d
MM		 6403 {
6404 flags = 2;
6405 *guessed = TRUE;
6406 }
6407
b235f0e0 6408 return size | (flags << 56);
40bbb79e
SP		 6409}
6410
5fa80905
AC		 6411enum c64_section_perm_type {
6412 C64_SYM_UNKNOWN = 0,
6413 C64_SYM_STANDARD,
6414 C64_SYM_LINKER_DEF,
6415 C64_SYM_LDSCRIPT_DEF,
6416 C64_SYM_LDSCRIPT_START,
6417};
6418
6419static enum c64_section_perm_type
6420c64_symbol_section_adjustment (struct elf_link_hash_entry *h, bfd_vma value,
6421 asection *sym_sec, asection **ret_sec,
6422 struct bfd_link_info *info)
6423{
6424 if (!sym_sec)
6425 return C64_SYM_UNKNOWN;
6426
6427 *ret_sec = sym_sec;
6428 if (!h)
6429 return C64_SYM_STANDARD;
6430
6431 /* Linker defined symbols are always at the start of the section they
6432 track. */
6433 if (h->root.linker_def)
6434 return C64_SYM_LINKER_DEF;
6435 else if (h->root.ldscript_def)
6436 {
6437 const char *name = h->root.root.string;
6438 size_t len = strlen (name);
6439
6440 bfd_vma size = sym_sec->size - (value - sym_sec->vma);
6441 /* The special case: the symbol is at the end of the section.
6442 This could either mean that it is an end symbol or it is the
6443 start of the output section following the symbol. We try to
6444 guess if it is a start of the next section by reading its
6445 name. This is a compatibility hack, ideally linker scripts
6446 should be written such that start symbols are defined within
6447 the output section it intends to track. */
6448 if (size == 0
6449 && (len > 8 && name[0] == '_' && name[1] == '_'
6450 && (!strncmp (name + 2, "start_", 6)
6451 || !strcmp (name + len - 6, "_start"))))
6452 {
6453 asection *s = bfd_sections_find_if (info->output_bfd,
6454 section_start_symbol,
6455 &value);
6456 if (s != NULL)
6457 {
6458 *ret_sec = s;
6459 return C64_SYM_LDSCRIPT_START;
6460 }
6461 }
6462 return C64_SYM_LDSCRIPT_DEF;
6463 }
6464 return C64_SYM_STANDARD;
6465}
6466
40bbb79e
SP		 6467static bfd_reloc_status_type
6468c64_fixup_frag (bfd *input_bfd, struct bfd_link_info *info,
e10c835d
MM		 6469 bfd_reloc_code_real_type bfd_r_type, Elf_Internal_Sym *sym,
6470 struct elf_link_hash_entry *h, asection *sym_sec,
6471 asection *reloc_sec, bfd_byte *frag_loc, bfd_vma value,
6472 bfd_signed_vma addend, bfd_vma r_offset)
40bbb79e 6473{
5fa80905
AC		 6474 BFD_ASSERT (h || sym);
6475 bfd_vma size = sym ? sym->st_size : h->size;
40bbb79e
SP		 6476 asection *perm_sec = sym_sec;
6477 bfd_boolean bounds_ok = FALSE;
6478
e10c835d
MM		 6479 const int aarch64_reloc_idx = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
6480 const char *reloc_name = elfNN_aarch64_howto_table[aarch64_reloc_idx].name;
7401203c
MM		 6481 const char *sym_name;
6482
6483 if (sym)
6484 {
6485 Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (input_bfd);
6486 sym_name = (bfd_elf_string_from_elf_section (input_bfd,
6487 symtab_hdr->sh_link,
6488 sym->st_name));
6489 }
6490 else
6491 sym_name = h->root.root.string;
6492
5fa80905 6493 if (size == 0 && sym_sec)
40bbb79e 6494 {
5fa80905
AC		 6495 bounds_ok = TRUE;
6496 enum c64_section_perm_type type
6497 = c64_symbol_section_adjustment (h, value, sym_sec, &perm_sec, info);
40bbb79e 6498
5fa80905 6499 switch (type)
40bbb79e 6500 {
5fa80905
AC		 6501 case C64_SYM_STANDARD:
6502 break;
6503 case C64_SYM_LINKER_DEF:
6504 size = perm_sec->output_section->size;
6505 break;
6506 case C64_SYM_LDSCRIPT_DEF:
6507 size = perm_sec->size - (value - perm_sec->vma);
6508 break;
6509 case C64_SYM_LDSCRIPT_START:
6510 size = perm_sec->size;
6511 break;
6512 default:
6513 abort ();
40bbb79e
SP		 6514 }
6515 }
6516
6517 /* Negative addends are not allowed for capability symbols. */
6518 if (addend < 0 || (bfd_vma) addend > size)
6519 return bfd_reloc_outofrange;
6520
5fa80905 6521 bfd_vma base = value, limit = value + size;
5a9e7a18 6522 unsigned align = 0;
40bbb79e 6523
5a9e7a18 6524 if (!bounds_ok && !c64_valid_cap_range (&base, &limit, &align))
40bbb79e 6525 {
7401203c
MM		 6526 /* Just warn about this. It's not a requirement that bounds on
6527 objects should be precise, so there's no reason to error out on
6528 such an object. */
40bbb79e 6529 /* xgettext:c-format */
7401203c
MM		 6530 _bfd_error_handler
6531 (_("%pB: capability range for '%s' may exceed object bounds"),
6532 input_bfd, sym_name);
40bbb79e
SP		 6533 }
6534
5fa80905
AC		 6535 if (perm_sec && perm_sec->flags & SEC_CODE)
6536 {
6537 /* Any symbol pointing into an executable section gets bounds according
6538 to PCC. In this case the relocation is set up so that the value is
6539 the base of the PCC, the addend is the offset from the PCC base to the
6540 VA that we want, and the size is the length of the PCC range.
6541 In this function we only use `value` to check the bounds make sense,
6542 which is somewhat superfluous when we're using pcc_high and pcc_low
6543 since we already enforced that in elfNN_c64_resize_sections. No harm
6544 in instead checking that the bounds on the object that were requested
6545 made sense even if they were overridden because this symbol points
6546 into an executable section.
6547
6548 `size` on the other hand is part of the fragment that we output to and
6549 we need to change it in order to have functions that can access global
6550 data or jump to other functions. */
6551 size = pcc_high - pcc_low;
6552 }
6553
40bbb79e
SP		 6554 if (perm_sec != NULL)
6555 {
e10c835d
MM		 6556 bfd_boolean permissions_guessed = FALSE;
6557 bfd_vma frag = cap_meta (size, perm_sec, &permissions_guessed);
40bbb79e
SP		 6558
6559 if (frag == (bfd_vma) -1)
6560 return bfd_reloc_outofrange;
6561
e10c835d
MM		 6562 if (permissions_guessed)
6563 {
6564 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): "
6565 "warning: relocation %s against symbol '%s' in "
6566 "section without permission flags '%s'. "
6567 "Assuming Read-Write."),
6568 input_bfd, reloc_sec, r_offset, reloc_name,
6569 sym_name, perm_sec->name);
6570 }
6571
40bbb79e
SP		 6572 bfd_put_64 (input_bfd, frag, frag_loc);
6573 }
6574
6575 return bfd_reloc_continue;
5fa80905 6576}
40bbb79e 6577
5fa80905
AC		 6578/* Given either a local symbol SYM or global symbol H, do we need to adjust
6579 capability relocations against the symbol due to the fact that it points to
6580 a code section? */
6581static bfd_boolean
6582c64_symbol_adjust (struct elf_link_hash_entry *h,
6583 bfd_vma value, asection *sym_sec, struct bfd_link_info *info,
6584 bfd_vma *adjust_addr)
6585{
6586 asection *tmp_sec;
6587 enum c64_section_perm_type type
6588 = c64_symbol_section_adjustment (h, value, sym_sec, &tmp_sec, info);
6589
6590 if (type == C64_SYM_UNKNOWN)
6591 return FALSE;
6592
6593 if (tmp_sec->flags & SEC_CODE)
40bbb79e 6594 {
5fa80905
AC		 6595 *adjust_addr = pcc_low;
6596 return TRUE;
40bbb79e 6597 }
5fa80905
AC		 6598
6599 return FALSE;
40bbb79e
SP		 6600}
6601
4e7fbb34
JW		 6602/* Perform a relocation as part of a final link. The input relocation type
6603 should be TLS relaxed. */
6604
a06ea964 6605static bfd_reloc_status_type
cec5225b 6606elfNN_aarch64_final_link_relocate (reloc_howto_type *howto,
a06ea964
NC		 6607 bfd *input_bfd,
6608 bfd *output_bfd,
6609 asection *input_section,
6610 bfd_byte *contents,
6611 Elf_Internal_Rela *rel,
6612 bfd_vma value,
6613 struct bfd_link_info *info,
6614 asection *sym_sec,
6615 struct elf_link_hash_entry *h,
6616 bfd_boolean *unresolved_reloc_p,
6617 bfd_boolean save_addend,
1419bbe5
WN		 6618 bfd_vma *saved_addend,
6619 Elf_Internal_Sym *sym)
a06ea964 6620{
1419bbe5 6621 Elf_Internal_Shdr *symtab_hdr;
a06ea964 6622 unsigned int r_type = howto->type;
a6bb11b2
YZ		 6623 bfd_reloc_code_real_type bfd_r_type
6624 = elfNN_aarch64_bfd_reloc_from_howto (howto);
a06ea964
NC		 6625 unsigned long r_symndx;
6626 bfd_byte *hit_data = contents + rel->r_offset;
96d01d93 6627 bfd_vma place, off, got_entry_addr = 0;
a06ea964 6628 bfd_signed_vma signed_addend;
cec5225b 6629 struct elf_aarch64_link_hash_table *globals;
a06ea964 6630 bfd_boolean weak_undef_p;
ff07562f 6631 bfd_boolean relative_reloc;
b53b1bed 6632 asection *base_got;
ff07562f 6633 bfd_vma orig_value = value;
ddb7fd0f 6634 bfd_boolean resolved_to_zero;
0c1ded8d 6635 bfd_boolean abs_symbol_p;
f0070c1e 6636 Elf_Internal_Sym *isym = NULL;
50e192f0
SP		 6637 bfd_boolean c64_rtype = FALSE;
6638 bfd_boolean to_c64 = FALSE;
a06ea964 6639
cec5225b 6640 globals = elf_aarch64_hash_table (info);
a06ea964 6641
1419bbe5
WN		 6642 symtab_hdr = &elf_symtab_hdr (input_bfd);
6643
a06ea964
NC		 6644 BFD_ASSERT (is_aarch64_elf (input_bfd));
6645
cec5225b 6646 r_symndx = ELFNN_R_SYM (rel->r_info);
a06ea964 6647
a06ea964
NC		 6648 place = input_section->output_section->vma
6649 + input_section->output_offset + rel->r_offset;
6650
6651 /* Get addend, accumulating the addend for consecutive relocs
6652 which refer to the same offset. */
6653 signed_addend = saved_addend ? *saved_addend : 0;
6654 signed_addend += rel->r_addend;
6655
6656 weak_undef_p = (h ? h->root.type == bfd_link_hash_undefweak
6657 : bfd_is_und_section (sym_sec));
c691de6a 6658 abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
0c1ded8d 6659
f0070c1e 6660 if (sym)
50e192f0
SP		 6661 {
6662 isym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
6663 r_symndx);
6664 BFD_ASSERT (isym != NULL);
6665 to_c64 = (isym->st_target_internal & ST_BRANCH_TO_C64) != 0;
6666 }
6667 else
6668 to_c64 = (h->target_internal & ST_BRANCH_TO_C64) != 0;
f0070c1e 6669
a6bb11b2 6670
1419bbe5
WN		 6671 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle
6672 it here if it is defined in a non-shared object. */
6673 if (h != NULL
6674 && h->type == STT_GNU_IFUNC
6675 && h->def_regular)
6676 {
6677 asection *plt;
6678 const char *name;
99ad26cb 6679 bfd_vma addend = 0;
1419bbe5 6680
545bc2b3
SN		 6681 if ((input_section->flags & SEC_ALLOC) == 0)
6682 {
f657f8c4
NC		 6683 /* If this is a SHT_NOTE section without SHF_ALLOC, treat
6684 STT_GNU_IFUNC symbol as STT_FUNC. */
6685 if (elf_section_type (input_section) == SHT_NOTE)
6686 goto skip_ifunc;
6687
545bc2b3
SN		 6688 /* Dynamic relocs are not propagated for SEC_DEBUGGING
6689 sections because such sections are not SEC_ALLOC and
6690 thus ld.so will not process them. */
6691 if ((input_section->flags & SEC_DEBUGGING) != 0)
6692 return bfd_reloc_ok;
6693
6694 if (h->root.root.string)
6695 name = h->root.root.string;
6696 else
6697 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym, NULL);
6698 _bfd_error_handler
6699 /* xgettext:c-format */
2dcf00ce
AM		 6700 (_("%pB(%pA+%#" PRIx64 "): "
6701 "unresolvable %s relocation against symbol `%s'"),
6702 input_bfd, input_section, (uint64_t) rel->r_offset,
6703 howto->name, name);
545bc2b3 6704 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6705 return bfd_reloc_notsupported;
545bc2b3
SN		 6706 }
6707 else if (h->plt.offset == (bfd_vma) -1)
6708 goto bad_ifunc_reloc;
1419bbe5
WN		 6709
6710 /* STT_GNU_IFUNC symbol must go through PLT. */
6711 plt = globals->root.splt ? globals->root.splt : globals->root.iplt;
6712 value = (plt->output_section->vma + plt->output_offset + h->plt.offset);
6713
6714 switch (bfd_r_type)
6715 {
6716 default:
dc1e8a47 6717 bad_ifunc_reloc:
1419bbe5
WN		 6718 if (h->root.root.string)
6719 name = h->root.root.string;
6720 else
6721 name = bfd_elf_sym_name (input_bfd, symtab_hdr, sym,
6722 NULL);
4eca0228 6723 _bfd_error_handler
695344c0 6724 /* xgettext:c-format */
871b3ab2 6725 (_("%pB: relocation %s against STT_GNU_IFUNC "
1419bbe5
WN		 6726 "symbol `%s' isn't handled by %s"), input_bfd,
6727 howto->name, name, __FUNCTION__);
6728 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6729 return bfd_reloc_notsupported;
1419bbe5
WN		 6730
6731 case BFD_RELOC_AARCH64_NN:
6732 if (rel->r_addend != 0)
6733 {
6734 if (h->root.root.string)
6735 name = h->root.root.string;
6736 else
6737 name = bfd_elf_sym_name (input_bfd, symtab_hdr,
6738 sym, NULL);
4eca0228 6739 _bfd_error_handler
695344c0 6740 /* xgettext:c-format */
871b3ab2 6741 (_("%pB: relocation %s against STT_GNU_IFUNC "
2dcf00ce
AM		 6742 "symbol `%s' has non-zero addend: %" PRId64),
6743 input_bfd, howto->name, name, (int64_t) rel->r_addend);
1419bbe5 6744 bfd_set_error (bfd_error_bad_value);
1d75a8e2 6745 return bfd_reloc_notsupported;
1419bbe5
WN		 6746 }
6747
6748 /* Generate dynamic relocation only when there is a
6749 non-GOT reference in a shared object. */
0e1862bb 6750 if (bfd_link_pic (info) && h->non_got_ref)
1419bbe5
WN		 6751 {
6752 Elf_Internal_Rela outrel;
6753 asection *sreloc;
6754
6755 /* Need a dynamic relocation to get the real function
6756 address. */
6757 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
6758 info,
6759 input_section,
6760 rel->r_offset);
6761 if (outrel.r_offset == (bfd_vma) -1
6762 || outrel.r_offset == (bfd_vma) -2)
6763 abort ();
6764
6765 outrel.r_offset += (input_section->output_section->vma
6766 + input_section->output_offset);
6767
6768 if (h->dynindx == -1
6769 || h->forced_local
0e1862bb 6770 || bfd_link_executable (info))
1419bbe5
WN		 6771 {
6772 /* This symbol is resolved locally. */
e19e9199
SP		 6773 outrel.r_info = (elf_aarch64_hash_entry (h)->got_type
6774 == GOT_CAP
6775 ? ELFNN_R_INFO (0, MORELLO_R (IRELATIVE))
6776 : ELFNN_R_INFO (0, AARCH64_R (IRELATIVE)));
1419bbe5
WN		 6777 outrel.r_addend = (h->root.u.def.value
6778 + h->root.u.def.section->output_section->vma
6779 + h->root.u.def.section->output_offset);
6780 }
6781 else
6782 {
6783 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
6784 outrel.r_addend = 0;
6785 }
6786
6787 sreloc = globals->root.irelifunc;
6788 elf_append_rela (output_bfd, sreloc, &outrel);
6789
6790 /* If this reloc is against an external symbol, we
6791 do not want to fiddle with the addend. Otherwise,
6792 we need to include the symbol value so that it
6793 becomes an addend for the dynamic reloc. For an
6794 internal symbol, we have updated addend. */
6795 return bfd_reloc_ok;
6796 }
6797 /* FALLTHROUGH */
e19e9199
SP		 6798 case BFD_RELOC_MORELLO_CALL26:
6799 case BFD_RELOC_MORELLO_JUMP26:
1419bbe5 6800 case BFD_RELOC_AARCH64_CALL26:
ce336788 6801 case BFD_RELOC_AARCH64_JUMP26:
652afeef
TC		 6802 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
6803 place, value,
1419bbe5
WN		 6804 signed_addend,
6805 weak_undef_p);
6806 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
6807 howto, value);
1419bbe5 6808 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 6809 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
1419bbe5 6810 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 6811 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 6812 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 6813 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
dc8008f5 6814 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 6815 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
a2e1db00 6816 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
ce336788 6817 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 6818 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
1419bbe5
WN		 6819 base_got = globals->root.sgot;
6820 off = h->got.offset;
6821
6822 if (base_got == NULL)
6823 abort ();
6824
6825 if (off == (bfd_vma) -1)
6826 {
6827 bfd_vma plt_index;
6828
6829 /* We can't use h->got.offset here to save state, or
6830 even just remember the offset, as finish_dynamic_symbol
6831 would use that as offset into .got. */
6832
6833 if (globals->root.splt != NULL)
6834 {
b1ee0cc4
WN		 6835 plt_index = ((h->plt.offset - globals->plt_header_size) /
6836 globals->plt_entry_size);
a1bdea65 6837 off = (plt_index + 3) * GOT_ENTRY_SIZE (globals);
1419bbe5
WN		 6838 base_got = globals->root.sgotplt;
6839 }
6840 else
6841 {
6842 plt_index = h->plt.offset / globals->plt_entry_size;
a1bdea65 6843 off = plt_index * GOT_ENTRY_SIZE (globals);
1419bbe5
WN		 6844 base_got = globals->root.igotplt;
6845 }
6846
6847 if (h->dynindx == -1
6848 || h->forced_local
6849 || info->symbolic)
6850 {
6851 /* This references the local definition. We must
6852 initialize this entry in the global offset table.
6853 Since the offset must always be a multiple of 8,
6854 we use the least significant bit to record
6855 whether we have initialized it already.
6856
6857 When doing a dynamic link, we create a .rela.got
6858 relocation entry to initialize the value. This
6859 is done in the finish_dynamic_symbol routine. */
6860 if ((off & 1) != 0)
6861 off &= ~1;
6862 else
6863 {
6864 bfd_put_NN (output_bfd, value,
6865 base_got->contents + off);
6866 /* Note that this is harmless as -1 | 1 still is -1. */
6867 h->got.offset |= 1;
6868 }
6869 }
6870 value = (base_got->output_section->vma
6871 + base_got->output_offset + off);
6872 }
6873 else
6874 value = aarch64_calculate_got_entry_vma (h, globals, info,
6875 value, output_bfd,
6876 unresolved_reloc_p);
a0becb89 6877
2aff25ba
JW		 6878 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
6879 addend = (globals->root.sgot->output_section->vma
6880 + globals->root.sgot->output_offset);
a0becb89 6881
652afeef
TC		 6882 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
6883 place, value,
99ad26cb 6884 addend, weak_undef_p);
1419bbe5 6885 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type, howto, value);
1419bbe5 6886 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 6887 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 6888 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5
WN		 6889 break;
6890 }
6891 }
6892
f657f8c4 6893 skip_ifunc:
ddb7fd0f
L		 6894 resolved_to_zero = (h != NULL
6895 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
6896
a6bb11b2 6897 switch (bfd_r_type)
a06ea964 6898 {
a6bb11b2 6899 case BFD_RELOC_AARCH64_NONE:
0484b454 6900 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 6901 case BFD_RELOC_AARCH64_TLSDESC_CALL:
0484b454 6902 case BFD_RELOC_AARCH64_TLSDESC_LDR:
4ca9b406 6903 case BFD_RELOC_MORELLO_TLSDESC_CALL:
a06ea964
NC		 6904 *unresolved_reloc_p = FALSE;
6905 return bfd_reloc_ok;
6906
a6bb11b2 6907 case BFD_RELOC_AARCH64_NN:
a06ea964
NC		 6908
6909 /* When generating a shared object or relocatable executable, these
07d6d2b8
AM		 6910 relocations are copied into the output file to be resolved at
6911 run time. */
6353d82b
JW		 6912 if (((bfd_link_pic (info)
6913 || globals->root.is_relocatable_executable)
6914 && (input_section->flags & SEC_ALLOC)
6915 && (h == NULL
ddb7fd0f
L		 6916 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
6917 && !resolved_to_zero)
6353d82b
JW		 6918 || h->root.type != bfd_link_hash_undefweak))
6919 /* Or we are creating an executable, we may need to keep relocations
6920 for symbols satisfied by a dynamic library if we manage to avoid
6921 copy relocs for the symbol. */
6922 || (ELIMINATE_COPY_RELOCS
6923 && !bfd_link_pic (info)
6924 && h != NULL
6925 && (input_section->flags & SEC_ALLOC)
6926 && h->dynindx != -1
6927 && !h->non_got_ref
6928 && ((h->def_dynamic
6929 && !h->def_regular)
6930 || h->root.type == bfd_link_hash_undefweak
6931 || h->root.type == bfd_link_hash_undefined)))
a06ea964
NC		 6932 {
6933 Elf_Internal_Rela outrel;
6934 bfd_byte *loc;
6935 bfd_boolean skip, relocate;
6936 asection *sreloc;
6937
6938 *unresolved_reloc_p = FALSE;
6939
a06ea964
NC		 6940 skip = FALSE;
6941 relocate = FALSE;
6942
6943 outrel.r_addend = signed_addend;
6944 outrel.r_offset =
6945 _bfd_elf_section_offset (output_bfd, info, input_section,
6946 rel->r_offset);
6947 if (outrel.r_offset == (bfd_vma) - 1)
6948 skip = TRUE;
6949 else if (outrel.r_offset == (bfd_vma) - 2)
6950 {
6951 skip = TRUE;
6952 relocate = TRUE;
6953 }
0c1ded8d
RL		 6954 else if (abs_symbol_p)
6955 {
6956 /* Local absolute symbol. */
6957 skip = (h->forced_local || (h->dynindx == -1));
6958 relocate = skip;
6959 }
a06ea964
NC		 6960
6961 outrel.r_offset += (input_section->output_section->vma
6962 + input_section->output_offset);
6963
6964 if (skip)
6965 memset (&outrel, 0, sizeof outrel);
6966 else if (h != NULL
6967 && h->dynindx != -1
0e1862bb 6968 && (!bfd_link_pic (info)
0c1ded8d 6969 || !(bfd_link_pie (info) || SYMBOLIC_BIND (info, h))
0e1862bb 6970 || !h->def_regular))
cec5225b 6971 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
a06ea964
NC		 6972 else
6973 {
6974 int symbol;
6975
6976 /* On SVR4-ish systems, the dynamic loader cannot
6977 relocate the text and data segments independently,
6978 so the symbol does not matter. */
6979 symbol = 0;
1f56df9d 6980 relocate = globals->no_apply_dynamic_relocs ? FALSE : TRUE;
a6bb11b2 6981 outrel.r_info = ELFNN_R_INFO (symbol, AARCH64_R (RELATIVE));
a06ea964
NC		 6982 outrel.r_addend += value;
6983 }
6984
1419bbe5
WN		 6985 sreloc = elf_section_data (input_section)->sreloc;
6986 if (sreloc == NULL || sreloc->contents == NULL)
6987 return bfd_reloc_notsupported;
6988
6989 loc = sreloc->contents + sreloc->reloc_count++ * RELOC_SIZE (globals);
cec5225b 6990 bfd_elfNN_swap_reloca_out (output_bfd, &outrel, loc);
a06ea964 6991
1419bbe5 6992 if (sreloc->reloc_count * RELOC_SIZE (globals) > sreloc->size)
a06ea964
NC		 6993 {
6994 /* Sanity to check that we have previously allocated
6995 sufficient space in the relocation section for the
6996 number of relocations we actually want to emit. */
6997 abort ();
6998 }
6999
7000 /* If this reloc is against an external symbol, we do not want to
7001 fiddle with the addend. Otherwise, we need to include the symbol
7002 value so that it becomes an addend for the dynamic reloc. */
7003 if (!relocate)
7004 return bfd_reloc_ok;
7005
7006 return _bfd_final_link_relocate (howto, input_bfd, input_section,
7007 contents, rel->r_offset, value,
7008 signed_addend);
7009 }
7010 else
7011 value += signed_addend;
7012 break;
7013
e19e9199
SP		 7014 case BFD_RELOC_MORELLO_CALL26:
7015 case BFD_RELOC_MORELLO_JUMP26:
a6bb11b2 7016 case BFD_RELOC_AARCH64_CALL26:
ce336788 7017 case BFD_RELOC_AARCH64_JUMP26:
a06ea964
NC		 7018 {
7019 asection *splt = globals->root.splt;
c7cd2917
SP		 7020 bfd_boolean via_plt_p =
7021 splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1;
a06ea964
NC		 7022
7023 /* A call to an undefined weak symbol is converted to a jump to
7024 the next instruction unless a PLT entry will be created.
7025 The jump to the next instruction is optimized as a NOP.
7026 Do the same for local undefined symbols. */
7027 if (weak_undef_p && ! via_plt_p)
7028 {
7029 bfd_putl32 (INSN_NOP, hit_data);
7030 return bfd_reloc_ok;
7031 }
7032
7033 /* If the call goes through a PLT entry, make sure to
7034 check distance to the right destination address. */
7035 if (via_plt_p)
07f9ddfe
JW		 7036 value = (splt->output_section->vma
7037 + splt->output_offset + h->plt.offset);
7038
7039 /* Check if a stub has to be inserted because the destination
7040 is too far away. */
7041 struct elf_aarch64_stub_hash_entry *stub_entry = NULL;
2f340668 7042
50e192f0
SP		 7043 enum elf_aarch64_stub_type c64_stub = aarch64_stub_none;
7044
7045 /* Figure out if we need an interworking stub and if yes, what
7046 kind. */
7047 if (!via_plt_p)
7048 c64_stub = aarch64_interwork_stub (r_type, to_c64);
7049
2f340668
JW		 7050 /* If the branch destination is directed to plt stub, "value" will be
7051 the final destination, otherwise we should plus signed_addend, it may
7052 contain non-zero value, for example call to local function symbol
7053 which are turned into "sec_sym + sec_off", and sec_off is kept in
7054 signed_addend. */
50e192f0
SP		 7055 if (c64_stub != aarch64_stub_none
7056 || (aarch64_branch_reloc_p (r_type)
7057 && !aarch64_valid_branch_p ((via_plt_p ? value
7058 : value + signed_addend), place)))
7059 {
7060 /* The target is out of reach, so redirect the branch to
7061 the local stub for this function. */
7062 stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec,
7063 h, rel, globals,
7064 c64_stub);
7065 }
7066
07f9ddfe 7067 if (stub_entry != NULL)
2f340668
JW		 7068 {
7069 value = (stub_entry->stub_offset
7070 + stub_entry->stub_sec->output_offset
7071 + stub_entry->stub_sec->output_section->vma);
7072
7073 /* We have redirected the destination to stub entry address,
7074 so ignore any addend record in the original rela entry. */
7075 signed_addend = 0;
7076 }
a06ea964 7077 }
652afeef
TC		 7078 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7079 place, value,
caed7120 7080 signed_addend, weak_undef_p);
07f9ddfe 7081 *unresolved_reloc_p = FALSE;
a06ea964
NC		 7082 break;
7083
dcbd20eb
JW		 7084 case BFD_RELOC_AARCH64_16_PCREL:
7085 case BFD_RELOC_AARCH64_32_PCREL:
7086 case BFD_RELOC_AARCH64_64_PCREL:
ce336788
JW		 7087 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
7088 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP		 7089 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
7090 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
ce336788
JW		 7091 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
7092 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 7093 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
1daf502a
RL		 7094 case BFD_RELOC_AARCH64_MOVW_PREL_G0:
7095 case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
7096 case BFD_RELOC_AARCH64_MOVW_PREL_G1:
7097 case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
7098 case BFD_RELOC_AARCH64_MOVW_PREL_G2:
7099 case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
7100 case BFD_RELOC_AARCH64_MOVW_PREL_G3:
0e1862bb 7101 if (bfd_link_pic (info)
dcbd20eb
JW		 7102 && (input_section->flags & SEC_ALLOC) != 0
7103 && (input_section->flags & SEC_READONLY) != 0
d68f1976 7104 && !SYMBOL_REFERENCES_LOCAL (info, h))
dcbd20eb
JW		 7105 {
7106 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7107
4eca0228 7108 _bfd_error_handler
695344c0 7109 /* xgettext:c-format */
871b3ab2 7110 (_("%pB: relocation %s against symbol `%s' which may bind "
d68f1976
JW		 7111 "externally can not be used when making a shared object; "
7112 "recompile with -fPIC"),
dcbd20eb
JW		 7113 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7114 h->root.root.string);
7115 bfd_set_error (bfd_error_bad_value);
1d75a8e2 7116 return bfd_reloc_notsupported;
dcbd20eb 7117 }
c7cd2917
SP		 7118 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7119 place, value,
7120 signed_addend,
7121 weak_undef_p);
8b21361b 7122
f0070c1e
SP		 7123 if (bfd_r_type == BFD_RELOC_AARCH64_ADR_LO21_PCREL && isym != NULL
7124 && isym->st_target_internal & ST_BRANCH_TO_C64)
8b21361b 7125 value |= 1;
c7cd2917
SP		 7126 break;
7127
e19e9199
SP		 7128 case BFD_RELOC_MORELLO_BRANCH19:
7129 case BFD_RELOC_MORELLO_TSTBR14:
50e192f0
SP		 7130 c64_rtype = TRUE;
7131 /* Fall through. */
c7cd2917
SP		 7132 case BFD_RELOC_AARCH64_BRANCH19:
7133 case BFD_RELOC_AARCH64_TSTBR14:
7134 if (h && h->root.type == bfd_link_hash_undefined)
7135 {
7136 _bfd_error_handler
7137 /* xgettext:c-format */
7138 (_("%pB: conditional branch to undefined symbol `%s' "
7139 "not allowed"), input_bfd, h->root.root.string);
7140 bfd_set_error (bfd_error_bad_value);
7141 return bfd_reloc_notsupported;
7142 }
50e192f0
SP		 7143 {
7144 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7145
7146 if ((c64_rtype && !to_c64) || (!c64_rtype && to_c64))
7147 {
7148 _bfd_error_handler
7149 /* xgettext:c-format */
7150 (_("%pB: interworking not supported on relocation %s"),
7151 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7152 return bfd_reloc_notsupported;
7153 }
7154 }
1a0670f3 7155 /* Fall through. */
dcbd20eb 7156
a6bb11b2 7157 case BFD_RELOC_AARCH64_16:
92d77487
RL		 7158#if ARCH_SIZE == 64
7159 case BFD_RELOC_AARCH64_32:
7160#endif
a6bb11b2 7161 case BFD_RELOC_AARCH64_ADD_LO12:
ce336788 7162 case BFD_RELOC_AARCH64_LDST128_LO12:
a6bb11b2
YZ		 7163 case BFD_RELOC_AARCH64_LDST16_LO12:
7164 case BFD_RELOC_AARCH64_LDST32_LO12:
7165 case BFD_RELOC_AARCH64_LDST64_LO12:
ce336788 7166 case BFD_RELOC_AARCH64_LDST8_LO12:
a6bb11b2
YZ		 7167 case BFD_RELOC_AARCH64_MOVW_G0:
7168 case BFD_RELOC_AARCH64_MOVW_G0_NC:
ce336788 7169 case BFD_RELOC_AARCH64_MOVW_G0_S:
a6bb11b2
YZ		 7170 case BFD_RELOC_AARCH64_MOVW_G1:
7171 case BFD_RELOC_AARCH64_MOVW_G1_NC:
ce336788 7172 case BFD_RELOC_AARCH64_MOVW_G1_S:
a6bb11b2
YZ		 7173 case BFD_RELOC_AARCH64_MOVW_G2:
7174 case BFD_RELOC_AARCH64_MOVW_G2_NC:
ce336788 7175 case BFD_RELOC_AARCH64_MOVW_G2_S:
a6bb11b2 7176 case BFD_RELOC_AARCH64_MOVW_G3:
652afeef
TC		 7177 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7178 place, value,
caed7120 7179 signed_addend, weak_undef_p);
f0070c1e
SP		 7180 if (bfd_r_type == BFD_RELOC_AARCH64_ADD_LO12 && isym != NULL
7181 && isym->st_target_internal & ST_BRANCH_TO_C64)
8b21361b
SP		 7182 value |= 1;
7183
a06ea964
NC		 7184 break;
7185
a6bb11b2 7186 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 7187 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a6bb11b2 7188 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 7189 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
ce336788 7190 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
99ad26cb 7191 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
ce336788 7192 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 7193 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
2aff25ba
JW		 7194 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
7195 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
7196 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
8d4edc5f
SP		 7197 off = symbol_got_offset (input_bfd, h, r_symndx);
7198 base_got = globals->root.sgot;
5fa80905 7199
c50aec72
MM		 7200 bfd_boolean c64_reloc =
7201 (bfd_r_type == BFD_RELOC_MORELLO_LD128_GOT_LO12_NC
7202 || bfd_r_type == BFD_RELOC_MORELLO_ADR_GOT_PAGE);
8d4edc5f 7203
5fa80905
AC		 7204 if (signed_addend != 0)
7205 {
7206 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7207 _bfd_error_handler
7208 /* xgettext:c-format */
7209 (_("%pB: symbol plus addend can not be placed into the GOT "
7210 "for relocation %s"),
7211 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7212 abort ();
7213 }
7214
8d4edc5f 7215 if (base_got == NULL)
a06ea964
NC		 7216 BFD_ASSERT (h != NULL);
7217
ff07562f 7218 relative_reloc = FALSE;
a06ea964
NC		 7219 if (h != NULL)
7220 {
99ad26cb 7221 bfd_vma addend = 0;
5fa80905 7222 bfd_vma frag_value;
ff07562f
JW		 7223
7224 /* If a symbol is not dynamic and is not undefined weak, bind it
7225 locally and generate a RELATIVE relocation under PIC mode.
7226
7227 NOTE: one symbol may be referenced by several relocations, we
7228 should only generate one RELATIVE relocation for that symbol.
8d4edc5f
SP		 7229 Therefore, check GOT offset mark first.
7230
7231 NOTE2: Symbol references via GOT in C64 static binaries without
7232 PIC should always have relative relocations, so we do that here
7233 early. */
7234 if (((h->dynindx == -1
7235 && !h->forced_local
7236 && h->root.type != bfd_link_hash_undefweak
7237 && bfd_link_pic (info))
7238 || (!bfd_link_pic (info) && bfd_link_executable (info)
7239 && c64_reloc))
ff07562f
JW		 7240 && !symbol_got_offset_mark_p (input_bfd, h, r_symndx))
7241 relative_reloc = TRUE;
7242
5fa80905
AC		 7243 if (c64_reloc
7244 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
7245 signed_addend = (value | h->target_internal) - frag_value;
7246 else
7247 frag_value = value | h->target_internal;
7248
c50aec72 7249 value = aarch64_calculate_got_entry_vma (h, globals, info,
5fa80905 7250 frag_value,
a06ea964
NC		 7251 output_bfd,
7252 unresolved_reloc_p);
ff07562f
JW		 7253 /* Record the GOT entry address which will be used when generating
7254 RELATIVE relocation. */
7255 if (relative_reloc)
8d4edc5f 7256 got_entry_addr = value;
ff07562f 7257
2aff25ba 7258 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW		 7259 addend = (globals->root.sgot->output_section->vma
7260 + globals->root.sgot->output_offset);
652afeef
TC		 7261 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7262 place, value,
99ad26cb 7263 addend, weak_undef_p);
a06ea964 7264 }
b53b1bed
JW		 7265 else
7266 {
99ad26cb 7267 bfd_vma addend = 0;
b53b1bed
JW		 7268 struct elf_aarch64_local_symbol *locals
7269 = elf_aarch64_locals (input_bfd);
7270
7271 if (locals == NULL)
7272 {
7273 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
4eca0228 7274 _bfd_error_handler
695344c0 7275 /* xgettext:c-format */
90b6238f 7276 (_("%pB: local symbol descriptor table be NULL when applying "
b53b1bed
JW		 7277 "relocation %s against local symbol"),
7278 input_bfd, elfNN_aarch64_howto_table[howto_index].name);
7279 abort ();
7280 }
7281
ff07562f
JW		 7282 got_entry_addr = (base_got->output_section->vma
7283 + base_got->output_offset + off);
b53b1bed
JW		 7284
7285 if (!symbol_got_offset_mark_p (input_bfd, h, r_symndx))
7286 {
5fa80905
AC		 7287 bfd_vma frag_value;
7288
7289 if (c64_reloc
7290 && c64_symbol_adjust (h, value, sym_sec, info, &frag_value))
7291 signed_addend = (value | sym->st_target_internal) - frag_value;
7292 else
7293 frag_value = value | sym->st_target_internal;
7294
7295 bfd_put_64 (output_bfd, frag_value, base_got->contents + off);
b53b1bed 7296
ff07562f
JW		 7297 /* For local symbol, we have done absolute relocation in static
7298 linking stage. While for shared library, we need to update the
7299 content of GOT entry according to the shared object's runtime
7300 base address. So, we need to generate a R_AARCH64_RELATIVE reloc
7301 for dynamic linker. */
c50aec72
MM		 7302 if (bfd_link_pic (info)
7303 || (!bfd_link_pic (info) && bfd_link_executable (info)
7304 && c64_reloc))
ff07562f 7305 relative_reloc = TRUE;
b53b1bed
JW		 7306
7307 symbol_got_offset_mark (input_bfd, h, r_symndx);
7308 }
7309
7310 /* Update the relocation value to GOT entry addr as we have transformed
7311 the direct data access into indirect data access through GOT. */
7312 value = got_entry_addr;
99ad26cb 7313
2aff25ba 7314 if (aarch64_relocation_aginst_gp_p (bfd_r_type))
99ad26cb
JW		 7315 addend = base_got->output_section->vma + base_got->output_offset;
7316
652afeef
TC		 7317 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7318 place, value,
99ad26cb 7319 addend, weak_undef_p);
b53b1bed 7320 }
ff07562f
JW		 7321
7322 if (relative_reloc)
7323 {
7324 asection *s;
7325 Elf_Internal_Rela outrel;
7326
a1bdea65
SP		 7327 enum elf_aarch64_reloc_type rtype = AARCH64_R (RELATIVE);
7328
8d4edc5f
SP		 7329 s = globals->root.srelgot;
7330
a1bdea65
SP		 7331 /* For a C64 relative relocation, also add size and permissions into
7332 the frag. */
c50aec72 7333 if (c64_reloc)
a1bdea65
SP		 7334 {
7335 bfd_reloc_status_type ret;
7336
e10c835d
MM		 7337 ret = c64_fixup_frag (input_bfd, info, bfd_r_type, sym, h,
7338 sym_sec, s, base_got->contents + off + 8,
7339 orig_value, 0, off);
a1bdea65
SP		 7340
7341 if (ret != bfd_reloc_continue)
7342 return ret;
7343
7344 rtype = MORELLO_R (RELATIVE);
8d4edc5f
SP		 7345
7346 if (bfd_link_executable (info) && !bfd_link_pic (info))
7347 s = globals->srelcaps;
7348
5fa80905 7349 outrel.r_addend = signed_addend;
a1bdea65
SP		 7350 }
7351 else
7352 outrel.r_addend = orig_value;
7353
ff07562f
JW		 7354 if (s == NULL)
7355 abort ();
7356
7357 outrel.r_offset = got_entry_addr;
a1bdea65 7358 outrel.r_info = ELFNN_R_INFO (0, rtype);
ff07562f
JW		 7359 elf_append_rela (output_bfd, s, &outrel);
7360 }
a2e1db00
RL		 7361 break;
7362
ce336788 7363 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 7364 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 7365 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
a6bb11b2 7366 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 7367 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
ce336788 7368 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 7369 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
73f925cc 7370 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 7371 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 7372 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 7373 if (globals->root.sgot == NULL)
7374 return bfd_reloc_notsupported;
7375
7376 value = (symbol_got_offset (input_bfd, h, r_symndx)
7377 + globals->root.sgot->output_section->vma
f44a1f8e 7378 + globals->root.sgot->output_offset);
a06ea964 7379
652afeef
TC		 7380 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7381 place, value,
caed7120 7382 0, weak_undef_p);
a06ea964
NC		 7383 *unresolved_reloc_p = FALSE;
7384 break;
7385
7ba7cfe4 7386 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 7387 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
3b957e5b
RL		 7388 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
7389 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
94facae3
RL		 7390 if (globals->root.sgot == NULL)
7391 return bfd_reloc_notsupported;
7392
7393 value = symbol_got_offset (input_bfd, h, r_symndx);
652afeef
TC		 7394 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7395 place, value,
94facae3
RL		 7396 0, weak_undef_p);
7397 *unresolved_reloc_p = FALSE;
7398 break;
7399
6ffe9a1b 7400 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
40fbed84 7401 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
753999c1 7402 case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
07c9aa07
JW		 7403 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
7404 case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
7405 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
7406 case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
7407 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
7408 case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
7409 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
7410 case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
6ffe9a1b
JW		 7411 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
7412 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
7413 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
7414 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
7415 case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
652afeef
TC		 7416 {
7417 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
7418 {
7419 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7420 _bfd_error_handler
7421 /* xgettext:c-format */
7422 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
7423 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7424 h->root.root.string);
7425 bfd_set_error (bfd_error_bad_value);
7426 return bfd_reloc_notsupported;
7427 }
7428
7429 bfd_vma def_value
7430 = weak_undef_p ? 0 : signed_addend - dtpoff_base (info);
7431 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7432 place, value,
7433 def_value, weak_undef_p);
7434 break;
7435 }
40fbed84 7436
a6bb11b2
YZ		 7437 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
7438 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
7439 case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
e04ef022
RL		 7440 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
7441 case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
7442 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
7443 case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
7444 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
7445 case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
7446 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
7447 case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
a6bb11b2
YZ		 7448 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
7449 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
7450 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
7451 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
7452 case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
652afeef
TC		 7453 {
7454 if (!(weak_undef_p || elf_hash_table (info)->tls_sec))
7455 {
7456 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
7457 _bfd_error_handler
7458 /* xgettext:c-format */
7459 (_("%pB: TLS relocation %s against undefined symbol `%s'"),
7460 input_bfd, elfNN_aarch64_howto_table[howto_index].name,
7461 h->root.root.string);
7462 bfd_set_error (bfd_error_bad_value);
7463 return bfd_reloc_notsupported;
7464 }
7465
7466 bfd_vma def_value
7467 = weak_undef_p ? 0 : signed_addend - tpoff_base (info);
7468 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7469 place, value,
7470 def_value, weak_undef_p);
7471 *unresolved_reloc_p = FALSE;
7472 break;
7473 }
a06ea964 7474
f955cccf 7475 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 7476 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
4ca9b406 7477 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
389b8029 7478 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 7479 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 7480 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 7481 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
4ca9b406 7482 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a06ea964
NC		 7483 if (globals->root.sgot == NULL)
7484 return bfd_reloc_notsupported;
a06ea964
NC		 7485 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
7486 + globals->root.sgotplt->output_section->vma
f44a1f8e 7487 + globals->root.sgotplt->output_offset
a06ea964
NC		 7488 + globals->sgotplt_jump_table_size);
7489
652afeef
TC		 7490 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7491 place, value,
caed7120 7492 0, weak_undef_p);
a06ea964
NC		 7493 *unresolved_reloc_p = FALSE;
7494 break;
7495
0484b454
RL		 7496 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
7497 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
7498 if (globals->root.sgot == NULL)
7499 return bfd_reloc_notsupported;
7500
7501 value = (symbol_tlsdesc_got_offset (input_bfd, h, r_symndx)
7502 + globals->root.sgotplt->output_section->vma
7503 + globals->root.sgotplt->output_offset
7504 + globals->sgotplt_jump_table_size);
7505
7506 value -= (globals->root.sgot->output_section->vma
7507 + globals->root.sgot->output_offset);
7508
652afeef
TC		 7509 value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
7510 place, value,
0484b454
RL		 7511 0, weak_undef_p);
7512 *unresolved_reloc_p = FALSE;
7513 break;
7514
40bbb79e
SP		 7515 case BFD_RELOC_MORELLO_CAPINIT:
7516 {
7517 Elf_Internal_Rela outrel;
7518
7519 if (input_section->flags & SEC_READONLY)
7520 {
7521 _bfd_error_handler
7522 /* xgettext:c-format */
7523 (_("%pB: capability relocation section must be writable"),
7524 input_bfd);
7525 bfd_set_error (bfd_error_bad_value);
7526 return bfd_reloc_notsupported;
7527 }
7528
7529 outrel.r_offset = _bfd_elf_section_offset (output_bfd, info,
7530 input_section,
7531 rel->r_offset);
7532
7533 outrel.r_offset += (input_section->output_section->vma
7534 + input_section->output_offset);
7535
7536 /* Capability-aligned. */
7537 if (outrel.r_offset & 0xf)
7538 return bfd_reloc_overflow;
7539
7540 bfd_reloc_status_type ret;
7541
e10c835d
MM		 7542 ret = c64_fixup_frag (input_bfd, info, bfd_r_type, sym, h, sym_sec,
7543 input_section, hit_data + 8, value,
7544 signed_addend, rel->r_offset);
40bbb79e
SP		 7545
7546 if (ret != bfd_reloc_continue)
7547 return ret;
7548
7549 outrel.r_addend = signed_addend;
5fa80905 7550 value |= (h != NULL ? h->target_internal : sym->st_target_internal);
40bbb79e
SP		 7551
7552 /* Emit a dynamic relocation if we are building PIC. */
7553 if (h != NULL
7554 && h->dynindx != -1
7555 && bfd_link_pic (info)
7556 && !SYMBOL_REFERENCES_LOCAL (info, h))
7557 outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type);
7558 else
7559 outrel.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
7560
5fa80905
AC		 7561 /* Symbols without size information get bounds to the
7562 whole section: adjust the base of the capability to the
7563 start of the section and set the addend to obtain the
7564 correct address for the symbol. */
7565 bfd_vma new_value;
7566 if (c64_symbol_adjust (h, value, sym_sec, info, &new_value))
7567 {
7568 outrel.r_addend += (value - new_value);
7569 value = new_value;
7570 }
40bbb79e
SP		 7571
7572 asection *s = globals->srelcaps;
7573
7574 elf_append_rela (output_bfd, s, &outrel);
7575 *unresolved_reloc_p = FALSE;
7576 }
7577 break;
7578
a06ea964
NC		 7579 default:
7580 return bfd_reloc_notsupported;
7581 }
7582
7583 if (saved_addend)
7584 *saved_addend = value;
7585
7586 /* Only apply the final relocation in a sequence. */
7587 if (save_addend)
7588 return bfd_reloc_continue;
7589
caed7120
YZ		 7590 return _bfd_aarch64_elf_put_addend (input_bfd, hit_data, bfd_r_type,
7591 howto, value);
a06ea964
NC		 7592}
7593
2d0ca824
YN		 7594/* LP64 and ILP32 operates on x- and w-registers respectively.
7595 Next definitions take into account the difference between
7596 corresponding machine codes. R means x-register if the target
7597 arch is LP64, and w-register if the target is ILP32. */
7598
7599#if ARCH_SIZE == 64
7600# define add_R0_R0 (0x91000000)
7601# define add_R0_R0_R1 (0x8b000020)
7602# define add_R0_R1 (0x91400020)
7603# define ldr_R0 (0x58000000)
7604# define ldr_R0_mask(i) (i & 0xffffffe0)
7605# define ldr_R0_x0 (0xf9400000)
7606# define ldr_hw_R0 (0xf2a00000)
7607# define movk_R0 (0xf2800000)
7608# define movz_R0 (0xd2a00000)
7609# define movz_hw_R0 (0xd2c00000)
7610#else /*ARCH_SIZE == 32 */
7611# define add_R0_R0 (0x11000000)
7612# define add_R0_R0_R1 (0x0b000020)
7613# define add_R0_R1 (0x11400020)
7614# define ldr_R0 (0x18000000)
7615# define ldr_R0_mask(i) (i & 0xbfffffe0)
7616# define ldr_R0_x0 (0xb9400000)
7617# define ldr_hw_R0 (0x72a00000)
7618# define movk_R0 (0x72800000)
7619# define movz_R0 (0x52a00000)
7620# define movz_hw_R0 (0x52c00000)
7621#endif
7622
9fca35fc
TC		 7623/* Structure to hold payload for _bfd_aarch64_erratum_843419_clear_stub,
7624 it is used to identify the stub information to reset. */
7625
7626struct erratum_843419_branch_to_stub_clear_data
7627{
7628 bfd_vma adrp_offset;
7629 asection *output_section;
7630};
7631
7632/* Clear the erratum information for GEN_ENTRY if the ADRP_OFFSET and
7633 section inside IN_ARG matches. The clearing is done by setting the
7634 stub_type to none. */
7635
7636static bfd_boolean
7637_bfd_aarch64_erratum_843419_clear_stub (struct bfd_hash_entry *gen_entry,
7638 void *in_arg)
7639{
7640 struct elf_aarch64_stub_hash_entry *stub_entry
7641 = (struct elf_aarch64_stub_hash_entry *) gen_entry;
7642 struct erratum_843419_branch_to_stub_clear_data *data
7643 = (struct erratum_843419_branch_to_stub_clear_data *) in_arg;
7644
7645 if (stub_entry->target_section != data->output_section
7646 || stub_entry->stub_type != aarch64_stub_erratum_843419_veneer
7647 || stub_entry->adrp_offset != data->adrp_offset)
7648 return TRUE;
7649
7650 /* Change the stub type instead of removing the entry, removing from the hash
7651 table would be slower and we have already reserved the memory for the entry
7652 so there wouldn't be much gain. Changing the stub also keeps around a
7653 record of what was there before. */
7654 stub_entry->stub_type = aarch64_stub_none;
7655
7656 /* We're done and there could have been only one matching stub at that
7657 particular offset, so abort further traversal. */
7658 return FALSE;
7659}
7660
7661/* TLS Relaxations may relax an adrp sequence that matches the erratum 843419
7662 sequence. In this case the erratum no longer applies and we need to remove
7663 the entry from the pending stub generation. This clears matching adrp insn
7664 at ADRP_OFFSET in INPUT_SECTION in the stub table defined in GLOBALS. */
7665
7666static void
7667clear_erratum_843419_entry (struct elf_aarch64_link_hash_table *globals,
7668 bfd_vma adrp_offset, asection *input_section)
7669{
739b5c9c 7670 if (globals->fix_erratum_843419 & ERRAT_ADRP)
9fca35fc
TC		 7671 {
7672 struct erratum_843419_branch_to_stub_clear_data data;
7673 data.adrp_offset = adrp_offset;
7674 data.output_section = input_section;
7675
7676 bfd_hash_traverse (&globals->stub_hash_table,
7677 _bfd_aarch64_erratum_843419_clear_stub, &data);
7678 }
7679}
7680
4ca9b406
SP		 7681#define BUILD_MOVZ(_reg, _imm) (movz_R0 \
7682 | ((((_imm) >> 16) & 0xffff) << 5) \
7683 | (_reg))
7684#define BUILD_MOVK(_reg, _imm) (movk_R0 | (((_imm) & 0xffff) << 5) | (_reg))
7685
a06ea964
NC		 7686/* Handle TLS relaxations. Relaxing is possible for symbols that use
7687 R_AARCH64_TLSDESC_ADR_{PAGE, LD64_LO12_NC, ADD_LO12_NC} during a static
7688 link.
7689
7690 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7691 is to then call final_link_relocate. Return other values in the
7692 case of error. */
7693
7694static bfd_reloc_status_type
4ca9b406
SP		 7695elfNN_aarch64_tls_relax (bfd *input_bfd, struct bfd_link_info *info,
7696 asection *input_section,
9fca35fc 7697 bfd_byte *contents, Elf_Internal_Rela *rel,
4ca9b406 7698 struct elf_link_hash_entry *h, unsigned long r_symndx)
a06ea964
NC		 7699{
7700 bfd_boolean is_local = h == NULL;
4ca9b406 7701
cec5225b 7702 unsigned int r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 7703 unsigned long insn;
4ca9b406
SP		 7704 bfd_vma sym_size = 0;
7705 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
a06ea964
NC		 7706
7707 BFD_ASSERT (globals && input_bfd && contents && rel);
7708
4ca9b406
SP		 7709 if (is_local)
7710 {
7711 if (h != NULL)
7712 sym_size = h->size;
7713 else
7714 {
7715 Elf_Internal_Sym *sym;
7716
7717 sym = bfd_sym_from_r_symndx (&globals->root.sym_cache, input_bfd,
7718 r_symndx);
7719 BFD_ASSERT (sym != NULL);
7720 sym_size = sym->st_size;
7721 }
7722 }
7723
0aa13fee 7724 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 7725 {
4ca9b406
SP		 7726 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
7727 if (is_local || !bfd_link_pic (info))
7728 {
7729 /* GD->LE relaxation:
7730 nop => movz x1, objsize_hi16
7731 adrp x0, :tlsdesc:var => movz x0, :tprel_g1:var */
7732 bfd_putl32 (BUILD_MOVZ(1, sym_size), contents + rel->r_offset - 4);
7733 bfd_putl32 (movz_R0, contents + rel->r_offset);
7734
7735 /* We have relaxed the adrp into a mov, we may have to clear any
7736 pending erratum fixes. */
7737 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
7738 return bfd_reloc_continue;
7739 }
7740 else
7741 {
7742 /* GD->IE relaxation: Not implemented. */
7743 return bfd_reloc_continue;
7744 }
a6bb11b2 7745 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
ce336788 7746 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
a06ea964
NC		 7747 if (is_local)
7748 {
7749 /* GD->LE relaxation:
2d0ca824 7750 adrp x0, :tlsgd:var => movz R0, :tprel_g1:var
a06ea964 7751 or
2d0ca824
YN		 7752 adrp x0, :tlsdesc:var => movz R0, :tprel_g1:var
7753
7754 Where R is x for LP64, and w for ILP32. */
7755 bfd_putl32 (movz_R0, contents + rel->r_offset);
9fca35fc
TC		 7756 /* We have relaxed the adrp into a mov, we may have to clear any
7757 pending erratum fixes. */
7758 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC		 7759 return bfd_reloc_continue;
7760 }
7761 else
7762 {
7763 /* GD->IE relaxation:
7764 adrp x0, :tlsgd:var => adrp x0, :gottprel:var
7765 or
7766 adrp x0, :tlsdesc:var => adrp x0, :gottprel:var
7767 */
a06ea964
NC		 7768 return bfd_reloc_continue;
7769 }
7770
389b8029
MS		 7771 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7772 BFD_ASSERT (0);
7773 break;
7774
1ada945d
MS		 7775 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
7776 if (is_local)
7777 {
7778 /* Tiny TLSDESC->LE relaxation:
07d6d2b8
AM		 7779 ldr x1, :tlsdesc:var => movz R0, #:tprel_g1:var
7780 adr x0, :tlsdesc:var => movk R0, #:tprel_g0_nc:var
1ada945d 7781 .tlsdesccall var
07d6d2b8 7782 blr x1 => nop
2d0ca824
YN		 7783
7784 Where R is x for LP64, and w for ILP32. */
1ada945d
MS		 7785 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
7786 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
7787
7788 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7789 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
7790 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7791
2d0ca824
YN		 7792 bfd_putl32 (movz_R0, contents + rel->r_offset);
7793 bfd_putl32 (movk_R0, contents + rel->r_offset + 4);
1ada945d
MS		 7794 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
7795 return bfd_reloc_continue;
7796 }
7797 else
7798 {
7799 /* Tiny TLSDESC->IE relaxation:
07d6d2b8
AM		 7800 ldr x1, :tlsdesc:var => ldr x0, :gottprel:var
7801 adr x0, :tlsdesc:var => nop
1ada945d 7802 .tlsdesccall var
07d6d2b8 7803 blr x1 => nop
1ada945d
MS		 7804 */
7805 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSDESC_ADR_PREL21));
7806 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (TLSDESC_CALL));
7807
7808 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7809 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7810
2d0ca824 7811 bfd_putl32 (ldr_R0, contents + rel->r_offset);
1ada945d
MS		 7812 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
7813 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 8);
7814 return bfd_reloc_continue;
7815 }
7816
3c12b054
MS		 7817 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7818 if (is_local)
7819 {
7820 /* Tiny GD->LE relaxation:
07d6d2b8
AM		 7821 adr x0, :tlsgd:var => mrs x1, tpidr_el0
7822 bl __tls_get_addr => add R0, R1, #:tprel_hi12:x, lsl #12
7823 nop => add R0, R0, #:tprel_lo12_nc:x
2d0ca824
YN		 7824
7825 Where R is x for LP64, and x for Ilp32. */
3c12b054
MS		 7826
7827 /* First kill the tls_get_addr reloc on the bl instruction. */
7828 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
7829
7830 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 0);
2d0ca824
YN		 7831 bfd_putl32 (add_R0_R1, contents + rel->r_offset + 4);
7832 bfd_putl32 (add_R0_R0, contents + rel->r_offset + 8);
3c12b054
MS		 7833
7834 rel[1].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7835 AARCH64_R (TLSLE_ADD_TPREL_LO12_NC));
7836 rel[1].r_offset = rel->r_offset + 8;
7837
7838 /* Move the current relocation to the second instruction in
7839 the sequence. */
7840 rel->r_offset += 4;
7841 rel->r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7842 AARCH64_R (TLSLE_ADD_TPREL_HI12));
7843 return bfd_reloc_continue;
7844 }
7845 else
7846 {
7847 /* Tiny GD->IE relaxation:
07d6d2b8
AM		 7848 adr x0, :tlsgd:var => ldr R0, :gottprel:var
7849 bl __tls_get_addr => mrs x1, tpidr_el0
7850 nop => add R0, R0, R1
2d0ca824
YN		 7851
7852 Where R is x for LP64, and w for Ilp32. */
3c12b054
MS		 7853
7854 /* First kill the tls_get_addr reloc on the bl instruction. */
7855 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
7856 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7857
2d0ca824 7858 bfd_putl32 (ldr_R0, contents + rel->r_offset);
3c12b054 7859 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 7860 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
3c12b054
MS		 7861 return bfd_reloc_continue;
7862 }
7863
ac734732
RL		 7864#if ARCH_SIZE == 64
7865 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
7866 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (TLSGD_MOVW_G0_NC));
7867 BFD_ASSERT (rel->r_offset + 12 == rel[2].r_offset);
7868 BFD_ASSERT (ELFNN_R_TYPE (rel[2].r_info) == AARCH64_R (CALL26));
7869
7870 if (is_local)
7871 {
7872 /* Large GD->LE relaxation:
07d6d2b8 7873 movz x0, #:tlsgd_g1:var => movz x0, #:tprel_g2:var, lsl #32
ac734732 7874 movk x0, #:tlsgd_g0_nc:var => movk x0, #:tprel_g1_nc:var, lsl #16
07d6d2b8
AM		 7875 add x0, gp, x0 => movk x0, #:tprel_g0_nc:var
7876 bl __tls_get_addr => mrs x1, tpidr_el0
7877 nop => add x0, x0, x1
ac734732
RL		 7878 */
7879 rel[2].r_info = ELFNN_R_INFO (ELFNN_R_SYM (rel->r_info),
7880 AARCH64_R (TLSLE_MOVW_TPREL_G0_NC));
7881 rel[2].r_offset = rel->r_offset + 8;
7882
2d0ca824
YN		 7883 bfd_putl32 (movz_hw_R0, contents + rel->r_offset + 0);
7884 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset + 4);
7885 bfd_putl32 (movk_R0, contents + rel->r_offset + 8);
ac734732 7886 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 7887 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL		 7888 }
7889 else
7890 {
7891 /* Large GD->IE relaxation:
07d6d2b8 7892 movz x0, #:tlsgd_g1:var => movz x0, #:gottprel_g1:var, lsl #16
ac734732 7893 movk x0, #:tlsgd_g0_nc:var => movk x0, #:gottprel_g0_nc:var
07d6d2b8
AM		 7894 add x0, gp, x0 => ldr x0, [gp, x0]
7895 bl __tls_get_addr => mrs x1, tpidr_el0
7896 nop => add x0, x0, x1
ac734732
RL		 7897 */
7898 rel[2].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
7899 bfd_putl32 (0xd2a80000, contents + rel->r_offset + 0);
2d0ca824 7900 bfd_putl32 (ldr_R0, contents + rel->r_offset + 8);
ac734732 7901 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 12);
2d0ca824 7902 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 16);
ac734732
RL		 7903 }
7904 return bfd_reloc_continue;
7905
7906 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
7907 return bfd_reloc_continue;
7908#endif
7909
043bf05a
MS		 7910 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
7911 return bfd_reloc_continue;
7912
4ca9b406
SP		 7913 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
7914 if (is_local || !bfd_link_pic (info))
7915 {
7916 /* GD->LE relaxation:
7917 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var */
7918 bfd_putl32 (movk_R0, contents + rel->r_offset);
7919 return bfd_reloc_continue;
7920 }
7921 else
7922 {
7923 /* GD->IE relaxation: not implemented. */
7924 return bfd_reloc_continue;
7925 }
a6bb11b2 7926 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
a06ea964
NC		 7927 if (is_local)
7928 {
7929 /* GD->LE relaxation:
7930 ldr xd, [x0, #:tlsdesc_lo12:var] => movk x0, :tprel_g0_nc:var
2d0ca824
YN		 7931
7932 Where R is x for lp64 mode, and w for ILP32 mode. */
7933 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964
NC		 7934 return bfd_reloc_continue;
7935 }
7936 else
7937 {
7938 /* GD->IE relaxation:
2d0ca824
YN		 7939 ldr xd, [x0, #:tlsdesc_lo12:var] => ldr R0, [x0, #:gottprel_lo12:var]
7940
7941 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964 7942 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 7943 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
a06ea964
NC		 7944 return bfd_reloc_continue;
7945 }
7946
a6bb11b2 7947 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a06ea964
NC		 7948 if (is_local)
7949 {
7950 /* GD->LE relaxation
07d6d2b8
AM		 7951 add x0, #:tlsgd_lo12:var => movk R0, :tprel_g0_nc:var
7952 bl __tls_get_addr => mrs x1, tpidr_el0
7953 nop => add R0, R1, R0
2d0ca824
YN		 7954
7955 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC		 7956
7957 /* First kill the tls_get_addr reloc on the bl instruction. */
7958 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
cec5225b 7959 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 7960
2d0ca824 7961 bfd_putl32 (movk_R0, contents + rel->r_offset);
a06ea964 7962 bfd_putl32 (0xd53bd041, contents + rel->r_offset + 4);
2d0ca824 7963 bfd_putl32 (add_R0_R0_R1, contents + rel->r_offset + 8);
a06ea964
NC		 7964 return bfd_reloc_continue;
7965 }
7966 else
7967 {
7968 /* GD->IE relaxation
07d6d2b8
AM		 7969 ADD x0, #:tlsgd_lo12:var => ldr R0, [x0, #:gottprel_lo12:var]
7970 BL __tls_get_addr => mrs x1, tpidr_el0
a06ea964 7971 R_AARCH64_CALL26
07d6d2b8 7972 NOP => add R0, R1, R0
5cd1d8bc
YN		 7973
7974 Where R is x for lp64 mode, and w for ilp32 mode. */
a06ea964 7975
a6bb11b2 7976 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
a06ea964
NC		 7977
7978 /* Remove the relocation on the BL instruction. */
cec5225b 7979 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
a06ea964 7980
a06ea964
NC		 7981 /* We choose to fixup the BL and NOP instructions using the
7982 offset from the second relocation to allow flexibility in
7983 scheduling instructions between the ADD and BL. */
2d0ca824 7984 bfd_putl32 (ldr_R0_x0, contents + rel->r_offset);
5cd1d8bc 7985 bfd_putl32 (0xd53bd041, contents + rel[1].r_offset);
2d0ca824 7986 bfd_putl32 (add_R0_R0_R1, contents + rel[1].r_offset + 4);
a06ea964
NC		 7987 return bfd_reloc_continue;
7988 }
7989
4ca9b406
SP		 7990 case BFD_RELOC_MORELLO_TLSDESC_CALL:
7991 /* GD->LE relaxation:
7992 blr cd => add c0, c2, x0 */
7993 if (is_local || !bfd_link_pic (info))
7994 {
7995 bfd_putl32 (0xc2a06040, contents + rel->r_offset);
7996 return bfd_reloc_ok;
7997 }
7998 else
7999 goto set_nop;
8000
f955cccf 8001 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
4ca9b406
SP		 8002 /* GD->LE relaxation:
8003 ldr cd, [c0, #:tlsdesc_lo12:var] => movk x1, objsize_lo16 */
8004 if ((is_local || !bfd_link_pic (info))
8005 && ELFNN_R_TYPE (rel[1].r_info) == MORELLO_R (TLSDESC_CALL))
8006 {
8007 bfd_putl32 (BUILD_MOVK(1, sym_size), contents + rel->r_offset);
8008 return bfd_reloc_continue;
8009 }
8010
8011 /* Fall through. */
8012 case BFD_RELOC_AARCH64_TLSDESC_ADD:
a6bb11b2 8013 case BFD_RELOC_AARCH64_TLSDESC_CALL:
a06ea964 8014 /* GD->IE/LE relaxation:
07d6d2b8
AM		 8015 add x0, x0, #:tlsdesc_lo12:var => nop
8016 blr xd => nop
a06ea964 8017 */
4ca9b406 8018set_nop:
a06ea964
NC		 8019 bfd_putl32 (INSN_NOP, contents + rel->r_offset);
8020 return bfd_reloc_ok;
8021
0484b454
RL		 8022 case BFD_RELOC_AARCH64_TLSDESC_LDR:
8023 if (is_local)
8024 {
8025 /* GD->LE relaxation:
2d0ca824
YN		 8026 ldr xd, [gp, xn] => movk R0, #:tprel_g0_nc:var
8027
8028 Where R is x for lp64 mode, and w for ILP32 mode. */
8029 bfd_putl32 (movk_R0, contents + rel->r_offset);
0484b454
RL		 8030 return bfd_reloc_continue;
8031 }
8032 else
8033 {
8034 /* GD->IE relaxation:
2d0ca824
YN		 8035 ldr xd, [gp, xn] => ldr R0, [gp, xn]
8036
8037 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8038 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8039 bfd_putl32 (ldr_R0_mask (insn), contents + rel->r_offset);
0484b454
RL		 8040 return bfd_reloc_ok;
8041 }
8042
8043 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8044 /* GD->LE relaxation:
2d0ca824 8045 movk xd, #:tlsdesc_off_g0_nc:var => movk R0, #:tprel_g1_nc:var, lsl #16
0484b454 8046 GD->IE relaxation:
2d0ca824
YN		 8047 movk xd, #:tlsdesc_off_g0_nc:var => movk Rd, #:gottprel_g0_nc:var
8048
8049 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8050 if (is_local)
2d0ca824 8051 bfd_putl32 (ldr_hw_R0, contents + rel->r_offset);
0484b454
RL		 8052 return bfd_reloc_continue;
8053
8054 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
8055 if (is_local)
8056 {
8057 /* GD->LE relaxation:
2d0ca824
YN		 8058 movz xd, #:tlsdesc_off_g1:var => movz R0, #:tprel_g2:var, lsl #32
8059
8060 Where R is x for lp64 mode, and w for ILP32 mode. */
8061 bfd_putl32 (movz_hw_R0, contents + rel->r_offset);
0484b454
RL		 8062 return bfd_reloc_continue;
8063 }
8064 else
8065 {
8066 /* GD->IE relaxation:
2d0ca824
YN		 8067 movz xd, #:tlsdesc_off_g1:var => movz Rd, #:gottprel_g1:var, lsl #16
8068
8069 Where R is x for lp64 mode, and w for ILP32 mode. */
0484b454 8070 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8071 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
0484b454
RL		 8072 return bfd_reloc_continue;
8073 }
8074
a6bb11b2 8075 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a06ea964 8076 /* IE->LE relaxation:
07d6d2b8 8077 adrp xd, :gottprel:var => movz Rd, :tprel_g1:var
2d0ca824
YN		 8078
8079 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC		 8080 if (is_local)
8081 {
8082 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8083 bfd_putl32 (movz_R0 | (insn & 0x1f), contents + rel->r_offset);
9fca35fc
TC		 8084 /* We have relaxed the adrp into a mov, we may have to clear any
8085 pending erratum fixes. */
8086 clear_erratum_843419_entry (globals, rel->r_offset, input_section);
a06ea964
NC		 8087 }
8088 return bfd_reloc_continue;
8089
a6bb11b2 8090 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
a06ea964 8091 /* IE->LE relaxation:
07d6d2b8 8092 ldr xd, [xm, #:gottprel_lo12:var] => movk Rd, :tprel_g0_nc:var
2d0ca824
YN		 8093
8094 Where R is x for lp64 mode, and w for ILP32 mode. */
a06ea964
NC		 8095 if (is_local)
8096 {
8097 insn = bfd_getl32 (contents + rel->r_offset);
2d0ca824 8098 bfd_putl32 (movk_R0 | (insn & 0x1f), contents + rel->r_offset);
a06ea964
NC		 8099 }
8100 return bfd_reloc_continue;
8101
259364ad
JW		 8102 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
8103 /* LD->LE relaxation (tiny):
8104 adr x0, :tlsldm:x => mrs x0, tpidr_el0
c1fc2d7e
YN		 8105 bl __tls_get_addr => add R0, R0, TCB_SIZE
8106
8107 Where R is x for lp64 mode, and w for ilp32 mode. */
259364ad
JW		 8108 if (is_local)
8109 {
8110 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8111 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8112 /* No need of CALL26 relocation for tls_get_addr. */
8113 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
8114 bfd_putl32 (0xd53bd040, contents + rel->r_offset + 0);
2d0ca824
YN		 8115 bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
8116 contents + rel->r_offset + 4);
259364ad
JW		 8117 return bfd_reloc_ok;
8118 }
8119 return bfd_reloc_continue;
8120
8121 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
8122 /* LD->LE relaxation (small):
8123 adrp x0, :tlsldm:x => mrs x0, tpidr_el0
8124 */
8125 if (is_local)
8126 {
8127 bfd_putl32 (0xd53bd040, contents + rel->r_offset);
8128 return bfd_reloc_ok;
8129 }
8130 return bfd_reloc_continue;
8131
8132 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
8133 /* LD->LE relaxation (small):
c1fc2d7e 8134 add x0, #:tlsldm_lo12:x => add R0, R0, TCB_SIZE
259364ad 8135 bl __tls_get_addr => nop
c1fc2d7e
YN		 8136
8137 Where R is x for lp64 mode, and w for ilp32 mode. */
259364ad
JW		 8138 if (is_local)
8139 {
8140 BFD_ASSERT (rel->r_offset + 4 == rel[1].r_offset);
8141 BFD_ASSERT (ELFNN_R_TYPE (rel[1].r_info) == AARCH64_R (CALL26));
8142 /* No need of CALL26 relocation for tls_get_addr. */
8143 rel[1].r_info = ELFNN_R_INFO (STN_UNDEF, R_AARCH64_NONE);
2d0ca824
YN		 8144 bfd_putl32 (add_R0_R0 | (TCB_SIZE << 10),
8145 contents + rel->r_offset + 0);
c1fc2d7e 8146 bfd_putl32 (INSN_NOP, contents + rel->r_offset + 4);
259364ad
JW		 8147 return bfd_reloc_ok;
8148 }
8149 return bfd_reloc_continue;
8150
a06ea964
NC		 8151 default:
8152 return bfd_reloc_continue;
8153 }
8154
8155 return bfd_reloc_ok;
8156}
8157
8158/* Relocate an AArch64 ELF section. */
8159
8160static bfd_boolean
cec5225b 8161elfNN_aarch64_relocate_section (bfd *output_bfd,
a06ea964
NC		 8162 struct bfd_link_info *info,
8163 bfd *input_bfd,
8164 asection *input_section,
8165 bfd_byte *contents,
8166 Elf_Internal_Rela *relocs,
8167 Elf_Internal_Sym *local_syms,
8168 asection **local_sections)
8169{
8170 Elf_Internal_Shdr *symtab_hdr;
8171 struct elf_link_hash_entry **sym_hashes;
8172 Elf_Internal_Rela *rel;
8173 Elf_Internal_Rela *relend;
8174 const char *name;
cec5225b 8175 struct elf_aarch64_link_hash_table *globals;
a06ea964
NC		 8176 bfd_boolean save_addend = FALSE;
8177 bfd_vma addend = 0;
8178
cec5225b 8179 globals = elf_aarch64_hash_table (info);
a06ea964
NC		 8180
8181 symtab_hdr = &elf_symtab_hdr (input_bfd);
8182 sym_hashes = elf_sym_hashes (input_bfd);
8183
8184 rel = relocs;
8185 relend = relocs + input_section->reloc_count;
8186 for (; rel < relend; rel++)
8187 {
8188 unsigned int r_type;
a6bb11b2
YZ		 8189 bfd_reloc_code_real_type bfd_r_type;
8190 bfd_reloc_code_real_type relaxed_bfd_r_type;
a06ea964
NC		 8191 reloc_howto_type *howto;
8192 unsigned long r_symndx;
8193 Elf_Internal_Sym *sym;
8194 asection *sec;
8195 struct elf_link_hash_entry *h;
8196 bfd_vma relocation;
8197 bfd_reloc_status_type r;
8198 arelent bfd_reloc;
8199 char sym_type;
8200 bfd_boolean unresolved_reloc = FALSE;
8201 char *error_message = NULL;
8202
cec5225b
YZ		 8203 r_symndx = ELFNN_R_SYM (rel->r_info);
8204 r_type = ELFNN_R_TYPE (rel->r_info);
a06ea964 8205
0aa13fee
AM		 8206 bfd_reloc.howto = elfNN_aarch64_howto_from_type (input_bfd, r_type);
8207 howto = bfd_reloc.howto;
a06ea964 8208
7fcfd62d 8209 if (howto == NULL)
47aeb64c
NC		 8210 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
8211
a6bb11b2 8212 bfd_r_type = elfNN_aarch64_bfd_reloc_from_howto (howto);
7fcfd62d 8213
a06ea964
NC		 8214 h = NULL;
8215 sym = NULL;
8216 sec = NULL;
8217
8218 if (r_symndx < symtab_hdr->sh_info)
8219 {
8220 sym = local_syms + r_symndx;
cec5225b 8221 sym_type = ELFNN_ST_TYPE (sym->st_info);
a06ea964
NC		 8222 sec = local_sections[r_symndx];
8223
8224 /* An object file might have a reference to a local
8225 undefined symbol. This is a daft object file, but we
8226 should at least do something about it. */
8227 if (r_type != R_AARCH64_NONE && r_type != R_AARCH64_NULL
8228 && bfd_is_und_section (sec)
8229 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
1a72702b
AM		 8230 (*info->callbacks->undefined_symbol)
8231 (info, bfd_elf_string_from_elf_section
8232 (input_bfd, symtab_hdr->sh_link, sym->st_name),
8233 input_bfd, input_section, rel->r_offset, TRUE);
a06ea964 8234
a06ea964 8235 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1419bbe5
WN		 8236
8237 /* Relocate against local STT_GNU_IFUNC symbol. */
0e1862bb 8238 if (!bfd_link_relocatable (info)
1419bbe5
WN		 8239 && ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)
8240 {
8241 h = elfNN_aarch64_get_local_sym_hash (globals, input_bfd,
8242 rel, FALSE);
8243 if (h == NULL)
8244 abort ();
8245
8246 /* Set STT_GNU_IFUNC symbol value. */
8247 h->root.u.def.value = sym->st_value;
8248 h->root.u.def.section = sec;
8249 }
a06ea964
NC		 8250 }
8251 else
8252 {
62d887d4 8253 bfd_boolean warned, ignored;
a06ea964
NC		 8254
8255 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
8256 r_symndx, symtab_hdr, sym_hashes,
8257 h, sec, relocation,
62d887d4 8258 unresolved_reloc, warned, ignored);
a06ea964
NC		 8259
8260 sym_type = h->type;
8261 }
8262
8263 if (sec != NULL && discarded_section (sec))
8264 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
8265 rel, 1, relend, howto, 0, contents);
8266
0e1862bb 8267 if (bfd_link_relocatable (info))
2e0488d3 8268 continue;
a06ea964
NC		 8269
8270 if (h != NULL)
8271 name = h->root.root.string;
8272 else
8273 {
8274 name = (bfd_elf_string_from_elf_section
8275 (input_bfd, symtab_hdr->sh_link, sym->st_name));
8276 if (name == NULL || *name == '\0')
fd361982 8277 name = bfd_section_name (sec);
a06ea964
NC		 8278 }
8279
8280 if (r_symndx != 0
8281 && r_type != R_AARCH64_NONE
8282 && r_type != R_AARCH64_NULL
8283 && (h == NULL
8284 || h->root.type == bfd_link_hash_defined
8285 || h->root.type == bfd_link_hash_defweak)
a6bb11b2 8286 && IS_AARCH64_TLS_RELOC (bfd_r_type) != (sym_type == STT_TLS))
a06ea964 8287 {
4eca0228 8288 _bfd_error_handler
a06ea964 8289 ((sym_type == STT_TLS
695344c0 8290 /* xgettext:c-format */
2dcf00ce 8291 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
695344c0 8292 /* xgettext:c-format */
2dcf00ce 8293 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
a06ea964 8294 input_bfd,
2dcf00ce 8295 input_section, (uint64_t) rel->r_offset, howto->name, name);
a06ea964
NC		 8296 }
8297
f3ecc5c8
AC		 8298 if (r_symndx
8299 && h
8300 && IS_AARCH64_TLS_RELOC (bfd_r_type)
8301 && h->root.type == bfd_link_hash_undefweak)
8302 /* We have already warned about these in aarch64_check_relocs,
8303 so just skip over them. */
8304 continue;
8305
a06ea964 8306 /* We relax only if we can see that there can be a valid transition
07d6d2b8
AM		 8307 from a reloc type to another.
8308 We call elfNN_aarch64_final_link_relocate unless we're completely
8309 done, i.e., the relaxation produced the final output we want. */
a06ea964 8310
4ca9b406 8311 relaxed_bfd_r_type = aarch64_tls_transition (input_bfd, info, rel,
a6bb11b2
YZ		 8312 h, r_symndx);
8313 if (relaxed_bfd_r_type != bfd_r_type)
a06ea964 8314 {
a6bb11b2
YZ		 8315 bfd_r_type = relaxed_bfd_r_type;
8316 howto = elfNN_aarch64_howto_from_bfd_reloc (bfd_r_type);
8317 BFD_ASSERT (howto != NULL);
8318 r_type = howto->type;
4ca9b406
SP		 8319 r = elfNN_aarch64_tls_relax (input_bfd, info, input_section,
8320 contents, rel, h, r_symndx);
a06ea964
NC		 8321 unresolved_reloc = 0;
8322 }
8323 else
8324 r = bfd_reloc_continue;
8325
8326 /* There may be multiple consecutive relocations for the
07d6d2b8
AM		 8327 same offset. In that case we are supposed to treat the
8328 output of each relocation as the addend for the next. */
a06ea964
NC		 8329 if (rel + 1 < relend
8330 && rel->r_offset == rel[1].r_offset
cec5225b
YZ		 8331 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NONE
8332 && ELFNN_R_TYPE (rel[1].r_info) != R_AARCH64_NULL)
a06ea964
NC		 8333 save_addend = TRUE;
8334 else
8335 save_addend = FALSE;
8336
8337 if (r == bfd_reloc_continue)
cec5225b 8338 r = elfNN_aarch64_final_link_relocate (howto, input_bfd, output_bfd,
a06ea964
NC		 8339 input_section, contents, rel,
8340 relocation, info, sec,
8341 h, &unresolved_reloc,
1419bbe5 8342 save_addend, &addend, sym);
a06ea964 8343
4ca9b406
SP		 8344 bfd_boolean c64_rtype = FALSE;
8345
0aa13fee 8346 switch (elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type))
a06ea964 8347 {
ce336788 8348 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
a6bb11b2 8349 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 8350 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 8351 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 8352 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
73f925cc 8353 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 8354 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 8355 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 8356 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8357 {
8358 bfd_boolean need_relocs = FALSE;
8359 bfd_byte *loc;
8360 int indx;
8361 bfd_vma off;
8362
8363 off = symbol_got_offset (input_bfd, h, r_symndx);
8364 indx = h && h->dynindx != -1 ? h->dynindx : 0;
8365
8366 need_relocs =
6dda7875 8367 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC		 8368 (h == NULL
8369 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8370 || h->root.type != bfd_link_hash_undefweak);
8371
8372 BFD_ASSERT (globals->root.srelgot != NULL);
8373
8374 if (need_relocs)
8375 {
8376 Elf_Internal_Rela rela;
a6bb11b2 8377 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPMOD));
a06ea964
NC		 8378 rela.r_addend = 0;
8379 rela.r_offset = globals->root.sgot->output_section->vma +
8380 globals->root.sgot->output_offset + off;
8381
8382
8383 loc = globals->root.srelgot->contents;
8384 loc += globals->root.srelgot->reloc_count++
8385 * RELOC_SIZE (htab);
cec5225b 8386 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8387
f69e4920 8388 bfd_reloc_code_real_type real_type =
0aa13fee 8389 elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
f69e4920
JW		 8390
8391 if (real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
73f925cc
JW		 8392 || real_type == BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
8393 || real_type == BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC)
77a69ff8
JW		 8394 {
8395 /* For local dynamic, don't generate DTPREL in any case.
8396 Initialize the DTPREL slot into zero, so we get module
8397 base address when invoke runtime TLS resolver. */
8398 bfd_put_NN (output_bfd, 0,
8399 globals->root.sgot->contents + off
a1bdea65 8400 + GOT_ENTRY_SIZE (globals));
77a69ff8
JW		 8401 }
8402 else if (indx == 0)
a06ea964 8403 {
cec5225b 8404 bfd_put_NN (output_bfd,
a06ea964
NC		 8405 relocation - dtpoff_base (info),
8406 globals->root.sgot->contents + off
a1bdea65 8407 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 8408 }
8409 else
8410 {
8411 /* This TLS symbol is global. We emit a
8412 relocation to fixup the tls offset at load
8413 time. */
8414 rela.r_info =
a6bb11b2 8415 ELFNN_R_INFO (indx, AARCH64_R (TLS_DTPREL));
a06ea964
NC		 8416 rela.r_addend = 0;
8417 rela.r_offset =
8418 (globals->root.sgot->output_section->vma
8419 + globals->root.sgot->output_offset + off
a1bdea65 8420 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 8421
8422 loc = globals->root.srelgot->contents;
8423 loc += globals->root.srelgot->reloc_count++
8424 * RELOC_SIZE (globals);
cec5225b
YZ		 8425 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
8426 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 8427 globals->root.sgot->contents + off
a1bdea65 8428 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 8429 }
8430 }
8431 else
8432 {
cec5225b 8433 bfd_put_NN (output_bfd, (bfd_vma) 1,
a06ea964 8434 globals->root.sgot->contents + off);
cec5225b 8435 bfd_put_NN (output_bfd,
a06ea964
NC		 8436 relocation - dtpoff_base (info),
8437 globals->root.sgot->contents + off
a1bdea65 8438 + GOT_ENTRY_SIZE (globals));
a06ea964
NC		 8439 }
8440
8441 symbol_got_offset_mark (input_bfd, h, r_symndx);
8442 }
8443 break;
8444
a6bb11b2
YZ		 8445 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
8446 case BFD_RELOC_AARCH64_TLSIE_LDNN_GOTTPREL_LO12_NC:
043bf05a 8447 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL		 8448 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
8449 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
a06ea964
NC		 8450 if (! symbol_got_offset_mark_p (input_bfd, h, r_symndx))
8451 {
8452 bfd_boolean need_relocs = FALSE;
8453 bfd_byte *loc;
8454 int indx;
8455 bfd_vma off;
8456
8457 off = symbol_got_offset (input_bfd, h, r_symndx);
8458
8459 indx = h && h->dynindx != -1 ? h->dynindx : 0;
8460
8461 need_relocs =
6dda7875 8462 (!bfd_link_executable (info) || indx != 0) &&
a06ea964
NC		 8463 (h == NULL
8464 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8465 || h->root.type != bfd_link_hash_undefweak);
8466
8467 BFD_ASSERT (globals->root.srelgot != NULL);
8468
8469 if (need_relocs)
8470 {
8471 Elf_Internal_Rela rela;
8472
8473 if (indx == 0)
8474 rela.r_addend = relocation - dtpoff_base (info);
8475 else
8476 rela.r_addend = 0;
8477
a6bb11b2 8478 rela.r_info = ELFNN_R_INFO (indx, AARCH64_R (TLS_TPREL));
a06ea964
NC		 8479 rela.r_offset = globals->root.sgot->output_section->vma +
8480 globals->root.sgot->output_offset + off;
8481
8482 loc = globals->root.srelgot->contents;
8483 loc += globals->root.srelgot->reloc_count++
8484 * RELOC_SIZE (htab);
8485
cec5225b 8486 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8487
cec5225b 8488 bfd_put_NN (output_bfd, rela.r_addend,
a06ea964
NC		 8489 globals->root.sgot->contents + off);
8490 }
8491 else
cec5225b 8492 bfd_put_NN (output_bfd, relocation - tpoff_base (info),
a06ea964
NC		 8493 globals->root.sgot->contents + off);
8494
8495 symbol_got_offset_mark (input_bfd, h, r_symndx);
8496 }
8497 break;
8498
4ca9b406
SP		 8499 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
8500 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
8501 c64_rtype = TRUE;
8502 /* Fall through. */
8503
f955cccf 8504 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
a6bb11b2 8505 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 8506 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
a6bb11b2 8507 case BFD_RELOC_AARCH64_TLSDESC_LDNN_LO12_NC:
1ada945d 8508 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL		 8509 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
8510 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a06ea964
NC		 8511 if (! symbol_tlsdesc_got_offset_mark_p (input_bfd, h, r_symndx))
8512 {
8513 bfd_boolean need_relocs = FALSE;
8514 int indx = h && h->dynindx != -1 ? h->dynindx : 0;
8515 bfd_vma off = symbol_tlsdesc_got_offset (input_bfd, h, r_symndx);
8516
8517 need_relocs = (h == NULL
8518 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8519 || h->root.type != bfd_link_hash_undefweak);
8520
8521 BFD_ASSERT (globals->root.srelgot != NULL);
8522 BFD_ASSERT (globals->root.sgot != NULL);
8523
8524 if (need_relocs)
8525 {
8526 bfd_byte *loc;
8527 Elf_Internal_Rela rela;
4ca9b406
SP		 8528
8529 rela.r_info = ELFNN_R_INFO (indx,
8530 (c64_rtype ? MORELLO_R (TLSDESC)
8531 : AARCH64_R (TLSDESC)));
a6bb11b2 8532
a06ea964
NC		 8533 rela.r_addend = 0;
8534 rela.r_offset = (globals->root.sgotplt->output_section->vma
8535 + globals->root.sgotplt->output_offset
8536 + off + globals->sgotplt_jump_table_size);
8537
8538 if (indx == 0)
8539 rela.r_addend = relocation - dtpoff_base (info);
8540
8541 /* Allocate the next available slot in the PLT reloc
8542 section to hold our R_AARCH64_TLSDESC, the next
8543 available slot is determined from reloc_count,
8544 which we step. But note, reloc_count was
8545 artifically moved down while allocating slots for
8546 real PLT relocs such that all of the PLT relocs
8547 will fit above the initial reloc_count and the
8548 extra stuff will fit below. */
8549 loc = globals->root.srelplt->contents;
8550 loc += globals->root.srelplt->reloc_count++
8551 * RELOC_SIZE (globals);
8552
cec5225b 8553 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964 8554
cec5225b 8555 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964
NC		 8556 globals->root.sgotplt->contents + off +
8557 globals->sgotplt_jump_table_size);
cec5225b 8558 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964
NC		 8559 globals->root.sgotplt->contents + off +
8560 globals->sgotplt_jump_table_size +
a1bdea65 8561 GOT_ENTRY_SIZE (globals));
a06ea964
NC		 8562 }
8563
8564 symbol_tlsdesc_got_offset_mark (input_bfd, h, r_symndx);
8565 }
8566 break;
a6bb11b2
YZ		 8567 default:
8568 break;
a06ea964
NC		 8569 }
8570
a06ea964 8571 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
07d6d2b8
AM		 8572 because such sections are not SEC_ALLOC and thus ld.so will
8573 not process them. */
a06ea964
NC		 8574 if (unresolved_reloc
8575 && !((input_section->flags & SEC_DEBUGGING) != 0
8576 && h->def_dynamic)
8577 && _bfd_elf_section_offset (output_bfd, info, input_section,
8578 +rel->r_offset) != (bfd_vma) - 1)
8579 {
4eca0228 8580 _bfd_error_handler
695344c0 8581 /* xgettext:c-format */
2dcf00ce
AM		 8582 (_("%pB(%pA+%#" PRIx64 "): "
8583 "unresolvable %s relocation against symbol `%s'"),
8584 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name,
a06ea964
NC		 8585 h->root.root.string);
8586 return FALSE;
8587 }
8588
8589 if (r != bfd_reloc_ok && r != bfd_reloc_continue)
8590 {
c674f5cd 8591 bfd_reloc_code_real_type real_r_type
0aa13fee 8592 = elfNN_aarch64_bfd_reloc_from_type (input_bfd, r_type);
c674f5cd 8593
a06ea964
NC		 8594 switch (r)
8595 {
8596 case bfd_reloc_overflow:
1a72702b
AM		 8597 (*info->callbacks->reloc_overflow)
8598 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
8599 input_bfd, input_section, rel->r_offset);
c674f5cd
JW		 8600 if (real_r_type == BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
8601 || real_r_type == BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14)
8602 {
8603 (*info->callbacks->warning)
8604 (info,
90b6238f 8605 _("too many GOT entries for -fpic, "
c674f5cd
JW		 8606 "please recompile with -fPIC"),
8607 name, input_bfd, input_section, rel->r_offset);
8608 return FALSE;
8609 }
027e9c75
NC		 8610 /* Overflow can occur when a variable is referenced with a type
8611 that has a larger alignment than the type with which it was
8612 declared. eg:
8613 file1.c: extern int foo; int a (void) { return foo; }
8614 file2.c: char bar, foo, baz;
8615 If the variable is placed into a data section at an offset
8616 that is incompatible with the larger alignment requirement
8617 overflow will occur. (Strictly speaking this is not overflow
8618 but rather an alignment problem, but the bfd_reloc_ error
8619 enum does not have a value to cover that situation).
8620
8621 Try to catch this situation here and provide a more helpful
8622 error message to the user. */
26009aa7 8623 if (addend & (((bfd_vma) 1 << howto->rightshift) - 1)
027e9c75
NC		 8624 /* FIXME: Are we testing all of the appropriate reloc
8625 types here ? */
8626 && (real_r_type == BFD_RELOC_AARCH64_LD_LO19_PCREL
8627 || real_r_type == BFD_RELOC_AARCH64_LDST16_LO12
8628 || real_r_type == BFD_RELOC_AARCH64_LDST32_LO12
8629 || real_r_type == BFD_RELOC_AARCH64_LDST64_LO12
8630 || real_r_type == BFD_RELOC_AARCH64_LDST128_LO12))
8631 {
8632 info->callbacks->warning
90b6238f 8633 (info, _("one possible cause of this error is that the \
027e9c75 8634symbol is being referenced in the indicated code as if it had a larger \
90b6238f 8635alignment than was declared where it was defined"),
027e9c75
NC		 8636 name, input_bfd, input_section, rel->r_offset);
8637 }
40bbb79e
SP		 8638
8639 if (real_r_type == BFD_RELOC_MORELLO_CAPINIT)
8640 info->callbacks->warning
8641 (info, _("relocation offset must be capability aligned"),
8642 name, input_bfd, input_section, rel->r_offset);
a06ea964
NC		 8643 break;
8644
8645 case bfd_reloc_undefined:
1a72702b
AM		 8646 (*info->callbacks->undefined_symbol)
8647 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
a06ea964
NC		 8648 break;
8649
8650 case bfd_reloc_outofrange:
8651 error_message = _("out of range");
8652 goto common_error;
8653
8654 case bfd_reloc_notsupported:
8655 error_message = _("unsupported relocation");
8656 goto common_error;
8657
8658 case bfd_reloc_dangerous:
8659 /* error_message should already be set. */
8660 goto common_error;
8661
8662 default:
8663 error_message = _("unknown error");
8664 /* Fall through. */
8665
8666 common_error:
8667 BFD_ASSERT (error_message != NULL);
1a72702b
AM		 8668 (*info->callbacks->reloc_dangerous)
8669 (info, error_message, input_bfd, input_section, rel->r_offset);
a06ea964
NC		 8670 break;
8671 }
8672 }
027e9c75
NC		 8673
8674 if (!save_addend)
8675 addend = 0;
a06ea964
NC		 8676 }
8677
8678 return TRUE;
8679}
8680
8681/* Set the right machine number. */
8682
8683static bfd_boolean
cec5225b 8684elfNN_aarch64_object_p (bfd *abfd)
a06ea964 8685{
cec5225b
YZ		 8686#if ARCH_SIZE == 32
8687 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64_ilp32);
8688#else
a06ea964 8689 bfd_default_set_arch_mach (abfd, bfd_arch_aarch64, bfd_mach_aarch64);
cec5225b 8690#endif
a06ea964
NC		 8691 return TRUE;
8692}
8693
8694/* Function to keep AArch64 specific flags in the ELF header. */
8695
8696static bfd_boolean
cec5225b 8697elfNN_aarch64_set_private_flags (bfd *abfd, flagword flags)
a06ea964
NC		 8698{
8699 if (elf_flags_init (abfd) && elf_elfheader (abfd)->e_flags != flags)
8700 {
8701 }
8702 else
8703 {
8704 elf_elfheader (abfd)->e_flags = flags;
8705 elf_flags_init (abfd) = TRUE;
8706 }
8707
8708 return TRUE;
8709}
8710
a06ea964
NC		 8711/* Merge backend specific data from an object file to the output
8712 object file when linking. */
8713
8714static bfd_boolean
50e03d47 8715elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
a06ea964 8716{
50e03d47 8717 bfd *obfd = info->output_bfd;
a06ea964
NC		 8718 flagword out_flags;
8719 flagword in_flags;
f8180c20 8720 bfd_boolean flags_compatible = FALSE;
a06ea964
NC		 8721 asection *sec;
8722
8723 /* Check if we have the same endianess. */
50e03d47 8724 if (!_bfd_generic_verify_endian_match (ibfd, info))
a06ea964
NC		 8725 return FALSE;
8726
8727 if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
8728 return TRUE;
8729
8730 /* The input BFD must have had its flags initialised. */
8731 /* The following seems bogus to me -- The flags are initialized in
8732 the assembler but I don't think an elf_flags_init field is
8733 written into the object. */
8734 /* BFD_ASSERT (elf_flags_init (ibfd)); */
8735
8736 in_flags = elf_elfheader (ibfd)->e_flags;
8737 out_flags = elf_elfheader (obfd)->e_flags;
8738
8739 if (!elf_flags_init (obfd))
8740 {
f8180c20
MM		 8741 elf_flags_init (obfd) = TRUE;
8742
a06ea964 8743 /* If the input is the default architecture and had the default
07d6d2b8
AM		 8744 flags then do not bother setting the flags for the output
8745 architecture, instead allow future merges to do this. If no
8746 future merges ever set these flags then they will retain their
8747 uninitialised values, which surprise surprise, correspond
8748 to the default values. */
a06ea964
NC		 8749 if (bfd_get_arch_info (ibfd)->the_default
8750 && elf_elfheader (ibfd)->e_flags == 0)
8751 return TRUE;
8752
a06ea964
NC		 8753 elf_elfheader (obfd)->e_flags = in_flags;
8754
8755 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
8756 && bfd_get_arch_info (obfd)->the_default)
8757 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
8758 bfd_get_mach (ibfd));
8759
8760 return TRUE;
8761 }
8762
8763 /* Identical flags must be compatible. */
8764 if (in_flags == out_flags)
8765 return TRUE;
8766
8767 /* Check to see if the input BFD actually contains any sections. If
8768 not, its flags may not have been initialised either, but it
8769 cannot actually cause any incompatiblity. Do not short-circuit
8770 dynamic objects; their section list may be emptied by
8771 elf_link_add_object_symbols.
8772
8773 Also check to see if there are no code sections in the input.
8774 In this case there is no need to check for code specific flags.
8775 XXX - do we need to worry about floating-point format compatability
f8180c20
MM		 8776 in data sections ?
8777
8778 We definitely need to check for data sections if one set of flags is
8779 targetting the PURECAP abi and another is not. Pointers being
8780 capabilities in data sections can not be glossed over. */
a06ea964
NC		 8781 if (!(ibfd->flags & DYNAMIC))
8782 {
8783 bfd_boolean null_input_bfd = TRUE;
f8180c20
MM		 8784 bfd_boolean only_data_sections
8785 = !(in_flags & EF_AARCH64_CHERI_PURECAP
8786 || out_flags & EF_AARCH64_CHERI_PURECAP);
a06ea964
NC		 8787
8788 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
8789 {
fd361982 8790 if ((bfd_section_flags (sec)
a06ea964
NC		 8791 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
8792 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
8793 only_data_sections = FALSE;
8794
8795 null_input_bfd = FALSE;
8796 break;
8797 }
8798
8799 if (null_input_bfd || only_data_sections)
8800 return TRUE;
8801 }
8802
8803 return flags_compatible;
8804}
8805
8806/* Display the flags field. */
8807
8808static bfd_boolean
cec5225b 8809elfNN_aarch64_print_private_bfd_data (bfd *abfd, void *ptr)
a06ea964
NC		 8810{
8811 FILE *file = (FILE *) ptr;
8812 unsigned long flags;
8813
8814 BFD_ASSERT (abfd != NULL && ptr != NULL);
8815
8816 /* Print normal ELF private data. */
8817 _bfd_elf_print_private_bfd_data (abfd, ptr);
8818
8819 flags = elf_elfheader (abfd)->e_flags;
8820 /* Ignore init flag - it may not be set, despite the flags field
8821 containing valid data. */
8822
8823 /* xgettext:c-format */
8824 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
8825
8826 if (flags)
8827 fprintf (file, _("<Unrecognised flag bits set>"));
8828
8829 fputc ('\n', file);
8830
8831 return TRUE;
8832}
8833
6353d82b
JW		 8834/* Return true if we need copy relocation against EH. */
8835
8836static bfd_boolean
8837need_copy_relocation_p (struct elf_aarch64_link_hash_entry *eh)
8838{
8839 struct elf_dyn_relocs *p;
8840 asection *s;
8841
190eb1dd 8842 for (p = eh->root.dyn_relocs; p != NULL; p = p->next)
6353d82b
JW		 8843 {
8844 /* If there is any pc-relative reference, we need to keep copy relocation
8845 to avoid propagating the relocation into runtime that current glibc
8846 does not support. */
8847 if (p->pc_count)
8848 return TRUE;
8849
8850 s = p->sec->output_section;
8851 /* Need copy relocation if it's against read-only section. */
8852 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8853 return TRUE;
8854 }
8855
8856 return FALSE;
8857}
8858
a06ea964
NC		 8859/* Adjust a symbol defined by a dynamic object and referenced by a
8860 regular object. The current definition is in some section of the
8861 dynamic object, but we're not including those sections. We have to
8862 change the definition to something the rest of the link can
8863 understand. */
8864
8865static bfd_boolean
cec5225b 8866elfNN_aarch64_adjust_dynamic_symbol (struct bfd_link_info *info,
a06ea964
NC		 8867 struct elf_link_hash_entry *h)
8868{
cec5225b 8869 struct elf_aarch64_link_hash_table *htab;
5474d94f 8870 asection *s, *srel;
a06ea964
NC		 8871
8872 /* If this is a function, put it in the procedure linkage table. We
8873 will fill in the contents of the procedure linkage table later,
8874 when we know the address of the .got section. */
1419bbe5 8875 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
a06ea964
NC		 8876 {
8877 if (h->plt.refcount <= 0
1419bbe5
WN		 8878 || (h->type != STT_GNU_IFUNC
8879 && (SYMBOL_CALLS_LOCAL (info, h)
8880 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8881 && h->root.type == bfd_link_hash_undefweak))))
a06ea964
NC		 8882 {
8883 /* This case can occur if we saw a CALL26 reloc in
8884 an input file, but the symbol wasn't referred to
8885 by a dynamic object or all references were
8886 garbage collected. In which case we can end up
8887 resolving. */
8888 h->plt.offset = (bfd_vma) - 1;
8889 h->needs_plt = 0;
8890 }
8891
8892 return TRUE;
8893 }
8894 else
80de0c6d 8895 /* Otherwise, reset to -1. */
a06ea964
NC		 8896 h->plt.offset = (bfd_vma) - 1;
8897
8898
8899 /* If this is a weak symbol, and there is a real definition, the
8900 processor independent code will have arranged for us to see the
8901 real definition first, and we can just use the same value. */
60d67dc8 8902 if (h->is_weakalias)
a06ea964 8903 {
60d67dc8
AM		 8904 struct elf_link_hash_entry *def = weakdef (h);
8905 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
8906 h->root.u.def.section = def->root.u.def.section;
8907 h->root.u.def.value = def->root.u.def.value;
a06ea964 8908 if (ELIMINATE_COPY_RELOCS || info->nocopyreloc)
60d67dc8 8909 h->non_got_ref = def->non_got_ref;
a06ea964
NC		 8910 return TRUE;
8911 }
8912
8913 /* If we are creating a shared library, we must presume that the
8914 only references to the symbol are via the global offset table.
8915 For such cases we need not do anything here; the relocations will
8916 be handled correctly by relocate_section. */
0e1862bb 8917 if (bfd_link_pic (info))
a06ea964
NC		 8918 return TRUE;
8919
8920 /* If there are no references to this symbol that do not use the
8921 GOT, we don't need to generate a copy reloc. */
8922 if (!h->non_got_ref)
8923 return TRUE;
8924
8925 /* If -z nocopyreloc was given, we won't generate them either. */
8926 if (info->nocopyreloc)
8927 {
8928 h->non_got_ref = 0;
8929 return TRUE;
8930 }
8931
6353d82b
JW		 8932 if (ELIMINATE_COPY_RELOCS)
8933 {
8934 struct elf_aarch64_link_hash_entry *eh;
dce2246a 8935 /* If we don't find any dynamic relocs in read-only sections, then
6353d82b
JW		 8936 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
8937 eh = (struct elf_aarch64_link_hash_entry *) h;
8938 if (!need_copy_relocation_p (eh))
8939 {
8940 h->non_got_ref = 0;
8941 return TRUE;
8942 }
8943 }
8944
a06ea964
NC		 8945 /* We must allocate the symbol in our .dynbss section, which will
8946 become part of the .bss section of the executable. There will be
8947 an entry for this symbol in the .dynsym section. The dynamic
8948 object will contain position independent code, so all references
8949 from the dynamic object to this symbol will go through the global
8950 offset table. The dynamic linker will use the .dynsym entry to
8951 determine the address it must put in the global offset table, so
8952 both the dynamic object and the regular object will refer to the
8953 same memory location for the variable. */
8954
cec5225b 8955 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 8956
8957 /* We must generate a R_AARCH64_COPY reloc to tell the dynamic linker
8958 to copy the initial value out of the dynamic object and into the
8959 runtime process image. */
5474d94f
AM		 8960 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
8961 {
8962 s = htab->root.sdynrelro;
8963 srel = htab->root.sreldynrelro;
8964 }
8965 else
8966 {
8967 s = htab->root.sdynbss;
8968 srel = htab->root.srelbss;
8969 }
a06ea964
NC		 8970 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
8971 {
5474d94f 8972 srel->size += RELOC_SIZE (htab);
a06ea964
NC		 8973 h->needs_copy = 1;
8974 }
8975
6cabe1ea 8976 return _bfd_elf_adjust_dynamic_copy (info, h, s);
a06ea964
NC		 8977
8978}
8979
8980static bfd_boolean
cec5225b 8981elfNN_aarch64_allocate_local_symbols (bfd *abfd, unsigned number)
a06ea964
NC		 8982{
8983 struct elf_aarch64_local_symbol *locals;
cec5225b 8984 locals = elf_aarch64_locals (abfd);
a06ea964
NC		 8985 if (locals == NULL)
8986 {
8987 locals = (struct elf_aarch64_local_symbol *)
8988 bfd_zalloc (abfd, number * sizeof (struct elf_aarch64_local_symbol));
8989 if (locals == NULL)
8990 return FALSE;
cec5225b 8991 elf_aarch64_locals (abfd) = locals;
a06ea964
NC		 8992 }
8993 return TRUE;
8994}
8995
a1bdea65
SP		 8996/* Initialise the .got section to hold the global offset table. */
8997
8998static void
8999aarch64_elf_init_got_section (bfd *abfd, struct bfd_link_info *info)
9000{
9001 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9002 asection *s;
9003 struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
9004 unsigned int align = bed->s->log_file_align + globals->c64_rel;
9005
9006 if (globals->root.sgot != NULL)
9007 {
9008 bfd_set_section_alignment (globals->root.srelgot,
9009 bed->s->log_file_align);
9010 bfd_set_section_alignment (globals->root.sgot, align);
9011 globals->root.sgot->size += GOT_ENTRY_SIZE (globals);
9012 }
9013
8d4edc5f
SP		 9014 /* Track capability initialisation for static non-PIE binaries. */
9015 if (bfd_link_executable (info) && !bfd_link_pic (info)
9016 && globals->srelcaps == NULL)
9017 globals->srelcaps = globals->root.srelgot;
9018
a1bdea65
SP		 9019 if (globals->root.igotplt != NULL)
9020 bfd_set_section_alignment (globals->root.igotplt, align);
9021
9022 s = globals->root.sgot;
9023
9024 if (globals->root.sgotplt != NULL)
9025 {
9026 bfd_set_section_alignment (globals->root.sgotplt, align);
9027 s = globals->root.sgotplt;
9028 }
9029
9030 /* The first bit of the global offset table is the header. */
9031 if (s != NULL)
9032 s->size += bed->got_header_size (info);
9033}
9034
cc0efaa8
MS		 9035/* Create the .got section to hold the global offset table. */
9036
9037static bfd_boolean
9038aarch64_elf_create_got_section (bfd *abfd, struct bfd_link_info *info)
9039{
9040 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9041 flagword flags;
9042 asection *s;
9043 struct elf_link_hash_entry *h;
9044 struct elf_link_hash_table *htab = elf_hash_table (info);
9045
9046 /* This function may be called more than once. */
ce558b89 9047 if (htab->sgot != NULL)
cc0efaa8
MS		 9048 return TRUE;
9049
9050 flags = bed->dynamic_sec_flags;
9051
9052 s = bfd_make_section_anyway_with_flags (abfd,
9053 (bed->rela_plts_and_copies_p
9054 ? ".rela.got" : ".rel.got"),
9055 (bed->dynamic_sec_flags
9056 | SEC_READONLY));
a1bdea65 9057 if (s == NULL)
cc0efaa8
MS		 9058 return FALSE;
9059 htab->srelgot = s;
9060
9061 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
a1bdea65 9062 if (s == NULL)
cc0efaa8
MS		 9063 return FALSE;
9064 htab->sgot = s;
cc0efaa8
MS		 9065
9066 if (bed->want_got_sym)
9067 {
9068 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
9069 (or .got.plt) section. We don't do this in the linker script
9070 because we don't want to define the symbol if we are not creating
9071 a global offset table. */
9072 h = _bfd_elf_define_linkage_sym (abfd, info, s,
9073 "_GLOBAL_OFFSET_TABLE_");
9074 elf_hash_table (info)->hgot = h;
9075 if (h == NULL)
9076 return FALSE;
9077 }
9078
9079 if (bed->want_got_plt)
9080 {
9081 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
a1bdea65 9082 if (s == NULL)
cc0efaa8
MS		 9083 return FALSE;
9084 htab->sgotplt = s;
9085 }
9086
cc0efaa8
MS		 9087 return TRUE;
9088}
9089
a06ea964
NC		 9090/* Look through the relocs for a section during the first phase. */
9091
9092static bfd_boolean
cec5225b 9093elfNN_aarch64_check_relocs (bfd *abfd, struct bfd_link_info *info,
a06ea964
NC		 9094 asection *sec, const Elf_Internal_Rela *relocs)
9095{
9096 Elf_Internal_Shdr *symtab_hdr;
9097 struct elf_link_hash_entry **sym_hashes;
9098 const Elf_Internal_Rela *rel;
9099 const Elf_Internal_Rela *rel_end;
9100 asection *sreloc;
9101
cec5225b 9102 struct elf_aarch64_link_hash_table *htab;
a06ea964 9103
0e1862bb 9104 if (bfd_link_relocatable (info))
a06ea964
NC		 9105 return TRUE;
9106
9107 BFD_ASSERT (is_aarch64_elf (abfd));
9108
cec5225b 9109 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 9110 sreloc = NULL;
9111
9112 symtab_hdr = &elf_symtab_hdr (abfd);
9113 sym_hashes = elf_sym_hashes (abfd);
a06ea964 9114
7ff36d1a 9115 bfd_elfNN_aarch64_init_maps (abfd, info);
f0070c1e 9116
a06ea964
NC		 9117 rel_end = relocs + sec->reloc_count;
9118 for (rel = relocs; rel < rel_end; rel++)
9119 {
9120 struct elf_link_hash_entry *h;
f3ecc5c8 9121 unsigned int r_symndx, r_type;
a6bb11b2 9122 bfd_reloc_code_real_type bfd_r_type;
1419bbe5 9123 Elf_Internal_Sym *isym;
a06ea964 9124
cec5225b 9125 r_symndx = ELFNN_R_SYM (rel->r_info);
f3ecc5c8
AC		 9126 r_type = ELFNN_R_TYPE (rel->r_info);
9127 bfd_r_type = elfNN_aarch64_bfd_reloc_from_type (abfd, r_type);
a06ea964
NC		 9128
9129 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
9130 {
695344c0 9131 /* xgettext:c-format */
871b3ab2 9132 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx);
a06ea964
NC		 9133 return FALSE;
9134 }
9135
ed5acf27 9136 if (r_symndx < symtab_hdr->sh_info)
1419bbe5
WN		 9137 {
9138 /* A local symbol. */
f1dfbfdb 9139 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
1419bbe5
WN		 9140 abfd, r_symndx);
9141 if (isym == NULL)
9142 return FALSE;
9143
9144 /* Check relocation against local STT_GNU_IFUNC symbol. */
9145 if (ELF_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
9146 {
9147 h = elfNN_aarch64_get_local_sym_hash (htab, abfd, rel,
9148 TRUE);
9149 if (h == NULL)
9150 return FALSE;
9151
9152 /* Fake a STT_GNU_IFUNC symbol. */
9153 h->type = STT_GNU_IFUNC;
9154 h->def_regular = 1;
9155 h->ref_regular = 1;
9156 h->forced_local = 1;
9157 h->root.type = bfd_link_hash_defined;
9158 }
9159 else
9160 h = NULL;
9161 }
a06ea964
NC		 9162 else
9163 {
9164 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
9165 while (h->root.type == bfd_link_hash_indirect
9166 || h->root.type == bfd_link_hash_warning)
9167 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9168 }
9169
f3ecc5c8
AC		 9170 /* Ignore TLS relocations against weak undef symbols and warn about them.
9171 The behaviour of weak TLS variables is not well defined. Since making
9172 these well behaved is not a priority for Morello, we simply ignore
9173 TLS relocations against such symbols here to avoid the linker crashing
9174 on these and to enable making progress in other areas. */
9175 if (r_symndx
9176 && h
9177 && IS_AARCH64_TLS_RELOC (bfd_r_type)
9178 && h->root.type == bfd_link_hash_undefweak)
9179 {
9180 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9181 _bfd_error_handler (_("%pB(%pA+%#" PRIx64 "): ignoring TLS relocation "
9182 "%s against undef weak symbol %s"),
9183 abfd, sec,
9184 (uint64_t) rel->r_offset,
9185 elfNN_aarch64_howto_table[howto_index].name,
9186 h->root.root.string);
9187 continue;
9188 }
9189
a06ea964 9190 /* Could be done earlier, if h were already available. */
4ca9b406 9191 bfd_r_type = aarch64_tls_transition (abfd, info, rel, h, r_symndx);
a06ea964 9192
1419bbe5
WN		 9193 if (h != NULL)
9194 {
18f822a0
JW		 9195 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
9196 This shows up in particular in an R_AARCH64_PREL64 in large model
9197 when calculating the pc-relative address to .got section which is
9198 used to initialize the gp register. */
9199 if (h->root.root.string
9200 && strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
9201 {
9202 if (htab->root.dynobj == NULL)
9203 htab->root.dynobj = abfd;
9204
9205 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
9206 return FALSE;
9207
9208 BFD_ASSERT (h == htab->root.hgot);
9209 }
9210
1419bbe5
WN		 9211 /* Create the ifunc sections for static executables. If we
9212 never see an indirect function symbol nor we are building
9213 a static executable, those sections will be empty and
9214 won't appear in output. */
9215 switch (bfd_r_type)
9216 {
9217 default:
9218 break;
9219
e19e9199
SP		 9220 case BFD_RELOC_MORELLO_CALL26:
9221 case BFD_RELOC_MORELLO_JUMP26:
9222 /* For dynamic symbols record caller information so that we can
9223 decide what kind of PLT stubs to emit. */
9224 if (h != NULL)
9225 elf_aarch64_hash_entry (h)->got_type = GOT_CAP;
9226 /* Fall through. */
9227
ce336788
JW		 9228 case BFD_RELOC_AARCH64_ADD_LO12:
9229 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
92504105 9230 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
ce336788 9231 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105 9232 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
1419bbe5 9233 case BFD_RELOC_AARCH64_CALL26:
ce336788 9234 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
1419bbe5 9235 case BFD_RELOC_AARCH64_JUMP26:
7018c030 9236 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
1419bbe5 9237 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 9238 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 9239 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
1419bbe5 9240 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
a1bdea65 9241 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
dc8008f5 9242 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 9243 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
ce336788 9244 case BFD_RELOC_AARCH64_NN:
1419bbe5
WN		 9245 if (htab->root.dynobj == NULL)
9246 htab->root.dynobj = abfd;
9247 if (!_bfd_elf_create_ifunc_sections (htab->root.dynobj, info))
9248 return FALSE;
9249 break;
9250 }
9251
2d0ca824 9252 /* It is referenced by a non-shared object. */
1419bbe5 9253 h->ref_regular = 1;
1419bbe5
WN		 9254 }
9255
a6bb11b2 9256 switch (bfd_r_type)
a06ea964 9257 {
79e74192
RL		 9258 case BFD_RELOC_AARCH64_16:
9259#if ARCH_SIZE == 64
9260 case BFD_RELOC_AARCH64_32:
9261#endif
279b2f94 9262 if (bfd_link_pic (info) && (sec->flags & SEC_ALLOC) != 0)
79e74192 9263 {
279b2f94
RL		 9264 if (h != NULL
9265 /* This is an absolute symbol. It represents a value instead
9266 of an address. */
c691de6a 9267 && (bfd_is_abs_symbol (&h->root)
279b2f94
RL		 9268 /* This is an undefined symbol. */
9269 || h->root.type == bfd_link_hash_undefined))
9270 break;
9271
9272 /* For local symbols, defined global symbols in a non-ABS section,
9273 it is assumed that the value is an address. */
79e74192
RL		 9274 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9275 _bfd_error_handler
9276 /* xgettext:c-format */
871b3ab2 9277 (_("%pB: relocation %s against `%s' can not be used when making "
79e74192
RL		 9278 "a shared object"),
9279 abfd, elfNN_aarch64_howto_table[howto_index].name,
9280 (h) ? h->root.root.string : "a local symbol");
9281 bfd_set_error (bfd_error_bad_value);
9282 return FALSE;
9283 }
9284 else
9285 break;
9286
6353d82b
JW		 9287 case BFD_RELOC_AARCH64_MOVW_G0_NC:
9288 case BFD_RELOC_AARCH64_MOVW_G1_NC:
9289 case BFD_RELOC_AARCH64_MOVW_G2_NC:
9290 case BFD_RELOC_AARCH64_MOVW_G3:
9291 if (bfd_link_pic (info))
9292 {
9293 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
9294 _bfd_error_handler
9295 /* xgettext:c-format */
871b3ab2 9296 (_("%pB: relocation %s against `%s' can not be used when making "
6353d82b
JW		 9297 "a shared object; recompile with -fPIC"),
9298 abfd, elfNN_aarch64_howto_table[howto_index].name,
9299 (h) ? h->root.root.string : "a local symbol");
9300 bfd_set_error (bfd_error_bad_value);
9301 return FALSE;
9302 }
9303 /* Fall through. */
9304
9305 case BFD_RELOC_AARCH64_16_PCREL:
9306 case BFD_RELOC_AARCH64_32_PCREL:
9307 case BFD_RELOC_AARCH64_64_PCREL:
9308 case BFD_RELOC_AARCH64_ADD_LO12:
9309 case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
9310 case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
92504105
SP		 9311 case BFD_RELOC_MORELLO_ADR_HI20_NC_PCREL:
9312 case BFD_RELOC_MORELLO_ADR_HI20_PCREL:
6353d82b
JW		 9313 case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
9314 case BFD_RELOC_AARCH64_LDST128_LO12:
9315 case BFD_RELOC_AARCH64_LDST16_LO12:
9316 case BFD_RELOC_AARCH64_LDST32_LO12:
9317 case BFD_RELOC_AARCH64_LDST64_LO12:
9318 case BFD_RELOC_AARCH64_LDST8_LO12:
9319 case BFD_RELOC_AARCH64_LD_LO19_PCREL:
f7d2c675 9320 case BFD_RELOC_MORELLO_LD_LO17_PCREL:
6353d82b
JW		 9321 if (h == NULL || bfd_link_pic (info))
9322 break;
9323 /* Fall through. */
9324
a6bb11b2 9325 case BFD_RELOC_AARCH64_NN:
a06ea964
NC		 9326
9327 /* We don't need to handle relocs into sections not going into
9328 the "real" output. */
9329 if ((sec->flags & SEC_ALLOC) == 0)
9330 break;
9331
9332 if (h != NULL)
9333 {
0e1862bb 9334 if (!bfd_link_pic (info))
a06ea964
NC		 9335 h->non_got_ref = 1;
9336
9337 h->plt.refcount += 1;
9338 h->pointer_equality_needed = 1;
9339 }
9340
9341 /* No need to do anything if we're not creating a shared
9342 object. */
6353d82b
JW		 9343 if (!(bfd_link_pic (info)
9344 /* If on the other hand, we are creating an executable, we
9345 may need to keep relocations for symbols satisfied by a
9346 dynamic library if we manage to avoid copy relocs for the
9347 symbol.
9348
9349 NOTE: Currently, there is no support of copy relocs
9350 elimination on pc-relative relocation types, because there is
9351 no dynamic relocation support for them in glibc. We still
9352 record the dynamic symbol reference for them. This is
9353 because one symbol may be referenced by both absolute
9354 relocation (for example, BFD_RELOC_AARCH64_NN) and
9355 pc-relative relocation. We need full symbol reference
9356 information to make correct decision later in
9357 elfNN_aarch64_adjust_dynamic_symbol. */
9358 || (ELIMINATE_COPY_RELOCS
9359 && !bfd_link_pic (info)
9360 && h != NULL
9361 && (h->root.type == bfd_link_hash_defweak
9362 || !h->def_regular))))
a06ea964
NC		 9363 break;
9364
9365 {
9366 struct elf_dyn_relocs *p;
9367 struct elf_dyn_relocs **head;
6353d82b 9368 int howto_index = bfd_r_type - BFD_RELOC_AARCH64_RELOC_START;
a06ea964
NC		 9369
9370 /* We must copy these reloc types into the output file.
9371 Create a reloc section in dynobj and make room for
9372 this reloc. */
9373 if (sreloc == NULL)
9374 {
9375 if (htab->root.dynobj == NULL)
9376 htab->root.dynobj = abfd;
9377
9378 sreloc = _bfd_elf_make_dynamic_reloc_section
0608afa7 9379 (sec, htab->root.dynobj, LOG_FILE_ALIGN, abfd, /*rela? */ TRUE);
a06ea964
NC		 9380
9381 if (sreloc == NULL)
9382 return FALSE;
9383 }
9384
9385 /* If this is a global symbol, we count the number of
9386 relocations we need for this symbol. */
9387 if (h != NULL)
9388 {
190eb1dd 9389 head = &h->dyn_relocs;
a06ea964
NC		 9390 }
9391 else
9392 {
9393 /* Track dynamic relocs needed for local syms too.
9394 We really need local syms available to do this
9395 easily. Oh well. */
9396
9397 asection *s;
9398 void **vpp;
a06ea964 9399
f1dfbfdb 9400 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
a06ea964
NC		 9401 abfd, r_symndx);
9402 if (isym == NULL)
9403 return FALSE;
9404
9405 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
9406 if (s == NULL)
9407 s = sec;
9408
9409 /* Beware of type punned pointers vs strict aliasing
9410 rules. */
9411 vpp = &(elf_section_data (s)->local_dynrel);
9412 head = (struct elf_dyn_relocs **) vpp;
9413 }
9414
9415 p = *head;
9416 if (p == NULL || p->sec != sec)
9417 {
986f0783 9418 size_t amt = sizeof *p;
a06ea964
NC		 9419 p = ((struct elf_dyn_relocs *)
9420 bfd_zalloc (htab->root.dynobj, amt));
9421 if (p == NULL)
9422 return FALSE;
9423 p->next = *head;
9424 *head = p;
9425 p->sec = sec;
9426 }
9427
9428 p->count += 1;
9429
6353d82b
JW		 9430 if (elfNN_aarch64_howto_table[howto_index].pc_relative)
9431 p->pc_count += 1;
a06ea964
NC		 9432 }
9433 break;
9434
9435 /* RR: We probably want to keep a consistency check that
9436 there are no dangling GOT_PAGE relocs. */
92504105 9437 case BFD_RELOC_MORELLO_ADR_GOT_PAGE:
a1bdea65 9438 case BFD_RELOC_MORELLO_LD128_GOT_LO12_NC:
4ca9b406
SP		 9439 case BFD_RELOC_MORELLO_TLSDESC_ADR_PAGE20:
9440 case BFD_RELOC_MORELLO_TLSDESC_LD128_LO12:
a1bdea65
SP		 9441 htab->c64_rel = 1;
9442 /* Fall through. */
9443
9444 case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
7bcccb57 9445 case BFD_RELOC_AARCH64_GOT_LD_PREL19:
7018c030 9446 case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
7bcccb57 9447 case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
a2e1db00 9448 case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
99ad26cb 9449 case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
7bcccb57 9450 case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
dc8008f5 9451 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
74a1bfe1 9452 case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
f955cccf 9453 case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
7bcccb57 9454 case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
389b8029 9455 case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
7bcccb57 9456 case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
f955cccf 9457 case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
1ada945d 9458 case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
0484b454
RL		 9459 case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
9460 case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
a6bb11b2 9461 case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
7bcccb57 9462 case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
3c12b054 9463 case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
7ba7cfe4 9464 case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
94facae3 9465 case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
a6bb11b2 9466 case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
a6bb11b2 9467 case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
7bcccb57 9468 case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
043bf05a 9469 case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
3b957e5b
RL		 9470 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
9471 case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
73f925cc 9472 case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
f69e4920 9473 case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
77a69ff8 9474 case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
a06ea964
NC		 9475 {
9476 unsigned got_type;
9477 unsigned old_got_type;
9478
a6bb11b2 9479 got_type = aarch64_reloc_got_type (bfd_r_type);
a06ea964
NC		 9480
9481 if (h)
9482 {
9483 h->got.refcount += 1;
cec5225b 9484 old_got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC		 9485 }
9486 else
9487 {
9488 struct elf_aarch64_local_symbol *locals;
9489
cec5225b 9490 if (!elfNN_aarch64_allocate_local_symbols
a06ea964
NC		 9491 (abfd, symtab_hdr->sh_info))
9492 return FALSE;
9493
cec5225b 9494 locals = elf_aarch64_locals (abfd);
a06ea964
NC		 9495 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
9496 locals[r_symndx].got_refcount += 1;
9497 old_got_type = locals[r_symndx].got_type;
9498 }
9499
9500 /* If a variable is accessed with both general dynamic TLS
9501 methods, two slots may be created. */
9502 if (GOT_TLS_GD_ANY_P (old_got_type) && GOT_TLS_GD_ANY_P (got_type))
9503 got_type |= old_got_type;
9504
9505 /* We will already have issued an error message if there
9506 is a TLS/non-TLS mismatch, based on the symbol type.
9507 So just combine any TLS types needed. */
9508 if (old_got_type != GOT_UNKNOWN && old_got_type != GOT_NORMAL
a1bdea65
SP		 9509 && got_type != GOT_NORMAL && old_got_type != GOT_CAP
9510 && got_type != GOT_CAP)
a06ea964
NC		 9511 got_type |= old_got_type;
9512
9513 /* If the symbol is accessed by both IE and GD methods, we
9514 are able to relax. Turn off the GD flag, without
9515 messing up with any other kind of TLS types that may be
9516 involved. */
9517 if ((got_type & GOT_TLS_IE) && GOT_TLS_GD_ANY_P (got_type))
9518 got_type &= ~ (GOT_TLSDESC_GD | GOT_TLS_GD);
9519
4ca9b406
SP		 9520 /* Prefer the capability reference. */
9521 if ((old_got_type & GOT_CAP) && (got_type & GOT_NORMAL))
9522 {
9523 got_type &= ~GOT_NORMAL;
9524 got_type |= GOT_CAP;
9525 }
9526
9527 if (old_got_type != got_type)
a06ea964
NC		 9528 {
9529 if (h != NULL)
cec5225b 9530 elf_aarch64_hash_entry (h)->got_type = got_type;
a06ea964
NC		 9531 else
9532 {
9533 struct elf_aarch64_local_symbol *locals;
cec5225b 9534 locals = elf_aarch64_locals (abfd);
a06ea964
NC		 9535 BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
9536 locals[r_symndx].got_type = got_type;
9537 }
9538 }
9539
cc0efaa8
MS		 9540 if (htab->root.dynobj == NULL)
9541 htab->root.dynobj = abfd;
9542 if (! aarch64_elf_create_got_section (htab->root.dynobj, info))
9543 return FALSE;
a06ea964
NC		 9544 break;
9545 }
9546
e19e9199
SP		 9547 case BFD_RELOC_MORELLO_CALL26:
9548 case BFD_RELOC_MORELLO_JUMP26:
9549 htab->c64_rel = 1;
9550 if (h != NULL)
9551 elf_aarch64_hash_entry (h)->got_type = GOT_CAP;
9552
9553 /* Fall through. */
a6bb11b2
YZ		 9554 case BFD_RELOC_AARCH64_CALL26:
9555 case BFD_RELOC_AARCH64_JUMP26:
a06ea964 9556 if (h == NULL)
f0070c1e
SP		 9557 {
9558 isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, abfd,
9559 r_symndx);
9560 if (isym == NULL)
9561 return FALSE;
9562
9563 asection *s = bfd_section_from_elf_index (abfd, isym->st_shndx);
9564
9565 if (s == NULL)
9566 s = sec;
9567
9568 if (c64_value_p (s, isym->st_value))
9569 isym->st_target_internal |= ST_BRANCH_TO_C64;
9570
9571 /* If this is a local symbol then we resolve it
9572 directly without creating a PLT entry. */
9573 continue;
9574 }
9575
9576 if (h->root.type == bfd_link_hash_defined
9577 || h->root.type == bfd_link_hash_defweak)
9578 {
9579 asection *sym_sec = h->root.u.def.section;
9580 bfd_vma sym_value = h->root.u.def.value;
9581
9582 if (sym_sec != NULL && c64_value_p (sym_sec, sym_value))
9583 h->target_internal |= ST_BRANCH_TO_C64;
9584 }
a06ea964
NC		 9585
9586 h->needs_plt = 1;
1419bbe5
WN		 9587 if (h->plt.refcount <= 0)
9588 h->plt.refcount = 1;
9589 else
9590 h->plt.refcount += 1;
a06ea964 9591 break;
a6bb11b2 9592
40bbb79e
SP		 9593 case BFD_RELOC_MORELLO_CAPINIT:
9594 if (htab->srelcaps == NULL)
9595 {
9596 if (htab->root.dynobj == NULL)
9597 htab->root.dynobj = abfd;
9598
9599 sreloc = _bfd_elf_make_dynamic_reloc_section
9600 (sec, htab->root.dynobj, LOG_FILE_ALIGN,
9601 abfd, /*rela? */ TRUE);
9602
9603 if (sreloc == NULL)
9604 return FALSE;
9605
9606 htab->srelcaps = sreloc;
9607 }
9608 htab->srelcaps->size += RELOC_SIZE (htab);
9609
9610 break;
9611
a6bb11b2
YZ		 9612 default:
9613 break;
a06ea964
NC		 9614 }
9615 }
a6bb11b2 9616
a06ea964
NC		 9617 return TRUE;
9618}
9619
9620/* Treat mapping symbols as special target symbols. */
9621
9622static bfd_boolean
cec5225b 9623elfNN_aarch64_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED,
a06ea964
NC		 9624 asymbol *sym)
9625{
9626 return bfd_is_aarch64_special_symbol_name (sym->name,
9627 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY);
9628}
9629
e7679060
AM		 9630/* If the ELF symbol SYM might be a function in SEC, return the
9631 function size and set *CODE_OFF to the function's entry point,
9632 otherwise return zero. */
a06ea964 9633
e7679060
AM		 9634static bfd_size_type
9635elfNN_aarch64_maybe_function_sym (const asymbol *sym, asection *sec,
9636 bfd_vma *code_off)
9637{
9638 bfd_size_type size;
a06ea964 9639
e7679060
AM		 9640 if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
9641 | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
9642 || sym->section != sec)
9643 return 0;
a06ea964 9644
e7679060
AM		 9645 if (!(sym->flags & BSF_SYNTHETIC))
9646 switch (ELF_ST_TYPE (((elf_symbol_type *) sym)->internal_elf_sym.st_info))
9647 {
a06ea964
NC		 9648 case STT_FUNC:
9649 case STT_NOTYPE:
a06ea964 9650 break;
e7679060
AM		 9651 default:
9652 return 0;
9653 }
a06ea964 9654
e7679060
AM		 9655 if ((sym->flags & BSF_LOCAL)
9656 && bfd_is_aarch64_special_symbol_name (sym->name,
9657 BFD_AARCH64_SPECIAL_SYM_TYPE_ANY))
9658 return 0;
a06ea964 9659
e7679060
AM		 9660 *code_off = sym->value;
9661 size = 0;
9662 if (!(sym->flags & BSF_SYNTHETIC))
9663 size = ((elf_symbol_type *) sym)->internal_elf_sym.st_size;
9664 if (size == 0)
9665 size = 1;
9666 return size;
a06ea964
NC		 9667}
9668
9669static bfd_boolean
cec5225b 9670elfNN_aarch64_find_inliner_info (bfd *abfd,
a06ea964
NC		 9671 const char **filename_ptr,
9672 const char **functionname_ptr,
9673 unsigned int *line_ptr)
9674{
9675 bfd_boolean found;
9676 found = _bfd_dwarf2_find_inliner_info
9677 (abfd, filename_ptr,
9678 functionname_ptr, line_ptr, &elf_tdata (abfd)->dwarf2_find_line_info);
9679 return found;
9680}
9681
9682
ed7e9d0b
AM		 9683static bfd_boolean
9684elfNN_aarch64_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
a06ea964
NC		 9685{
9686 Elf_Internal_Ehdr *i_ehdrp; /* ELF file header, internal form. */
9687
ed7e9d0b
AM		 9688 if (!_bfd_elf_init_file_header (abfd, link_info))
9689 return FALSE;
9690
a06ea964 9691 i_ehdrp = elf_elfheader (abfd);
a06ea964 9692 i_ehdrp->e_ident[EI_ABIVERSION] = AARCH64_ELF_ABI_VERSION;
ed7e9d0b 9693 return TRUE;
a06ea964
NC		 9694}
9695
9696static enum elf_reloc_type_class
cec5225b 9697elfNN_aarch64_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
7e612e98
AM		 9698 const asection *rel_sec ATTRIBUTE_UNUSED,
9699 const Elf_Internal_Rela *rela)
a06ea964 9700{
f2e6a843
SN		 9701 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
9702
9703 if (htab->root.dynsym != NULL
9704 && htab->root.dynsym->contents != NULL)
9705 {
9706 /* Check relocation against STT_GNU_IFUNC symbol if there are
9707 dynamic symbols. */
9708 bfd *abfd = info->output_bfd;
9709 const struct elf_backend_data *bed = get_elf_backend_data (abfd);
9710 unsigned long r_symndx = ELFNN_R_SYM (rela->r_info);
9711 if (r_symndx != STN_UNDEF)
9712 {
9713 Elf_Internal_Sym sym;
9714 if (!bed->s->swap_symbol_in (abfd,
9715 (htab->root.dynsym->contents
9716 + r_symndx * bed->s->sizeof_sym),
9717 0, &sym))
9718 {
9719 /* xgettext:c-format */
871b3ab2 9720 _bfd_error_handler (_("%pB symbol number %lu references"
f2e6a843
SN		 9721 " nonexistent SHT_SYMTAB_SHNDX section"),
9722 abfd, r_symndx);
9723 /* Ideally an error class should be returned here. */
9724 }
9725 else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
9726 return reloc_class_ifunc;
9727 }
9728 }
9729
cec5225b 9730 switch ((int) ELFNN_R_TYPE (rela->r_info))
a06ea964 9731 {
f2e6a843 9732 case AARCH64_R (IRELATIVE):
e19e9199 9733 case MORELLO_R (IRELATIVE):
f2e6a843 9734 return reloc_class_ifunc;
a6bb11b2 9735 case AARCH64_R (RELATIVE):
e19e9199 9736 case MORELLO_R (RELATIVE):
a06ea964 9737 return reloc_class_relative;
a6bb11b2 9738 case AARCH64_R (JUMP_SLOT):
e19e9199 9739 case MORELLO_R (JUMP_SLOT):
a06ea964 9740 return reloc_class_plt;
a6bb11b2 9741 case AARCH64_R (COPY):
a06ea964
NC		 9742 return reloc_class_copy;
9743 default:
9744 return reloc_class_normal;
9745 }
9746}
9747
a06ea964
NC		 9748/* Handle an AArch64 specific section when reading an object file. This is
9749 called when bfd_section_from_shdr finds a section with an unknown
9750 type. */
9751
9752static bfd_boolean
cec5225b 9753elfNN_aarch64_section_from_shdr (bfd *abfd,
a06ea964
NC		 9754 Elf_Internal_Shdr *hdr,
9755 const char *name, int shindex)
9756{
9757 /* There ought to be a place to keep ELF backend specific flags, but
9758 at the moment there isn't one. We just keep track of the
9759 sections by their name, instead. Fortunately, the ABI gives
9760 names for all the AArch64 specific sections, so we will probably get
9761 away with this. */
9762 switch (hdr->sh_type)
9763 {
9764 case SHT_AARCH64_ATTRIBUTES:
9765 break;
9766
9767 default:
9768 return FALSE;
9769 }
9770
9771 if (!_bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
9772 return FALSE;
9773
9774 return TRUE;
9775}
9776
a06ea964
NC		 9777typedef struct
9778{
9779 void *finfo;
9780 struct bfd_link_info *info;
9781 asection *sec;
9782 int sec_shndx;
9783 int (*func) (void *, const char *, Elf_Internal_Sym *,
9784 asection *, struct elf_link_hash_entry *);
9785} output_arch_syminfo;
9786
9787enum map_symbol_type
9788{
9789 AARCH64_MAP_INSN,
e19e9199
SP		 9790 AARCH64_MAP_DATA,
9791 AARCH64_MAP_C64,
a06ea964
NC		 9792};
9793
9794
9795/* Output a single mapping symbol. */
9796
9797static bfd_boolean
cec5225b 9798elfNN_aarch64_output_map_sym (output_arch_syminfo *osi,
a06ea964
NC		 9799 enum map_symbol_type type, bfd_vma offset)
9800{
3979cf50 9801 static const char *names[3] = { "$x", "$d", "$c" };
a06ea964
NC		 9802 Elf_Internal_Sym sym;
9803
9804 sym.st_value = (osi->sec->output_section->vma
9805 + osi->sec->output_offset + offset);
9806 sym.st_size = 0;
9807 sym.st_other = 0;
9808 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
9809 sym.st_shndx = osi->sec_shndx;
8b21361b 9810 sym.st_target_internal = 0;
a06ea964
NC		 9811 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1;
9812}
9813
a06ea964
NC		 9814/* Output a single local symbol for a generated stub. */
9815
9816static bfd_boolean
cec5225b 9817elfNN_aarch64_output_stub_sym (output_arch_syminfo *osi, const char *name,
a06ea964
NC		 9818 bfd_vma offset, bfd_vma size)
9819{
9820 Elf_Internal_Sym sym;
9821
9822 sym.st_value = (osi->sec->output_section->vma
9823 + osi->sec->output_offset + offset);
9824 sym.st_size = size;
9825 sym.st_other = 0;
9826 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
9827 sym.st_shndx = osi->sec_shndx;
8b21361b 9828 sym.st_target_internal = 0;
a06ea964
NC		 9829 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1;
9830}
9831
9832static bfd_boolean
9833aarch64_map_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
9834{
cec5225b 9835 struct elf_aarch64_stub_hash_entry *stub_entry;
a06ea964
NC		 9836 asection *stub_sec;
9837 bfd_vma addr;
9838 char *stub_name;
9839 output_arch_syminfo *osi;
9840
9841 /* Massage our args to the form they really have. */
cec5225b 9842 stub_entry = (struct elf_aarch64_stub_hash_entry *) gen_entry;
a06ea964
NC		 9843 osi = (output_arch_syminfo *) in_arg;
9844
9845 stub_sec = stub_entry->stub_sec;
9846
9847 /* Ensure this stub is attached to the current section being
9848 processed. */
9849 if (stub_sec != osi->sec)
9850 return TRUE;
9851
9852 addr = (bfd_vma) stub_entry->stub_offset;
9853
9854 stub_name = stub_entry->output_name;
9855
9856 switch (stub_entry->stub_type)
9857 {
9858 case aarch64_stub_adrp_branch:
cec5225b 9859 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
a06ea964
NC		 9860 sizeof (aarch64_adrp_branch_stub)))
9861 return FALSE;
cec5225b 9862 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964
NC		 9863 return FALSE;
9864 break;
9865 case aarch64_stub_long_branch:
cec5225b 9866 if (!elfNN_aarch64_output_stub_sym
a06ea964
NC		 9867 (osi, stub_name, addr, sizeof (aarch64_long_branch_stub)))
9868 return FALSE;
cec5225b 9869 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
a06ea964 9870 return FALSE;
cec5225b 9871 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_DATA, addr + 16))
a06ea964
NC		 9872 return FALSE;
9873 break;
68fcca92
JW		 9874 case aarch64_stub_erratum_835769_veneer:
9875 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9876 sizeof (aarch64_erratum_835769_stub)))
9877 return FALSE;
9878 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
9879 return FALSE;
9880 break;
4106101c
MS		 9881 case aarch64_stub_erratum_843419_veneer:
9882 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9883 sizeof (aarch64_erratum_843419_stub)))
9884 return FALSE;
9885 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_INSN, addr))
9886 return FALSE;
9887 break;
50e192f0
SP		 9888 case aarch64_stub_branch_c64:
9889 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9890 sizeof (aarch64_c64_branch_stub)))
9891 return FALSE;
9892 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
9893 return FALSE;
9894 break;
9895 case c64_stub_branch_aarch64:
9896 case c64_stub_branch_c64:
9897 if (!elfNN_aarch64_output_stub_sym (osi, stub_name, addr,
9898 sizeof (c64_aarch64_branch_stub)))
9899 return FALSE;
9900 if (!elfNN_aarch64_output_map_sym (osi, AARCH64_MAP_C64, addr))
9901 return FALSE;
9902 break;
9fca35fc
TC		 9903 case aarch64_stub_none:
9904 break;
4106101c 9905
a06ea964 9906 default:
8e2fe09f 9907 abort ();
a06ea964
NC		 9908 }
9909
9910 return TRUE;
9911}
9912
9913/* Output mapping symbols for linker generated sections. */
9914
9915static bfd_boolean
cec5225b 9916elfNN_aarch64_output_arch_local_syms (bfd *output_bfd,
a06ea964
NC		 9917 struct bfd_link_info *info,
9918 void *finfo,
9919 int (*func) (void *, const char *,
9920 Elf_Internal_Sym *,
9921 asection *,
9922 struct elf_link_hash_entry
9923 *))
9924{
9925 output_arch_syminfo osi;
cec5225b 9926 struct elf_aarch64_link_hash_table *htab;
a06ea964 9927
cec5225b 9928 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 9929
9930 osi.finfo = finfo;
9931 osi.info = info;
9932 osi.func = func;
9933
9934 /* Long calls stubs. */
9935 if (htab->stub_bfd && htab->stub_bfd->sections)
9936 {
9937 asection *stub_sec;
9938
9939 for (stub_sec = htab->stub_bfd->sections;
9940 stub_sec != NULL; stub_sec = stub_sec->next)
9941 {
9942 /* Ignore non-stub sections. */
9943 if (!strstr (stub_sec->name, STUB_SUFFIX))
9944 continue;
9945
9946 osi.sec = stub_sec;
9947
9948 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9949 (output_bfd, osi.sec->output_section);
9950
61865519
MS		 9951 /* The first instruction in a stub is always a branch. */
9952 if (!elfNN_aarch64_output_map_sym (&osi, AARCH64_MAP_INSN, 0))
9953 return FALSE;
9954
a06ea964
NC		 9955 bfd_hash_traverse (&htab->stub_hash_table, aarch64_map_one_stub,
9956 &osi);
9957 }
9958 }
9959
9960 /* Finally, output mapping symbols for the PLT. */
9961 if (!htab->root.splt || htab->root.splt->size == 0)
9962 return TRUE;
9963
a06ea964
NC		 9964 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9965 (output_bfd, htab->root.splt->output_section);
9966 osi.sec = htab->root.splt;
9967
e19e9199
SP		 9968 elfNN_aarch64_output_map_sym (&osi, (htab->c64_rel ? AARCH64_MAP_C64
9969 : AARCH64_MAP_INSN), 0);
a06ea964
NC		 9970
9971 return TRUE;
9972
9973}
9974
9975/* Allocate target specific section data. */
9976
9977static bfd_boolean
cec5225b 9978elfNN_aarch64_new_section_hook (bfd *abfd, asection *sec)
a06ea964
NC		 9979{
9980 if (!sec->used_by_bfd)
9981 {
9982 _aarch64_elf_section_data *sdata;
986f0783 9983 size_t amt = sizeof (*sdata);
a06ea964
NC		 9984
9985 sdata = bfd_zalloc (abfd, amt);
9986 if (sdata == NULL)
9987 return FALSE;
f0070c1e 9988 sdata->elf.is_target_section_data = TRUE;
a06ea964
NC		 9989 sec->used_by_bfd = sdata;
9990 }
9991
a06ea964
NC		 9992 return _bfd_elf_new_section_hook (abfd, sec);
9993}
9994
9995
a06ea964
NC		 9996/* Create dynamic sections. This is different from the ARM backend in that
9997 the got, plt, gotplt and their relocation sections are all created in the
9998 standard part of the bfd elf backend. */
9999
10000static bfd_boolean
cec5225b 10001elfNN_aarch64_create_dynamic_sections (bfd *dynobj,
a06ea964
NC		 10002 struct bfd_link_info *info)
10003{
cc0efaa8
MS		 10004 /* We need to create .got section. */
10005 if (!aarch64_elf_create_got_section (dynobj, info))
10006 return FALSE;
a06ea964 10007
9d19e4fd 10008 return _bfd_elf_create_dynamic_sections (dynobj, info);
a06ea964
NC		 10009}
10010
10011
10012/* Allocate space in .plt, .got and associated reloc sections for
10013 dynamic relocs. */
10014
10015static bfd_boolean
cec5225b 10016elfNN_aarch64_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
a06ea964
NC		 10017{
10018 struct bfd_link_info *info;
cec5225b
YZ		 10019 struct elf_aarch64_link_hash_table *htab;
10020 struct elf_aarch64_link_hash_entry *eh;
a06ea964
NC		 10021 struct elf_dyn_relocs *p;
10022
10023 /* An example of a bfd_link_hash_indirect symbol is versioned
10024 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
10025 -> __gxx_personality_v0(bfd_link_hash_defined)
10026
10027 There is no need to process bfd_link_hash_indirect symbols here
10028 because we will also be presented with the concrete instance of
cec5225b 10029 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
a06ea964 10030 called to copy all relevant data from the generic to the concrete
2d0ca824 10031 symbol instance. */
a06ea964
NC		 10032 if (h->root.type == bfd_link_hash_indirect)
10033 return TRUE;
10034
10035 if (h->root.type == bfd_link_hash_warning)
10036 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10037
10038 info = (struct bfd_link_info *) inf;
cec5225b 10039 htab = elf_aarch64_hash_table (info);
a06ea964 10040
1419bbe5
WN		 10041 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
10042 here if it is defined and referenced in a non-shared object. */
10043 if (h->type == STT_GNU_IFUNC
10044 && h->def_regular)
10045 return TRUE;
10046 else if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
a06ea964
NC		 10047 {
10048 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 10049 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW		 10050 if (h->dynindx == -1 && !h->forced_local
10051 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC		 10052 {
10053 if (!bfd_elf_link_record_dynamic_symbol (info, h))
10054 return FALSE;
10055 }
10056
0e1862bb 10057 if (bfd_link_pic (info) || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
a06ea964
NC		 10058 {
10059 asection *s = htab->root.splt;
10060
10061 /* If this is the first .plt entry, make room for the special
10062 first entry. */
10063 if (s->size == 0)
10064 s->size += htab->plt_header_size;
10065
10066 h->plt.offset = s->size;
10067
10068 /* If this symbol is not defined in a regular file, and we are
10069 not generating a shared library, then set the symbol to this
10070 location in the .plt. This is required to make function
10071 pointers compare as equal between the normal executable and
10072 the shared library. */
0e1862bb 10073 if (!bfd_link_pic (info) && !h->def_regular)
a06ea964
NC		 10074 {
10075 h->root.u.def.section = s;
10076 h->root.u.def.value = h->plt.offset;
10077 }
10078
10079 /* Make room for this entry. For now we only create the
10080 small model PLT entries. We later need to find a way
10081 of relaxing into these from the large model PLT entries. */
37c18eed 10082 s->size += htab->plt_entry_size;
a06ea964
NC		 10083
10084 /* We also need to make an entry in the .got.plt section, which
10085 will be placed in the .got section by the linker script. */
a1bdea65 10086 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 10087
10088 /* We also need to make an entry in the .rela.plt section. */
10089 htab->root.srelplt->size += RELOC_SIZE (htab);
10090
10091 /* We need to ensure that all GOT entries that serve the PLT
10092 are consecutive with the special GOT slots [0] [1] and
10093 [2]. Any addtional relocations, such as
10094 R_AARCH64_TLSDESC, must be placed after the PLT related
10095 entries. We abuse the reloc_count such that during
10096 sizing we adjust reloc_count to indicate the number of
10097 PLT related reserved entries. In subsequent phases when
10098 filling in the contents of the reloc entries, PLT related
10099 entries are placed by computing their PLT index (0
10100 .. reloc_count). While other none PLT relocs are placed
10101 at the slot indicated by reloc_count and reloc_count is
10102 updated. */
10103
10104 htab->root.srelplt->reloc_count++;
823710d5
SN		 10105
10106 /* Mark the DSO in case R_<CLS>_JUMP_SLOT relocs against
10107 variant PCS symbols are present. */
10108 if (h->other & STO_AARCH64_VARIANT_PCS)
10109 htab->variant_pcs = 1;
10110
a06ea964
NC		 10111 }
10112 else
10113 {
10114 h->plt.offset = (bfd_vma) - 1;
10115 h->needs_plt = 0;
10116 }
10117 }
10118 else
10119 {
10120 h->plt.offset = (bfd_vma) - 1;
10121 h->needs_plt = 0;
10122 }
10123
cec5225b 10124 eh = (struct elf_aarch64_link_hash_entry *) h;
a06ea964
NC		 10125 eh->tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
10126
10127 if (h->got.refcount > 0)
10128 {
10129 bfd_boolean dyn;
cec5225b 10130 unsigned got_type = elf_aarch64_hash_entry (h)->got_type;
a06ea964
NC		 10131
10132 h->got.offset = (bfd_vma) - 1;
10133
10134 dyn = htab->root.dynamic_sections_created;
10135
10136 /* Make sure this symbol is output as a dynamic symbol.
07d6d2b8 10137 Undefined weak syms won't yet be marked as dynamic. */
ff07562f
JW		 10138 if (dyn && h->dynindx == -1 && !h->forced_local
10139 && h->root.type == bfd_link_hash_undefweak)
a06ea964
NC		 10140 {
10141 if (!bfd_elf_link_record_dynamic_symbol (info, h))
10142 return FALSE;
10143 }
10144
10145 if (got_type == GOT_UNKNOWN)
10146 {
10147 }
a1bdea65
SP		 10148 else if (got_type == GOT_NORMAL
10149 || got_type == GOT_CAP)
a06ea964
NC		 10150 {
10151 h->got.offset = htab->root.sgot->size;
a1bdea65 10152 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 10153 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10154 || h->root.type != bfd_link_hash_undefweak)
0e1862bb 10155 && (bfd_link_pic (info)
a377ae2a
SN		 10156 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))
10157 /* Undefined weak symbol in static PIE resolves to 0 without
10158 any dynamic relocations. */
10159 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC		 10160 {
10161 htab->root.srelgot->size += RELOC_SIZE (htab);
10162 }
8d4edc5f
SP		 10163 else if (bfd_link_executable (info) && !bfd_link_pic (info))
10164 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC		 10165 }
10166 else
10167 {
10168 int indx;
10169 if (got_type & GOT_TLSDESC_GD)
10170 {
10171 eh->tlsdesc_got_jump_table_offset =
10172 (htab->root.sgotplt->size
10173 - aarch64_compute_jump_table_size (htab));
a1bdea65 10174 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 10175 h->got.offset = (bfd_vma) - 2;
10176 }
10177
10178 if (got_type & GOT_TLS_GD)
10179 {
10180 h->got.offset = htab->root.sgot->size;
a1bdea65 10181 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 10182 }
10183
10184 if (got_type & GOT_TLS_IE)
10185 {
10186 h->got.offset = htab->root.sgot->size;
a1bdea65 10187 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 10188 }
10189
10190 indx = h && h->dynindx != -1 ? h->dynindx : 0;
10191 if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10192 || h->root.type != bfd_link_hash_undefweak)
6dda7875 10193 && (!bfd_link_executable (info)
a06ea964 10194 || indx != 0
4ca9b406
SP		 10195 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)
10196 /* On Morello support only TLSDESC_GD to TLSLE relaxation;
10197 for everything else we must emit a dynamic relocation. */
10198 || got_type & GOT_CAP))
a06ea964
NC		 10199 {
10200 if (got_type & GOT_TLSDESC_GD)
10201 {
10202 htab->root.srelplt->size += RELOC_SIZE (htab);
10203 /* Note reloc_count not incremented here! We have
10204 already adjusted reloc_count for this relocation
10205 type. */
10206
10207 /* TLSDESC PLT is now needed, but not yet determined. */
9bcc30e4 10208 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC		 10209 }
10210
10211 if (got_type & GOT_TLS_GD)
10212 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
10213
10214 if (got_type & GOT_TLS_IE)
10215 htab->root.srelgot->size += RELOC_SIZE (htab);
10216 }
10217 }
10218 }
10219 else
10220 {
10221 h->got.offset = (bfd_vma) - 1;
10222 }
10223
190eb1dd 10224 if (h->dyn_relocs == NULL)
a06ea964
NC		 10225 return TRUE;
10226
10227 /* In the shared -Bsymbolic case, discard space allocated for
10228 dynamic pc-relative relocs against symbols which turn out to be
10229 defined in regular objects. For the normal shared case, discard
10230 space for pc-relative relocs that have become local due to symbol
10231 visibility changes. */
10232
0e1862bb 10233 if (bfd_link_pic (info))
a06ea964
NC		 10234 {
10235 /* Relocs that use pc_count are those that appear on a call
07d6d2b8
AM		 10236 insn, or certain REL relocs that can generated via assembly.
10237 We want calls to protected symbols to resolve directly to the
10238 function rather than going via the plt. If people want
10239 function pointer comparisons to work as expected then they
10240 should avoid writing weird assembly. */
a06ea964
NC		 10241 if (SYMBOL_CALLS_LOCAL (info, h))
10242 {
10243 struct elf_dyn_relocs **pp;
10244
190eb1dd 10245 for (pp = &h->dyn_relocs; (p = *pp) != NULL;)
a06ea964
NC		 10246 {
10247 p->count -= p->pc_count;
10248 p->pc_count = 0;
10249 if (p->count == 0)
10250 *pp = p->next;
10251 else
10252 pp = &p->next;
10253 }
10254 }
10255
10256 /* Also discard relocs on undefined weak syms with non-default
07d6d2b8 10257 visibility. */
190eb1dd 10258 if (h->dyn_relocs != NULL && h->root.type == bfd_link_hash_undefweak)
a06ea964 10259 {
ddb7fd0f
L		 10260 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
10261 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
190eb1dd 10262 h->dyn_relocs = NULL;
a06ea964
NC		 10263
10264 /* Make sure undefined weak symbols are output as a dynamic
10265 symbol in PIEs. */
10266 else if (h->dynindx == -1
10267 && !h->forced_local
ff07562f 10268 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC		 10269 && !bfd_elf_link_record_dynamic_symbol (info, h))
10270 return FALSE;
10271 }
10272
10273 }
10274 else if (ELIMINATE_COPY_RELOCS)
10275 {
10276 /* For the non-shared case, discard space for relocs against
07d6d2b8
AM		 10277 symbols which turn out to need copy relocs or are not
10278 dynamic. */
a06ea964
NC		 10279
10280 if (!h->non_got_ref
10281 && ((h->def_dynamic
10282 && !h->def_regular)
10283 || (htab->root.dynamic_sections_created
10284 && (h->root.type == bfd_link_hash_undefweak
10285 || h->root.type == bfd_link_hash_undefined))))
10286 {
10287 /* Make sure this symbol is output as a dynamic symbol.
10288 Undefined weak syms won't yet be marked as dynamic. */
10289 if (h->dynindx == -1
10290 && !h->forced_local
ff07562f 10291 && h->root.type == bfd_link_hash_undefweak
a06ea964
NC		 10292 && !bfd_elf_link_record_dynamic_symbol (info, h))
10293 return FALSE;
10294
10295 /* If that succeeded, we know we'll be keeping all the
10296 relocs. */
10297 if (h->dynindx != -1)
10298 goto keep;
10299 }
10300
190eb1dd 10301 h->dyn_relocs = NULL;
a06ea964
NC		 10302
10303 keep:;
10304 }
10305
10306 /* Finally, allocate space. */
190eb1dd 10307 for (p = h->dyn_relocs; p != NULL; p = p->next)
a06ea964
NC		 10308 {
10309 asection *sreloc;
10310
10311 sreloc = elf_section_data (p->sec)->sreloc;
10312
10313 BFD_ASSERT (sreloc != NULL);
10314
10315 sreloc->size += p->count * RELOC_SIZE (htab);
10316 }
10317
10318 return TRUE;
10319}
10320
1419bbe5
WN		 10321/* Allocate space in .plt, .got and associated reloc sections for
10322 ifunc dynamic relocs. */
10323
10324static bfd_boolean
10325elfNN_aarch64_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h,
10326 void *inf)
10327{
10328 struct bfd_link_info *info;
10329 struct elf_aarch64_link_hash_table *htab;
1419bbe5
WN		 10330
10331 /* An example of a bfd_link_hash_indirect symbol is versioned
10332 symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect)
10333 -> __gxx_personality_v0(bfd_link_hash_defined)
10334
10335 There is no need to process bfd_link_hash_indirect symbols here
10336 because we will also be presented with the concrete instance of
10337 the symbol and elfNN_aarch64_copy_indirect_symbol () will have been
10338 called to copy all relevant data from the generic to the concrete
2d0ca824 10339 symbol instance. */
1419bbe5
WN		 10340 if (h->root.type == bfd_link_hash_indirect)
10341 return TRUE;
10342
10343 if (h->root.type == bfd_link_hash_warning)
10344 h = (struct elf_link_hash_entry *) h->root.u.i.link;
10345
10346 info = (struct bfd_link_info *) inf;
10347 htab = elf_aarch64_hash_table (info);
10348
1419bbe5
WN		 10349 /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
10350 here if it is defined and referenced in a non-shared object. */
10351 if (h->type == STT_GNU_IFUNC
10352 && h->def_regular)
10353 return _bfd_elf_allocate_ifunc_dyn_relocs (info, h,
190eb1dd 10354 &h->dyn_relocs,
1419bbe5
WN		 10355 htab->plt_entry_size,
10356 htab->plt_header_size,
a1bdea65 10357 GOT_ENTRY_SIZE (htab),
233cc9c1 10358 FALSE);
1419bbe5
WN		 10359 return TRUE;
10360}
10361
1419bbe5
WN		 10362/* Allocate space in .plt, .got and associated reloc sections for
10363 local ifunc dynamic relocs. */
10364
10365static bfd_boolean
10366elfNN_aarch64_allocate_local_ifunc_dynrelocs (void **slot, void *inf)
10367{
10368 struct elf_link_hash_entry *h
10369 = (struct elf_link_hash_entry *) *slot;
10370
10371 if (h->type != STT_GNU_IFUNC
10372 || !h->def_regular
10373 || !h->ref_regular
10374 || !h->forced_local
10375 || h->root.type != bfd_link_hash_defined)
10376 abort ();
10377
10378 return elfNN_aarch64_allocate_ifunc_dynrelocs (h, inf);
10379}
a06ea964 10380
a06ea964
NC		 10381/* This is the most important function of all . Innocuosly named
10382 though ! */
2d0ca824 10383
a06ea964 10384static bfd_boolean
a1bdea65 10385elfNN_aarch64_size_dynamic_sections (bfd *output_bfd,
a06ea964
NC		 10386 struct bfd_link_info *info)
10387{
cec5225b 10388 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC		 10389 bfd *dynobj;
10390 asection *s;
10391 bfd_boolean relocs;
10392 bfd *ibfd;
10393
cec5225b 10394 htab = elf_aarch64_hash_table ((info));
a06ea964
NC		 10395 dynobj = htab->root.dynobj;
10396
10397 BFD_ASSERT (dynobj != NULL);
10398
10399 if (htab->root.dynamic_sections_created)
10400 {
9b8b325a 10401 if (bfd_link_executable (info) && !info->nointerp)
a06ea964
NC		 10402 {
10403 s = bfd_get_linker_section (dynobj, ".interp");
10404 if (s == NULL)
10405 abort ();
10406 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
10407 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
10408 }
10409 }
10410
a1bdea65
SP		 10411 aarch64_elf_init_got_section (output_bfd, info);
10412
e19e9199
SP		 10413 setup_plt_values (info, elf_aarch64_tdata (output_bfd)->plt_type);
10414
a06ea964
NC		 10415 /* Set up .got offsets for local syms, and space for local dynamic
10416 relocs. */
c72f2fb2 10417 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
a06ea964
NC		 10418 {
10419 struct elf_aarch64_local_symbol *locals = NULL;
10420 Elf_Internal_Shdr *symtab_hdr;
10421 asection *srel;
10422 unsigned int i;
10423
10424 if (!is_aarch64_elf (ibfd))
10425 continue;
10426
10427 for (s = ibfd->sections; s != NULL; s = s->next)
10428 {
10429 struct elf_dyn_relocs *p;
10430
10431 for (p = (struct elf_dyn_relocs *)
10432 (elf_section_data (s)->local_dynrel); p != NULL; p = p->next)
10433 {
10434 if (!bfd_is_abs_section (p->sec)
10435 && bfd_is_abs_section (p->sec->output_section))
10436 {
10437 /* Input section has been discarded, either because
10438 it is a copy of a linkonce section or due to
10439 linker script /DISCARD/, so we'll be discarding
10440 the relocs too. */
10441 }
10442 else if (p->count != 0)
10443 {
10444 srel = elf_section_data (p->sec)->sreloc;
10445 srel->size += p->count * RELOC_SIZE (htab);
10446 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
10447 info->flags |= DF_TEXTREL;
10448 }
10449 }
10450 }
10451
cec5225b 10452 locals = elf_aarch64_locals (ibfd);
a06ea964
NC		 10453 if (!locals)
10454 continue;
10455
10456 symtab_hdr = &elf_symtab_hdr (ibfd);
10457 srel = htab->root.srelgot;
10458 for (i = 0; i < symtab_hdr->sh_info; i++)
10459 {
10460 locals[i].got_offset = (bfd_vma) - 1;
10461 locals[i].tlsdesc_got_jump_table_offset = (bfd_vma) - 1;
10462 if (locals[i].got_refcount > 0)
10463 {
10464 unsigned got_type = locals[i].got_type;
10465 if (got_type & GOT_TLSDESC_GD)
10466 {
10467 locals[i].tlsdesc_got_jump_table_offset =
10468 (htab->root.sgotplt->size
10469 - aarch64_compute_jump_table_size (htab));
a1bdea65 10470 htab->root.sgotplt->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 10471 locals[i].got_offset = (bfd_vma) - 2;
10472 }
10473
10474 if (got_type & GOT_TLS_GD)
10475 {
10476 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 10477 htab->root.sgot->size += GOT_ENTRY_SIZE (htab) * 2;
a06ea964
NC		 10478 }
10479
b53b1bed 10480 if (got_type & GOT_TLS_IE
a1bdea65
SP		 10481 || got_type & GOT_NORMAL
10482 || got_type & GOT_CAP)
a06ea964
NC		 10483 {
10484 locals[i].got_offset = htab->root.sgot->size;
a1bdea65 10485 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 10486 }
10487
10488 if (got_type == GOT_UNKNOWN)
10489 {
10490 }
10491
0e1862bb 10492 if (bfd_link_pic (info))
a06ea964
NC		 10493 {
10494 if (got_type & GOT_TLSDESC_GD)
10495 {
10496 htab->root.srelplt->size += RELOC_SIZE (htab);
10497 /* Note RELOC_COUNT not incremented here! */
9bcc30e4 10498 htab->root.tlsdesc_plt = (bfd_vma) - 1;
a06ea964
NC		 10499 }
10500
10501 if (got_type & GOT_TLS_GD)
10502 htab->root.srelgot->size += RELOC_SIZE (htab) * 2;
10503
b53b1bed 10504 if (got_type & GOT_TLS_IE
a1bdea65
SP		 10505 || got_type & GOT_NORMAL
10506 || got_type & GOT_CAP)
a06ea964
NC		 10507 htab->root.srelgot->size += RELOC_SIZE (htab);
10508 }
8d4edc5f
SP		 10509 /* Static binary; put relocs into srelcaps. */
10510 else if (bfd_link_executable (info) && (got_type & GOT_CAP))
10511 htab->srelcaps->size += RELOC_SIZE (htab);
a06ea964
NC		 10512 }
10513 else
10514 {
10515 locals[i].got_refcount = (bfd_vma) - 1;
10516 }
10517 }
10518 }
10519
10520
10521 /* Allocate global sym .plt and .got entries, and space for global
10522 sym dynamic relocs. */
cec5225b 10523 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_dynrelocs,
a06ea964
NC		 10524 info);
10525
1419bbe5
WN		 10526 /* Allocate global ifunc sym .plt and .got entries, and space for global
10527 ifunc sym dynamic relocs. */
10528 elf_link_hash_traverse (&htab->root, elfNN_aarch64_allocate_ifunc_dynrelocs,
10529 info);
10530
1419bbe5
WN		 10531 /* Allocate .plt and .got entries, and space for local ifunc symbols. */
10532 htab_traverse (htab->loc_hash_table,
10533 elfNN_aarch64_allocate_local_ifunc_dynrelocs,
10534 info);
a06ea964 10535
d6cf562a
MM		 10536 if (bfd_link_executable (info)
10537 && !bfd_link_pic (info)
10538 && htab->srelcaps
10539 && htab->srelcaps->size > 0)
10540 {
10541 struct elf_link_hash_entry *h;
10542
10543 h = _bfd_elf_define_linkage_sym (output_bfd, info,
10544 htab->srelcaps,
10545 "__rela_dyn_start");
10546 h = _bfd_elf_define_linkage_sym (output_bfd, info,
10547 htab->srelcaps,
10548 "__rela_dyn_end");
10549
10550 h->root.u.def.value = htab->srelcaps->vma + htab->srelcaps->size;
10551 }
10552
a06ea964
NC		 10553 /* For every jump slot reserved in the sgotplt, reloc_count is
10554 incremented. However, when we reserve space for TLS descriptors,
10555 it's not incremented, so in order to compute the space reserved
10556 for them, it suffices to multiply the reloc count by the jump
10557 slot size. */
10558
10559 if (htab->root.srelplt)
8847944f 10560 htab->sgotplt_jump_table_size = aarch64_compute_jump_table_size (htab);
a06ea964 10561
9bcc30e4 10562 if (htab->root.tlsdesc_plt)
a06ea964
NC		 10563 {
10564 if (htab->root.splt->size == 0)
37c18eed 10565 htab->root.splt->size += htab->plt_header_size;
a06ea964 10566
a06ea964 10567 /* If we're not using lazy TLS relocations, don't generate the
ce12121b 10568 GOT and PLT entry required. */
9bcc30e4
L		 10569 if ((info->flags & DF_BIND_NOW))
10570 htab->root.tlsdesc_plt = 0;
10571 else
a06ea964 10572 {
9bcc30e4 10573 htab->root.tlsdesc_plt = htab->root.splt->size;
ce12121b
TC		 10574 htab->root.splt->size += htab->tlsdesc_plt_entry_size;
10575
9bcc30e4 10576 htab->root.tlsdesc_got = htab->root.sgot->size;
a1bdea65 10577 htab->root.sgot->size += GOT_ENTRY_SIZE (htab);
a06ea964
NC		 10578 }
10579 }
10580
68fcca92 10581 /* Init mapping symbols information to use later to distingush between
4106101c
MS		 10582 code and data while scanning for errata. */
10583 if (htab->fix_erratum_835769 || htab->fix_erratum_843419)
68fcca92
JW		 10584 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
10585 {
10586 if (!is_aarch64_elf (ibfd))
10587 continue;
7ff36d1a 10588 bfd_elfNN_aarch64_init_maps (ibfd, info);
68fcca92
JW		 10589 }
10590
a06ea964
NC		 10591 /* We now have determined the sizes of the various dynamic sections.
10592 Allocate memory for them. */
10593 relocs = FALSE;
10594 for (s = dynobj->sections; s != NULL; s = s->next)
10595 {
10596 if ((s->flags & SEC_LINKER_CREATED) == 0)
10597 continue;
10598
10599 if (s == htab->root.splt
10600 || s == htab->root.sgot
10601 || s == htab->root.sgotplt
10602 || s == htab->root.iplt
9d19e4fd 10603 || s == htab->root.igotplt
5474d94f
AM		 10604 || s == htab->root.sdynbss
10605 || s == htab->root.sdynrelro)
a06ea964
NC		 10606 {
10607 /* Strip this section if we don't need it; see the
10608 comment below. */
10609 }
fd361982 10610 else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
a06ea964
NC		 10611 {
10612 if (s->size != 0 && s != htab->root.srelplt)
10613 relocs = TRUE;
10614
10615 /* We use the reloc_count field as a counter if we need
10616 to copy relocs into the output file. */
10617 if (s != htab->root.srelplt)
10618 s->reloc_count = 0;
10619 }
10620 else
10621 {
10622 /* It's not one of our sections, so don't allocate space. */
10623 continue;
10624 }
10625
10626 if (s->size == 0)
10627 {
10628 /* If we don't need this section, strip it from the
10629 output file. This is mostly to handle .rela.bss and
10630 .rela.plt. We must create both sections in
10631 create_dynamic_sections, because they must be created
10632 before the linker maps input sections to output
10633 sections. The linker does that before
10634 adjust_dynamic_symbol is called, and it is that
10635 function which decides whether anything needs to go
10636 into these sections. */
a06ea964
NC		 10637 s->flags |= SEC_EXCLUDE;
10638 continue;
10639 }
10640
10641 if ((s->flags & SEC_HAS_CONTENTS) == 0)
10642 continue;
10643
10644 /* Allocate memory for the section contents. We use bfd_zalloc
07d6d2b8
AM		 10645 here in case unused entries are not reclaimed before the
10646 section's contents are written out. This should not happen,
10647 but this way if it does, we get a R_AARCH64_NONE reloc instead
10648 of garbage. */
a06ea964
NC		 10649 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
10650 if (s->contents == NULL)
10651 return FALSE;
10652 }
10653
10654 if (htab->root.dynamic_sections_created)
10655 {
10656 /* Add some entries to the .dynamic section. We fill in the
07d6d2b8
AM		 10657 values later, in elfNN_aarch64_finish_dynamic_sections, but we
10658 must add the entries now so that we get the correct size for
10659 the .dynamic section. The DT_DEBUG entry is filled in by the
10660 dynamic linker and used by the debugger. */
a06ea964
NC		 10661#define add_dynamic_entry(TAG, VAL) \
10662 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
10663
3084d7a2
L		 10664 if (!_bfd_elf_add_dynamic_tags (output_bfd, info, relocs))
10665 return FALSE;
a06ea964
NC		 10666
10667 if (htab->root.splt->size != 0)
10668 {
823710d5
SN		 10669 if (htab->variant_pcs
10670 && !add_dynamic_entry (DT_AARCH64_VARIANT_PCS, 0))
10671 return FALSE;
10672
1dbade74
SD		 10673 if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI_PAC)
10674 && (!add_dynamic_entry (DT_AARCH64_BTI_PLT, 0)
10675 || !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0)))
10676 return FALSE;
10677
10678 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_BTI)
10679 && !add_dynamic_entry (DT_AARCH64_BTI_PLT, 0))
10680 return FALSE;
10681
10682 else if ((elf_aarch64_tdata (output_bfd)->plt_type == PLT_PAC)
10683 && !add_dynamic_entry (DT_AARCH64_PAC_PLT, 0))
37c18eed 10684 return FALSE;
a06ea964 10685 }
a06ea964
NC		 10686 }
10687#undef add_dynamic_entry
10688
10689 return TRUE;
a06ea964
NC		 10690}
10691
10692static inline void
caed7120
YZ		 10693elf_aarch64_update_plt_entry (bfd *output_bfd,
10694 bfd_reloc_code_real_type r_type,
10695 bfd_byte *plt_entry, bfd_vma value)
a06ea964 10696{
caed7120
YZ		 10697 reloc_howto_type *howto = elfNN_aarch64_howto_from_bfd_reloc (r_type);
10698
1d75a8e2
NC		 10699 /* FIXME: We should check the return value from this function call. */
10700 (void) _bfd_aarch64_elf_put_addend (output_bfd, plt_entry, r_type, howto, value);
a06ea964
NC		 10701}
10702
e19e9199
SP		 10703static void
10704aarch64_update_c64_plt_entry (bfd *output_bfd, bfd_byte *plt_entry,
10705 bfd_vma plt_base, bfd_vma plt_got_ent)
10706{
10707 /* Fill in the top 20 bits for this: ADRP c16, PLT_GOT + n * 16.
10708 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0xfffff */
10709 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_MORELLO_ADR_HI20_PCREL,
10710 plt_entry,
10711 PG (plt_got_ent) - PG (plt_base));
10712
10713 elf_aarch64_update_plt_entry (output_bfd,
10714 BFD_RELOC_AARCH64_LDST128_LO12,
10715 plt_entry + 4,
10716 PG_OFFSET (plt_got_ent));
10717
10718 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
10719 plt_entry + 8,
10720 PG_OFFSET (plt_got_ent));
10721}
10722
a06ea964 10723static void
cec5225b
YZ		 10724elfNN_aarch64_create_small_pltn_entry (struct elf_link_hash_entry *h,
10725 struct elf_aarch64_link_hash_table
1419bbe5
WN		 10726 *htab, bfd *output_bfd,
10727 struct bfd_link_info *info)
a06ea964
NC		 10728{
10729 bfd_byte *plt_entry;
10730 bfd_vma plt_index;
10731 bfd_vma got_offset;
10732 bfd_vma gotplt_entry_address;
10733 bfd_vma plt_entry_address;
10734 Elf_Internal_Rela rela;
10735 bfd_byte *loc;
1419bbe5
WN		 10736 asection *plt, *gotplt, *relplt;
10737
10738 /* When building a static executable, use .iplt, .igot.plt and
10739 .rela.iplt sections for STT_GNU_IFUNC symbols. */
10740 if (htab->root.splt != NULL)
10741 {
10742 plt = htab->root.splt;
10743 gotplt = htab->root.sgotplt;
10744 relplt = htab->root.srelplt;
10745 }
10746 else
10747 {
10748 plt = htab->root.iplt;
10749 gotplt = htab->root.igotplt;
10750 relplt = htab->root.irelplt;
10751 }
10752
10753 /* Get the index in the procedure linkage table which
10754 corresponds to this symbol. This is the index of this symbol
10755 in all the symbols for which we are making plt entries. The
10756 first entry in the procedure linkage table is reserved.
a06ea964 10757
1419bbe5
WN		 10758 Get the offset into the .got table of the entry that
10759 corresponds to this function. Each .got entry is GOT_ENTRY_SIZE
10760 bytes. The first three are reserved for the dynamic linker.
692e2b8b 10761
1419bbe5
WN		 10762 For static executables, we don't reserve anything. */
10763
10764 if (plt == htab->root.splt)
10765 {
10766 plt_index = (h->plt.offset - htab->plt_header_size) / htab->plt_entry_size;
a1bdea65 10767 got_offset = (plt_index + 3) * GOT_ENTRY_SIZE (htab);
1419bbe5
WN		 10768 }
10769 else
10770 {
10771 plt_index = h->plt.offset / htab->plt_entry_size;
a1bdea65 10772 got_offset = plt_index * GOT_ENTRY_SIZE (htab);
1419bbe5
WN		 10773 }
10774
10775 plt_entry = plt->contents + h->plt.offset;
10776 plt_entry_address = plt->output_section->vma
f44a1f8e 10777 + plt->output_offset + h->plt.offset;
1419bbe5
WN		 10778 gotplt_entry_address = gotplt->output_section->vma +
10779 gotplt->output_offset + got_offset;
a06ea964
NC		 10780
10781 /* Copy in the boiler-plate for the PLTn entry. */
37c18eed
SD		 10782 memcpy (plt_entry, htab->plt_entry, htab->plt_entry_size);
10783
e19e9199
SP		 10784 if (htab->c64_rel)
10785 aarch64_update_c64_plt_entry (output_bfd, plt_entry, plt_entry_address,
10786 gotplt_entry_address);
10787 else
10788 {
a06ea964 10789
e19e9199
SP		 10790 /* First instruction in BTI enabled PLT stub is a BTI
10791 instruction so skip it. */
10792 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI
10793 && elf_elfheader (output_bfd)->e_type == ET_EXEC)
10794 plt_entry = plt_entry + 4;
a06ea964 10795
e19e9199
SP		 10796 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
10797 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
10798 elf_aarch64_update_plt_entry (output_bfd,
10799 BFD_RELOC_AARCH64_ADR_HI21_PCREL,
10800 plt_entry,
10801 PG (gotplt_entry_address) -
10802 PG (plt_entry_address));
a06ea964 10803
e19e9199
SP		 10804 /* Fill in the lo12 bits for the load from the pltgot. */
10805 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
10806 plt_entry + 4,
10807 PG_OFFSET (gotplt_entry_address));
a06ea964 10808
e19e9199
SP		 10809 /* Fill in the lo12 bits for the add from the pltgot entry. */
10810 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
10811 plt_entry + 8,
10812 PG_OFFSET (gotplt_entry_address));
10813 }
10814
10815 /* All the GOTPLT Entries are essentially initialized to PLT0. Set LSB if
10816 the PLT is C64. */
10817 bfd_vma plt0 = ((plt->output_section->vma + plt->output_offset)
10818 | htab->c64_rel);
10819 bfd_put_NN (output_bfd, plt0, gotplt->contents + got_offset);
a06ea964 10820
a06ea964 10821 rela.r_offset = gotplt_entry_address;
1419bbe5
WN		 10822
10823 if (h->dynindx == -1
0e1862bb 10824 || ((bfd_link_executable (info)
1419bbe5
WN		 10825 || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
10826 && h->def_regular
10827 && h->type == STT_GNU_IFUNC))
10828 {
10829 /* If an STT_GNU_IFUNC symbol is locally defined, generate
10830 R_AARCH64_IRELATIVE instead of R_AARCH64_JUMP_SLOT. */
e19e9199
SP		 10831 rela.r_info = (elf_aarch64_hash_entry (h)->got_type == GOT_CAP
10832 ? ELFNN_R_INFO (0, MORELLO_R (IRELATIVE))
10833 : ELFNN_R_INFO (0, AARCH64_R (IRELATIVE)));
1419bbe5
WN		 10834 rela.r_addend = (h->root.u.def.value
10835 + h->root.u.def.section->output_section->vma
10836 + h->root.u.def.section->output_offset);
10837 }
10838 else
10839 {
10840 /* Fill in the entry in the .rela.plt section. */
e19e9199
SP		 10841 rela.r_info = (elf_aarch64_hash_entry (h)->got_type == GOT_CAP
10842 ? ELFNN_R_INFO (h->dynindx, MORELLO_R (JUMP_SLOT))
10843 : ELFNN_R_INFO (h->dynindx, AARCH64_R (JUMP_SLOT)));
1419bbe5
WN		 10844 rela.r_addend = 0;
10845 }
a06ea964
NC		 10846
10847 /* Compute the relocation entry to used based on PLT index and do
10848 not adjust reloc_count. The reloc_count has already been adjusted
10849 to account for this entry. */
1419bbe5 10850 loc = relplt->contents + plt_index * RELOC_SIZE (htab);
cec5225b 10851 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC		 10852}
10853
10854/* Size sections even though they're not dynamic. We use it to setup
10855 _TLS_MODULE_BASE_, if needed. */
10856
10857static bfd_boolean
cec5225b 10858elfNN_aarch64_always_size_sections (bfd *output_bfd,
a06ea964
NC		 10859 struct bfd_link_info *info)
10860{
10861 asection *tls_sec;
10862
0e1862bb 10863 if (bfd_link_relocatable (info))
a06ea964
NC		 10864 return TRUE;
10865
10866 tls_sec = elf_hash_table (info)->tls_sec;
10867
10868 if (tls_sec)
10869 {
10870 struct elf_link_hash_entry *tlsbase;
10871
10872 tlsbase = elf_link_hash_lookup (elf_hash_table (info),
10873 "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
10874
10875 if (tlsbase)
10876 {
10877 struct bfd_link_hash_entry *h = NULL;
10878 const struct elf_backend_data *bed =
10879 get_elf_backend_data (output_bfd);
10880
10881 if (!(_bfd_generic_link_add_one_symbol
10882 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
10883 tls_sec, 0, NULL, FALSE, bed->collect, &h)))
10884 return FALSE;
10885
10886 tlsbase->type = STT_TLS;
10887 tlsbase = (struct elf_link_hash_entry *) h;
10888 tlsbase->def_regular = 1;
10889 tlsbase->other = STV_HIDDEN;
10890 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
10891 }
10892 }
10893
10894 return TRUE;
10895}
10896
10897/* Finish up dynamic symbol handling. We set the contents of various
10898 dynamic sections here. */
2d0ca824 10899
a06ea964 10900static bfd_boolean
cec5225b 10901elfNN_aarch64_finish_dynamic_symbol (bfd *output_bfd,
a06ea964
NC		 10902 struct bfd_link_info *info,
10903 struct elf_link_hash_entry *h,
10904 Elf_Internal_Sym *sym)
10905{
cec5225b
YZ		 10906 struct elf_aarch64_link_hash_table *htab;
10907 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 10908
10909 if (h->plt.offset != (bfd_vma) - 1)
10910 {
1419bbe5
WN		 10911 asection *plt, *gotplt, *relplt;
10912
a06ea964 10913 /* This symbol has an entry in the procedure linkage table. Set
07d6d2b8 10914 it up. */
a06ea964 10915
1419bbe5
WN		 10916 /* When building a static executable, use .iplt, .igot.plt and
10917 .rela.iplt sections for STT_GNU_IFUNC symbols. */
10918 if (htab->root.splt != NULL)
10919 {
10920 plt = htab->root.splt;
10921 gotplt = htab->root.sgotplt;
10922 relplt = htab->root.srelplt;
10923 }
10924 else
10925 {
10926 plt = htab->root.iplt;
10927 gotplt = htab->root.igotplt;
10928 relplt = htab->root.irelplt;
10929 }
10930
10931 /* This symbol has an entry in the procedure linkage table. Set
10932 it up. */
10933 if ((h->dynindx == -1
0e1862bb 10934 && !((h->forced_local || bfd_link_executable (info))
1419bbe5
WN		 10935 && h->def_regular
10936 && h->type == STT_GNU_IFUNC))
10937 || plt == NULL
10938 || gotplt == NULL
10939 || relplt == NULL)
f955cccf 10940 return FALSE;
a06ea964 10941
1419bbe5 10942 elfNN_aarch64_create_small_pltn_entry (h, htab, output_bfd, info);
a06ea964
NC		 10943 if (!h->def_regular)
10944 {
10945 /* Mark the symbol as undefined, rather than as defined in
46b87d49 10946 the .plt section. */
a06ea964 10947 sym->st_shndx = SHN_UNDEF;
46b87d49
WN		 10948 /* If the symbol is weak we need to clear the value.
10949 Otherwise, the PLT entry would provide a definition for
10950 the symbol even if the symbol wasn't defined anywhere,
10951 and so the symbol would never be NULL. Leave the value if
10952 there were any relocations where pointer equality matters
10953 (this is a clue for the dynamic linker, to make function
10954 pointer comparisons work between an application and shared
10955 library). */
10956 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
10957 sym->st_value = 0;
a06ea964
NC		 10958 }
10959 }
10960
a1bdea65
SP		 10961 bfd_boolean is_c64 = elf_aarch64_hash_entry (h)->got_type == GOT_CAP;
10962
a06ea964 10963 if (h->got.offset != (bfd_vma) - 1
a1bdea65
SP		 10964 && (elf_aarch64_hash_entry (h)->got_type == GOT_NORMAL
10965 || elf_aarch64_hash_entry (h)->got_type == GOT_CAP)
a377ae2a
SN		 10966 /* Undefined weak symbol in static PIE resolves to 0 without
10967 any dynamic relocations. */
10968 && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
a06ea964
NC		 10969 {
10970 Elf_Internal_Rela rela;
10971 bfd_byte *loc;
10972
10973 /* This symbol has an entry in the global offset table. Set it
07d6d2b8 10974 up. */
a06ea964
NC		 10975 if (htab->root.sgot == NULL || htab->root.srelgot == NULL)
10976 abort ();
10977
10978 rela.r_offset = (htab->root.sgot->output_section->vma
10979 + htab->root.sgot->output_offset
10980 + (h->got.offset & ~(bfd_vma) 1));
10981
49206388
WN		 10982 if (h->def_regular
10983 && h->type == STT_GNU_IFUNC)
10984 {
0e1862bb 10985 if (bfd_link_pic (info))
49206388
WN		 10986 {
10987 /* Generate R_AARCH64_GLOB_DAT. */
10988 goto do_glob_dat;
10989 }
10990 else
10991 {
10992 asection *plt;
10993
10994 if (!h->pointer_equality_needed)
10995 abort ();
10996
10997 /* For non-shared object, we can't use .got.plt, which
10998 contains the real function address if we need pointer
10999 equality. We load the GOT entry with the PLT entry. */
11000 plt = htab->root.splt ? htab->root.splt : htab->root.iplt;
11001 bfd_put_NN (output_bfd, (plt->output_section->vma
11002 + plt->output_offset
11003 + h->plt.offset),
11004 htab->root.sgot->contents
11005 + (h->got.offset & ~(bfd_vma) 1));
11006 return TRUE;
11007 }
11008 }
0e1862bb 11009 else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h))
a06ea964 11010 {
0ee3a6db 11011 if (!(h->def_regular || ELF_COMMON_DEF_P (h)))
a06ea964
NC		 11012 return FALSE;
11013
11014 BFD_ASSERT ((h->got.offset & 1) != 0);
a1bdea65
SP		 11015 if (is_c64)
11016 {
11017 rela.r_info = ELFNN_R_INFO (0, MORELLO_R (RELATIVE));
11018 rela.r_addend = 0;
11019 }
11020 else
11021 {
11022 rela.r_info = ELFNN_R_INFO (0, AARCH64_R (RELATIVE));
11023 rela.r_addend = (h->root.u.def.value
11024 + h->root.u.def.section->output_section->vma
11025 + h->root.u.def.section->output_offset);
11026 }
a06ea964
NC		 11027 }
11028 else
11029 {
dc1e8a47 11030 do_glob_dat:
a06ea964 11031 BFD_ASSERT ((h->got.offset & 1) == 0);
cec5225b 11032 bfd_put_NN (output_bfd, (bfd_vma) 0,
a06ea964 11033 htab->root.sgot->contents + h->got.offset);
a1bdea65
SP		 11034 rela.r_info = ELFNN_R_INFO (h->dynindx,
11035 (is_c64 ? MORELLO_R (GLOB_DAT)
11036 : AARCH64_R (GLOB_DAT)));
a06ea964
NC		 11037 rela.r_addend = 0;
11038 }
11039
11040 loc = htab->root.srelgot->contents;
11041 loc += htab->root.srelgot->reloc_count++ * RELOC_SIZE (htab);
cec5225b 11042 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC		 11043 }
11044
11045 if (h->needs_copy)
11046 {
11047 Elf_Internal_Rela rela;
5474d94f 11048 asection *s;
a06ea964
NC		 11049 bfd_byte *loc;
11050
11051 /* This symbol needs a copy reloc. Set it up. */
a06ea964
NC		 11052 if (h->dynindx == -1
11053 || (h->root.type != bfd_link_hash_defined
11054 && h->root.type != bfd_link_hash_defweak)
9d19e4fd 11055 || htab->root.srelbss == NULL)
a06ea964
NC		 11056 abort ();
11057
11058 rela.r_offset = (h->root.u.def.value
11059 + h->root.u.def.section->output_section->vma
11060 + h->root.u.def.section->output_offset);
a6bb11b2 11061 rela.r_info = ELFNN_R_INFO (h->dynindx, AARCH64_R (COPY));
a06ea964 11062 rela.r_addend = 0;
afbf7e8e 11063 if (h->root.u.def.section == htab->root.sdynrelro)
5474d94f
AM		 11064 s = htab->root.sreldynrelro;
11065 else
11066 s = htab->root.srelbss;
11067 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
cec5225b 11068 bfd_elfNN_swap_reloca_out (output_bfd, &rela, loc);
a06ea964
NC		 11069 }
11070
11071 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. SYM may
11072 be NULL for local symbols. */
11073 if (sym != NULL
9637f6ef 11074 && (h == elf_hash_table (info)->hdynamic
a06ea964
NC		 11075 || h == elf_hash_table (info)->hgot))
11076 sym->st_shndx = SHN_ABS;
11077
11078 return TRUE;
11079}
11080
1419bbe5
WN		 11081/* Finish up local dynamic symbol handling. We set the contents of
11082 various dynamic sections here. */
11083
11084static bfd_boolean
11085elfNN_aarch64_finish_local_dynamic_symbol (void **slot, void *inf)
11086{
11087 struct elf_link_hash_entry *h
11088 = (struct elf_link_hash_entry *) *slot;
11089 struct bfd_link_info *info
11090 = (struct bfd_link_info *) inf;
11091
11092 return elfNN_aarch64_finish_dynamic_symbol (info->output_bfd,
11093 info, h, NULL);
11094}
11095
a06ea964 11096static void
cec5225b
YZ		 11097elfNN_aarch64_init_small_plt0_entry (bfd *output_bfd ATTRIBUTE_UNUSED,
11098 struct elf_aarch64_link_hash_table
a06ea964
NC		 11099 *htab)
11100{
11101 /* Fill in PLT0. Fixme:RR Note this doesn't distinguish between
11102 small and large plts and at the minute just generates
11103 the small PLT. */
11104
cec5225b 11105 /* PLT0 of the small PLT looks like this in ELF64 -
a06ea964
NC		 11106 stp x16, x30, [sp, #-16]! // Save the reloc and lr on stack.
11107 adrp x16, PLT_GOT + 16 // Get the page base of the GOTPLT
11108 ldr x17, [x16, #:lo12:PLT_GOT+16] // Load the address of the
11109 // symbol resolver
11110 add x16, x16, #:lo12:PLT_GOT+16 // Load the lo12 bits of the
11111 // GOTPLT entry for this.
11112 br x17
cec5225b 11113 PLT0 will be slightly different in ELF32 due to different got entry
2d0ca824 11114 size. */
caed7120 11115 bfd_vma plt_got_2nd_ent; /* Address of GOT[2]. */
a06ea964
NC		 11116 bfd_vma plt_base;
11117
11118
37c18eed
SD		 11119 memcpy (htab->root.splt->contents, htab->plt0_entry,
11120 htab->plt_header_size);
4d3bb356
SN		 11121
11122 /* PR 26312: Explicitly set the sh_entsize to 0 so that
11123 consumers do not think that the section contains fixed
11124 sized objects. */
11125 elf_section_data (htab->root.splt->output_section)->this_hdr.sh_entsize = 0;
a06ea964 11126
caed7120
YZ		 11127 plt_got_2nd_ent = (htab->root.sgotplt->output_section->vma
11128 + htab->root.sgotplt->output_offset
a1bdea65 11129 + GOT_ENTRY_SIZE (htab) * 2);
a06ea964
NC		 11130
11131 plt_base = htab->root.splt->output_section->vma +
f44a1f8e 11132 htab->root.splt->output_offset;
a06ea964 11133
e19e9199
SP		 11134 bfd_byte *plt0_entry = htab->root.splt->contents;
11135
11136 if (htab->c64_rel)
11137 {
11138 aarch64_update_c64_plt_entry (output_bfd, plt0_entry + 4,
11139 plt_base + 4, plt_got_2nd_ent);
11140 return;
11141 }
11142
37c18eed
SD		 11143 /* First instruction in BTI enabled PLT stub is a BTI
11144 instruction so skip it. */
37c18eed
SD		 11145 if (elf_aarch64_tdata (output_bfd)->plt_type & PLT_BTI)
11146 plt0_entry = plt0_entry + 4;
11147
a06ea964
NC		 11148 /* Fill in the top 21 bits for this: ADRP x16, PLT_GOT + n * 8.
11149 ADRP: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
caed7120 11150 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADR_HI21_PCREL,
37c18eed 11151 plt0_entry + 4,
caed7120 11152 PG (plt_got_2nd_ent) - PG (plt_base + 4));
a06ea964 11153
caed7120 11154 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_LDSTNN_LO12,
37c18eed 11155 plt0_entry + 8,
caed7120 11156 PG_OFFSET (plt_got_2nd_ent));
a06ea964 11157
caed7120 11158 elf_aarch64_update_plt_entry (output_bfd, BFD_RELOC_AARCH64_ADD_LO12,
37c18eed 11159 plt0_entry + 12,
caed7120 11160 PG_OFFSET (plt_got_2nd_ent));
a06ea964
NC		 11161}
11162
11163static bfd_boolean
cec5225b 11164elfNN_aarch64_finish_dynamic_sections (bfd *output_bfd,
a06ea964
NC		 11165 struct bfd_link_info *info)
11166{
cec5225b 11167 struct elf_aarch64_link_hash_table *htab;
a06ea964
NC		 11168 bfd *dynobj;
11169 asection *sdyn;
11170
cec5225b 11171 htab = elf_aarch64_hash_table (info);
a06ea964
NC		 11172 dynobj = htab->root.dynobj;
11173 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
11174
11175 if (htab->root.dynamic_sections_created)
11176 {
cec5225b 11177 ElfNN_External_Dyn *dyncon, *dynconend;
a06ea964
NC		 11178
11179 if (sdyn == NULL || htab->root.sgot == NULL)
11180 abort ();
11181
cec5225b
YZ		 11182 dyncon = (ElfNN_External_Dyn *) sdyn->contents;
11183 dynconend = (ElfNN_External_Dyn *) (sdyn->contents + sdyn->size);
a06ea964
NC		 11184 for (; dyncon < dynconend; dyncon++)
11185 {
11186 Elf_Internal_Dyn dyn;
11187 asection *s;
11188
cec5225b 11189 bfd_elfNN_swap_dyn_in (dynobj, dyncon, &dyn);
a06ea964
NC		 11190
11191 switch (dyn.d_tag)
11192 {
11193 default:
11194 continue;
11195
11196 case DT_PLTGOT:
11197 s = htab->root.sgotplt;
11198 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
11199 break;
11200
11201 case DT_JMPREL:
4ade44b7
AM		 11202 s = htab->root.srelplt;
11203 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
a06ea964
NC		 11204 break;
11205
11206 case DT_PLTRELSZ:
c955de36 11207 s = htab->root.srelplt;
a06ea964
NC		 11208 dyn.d_un.d_val = s->size;
11209 break;
11210
a06ea964
NC		 11211 case DT_TLSDESC_PLT:
11212 s = htab->root.splt;
11213 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 11214 + htab->root.tlsdesc_plt;
a06ea964
NC		 11215 break;
11216
11217 case DT_TLSDESC_GOT:
11218 s = htab->root.sgot;
9bcc30e4 11219 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
a06ea964 11220 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset
9bcc30e4 11221 + htab->root.tlsdesc_got;
a06ea964
NC		 11222 break;
11223 }
11224
cec5225b 11225 bfd_elfNN_swap_dyn_out (output_bfd, &dyn, dyncon);
a06ea964
NC		 11226 }
11227
11228 }
11229
11230 /* Fill in the special first entry in the procedure linkage table. */
11231 if (htab->root.splt && htab->root.splt->size > 0)
11232 {
cec5225b 11233 elfNN_aarch64_init_small_plt0_entry (output_bfd, htab);
a06ea964 11234
9bcc30e4 11235 if (htab->root.tlsdesc_plt && !(info->flags & DF_BIND_NOW))
a06ea964 11236 {
9bcc30e4 11237 BFD_ASSERT (htab->root.tlsdesc_got != (bfd_vma)-1);
cec5225b 11238 bfd_put_NN (output_bfd, (bfd_vma) 0,
9bcc30e4 11239 htab->root.sgot->contents + htab->root.tlsdesc_got);
a06ea964 11240
37c18eed
SD		 11241 const bfd_byte *entry = elfNN_aarch64_tlsdesc_small_plt_entry;
11242 htab->tlsdesc_plt_entry_size = PLT_TLSDESC_ENTRY_SIZE;
11243
4ca9b406
SP		 11244 unsigned adrp_rtype = BFD_RELOC_AARCH64_ADR_HI21_PCREL;
11245 unsigned ldr_rtype = BFD_RELOC_AARCH64_LDSTNN_LO12;
11246
37c18eed 11247 aarch64_plt_type type = elf_aarch64_tdata (output_bfd)->plt_type;
4ca9b406
SP		 11248 if (htab->c64_rel)
11249 {
11250 entry = elfNN_aarch64_tlsdesc_small_plt_c64_entry;
11251 adrp_rtype = BFD_RELOC_MORELLO_ADR_HI20_PCREL;
11252 ldr_rtype = BFD_RELOC_AARCH64_LDST128_LO12;
11253 }
11254 else if (type == PLT_BTI || type == PLT_BTI_PAC)
37c18eed
SD		 11255 {
11256 entry = elfNN_aarch64_tlsdesc_small_plt_bti_entry;
37c18eed
SD		 11257 }
11258
9bcc30e4 11259 memcpy (htab->root.splt->contents + htab->root.tlsdesc_plt,
37c18eed 11260 entry, htab->tlsdesc_plt_entry_size);
a06ea964
NC		 11261
11262 {
11263 bfd_vma adrp1_addr =
11264 htab->root.splt->output_section->vma
9bcc30e4
L		 11265 + htab->root.splt->output_offset
11266 + htab->root.tlsdesc_plt + 4;
a06ea964 11267
caed7120 11268 bfd_vma adrp2_addr = adrp1_addr + 4;
a06ea964
NC		 11269
11270 bfd_vma got_addr =
11271 htab->root.sgot->output_section->vma
11272 + htab->root.sgot->output_offset;
11273
11274 bfd_vma pltgot_addr =
11275 htab->root.sgotplt->output_section->vma
11276 + htab->root.sgotplt->output_offset;
11277
9bcc30e4 11278 bfd_vma dt_tlsdesc_got = got_addr + htab->root.tlsdesc_got;
caed7120
YZ		 11279
11280 bfd_byte *plt_entry =
9bcc30e4 11281 htab->root.splt->contents + htab->root.tlsdesc_plt;
a06ea964 11282
37c18eed
SD		 11283 /* First instruction in BTI enabled PLT stub is a BTI
11284 instruction so skip it. */
11285 if (type & PLT_BTI)
11286 {
11287 plt_entry = plt_entry + 4;
11288 adrp1_addr = adrp1_addr + 4;
11289 adrp2_addr = adrp2_addr + 4;
11290 }
11291
a06ea964 11292 /* adrp x2, DT_TLSDESC_GOT */
caed7120 11293 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11294 adrp_rtype,
caed7120
YZ		 11295 plt_entry + 4,
11296 (PG (dt_tlsdesc_got)
11297 - PG (adrp1_addr)));
a06ea964
NC		 11298
11299 /* adrp x3, 0 */
caed7120 11300 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11301 adrp_rtype,
caed7120
YZ		 11302 plt_entry + 8,
11303 (PG (pltgot_addr)
11304 - PG (adrp2_addr)));
a06ea964
NC		 11305
11306 /* ldr x2, [x2, #0] */
caed7120 11307 elf_aarch64_update_plt_entry (output_bfd,
4ca9b406 11308 ldr_rtype,
caed7120
YZ		 11309 plt_entry + 12,
11310 PG_OFFSET (dt_tlsdesc_got));
a06ea964
NC		 11311
11312 /* add x3, x3, 0 */
caed7120
YZ		 11313 elf_aarch64_update_plt_entry (output_bfd,
11314 BFD_RELOC_AARCH64_ADD_LO12,
11315 plt_entry + 16,
11316 PG_OFFSET (pltgot_addr));
a06ea964
NC		 11317 }
11318 }
11319 }
11320
11321 if (htab->root.sgotplt)
11322 {
11323 if (bfd_is_abs_section (htab->root.sgotplt->output_section))
11324 {
4eca0228 11325 _bfd_error_handler
871b3ab2 11326 (_("discarded output section: `%pA'"), htab->root.sgotplt);
a06ea964
NC		 11327 return FALSE;
11328 }
11329
11330 /* Fill in the first three entries in the global offset table. */
11331 if (htab->root.sgotplt->size > 0)
11332 {
8db339a6
MS		 11333 bfd_put_NN (output_bfd, (bfd_vma) 0, htab->root.sgotplt->contents);
11334
a06ea964 11335 /* Write GOT[1] and GOT[2], needed for the dynamic linker. */
cec5225b 11336 bfd_put_NN (output_bfd,
a06ea964 11337 (bfd_vma) 0,
a1bdea65 11338 htab->root.sgotplt->contents + GOT_ENTRY_SIZE (htab));
cec5225b 11339 bfd_put_NN (output_bfd,
a06ea964 11340 (bfd_vma) 0,
a1bdea65
SP		 11341 (htab->root.sgotplt->contents
11342 + GOT_ENTRY_SIZE (htab) * 2));
a06ea964
NC		 11343 }
11344
8db339a6
MS		 11345 if (htab->root.sgot)
11346 {
11347 if (htab->root.sgot->size > 0)
11348 {
11349 bfd_vma addr =
11350 sdyn ? sdyn->output_section->vma + sdyn->output_offset : 0;
11351 bfd_put_NN (output_bfd, addr, htab->root.sgot->contents);
11352 }
11353 }
11354
a06ea964 11355 elf_section_data (htab->root.sgotplt->output_section)->
a1bdea65 11356 this_hdr.sh_entsize = GOT_ENTRY_SIZE (htab);
a06ea964
NC		 11357 }
11358
11359 if (htab->root.sgot && htab->root.sgot->size > 0)
11360 elf_section_data (htab->root.sgot->output_section)->this_hdr.sh_entsize
a1bdea65 11361 = GOT_ENTRY_SIZE (htab);
a06ea964 11362
1419bbe5
WN		 11363 /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
11364 htab_traverse (htab->loc_hash_table,
11365 elfNN_aarch64_finish_local_dynamic_symbol,
11366 info);
11367
a06ea964
NC		 11368 return TRUE;
11369}
11370
37c18eed
SD		 11371/* Check if BTI enabled PLTs are needed. Returns the type needed. */
11372static aarch64_plt_type
11373get_plt_type (bfd *abfd)
11374{
11375 aarch64_plt_type ret = PLT_NORMAL;
11376 bfd_byte *contents, *extdyn, *extdynend;
11377 asection *sec = bfd_get_section_by_name (abfd, ".dynamic");
11378 if (!sec || !bfd_malloc_and_get_section (abfd, sec, &contents))
11379 return ret;
11380 extdyn = contents;
11381 extdynend = contents + sec->size;
11382 for (; extdyn < extdynend; extdyn += sizeof (ElfNN_External_Dyn))
11383 {
11384 Elf_Internal_Dyn dyn;
11385 bfd_elfNN_swap_dyn_in (abfd, extdyn, &dyn);
11386
11387 /* Let's check the processor specific dynamic array tags. */
11388 bfd_vma tag = dyn.d_tag;
11389 if (tag < DT_LOPROC || tag > DT_HIPROC)
11390 continue;
11391
11392 switch (tag)
11393 {
11394 case DT_AARCH64_BTI_PLT:
1dbade74
SD		 11395 ret |= PLT_BTI;
11396 break;
11397
11398 case DT_AARCH64_PAC_PLT:
11399 ret |= PLT_PAC;
37c18eed
SD		 11400 break;
11401
11402 default: break;
11403 }
11404 }
11405 free (contents);
11406 return ret;
11407}
11408
11409static long
11410elfNN_aarch64_get_synthetic_symtab (bfd *abfd,
11411 long symcount,
11412 asymbol **syms,
11413 long dynsymcount,
11414 asymbol **dynsyms,
11415 asymbol **ret)
11416{
11417 elf_aarch64_tdata (abfd)->plt_type = get_plt_type (abfd);
11418 return _bfd_elf_get_synthetic_symtab (abfd, symcount, syms,
11419 dynsymcount, dynsyms, ret);
11420}
11421
a06ea964
NC		 11422/* Return address for Ith PLT stub in section PLT, for relocation REL
11423 or (bfd_vma) -1 if it should not be included. */
11424
11425static bfd_vma
cec5225b 11426elfNN_aarch64_plt_sym_val (bfd_vma i, const asection *plt,
a06ea964
NC		 11427 const arelent *rel ATTRIBUTE_UNUSED)
11428{
37c18eed
SD		 11429 size_t plt0_size = PLT_ENTRY_SIZE;
11430 size_t pltn_size = PLT_SMALL_ENTRY_SIZE;
11431
1dbade74
SD		 11432 if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI_PAC)
11433 {
1dbade74
SD		 11434 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
11435 pltn_size = PLT_BTI_PAC_SMALL_ENTRY_SIZE;
11436 else
11437 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
11438 }
11439 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_BTI)
37c18eed 11440 {
37c18eed
SD		 11441 if (elf_elfheader (plt->owner)->e_type == ET_EXEC)
11442 pltn_size = PLT_BTI_SMALL_ENTRY_SIZE;
11443 }
1dbade74
SD		 11444 else if (elf_aarch64_tdata (plt->owner)->plt_type == PLT_PAC)
11445 {
1dbade74
SD		 11446 pltn_size = PLT_PAC_SMALL_ENTRY_SIZE;
11447 }
11448
37c18eed 11449 return plt->vma + plt0_size + i * pltn_size;
a06ea964
NC		 11450}
11451
d691934d
NC		 11452/* Returns TRUE if NAME is an AArch64 mapping symbol.
11453 The ARM ELF standard defines $x (for A64 code) and $d (for data).
11454 It also allows a period initiated suffix to be added to the symbol, ie:
11455 "$[adtx]\.[:sym_char]+". */
11456
11457static bfd_boolean
11458is_aarch64_mapping_symbol (const char * name)
11459{
11460 return name != NULL /* Paranoia. */
11461 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
11462 the mapping symbols could have acquired a prefix.
11463 We do not support this here, since such symbols no
11464 longer conform to the ARM ELF ABI. */
3979cf50 11465 && (name[1] == 'd' || name[1] == 'x' || name[1] == 'c')
d691934d
NC		 11466 && (name[2] == 0 || name[2] == '.');
11467 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
11468 any characters that follow the period are legal characters for the body
11469 of a symbol's name. For now we just assume that this is the case. */
11470}
11471
11472/* Make sure that mapping symbols in object files are not removed via the
11473 "strip --strip-unneeded" tool. These symbols might needed in order to
11474 correctly generate linked files. Once an object file has been linked,
11475 it should be safe to remove them. */
11476
11477static void
11478elfNN_aarch64_backend_symbol_processing (bfd *abfd, asymbol *sym)
11479{
11480 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
11481 && sym->section != bfd_abs_section_ptr
11482 && is_aarch64_mapping_symbol (sym->name))
11483 sym->flags |= BSF_KEEP;
11484}
11485
cd702818
SD		 11486/* Implement elf_backend_setup_gnu_properties for AArch64. It serves as a
11487 wrapper function for _bfd_aarch64_elf_link_setup_gnu_properties to account
11488 for the effect of GNU properties of the output_bfd. */
11489static bfd *
11490elfNN_aarch64_link_setup_gnu_properties (struct bfd_link_info *info)
11491{
11492 uint32_t prop = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
11493 bfd *pbfd = _bfd_aarch64_elf_link_setup_gnu_properties (info, &prop);
11494 elf_aarch64_tdata (info->output_bfd)->gnu_and_prop = prop;
37c18eed
SD		 11495 elf_aarch64_tdata (info->output_bfd)->plt_type
11496 |= (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI) ? PLT_BTI : 0;
cd702818
SD		 11497 return pbfd;
11498}
11499
11500/* Implement elf_backend_merge_gnu_properties for AArch64. It serves as a
11501 wrapper function for _bfd_aarch64_elf_merge_gnu_properties to account
11502 for the effect of GNU properties of the output_bfd. */
11503static bfd_boolean
11504elfNN_aarch64_merge_gnu_properties (struct bfd_link_info *info,
4e539114 11505 bfd *abfd, bfd *bbfd,
cd702818
SD		 11506 elf_property *aprop,
11507 elf_property *bprop)
11508{
11509 uint32_t prop
11510 = elf_aarch64_tdata (info->output_bfd)->gnu_and_prop;
37c18eed
SD		 11511
11512 /* If output has been marked with BTI using command line argument, give out
11513 warning if necessary. */
4e539114
SD		 11514 /* Properties are merged per type, hence only check for warnings when merging
11515 GNU_PROPERTY_AARCH64_FEATURE_1_AND. */
11516 if (((aprop && aprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND)
11517 || (bprop && bprop->pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND))
11518 && (prop & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
37c18eed
SD		 11519 && (!elf_aarch64_tdata (info->output_bfd)->no_bti_warn))
11520 {
11521 if ((aprop && !(aprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
4e539114 11522 || !aprop)
37c18eed 11523 {
8bf6d176 11524 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD		 11525 "all inputs do not have BTI in NOTE section."),
11526 abfd);
11527 }
11528 if ((bprop && !(bprop->u.number & GNU_PROPERTY_AARCH64_FEATURE_1_BTI))
11529 || !bprop)
11530 {
8bf6d176 11531 _bfd_error_handler (_("%pB: warning: BTI turned on by -z force-bti when "
4e539114
SD		 11532 "all inputs do not have BTI in NOTE section."),
11533 bbfd);
37c18eed
SD		 11534 }
11535 }
11536
cd702818
SD		 11537 return _bfd_aarch64_elf_merge_gnu_properties (info, abfd, aprop,
11538 bprop, prop);
11539}
a06ea964 11540
8b21361b
SP		 11541/* Demangle c64 function symbols as we read them in. */
11542
11543static bfd_boolean
11544aarch64_elfNN_swap_symbol_in (bfd * abfd,
11545 const void *psrc,
11546 const void *pshn,
11547 Elf_Internal_Sym *dst)
11548{
11549 if (!bfd_elfNN_swap_symbol_in (abfd, psrc, pshn, dst))
11550 return FALSE;
11551
11552 dst->st_target_internal = 0;
11553
11554 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
11555 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
11556 {
11557 dst->st_target_internal = dst->st_value & ST_BRANCH_TO_C64;
11558 dst->st_value &= ~(bfd_vma) ST_BRANCH_TO_C64;
11559 }
11560
11561 return TRUE;
11562}
11563
11564
11565/* Mangle c64 function symbols as we write them out. */
11566
11567static void
11568aarch64_elfNN_swap_symbol_out (bfd *abfd,
11569 const Elf_Internal_Sym *src,
11570 void *cdst,
11571 void *shndx)
11572{
11573 Elf_Internal_Sym newsym = *src;
11574
11575 if ((ELF_ST_TYPE (newsym.st_info) == STT_FUNC
11576 || ELF_ST_TYPE (newsym.st_info) == STT_GNU_IFUNC)
11577 && newsym.st_shndx != SHN_UNDEF)
11578 newsym.st_value |= newsym.st_target_internal;
11579
11580 bfd_elfNN_swap_symbol_out (abfd, &newsym, cdst, shndx);
11581}
11582
a1bdea65
SP		 11583/* Define the size of a GOT element for the generic mid-end. */
11584
11585static bfd_vma
11586elfNN_aarch64_got_elt_size (bfd *abfd ATTRIBUTE_UNUSED,
11587 struct bfd_link_info *info,
11588 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED,
11589 bfd *ibfd ATTRIBUTE_UNUSED,
11590 unsigned long symndx ATTRIBUTE_UNUSED)
11591{
11592 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11593
11594 return GOT_ENTRY_SIZE (htab);
11595}
11596
f938669f
SP		 11597/* Define the size of a GOT header, which is the minimum size of the GOT section
11598 when one is needed. */
11599
11600static bfd_vma
a1bdea65 11601elfNN_aarch64_got_header_size (struct bfd_link_info *info)
f938669f 11602{
a1bdea65
SP		 11603 struct elf_aarch64_link_hash_table *htab = elf_aarch64_hash_table (info);
11604
11605 return GOT_ENTRY_SIZE (htab) * GOT_RESERVED_HEADER_SLOTS;
f938669f
SP		 11606}
11607
fa6ca5e2
SP		 11608/* Identify the 'C' in the CIE augmentation string. */
11609
11610static bfd_boolean
11611elf64_aarch64_eh_frame_augmentation_char (const char aug)
11612{
11613 return aug == 'C';
11614}
11615
a06ea964
NC		 11616/* We use this so we can override certain functions
11617 (though currently we don't). */
11618
cec5225b 11619const struct elf_size_info elfNN_aarch64_size_info =
a06ea964 11620{
cec5225b
YZ		 11621 sizeof (ElfNN_External_Ehdr),
11622 sizeof (ElfNN_External_Phdr),
11623 sizeof (ElfNN_External_Shdr),
11624 sizeof (ElfNN_External_Rel),
11625 sizeof (ElfNN_External_Rela),
11626 sizeof (ElfNN_External_Sym),
11627 sizeof (ElfNN_External_Dyn),
a06ea964
NC		 11628 sizeof (Elf_External_Note),
11629 4, /* Hash table entry size. */
11630 1, /* Internal relocs per external relocs. */
cec5225b
YZ		 11631 ARCH_SIZE, /* Arch size. */
11632 LOG_FILE_ALIGN, /* Log_file_align. */
11633 ELFCLASSNN, EV_CURRENT,
11634 bfd_elfNN_write_out_phdrs,
11635 bfd_elfNN_write_shdrs_and_ehdr,
11636 bfd_elfNN_checksum_contents,
11637 bfd_elfNN_write_relocs,
8b21361b
SP		 11638 aarch64_elfNN_swap_symbol_in,
11639 aarch64_elfNN_swap_symbol_out,
cec5225b
YZ		 11640 bfd_elfNN_slurp_reloc_table,
11641 bfd_elfNN_slurp_symbol_table,
11642 bfd_elfNN_swap_dyn_in,
11643 bfd_elfNN_swap_dyn_out,
11644 bfd_elfNN_swap_reloc_in,
11645 bfd_elfNN_swap_reloc_out,
11646 bfd_elfNN_swap_reloca_in,
11647 bfd_elfNN_swap_reloca_out
a06ea964
NC		 11648};
11649
11650#define ELF_ARCH bfd_arch_aarch64
11651#define ELF_MACHINE_CODE EM_AARCH64
11652#define ELF_MAXPAGESIZE 0x10000
11653#define ELF_MINPAGESIZE 0x1000
11654#define ELF_COMMONPAGESIZE 0x1000
11655
cec5225b
YZ		 11656#define bfd_elfNN_bfd_is_target_special_symbol \
11657 elfNN_aarch64_is_target_special_symbol
a06ea964 11658
07d6d2b8 11659#define bfd_elfNN_bfd_link_hash_table_create \
cec5225b 11660 elfNN_aarch64_link_hash_table_create
a06ea964 11661
cec5225b
YZ		 11662#define bfd_elfNN_bfd_merge_private_bfd_data \
11663 elfNN_aarch64_merge_private_bfd_data
a06ea964 11664
cec5225b
YZ		 11665#define bfd_elfNN_bfd_print_private_bfd_data \
11666 elfNN_aarch64_print_private_bfd_data
a06ea964 11667
cec5225b
YZ		 11668#define bfd_elfNN_bfd_reloc_type_lookup \
11669 elfNN_aarch64_reloc_type_lookup
a06ea964 11670
cec5225b
YZ		 11671#define bfd_elfNN_bfd_reloc_name_lookup \
11672 elfNN_aarch64_reloc_name_lookup
a06ea964 11673
cec5225b
YZ		 11674#define bfd_elfNN_bfd_set_private_flags \
11675 elfNN_aarch64_set_private_flags
a06ea964 11676
cec5225b
YZ		 11677#define bfd_elfNN_find_inliner_info \
11678 elfNN_aarch64_find_inliner_info
a06ea964 11679
37c18eed
SD		 11680#define bfd_elfNN_get_synthetic_symtab \
11681 elfNN_aarch64_get_synthetic_symtab
11682
cec5225b
YZ		 11683#define bfd_elfNN_mkobject \
11684 elfNN_aarch64_mkobject
a06ea964 11685
cec5225b
YZ		 11686#define bfd_elfNN_new_section_hook \
11687 elfNN_aarch64_new_section_hook
a06ea964
NC		 11688
11689#define elf_backend_adjust_dynamic_symbol \
cec5225b 11690 elfNN_aarch64_adjust_dynamic_symbol
a06ea964
NC		 11691
11692#define elf_backend_always_size_sections \
cec5225b 11693 elfNN_aarch64_always_size_sections
a06ea964
NC		 11694
11695#define elf_backend_check_relocs \
cec5225b 11696 elfNN_aarch64_check_relocs
a06ea964
NC		 11697
11698#define elf_backend_copy_indirect_symbol \
cec5225b 11699 elfNN_aarch64_copy_indirect_symbol
a06ea964 11700
823710d5
SN		 11701#define elf_backend_merge_symbol_attribute \
11702 elfNN_aarch64_merge_symbol_attribute
11703
a06ea964
NC		 11704/* Create .dynbss, and .rela.bss sections in DYNOBJ, and set up shortcuts
11705 to them in our hash. */
11706#define elf_backend_create_dynamic_sections \
cec5225b 11707 elfNN_aarch64_create_dynamic_sections
a06ea964
NC		 11708
11709#define elf_backend_init_index_section \
11710 _bfd_elf_init_2_index_sections
11711
a06ea964 11712#define elf_backend_finish_dynamic_sections \
cec5225b 11713 elfNN_aarch64_finish_dynamic_sections
a06ea964
NC		 11714
11715#define elf_backend_finish_dynamic_symbol \
cec5225b 11716 elfNN_aarch64_finish_dynamic_symbol
a06ea964 11717
a06ea964 11718#define elf_backend_object_p \
cec5225b 11719 elfNN_aarch64_object_p
a06ea964 11720
07d6d2b8 11721#define elf_backend_output_arch_local_syms \
cec5225b 11722 elfNN_aarch64_output_arch_local_syms
a06ea964 11723
e7679060
AM		 11724#define elf_backend_maybe_function_sym \
11725 elfNN_aarch64_maybe_function_sym
11726
a06ea964 11727#define elf_backend_plt_sym_val \
cec5225b 11728 elfNN_aarch64_plt_sym_val
a06ea964 11729
ed7e9d0b
AM		 11730#define elf_backend_init_file_header \
11731 elfNN_aarch64_init_file_header
a06ea964
NC		 11732
11733#define elf_backend_relocate_section \
cec5225b 11734 elfNN_aarch64_relocate_section
a06ea964
NC		 11735
11736#define elf_backend_reloc_type_class \
cec5225b 11737 elfNN_aarch64_reloc_type_class
a06ea964 11738
a06ea964 11739#define elf_backend_section_from_shdr \
cec5225b 11740 elfNN_aarch64_section_from_shdr
a06ea964
NC		 11741
11742#define elf_backend_size_dynamic_sections \
cec5225b 11743 elfNN_aarch64_size_dynamic_sections
a06ea964
NC		 11744
11745#define elf_backend_size_info \
cec5225b 11746 elfNN_aarch64_size_info
a06ea964 11747
68fcca92
JW		 11748#define elf_backend_write_section \
11749 elfNN_aarch64_write_section
11750
d691934d
NC		 11751#define elf_backend_symbol_processing \
11752 elfNN_aarch64_backend_symbol_processing
11753
cd702818
SD		 11754#define elf_backend_setup_gnu_properties \
11755 elfNN_aarch64_link_setup_gnu_properties
11756
11757#define elf_backend_merge_gnu_properties \
11758 elfNN_aarch64_merge_gnu_properties
11759
f938669f
SP		 11760#define elf_backend_got_header_size \
11761 elfNN_aarch64_got_header_size
11762
a1bdea65
SP		 11763#define elf_backend_got_elt_size \
11764 elfNN_aarch64_got_elt_size
11765
fa6ca5e2
SP		 11766#define elf_backend_eh_frame_augmentation_char \
11767 elf64_aarch64_eh_frame_augmentation_char
11768
a06ea964 11769#define elf_backend_can_refcount 1
59c108f7 11770#define elf_backend_can_gc_sections 1
a06ea964
NC		 11771#define elf_backend_plt_readonly 1
11772#define elf_backend_want_got_plt 1
11773#define elf_backend_want_plt_sym 0
5474d94f 11774#define elf_backend_want_dynrelro 1
a06ea964
NC		 11775#define elf_backend_may_use_rel_p 0
11776#define elf_backend_may_use_rela_p 1
11777#define elf_backend_default_use_rela_p 1
07d6d2b8 11778#define elf_backend_rela_normal 1
64f52338 11779#define elf_backend_dtrel_excludes_plt 1
c495064d 11780#define elf_backend_default_execstack 0
32f573bc 11781#define elf_backend_extern_protected_data 1
7f784814 11782#define elf_backend_hash_symbol elf_aarch64_hash_symbol
a06ea964 11783
07d6d2b8 11784#undef elf_backend_obj_attrs_section
a06ea964
NC		 11785#define elf_backend_obj_attrs_section ".ARM.attributes"
11786
cec5225b 11787#include "elfNN-target.h"
a75cf613
ES		 11788
11789/* CloudABI support. */
11790
11791#undef TARGET_LITTLE_SYM
11792#define TARGET_LITTLE_SYM aarch64_elfNN_le_cloudabi_vec
11793#undef TARGET_LITTLE_NAME
11794#define TARGET_LITTLE_NAME "elfNN-littleaarch64-cloudabi"
11795#undef TARGET_BIG_SYM
11796#define TARGET_BIG_SYM aarch64_elfNN_be_cloudabi_vec
11797#undef TARGET_BIG_NAME
11798#define TARGET_BIG_NAME "elfNN-bigaarch64-cloudabi"
11799
11800#undef ELF_OSABI
11801#define ELF_OSABI ELFOSABI_CLOUDABI
11802
11803#undef elfNN_bed
11804#define elfNN_bed elfNN_aarch64_cloudabi_bed
11805
11806#include "elfNN-target.h"
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