[thirdparty/u-boot.git] / board / BuR / common / br_resetc.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * common reset-controller functions for B&R boards
 *
 * Copyright (C) 2019 Hannes Schmelzer <oe5hpm@oevsv.at>
 * B&R Industrial Automation GmbH - http://www.br-automation.com/ *
 */
#ifndef __CONFIG_BRRESETC_H__
#define __CONFIG_BRRESETC_H__

int br_resetc_regget(u8 reg, u8 *dst);
int br_resetc_regset(u8 reg, u8 val);
int br_resetc_bmode(void);

/* reset controller register defines */
#define RSTCTRL_CTRLREG		0x01
#define RSTCTRL_SCRATCHREG0	0x04
#define RSTCTRL_ENHSTATUS	0x07
#define RSTCTRL_SCRATCHREG1	0x08
#define RSTCTRL_RSTCAUSE	0x00
#define RSTCTRL_ERSTCAUSE	0x09
#define RSTCTRL_SPECGPIO_I	0x0A
#define RSTCTRL_SPECGPIO_O	0x0B

#endif /* __CONFIG_BRRESETC_H__ */
Commit	Line	Data
f4b9f0bd HS	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	/*
	3	* common reset-controller functions for B&R boards
	4	*
	5	* Copyright (C) 2019 Hannes Schmelzer <oe5hpm@oevsv.at>
	6	* B&R Industrial Automation GmbH - http://www.br-automation.com/ *
	7	*/
	8	#ifndef __CONFIG_BRRESETC_H__
	9	#define __CONFIG_BRRESETC_H__
f4b9f0bd HS	10
	11	int br_resetc_regget(u8 reg, u8 *dst);
	12	int br_resetc_regset(u8 reg, u8 val);
	13	int br_resetc_bmode(void);
	14
	15	/* reset controller register defines */
	16	#define RSTCTRL_CTRLREG 0x01
	17	#define RSTCTRL_SCRATCHREG0 0x04
	18	#define RSTCTRL_ENHSTATUS 0x07
	19	#define RSTCTRL_SCRATCHREG1 0x08
	20	#define RSTCTRL_RSTCAUSE 0x00
	21	#define RSTCTRL_ERSTCAUSE 0x09
	22	#define RSTCTRL_SPECGPIO_I 0x0A
	23	#define RSTCTRL_SPECGPIO_O 0x0B
	24
	25	#endif /* __CONFIG_BRRESETC_H__ */