[thirdparty/u-boot.git] / board / BuR / common / common.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * common.c
 *
 * common board functions for B&R boards
 *
 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
 *
 */
#include <log.h>
#include <version.h>
#include <common.h>
#include <env.h>
#include <fdtdec.h>
#include <i2c.h>
#include <lcd.h>
#include <linux/delay.h>
#include "bur_common.h"

DECLARE_GLOBAL_DATA_PTR;

/* --------------------------------------------------------------------------*/
#if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
	!defined(CONFIG_DM_VIDEO) && !defined(CONFIG_SPL_BUILD)
#include <asm/arch/hardware.h>
#include <asm/arch/cpu.h>
#include <asm/gpio.h>
#include <power/tps65217.h>
#include "../../../drivers/video/ti/am335x-fb.h"

void lcdbacklight(int on)
{
	unsigned int driver = env_get_ulong("ds1_bright_drv", 16, 0UL);
	unsigned int bright = env_get_ulong("ds1_bright_def", 10, 50);
	unsigned int pwmfrq = env_get_ulong("ds1_pwmfreq", 10, ~0UL);
	unsigned int tmp;
	struct gptimer *timerhw;

	if (on)
		bright = bright != ~0UL ? bright : 50;
	else
		bright = 0;

	switch (driver) {
	case 2:
		timerhw = (struct gptimer *)DM_TIMER5_BASE;
		break;
	default:
		timerhw = (struct gptimer *)DM_TIMER6_BASE;
	}

	switch (driver) {
	case 0:	/* PMIC LED-Driver */
		/* brightness level */
		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
				   TPS65217_WLEDCTRL2, bright, 0xFF);
		/* current sink */
		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
				   TPS65217_WLEDCTRL1,
				   bright != 0 ? 0x0A : 0x02,
				   0xFF);
		break;
	case 1:
	case 2: /* PWM using timer */
		if (pwmfrq != ~0UL) {
			timerhw->tiocp_cfg = TCFG_RESET;
			udelay(10);
			while (timerhw->tiocp_cfg & TCFG_RESET)
				;
			tmp = ~0UL-(V_OSCK/pwmfrq);	/* bottom value */
			timerhw->tldr = tmp;
			timerhw->tcrr = tmp;
			tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
			timerhw->tmar = tmp;
			timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
					TCLR_CE | TCLR_AR | TCLR_ST);
		} else {
			puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
		}
		break;
	default:
		puts("no suitable backlightdriver in env/dtb!\n");
		break;
	}
}

int load_lcdtiming(struct am335x_lcdpanel *panel)
{
	struct am335x_lcdpanel pnltmp;

	pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL);
	pnltmp.vactive = env_get_ulong("ds1_vactive", 10, ~0UL);
	pnltmp.bpp = env_get_ulong("ds1_bpp", 10, ~0UL);
	pnltmp.hfp = env_get_ulong("ds1_hfp", 10, ~0UL);
	pnltmp.hbp = env_get_ulong("ds1_hbp", 10, ~0UL);
	pnltmp.hsw = env_get_ulong("ds1_hsw", 10, ~0UL);
	pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
	pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
	pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
	pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL);
	pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
	pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
	pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
	panel_info.vl_rot = env_get_ulong("ds1_rotation", 10, 0);

	if (
	   ~0UL == (pnltmp.hactive) ||
	   ~0UL == (pnltmp.vactive) ||
	   ~0UL == (pnltmp.bpp) ||
	   ~0UL == (pnltmp.hfp) ||
	   ~0UL == (pnltmp.hbp) ||
	   ~0UL == (pnltmp.hsw) ||
	   ~0UL == (pnltmp.vfp) ||
	   ~0UL == (pnltmp.vbp) ||
	   ~0UL == (pnltmp.vsw) ||
	   ~0UL == (pnltmp.pxl_clk) ||
	   ~0UL == (pnltmp.pol) ||
	   ~0UL == (pnltmp.pup_delay) ||
	   ~0UL == (pnltmp.pon_delay)
	   ) {
		puts("lcd-settings in env/dtb incomplete!\n");
		printf("display-timings:\n"
			"================\n"
			"hactive: %d\n"
			"vactive: %d\n"
			"bpp    : %d\n"
			"hfp    : %d\n"
			"hbp    : %d\n"
			"hsw    : %d\n"
			"vfp    : %d\n"
			"vbp    : %d\n"
			"vsw    : %d\n"
			"pxlclk : %d\n"
			"pol    : 0x%08x\n"
			"pondly : %d\n",
			pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
			pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
			pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
			pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay);

		return -1;
	}
	debug("lcd-settings in env complete, taking over.\n");
	memcpy((void *)panel,
	       (void *)&pnltmp,
	       sizeof(struct am335x_lcdpanel));

	return 0;
}

static void br_summaryscreen_printenv(char *prefix,
				       char *name, char *altname,
				       char *suffix)
{
	char *envval = env_get(name);
	if (0 != envval) {
		lcd_printf("%s %s %s", prefix, envval, suffix);
	} else if (0 != altname) {
		envval = env_get(altname);
		if (0 != envval)
			lcd_printf("%s %s %s", prefix, envval, suffix);
	} else {
		lcd_printf("\n");
	}
}

void br_summaryscreen(void)
{
	br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
	br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
	br_summaryscreen_printenv(" MAC1       :", "br_mac1", "ethaddr", "\n");
	br_summaryscreen_printenv(" MAC2       :", "br_mac2", 0, "\n");
	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
	lcd_puts("\n");
}

void lcdpower(int on)
{
	u32 pin, swval, i;
	char buf[16] = { 0 };

	pin = env_get_ulong("ds1_pwr", 16, ~0UL);

	if (pin == ~0UL) {
		puts("no pwrpin in dtb/env, cannot powerup display!\n");
		return;
	}

	for (i = 0; i < 3; i++) {
		if (pin != 0) {
			snprintf(buf, sizeof(buf), "ds1_pwr#%d", i);
			if (gpio_request(pin & 0x7F, buf) != 0) {
				printf("%s: not able to request gpio %s",
				       __func__, buf);
				continue;
			}
			swval = pin & 0x80 ? 0 : 1;
			if (on)
				gpio_direction_output(pin & 0x7F, swval);
			else
				gpio_direction_output(pin & 0x7F, !swval);

			debug("switched pin %d to %d\n", pin & 0x7F, swval);
		}
		pin >>= 8;
	}
}

vidinfo_t	panel_info = {
		.vl_col = 1366,	/*
				 * give full resolution for allocating enough
				 * memory
				 */
		.vl_row = 768,
		.vl_bpix = 5,
		.priv = 0
};

void lcd_ctrl_init(void *lcdbase)
{
	struct am335x_lcdpanel lcd_panel;

	memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
	if (load_lcdtiming(&lcd_panel) != 0)
		return;

	lcd_panel.panel_power_ctrl = &lcdpower;

	if (0 != am335xfb_init(&lcd_panel))
		printf("ERROR: failed to initialize video!");
	/*
	 * modifiy panel info to 'real' resolution, to operate correct with
	 * lcd-framework.
	 */
	panel_info.vl_col = lcd_panel.hactive;
	panel_info.vl_row = lcd_panel.vactive;

	lcd_set_flush_dcache(1);
}

void lcd_enable(void)
{
	br_summaryscreen();
	lcdbacklight(1);
}
#endif /* CONFIG_LCD */

int ft_board_setup(void *blob, struct bd_info *bd)
{
	int nodeoffset;

	nodeoffset = fdt_path_offset(blob, "/factory-settings");
	if (nodeoffset < 0) {
		printf("%s: cannot find /factory-settings, trying /fset\n",
		       __func__);
		nodeoffset = fdt_path_offset(blob, "/fset");
		if (nodeoffset < 0) {
			printf("%s: cannot find /fset.\n", __func__);
			return 0;
		}
	}

	if (fdt_setprop(blob, nodeoffset, "bl-version",
			PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
		printf("%s: no 'bl-version' prop in fdt!\n", __func__);
		return 0;
	}
	return 0;
}

int brdefaultip_setup(int bus, int chip)
{
	int rc;
	struct udevice *i2cdev;
	u8 u8buf = 0;
	char defip[256] = { 0 };

	rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev);
	if (rc != 0) {
		printf("WARN: cannot probe baseboard EEPROM!\n");
		return -1;
	}

	rc = dm_i2c_read(i2cdev, 0, &u8buf, 1);
	if (rc != 0) {
		printf("WARN: cannot read baseboard EEPROM!\n");
		return -1;
	}

	if (u8buf != 0xFF)
		snprintf(defip, sizeof(defip),
			 "if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.%d; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
			 u8buf);
	else
		strncpy(defip,
			"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
			sizeof(defip));

	env_set("brdefaultip", defip);
	env_set_hex("board_id", u8buf);

	return 0;
}

int overwrite_console(void)
{
	return 1;
}

#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX)
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <power/tps65217.h>

static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;

void pmicsetup(u32 mpupll, unsigned int bus)
{
	int mpu_vdd;
	int usb_cur_lim;

	if (power_tps65217_init(bus)) {
		printf("WARN: cannot setup PMIC 0x24 @ bus #%d, not found!.\n",
		       bus);
		return;
	}

	/* Get the frequency which is defined by device fuses */
	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);

	if (0 != mpupll) {
		dpll_mpu_opp100.m = mpupll;
		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
	} else {
		puts("ok.\n");
	}
	/*
	 * Increase USB current limit to 1300mA or 1800mA and set
	 * the MPU voltage controller as needed.
	 */
	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
	} else {
		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
	}

	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
		puts("tps65217_reg_write failure\n");

	/* Set DCDC3 (CORE) voltage to 1.125V */
	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
		puts("tps65217_voltage_update failure\n");
		return;
	}

	/* Set CORE Frequencies to OPP100 */
	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);

	/* Set DCDC2 (MPU) voltage */
	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
		puts("tps65217_voltage_update failure\n");
		return;
	}

	/* Set LDO3 to 1.8V */
	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
			       TPS65217_DEFLS1,
			       TPS65217_LDO_VOLTAGE_OUT_1_8,
			       TPS65217_LDO_MASK))
		puts("tps65217_reg_write failure\n");
	/* Set LDO4 to 3.3V */
	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
			       TPS65217_DEFLS2,
			       TPS65217_LDO_VOLTAGE_OUT_3_3,
			       TPS65217_LDO_MASK))
		puts("tps65217_reg_write failure\n");

	/* Set MPU Frequency to what we detected now that voltages are set */
	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
	/* Set PWR_EN bit in Status Register */
	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
			   TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
}

void set_uart_mux_conf(void)
{
	enable_uart0_pin_mux();
}

void set_mux_conf_regs(void)
{
	enable_board_pin_mux();
}

#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
893c04e1 HP	2	/*
	3	* common.c
	4	*
	5	* common board functions for B&R boards
	6	*
4c302b9a	7	* Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
893c04e1 HP	8	* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
893c04e1 HP	9	*
893c04e1	10	*/
f7ae49fc	11	#include <log.h>
fbd5aeda	12	#include <version.h>
893c04e1	13	#include <common.h>
c7694dd4	14	#include <env.h>
ad6be25c	15	#include <fdtdec.h>
893c04e1	16	#include <i2c.h>
fbd5aeda	17	#include <lcd.h>
c05ed00a	18	#include <linux/delay.h>
893c04e1 HP	19	#include "bur_common.h"
893c04e1 HP	20
fbd5aeda HP	21	DECLARE_GLOBAL_DATA_PTR;
fbd5aeda HP	22
893c04e1	23	/* --------------------------------------------------------------------------*/
fbd5aeda	24	#if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
449c5e52	25	!defined(CONFIG_DM_VIDEO) && !defined(CONFIG_SPL_BUILD)
ad6be25c HS	26	#include <asm/arch/hardware.h>
	27	#include <asm/arch/cpu.h>
	28	#include <asm/gpio.h>
	29	#include <power/tps65217.h>
260cbc9a	30	#include "../../../drivers/video/ti/am335x-fb.h"
ad6be25c	31
99f72472 HP	32	void lcdbacklight(int on)
99f72472 HP	33	{
bfebc8c9 SG	34	unsigned int driver = env_get_ulong("ds1_bright_drv", 16, 0UL);
	35	unsigned int bright = env_get_ulong("ds1_bright_def", 10, 50);
	36	unsigned int pwmfrq = env_get_ulong("ds1_pwmfreq", 10, ~0UL);
99f72472	37	unsigned int tmp;
9b63ba37	38	struct gptimer *timerhw;
99f72472 HP	39
	40	if (on)
	41	bright = bright != ~0UL ? bright : 50;
	42	else
	43	bright = 0;
	44
9b63ba37 HP	45	switch (driver) {
	46	case 2:
	47	timerhw = (struct gptimer *)DM_TIMER5_BASE;
	48	break;
	49	default:
	50	timerhw = (struct gptimer *)DM_TIMER6_BASE;
	51	}
	52
99f72472 HP	53	switch (driver) {
	54	case 0: /* PMIC LED-Driver */
	55	/* brightness level */
	56	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
	57	TPS65217_WLEDCTRL2, bright, 0xFF);
	58	/* current sink */
	59	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
	60	TPS65217_WLEDCTRL1,
	61	bright != 0 ? 0x0A : 0x02,
	62	0xFF);
	63	break;
9b63ba37 HP	64	case 1:
9b63ba37 HP	65	case 2: /* PWM using timer */
99f72472 HP	66	if (pwmfrq != ~0UL) {
	67	timerhw->tiocp_cfg = TCFG_RESET;
	68	udelay(10);
	69	while (timerhw->tiocp_cfg & TCFG_RESET)
	70	;
	71	tmp = ~0UL-(V_OSCK/pwmfrq); /* bottom value */
	72	timerhw->tldr = tmp;
	73	timerhw->tcrr = tmp;
	74	tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
	75	timerhw->tmar = tmp;
	76	timerhw->tclr = (TCLR_PT \| (2 << TCLR_TRG_SHIFT) \|
	77	TCLR_CE \| TCLR_AR \| TCLR_ST);
	78	} else {
	79	puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
	80	}
	81	break;
	82	default:
	83	puts("no suitable backlightdriver in env/dtb!\n");
	84	break;
	85	}
	86	}
	87
fbd5aeda HP	88	int load_lcdtiming(struct am335x_lcdpanel *panel)
	89	{
	90	struct am335x_lcdpanel pnltmp;
e31fb4db	91
bfebc8c9 SG	92	pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL);
	93	pnltmp.vactive = env_get_ulong("ds1_vactive", 10, ~0UL);
	94	pnltmp.bpp = env_get_ulong("ds1_bpp", 10, ~0UL);
	95	pnltmp.hfp = env_get_ulong("ds1_hfp", 10, ~0UL);
	96	pnltmp.hbp = env_get_ulong("ds1_hbp", 10, ~0UL);
	97	pnltmp.hsw = env_get_ulong("ds1_hsw", 10, ~0UL);
	98	pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
	99	pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
	100	pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
0fcec577	101	pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL);
bfebc8c9 SG	102	pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
	103	pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
	104	pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
	105	panel_info.vl_rot = env_get_ulong("ds1_rotation", 10, 0);
e31fb4db	106
fbd5aeda HP	107	if (
	108	~0UL == (pnltmp.hactive) \|\|
	109	~0UL == (pnltmp.vactive) \|\|
	110	~0UL == (pnltmp.bpp) \|\|
	111	~0UL == (pnltmp.hfp) \|\|
	112	~0UL == (pnltmp.hbp) \|\|
	113	~0UL == (pnltmp.hsw) \|\|
	114	~0UL == (pnltmp.vfp) \|\|
	115	~0UL == (pnltmp.vbp) \|\|
	116	~0UL == (pnltmp.vsw) \|\|
0fcec577	117	~0UL == (pnltmp.pxl_clk) \|\|
fbd5aeda HP	118	~0UL == (pnltmp.pol) \|\|
	119	~0UL == (pnltmp.pup_delay) \|\|
	120	~0UL == (pnltmp.pon_delay)
	121	) {
	122	puts("lcd-settings in env/dtb incomplete!\n");
	123	printf("display-timings:\n"
	124	"================\n"
	125	"hactive: %d\n"
	126	"vactive: %d\n"
	127	"bpp : %d\n"
	128	"hfp : %d\n"
	129	"hbp : %d\n"
	130	"hsw : %d\n"
	131	"vfp : %d\n"
	132	"vbp : %d\n"
	133	"vsw : %d\n"
	134	"pxlclk : %d\n"
	135	"pol : 0x%08x\n"
	136	"pondly : %d\n",
	137	pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
	138	pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
	139	pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
0fcec577	140	pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay);
fbd5aeda HP	141
	142	return -1;
	143	}
	144	debug("lcd-settings in env complete, taking over.\n");
	145	memcpy((void *)panel,
	146	(void *)&pnltmp,
	147	sizeof(struct am335x_lcdpanel));
	148
	149	return 0;
	150	}
	151
fbd5aeda HP	152	static void br_summaryscreen_printenv(char *prefix,
	153	char name, char altname,
	154	char *suffix)
	155	{
00caae6d	156	char *envval = env_get(name);
fbd5aeda HP	157	if (0 != envval) {
	158	lcd_printf("%s %s %s", prefix, envval, suffix);
	159	} else if (0 != altname) {
00caae6d	160	envval = env_get(altname);
fbd5aeda HP	161	if (0 != envval)
	162	lcd_printf("%s %s %s", prefix, envval, suffix);
	163	} else {
	164	lcd_printf("\n");
	165	}
	166	}
e31fb4db	167
fbd5aeda HP	168	void br_summaryscreen(void)
fbd5aeda HP	169	{
fbd5aeda HP	170	br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
fbd5aeda HP	171	br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
2930941a HS	172	br_summaryscreen_printenv(" MAC1 :", "br_mac1", "ethaddr", "\n");
2930941a HS	173	br_summaryscreen_printenv(" MAC2 :", "br_mac2", 0, "\n");
fbd5aeda HP	174	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
fbd5aeda HP	175	lcd_puts("\n");
fbd5aeda HP	176	}
	177
	178	void lcdpower(int on)
	179	{
	180	u32 pin, swval, i;
eaba7df7	181	char buf[16] = { 0 };
e31fb4db	182
bfebc8c9	183	pin = env_get_ulong("ds1_pwr", 16, ~0UL);
e31fb4db	184
fbd5aeda HP	185	if (pin == ~0UL) {
	186	puts("no pwrpin in dtb/env, cannot powerup display!\n");
	187	return;
	188	}
	189
	190	for (i = 0; i < 3; i++) {
	191	if (pin != 0) {
eaba7df7 HS	192	snprintf(buf, sizeof(buf), "ds1_pwr#%d", i);
	193	if (gpio_request(pin & 0x7F, buf) != 0) {
	194	printf("%s: not able to request gpio %s",
	195	__func__, buf);
	196	continue;
	197	}
fbd5aeda HP	198	swval = pin & 0x80 ? 0 : 1;
	199	if (on)
	200	gpio_direction_output(pin & 0x7F, swval);
	201	else
	202	gpio_direction_output(pin & 0x7F, !swval);
	203
	204	debug("switched pin %d to %d\n", pin & 0x7F, swval);
	205	}
	206	pin >>= 8;
	207	}
	208	}
	209
	210	vidinfo_t panel_info = {
	211	.vl_col = 1366, /*
	212	* give full resolution for allocating enough
	213	* memory
	214	*/
	215	.vl_row = 768,
	216	.vl_bpix = 5,
	217	.priv = 0
	218	};
	219
	220	void lcd_ctrl_init(void *lcdbase)
	221	{
	222	struct am335x_lcdpanel lcd_panel;
e31fb4db	223
fbd5aeda HP	224	memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
	225	if (load_lcdtiming(&lcd_panel) != 0)
	226	return;
	227
	228	lcd_panel.panel_power_ctrl = &lcdpower;
	229
	230	if (0 != am335xfb_init(&lcd_panel))
	231	printf("ERROR: failed to initialize video!");
	232	/*
	233	* modifiy panel info to 'real' resolution, to operate correct with
	234	* lcd-framework.
	235	*/
	236	panel_info.vl_col = lcd_panel.hactive;
	237	panel_info.vl_row = lcd_panel.vactive;
	238
	239	lcd_set_flush_dcache(1);
	240	}
	241
	242	void lcd_enable(void)
	243	{
fbd5aeda	244	br_summaryscreen();
99f72472	245	lcdbacklight(1);
fbd5aeda	246	}
fbd5aeda HP	247	#endif /* CONFIG_LCD */
fbd5aeda HP	248
b75d8dc5	249	int ft_board_setup(void blob, struct bd_info bd)
e2259704 HS	250	{
	251	int nodeoffset;
	252
	253	nodeoffset = fdt_path_offset(blob, "/factory-settings");
	254	if (nodeoffset < 0) {
d63f7130 HS	255	printf("%s: cannot find /factory-settings, trying /fset\n",
	256	__func__);
	257	nodeoffset = fdt_path_offset(blob, "/fset");
	258	if (nodeoffset < 0) {
	259	printf("%s: cannot find /fset.\n", __func__);
	260	return 0;
	261	}
e2259704	262	}
d63f7130	263
e2259704 HS	264	if (fdt_setprop(blob, nodeoffset, "bl-version",
e2259704 HS	265	PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
d63f7130 HS	266	printf("%s: no 'bl-version' prop in fdt!\n", __func__);
d63f7130 HS	267	return 0;
e2259704	268	}
e2259704 HS	269	return 0;
	270	}
	271
2fac7a82 HS	272	int brdefaultip_setup(int bus, int chip)
	273	{
	274	int rc;
	275	struct udevice *i2cdev;
	276	u8 u8buf = 0;
	277	char defip[256] = { 0 };
	278
	279	rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev);
	280	if (rc != 0) {
	281	printf("WARN: cannot probe baseboard EEPROM!\n");
	282	return -1;
	283	}
	284
	285	rc = dm_i2c_read(i2cdev, 0, &u8buf, 1);
	286	if (rc != 0) {
	287	printf("WARN: cannot read baseboard EEPROM!\n");
	288	return -1;
	289	}
	290
	291	if (u8buf != 0xFF)
	292	snprintf(defip, sizeof(defip),
	293	"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.%d; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
	294	u8buf);
	295	else
	296	strncpy(defip,
	297	"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
	298	sizeof(defip));
	299
	300	env_set("brdefaultip", defip);
	301	env_set_hex("board_id", u8buf);
	302
	303	return 0;
	304	}
	305
47656d98 HS	306	int overwrite_console(void)
	307	{
	308	return 1;
	309	}
	310
ad6be25c HS	311	#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX)
	312	#include <asm/arch/hardware.h>
	313	#include <asm/arch/omap.h>
	314	#include <asm/arch/clock.h>
	315	#include <asm/arch/sys_proto.h>
	316	#include <power/tps65217.h>
fbc7c7de HS	317
	318	static struct ctrl_dev cdev = (struct ctrl_dev )CTRL_DEVICE_BASE;
	319
a9484aa7	320	void pmicsetup(u32 mpupll, unsigned int bus)
893c04e1 HP	321	{
	322	int mpu_vdd;
	323	int usb_cur_lim;
	324
a9484aa7 HS	325	if (power_tps65217_init(bus)) {
	326	printf("WARN: cannot setup PMIC 0x24 @ bus #%d, not found!.\n",
	327	bus);
893c04e1 HP	328	return;
	329	}
	330
	331	/* Get the frequency which is defined by device fuses */
	332	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
	333	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
	334
	335	if (0 != mpupll) {
96cf89f8	336	dpll_mpu_opp100.m = mpupll;
893c04e1 HP	337	printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
	338	} else {
	339	puts("ok.\n");
	340	}
	341	/*
	342	* Increase USB current limit to 1300mA or 1800mA and set
	343	* the MPU voltage controller as needed.
	344	*/
	345	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
	346	usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
	347	mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
	348	} else {
	349	usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
	350	mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
	351	}
	352
	353	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
	354	usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
	355	puts("tps65217_reg_write failure\n");
	356
	357	/* Set DCDC3 (CORE) voltage to 1.125V */
	358	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
	359	TPS65217_DCDC_VOLT_SEL_1125MV)) {
	360	puts("tps65217_voltage_update failure\n");
	361	return;
	362	}
	363
	364	/* Set CORE Frequencies to OPP100 */
	365	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
	366
	367	/* Set DCDC2 (MPU) voltage */
	368	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
	369	puts("tps65217_voltage_update failure\n");
	370	return;
	371	}
	372
	373	/* Set LDO3 to 1.8V */
	374	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
	375	TPS65217_DEFLS1,
	376	TPS65217_LDO_VOLTAGE_OUT_1_8,
	377	TPS65217_LDO_MASK))
	378	puts("tps65217_reg_write failure\n");
	379	/* Set LDO4 to 3.3V */
	380	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
	381	TPS65217_DEFLS2,
	382	TPS65217_LDO_VOLTAGE_OUT_3_3,
	383	TPS65217_LDO_MASK))
	384	puts("tps65217_reg_write failure\n");
	385
	386	/* Set MPU Frequency to what we detected now that voltages are set */
	387	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
fbd5aeda HP	388	/* Set PWR_EN bit in Status Register */
	389	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
	390	TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
893c04e1 HP	391	}
	392
	393	void set_uart_mux_conf(void)
	394	{
	395	enable_uart0_pin_mux();
	396	}
	397
	398	void set_mux_conf_regs(void)
	399	{
	400	enable_board_pin_mux();
	401	}
	402
ad6be25c	403	#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */